Tcwg-commits January 2022

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[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig updated (5e9d14f2be -> aeb0ae95b7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig in repository toolchain/ci/qemu. from 5e9d14f2be Merge remote-tracking branch 'remotes/alistair/tags/pull-ris [...] adds 1e4d8b31be python: pin setuptools below v60.0.0 adds 57a6b4478c python: use avocado's "new" runner adds dc6877bd2e python/aqmp: fix docstring typo adds 3bc72e3aed python/aqmp: add __del__ method to legacy interface adds 3b5bf136f5 python/aqmp: handle asyncio.TimeoutError on execute() adds 0e6bfd8b96 python/aqmp: copy type definitions from qmp adds 728dcac5e3 python/aqmp: add SocketAddrT to package root adds 6e7751dc38 python/aqmp: rename AQMPError to QMPError adds 7017f3853a python/qemu-ga-client: don't use deprecated CLI syntax in us [...] adds 26db07516f python/qmp: switch qemu-ga-client to AQMP adds 8d6cdc5118 python/qmp: switch qom tools to AQMP adds f3efd12930 python/qmp: switch qmp-shell to AQMP adds 0347c4c4cf python: move qmp utilities to python/qemu/utils adds fd9c3a6219 python: move qmp-shell under the AQMP package adds 9922125615 scripts/cpu-x86-uarch-abi: fix CLI parsing adds 0665410dcf scripts/cpu-x86-uarch-abi: switch to AQMP adds 0590860242 scripts/render-block-graph: switch to AQMP adds aeb0ae95b7 Merge remote-tracking branch 'remotes/jsnow-gitlab/tags/pyth [...] No new revisions were added by this update. Summary of changes: python/Makefile | 2 ++ python/README.rst | 2 +- python/avocado.cfg | 2 +- python/qemu/aqmp/__init__.py | 16 ++++++++--- python/qemu/aqmp/error.py | 12 ++++---- python/qemu/aqmp/events.py | 4 +-- python/qemu/aqmp/legacy.py | 41 +++++++++++++++++++++++++++- python/qemu/aqmp/protocol.py | 24 +++++++++------- python/qemu/aqmp/qmp_client.py | 16 +++++++---- python/qemu/{qmp => aqmp}/qmp_shell.py | 31 +++++++++++---------- python/qemu/{qmp => utils}/qemu_ga_client.py | 24 ++++++++-------- python/qemu/{qmp => utils}/qom.py | 5 ++-- python/qemu/{qmp => utils}/qom_common.py | 3 +- python/qemu/{qmp => utils}/qom_fuse.py | 11 ++++---- python/setup.cfg | 19 +++++++------ scripts/cpu-x86-uarch-abi.py | 7 ++--- scripts/qmp/qemu-ga-client | 2 +- scripts/qmp/qmp-shell | 2 +- scripts/qmp/qom-fuse | 2 +- scripts/qmp/qom-get | 2 +- scripts/qmp/qom-list | 2 +- scripts/qmp/qom-set | 2 +- scripts/qmp/qom-tree | 2 +- scripts/render_block_graph.py | 8 ++---- 24 files changed, 151 insertions(+), 90 deletions(-) rename python/qemu/{qmp => aqmp}/qmp_shell.py (96%) rename python/qemu/{qmp => utils}/qemu_ga_client.py (94%) rename python/qemu/{qmp => utils}/qom.py (98%) rename python/qemu/{qmp => utils}/qom_common.py (98%) rename python/qemu/{qmp => utils}/qom_fuse.py (97%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig updated (7e3bcae5069f -> 4ed7c6eec979)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig in repository toolchain/ci/llvm-project. from 7e3bcae5069f Add apple-specific missing header in Support/GraphWriter.cpp adds d5ae039ed7b8 [SystemZ] Properly register machine passes. adds e9211e039377 Remove dependency from raw_ostream on <chrono> adds ad43217a0466 [InstCombine] Fold for masked gather when loading the same [...] adds 4d82ae67b208 Add security group 2021 transparency report. adds b8102449a72c [clang-tidy] Avoid binding nullptr to a reference adds e5fd3a7df917 Try to unbreak build on Windows after e9211e03937 adds 8bc661894299 Add missing llvm/support/Regex.h include in polly/lib/Anal [...] adds 3c9e3dada916 Try to unbreak build on Windows more after e9211e03937 adds 9900acacfb3f [libcxx][doc][nfc] Fixed typo in doc adds 9d3437fbf341 [ADT] [NFC] Add StringRef::detectEOL adds 5597ec2dc4f8 Include missing "llvm/Support/Path.h" in "flang/lib/Fronte [...] adds f24fe96f469b [ifs] Use a tmp file instead of "-" adds cab961693802 [libc++] Use addressof in unordered_map. adds b7fd91c84b4e Upstream MLIR PyTACO implementation. adds e4a556268ea9 Revert "[libc++] Use addressof in unordered_map." adds 23a7bb541dae [clang-format] Fix comment in spaceRequiredBefore. NFC. adds 565963841880 Revert "[compiler-rt][cmake] Use HandleOutOfTreeLLVM like [...] adds 26cbc430197a [flang] Remove target and require shell adds 10e5c513b59b Revert "[cmake] Duplicate `{llvm,compiler_rt}_check_linker [...] adds 5061eb6b0121 [Sparc] Don't define __sparcv9 and __sparcv9__ when targeting V8+ adds e6ceec9c1d19 [Clang][RISCV] Restrict rvv builtins with zve macros adds 754d6af7c359 [NFC] Improve code reuse. adds 11754a4dbbad [RISCV] Use RVBUnary in more places to simplify some table [...] adds 4710750854ce [mlir][spirv] Support size-1 vector inserts during conversion adds fd0c6f53913f [mlir] Move linalg::PadTensorOp to tensor::PadOp. adds 3c90ae5d0b71 Revert "[flang] Update tco tool pipline and add translatio [...] adds 48132bb1e437 [RISCV] Simplify interface to combineMUL_VLToVWMUL. NFC adds d6e2c95d2252 [libc++] Use addressof in unordered_map. adds 4d0a18d06e8e [mlir][sparse] Adding assertions for overhead storage types adds cb8b94f6efa9 [AArch64] Add extra tests useful in testing hadd. NFC adds f18fcdabda72 [BOLT][NFC] Expand auto types pt.2 adds 5a654b01133f [BOLT] Make ICP target selection (more) deterministic adds f8c7fb499be6 [BOLT][NFC] Reduce includes with include-what-you-use adds 2f9f9afa4e12 [mlir] Add polynomial approximation for atan and atan2 adds 0d9cc6995401 [Support] Update missed tests with lazy caching behavior. adds cd4e600f5f5c [Sema] Warn about printf %n on Android and Fuchsia adds 0379459fc586 [RISCV] Strengthen a SDTypeProfile. Fix formatting. adds 4f8ea3c84f3d [SystemZ][z/OS][NFC] Remove extra symbol adds d84d1135d80c Emit swift5 reflection section data in dsym bundle generat [...] adds 9f4cc5a6bb56 [gn build] Set HAVE_MALLINFO2=1 adds 6103b2d45bfb Revert "Emit swift5 reflection section data in dsym bundle [...] adds e39c262979e6 Revert "[gn build] Set HAVE_MALLINFO2=1" adds 705d8c49f9be [x86] regenerate smul-with-overflow.ll; add test which fai [...] adds 6df05697ca1d [gn build] Set HAVE_MALLINFO2=1 adds 653b007dc186 [CodeComplete] fix nullptr crash in 612f5ed8823120 adds b796709a62da Only run MLIR PyTACO tests when python bindings are enabled. adds ba093fe58b15 Fix a commit. adds 6ba1fb04214b [llvm-pdbutil] Fix gaps ouput. adds 58ee14e29e98 [lldb] Fix timer logging inverted quiet condition adds efa15f417847 [mlir][sparse] add ability for sparse tensor output adds 10d0d8c0c1db [clang][cmake] Use `GNUInstallDirs` to support custom inst [...] adds 1613f8b8d7d5 NFC (build fix): Add header for llvm::errs(). adds 08574ce4d625 [mlir][tosa] Add clamp + clamp as single clamp canonicalization adds 13fa17db3a72 [split-file] Respect input file's line endings adds 4f547ee8b8a7 [libc++][test] Add const and reference tests for enable_vi [...] adds 9cddfe3085c4 [CMake] Passthrough OSX CMake options to builtins and runtimes adds e6cdef187ed3 [XRay][test] Clean up llc RUN lines adds 04eb93b1d559 [flang] Fix repeated "DT" editing adds db07e082abaf [TSan] Omit vfork interceptor iOS simulator runtime adds 3726626a26ec [flang] Fix crash from USE-associated defined I/O subprograms adds b95150418fb6 [lldb] Allow aliases to aliases of raw input commands adds e796eaf2af65 [RISCV][RFC] add MC support for zbkc subextension adds b1856009fbc1 [flang] Allow INQUIRE() on a child unit in user-defined I/ [...] adds 55d887b83364 [time-trace] Add optimizer and codegen regions to NPM adds b6098c07cb20 [MLIR] Fix negative gcd in `normalizeDivisionByGCD` function. adds de8723829515 [JITLink] Add anonymous symbols in LinkGraph for unnamed t [...] adds fdb6578514dd Revert "[JITLink] Add anonymous symbols in LinkGraph for u [...] adds f7d4cafe5a6a [JITLink][RISCV] Support R_RISCV_SET* and R_RISCV_32_PCREL [...] adds 26544b98f7bf [libc++] Use addressof in unordered_set. adds 4041354b4c12 [mlir] Add SingleBlockImplicitTerminator<"tensor::YieldOp" [...] adds 93deac2e2ba9 [AArch64] Optimize add/sub with immediate through MIPeepholeOpt adds 0283b07746e8 reapply de872382951 "[JITLink] Add anonymous symbols in Li [...] adds b27e5459d51f [DAG] Convert truncstore(extend(x)) back to store(x) adds 8dedf9b58bff [PowerPC] Change CTR clobber estimation for 128-bit floati [...] adds 00d68c3824bf [PowerPC] Support parsing GNU attributes in MC adds 5f2854f1daa7 [LV] Always create VPWidenCanonicalIVRecipe, optimize away later. adds 26fffc1b8e75 [libc++] [test] {cpo,niebloid}.compile.pass.cpp: Also test [...] adds e9d0f8baf236 [flang] Don't drop format string for external child I/O adds 896a543e72fd [flang] Support DECIMAL='COMMA' mode in namelist I/O adds 0a6b4258ab0e [openmp][cmake] Use `GNUInstallDirs` to support custom ins [...] adds d44b6be6eaa8 [RISCV] Don't Custom legalize f16/f32/f64 bitcasts if thos [...] adds 39e602b6c433 [InstCombine] try to fold binop with phi operands adds 7c16647c3676 [clang-tools-extra][cmake] Use `GNUInstallDirs` to support [...] adds c1988dbf2d19 [openmp] Allow x87 fp functions only in Openmp runtime for x86. adds b8467952404c [docs] [clang] Small documentation change for compilation [...] adds 37d1d02200b9 [X86][MS] Change the alignment of f80 to 16 bytes on Windo [...] adds 2513b7903063 [libc++] Implement LWG3549: view_interface need not inheri [...] adds 3cf15af2daa9 [RISCV] Remove experimental prefix from rvv-related extensions. adds 85e42db1b6db [RISCV] Merge some rvv intrinsic test cases that only diff [...] adds be6070c290e2 [RISCV] Use FP ABI for some RVV intrinsic tests. NFC adds 3dc6fd515135 [llvm-objcopy][MachO] Implement --update-section adds a4f202549208 [X86] Regenerate avx512-mask-op.ll adds ff05b93a02d1 [llvm-objdump] Use cast<> instead of dyn_cast<> to avoid d [...] adds 20d46fbd4a51 [CodeGenPrepare] Use dyn_cast result to check for null pointers adds 946f29028e06 [llvm-objdump] Use cast<> instead of dyn_cast<> to avoid d [...] adds 86497026a266 [clang-tidy] Use cast<>/castAs<> instead of dyn_cast<>/get [...] adds df0fd1c301d6 [clangd] Use castAs<> instead of getAs<> to avoid derefere [...] adds c93491352cf3 [lldb] CxxModuleHandler - use cast<> instead of dyn_cast<> [...] adds d7aa402b4b8a [lldb] PdbAstBuilder - use cast<> instead of dyn_cast<> to [...] adds d13847bbe5e6 [lldb] TerminalState::Save - fix unused variable warning adds 49d38b1d618c Fix "not all control paths return a value" warning. NFC. adds 938944445a1b [libc++] Mark LWG3541 as "Complete". NFC. adds 5d78fef6db15 [libc++] Fix LWG3437 "__cpp_lib_polymorphic_allocator is i [...] adds d4ed3eff9f9c [X86] Add vector signbit parity checks for non-popcnt targets adds eb3f20e8fa4b [clang-tidy] Remove gsl::at suggestion from cppcoreguideli [...] adds 153359180a9d [AVR] Remove regalloc workaround for LDDWRdPtrQ adds 116ab78694dd [AVR] Make use of the constant value 0 in R1 adds 7c66aaddb128 [DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everyth [...] adds 2e26633af0c8 [IR] document and update ctlz/cttz intrinsics to optionall [...] adds d2e8fb331835 [clang-tidy] Add readability-duplicate-include check adds 6605057992b1 Revert rG7c66aaddb128dc0f342830c1efaeb7a278bfc48c "[DAG] F [...] adds 631f3e621586 [gn build] Port d2e8fb331835 adds accc07e65465 [DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everyth [...] adds 0b799791807e [RISCV] Merge some rvv intrinsic test cases that only diff [...] adds f69379d0a43b [InstCombine] Add test coverage for PR48683 adds 818cfb10c574 [libcxx][test] Make MSVC `<charconv>` test compile when te [...] adds 8e382ae91b97 [Support] Simplify parallelForEach{,N} adds 1a5dea9e2b97 [NewGVN][NFC] precommit tests for PR53277 adds 7a29b0b58383 [llvm] Fix header guards (NFC) adds abb0ed44957c [Commands] Remove redundant member initialization (NFC) adds f8ddcb413125 [Object] Remove a redundant return statement (NFC) adds ad36f37ce2b4 [MLIR][Presburger] Clean PresburgerSet identifier interfac [...] adds 413684313d9d [RISCV] Adjust the header comment in RISCVInstrInfoZb.td t [...] adds 32dc14f876c4 [X86] LowerFunnelShift - use supportedVectorShiftWithBaseA [...] adds ab1add6adc44 [clang] Move the definition of ASTDiff (NFC) adds ee591a64a795 [clang] Forward-declare DynTypedNode (NFC) adds e59964b67e02 [clang] Remove unused forward declarations (NFC) adds 4762c077e710 [X86] LowerFunnelShift - always lower vXi8 fshl by constan [...] adds 88f33cff4bee [RISCV] Add bitreverse tests to bswap-ctlz-cttz-ctpop.ll. [...] adds 3575700b286f [RISCV] Add tests that do a bitreverse before or after a b [...] adds 47d7e922d843 [mlir] Ensure a newline at the end of a file (NFC) adds fa90fc6e0566 [Sema] Fix a bugprone argument comment (NFC) adds 448d0dfab701 [Analysis] Remove a redundant const from a return type (NFC) adds ab4756338c5b DebugInfo: Don't put types in type units if they reference [...] adds 7c77df1528c8 [X86] Add some basic tests for PR46809 adds 2e58a1891086 DebugInfo: Include template parameters for simplified temp [...] adds 3a3af2bbc97e [C++20] [Module] fix bug 47716 and implement [module.inter [...] adds 3f24cdec2572 [RISCV][NFC] Remove tailing whitespaces in RISCVInstrInfoV [...] adds b574048239bc [NFC] [Coroutines] Rename tests in coro-align adds 943aa1bfacaa Add modernize-use-default-member-init.UseAssignment to .cl [...] adds f63a9cd99db7 [Vectorize] Remove unused variables (NFC) adds b752eb887f7e [Analysis] Use default member initialization (NFC) adds d3b26dea1610 Clang: Change the default DWARF version to 5 adds 90abe181da7c Add missing function implementation from DWARF default change adds 68b70d17d8de [GlobalISel] Fold or of shifts with constant amount to fun [...] adds 8b280df504b9 Rough guess at fixing lldb tests to handle Clang defaultin [...] adds 1f4a0531b3fd [TSan] Mark test unsupported on Darwin adds e29d8fb16978 [RISCV] Initially support the K-extension instructions on [...] adds bf039a8620f1 [Target] Use range-based for loops (NFC) adds ba16e3c31f66 [RISCV] Decouple Zve* extensions and the V extension. adds c5590396d041 [PowerPC] Emit warning for ieeelongdouble on older GNU toolchain adds ea2112ea15a0 [clang-format] Remove unused assignment. NFC. adds 3519dcfec229 Added OpenMP 5.0 specification based semantic checks for a [...] adds 670a721de2a1 [clang-format] Assert Line->First. NFC. adds f53301125257 [Hexagon] Use llvm::Register instead of unsigned in Hexago [...] adds d6f8f56da04b [MLIR][Presburger] Silence -Wdangling-else warning (NFC) adds 81793bd276af [clang-format] Assert Line->First and State.NextToken->Pre [...] adds 9aaa74aeeff3 [RISCV] Add patterns of SET[U]LT_VI for STECC forms adds ba845787b3fd [clang][sema] Add missing diagnostic parameter adds 3ad6de31c0cf [clang][tests] Fix a c++/libc++ -stdlib value typo adds d29e319263de [OpaquePtrs] Add getNonOpaquePointerElementType() method (NFC) adds 67346b43e0ed [Attributor] Use MemoryLocation to get pointer operand and [...] adds 7ccacaf4428d [flang][examples] Add missing CMake dependencies adds 4f8fdf78279f [ISEL] Canonicalise constant splats to RHS. adds e7c9a6cae09d [SDAG] Don't move DBG_VALUE instructions after insertion p [...] adds 0d1308a7b77c [AArch64][GlobalISel] Support returned argument with multi [...] adds a08447d0de5d [LLD][ELF][AArch64] Update test with incorrect REQUIRES li [...] adds 906ebd5830e6 [AMDGPU][GlobalISel] Regenerate checks in inst-select-*ext.mir adds aa50b93e7cf9 [AMDGPU][GlobalISel] Add more sign/zero/any-extension tests adds 7d19566c3bfb [lldb] Ignore non-address bits in "memory find" arguments adds 022600334dcb [flang] Update the description of `!fir.coordinate_of` adds 912af6b570d6 [AMDGPU][GlobalISel] Remove the post ':' part of vreg oper [...] adds 577a6dc9a186 [X86] getVectorMaskingNode - fix indentation. NFC. adds e7926e8d972e [RISCV] Match VF variants for masked VFRDIV/VFRSUB adds af773a18181d [RISCV][VP] Lower VP_MERGE to RVV instructions adds 3e6be0241b31 [lldb] Update release notes with non-address bit handling changes adds 12a499eb00e3 Pre-commit test case for trunc+lshr+load folds adds 46cacdbb21c2 [DAGCombiner] Adjust some checks in DAGCombiner::reduceLoadWidth adds e5147f82e1cb [X86] Remove __builtin_ia32_pabs intrinsics and use generi [...] adds b2499bf3e851 [mlir][bufferize][NFC] Refactor createAlloc function signature adds 3e50593b1884 [X86] Remove `__builtin_ia32_pmax/min` intrinsics and use [...] adds 3696c70e67d9 [clang-tidy] Add `readability-container-contains` check adds e4074432d5bf [X86] Remove avx512f integer and/or/xor/min/max reduction [...] adds 8082ab2fc391 [LoopVectorize] Support epilogue vectorisation of loops wi [...] adds 54f1d950667c [gn build] Port 3696c70e67d9 adds b7f69b8d4650 [LV] Name values and blocks in same induction tests (NFC). adds 70f83f308449 [RISCV] add support for zbkx subextension in MC layer. adds b754d09fde0b [MLIR][Presburger] Refactor duplicate division merging to Utils adds b4b6d6374e2e [NFC] New test case for BasicAA and memcy/memmove with deopt adds f1e36474b9e5 [AMDGPU][NFC] Fix debug prints adds 0e70dd858eb7 [X86] Add PR46249 test case showing poorly widened select [...] adds b2a8eff45c55 [LV] Make some tests more robust by adding missing users. adds 5f290c090a24 Move STLFunctionalExtras out of STLExtras adds 853e79d8d8af [flang] Update tco tool pipline and add translation to LLVM IR adds 38ffea9b4c1f [demangler] Resync demangler sources adds 897d1bb659c2 [demangler] write-protect non-canonical source adds 6184e565ad40 [demangler][NFC] Refactor some parsing adds 589a93907222 Add `isConstinit` matcher adds a0d5e938fe9c Add missing include llvm/ADT/STLExtras adds f6ac8088b0e8 [LoopFlatten] Added comments about usage of various Loop A [...] adds ada6d78a7802 [LoopFlatten] Address FIXME about getTripCountFromExitCount. NFC. adds d42678b453bc [RISCV] Add side-effect-free vsetvli intrinsics adds 25e8f5f827bf Add missing STLExtras.h include from lldb/unittests/Testin [...] adds f7079bf9ee68 [X86] Fix v8i8 -> v8i16 typo in bool reductions adds 4436d4cd7c86 [X86] Rename cmp-with-zero bool reductions adds 0553f5e61ac7 [X86] Add cmp-equality bool reductions adds 34aedbe90d76 [AArch64] Regenerate CHECK lines for llvm/test/CodeGen/AAr [...] adds 5e5efd8a91f2 [clang-format] Fix SeparateDefinitionBlocks issues adds 7a5b0a2934f3 Reapply "IR: Make getRetAlign check callee function attributes" adds 99e8e17313e7 Reapply "Revert "GlobalISel: Add G_ASSERT_ALIGN hint instruction" adds 354b2c36ee46 Pre-commit test cases for (sra (load)) -> (sextload) folds. NFC adds 18aabae8e2b6 AMDGPU: Fix assertion on fixed stack objects with VGPR->AG [...] adds 49e37000691a [mlir][tensor] Move BufferizableOpInterface impl to tensor [...] adds 473aa8e10c49 [llvm][docs] Fix code-block in the testing guide adds 2d9ed1aba236 [mlir] Fix broken __repr__ implementation in Linalg OpDSL adds d193f7be7898 [libc++][AIX] Do not assert chmod return value is non-zero. adds fc08d1c29406 [mlir][tensor][bufferize] Support tensor.rank in Bufferiza [...] adds 4d53f88d1a18 [flang] Add MemoryAllocation pass to the pipeline adds 3ad35ba4dea5 [Templight] Don't display empty strings for names of unnam [...] adds c30d2893a43d [mlir][bufferize] Change insertion point for ToTensorOps adds 217570b03bbe [MLIR][OpenMP] Suppress -Wreturn-type warnings (NFC) adds c1335166b265 Don't run test/ClangScanDeps/modules-symlink.c on Windows adds cd2a9ff39788 [RISCV] Select int_riscv_vsll with shift of 1 to vadd.vv. adds b8c7cdcc81a0 [SelectionDAG][RISCV] Teach getNode to fold bswap(bswap(x))->x. adds b00ee46b5e4b [mlir][bufferize][NFC] Implement BufferizableOpInterface o [...] adds a43ed49f5b16 [DAGCombiner][RISCV] Canonicalize (bswap(bitreverse(x))->b [...] adds e494278ceeb7 [mlir][linalg] Add transpose support to hoist padding. adds cfe17986c952 [libcxx][test] {move,reverse}_iterator cannot be instantia [...] adds 699e22a083f2 [ISEL] Move trivial step_vector folds to FoldConstantArithmetic. adds 6997f4d07fa4 [X86] combineSetCCMOVMSK - fold allof(cmpeq(x,y)) -> ptest [...] adds c03fdd340356 [ELF] Fix the branch range computation when reusing a thunk adds a2afc8249a99 [libc++] Fix benchmark failure adds 6be77561f82d [SLP][NFC] Add debug logs for entry. adds 7cd441ff537e [clang][NFC] Wrap TYPE_SWITCH in "do while (0)" in the int [...] adds 80532ebb508d [AMDGPU][InstCombine] Remove zero image offset adds 74db5c8c95e2 Revert rG6a605b97a200 due to excessive memory use adds 50999e82e884 [clang-format] Space between attribute closing parenthesis [...] adds db2944e34b16 [libc++][format] Adds formatter floating-point. adds 787ccd345cbb [libc++][format] Adds formatter pointer. adds 2b8b48c5a0c4 [libc++][format] Disable default formatter. adds ade6d0d8fa1d [libc++][format] Adds formatter handle. adds a922324590a1 [gn build] Port 787ccd345cbb adds 5fa40fb29324 [gn build] Port db2944e34b16 adds ea17d29a6c83 [llvm] Do not replace dead constant references in metadata [...] adds 11cea7e5ce4d [AArch64] NFC: Clarify and auto-generate some CodeGen tests. adds 57eb5033cdff [libc] Add bazel definition for hypot/hypotf. adds 38e16e1cebb8 Use -gdwarf-4 in compiler-rt/test/profile/Linux/instrprof- [...] adds d27f02261442 [NFC][DebugInfo] Strip out an undesired #if 0 block adds 830df62a0703 [ConstraintElimination] Add test from PR53123. adds 8a15caaae561 [ConstraintElimination] Fix sign of sub decomposition. adds 0a3d946e7bb4 [libc][cmake] Make `add_tablegen` calls match others adds eadf7268d578 [libc++] Fix bugs in common_iterator; add test coverage. adds 4684857abfd7 [libc++][format] Finish P0645 Text Formatting. adds b1af01fe6aa7 [NFC][MLGO] Simplify conditional compilation adds c27f8fb96882 [AMDGPU] Remove cndmask from readsExecAsData adds 4858fe04a157 [lldb/Plugins] Add ScriptedProcess::GetThreadsInfo interface adds 1b86344fa80b [lldb/Plugins] Move ScriptedThreadInterface to ScriptedThread adds d3e0f7e1503b [lldb/Plugins] Add support of multiple ScriptedThreads in [...] adds cfa55bfe7814 [lldb/Plugins] Enrich ScriptedThreads Stop Reasons with Ex [...] adds 45148bfe8aec [lldb/Plugins] Fix ScriptedThread IndexID reporting adds 91bb116190cd [lldb/Interpreter] Make `ScriptedInterface::ErrorWithMessa [...] adds bb1fe369774a [AMDGPU] Make v8i16/v8f16 legal adds 9d32847b3315 [DAGCombine] Remove unused param in combineCarryDiamond(). NFC adds d4be9720e7e6 [test] Fix no-undef-type-md.ll. adds c548bc258c69 [InstCombine] add tests for icmp with masked mul operand; NFC adds 6d020a5ac2d5 [BOLT] Add missing <memory> in InstrumentationRuntimeLibrary.h adds 0407ab4114db [libc++] Make sure basic_string::reserve(n) never shrinks [...] adds 1f6af9c9cefd [libc++][CI] Re-enable all CI jobs adds c3ca2c6b14f9 [lldb/test] Fix `TestScriptedProcess.test_scripted_process [...] adds 997e128e2a78 [libcxx][test] the domain of == for forward iterators is i [...] adds 6a028296fe62 [PowerPC] Emit warning when SP is clobbered by asm adds d3932c690d97 [LoopVectorize] Add tests with reductions that are stored [...] adds adb6494660eb [MLIR] Add generic walk support to OpState adds 8d298355ca37 [X86] combineSetCCMOVMSK - detect and(pcmpeq(),pcmpeq()) p [...] adds 3b64ab574d98 [NFC][clangd] Use table to collect option aliases adds d87459a0b8e9 [CMake] Fixes /INCREMENTAL detection when considering addi [...] adds da85307ba699 [CMake] Pass CMAKE_C/CXX_COMPILER_LAUNCHER down to cross-c [...] adds 4cfea311cb8e [AMDGPU][NFC] Update to AMDGPUUsage for default Code Objec [...] adds 11bb4a11116c [X86] combinePredicateReduction - split vXi16 allof(cmpeq( [...] adds 22b0fe3fd9d4 [SystemZ][z/OS]: fix lit tmp_dir to use - instead of _ adds c1562683ee9a [MLIR][Presburger] LinearTransform: rename multiplication [...] adds 0e98fadc7953 [MLIR][Presburger] use braces for single-line loop when in [...] adds fe0c5309c4a8 [Fuchsia] Remove i386 from iossim architectures adds f1c9e7bdc921 [ObjC Availability] Add missing const to getVersion functi [...] adds 572fa9642cb5 [mlir] Add a ControlFlowSink pass. adds 9407a701790f DWARFv5 default: Switch bolt tests to use DWARFv4 since Bo [...] adds cd8122b27f8f [lldb] Add ConstString memory usage statistics adds 52f37c24c3f8 [libc++][NFC] remove this-> when calling member functions [...] adds 014a673441c6 [libc++] Remove std::basic_string's base class in ABIv2 adds 59eb542f6070 [libc] Let header generator generate the type header inclu [...] adds 3628febcf8e3 [mlir] NFC control-flow sink cleanup adds 3e746c6d9ef0 [mlir] Add support for ExpM1 to GLSL/OpenCL SPIRV Backends adds d0d8d2d572cd [clang][Driver] use DWARF4 for wasm adds dd01d971aa2c [clang][dataflow] Avoid MaxIterations overflow adds 902184e6cc26 [X86] combinePredicateReduction - generalize allof(cmpeq(x [...] adds fd0a4bc76bd9 [RISCV] Add missing space to 'clang-format on' directive. NFC adds 15f7857412ae [tests] Refresh autogen tests for SLP adds 6693c562f909 [llvm-profgen] Support to load debug info from a second binary adds 8b29b84c99ac [libc++] Fix LWG3422 "Issues of seed_seq's constructors" adds 16bff06790a7 [lldb] Make PythonDataObjects work with Python 2 adds 06cfdd5224bf [OpenMP][Fix] Properly inherit calling convention adds 5eb49009ebe6 [OpenMP] Add more identifier to created shared globals adds 92c1c63daeaf [mlir][sparse] integration test for sparse output operation adds ff8f7904d14d Remove null check after dereferencing the pointer (NFC) adds 9ea3dfa5d015 [RISCV][NFC] Rename RequiredExtensions to RequiredFeatures. adds 0e55d4fab018 [AA] Refine ModRefInfo for llvm.memcpy.* in presence of op [...] adds 810f13f0ebde [clang-tools-extra] Fix documentation build (NFC) adds e01e4c9115ad Fix bugs in GPUToNVVM lowering adds 0e9a4a3b6536 [mlir] Move the Buffer related source files out of Transforms/ adds 2e2c0738e80e [mlir:Transforms] Move NormalizeMemRefs to MemRef/Transforms/ adds a70aa7bb0d9a [mlir:Transforms] Move out the remaining non-dialect indep [...] adds 88c1df64bdd3 [mlir:ArmSVE][NFC] Remove dead code and unnecessary dependencies adds 65e7cd13bbc6 [mlir] Remove a bunch of unnecessary dialect dependencies adds 03e9ba274072 [ObjCARC] Remove unused RetainRVDep dependency kind. NFC. adds e7298464c5d0 [ObjCARC] Use "UnsafeClaimRV" to refer to unsafeClaim in e [...] adds 07be76f2ae19 [M68k][Disassembler][NFC] Re-organize test files adds 63b801846842 [mlir:LoopLikeInterface] Add missing dependency on SideEff [...] adds e51a20e166b6 Fix python test to register all passes before using "norma [...] adds 61b81e0f4951 [mlir:MLIRAffineUtils] Add missing dependency on MLIRAffin [...] adds 71cb5ed03c9b [bazel] Update MLIR deps adds b827b6340bf8 [mlir] Add missing dependencies after D118062 adds e697b971487d [mlir] Add more missing dependencies after D118062 adds 8676e10f744c [MLIR] Improve doc for -mlir-print-local-scope and unhide adds 633f5badbf13 [mlir] Add more missing dependencies after D118062 adds c913dccfde69 [SCEV] Use lshr in implications adds f6984b299afc Fix the wrong value of bit_AVXVNNI adds 320dc8c4df74 [mlir][OpenMP] Added omp.atomic.capture operation adds 881ff4e4ebe8 [mlir] Remove unnecessary dependency on Tensor from MemRef adds bca2d85153dc [MLIR][Interfaces] Silence -Wparentheses warning (NFC) adds 70cb8daed45f [X86] [CodeView] Add codeview mappings for registers ST0-ST7 adds 9554aaa2753b [Dwarf] Optimize getOrCreateSourceID() for repeated calls [...] adds 2a14bc55c547 [NFC] [C++20] [Modules] Update comments for handling friend adds aa97bc116d34 [NFC] Remove uses of PointerType::getElementType() adds 22487280dcea [NFC] Remove more uses of PointerType::getElementType() (NFC) adds 184591aeeb5a [OpaquePtrs] Deprecate PointerType::getElementType() new 13252160c398 [NFC] Move useSVEForFixedLengthVectors into AArch64Subtarget.h new 2233befa5dc4 [LegalizeTypes][VP] Add splitting support for vp.gather an [...] new 48f763edb471 [docs] Refine the description in Set-Like and Map-Like con [...] new 901dd53cbf61 [docs] There are more than three bit storage containers. new e2f8d28afba0 [NFC] Added test with select with unpredictable metadata; [...] new 9fa6ad4c5893 Revert "[NFC] Added test with select with unpredictable me [...] new 5f5c5603ce40 [SelectionDAG][VP] Add splitting support for VP_MERGE new 19d3dc6e226c [VP] Update CodeGen/RISCV/rvv/vpgather-sdnode.ll test new 2074eef5db33 [bazel] Adjust dependencies after a70aa7bb new f302e0b5dd40 [AArch64] Exclude optional features from HasV8_0rOps. new 99adacbcb789 [clang] Remove some getPointerElementType() uses new 7cb452bfde10 [SelectionDAG][VP] Add widening support for VP_MERGE new 0f08db66db93 [lldb] Make logging machinery type-safe new ce6903595b71 [lldb/test] Use abspath when searching for lldb.exe new 109cc5adccae [DAGCombine] Fold SRA of a load into a narrower sign-exten [...] new dbbe0109086d [MLIR] [AsyncToLLVM] Use llvm.coro.align intrinsic new a83e9266b96c [mlir][Bazel] Update BUILD.bazel file new caff8591eff2 [OpenMP] Simplify pointer comparison new 91a0b464a853 [OpenCL] Make read_write images optional for -fdeclare-ope [...] new 30d4a7e29553 [IRBuilder] Require explicit element type in CreatePtrDiff() new d8962b4139a5 [llvm-c] Deprecate LLVMBuildPtrDiff() new 157f9b68a372 [X86] combineVectorSignBitsTruncation - fix indentation. NFC. new 15e2be291f7f [DAG] visitMULHS/MULHU/AND - remove some redundant LHS con [...] new 3e2ae92d3f06 [SCEV] Remove an unnecessary GEP type check new 4f4d071c909e [ObjCArcOpts] Regenerate test checks (NFC) new 78e1f70220a5 [ObjCARCOpts] Use standard non-terminator unreachable pattern new d95cf1f6cf42 [SVE] Enable ISD::ABDS/U ISel for scalable vectors. new 153b1e3cba1e [AArch64] Add patterns for relaxed atomic ld/st into fp registers new fc15ab7b1b26 [X86] Add folded load tests to PR46809 tests new 345d85e12408 [lldb] Fix mac build for D117490 new 6b67e89b45c1 [lldb] Fix windows build for D117490 new 694df0f0a807 [mlir][linalg][bufferize] Fix build new 4100cf2e9259 [Visualizers] Fix Optional visualizer. new 6a008de82a89 [Evaluator] Simplify handling of bitcasted calls new 71bbb78b8fdc [mlir][linalg][bufferize] Support tensor.generate new d581c94d6bfb [mlir][linalg][bufferize] Support tensor.from_elements new c0e3c893aa09 [NFC][clangd] cleaning up llvm-qualified-auto new a3a2239aaaf6 [GlobalISel] Avoid pointer element type access during Inli [...] new 475927d04606 [AsmParserTest] Avoid pointer element type accesses (NFC) new bf00f7a64e3a Add llvm-dwp to LLVM_TOOLCHAIN_TOOLS new 8e3e772f84e5 [OpenMPIRBuilderTest] Avoid some pointer element type acce [...] new 7cc3e141d710 [MemProf] Avoid pointer element type access new 4ed7c6eec979 [AMDGPU] Only match correct type for a16 The 43 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .clang-tidy | 2 + bolt/include/bolt/Core/BinaryContext.h | 3 +- bolt/include/bolt/Core/BinaryData.h | 1 - bolt/include/bolt/Core/DebugData.h | 3 - bolt/include/bolt/Passes/AllocCombiner.h | 2 - bolt/include/bolt/Rewrite/DWARFRewriter.h | 3 +- .../RuntimeLibs/InstrumentationRuntimeLibrary.h | 1 + bolt/lib/Core/BinaryFunction.cpp | 5 +- bolt/lib/Core/DebugData.cpp | 7 +- bolt/lib/Core/JumpTable.cpp | 1 - bolt/lib/Passes/IndirectCallPromotion.cpp | 24 +- bolt/lib/Passes/ThreeWayBranch.cpp | 2 - bolt/lib/Profile/YAMLProfileWriter.cpp | 2 +- bolt/lib/Rewrite/DWARFRewriter.cpp | 4 +- bolt/lib/Rewrite/MachORewriteInstance.cpp | 2 - bolt/lib/Rewrite/RewriteInstance.cpp | 2 - bolt/lib/Utils/Utils.cpp | 1 - bolt/test/X86/asm-func-debug.test | 2 +- bolt/test/X86/inline-debug-info.test | 2 +- bolt/test/X86/inlined-function-mixed.test | 2 +- bolt/test/keep-aranges.test | 2 +- bolt/test/non-empty-debug-line.test | 2 +- clang-tools-extra/CMakeLists.txt | 1 + clang-tools-extra/clang-doc/tool/CMakeLists.txt | 4 +- .../find-all-symbols/tool/CMakeLists.txt | 2 +- .../clang-include-fixer/tool/CMakeLists.txt | 4 +- clang-tools-extra/clang-tidy/CMakeLists.txt | 2 +- clang-tools-extra/clang-tidy/GlobList.cpp | 1 + .../abseil/DurationFactoryScaleCheck.cpp | 2 +- .../ProBoundsConstantArrayIndexCheck.cpp | 3 +- .../clang-tidy/performance/MoveConstArgCheck.cpp | 6 +- .../clang-tidy/readability/CMakeLists.txt | 2 + .../readability/ContainerContainsCheck.cpp | 144 + .../readability/ContainerContainsCheck.h | 40 + .../readability/DuplicateIncludeCheck.cpp | 116 + .../clang-tidy/readability/DuplicateIncludeCheck.h | 35 + .../readability/ReadabilityTidyModule.cpp | 6 + .../readability/SuspiciousCallArgumentCheck.cpp | 4 +- clang-tools-extra/clang-tidy/tool/CMakeLists.txt | 4 +- clang-tools-extra/clangd/AST.cpp | 2 +- clang-tools-extra/clangd/CodeComplete.cpp | 4 +- clang-tools-extra/clangd/CompileCommands.cpp | 17 +- clang-tools-extra/clangd/DumpAST.h | 1 + clang-tools-extra/clangd/ExpectedTypes.cpp | 2 +- clang-tools-extra/clangd/FindSymbols.cpp | 2 +- clang-tools-extra/clangd/HeaderSourceSwitch.cpp | 4 +- clang-tools-extra/clangd/HeuristicResolver.cpp | 5 +- clang-tools-extra/clangd/Hover.cpp | 4 +- clang-tools-extra/clangd/TUScheduler.cpp | 2 +- clang-tools-extra/clangd/index/IndexAction.cpp | 2 +- clang-tools-extra/clangd/index/SymbolCollector.cpp | 2 +- clang-tools-extra/clangd/index/dex/Iterator.cpp | 4 +- .../refactor/tweaks/AnnotateHighlightings.cpp | 2 +- .../clangd/refactor/tweaks/DefineInline.cpp | 4 +- .../clangd/refactor/tweaks/DumpAST.cpp | 2 +- .../clangd/refactor/tweaks/ExpandMacro.cpp | 2 +- clang-tools-extra/clangd/unittests/ClangdTests.cpp | 26 +- .../clangd/unittests/FileIndexTests.cpp | 2 +- clang-tools-extra/clangd/unittests/HoverTests.cpp | 2 +- .../clangd/unittests/TUSchedulerTests.cpp | 10 +- .../clangd/unittests/tweaks/DefineInlineTests.cpp | 44 +- clang-tools-extra/docs/ReleaseNotes.rst | 19 +- ...eguidelines-pro-bounds-constant-array-index.rst | 2 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 2 + .../checks/readability-container-contains.rst | 25 + .../checks/readability-duplicate-include.rst | 35 + clang-tools-extra/modularize/CMakeLists.txt | 2 +- .../readability-duplicate-include.h | 15 + .../readability-duplicate-include2.h | 1 + .../readability-duplicate-include/system/iostream | 1 + .../readability-duplicate-include/system/string.h | 1 + .../system/sys/types.h | 1 + .../readability-duplicate-include/system/types.h | 1 + ...s-pro-bounds-constant-array-index-gslheader.cpp | 6 +- ...eguidelines-pro-bounds-constant-array-index.cpp | 6 +- .../checkers/readability-container-contains.cpp | 230 ++ .../checkers/readability-duplicate-include.cpp | 72 + clang/CMakeLists.txt | 14 +- clang/cmake/caches/Fuchsia-stage2.cmake | 3 +- clang/cmake/modules/AddClang.cmake | 5 +- clang/cmake/modules/CMakeLists.txt | 4 +- clang/docs/JSONCompilationDatabase.rst | 4 + clang/docs/LibASTMatchersReference.html | 13 + clang/docs/ReleaseNotes.rst | 10 + clang/include/clang/AST/ASTContext.h | 1 - clang/include/clang/AST/DeclBase.h | 14 + clang/include/clang/AST/ExprObjC.h | 2 +- clang/include/clang/AST/FormatString.h | 3 +- clang/include/clang/ASTMatchers/ASTMatchers.h | 17 + clang/include/clang/Basic/BuiltinsX86.def | 72 - clang/include/clang/Basic/DiagnosticDriverKinds.td | 3 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 10 +- clang/include/clang/Basic/DirectoryEntry.h | 1 + clang/include/clang/Basic/riscv_vector.td | 8 +- clang/include/clang/Driver/ToolChain.h | 2 +- clang/include/clang/Sema/Sema.h | 2 + clang/include/clang/Tooling/ASTDiff/ASTDiff.h | 28 +- .../clang/Tooling/ASTDiff/ASTDiffInternal.h | 3 - clang/lib/AST/DeclBase.cpp | 9 + clang/lib/AST/Interp/PrimType.h | 50 +- clang/lib/AST/OSLog.cpp | 4 +- clang/lib/AST/PrintfFormatString.cpp | 2 +- clang/lib/ASTMatchers/Dynamic/Registry.cpp | 1 + .../FlowSensitive/TypeErasedDataflowAnalysis.cpp | 4 +- clang/lib/Basic/Targets/PPC.cpp | 39 +- clang/lib/Basic/Targets/RISCV.cpp | 2 +- clang/lib/Basic/Targets/Sparc.cpp | 2 - clang/lib/Basic/Targets/X86.h | 11 +- clang/lib/CodeGen/BackendUtil.cpp | 14 +- clang/lib/CodeGen/CGAtomic.cpp | 8 +- clang/lib/CodeGen/CGBuiltin.cpp | 103 - clang/lib/CodeGen/CGCall.cpp | 16 +- clang/lib/CodeGen/CGCall.h | 3 +- clang/lib/CodeGen/CGClass.cpp | 5 +- clang/lib/CodeGen/CGExprScalar.cpp | 5 +- clang/lib/CodeGen/CGObjCGNU.cpp | 15 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 19 +- clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp | 18 +- clang/lib/CodeGen/ItaniumCXXABI.cpp | 3 +- clang/lib/CodeGen/TargetInfo.cpp | 16 +- clang/lib/Driver/ToolChains/Linux.cpp | 6 + clang/lib/Driver/ToolChains/Linux.h | 1 + clang/lib/Driver/ToolChains/PPCLinux.cpp | 56 + clang/lib/Driver/ToolChains/PPCLinux.h | 7 +- clang/lib/Driver/ToolChains/WebAssembly.h | 1 + clang/lib/Format/AffectedRangeManager.cpp | 2 + clang/lib/Format/ContinuationIndenter.cpp | 9 +- clang/lib/Format/DefinitionBlockSeparator.cpp | 86 +- clang/lib/Format/DefinitionBlockSeparator.h | 2 +- clang/lib/Format/FormatToken.cpp | 1 + clang/lib/Format/FormatToken.h | 1 + clang/lib/Format/QualifierAlignmentFixer.cpp | 4 +- clang/lib/Format/SortJavaScriptImports.cpp | 1 + clang/lib/Format/TokenAnnotator.cpp | 29 +- clang/lib/Format/UnwrappedLineFormatter.cpp | 3 +- clang/lib/Format/UnwrappedLineParser.cpp | 3 + clang/lib/Frontend/FrontendActions.cpp | 95 +- clang/lib/Frontend/Rewrite/InclusionRewriter.cpp | 20 +- clang/lib/Headers/avx2intrin.h | 30 +- clang/lib/Headers/avx512bwintrin.h | 20 +- clang/lib/Headers/avx512fintrin.h | 72 +- clang/lib/Headers/avx512vlintrin.h | 20 +- clang/lib/Headers/cpuid.h | 2 +- clang/lib/Headers/emmintrin.h | 8 +- clang/lib/Headers/opencl-c-base.h | 1 + clang/lib/Headers/smmintrin.h | 16 +- clang/lib/Headers/tmmintrin.h | 6 +- clang/lib/Sema/OpenCLBuiltins.td | 164 +- clang/lib/Sema/SemaChecking.cpp | 72 +- clang/lib/Sema/SemaCodeComplete.cpp | 7 +- clang/lib/Sema/SemaDecl.cpp | 60 +- clang/lib/Sema/SemaDeclCXX.cpp | 2 +- clang/lib/Sema/SemaModule.cpp | 2 +- clang/lib/Sema/SemaTemplate.cpp | 2 +- clang/lib/Sema/SemaTemplateDeduction.cpp | 2 +- clang/runtime/CMakeLists.txt | 2 + clang/test/CXX/module/module.interface/p2-2.cpp | 37 + clang/test/CXX/module/module.interface/p6.cpp | 93 + clang/test/ClangScanDeps/modules-symlink.c | 1 + .../CodeGen/RISCV/riscv-attr-builtin-alias-err.c | 2 +- .../test/CodeGen/RISCV/riscv-attr-builtin-alias.c | 2 +- clang/test/CodeGen/RISCV/riscv-inline-asm-rvv.c | 4 +- clang/test/CodeGen/RISCV/riscv-v-debuginfo.c | 2 +- clang/test/CodeGen/RISCV/riscv-v-lifetime.cpp | 2 +- .../RISCV/rvb-intrinsics/riscv32-zbb-error.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vaadd.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vadc.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vadd.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vand.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vasub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vcompress.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vcpop.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vdiv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfabs.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfclass.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfcvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfdiv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfirst.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmerge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmin.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmul.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vfmv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfncvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfneg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrdiv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrec7.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfredmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfredmin.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrsqrt7.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfsgnj.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfslide1down.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfslide1up.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfsqrt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwcvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwnmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwnmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwsub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vget.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vid.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/viota.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vle.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vlmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vloxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vloxseg.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vlse.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vlseg.c | 4 +- .../RISCV/rvv-intrinsics-overloaded/vlsegff.c | 4 +- .../RISCV/rvv-intrinsics-overloaded/vlsseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vluxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vluxseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmadc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmand.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmerge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfeq.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfgt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfle.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmflt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfne.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmin.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmmv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmnand.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmnor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmnot.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsbc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsbf.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmseq.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsgt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsif.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsle.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmslt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsne.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsof.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmul.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmxnor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmxor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnclip.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vncvt.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vneg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnmsub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vnot.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnsra.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnsrl.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredand.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredmin.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredxor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vreinterpret.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vrem.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vrgather.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vrsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsadd.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsbc.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vse.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vset.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsext.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslide1down.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslide1up.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslidedown.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslideup.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsll.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsoxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsoxseg.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsra.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsrl.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsse.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssra.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssrl.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsuxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsuxseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwcvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwsub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vxor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vzext.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/rvv-error.c | 18 + clang/test/CodeGen/RISCV/rvv-intrinsics/vaadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vadc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vasub.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vcompress.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vcpop.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vdiv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfabs.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfclass.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfcvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfdiv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfirst.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmerge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfncvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfneg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrdiv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrec7.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfredmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfredmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrsqrt7.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfsgnj.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics/vfslide1down.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vfslide1up.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfsqrt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwcvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwnmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwnmsac.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vfwredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vget.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vid.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/viota.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vle.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vleff.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vloxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vloxseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlse.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlseg.c | 4 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlsegff.c | 4 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlsseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vluxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vluxseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmadc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmclr.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmerge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfeq.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfgt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfle.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmflt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfne.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmmv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmnand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmnor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmnot.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsbc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsbf.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmseq.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmset.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsgt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsif.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsle.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmslt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsne.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsof.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmxnor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmxor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnclip.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vncvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vneg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnmsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnot.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnsra.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnsrl.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredxor.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics/vreinterpret.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vrem.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vrgather.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vrsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsbc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vse.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vset.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsetvl.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vsetvlmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsext.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics/vslide1down.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vslide1up.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vslidedown.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vslideup.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsll.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsoxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsoxseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsra.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsrl.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsse.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssra.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssrl.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsuxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsuxseg.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vundefined.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwcvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vxor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vzext.c | 2 +- clang/test/CodeGen/RISCV/rvv_errors.c | 2 +- clang/test/CodeGen/builtins-x86.c | 15 - clang/test/CodeGen/debug-info-extern-call.c | 4 +- clang/test/CodeGen/dwarf-version.c | 8 +- clang/test/CodeGen/target-data.c | 2 +- .../lib/gcc/powerpc64le-linux-gnu/11.2.0}/.keep | 0 clang/test/Driver/cl-options.c | 2 +- clang/test/Driver/clang-g-opts.c | 2 +- clang/test/Driver/debug-options.c | 7 + clang/test/Driver/ppc-float-abi-warning.cpp | 13 + clang/test/Driver/riscv-arch.c | 41 +- clang/test/Driver/ve-toolchain.c | 2 +- clang/test/Driver/ve-toolchain.cpp | 2 +- clang/test/Driver/wasm-toolchain.cpp | 10 +- clang/test/FixIt/format.m | 16 +- clang/test/Headers/riscv-vector-header.c | 2 +- clang/test/InterfaceStubs/object.c | 3 +- clang/test/Misc/ppc-inline-asm-clobber-warning.c | 38 + clang/test/Modules/cxx20-export-import.cpp | 3 + clang/test/OpenMP/declare_mapper_codegen.cpp | 24 +- clang/test/Preprocessor/predefined-arch-macros.c | 4 +- clang/test/Preprocessor/riscv-target-features.c | 34 +- clang/test/Sema/format-strings.c | 84 +- clang/test/Sema/riscv-types.c | 2 +- clang/test/SemaOpenCL/fdeclare-opencl-builtins.cl | 1 + .../test/Templight/templight-empty-entries-fix.cpp | 333 ++ clang/tools/c-index-test/CMakeLists.txt | 2 +- clang/tools/clang-format/CMakeLists.txt | 12 +- clang/tools/clang-nvlink-wrapper/CMakeLists.txt | 2 +- clang/tools/clang-rename/CMakeLists.txt | 4 +- clang/tools/diagtool/DiagTool.cpp | 1 + clang/tools/libclang/CMakeLists.txt | 2 +- clang/tools/scan-build-py/CMakeLists.txt | 6 +- clang/tools/scan-build/CMakeLists.txt | 6 +- clang/tools/scan-view/CMakeLists.txt | 4 +- .../ASTMatchers/ASTMatchersNarrowingTest.cpp | 19 + .../Format/DefinitionBlockSeparatorTest.cpp | 117 +- clang/unittests/Format/FormatTest.cpp | 2 + clang/utils/TableGen/RISCVVEmitter.cpp | 90 +- clang/utils/hmaptool/CMakeLists.txt | 2 +- cmake/Modules/CheckLinkerFlag.cmake | 17 + compiler-rt/CMakeLists.txt | 17 +- compiler-rt/cmake/config-ix.cmake | 20 +- .../lib/tsan/rtl/tsan_interceptors_posix.cpp | 2 + .../profile/Linux/instrprof-debug-info-correlate.c | 2 +- compiler-rt/test/tsan/vfork.cpp | 2 + flang/examples/CMakeLists.txt | 2 +- flang/examples/FlangOmpReport/CMakeLists.txt | 9 + flang/examples/FlangOmpReport/FlangOmpReport.cpp | 75 + .../FlangOmpReport/FlangOmpReportVisitor.cpp | 229 ++ .../FlangOmpReportVisitor.h} | 0 .../requirements.txt | 0 .../yaml_summarizer.py | 0 .../PrintFlangFunctionNames/CMakeLists.txt | 7 +- .../flang-omp-report-plugin/CMakeLists.txt | 6 - .../flang-omp-report-visitor.cpp | 229 -- .../flang-omp-report-plugin/flang-omp-report.cpp | 75 - flang/include/flang/Optimizer/Dialect/FIROps.td | 2 +- flang/include/flang/Optimizer/Transforms/Passes.h | 2 + flang/include/flang/Tools/CLOptions.inc | 8 + flang/lib/Frontend/CompilerInvocation.cpp | 1 + .../lib/Optimizer/Transforms/MemoryAllocation.cpp | 39 +- flang/lib/Semantics/check-omp-structure.cpp | 154 +- flang/lib/Semantics/check-omp-structure.h | 6 + flang/lib/Semantics/runtime-type-info.cpp | 2 +- flang/runtime/descriptor-io.cpp | 2 +- flang/runtime/descriptor-io.h | 1 + flang/runtime/edit-input.cpp | 10 +- flang/runtime/format-implementation.h | 137 +- flang/runtime/format.h | 14 +- flang/runtime/io-api.cpp | 51 +- flang/runtime/io-error.cpp | 8 +- flang/runtime/io-stmt.cpp | 5 +- flang/runtime/io-stmt.h | 12 +- flang/runtime/namelist.cpp | 17 +- flang/runtime/unit.h | 2 +- flang/test/Fir/convert-to-llvm.fir | 18 +- flang/test/Semantics/omp-atomic01.f90 | 48 +- flang/test/Semantics/omp-atomic02.f90 | 109 + flang/test/Semantics/omp-atomic03.f90 | 93 + flang/test/Semantics/omp-atomic04.f90 | 168 + flang/test/Semantics/omp-atomic05.f90 | 26 + flang/tools/tco/CMakeLists.txt | 7 +- flang/tools/tco/tco.cpp | 1 - flang/unittests/Runtime/Namelist.cpp | 31 + libc/config/linux/api.td | 227 +- libc/config/public_api.td | 7 +- libc/utils/HdrGen/PrototypeTestGen/CMakeLists.txt | 2 +- libc/utils/HdrGen/PublicAPICommand.cpp | 21 +- libc/utils/LibcTableGenUtil/APIIndexer.cpp | 6 +- libc/utils/LibcTableGenUtil/APIIndexer.h | 2 +- libc/utils/tools/WrapperGen/CMakeLists.txt | 2 +- libcxx/benchmarks/filesystem.bench.cpp | 4 +- libcxx/benchmarks/formatter_float.bench.cpp | 241 ++ libcxx/cmake/config-ix.cmake | 4 +- libcxx/docs/DesignDocs/UniquePtrTrivialAbi.rst | 2 +- libcxx/docs/ReleaseNotes.rst | 23 +- libcxx/docs/Status/Cxx20.rst | 1 + libcxx/docs/Status/Cxx20Issues.csv | 8 +- libcxx/docs/Status/Cxx20Papers.csv | 4 +- libcxx/docs/Status/Cxx2bIssues.csv | 16 +- libcxx/docs/Status/FormatIssues.csv | 2 +- libcxx/include/CMakeLists.txt | 2 + libcxx/include/__config | 2 + libcxx/include/__format/format_arg.h | 44 +- libcxx/include/__format/formatter.h | 58 +- libcxx/include/__format/formatter_bool.h | 2 +- libcxx/include/__format/formatter_floating_point.h | 717 ++++ libcxx/include/__format/formatter_integer.h | 24 +- libcxx/include/__format/formatter_integral.h | 2 +- libcxx/include/__format/formatter_pointer.h | 91 + libcxx/include/__format/formatter_string.h | 10 +- libcxx/include/__format/parser_std_format_spec.h | 261 +- libcxx/include/__hash_table | 40 +- libcxx/include/__iterator/common_iterator.h | 67 +- libcxx/include/__iterator/readable_traits.h | 10 +- libcxx/include/__locale | 4 +- libcxx/include/__random/seed_seq.h | 31 +- libcxx/include/__ranges/enable_view.h | 12 +- libcxx/include/__ranges/view_interface.h | 3 +- libcxx/include/format | 162 +- libcxx/include/module.modulemap | 30 +- libcxx/include/string | 96 +- libcxx/include/unordered_map | 21 +- libcxx/include/unordered_set | 15 +- libcxx/include/version | 2 +- libcxx/src/string.cpp | 2 + .../formatter_floating_point.module.verify.cpp | 15 + .../format/formatter_pointer.module.verify.cpp | 15 + .../basic.string/string.capacity/PR53170.pass.cpp | 79 + .../basic.string/string.capacity/reserve.pass.cpp | 50 - .../format.arg/visit_format_arg.pass.cpp | 6 + .../format.arguments/format.args/get.pass.cpp | 2 + .../std_format_spec_floating_point.pass.cpp | 353 ++ .../std_format_spec_pointer.pass.cpp | 254 ++ .../iterator.operators.addressof.compile.pass.cpp | 49 + .../assign_move.addressof.compile.pass.cpp | 42 + .../move.addressof.compile.pass.cpp | 33 + .../move_alloc.addressof.compile.pass.cpp | 36 + .../emplace_hint.addressof.compile.pass.cpp | 30 + .../erase_const_iter.addressof.compile.pass.cpp | 27 + .../erase_range.addressof.compile.pass.cpp | 27 + ...rt_hint_const_lvalue.addressof.compile.pass.cpp | 28 + ...tructible_value_type.addressof.compile.pass.cpp | 28 + ...rt_rvalue_value_type.addressof.compile.pass.cpp | 28 + .../try_emplace_hint.addressof.compile.pass.cpp | 40 + .../unord.map.swap/swap.addressof.compile.pass.cpp | 29 + .../move.addressof.compile.pass.cpp | 33 + .../move_alloc.addressof.compile.pass.cpp | 36 + .../emplace_hint.addressof.compile.pass.cpp | 30 + .../move.addressof.compile.pass.cpp | 29 + .../move_alloc.addressof.compile.pass.cpp | 33 + .../emplace_hint.addressof.compile.pass.cpp | 30 + ...rt_hint_const_lvalue.addressof.compile.pass.cpp | 28 + .../insert_hint_rvalue.addressof.compile.pass.cpp | 27 + .../iterator.operators.addressof.compile.pass.cpp | 47 + .../move.addressof.compile.pass.cpp | 29 + .../move_alloc.addressof.compile.pass.cpp | 35 + .../directory_entry.cons/path.pass.cpp | 2 - .../directory_entry.mods/refresh.pass.cpp | 2 - .../directory_entry.mods/replace_filename.pass.cpp | 2 - .../directory_entry.obs/file_size.pass.cpp | 2 - .../directory_entry.obs/file_type_obs.pass.cpp | 2 - .../directory_entry.obs/hard_link_count.pass.cpp | 2 - .../directory_entry.obs/last_write_time.pass.cpp | 2 - .../directory_entry.obs/status.pass.cpp | 2 - .../directory_entry.obs/symlink_status.pass.cpp | 2 - .../directory_iterator.members/copy.pass.cpp | 2 - .../copy_assign.pass.cpp | 2 - .../directory_iterator.members/ctor.pass.cpp | 2 - .../directory_iterator.members/increment.pass.cpp | 2 - .../directory_iterator.members/move.pass.cpp | 2 - .../move_assign.pass.cpp | 2 - .../begin_end.pass.cpp | 2 - .../rec.dir.itr.members/copy.pass.cpp | 2 - .../rec.dir.itr.members/copy_assign.pass.cpp | 2 - .../rec.dir.itr.members/ctor.pass.cpp | 2 - .../rec.dir.itr.members/depth.pass.cpp | 2 - .../disable_recursion_pending.pass.cpp | 2 - .../rec.dir.itr.members/increment.pass.cpp | 2 - .../rec.dir.itr.members/move.pass.cpp | 2 - .../rec.dir.itr.members/move_assign.pass.cpp | 2 - .../rec.dir.itr.members/pop.pass.cpp | 2 - .../rec.dir.itr.members/recursion_pending.pass.cpp | 2 - .../rec.dir.itr.nonmembers/begin_end.pass.cpp | 2 - .../fs.op.funcs/fs.op.canonical/canonical.pass.cpp | 2 - .../fs.op.funcs/fs.op.copy/copy.pass.cpp | 2 - .../create_directories.pass.cpp | 2 - .../create_directory_with_attributes.pass.cpp | 2 - .../fs.op.current_path/current_path.pass.cpp | 2 - .../fs.op.equivalent/equivalent.pass.cpp | 2 - .../fs.op.funcs/fs.op.exists/exists.pass.cpp | 2 - .../fs.op.funcs/fs.op.file_size/file_size.pass.cpp | 2 - .../fs.op.hard_lk_ct/hard_link_count.pass.cpp | 2 - .../fs.op.is_block_file/is_block_file.pass.cpp | 2 - .../fs.op.is_char_file/is_character_file.pass.cpp | 2 - .../fs.op.is_directory/is_directory.pass.cpp | 2 - .../fs.op.funcs/fs.op.is_empty/is_empty.pass.cpp | 2 - .../fs.op.funcs/fs.op.is_fifo/is_fifo.pass.cpp | 2 - .../fs.op.funcs/fs.op.is_other/is_other.pass.cpp | 2 - .../fs.op.is_regular_file/is_regular_file.pass.cpp | 2 - .../fs.op.funcs/fs.op.is_socket/is_socket.pass.cpp | 2 - .../fs.op.is_symlink/is_symlink.pass.cpp | 2 - .../fs.op.read_symlink/read_symlink.pass.cpp | 2 - .../fs.op.funcs/fs.op.relative/relative.pass.cpp | 2 - .../fs.op.funcs/fs.op.rename/rename.pass.cpp | 2 - .../fs.op.resize_file/resize_file.pass.cpp | 2 - .../fs.op.funcs/fs.op.space/space.pass.cpp | 2 - .../fs.op.funcs/fs.op.status/status.pass.cpp | 2 - .../fs.op.symlink_status/symlink_status.pass.cpp | 2 - .../weakly_canonical.pass.cpp | 2 - .../iterators.common/constraints.compile.pass.cpp | 28 + .../iterators.common/ctor.converting.pass.cpp | 48 + .../iterators.common/ctor.default.pass.cpp | 41 + .../iterators.common/ctor.iter.pass.cpp | 50 + .../iterators.common/ctor.pass.cpp | 90 - .../iterators.common/ctor.sentinel.pass.cpp | 63 + .../iterators.common/iter_move.pass.cpp | 74 +- .../iterators.common/iter_swap.pass.cpp | 121 +- .../predef.iterators/iterators.common/types.h | 26 - .../move.iter.op=/move_iterator.pass.cpp | 4 +- .../reverse.iter.cmp/three-way.pass.cpp | 4 + .../reverse.iter.cons/assign.pass.cpp | 2 + .../support.limits.general/memory.version.pass.cpp | 39 - .../cpo.compile.pass.cpp | 3 + .../niebloid.compile.pass.cpp | 1 + .../rand.util/rand.util.seedseq/default.pass.cpp | 3 + .../rand.util/rand.util.seedseq/iterator.pass.cpp | 42 +- .../rand.util.seedseq/iterator.verify.cpp | 30 + .../range.all/range.owning.view/begin_end.pass.cpp | 8 +- .../range.transform/iterator/plus_minus.pass.cpp | 4 +- .../range.view/enable_view.compile.pass.cpp | 65 +- .../view.interface/view.interface.pass.cpp | 9 + .../string.iterators/iterators.pass.cpp | 1 - .../utilities/charconv/charconv.msvc/test.pass.cpp | 5 + .../format.arg.store/class.pass.cpp | 2 + .../format.arg.store/make_format_args.sh.cpp | 2 + .../format.arg/operator_bool.pass.cpp | 2 + .../format.arguments/format.args/ctor.pass.cpp | 2 + .../format.context/format.context/arg.pass.cpp | 2 + .../format.context/format.context/ctor.pass.cpp | 2 + .../format.context/format.context/locale.pass.cpp | 2 + .../format.formatter.spec/formatter.char.pass.cpp | 2 + .../formatter.floating_point.pass.cpp | 418 ++- .../formatter.handle.pass.cpp | 76 + .../formatter.pointer.pass.cpp | 107 + .../formatter.signed_integral.pass.cpp | 2 + .../formatter.unsigned_integral.pass.cpp | 2 + .../format.formatter.spec/types.compile.pass.cpp | 370 +++ .../format.parse.ctx/advance_to.pass.cpp | 4 +- .../format/format.functions/format_tests.h | 1665 +++++++++- .../format.functions/locale-specific_form.pass.cpp | 1717 ++++++++++ .../ranges_uninitialized_copy.pass.cpp | 10 +- .../ranges_uninitialized_copy_n.pass.cpp | 4 +- .../ranges_uninitialized_move.pass.cpp | 10 +- .../ranges_uninitialized_move_n.pass.cpp | 4 +- libcxx/test/support/filesystem_test_helper.h | 6 + libcxx/test/support/test_iterators.h | 32 - libcxx/utils/ci/buildkite-pipeline.yml | 467 ++- .../generate_feature_test_macro_components.py | 2 +- libcxxabi/src/demangle/ItaniumDemangle.h | 85 +- libcxxabi/src/demangle/StringView.h | 14 +- libcxxabi/src/demangle/Utility.h | 9 +- libcxxabi/src/demangle/cp-to-llvm.sh | 14 +- libcxxabi/test/test_demangle.pass.cpp | 2 + libunwind/cmake/config-ix.cmake | 8 +- lld/ELF/Relocations.cpp | 5 +- lld/ELF/Relocations.h | 1 + lld/test/ELF/aarch64-combined-dynrel-ifunc.s | 5 +- lld/test/ELF/aarch64-combined-dynrel.s | 3 +- lld/test/ELF/aarch64-thunk-reuse.s | 49 + lld/test/ELF/arm-thunk-reuse.s | 52 + .../python/scripted_process/scripted_process.py | 20 +- lldb/include/lldb/Interpreter/ScriptedInterface.h | 9 +- .../lldb/Interpreter/ScriptedProcessInterface.h | 12 +- lldb/include/lldb/Target/Statistics.h | 6 + lldb/include/lldb/Target/Thread.h | 2 +- lldb/include/lldb/Utility/ConstString.h | 10 + lldb/include/lldb/Utility/Log.h | 55 +- lldb/include/lldb/Utility/Logging.h | 116 +- lldb/include/lldb/Utility/UserIDResolver.h | 1 + lldb/packages/Python/lldbsuite/test/dotest.py | 2 +- lldb/source/Commands/CommandCompletions.cpp | 2 +- lldb/source/Commands/CommandObjectBreakpoint.cpp | 56 +- .../Commands/CommandObjectBreakpointCommand.cpp | 9 +- lldb/source/Commands/CommandObjectCommands.cpp | 34 +- lldb/source/Commands/CommandObjectDisassemble.cpp | 3 +- lldb/source/Commands/CommandObjectExpression.cpp | 6 +- lldb/source/Commands/CommandObjectFrame.cpp | 18 +- lldb/source/Commands/CommandObjectHelp.cpp | 3 +- lldb/source/Commands/CommandObjectHelp.h | 2 +- lldb/source/Commands/CommandObjectLog.cpp | 5 +- lldb/source/Commands/CommandObjectMemory.cpp | 31 +- lldb/source/Commands/CommandObjectMemoryTag.cpp | 5 +- lldb/source/Commands/CommandObjectPlatform.cpp | 36 +- lldb/source/Commands/CommandObjectProcess.cpp | 45 +- lldb/source/Commands/CommandObjectRegexCommand.cpp | 2 +- lldb/source/Commands/CommandObjectRegister.cpp | 6 +- lldb/source/Commands/CommandObjectReproducer.cpp | 6 +- lldb/source/Commands/CommandObjectScript.h | 2 +- lldb/source/Commands/CommandObjectSession.cpp | 6 +- lldb/source/Commands/CommandObjectSettings.cpp | 15 +- lldb/source/Commands/CommandObjectSource.cpp | 12 +- lldb/source/Commands/CommandObjectStats.cpp | 2 +- lldb/source/Commands/CommandObjectTarget.cpp | 50 +- lldb/source/Commands/CommandObjectThread.cpp | 43 +- lldb/source/Commands/CommandObjectTrace.cpp | 15 +- lldb/source/Commands/CommandObjectType.cpp | 44 +- lldb/source/Commands/CommandObjectWatchpoint.cpp | 26 +- .../Commands/CommandObjectWatchpointCommand.cpp | 5 +- lldb/source/Commands/CommandOptionsProcessLaunch.h | 2 +- lldb/source/Host/common/Terminal.cpp | 2 +- .../ExpressionParser/Clang/CxxModuleHandler.cpp | 2 +- .../Plugins/Language/CPlusPlus/GenericBitset.cpp | 1 + .../Platform/MacOSX/PlatformDarwinKernel.cpp | 9 +- .../Plugins/Process/POSIX/ProcessPOSIXLog.cpp | 20 +- .../source/Plugins/Process/POSIX/ProcessPOSIXLog.h | 40 +- .../Process/Windows/Common/ProcessWindowsLog.cpp | 22 +- .../Process/Windows/Common/ProcessWindowsLog.h | 37 +- .../GDBRemoteCommunicationServerLLGS.cpp | 2 +- .../Process/gdb-remote/ProcessGDBRemote.cpp | 5 +- .../Process/gdb-remote/ProcessGDBRemoteLog.cpp | 28 +- .../Process/gdb-remote/ProcessGDBRemoteLog.h | 55 +- .../Plugins/Process/gdb-remote/ThreadGDBRemote.cpp | 8 +- .../Plugins/Process/scripted/ScriptedProcess.cpp | 70 +- .../Plugins/Process/scripted/ScriptedThread.cpp | 91 +- .../Plugins/Process/scripted/ScriptedThread.h | 12 +- .../ScriptInterpreter/Python/PythonDataObjects.cpp | 6 +- .../Python/ScriptedProcessPythonInterface.cpp | 24 +- .../Python/ScriptedProcessPythonInterface.h | 7 +- .../Python/ScriptedThreadPythonInterface.cpp | 17 +- .../Python/ScriptedThreadPythonInterface.h | 3 +- .../Plugins/SymbolFile/DWARF/LogChannelDWARF.cpp | 18 +- .../Plugins/SymbolFile/DWARF/LogChannelDWARF.h | 33 +- .../Plugins/SymbolFile/NativePDB/PdbAstBuilder.cpp | 4 +- lldb/source/Target/Statistics.cpp | 14 + lldb/source/Utility/ConstString.cpp | 15 + lldb/source/Utility/Log.cpp | 4 +- lldb/source/Utility/Logging.cpp | 97 +- lldb/source/Utility/Timer.cpp | 4 +- .../command/nested_alias/TestNestedAlias.py | 7 + .../API/commands/statistics/basic/TestStats.py | 45 + .../basic_entry_values/TestBasicEntryValues.py | 2 +- .../API/functionalities/scripted_process/Makefile | 4 +- .../scripted_process/TestScriptedProcess.py | 20 +- .../scripted_process/dummy_scripted_process.py | 1 + .../scripted_process/invalid_scripted_process.py | 3 +- .../API/functionalities/scripted_process/main.c | 8 - .../API/functionalities/scripted_process/main.cpp | 34 + .../stack_core_scripted_process.py | 71 +- .../TestUnambiguousTailCalls.py | 2 +- .../Makefile | 0 .../TestAArch64LinuxTaggedMemoryAccess.py | 83 + .../API/linux/aarch64/tagged_memory_access/main.c | 19 + .../TestAArch64LinuxTaggedMemoryRead.py | 55 - .../API/linux/aarch64/tagged_memory_read/main.c | 15 - .../DWARF/x86/debug-types-dwo-cross-reference.cpp | 4 +- lldb/tools/lldb-server/lldb-gdbserver.cpp | 1 + lldb/tools/lldb-vscode/FifoFiles.h | 2 + .../TestingSupport/MockTildeExpressionResolver.cpp | 1 + lldb/unittests/Utility/LogTest.cpp | 60 +- llvm/.gitattributes | 2 + llvm/cmake/modules/AddLLVM.cmake | 1 + llvm/cmake/modules/CrossCompile.cmake | 2 + llvm/cmake/modules/HandleLLVMOptions.cmake | 21 +- llvm/cmake/modules/LLVMCheckLinkerFlag.cmake | 12 +- llvm/cmake/modules/LLVMExternalProjectUtils.cmake | 2 + llvm/docs/AMDGPUUsage.rst | 14 +- llvm/docs/LangRef.rst | 42 +- llvm/docs/ProgrammersManual.rst | 18 +- llvm/docs/Reference.rst | 1 + llvm/docs/ReleaseNotes.rst | 11 +- llvm/docs/Security.rst | 2 + llvm/docs/SecurityTransparencyReports.rst | 44 + llvm/docs/TestingGuide.rst | 2 +- llvm/include/llvm-c/Core.h | 9 +- llvm/include/llvm/ADT/CoalescingBitVector.h | 1 + llvm/include/llvm/ADT/CombinationGenerator.h | 2 +- llvm/include/llvm/ADT/STLExtras.h | 61 +- llvm/include/llvm/ADT/STLFunctionalExtras.h | 76 + llvm/include/llvm/ADT/SmallSet.h | 1 + llvm/include/llvm/ADT/SparseMultiSet.h | 2 +- llvm/include/llvm/ADT/SparseSet.h | 2 +- llvm/include/llvm/ADT/StringMap.h | 1 + llvm/include/llvm/ADT/StringMapEntry.h | 2 + llvm/include/llvm/ADT/StringRef.h | 30 +- llvm/include/llvm/ADT/StringSwitch.h | 1 + llvm/include/llvm/ADT/identity.h | 34 + .../include/llvm/Analysis/AliasAnalysisEvaluator.h | 16 +- llvm/include/llvm/Analysis/DependenceAnalysis.h | 17 +- llvm/include/llvm/Analysis/DivergenceAnalysis.h | 2 +- .../include/llvm/Analysis/IRSimilarityIdentifier.h | 2 +- llvm/include/llvm/Analysis/InstructionSimplify.h | 2 +- .../include/llvm/Analysis/LazyBlockFrequencyInfo.h | 11 +- .../llvm/Analysis/LazyBranchProbabilityInfo.h | 4 +- llvm/include/llvm/Analysis/LoopAccessAnalysis.h | 33 +- llvm/include/llvm/Analysis/LoopAnalysisManager.h | 4 +- llvm/include/llvm/Analysis/MemorySSA.h | 4 +- .../include/llvm/Analysis/NoInferenceModelRunner.h | 2 +- llvm/include/llvm/Analysis/ObjCARCInstKind.h | 2 +- llvm/include/llvm/Analysis/ObjCARCUtil.h | 6 +- llvm/include/llvm/Analysis/PHITransAddr.h | 4 +- .../include/llvm/Analysis/ReleaseModeModelRunner.h | 6 + llvm/include/llvm/Analysis/ScalarEvolution.h | 9 + llvm/include/llvm/Analysis/TargetTransformInfo.h | 10 +- .../include/llvm/CodeGen/GlobalISel/CallLowering.h | 14 +- .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 25 +- llvm/include/llvm/Debuginfod/Debuginfod.h | 2 + llvm/include/llvm/Debuginfod/HTTPClient.h | 2 + llvm/include/llvm/Demangle/ItaniumDemangle.h | 84 +- llvm/include/llvm/Demangle/StringView.h | 2 + llvm/include/llvm/Demangle/Utility.h | 2 + .../llvm/ExecutionEngine/JITLink/MemoryFlags.h | 1 + llvm/include/llvm/ExecutionEngine/JITLink/riscv.h | 32 +- llvm/include/llvm/FuzzMutate/OpDescriptor.h | 2 +- llvm/include/llvm/IR/DerivedTypes.h | 4 +- llvm/include/llvm/IR/IRBuilder.h | 3 +- llvm/include/llvm/IR/InstrTypes.h | 8 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 16 + llvm/include/llvm/IR/LLVMContext.h | 1 + llvm/include/llvm/IR/MatrixBuilder.h | 2 +- llvm/include/llvm/IR/Statepoint.h | 2 +- llvm/include/llvm/IR/Type.h | 9 + llvm/include/llvm/MC/SubtargetFeature.h | 1 + llvm/include/llvm/ProfileData/MemProfData.inc | 4 +- llvm/include/llvm/Support/CrashRecoveryContext.h | 2 +- llvm/include/llvm/Support/Duration.h | 28 + llvm/include/llvm/Support/JSON.h | 1 + llvm/include/llvm/Support/Parallel.h | 80 +- llvm/include/llvm/Support/TargetOpcodes.def | 3 +- llvm/include/llvm/Support/TimeProfiler.h | 1 + llvm/include/llvm/Support/Timer.h | 1 + llvm/include/llvm/Support/VirtualFileSystem.h | 1 + llvm/include/llvm/Support/raw_ostream.h | 5 +- llvm/include/llvm/Target/GenericOpcodes.td | 7 + llvm/include/llvm/Testing/Support/Annotations.h | 2 + llvm/include/llvm/Transforms/Utils/Evaluator.h | 2 +- llvm/lib/Analysis/AliasAnalysisEvaluator.cpp | 6 +- llvm/lib/Analysis/BasicAliasAnalysis.cpp | 4 +- llvm/lib/Analysis/CaptureTracking.cpp | 12 +- llvm/lib/Analysis/ConstantFolding.cpp | 6 +- llvm/lib/Analysis/CostModel.cpp | 6 +- llvm/lib/Analysis/DivergenceAnalysis.cpp | 2 +- llvm/lib/Analysis/IRSimilarityIdentifier.cpp | 2 +- llvm/lib/Analysis/IVDescriptors.cpp | 5 +- llvm/lib/Analysis/InlineCost.cpp | 7 +- llvm/lib/Analysis/LoopAccessAnalysis.cpp | 10 +- llvm/lib/Analysis/LoopInfo.cpp | 5 +- llvm/lib/Analysis/MLInlineAdvisor.cpp | 9 +- llvm/lib/Analysis/MemorySSA.cpp | 4 +- llvm/lib/Analysis/ObjCARCInstKind.cpp | 28 +- llvm/lib/Analysis/ReplayInlineAdvisor.cpp | 3 +- llvm/lib/Analysis/ScalarEvolution.cpp | 52 +- llvm/lib/Analysis/ValueTracking.cpp | 4 +- llvm/lib/AsmParser/LLParser.cpp | 22 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 60 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 2 +- llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 11 +- llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h | 3 + llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 12 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 3 + llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 24 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 16 +- llvm/lib/CodeGen/GlobalISel/CallLowering.cpp | 38 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 47 +- llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 17 + llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp | 10 +- llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 12 - llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp | 3 +- .../CodeGen/LiveDebugValues/LiveDebugValues.cpp | 7 +- llvm/lib/CodeGen/MLRegallocEvictAdvisor.cpp | 22 +- llvm/lib/CodeGen/NonRelocatableStringpool.cpp | 1 + llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 98 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 10 +- .../CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp | 2 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 270 +- .../CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 7 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 37 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 19 +- .../ExecutionEngine/JITLink/ELFLinkGraphBuilder.h | 12 +- llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp | 43 + llvm/lib/ExecutionEngine/JITLink/riscv.cpp | 10 + llvm/lib/FuzzMutate/Operations.cpp | 2 +- llvm/lib/FuzzMutate/RandomIRBuilder.cpp | 10 +- llvm/lib/IR/AsmWriter.cpp | 2 +- llvm/lib/IR/AutoUpgrade.cpp | 33 +- llvm/lib/IR/ConstantFold.cpp | 16 +- llvm/lib/IR/Constants.cpp | 9 +- llvm/lib/IR/Core.cpp | 38 +- llvm/lib/IR/Function.cpp | 10 +- llvm/lib/IR/IRBuilder.cpp | 13 +- llvm/lib/IR/Verifier.cpp | 24 +- llvm/lib/Object/Archive.cpp | 1 - llvm/lib/Support/CommandLine.cpp | 2 +- llvm/lib/Support/Parallel.cpp | 32 + llvm/lib/Support/RISCVISAInfo.cpp | 53 +- llvm/lib/Support/StringRef.cpp | 8 + llvm/lib/Support/ThreadPool.cpp | 1 + llvm/lib/Support/TimeProfiler.cpp | 2 +- llvm/lib/Support/raw_ostream.cpp | 5 +- llvm/lib/Target/AArch64/AArch64.td | 13 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 20 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 2 + llvm/lib/Target/AArch64/AArch64InstrAtomics.td | 60 + llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp | 204 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 4 + llvm/lib/Target/AArch64/AArch64Subtarget.cpp | 5 - llvm/lib/Target/AArch64/AArch64Subtarget.h | 5 +- .../Target/AArch64/GISel/AArch64CallLowering.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 1 + .../Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 7 + .../Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 62 +- llvm/lib/Target/AMDGPU/AMDGPULibFunc.h | 1 + .../Target/AMDGPU/AMDGPURewriteOutArguments.cpp | 2 +- llvm/lib/Target/AMDGPU/MIMGInstructions.td | 58 + llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 3 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 156 +- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 4 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 5 - llvm/lib/Target/AMDGPU/SIInstructions.td | 40 + llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 8 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 1 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 8 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 8 +- llvm/lib/Target/AVR/AVRISelLowering.cpp | 14 + llvm/lib/Target/AVR/AVRISelLowering.h | 2 + llvm/lib/Target/AVR/AVRInstrInfo.td | 6 +- llvm/lib/Target/AVR/AVRRegisterInfo.td | 20 - llvm/lib/Target/BPF/BTFDebug.cpp | 3 +- llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp | 4 +- llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp | 2 +- llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 4 +- llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp | 7 +- llvm/lib/Target/NVPTX/NVPTXImageOptimizer.cpp | 13 +- llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp | 9 +- llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp | 2 +- llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 12 + llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 4 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 5 +- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 8 +- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 12 + llvm/lib/Target/PowerPC/PPCRegisterInfo.h | 2 + llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 21 +- llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp | 12 +- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 13 + llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h | 1 + llvm/lib/Target/RISCV/RISCV.td | 132 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 121 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h | 2 + llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 56 +- llvm/lib/Target/RISCV/RISCVISelLowering.h | 4 + llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 5 +- llvm/lib/Target/RISCV/RISCVInstrInfo.td | 1 + llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 99 +- llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td | 16 +- llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td | 93 +- llvm/lib/Target/RISCV/RISCVInstrInfoZb.td | 68 +- llvm/lib/Target/RISCV/RISCVInstrInfoZk.td | 123 + llvm/lib/Target/RISCV/RISCVSchedRocket.td | 5 +- llvm/lib/Target/RISCV/RISCVSchedSiFive7.td | 5 +- llvm/lib/Target/RISCV/RISCVSubtarget.h | 36 +- llvm/lib/Target/RISCV/RISCVSystemOperands.td | 6 + llvm/lib/Target/Sparc/SparcISelLowering.cpp | 2 +- llvm/lib/Target/SystemZ/SystemZ.h | 10 + llvm/lib/Target/SystemZ/SystemZCopyPhysRegs.cpp | 10 +- llvm/lib/Target/SystemZ/SystemZElimCompare.cpp | 12 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 6 +- llvm/lib/Target/SystemZ/SystemZLDCleanup.cpp | 12 +- llvm/lib/Target/SystemZ/SystemZLongBranch.cpp | 12 +- llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp | 18 +- llvm/lib/Target/SystemZ/SystemZShortenInst.cpp | 17 +- llvm/lib/Target/SystemZ/SystemZTDC.cpp | 4 - llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp | 8 + llvm/lib/Target/VE/LVLGen.cpp | 4 +- llvm/lib/Target/VE/VEMCInstLower.cpp | 3 +- .../Target/X86/MCTargetDesc/X86MCTargetDesc.cpp | 13 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 102 +- llvm/lib/Target/X86/X86PadShortFunction.cpp | 7 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 2 +- llvm/lib/Transforms/Coroutines/CoroFrame.cpp | 4 +- llvm/lib/Transforms/Coroutines/Coroutines.cpp | 4 +- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 7 +- llvm/lib/Transforms/IPO/AttributorAttributes.cpp | 75 +- llvm/lib/Transforms/IPO/OpenMPOpt.cpp | 59 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 12 + .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 9 + .../Transforms/InstCombine/InstCombineCalls.cpp | 40 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 10 +- .../Transforms/InstCombine/InstCombineInternal.h | 10 + .../InstCombine/InstCombineLoadStoreAlloca.cpp | 3 +- .../InstCombine/InstCombineMulDivRem.cpp | 18 + .../Transforms/InstCombine/InstCombineSelect.cpp | 6 +- .../Transforms/InstCombine/InstCombineShifts.cpp | 3 + .../InstCombine/InstructionCombining.cpp | 70 +- .../Instrumentation/AddressSanitizer.cpp | 5 +- .../Instrumentation/HWAddressSanitizer.cpp | 17 +- .../lib/Transforms/Instrumentation/MemProfiler.cpp | 28 +- .../Instrumentation/SanitizerCoverage.cpp | 2 +- .../lib/Transforms/ObjCARC/ARCRuntimeEntryPoints.h | 10 +- llvm/lib/Transforms/ObjCARC/DependencyAnalysis.cpp | 3 - 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llvm/test/Analysis/BasicAA/deoptimize.ll | 41 +- llvm/test/Analysis/CostModel/AMDGPU/add-sub.ll | 4 +- llvm/test/Analysis/CostModel/AMDGPU/arith-ssat.ll | 32 +- llvm/test/Analysis/CostModel/AMDGPU/arith-usat.ll | 32 +- llvm/test/Analysis/CostModel/AMDGPU/cast.ll | 76 +- llvm/test/Analysis/CostModel/AMDGPU/fadd.ll | 4 +- llvm/test/Analysis/CostModel/AMDGPU/fdiv.ll | 8 +- llvm/test/Analysis/CostModel/AMDGPU/fma.ll | 92 +- llvm/test/Analysis/CostModel/AMDGPU/fmul.ll | 4 +- llvm/test/Analysis/CostModel/AMDGPU/fptosi.ll | 12 +- llvm/test/Analysis/CostModel/AMDGPU/fptoui.ll | 12 +- llvm/test/Analysis/CostModel/AMDGPU/fsub.ll | 4 +- llvm/test/Analysis/CostModel/AMDGPU/mul.ll | 20 +- .../CostModel/RISCV/fixed-vector-gather.ll | 2 +- .../CostModel/RISCV/fixed-vector-scatter.ll | 2 +- llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll | 2 +- llvm/test/Bitcode/upgrade-datalayout3.ll | 2 +- llvm/test/Bitcode/upgrade-datalayout4.ll | 8 + .../CodeGen/AArch64/GlobalISel/assert-align.ll | 28 + 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.../PowerPC/xray-attribute-instrumentation.ll | 5 +- .../CodeGen/PowerPC/xray-conditional-return.ll | 2 +- .../test/CodeGen/PowerPC/xray-ret-is-terminator.ll | 2 +- llvm/test/CodeGen/PowerPC/xray-tail-call-hidden.ll | 2 +- llvm/test/CodeGen/PowerPC/xray-tail-call-sled.ll | 2 +- llvm/test/CodeGen/RISCV/attributes.ll | 65 +- .../RISCV/bswap-bitreverse-ctlz-cttz-ctpop.ll | 2441 ++++++++++++++ llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll | 1032 ------ llvm/test/CodeGen/RISCV/fpclamptosat_vec.ll | 2 +- llvm/test/CodeGen/RISCV/rv32zbp.ll | 150 +- llvm/test/CodeGen/RISCV/rv64zbp.ll | 130 +- llvm/test/CodeGen/RISCV/rvv/abs-sdnode.ll | 4 +- .../RISCV/rvv/access-fixed-objects-by-rvv.ll | 2 +- .../CodeGen/RISCV/rvv/addi-scalable-offset.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/calling-conv.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-sats.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-splats.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-store-fp.ll | 4 +- .../CodeGen/RISCV/rvv/common-shuffle-patterns.ll | 2 +- .../RISCV/rvv/commuted-op-indices-regression.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/constant-folding.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll | 8 +- .../CodeGen/RISCV/rvv/debug-info-rvv-dbg-value.mir | 4 +- llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/fceil-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/ffloor-sdnode.ll | 4 +- .../fixed-vector-strided-load-store-negative.ll | 2 +- .../RISCV/rvv/fixed-vector-strided-load-store.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll | 8 +- .../rvv/fixed-vectors-bitcast-large-vector.ll | 6 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll | 8 +- .../RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll | 4 +- .../RISCV/rvv/fixed-vectors-calling-conv.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll | 20 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll | 20 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll | 8 +- .../RISCV/rvv/fixed-vectors-emergency-slot.mir | 2 +- .../RISCV/rvv/fixed-vectors-extload-truncstore.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll | 4 +- .../RISCV/rvv/fixed-vectors-extract-subvector.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll | 8 +- .../RISCV/rvv/fixed-vectors-fp-interleave.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-vrgather.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll | 4 +- .../RISCV/rvv/fixed-vectors-insert-subvector.ll | 18 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll | 4 +- .../RISCV/rvv/fixed-vectors-int-buildvec.ll | 4 +- .../RISCV/rvv/fixed-vectors-int-exttrunc.ll | 12 +- .../RISCV/rvv/fixed-vectors-int-interleave.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll | 26 +- .../RISCV/rvv/fixed-vectors-int-shuffles.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll | 12 +- .../RISCV/rvv/fixed-vectors-int-vrgather.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-marith-vp.ll | 4 +- .../RISCV/rvv/fixed-vectors-mask-buildvec.ll | 28 +- .../RISCV/rvv/fixed-vectors-mask-load-store.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll | 8 +- .../RISCV/rvv/fixed-vectors-masked-gather.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-load-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-load-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-scatter.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-store-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-store-int.ll | 4 +- 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llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfmul-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfrdiv-vp.ll | 52 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfrsub-vp.ll | 52 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfsub-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vnsra-vnsrl.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll | 805 ++++- .../test/CodeGen/RISCV/rvv/fixed-vectors-vpload.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll | 1138 +++++++ .../CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll | 471 ++- .../CodeGen/RISCV/rvv/fixed-vectors-vpstore.ll | 4 +- .../RISCV/rvv/fixed-vectors-vreductions-mask.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vselect.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vssubu.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vwmacc.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vwmaccu.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/frameindex-addr.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/ftrunc-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/get-vlen-debugloc.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/inline-asm.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-i1.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/interleave-crash.ll | 4 +- .../CodeGen/RISCV/rvv/large-rvv-stack-size.mir | 2 +- .../test/CodeGen/RISCV/rvv/legalize-load-sdnode.ll | 4 +- .../RISCV/rvv/legalize-scalable-vectortype.ll | 4 +- .../CodeGen/RISCV/rvv/legalize-store-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-16.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-32.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-8.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-mask.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/localvar.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/marith-vp.ll | 4 +- .../CodeGen/RISCV/rvv/mask-exts-truncs-rv32.ll | 2 +- .../CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/masked-load-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-load-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-store-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-store-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/memory-args.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll | 4 +- .../RISCV/rvv/named-vector-shuffle-reverse.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/pr52475.ll | 4 +- .../test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/reg-coalescing.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/regalloc-fast-crash.ll | 2 +- .../CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll | 4 +- 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llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/smulo-sdnode.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/stepvector.ll | 4 +- .../RISCV/rvv/tail-agnostic-impdef-copy.mir | 6 +- llvm/test/CodeGen/RISCV/rvv/umulo-sdnode.ll | 2 +- .../CodeGen/RISCV/rvv/unaligned-loads-stores.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-policy.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vand-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vand-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vand-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcpop-rv32.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vcpop-rv64.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vcpop.ll | 284 ++ llvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdiv-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vexts-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfabs-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll | 1417 -------- llvm/test/CodeGen/RISCV/rvv/vfadd-rv64.ll | 1386 -------- llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd.ll | 1357 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfclass-rv32.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfclass-rv64.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfclass.ll | 694 ++++ llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll | 1417 -------- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll | 1385 -------- llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfdiv.ll | 1357 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfirst-rv32.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vfirst-rv64.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vfirst.ll | 284 ++ llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll | 1154 ------- llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll | 1130 ------- llvm/test/CodeGen/RISCV/rvv/vfmacc.ll | 1108 +++++++ llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll | 1154 ------- llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll | 1130 ------- llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmadd.ll | 1108 +++++++ llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll | 1417 -------- llvm/test/CodeGen/RISCV/rvv/vfmax-rv64.ll | 1385 -------- llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmax.ll | 1357 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll | 933 ------ llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll | 917 ------ llvm/test/CodeGen/RISCV/rvv/vfmerge.ll | 904 +++++ llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll | 1417 -------- llvm/test/CodeGen/RISCV/rvv/vfmin-rv64.ll | 1385 -------- llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmin.ll | 1357 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll | 1154 ------- llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll | 1130 ------- llvm/test/CodeGen/RISCV/rvv/vfmsac.ll | 1108 +++++++ llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll | 1154 ------- llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll | 1130 ------- llvm/test/CodeGen/RISCV/rvv/vfmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmsub.ll | 1108 +++++++ llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll | 1417 -------- llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll | 1385 -------- llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmul.ll | 1357 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll | 197 -- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll | 197 -- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f.ll | 200 ++ llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv32.ll | 482 --- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv64.ll | 482 --- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f.ll | 484 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f.ll | 634 ++++ .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll | 632 ---- .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f.ll | 634 ++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f.ll | 634 ++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f.ll | 634 ++++ llvm/test/CodeGen/RISCV/rvv/vfneg-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll | 1154 ------- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll | 1130 ------- llvm/test/CodeGen/RISCV/rvv/vfnmacc.ll | 1108 +++++++ llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll | 1154 ------- llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll | 1130 ------- llvm/test/CodeGen/RISCV/rvv/vfnmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfnmadd.ll | 1108 +++++++ llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll | 1154 ------- llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll | 1130 ------- llvm/test/CodeGen/RISCV/rvv/vfnmsac.ll | 1108 +++++++ llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll | 1154 ------- llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll | 1130 ------- llvm/test/CodeGen/RISCV/rvv/vfnmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfnmsub.ll | 1108 +++++++ llvm/test/CodeGen/RISCV/rvv/vfpext-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfptrunc-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll | 739 ----- llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll | 707 ---- llvm/test/CodeGen/RISCV/rvv/vfrdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfrdiv.ll | 679 ++++ llvm/test/CodeGen/RISCV/rvv/vfrec7-rv32.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfrec7-rv64.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfrec7.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredmax-rv64.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredmax.ll | 694 ++++ llvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredmin-rv64.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredmin.ll | 694 ++++ llvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredosum-rv64.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredosum.ll | 694 ++++ llvm/test/CodeGen/RISCV/rvv/vfredusum-rv32.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredusum-rv64.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredusum.ll | 694 ++++ llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv32.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv64.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfrsqrt7.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll | 739 ----- llvm/test/CodeGen/RISCV/rvv/vfrsub-rv64.ll | 708 ---- llvm/test/CodeGen/RISCV/rvv/vfrsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfrsub.ll | 679 ++++ llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll | 1417 -------- llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll | 1385 -------- llvm/test/CodeGen/RISCV/rvv/vfsgnj.ll | 1357 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll | 1417 -------- llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll | 1385 -------- llvm/test/CodeGen/RISCV/rvv/vfsgnjn.ll | 1357 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll | 1417 -------- llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll | 1385 -------- llvm/test/CodeGen/RISCV/rvv/vfsgnjx.ll | 1357 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll | 739 ----- llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll | 707 ---- llvm/test/CodeGen/RISCV/rvv/vfslide1down.ll | 679 ++++ llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll | 754 ----- llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll | 722 ---- llvm/test/CodeGen/RISCV/rvv/vfslide1up.ll | 694 ++++ llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll | 548 ---- llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll | 707 ---- llvm/test/CodeGen/RISCV/rvv/vfsqrt-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsqrt.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll | 1417 -------- llvm/test/CodeGen/RISCV/rvv/vfsub-rv64.ll | 1386 -------- llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsub.ll | 1357 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwadd.ll | 832 +++++ llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll | 1275 -------- llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll | 1275 -------- llvm/test/CodeGen/RISCV/rvv/vfwadd.w.ll | 1250 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x.ll | 634 ++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu.ll | 634 ++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f.ll | 382 +++ .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll | 380 --- .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv64.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwmacc.ll | 832 +++++ llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv64.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwmsac.ll | 832 +++++ llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwmul.ll | 832 +++++ llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv64.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwnmacc.ll | 832 +++++ llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwnmsac.ll | 832 +++++ llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll | 508 --- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll | 508 --- llvm/test/CodeGen/RISCV/rvv/vfwredosum.ll | 510 +++ llvm/test/CodeGen/RISCV/rvv/vfwredusum-rv32.ll | 508 --- llvm/test/CodeGen/RISCV/rvv/vfwredusum-rv64.ll | 508 --- llvm/test/CodeGen/RISCV/rvv/vfwredusum.ll | 510 +++ llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwsub.ll | 832 +++++ llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll | 1275 -------- llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll | 1275 -------- llvm/test/CodeGen/RISCV/rvv/vfwsub.w.ll | 1250 +++++++ llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll | 758 ----- llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll | 758 ----- llvm/test/CodeGen/RISCV/rvv/vid.ll | 760 +++++ llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll | 882 ----- llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll | 882 ----- llvm/test/CodeGen/RISCV/rvv/viota.ll | 884 +++++ llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlm-rv32.ll | 94 - llvm/test/CodeGen/RISCV/rvv/vlm-rv64.ll | 94 - llvm/test/CodeGen/RISCV/rvv/vlm.ll | 96 + llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlse-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlse-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32-dead.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64-dead.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmand-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmand-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmand.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmandn-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmandn-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmandn.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmclr-rv32.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmclr-rv64.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmclr.ll | 116 + llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmerge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmnand-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnand-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnand.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmnor-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnor-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnor.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmor-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmor-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmor.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmorn-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmorn-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmorn.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmsbc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbc-rv64.ll | 2 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll | 2 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmset-rv32.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmset-rv64.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmset.ll | 116 + llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll | 296 -- llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 296 -- llvm/test/CodeGen/RISCV/rvv/vmsif.ll | 298 ++ llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll | 296 -- llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 296 -- llvm/test/CodeGen/RISCV/rvv/vmsof.ll | 298 ++ llvm/test/CodeGen/RISCV/rvv/vmul-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmul-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulh-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmxnor-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmxnor-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmxnor.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmxor-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmxor-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmxor.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsra-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vor-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll | 366 ++- llvm/test/CodeGen/RISCV/rvv/vpload.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll | 1488 +++++++++ llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll | 368 ++- llvm/test/CodeGen/RISCV/rvv/vpstore.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv64.ll | 2 +- .../CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll | 4 +- .../test/CodeGen/RISCV/rvv/vreductions-int-rv32.ll | 2 +- .../test/CodeGen/RISCV/rvv/vreductions-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vredxor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredxor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrem-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vremu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vremu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vrgather-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsbc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsbc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vse-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vse-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-int-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-mask.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsetvl-ext.ll | 2 +- .../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll | 2 +- .../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir | 4 +- llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir | 4 +- llvm/test/CodeGen/RISCV/rvv/vsetvli-regression.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vshl-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslide1down-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsll-rv32.ll | 34 +- llvm/test/CodeGen/RISCV/rvv/vsll-rv64.ll | 34 +- llvm/test/CodeGen/RISCV/rvv/vsm-rv32.ll | 137 - llvm/test/CodeGen/RISCV/rvv/vsm-rv64.ll | 137 - llvm/test/CodeGen/RISCV/rvv/vsm.ll | 139 + llvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsmul-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsplats-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsra-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsra-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsra-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsrl-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsrl-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsse-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsse-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssra-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssra-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssrl-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssrl-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vssubu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssubu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssubu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsuxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsuxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwaddu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwaddu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmacc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmacc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmacc-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmul-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmul-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmulu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmulu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwredsum-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwredsum-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsubu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsubu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vxor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vxor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll | 2 +- .../CodeGen/RISCV/rvv/wrong-stack-slot-rv32.mir | 2 +- .../CodeGen/RISCV/rvv/wrong-stack-slot-rv64.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/zvlsseg-copy.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/zvlsseg-spill.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/zvlsseg-zero-vl.ll | 2 +- llvm/test/CodeGen/RISCV/scalable-vector-struct.ll | 2 +- llvm/test/CodeGen/RISCV/spill-fpr-scalar.ll | 2 +- .../test/CodeGen/RISCV/srem-seteq-illegal-types.ll | 4 +- .../test/CodeGen/RISCV/urem-seteq-illegal-types.ll | 4 +- llvm/test/CodeGen/RISCV/vec3-setcc-crash.ll | 4 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 112 +- llvm/test/CodeGen/X86/combine-sra-load.ll | 103 + llvm/test/CodeGen/X86/dpbusd_const.ll | 17 +- llvm/test/CodeGen/X86/extractelement-fp.ll | 8 +- llvm/test/CodeGen/X86/fp-round.ll | 14 +- llvm/test/CodeGen/X86/fp128-cast.ll | 2 +- .../hoist-and-by-const-from-shl-in-eqcmp-zero.ll | 16 +- llvm/test/CodeGen/X86/long-double-abi-align.ll | 4 +- llvm/test/CodeGen/X86/movmsk-cmp.ll | 10 +- llvm/test/CodeGen/X86/parity-vec.ll | 165 +- llvm/test/CodeGen/X86/pr43509.ll | 8 +- .../test/CodeGen/X86/pr53243-tail-call-fastisel.ll | 39 + llvm/test/CodeGen/X86/scalar-fp-to-i32.ll | 219 +- llvm/test/CodeGen/X86/scalar-fp-to-i64.ll | 32 +- llvm/test/CodeGen/X86/select-lea.ll | 363 +++ llvm/test/CodeGen/X86/shift-folding.ll | 25 + llvm/test/CodeGen/X86/smul-with-overflow.ll | 734 ++++- ...nfold-masked-merge-vector-variablemask-const.ll | 47 +- llvm/test/CodeGen/X86/vector-compare-all_of.ll | 51 +- llvm/test/CodeGen/X86/vector-compare-any_of.ll | 10 +- llvm/test/CodeGen/X86/vector-fshl-128.ll | 165 +- llvm/test/CodeGen/X86/vector-fshl-256.ll | 117 +- llvm/test/CodeGen/X86/vector-fshl-512.ll | 130 +- llvm/test/CodeGen/X86/vector-reduce-and-bool.ll | 1217 +++++-- llvm/test/CodeGen/X86/vector-reduce-or-bool.ll | 1063 +++++- llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll | 1159 ++++++- llvm/test/CodeGen/X86/vselect-avx512.ll | 111 + .../CodeGen/X86/xray-attribute-instrumentation.ll | 7 +- llvm/test/CodeGen/X86/xray-custom-log.ll | 4 +- llvm/test/CodeGen/X86/xray-empty-firstmbb.mir | 2 +- .../test/CodeGen/X86/xray-ignore-loop-detection.ll | 4 +- llvm/test/CodeGen/X86/xray-log-args.ll | 4 +- llvm/test/CodeGen/X86/xray-loop-detection.ll | 4 +- .../CodeGen/X86/xray-multiplerets-in-blocks.mir | 2 +- .../X86/xray-partial-instrumentation-skip-entry.ll | 7 +- .../X86/xray-partial-instrumentation-skip-exit.ll | 6 +- llvm/test/CodeGen/X86/xray-section-group.ll | 6 +- .../CodeGen/X86/xray-selective-instrumentation.ll | 2 +- llvm/test/CodeGen/X86/xray-tail-call-sled.ll | 4 +- llvm/test/DebugInfo/COFF/x87-registers.ll | 44 + llvm/test/DebugInfo/X86/instr-ref-flag.ll | 4 + llvm/test/DebugInfo/X86/tu-to-non-tu.ll | 330 +- .../JITLink/RISCV/ELF_pc_relative.s | 19 + .../ExecutionEngine/JITLink/RISCV/ELF_reloc_set.s | 31 + .../JITLink/RISCV/anonymous_symbol.s | 21 + .../LTO/Resolution/X86/Inputs/no-undef-type-md.ll | 13 + llvm/test/LTO/Resolution/X86/no-undef-type-md.ll | 37 + llvm/test/MC/AArch64/armv8.2a-crypto.s | 3 +- .../MC/Disassembler/AArch64/armv8.3a-complex.txt | 3 +- .../MC/Disassembler/AArch64/armv8.5a-predres.txt | 2 +- .../Disassembler/AArch64/armv8.5a-specrestrict.txt | 2 +- .../test/MC/Disassembler/AArch64/armv8.5a-ssbs.txt | 2 +- llvm/test/MC/Disassembler/AArch64/armv8a-fpmul.txt | 1 - llvm/test/MC/Disassembler/M68k/arithmetic.txt | 10 + llvm/test/MC/Disassembler/M68k/bits.txt | 4 + llvm/test/MC/Disassembler/M68k/control.txt | 14 + llvm/test/MC/Disassembler/M68k/data.txt | 6 + llvm/test/MC/Disassembler/M68k/instructions.txt | 38 - llvm/test/MC/Disassembler/M68k/shift-rotate.txt | 12 + llvm/test/MC/PowerPC/gnu-attribute.s | 11 + llvm/test/MC/RISCV/attribute-arch-invalid.s | 6 - llvm/test/MC/RISCV/attribute-arch.s | 127 +- llvm/test/MC/RISCV/rv32zbkc-invalid.s | 9 + llvm/test/MC/RISCV/rv32zbkc-valid.s | 23 + llvm/test/MC/RISCV/rv32zbkx-invalid.s | 9 + llvm/test/MC/RISCV/rv32zbkx-valid.s | 17 + llvm/test/MC/RISCV/rv32zknd-only-invalid.s | 17 + llvm/test/MC/RISCV/rv32zknd-only-valid.s | 13 + llvm/test/MC/RISCV/rv32zkne-only-invalid.s | 17 + llvm/test/MC/RISCV/rv32zkne-only-valid.s | 13 + llvm/test/MC/RISCV/rv32zknh-only-valid.s | 29 + llvm/test/MC/RISCV/rv32zknh-valid.s | 26 + llvm/test/MC/RISCV/rv32zksed-invalid.s | 13 + llvm/test/MC/RISCV/rv32zksed-valid.s | 18 + llvm/test/MC/RISCV/rv32zksh-valid.s | 18 + llvm/test/MC/RISCV/rv64zknd-only-valid.s | 25 + llvm/test/MC/RISCV/rv64zkne-only-invalid.s | 17 + llvm/test/MC/RISCV/rv64zkne-only-valid.s | 21 + llvm/test/MC/RISCV/rv64zknh-only-valid.s | 21 + llvm/test/MC/RISCV/rv64zksed-invalid.s | 13 + llvm/test/MC/RISCV/rvk-user-csr-name.s | 29 + llvm/test/MC/RISCV/rvv/add.s | 8 +- llvm/test/MC/RISCV/rvv/aliases.s | 4 +- llvm/test/MC/RISCV/rvv/and.s | 8 +- llvm/test/MC/RISCV/rvv/clip.s | 8 +- llvm/test/MC/RISCV/rvv/compare.s | 8 +- llvm/test/MC/RISCV/rvv/convert.s | 8 +- llvm/test/MC/RISCV/rvv/div.s | 8 +- llvm/test/MC/RISCV/rvv/ext.s | 8 +- llvm/test/MC/RISCV/rvv/fadd.s | 8 +- llvm/test/MC/RISCV/rvv/fcompare.s | 8 +- llvm/test/MC/RISCV/rvv/fdiv.s | 8 +- llvm/test/MC/RISCV/rvv/fmacc.s | 8 +- llvm/test/MC/RISCV/rvv/fminmax.s | 8 +- llvm/test/MC/RISCV/rvv/fmul.s | 8 +- llvm/test/MC/RISCV/rvv/fmv.s | 8 +- llvm/test/MC/RISCV/rvv/fothers.s | 8 +- llvm/test/MC/RISCV/rvv/freduction.s | 8 +- llvm/test/MC/RISCV/rvv/fsub.s | 8 +- llvm/test/MC/RISCV/rvv/invalid-eew.s | 2 +- llvm/test/MC/RISCV/rvv/invalid.s | 2 +- llvm/test/MC/RISCV/rvv/load.s | 8 +- llvm/test/MC/RISCV/rvv/macc.s | 8 +- llvm/test/MC/RISCV/rvv/mask.s | 8 +- llvm/test/MC/RISCV/rvv/minmax.s | 8 +- llvm/test/MC/RISCV/rvv/mul.s | 8 +- llvm/test/MC/RISCV/rvv/mv.s | 8 +- llvm/test/MC/RISCV/rvv/or.s | 8 +- llvm/test/MC/RISCV/rvv/others.s | 8 +- llvm/test/MC/RISCV/rvv/reduction.s | 8 +- llvm/test/MC/RISCV/rvv/shift.s | 8 +- llvm/test/MC/RISCV/rvv/sign-injection.s | 8 +- llvm/test/MC/RISCV/rvv/snippet.s | 4 +- llvm/test/MC/RISCV/rvv/store.s | 8 +- llvm/test/MC/RISCV/rvv/sub.s | 8 +- llvm/test/MC/RISCV/rvv/vsetvl-invalid.s | 4 +- llvm/test/MC/RISCV/rvv/vsetvl.s | 8 +- llvm/test/MC/RISCV/rvv/xor.s | 8 +- llvm/test/MC/RISCV/rvv/zvlsseg.s | 8 +- .../CodeGenPrepare/AArch64/large-offset-gep.ll | 5 +- .../Transforms/ConstraintElimination/sub-nuw.ll | 34 + .../{coro-align-03.ll => coro-align16.ll} | 0 llvm/test/Transforms/Coroutines/coro-align32.ll | 60 + .../{coro-align-05.ll => coro-align64-02.ll} | 0 .../{coro-align-04.ll => coro-align64.ll} | 0 .../{coro-align-02.ll => coro-align8-02.ll} | 0 .../{coro-align-01.ll => coro-align8.ll} | 0 .../IndVarSimplify/shift-range-checks.ll | 20 +- .../InstCombine/AMDGPU/amdgcn-intrinsics.ll | 664 ++++ .../Transforms/InstCombine/binop-phi-operands.ll | 122 +- llvm/test/Transforms/InstCombine/icmp-mul-and.ll | 97 + .../Transforms/InstCombine/intrinsic-select.ll | 2 +- llvm/test/Transforms/InstCombine/intrinsics.ll | 56 +- .../Transforms/InstCombine/masked_intrinsics.ll | 62 + .../test/Transforms/InstCombine/mul-masked-bits.ll | 47 +- llvm/test/Transforms/InstCombine/zext-or-icmp.ll | 12 +- .../Transforms/InstSimplify/ConstProp/bitcount.ll | 36 +- .../reductions-across-inner-and-outer-loop.ll | 38 + .../LoopVectorize/AArch64/induction-trunc.ll | 8 +- .../Transforms/LoopVectorize/AArch64/pr31900.ll | 12 +- .../LoopVectorize/AArch64/scalable-reductions.ll | 25 + .../LoopVectorize/AArch64/strict-fadd.ll | 31 + .../AArch64/sve-epilog-vect-inloop-reductions.ll | 121 + .../AArch64/sve-epilog-vect-reductions.ll | 121 + .../AArch64/sve-epilog-vect-strict-reductions.ll | 116 + .../LoopVectorize/RISCV/masked_gather_scatter.ll | 4 +- .../Transforms/LoopVectorize/RISCV/reg-usage.ll | 8 +- .../LoopVectorize/RISCV/riscv-interleaved.ll | 2 +- .../Transforms/LoopVectorize/RISCV/riscv-unroll.ll | 8 +- .../LoopVectorize/RISCV/scalable-reductions.ll | 2 +- .../LoopVectorize/RISCV/scalable-vf-hint.ll | 2 +- .../RISCV/unroll-in-loop-vectorizer.ll | 2 +- .../X86/invariant-store-vectorization.ll | 106 +- llvm/test/Transforms/LoopVectorize/X86/pr35432.ll | 2 +- llvm/test/Transforms/LoopVectorize/X86/pr42674.ll | 2 +- .../epilog-vectorization-reductions.ll | 529 +++ llvm/test/Transforms/LoopVectorize/induction.ll | 138 +- .../optimal-epilog-vectorization-limitations.ll | 33 - .../reduction-with-invariant-store.ll | 333 ++ .../LoopVectorize/single-value-blend-phis.ll | 96 +- .../tail-folding-vectorization-factor-1.ll | 96 +- .../LoopVectorize/vector-intrinsic-call-cost.ll | 26 +- llvm/test/Transforms/NewGVN/phi-of-ops-loads.ll | 148 + llvm/test/Transforms/ObjCARC/weak.ll | 43 +- .../Transforms/OpenMP/replace_globalization.ll | 8 +- llvm/test/Transforms/OpenMP/spmdization.ll | 62 +- .../SLPVectorizer/AArch64/64-bit-vector.ll | 8 +- .../SLPVectorizer/AArch64/slp-or-reduction.ll | 1 + .../SLPVectorizer/AArch64/spillcost-di.ll | 28 +- .../AMDGPU/add_sub_sat-inseltpoison.ll | 8 +- .../Transforms/SLPVectorizer/AMDGPU/add_sub_sat.ll | 8 +- .../address-space-ptr-sze-gep-index-assert.ll | 28 +- .../Transforms/SLPVectorizer/PowerPC/aggregate.ll | 2 +- .../SLPVectorizer/RISCV/rvv-min-vector-size.ll | 6 +- llvm/test/Transforms/SLPVectorizer/X86/PR34635.ll | 2 +- llvm/test/Transforms/SLPVectorizer/X86/PR36280.ll | 4 +- .../test/Transforms/SLPVectorizer/X86/aggregate.ll | 2 +- .../X86/alternate-cast-inseltpoison.ll | 16 +- .../Transforms/SLPVectorizer/X86/alternate-cast.ll | 16 +- .../Transforms/SLPVectorizer/X86/arith-add-ssat.ll | 28 +- .../Transforms/SLPVectorizer/X86/arith-sub-ssat.ll | 28 +- llvm/test/Transforms/SLPVectorizer/X86/call.ll | 13 +- .../SLPVectorizer/X86/crash_netbsd_decompress.ll | 8 +- .../X86/crash_scheduling-inseltpoison.ll | 4 +- .../SLPVectorizer/X86/crash_scheduling.ll | 4 +- .../SLPVectorizer/X86/crash_vectorizeTree.ll | 27 +- .../Transforms/SLPVectorizer/X86/debug_info.ll | 30 +- .../Transforms/SLPVectorizer/X86/external_user.ll | 2 +- .../SLPVectorizer/X86/extract_in_tree_user.ll | 6 +- .../Transforms/SLPVectorizer/X86/gep_mismatch.ll | 2 +- .../SLPVectorizer/X86/hadd-inseltpoison.ll | 16 +- llvm/test/Transforms/SLPVectorizer/X86/hadd.ll | 16 +- .../SLPVectorizer/X86/hsub-inseltpoison.ll | 16 +- llvm/test/Transforms/SLPVectorizer/X86/hsub.ll | 16 +- .../Transforms/SLPVectorizer/X86/insertvalue.ll | 8 +- llvm/test/Transforms/SLPVectorizer/X86/metadata.ll | 13 +- .../Transforms/SLPVectorizer/X86/multi_block.ll | 6 +- .../SLPVectorizer/X86/no_alternate_divrem.ll | 32 +- llvm/test/Transforms/SLPVectorizer/X86/pr16899.ll | 6 +- .../test/Transforms/SLPVectorizer/X86/reduction.ll | 10 +- .../SLPVectorizer/X86/remark_listcost.ll | 14 +- .../Transforms/SLPVectorizer/X86/undef_vect.ll | 10 +- llvm/test/tools/gold/X86/cache.ll | 4 +- .../tools/llvm-objcopy/MachO/update-section.test | 115 + .../llvm-profgen/separate-debuginfo-binary.test | 57 + .../Inputs/{basic-aa.txt => basic-aa.crlf} | 0 llvm/test/tools/split-file/Inputs/basic-bb.crlf | 4 + llvm/test/tools/split-file/basic.crlf.test | 10 + llvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp | 56 + llvm/tools/llvm-objdump/MachODump.cpp | 4 +- llvm/tools/llvm-objdump/WasmDump.cpp | 2 +- llvm/tools/llvm-pdbutil/MinimalSymbolDumper.cpp | 11 +- llvm/tools/llvm-profgen/ProfiledBinary.cpp | 19 +- llvm/tools/llvm-profgen/ProfiledBinary.h | 12 +- llvm/tools/llvm-profgen/llvm-profgen.cpp | 14 +- llvm/tools/llvm-readobj/COFFDumper.cpp | 1 + llvm/tools/llvm-readobj/XCOFFDumper.cpp | 1 + llvm/tools/llvm-stress/llvm-stress.cpp | 6 +- llvm/tools/split-file/split-file.cpp | 3 +- llvm/unittests/ADT/SequenceTest.cpp | 1 + llvm/unittests/ADT/SimpleIListTest.cpp | 1 + llvm/unittests/ADT/SmallPtrSetTest.cpp | 1 + llvm/unittests/ADT/StringMapTest.cpp | 1 + llvm/unittests/ADT/StringRefTest.cpp | 30 + llvm/unittests/ADT/StringSetTest.cpp | 1 + llvm/unittests/AsmParser/AsmParserTest.cpp | 26 +- llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp | 2 +- .../unittests/CodeGen/GlobalISel/KnownBitsTest.cpp | 55 + llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp | 20 +- llvm/unittests/Support/Path.cpp | 1 + llvm/unittests/Support/ReverseIterationTest.cpp | 1 + llvm/utils/LLVMVisualizers/llvm.natvis | 4 +- .../clang-tidy/readability/BUILD.gn | 2 + llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 2 + .../gn/secondary/llvm/include/llvm/Config/BUILD.gn | 3 +- llvm/utils/lit/lit/main.py | 3 +- .../mlir/Analysis/Presburger/LinearTransform.h | 5 +- .../mlir/Analysis/Presburger/PresburgerSet.h | 18 +- mlir/include/mlir/Analysis/Presburger/Utils.h | 17 + .../mlir/Conversion/GPUCommon/GPUCommonPass.h | 1 + mlir/include/mlir/Dialect/Affine/LoopFusionUtils.h | 170 + mlir/include/mlir/Dialect/Affine/LoopUtils.h | 291 ++ mlir/include/mlir/Dialect/Affine/Passes.h | 21 + mlir/include/mlir/Dialect/Affine/Passes.td | 208 ++ mlir/include/mlir/Dialect/Affine/Utils.h | 119 + mlir/include/mlir/Dialect/ArmSVE/ArmSVE.td | 1 - .../Bufferization/IR/BufferizableOpInterface.h | 16 +- .../mlir/Dialect/Bufferization/IR/Bufferization.h | 1 + .../Bufferization/IR/BufferizationInterfaceImpl.h | 25 - .../Dialect/Bufferization/IR/BufferizationOps.td | 95 +- .../Dialect/Bufferization/Transforms/BufferUtils.h | 143 + .../Dialect/Bufferization/Transforms/Bufferize.h | 7 +- .../mlir/Dialect/Bufferization/Transforms/Passes.h | 24 + .../Dialect/Bufferization/Transforms/Passes.td | 69 + mlir/include/mlir/Dialect/GPU/GPUOps.td | 1 - mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 4 + .../ComprehensiveBufferize/TensorInterfaceImpl.h | 27 - mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 202 -- .../mlir/Dialect/Linalg/Transforms/HoistPadding.h | 25 +- .../mlir/Dialect/Linalg/Transforms/Transforms.h | 72 +- mlir/include/mlir/Dialect/Linalg/Utils/Utils.h | 16 +- .../mlir/Dialect/MemRef/Transforms/Passes.h | 4 + .../mlir/Dialect/MemRef/Transforms/Passes.td | 116 + mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td | 44 + mlir/include/mlir/Dialect/SCF/Passes.h | 4 + mlir/include/mlir/Dialect/SCF/Passes.td | 16 + mlir/include/mlir/Dialect/SCF/Utils.h | 60 + .../Dialect/SparseTensor/IR/SparseTensorOps.td | 20 + .../mlir/Dialect/StandardOps/Transforms/Passes.h | 4 +- mlir/include/mlir/Dialect/Tensor/IR/Tensor.h | 1 + mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td | 191 +- .../Dialect/Tensor/IR/TensorTilingInterfaceImpl.h | 36 + .../Transforms/BufferizableOpInterfaceImpl.h | 20 + mlir/include/mlir/Dialect/Tensor/Utils/Utils.h | 34 + mlir/include/mlir/IR/OpDefinition.h | 32 +- mlir/include/mlir/InitAllDialects.h | 2 + .../mlir/Interfaces/ControlFlowInterfaces.h | 29 + .../mlir/Interfaces/ControlFlowInterfaces.td | 31 +- mlir/include/mlir/Interfaces/LoopLikeInterface.h | 13 + mlir/include/mlir/Transforms/BufferUtils.h | 142 - .../include/mlir/Transforms/ControlFlowSinkUtils.h | 70 + mlir/include/mlir/Transforms/LoopFusionUtils.h | 170 - mlir/include/mlir/Transforms/LoopUtils.h | 329 -- mlir/include/mlir/Transforms/Passes.h | 57 +- mlir/include/mlir/Transforms/Passes.td | 433 +-- mlir/include/mlir/Transforms/Utils.h | 152 - mlir/lib/Analysis/Presburger/IntegerPolyhedron.cpp | 52 +- mlir/lib/Analysis/Presburger/LinearTransform.cpp | 8 +- mlir/lib/Analysis/Presburger/PresburgerSet.cpp | 35 +- mlir/lib/Analysis/Presburger/Utils.cpp | 58 +- mlir/lib/CMakeLists.txt | 2 +- .../lib/Conversion/AffineToStandard/CMakeLists.txt | 1 + .../lib/Conversion/ArithmeticToLLVM/CMakeLists.txt | 1 + .../Conversion/ArithmeticToSPIRV/CMakeLists.txt | 1 + mlir/lib/Conversion/ArmNeon2dToIntr/CMakeLists.txt | 2 + mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp | 26 +- .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 32 +- mlir/lib/Conversion/MathToLibm/CMakeLists.txt | 1 + mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp | 31 +- mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp | 1 - mlir/lib/Conversion/SCFToSPIRV/CMakeLists.txt | 1 + .../lib/Conversion/SCFToStandard/SCFToStandard.cpp | 1 - mlir/lib/Conversion/StandardToLLVM/CMakeLists.txt | 1 + .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 1 - mlir/lib/Conversion/StandardToSPIRV/CMakeLists.txt | 1 + mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp | 3 +- .../Conversion/TosaToLinalg/TosaToLinalgNamed.cpp | 7 +- mlir/lib/Conversion/VectorToGPU/CMakeLists.txt | 1 + mlir/lib/Conversion/VectorToSCF/CMakeLists.txt | 1 + mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp | 1 - .../lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp | 22 +- mlir/lib/Dialect/Affine/IR/CMakeLists.txt | 1 + .../Affine/Transforms/AffineDataCopyGeneration.cpp | 2 +- .../Transforms/AffineLoopInvariantCodeMotion.cpp | 4 +- .../Affine/Transforms/AffineParallelize.cpp | 2 +- mlir/lib/Dialect/Affine/Transforms/CMakeLists.txt | 5 + .../Dialect/Affine/Transforms/LoopCoalescing.cpp | 102 + mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp | 1996 ++++++++++++ mlir/lib/Dialect/Affine/Transforms/LoopTiling.cpp | 4 +- mlir/lib/Dialect/Affine/Transforms/LoopUnroll.cpp | 2 +- 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| 43 + mlir/lib/Dialect/Tensor/IR/TensorOps.cpp | 253 ++ .../Tensor/IR/TensorTilingInterfaceImpl.cpp | 279 ++ .../Transforms/BufferizableOpInterfaceImpl.cpp | 646 ++++ mlir/lib/Dialect/Tensor/Transforms/CMakeLists.txt | 2 + mlir/lib/Dialect/Tensor/Utils/CMakeLists.txt | 12 + mlir/lib/Dialect/Tensor/Utils/Utils.cpp | 54 + mlir/lib/Dialect/Tosa/CMakeLists.txt | 1 + mlir/lib/Dialect/Tosa/IR/TosaOps.cpp | 31 + .../Vector/VectorTransferSplitRewritePatterns.cpp | 1 - mlir/lib/Dialect/Vector/VectorTransforms.cpp | 1 - mlir/lib/Dialect/Vector/VectorUnrollDistribute.cpp | 1 - mlir/lib/ExecutionEngine/SparseTensorUtils.cpp | 98 +- mlir/lib/IR/AsmPrinter.cpp | 4 +- mlir/lib/Interfaces/CMakeLists.txt | 15 +- mlir/lib/Interfaces/LoopLikeInterface.cpp | 83 + mlir/lib/Parser/Token.h | 1 + .../Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp | 18 +- .../Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp | 6 +- mlir/lib/Target/LLVMIR/TypeFromLLVM.cpp | 4 +- mlir/lib/Transforms/BufferOptimizations.cpp | 444 --- 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mlir/python/requirements.txt | 1 + .../AsyncToLLVM/convert-coro-to-llvm.mlir | 14 +- mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir | 15 +- .../Conversion/MathToSPIRV/math-to-glsl-spirv.mlir | 38 +- .../MathToSPIRV/math-to-opencl-spirv.mlir | 40 +- .../TosaToLinalg/tosa-to-linalg-named.mlir | 20 +- .../Conversion/TosaToLinalg/tosa-to-linalg.mlir | 16 +- mlir/test/Conversion/VectorToSPIRV/simple.mlir | 22 + mlir/test/Dialect/Linalg/bufferize.mlir | 4 +- mlir/test/Dialect/Linalg/canonicalize.mlir | 204 +- mlir/test/Dialect/Linalg/codegen-strategy.mlir | 2 +- .../Linalg/comprehensive-function-bufferize.mlir | 2 +- .../comprehensive-module-bufferize-alloca.mlir | 6 +- .../Linalg/comprehensive-module-bufferize.mlir | 58 +- .../test/Dialect/Linalg/generalize-pad-tensor.mlir | 8 +- mlir/test/Dialect/Linalg/hoist-padding.mlir | 165 +- mlir/test/Dialect/Linalg/invalid.mlir | 65 - mlir/test/Dialect/Linalg/lower-pad-tensor.mlir | 12 +- mlir/test/Dialect/Linalg/pad.mlir | 58 +- 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mlir/include/mlir/Dialect/Tensor/IR/TensorTilingInterfaceImpl.h create mode 100644 mlir/include/mlir/Dialect/Tensor/Transforms/BufferizableOpInter [...] create mode 100644 mlir/include/mlir/Dialect/Tensor/Utils/Utils.h delete mode 100644 mlir/include/mlir/Transforms/BufferUtils.h create mode 100644 mlir/include/mlir/Transforms/ControlFlowSinkUtils.h delete mode 100644 mlir/include/mlir/Transforms/LoopFusionUtils.h delete mode 100644 mlir/include/mlir/Transforms/LoopUtils.h delete mode 100644 mlir/include/mlir/Transforms/Utils.h create mode 100644 mlir/lib/Dialect/Affine/Transforms/LoopCoalescing.cpp create mode 100644 mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp create mode 100644 mlir/lib/Dialect/Affine/Transforms/PipelineDataTransfer.cpp create mode 100644 mlir/lib/Dialect/Affine/Utils/LoopFusionUtils.cpp create mode 100644 mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp delete mode 100644 mlir/lib/Dialect/Bufferization/IR/BufferizationInterfaceImpl.cpp create mode 100644 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mlir/lib/Transforms/BufferUtils.cpp create mode 100644 mlir/lib/Transforms/ControlFlowSink.cpp delete mode 100644 mlir/lib/Transforms/LoopCoalescing.cpp delete mode 100644 mlir/lib/Transforms/LoopFusion.cpp delete mode 100644 mlir/lib/Transforms/NormalizeMemRefs.cpp delete mode 100644 mlir/lib/Transforms/ParallelLoopCollapsing.cpp delete mode 100644 mlir/lib/Transforms/PipelineDataTransfer.cpp create mode 100644 mlir/lib/Transforms/Utils/ControlFlowSinkUtils.cpp delete mode 100644 mlir/lib/Transforms/Utils/LoopFusionUtils.cpp delete mode 100644 mlir/lib/Transforms/Utils/LoopUtils.cpp delete mode 100644 mlir/lib/Transforms/Utils/Utils.cpp create mode 100644 mlir/test/Integration/Dialect/SparseTensor/python/test_output.py create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/README.md create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/data/gold_A.tns create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/data/gold_y.tns create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/data/nell-2.tns create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/data/pwtk.mtx create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/lit.local.cfg create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/test_MTTKRP.py create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/test_SpMV.py create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/test_simple_ten [...] copy mlir/test/Integration/Dialect/SparseTensor/{python => taco}/tools/lit.local.c [...] create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/tools/mlir_pytaco.py create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/tools/mlir_pyta [...] create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/tools/mlir_pyta [...] create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/tools/mlir_pyta [...] create mode 100644 mlir/test/Transforms/control-flow-sink.mlir create mode 100644 mlir/test/lib/Dialect/Affine/TestLoopFusion.cpp create mode 100644 mlir/test/lib/Dialect/Affine/TestLoopMapping.cpp create mode 100644 mlir/test/lib/Dialect/SCF/TestLoopParametricTiling.cpp create mode 100644 mlir/test/lib/Dialect/SCF/TestLoopUnrolling.cpp delete mode 100644 mlir/test/lib/Transforms/TestLoopFusion.cpp delete mode 100644 mlir/test/lib/Transforms/TestLoopMapping.cpp delete mode 100644 mlir/test/lib/Transforms/TestLoopParametricTiling.cpp delete mode 100644 mlir/test/lib/Transforms/TestLoopUnrolling.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig updated (b13d7831eb -> 7d9d9c1078)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig in repository toolchain/ci/binutils-gdb. from b13d7831eb gdb/doc: fill in two missing @r adds e901223d53 Updated Serbian translation for the ld sub-directory adds ed09c325ec gdb: include gdbsupport/buildargv.h in ser-mingw.c adds 5b4ea8a740 Automatic date update in version.in adds cb2562f553 RISC-V: create new frag after alignment. adds a74e1cb344 Add markers for 2.38 branch adds f908e960c5 Change version number to 2.38.50 and regenerate files adds 5f7a57f131 Update release makeing script with new release numbers adds cc5e40736d Adjust default page sizes for haiku arm. adds 58de646be2 Allow inferring tmp_prefix from the dll name from a def file. adds 3dd8e5b615 bfd: replace doc header generation with pattern rules adds cb803d3749 bfd: rename core.texi to corefile.texi adds bd32be01c9 bfd: merge doc subdir up a level adds 35638469cb Automatic date update in version.in adds 31b0378d53 Regenerate configure files with autoconf 2.69 adds ad69b6b861 Regenerate Makefile.in files with automake 1.15.1 adds 0e3839bde6 bfd: Properly install library and header files adds 451c003d5f bfd: Partially revert commit 0e3839bde6f adds f10522c0e7 Simplify some Rust expression-evaluation code adds 2b1ca85cf8 Automatic date update in version.in adds 5fe73d4624 Update Bulgarian, French, Romaniam and Ukranian translation [...] adds 965c919f98 gdb/doc: improve description for Window.click on Python TUI windows adds 2f279a64a2 Fix a proble building the libiberty library with gcc-12. adds fdf55097a3 bfd/doc: Fix racy build failure from missing mkdir adds 94fd627d46 bfd: Update doc/local.mk adds 823f6c5f05 Automatic date update in version.in adds 9a84a44d5d gas: drop old cygnus install hack adds 7d9d9c1078 gold: drop old cygnus install hack No new revisions were added by this update. Summary of changes: ChangeLog | 4 + bfd/.gitignore | 2 +- bfd/ChangeLog | 20 + bfd/Makefile.am | 22 +- bfd/Makefile.in | 508 +- bfd/configure | 42 +- bfd/configure.ac | 3 +- bfd/doc/Makefile.am | 217 - bfd/doc/Makefile.in | 1021 --- bfd/doc/bfd.texi | 2 +- bfd/doc/local.mk | 154 + bfd/po/bfd.pot | 112 +- bfd/po/fr.po | 3116 ++++---- bfd/po/ro.po | 10194 ++++++++++++++++++++----- bfd/po/uk.po | 3102 ++++---- bfd/version.h | 2 +- bfd/version.m4 | 2 +- binutils/BRANCHES | 1 + binutils/ChangeLog | 21 + binutils/Makefile.in | 1 - binutils/NEWS | 2 + binutils/README-how-to-make-a-release | 35 +- binutils/configure | 20 +- binutils/dlltool.c | 34 +- binutils/po/bg.po | 6039 +++++++++------ binutils/po/binutils.pot | 4084 +++++----- binutils/po/fr.po | 4192 +++++----- binutils/po/ro.po | 13085 +++++++++++++++++++++++++------- binutils/po/uk.po | 4202 +++++----- config/ChangeLog | 4 + cpu/ChangeLog | 4 + elfcpp/ChangeLog | 4 + gas/ChangeLog | 13 + gas/Makefile.in | 15 +- gas/NEWS | 2 + gas/config/tc-riscv.c | 6 + gas/configure | 20 +- gas/doc/local.mk | 4 - gas/po/gas.pot | 20 +- gas/po/uk.po | 4880 ++++++------ gdb/doc/python.texi | 6 +- gdb/rust-exp.h | 39 +- gdb/rust-lang.c | 44 +- gdb/ser-mingw.c | 1 + gold/ChangeLog | 15 + gold/Makefile.am | 4 - gold/Makefile.in | 24 +- gold/po/gold.pot | 248 +- gold/po/uk.po | 257 +- gprof/ChangeLog | 14 + gprof/configure | 20 +- gprof/po/gprof.pot | 4 +- gprof/po/ro.po | 386 +- include/ChangeLog | 4 + ld/ChangeLog | 24 + ld/Makefile.in | 1 - ld/NEWS | 2 + ld/configure | 20 +- ld/configure.tgt | 2 +- ld/emulparams/armelf_haiku.sh | 4 +- ld/po/bg.po | 4373 ++++++----- ld/po/ld.pot | 218 +- ld/po/sr.po | 4255 ++++++----- ld/po/uk.po | 3264 ++++---- libctf/ChangeLog | 4 + libiberty/ChangeLog | 8 + libiberty/regex.c | 4 + opcodes/ChangeLog | 14 + opcodes/Makefile.in | 1 - opcodes/configure | 20 +- opcodes/po/de.po | 512 +- opcodes/po/opcodes.pot | 2 +- opcodes/po/ro.po | 2948 +++++-- opcodes/po/uk.po | 530 +- 74 files changed, 45838 insertions(+), 26645 deletions(-) delete mode 100644 bfd/doc/Makefile.am delete mode 100644 bfd/doc/Makefile.in create mode 100644 bfd/doc/local.mk -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig updated (a21d10cff -> 9d4220ab8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig in repository toolchain/ci/base-artifacts. discards a21d10cff 4: update: binutils-llvm-linux-qemu: 40 new 9d4220ab8 4: update: binutils-llvm-linux-qemu: 40 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a21d10cff) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1592 -> 1736 bytes 02-prepare_abe/console.log.xz | Bin 2780 -> 2784 bytes 03-build_abe-binutils/console.log.xz | Bin 31244 -> 31060 bytes 04-build_llvm/console.log.xz | Bin 60636 -> 61196 bytes 05-build_abe-qemu/console.log.xz | Bin 30952 -> 30804 bytes 06-build_linux/console.log.xz | Bin 4060 -> 4068 bytes 08-check_regression/console.log.xz | Bin 472 -> 472 bytes 09-update_baseline/console.log | 210 +++++++++++++++++------------------ jenkins/manifest.sh | 16 +-- 9 files changed, 113 insertions(+), 113 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[gcc] branch master updated (480caa1f4ab -> 9099e0bc666)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 480caa1f4ab libfortran: Provide fallback __issignalingl for IBM extende [...] new 9099e0bc666 aix: AIX is not GLIBC. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/config/rs6000/aix.h | 1 + 1 file changed, 1 insertion(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm updated (f4ee27d3262 -> 480caa1f4ab)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm in repository toolchain/ci/gcc. from f4ee27d3262 rs6000: Remove GCC 8.1 U10__float128 mangling compatibility [...] adds c0a4a658097 Fortran: fix typo in signaling NaN testcase adds d0336ab4e7e Fortran: do not run signaling testsuite on 32-bit x86/x86_64 adds 0d56eb93aa6 Fortran: fix preprocessor condition adds ab2a2457780 libgcc: Fix _Unwind_Find_FDE for missing unwind data with g [...] adds 2e211a02290 tree-optimization/104214 - amend PR100740 fix for pointer compares adds 480caa1f4ab libfortran: Provide fallback __issignalingl for IBM extende [...] No new revisions were added by this update. Summary of changes: gcc/testsuite/gcc.dg/vect/pr81196-2.c | 16 ++++++++++++++++ gcc/testsuite/gfortran.dg/ieee/signaling_1.f90 | 4 ++-- gcc/testsuite/gfortran.dg/ieee/signaling_3.f90 | 3 ++- gcc/tree-ssa-loop-niter.cc | 15 ++++++++++++--- libgcc/unwind-dw2-fde-dip.c | 2 +- libgfortran/ieee/issignaling_fallback.h | 15 ++++++++++++++- 6 files changed, 47 insertions(+), 8 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/vect/pr81196-2.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm updated (de94cc139 -> 4829fce49)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm in repository toolchain/ci/base-artifacts. discards de94cc139 0: update: binutils-gcc-linux-glibc-gdb-qemu: 1 new 4829fce49 0: update: binutils-gcc-linux-glibc-gdb-qemu: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (de94cc139) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_cross_check_gcc/mast [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1528 -> 1556 bytes 02-prepare_abe/console.log.xz | Bin 2776 -> 2776 bytes 03-build_abe-binutils/console.log.xz | Bin 30232 -> 30200 bytes 04-build_abe-stage1/console.log.xz | Bin 91660 -> 90748 bytes 05-clean_sysroot/console.log.xz | Bin 332 -> 332 bytes 06-build_abe-linux/console.log.xz | Bin 9020 -> 8928 bytes 07-build_abe-glibc/console.log.xz | Bin 231816 -> 233412 bytes 08-build_abe-stage2/console.log.xz | Bin 229312 -> 231156 bytes 09-build_abe-gdb/console.log.xz | Bin 37336 -> 36968 bytes 10-build_abe-qemu/console.log.xz | Bin 30384 -> 30824 bytes 11-build_abe-dejagnu/console.log.xz | Bin 3888 -> 3856 bytes 12-build_abe-check_gcc/console.log.xz | Bin 3468 -> 2968 bytes 13-check_regression/console.log.xz | Bin 2576 -> 2676 bytes 13-check_regression/results.compare | 24 +- 13-check_regression/results.compare2 | 40 +- 14-update_baseline/console.log | 396 +++--- 14-update_baseline/results.compare | 24 +- 14-update_baseline/results.compare2 | 40 +- jenkins/manifest.sh | 10 +- sumfiles/g++.log.xz | Bin 2637168 -> 2621248 bytes sumfiles/g++.sum | 114 +- sumfiles/gcc.log.xz | Bin 2150856 -> 2174296 bytes sumfiles/gcc.sum | 2432 +++++++++++++++++---------------- sumfiles/gfortran.log.xz | Bin 875064 -> 870296 bytes sumfiles/gfortran.sum | 46 +- sumfiles/libatomic.log.xz | Bin 2260 -> 2260 bytes sumfiles/libatomic.sum | 4 +- sumfiles/libgomp.log.xz | Bin 184364 -> 184288 bytes sumfiles/libgomp.sum | 16 +- sumfiles/libitm.log.xz | Bin 2676 -> 2676 bytes sumfiles/libitm.sum | 6 +- sumfiles/libstdc++.log.xz | Bin 423796 -> 423736 bytes sumfiles/libstdc++.sum | 14 +- 33 files changed, 1596 insertions(+), 1570 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allyesconfig updated (5e9d14f2be -> aeb0ae95b7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allyesconfig in repository toolchain/ci/qemu. from 5e9d14f2be Merge remote-tracking branch 'remotes/alistair/tags/pull-ris [...] adds 1e4d8b31be python: pin setuptools below v60.0.0 adds 57a6b4478c python: use avocado's "new" runner adds dc6877bd2e python/aqmp: fix docstring typo adds 3bc72e3aed python/aqmp: add __del__ method to legacy interface adds 3b5bf136f5 python/aqmp: handle asyncio.TimeoutError on execute() adds 0e6bfd8b96 python/aqmp: copy type definitions from qmp adds 728dcac5e3 python/aqmp: add SocketAddrT to package root adds 6e7751dc38 python/aqmp: rename AQMPError to QMPError adds 7017f3853a python/qemu-ga-client: don't use deprecated CLI syntax in us [...] adds 26db07516f python/qmp: switch qemu-ga-client to AQMP adds 8d6cdc5118 python/qmp: switch qom tools to AQMP adds f3efd12930 python/qmp: switch qmp-shell to AQMP adds 0347c4c4cf python: move qmp utilities to python/qemu/utils adds fd9c3a6219 python: move qmp-shell under the AQMP package adds 9922125615 scripts/cpu-x86-uarch-abi: fix CLI parsing adds 0665410dcf scripts/cpu-x86-uarch-abi: switch to AQMP adds 0590860242 scripts/render-block-graph: switch to AQMP adds aeb0ae95b7 Merge remote-tracking branch 'remotes/jsnow-gitlab/tags/pyth [...] No new revisions were added by this update. Summary of changes: python/Makefile | 2 ++ python/README.rst | 2 +- python/avocado.cfg | 2 +- python/qemu/aqmp/__init__.py | 16 ++++++++--- python/qemu/aqmp/error.py | 12 ++++---- python/qemu/aqmp/events.py | 4 +-- python/qemu/aqmp/legacy.py | 41 +++++++++++++++++++++++++++- python/qemu/aqmp/protocol.py | 24 +++++++++------- python/qemu/aqmp/qmp_client.py | 16 +++++++---- python/qemu/{qmp => aqmp}/qmp_shell.py | 31 +++++++++++---------- python/qemu/{qmp => utils}/qemu_ga_client.py | 24 ++++++++-------- python/qemu/{qmp => utils}/qom.py | 5 ++-- python/qemu/{qmp => utils}/qom_common.py | 3 +- python/qemu/{qmp => utils}/qom_fuse.py | 11 ++++---- python/setup.cfg | 19 +++++++------ scripts/cpu-x86-uarch-abi.py | 7 ++--- scripts/qmp/qemu-ga-client | 2 +- scripts/qmp/qmp-shell | 2 +- scripts/qmp/qom-fuse | 2 +- scripts/qmp/qom-get | 2 +- scripts/qmp/qom-list | 2 +- scripts/qmp/qom-set | 2 +- scripts/qmp/qom-tree | 2 +- scripts/render_block_graph.py | 8 ++---- 24 files changed, 151 insertions(+), 90 deletions(-) rename python/qemu/{qmp => aqmp}/qmp_shell.py (96%) rename python/qemu/{qmp => utils}/qemu_ga_client.py (94%) rename python/qemu/{qmp => utils}/qom.py (98%) rename python/qemu/{qmp => utils}/qom_common.py (98%) rename python/qemu/{qmp => utils}/qom_fuse.py (97%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allyesconfig updated (448e9a53939 -> 79b0091b13e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allyesconfig in repository toolchain/ci/gcc. from 448e9a53939 Daily bump. adds 99566992720 Daily bump. adds 8adfe466f55 Daily bump. adds a8c23451936 Fortran: fix ICE and wrong code with TRANSFER and CHARACTER [...] adds 11581a272eb Daily bump. adds 520147ba19d x86: Also check mode of memory broadcast in bcst_mem_operand adds c239267759b c: Fix ICE on deferred pragma in unknown attribute argument [...] adds 2712f1249e0 optabs: Fix up checking for CALLs in newly added code by do [...] adds 06142a317a4 loop-invariant: Fix -fcompare-debug failure [PR103837] adds fbc542de1bc fold-const: Fix up fold_truth_andor_1 shift handling [PR103813] adds a4e45a579e2 shrink-wrapping: Fix up prologue block discovery [PR103860] adds be66fad59a7 c-family: Use BULTINS_LOCATION for predefined macros change [...] adds 533695ca333 libcpp: Fix up ##__VA_OPT__ handling [PR89971] adds 27cfe106823 objc: Fix handling of break stmt inside of switch inside of [...] adds 0dd533da49c ifcvt: Check for asm goto at the end of then_bb/else_bb in [...] adds 18abe529d09 c++: Ensure some more that immediate functions aren't gimpl [...] adds 777b73e4598 c-family: Fix up -W*conversion on bitwise &/|/^ [PR101537] adds cb4998fcdf2 c++: Silence -Wuseless-cast warnings during move [PR103480] adds 91ac88cada3 c++: Fix handling of temporaries with consteval ctors and n [...] adds 8e4c410bb02 i386: Fix *aes<aeswideklvariant>u8 adds baf18a6d47c match.pd, optabs: Avoid vectorization of {FLOOR,CEIL,ROUND} [...] adds 3991e4c752b dwarf2out: Fix -gsplit-dwarf on riscv [PR103874] adds 505b418a40a optabs: Don't create pseudos in prepare_cmp_insn when not a [...] adds ce3954262a6 gcc-changelog: sync from master. adds 9f2201bf48e c++: ICE with noexcept and canonical types [PR101715] adds c403f6ce077 Daily bump. new 79b0091b13e rs6000: Remove GCC 8.1 U10__float128 mangling compatibility [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: contrib/ChangeLog | 6 + contrib/gcc-changelog/git_commit.py | 12 +- contrib/gcc-changelog/test_email.py | 5 + contrib/gcc-changelog/test_patches.txt | 82 +++++++++++ gcc/ChangeLog | 108 +++++++++++++++ gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 20 +++ gcc/c-family/c-cppbuiltin.c | 6 + gcc/c-family/c-warn.c | 28 ++++ gcc/c/ChangeLog | 18 +++ gcc/c/c-parser.c | 5 + gcc/c/c-typeck.c | 3 +- gcc/config/aarch64/aarch64-c.c | 2 + gcc/config/arm/arm-c.c | 2 + gcc/config/i386/i386-c.c | 4 + gcc/config/i386/predicates.md | 2 + gcc/config/i386/sse.md | 2 +- gcc/config/rs6000/rs6000-call.c | 12 -- gcc/config/rs6000/rs6000-internal.h | 3 - gcc/config/rs6000/rs6000.c | 53 +------- gcc/config/s390/s390-c.c | 2 + gcc/cp/ChangeLog | 42 ++++++ gcc/cp/constexpr.c | 6 +- gcc/cp/decl2.c | 1 + gcc/cp/semantics.c | 11 ++ gcc/cp/tree.c | 24 +++- gcc/dwarf2out.c | 5 +- gcc/fold-const.c | 14 +- gcc/fortran/ChangeLog | 12 ++ gcc/fortran/target-memory.c | 2 +- gcc/fortran/trans-intrinsic.c | 17 ++- gcc/ifcvt.c | 6 + gcc/loop-invariant.c | 19 ++- gcc/match.pd | 15 +- gcc/optabs-tree.c | 21 ++- gcc/optabs.c | 16 ++- gcc/shrink-wrap.c | 5 +- gcc/testsuite/ChangeLog | 159 ++++++++++++++++++++++ gcc/testsuite/c-c++-common/cpp/va-opt-9.c | 20 +++ gcc/testsuite/c-c++-common/pr101537.c | 26 ++++ gcc/testsuite/c-c++-common/pr103881.c | 20 +++ gcc/testsuite/g++.dg/cpp/pr103012.C | 18 +++ gcc/testsuite/g++.dg/cpp0x/noexcept72.C | 21 +++ gcc/testsuite/g++.dg/cpp0x/noexcept73.C | 13 ++ gcc/testsuite/g++.dg/cpp2a/consteval26.C | 39 ++++++ gcc/testsuite/g++.dg/cpp2a/consteval27.C | 18 +++ gcc/testsuite/g++.dg/warn/Wuseless-cast2.C | 24 ++++ gcc/testsuite/g++.target/i386/pr103012.C | 19 +++ gcc/testsuite/gcc.c-torture/compile/pr103813.c | 10 ++ gcc/testsuite/gcc.dg/debug/dwarf2/pr103874.c | 12 ++ gcc/testsuite/gcc.dg/pr102478.c | 29 ++++ gcc/testsuite/gcc.dg/pr103587.c | 7 + gcc/testsuite/gcc.dg/pr103837.c | 19 +++ gcc/testsuite/gcc.dg/pr103838.c | 28 ++++ gcc/testsuite/gcc.dg/pr103860.c | 31 +++++ gcc/testsuite/gcc.target/i386/pr103908.c | 24 ++++ gcc/testsuite/gcc.target/i386/pr104188.c | 70 ++++++++++ gcc/testsuite/gfortran.dg/pr102860.f90 | 10 ++ gcc/testsuite/gfortran.dg/transfer_char_kind4.f90 | 115 ++++++++++++++++ gcc/testsuite/objc.dg/pr103639.m | 101 ++++++++++++++ libcpp/ChangeLog | 9 ++ libcpp/macro.c | 5 + 62 files changed, 1336 insertions(+), 104 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/cpp/va-opt-9.c create mode 100644 gcc/testsuite/c-c++-common/pr101537.c create mode 100644 gcc/testsuite/c-c++-common/pr103881.c create mode 100644 gcc/testsuite/g++.dg/cpp/pr103012.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/noexcept72.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/noexcept73.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/consteval26.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/consteval27.C create mode 100644 gcc/testsuite/g++.dg/warn/Wuseless-cast2.C create mode 100644 gcc/testsuite/g++.target/i386/pr103012.C create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr103813.c create mode 100644 gcc/testsuite/gcc.dg/debug/dwarf2/pr103874.c create mode 100644 gcc/testsuite/gcc.dg/pr102478.c create mode 100644 gcc/testsuite/gcc.dg/pr103587.c create mode 100644 gcc/testsuite/gcc.dg/pr103837.c create mode 100644 gcc/testsuite/gcc.dg/pr103838.c create mode 100644 gcc/testsuite/gcc.dg/pr103860.c create mode 100644 gcc/testsuite/gcc.target/i386/pr103908.c create mode 100644 gcc/testsuite/gcc.target/i386/pr104188.c create mode 100644 gcc/testsuite/gfortran.dg/pr102860.f90 create mode 100644 gcc/testsuite/gfortran.dg/transfer_char_kind4.f90 create mode 100644 gcc/testsuite/objc.dg/pr103639.m -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allyesconfig updated (544818c087 -> 5f62caec81)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allyesconfig in repository toolchain/ci/binutils-gdb. from 544818c087 Automatic date update in version.in adds 5f62caec81 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

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