Tcwg-commits September 2021

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14890 discussions

[gcc] branch master updated (a5873aadb6d -> 48b3caffcac)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from a5873aadb6d AVX512FP16: Add intrinsics for casting between vector float [...] new 687e30d9d74 Fix PR rtl-optimization/102306 new 61b03ade93b x86: Update -mtune=tremont new c3a2437fec1 x86: Update memcpy/memset inline strategies for -mtune=tremont new 16cca1806d2 x86: Properly handle USE_VECTOR_FP_CONVERTS/USE_VECTOR_CONVERTS new 48b3caffcac x86: Add TARGET_SSE_PARTIAL_REG_[FP_]CONVERTS_DEPENDENCY The 5 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/combine.c | 10 ++ gcc/common/config/i386/i386-common.c | 2 +- gcc/config/i386/i386-features.c | 25 ++++- gcc/config/i386/i386-options.c | 2 +- gcc/config/i386/i386.c | 1 + gcc/config/i386/i386.h | 4 + gcc/config/i386/i386.md | 9 +- gcc/config/i386/x86-tune-costs.h | 124 +++++++++++++++++++++++ gcc/config/i386/x86-tune-sched.c | 2 + gcc/config/i386/x86-tune.def | 52 ++++++---- gcc/testsuite/gcc.target/i386/avx-covert-1.c | 19 ++++ gcc/testsuite/gcc.target/i386/avx-fp-covert-1.c | 15 +++ gcc/testsuite/gcc.target/i386/avx-int-covert-1.c | 14 +++ gcc/testsuite/gcc.target/i386/pr101900-1.c | 18 ++++ gcc/testsuite/gcc.target/i386/pr101900-2.c | 18 ++++ gcc/testsuite/gcc.target/i386/pr101900-3.c | 19 ++++ gcc/testsuite/gcc.target/i386/sse-covert-1.c | 19 ++++ gcc/testsuite/gcc.target/i386/sse-fp-covert-1.c | 15 +++ gcc/testsuite/gcc.target/i386/sse-int-covert-1.c | 14 +++ gcc/testsuite/gcc.target/sparc/20210917-1.c | 19 ++++ 20 files changed, 375 insertions(+), 26 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/avx-covert-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx-fp-covert-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx-int-covert-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr101900-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr101900-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr101900-3.c create mode 100644 gcc/testsuite/gcc.target/i386/sse-covert-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse-fp-covert-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse-int-covert-1.c create mode 100644 gcc/testsuite/gcc.target/sparc/20210917-1.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[gcc] branch master updated (e19570d38fb -> a5873aadb6d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from e19570d38fb Daily bump. new 3069a2e5997 AVX512FP16: Add vcvtsh2si/vcvtsh2usi/vcvtsi2sh/vcvtusi2sh. new babaa0e521c AVX512FP16: Add testcase for vcvtsh2si/vcvtsh2usi/vcvtsi2sh [...] new c027accb424 AVX512FP16: Add vcvttph2w/vcvttph2uw/vcvttph2dq/vcvttph2qq/ [...] new 8691efe4007 AVX512FP16: Add testcase for vcvttph2w/vcvttph2uw/vcvttph2d [...] new 6babedbbaee AVX512FP16: Add vcvttsh2si/vcvttsh2usi. new 5a744e5056b AVX512FP16: Add vcvtph2pd/vcvtph2psx/vcvtpd2ph/vcvtps2phx. new 23fe603b4bf AVX512FP16: Add testcase for vcvtph2pd/vcvtph2psx/vcvtpd2ph [...] new 90429b962e2 AVX512FP16: Add vcvtsh2ss/vcvtsh2sd/vcvtss2sh/vcvtsd2sh. new 1ef291e68fa AVX512FP16: Add testcase for vcvtsh2sd/vcvtsh2ss/vcvtsd2sh/ [...] new a5873aadb6d AVX512FP16: Add intrinsics for casting between vector float [...] The 10 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/config/i386/avx512fp16intrin.h | 1566 +++++++++++++++++++- gcc/config/i386/avx512fp16vlintrin.h | 682 +++++++++ gcc/config/i386/i386-builtin-types.def | 24 + gcc/config/i386/i386-builtin.def | 46 + gcc/config/i386/i386-expand.c | 24 + gcc/config/i386/sse.md | 397 ++++- gcc/testsuite/gcc.target/i386/avx-1.c | 26 + gcc/testsuite/gcc.target/i386/avx512fp16-helper.h | 26 +- .../gcc.target/i386/avx512fp16-typecast-1.c | 44 + .../gcc.target/i386/avx512fp16-typecast-2.c | 43 + .../gcc.target/i386/avx512fp16-vcvtpd2ph-1a.c | 24 + .../gcc.target/i386/avx512fp16-vcvtpd2ph-1b.c | 82 + .../gcc.target/i386/avx512fp16-vcvtph2pd-1a.c | 24 + .../gcc.target/i386/avx512fp16-vcvtph2pd-1b.c | 78 + .../gcc.target/i386/avx512fp16-vcvtph2psx-1a.c | 24 + .../gcc.target/i386/avx512fp16-vcvtph2psx-1b.c | 81 + .../gcc.target/i386/avx512fp16-vcvtps2ph-1a.c | 24 + .../gcc.target/i386/avx512fp16-vcvtps2ph-1b.c | 84 ++ .../gcc.target/i386/avx512fp16-vcvtsd2sh-1a.c | 25 + .../gcc.target/i386/avx512fp16-vcvtsd2sh-1b.c | 60 + .../gcc.target/i386/avx512fp16-vcvtsh2sd-1a.c | 25 + .../gcc.target/i386/avx512fp16-vcvtsh2sd-1b.c | 57 + .../gcc.target/i386/avx512fp16-vcvtsh2si-1a.c | 17 + .../gcc.target/i386/avx512fp16-vcvtsh2si-1b.c | 54 + .../gcc.target/i386/avx512fp16-vcvtsh2si64-1a.c | 17 + .../gcc.target/i386/avx512fp16-vcvtsh2si64-1b.c | 52 + .../gcc.target/i386/avx512fp16-vcvtsh2ss-1a.c | 25 + .../gcc.target/i386/avx512fp16-vcvtsh2ss-1b.c | 59 + .../gcc.target/i386/avx512fp16-vcvtsh2usi-1a.c | 17 + .../gcc.target/i386/avx512fp16-vcvtsh2usi-1b.c | 54 + .../gcc.target/i386/avx512fp16-vcvtsh2usi64-1a.c | 16 + .../gcc.target/i386/avx512fp16-vcvtsh2usi64-1b.c | 53 + .../gcc.target/i386/avx512fp16-vcvtsi2sh-1a.c | 16 + .../gcc.target/i386/avx512fp16-vcvtsi2sh-1b.c | 41 + .../gcc.target/i386/avx512fp16-vcvtsi2sh64-1a.c | 16 + .../gcc.target/i386/avx512fp16-vcvtsi2sh64-1b.c | 41 + .../gcc.target/i386/avx512fp16-vcvtss2sh-1a.c | 25 + .../gcc.target/i386/avx512fp16-vcvtss2sh-1b.c | 60 + .../gcc.target/i386/avx512fp16-vcvttph2dq-1a.c | 24 + ...6-vcvtph2dq-1b.c => avx512fp16-vcvttph2dq-1b.c} | 24 +- .../gcc.target/i386/avx512fp16-vcvttph2qq-1a.c | 24 + ...6-vcvtph2qq-1b.c => avx512fp16-vcvttph2qq-1b.c} | 24 +- .../gcc.target/i386/avx512fp16-vcvttph2udq-1a.c | 24 + ...vcvtph2udq-1b.c => avx512fp16-vcvttph2udq-1b.c} | 24 +- .../gcc.target/i386/avx512fp16-vcvttph2uqq-1a.c | 24 + ...vcvtph2uqq-1b.c => avx512fp16-vcvttph2uqq-1b.c} | 24 +- .../gcc.target/i386/avx512fp16-vcvttph2uw-1a.c | 24 + ...6-vcvtph2uw-1b.c => avx512fp16-vcvttph2uw-1b.c} | 24 +- .../gcc.target/i386/avx512fp16-vcvttph2w-1a.c | 24 + ...p16-vcvtph2w-1b.c => avx512fp16-vcvttph2w-1b.c} | 24 +- .../gcc.target/i386/avx512fp16-vcvttsh2si-1a.c | 16 + .../gcc.target/i386/avx512fp16-vcvttsh2si-1b.c | 54 + .../gcc.target/i386/avx512fp16-vcvttsh2si64-1a.c | 16 + .../gcc.target/i386/avx512fp16-vcvttsh2si64-1b.c | 52 + .../gcc.target/i386/avx512fp16-vcvttsh2usi-1a.c | 16 + .../gcc.target/i386/avx512fp16-vcvttsh2usi-1b.c | 54 + .../gcc.target/i386/avx512fp16-vcvttsh2usi64-1a.c | 16 + .../gcc.target/i386/avx512fp16-vcvttsh2usi64-1b.c | 53 + .../gcc.target/i386/avx512fp16-vcvtusi2sh-1a.c | 16 + .../gcc.target/i386/avx512fp16-vcvtusi2sh-1b.c | 41 + .../gcc.target/i386/avx512fp16-vcvtusi2sh64-1a.c | 16 + .../gcc.target/i386/avx512fp16-vcvtusi2sh64-1b.c | 41 + .../gcc.target/i386/avx512fp16vl-typecast-1.c | 55 + .../gcc.target/i386/avx512fp16vl-typecast-2.c | 37 + .../gcc.target/i386/avx512fp16vl-vcvtpd2ph-1a.c | 28 + ...-vcvtph2dq-1b.c => avx512fp16vl-vcvtpd2ph-1b.c} | 4 +- .../gcc.target/i386/avx512fp16vl-vcvtph2pd-1a.c | 27 + ...-vcvtph2qq-1b.c => avx512fp16vl-vcvtph2pd-1b.c} | 4 +- .../gcc.target/i386/avx512fp16vl-vcvtph2psx-1a.c | 27 + ...vcvtph2qq-1b.c => avx512fp16vl-vcvtph2psx-1b.c} | 4 +- .../gcc.target/i386/avx512fp16vl-vcvtps2ph-1a.c | 27 + ...-vcvtph2qq-1b.c => avx512fp16vl-vcvtps2ph-1b.c} | 4 +- ...cvtph2uqq-1a.c => avx512fp16vl-vcvttph2dq-1a.c} | 24 +- ...vcvtph2qq-1b.c => avx512fp16vl-vcvttph2dq-1b.c} | 4 +- ...cvtph2uqq-1a.c => avx512fp16vl-vcvttph2qq-1a.c} | 24 +- ...vcvtph2qq-1b.c => avx512fp16vl-vcvttph2qq-1b.c} | 4 +- .../gcc.target/i386/avx512fp16vl-vcvttph2udq-1a.c | 27 + ...cvtdq2ph-1b.c => avx512fp16vl-vcvttph2udq-1b.c} | 4 +- .../gcc.target/i386/avx512fp16vl-vcvttph2uqq-1a.c | 27 + ...cvtph2qq-1b.c => avx512fp16vl-vcvttph2uqq-1b.c} | 4 +- .../gcc.target/i386/avx512fp16vl-vcvttph2uw-1a.c | 29 + ...vcvtph2qq-1b.c => avx512fp16vl-vcvttph2uw-1b.c} | 4 +- ...-vcvtph2uw-1a.c => avx512fp16vl-vcvttph2w-1a.c} | 24 +- ...-vcvtph2qq-1b.c => avx512fp16vl-vcvttph2w-1b.c} | 4 +- gcc/testsuite/gcc.target/i386/sse-13.c | 26 + gcc/testsuite/gcc.target/i386/sse-14.c | 56 + gcc/testsuite/gcc.target/i386/sse-22.c | 56 + gcc/testsuite/gcc.target/i386/sse-23.c | 26 + 88 files changed, 5105 insertions(+), 163 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-typecast-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-typecast-2.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtpd2ph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtpd2ph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2pd-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2pd-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2psx-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2psx-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtps2ph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtps2ph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsd2sh-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsd2sh-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2sd-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2sd-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si64-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si64-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2ss-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2ss-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi64-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi64-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsi2sh-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsi2sh-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsi2sh64-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsi2sh64-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtss2sh-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtss2sh-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvttph2dq-1a.c copy gcc/testsuite/gcc.target/i386/{avx512fp16-vcvtph2dq-1b.c => avx512fp16-vcvttp [...] create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvttph2qq-1a.c copy gcc/testsuite/gcc.target/i386/{avx512fp16-vcvtph2qq-1b.c => avx512fp16-vcvttp [...] create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvttph2udq-1a.c copy gcc/testsuite/gcc.target/i386/{avx512fp16-vcvtph2udq-1b.c => avx512fp16-vcvtt [...] create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvttph2uqq-1a.c copy gcc/testsuite/gcc.target/i386/{avx512fp16-vcvtph2uqq-1b.c => avx512fp16-vcvtt [...] create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvttph2uw-1a.c copy gcc/testsuite/gcc.target/i386/{avx512fp16-vcvtph2uw-1b.c => avx512fp16-vcvttp [...] create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvttph2w-1a.c copy gcc/testsuite/gcc.target/i386/{avx512fp16-vcvtph2w-1b.c => avx512fp16-vcvttph [...] create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2si-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2si-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2si64-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2si64-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2usi-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2usi-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2usi64-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2usi64-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtusi2sh-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtusi2sh-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtusi2sh64-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtusi2sh64-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-typecast-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-typecast-2.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtpd2ph-1a.c copy gcc/testsuite/gcc.target/i386/{avx512fp16vl-vcvtph2dq-1b.c => avx512fp16vl-vc [...] create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtph2pd-1a.c copy gcc/testsuite/gcc.target/i386/{avx512fp16vl-vcvtph2qq-1b.c => avx512fp16vl-vc [...] create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtph2psx-1a.c copy gcc/testsuite/gcc.target/i386/{avx512fp16vl-vcvtph2qq-1b.c => avx512fp16vl-vc [...] create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtps2ph-1a.c copy gcc/testsuite/gcc.target/i386/{avx512fp16vl-vcvtph2qq-1b.c => avx512fp16vl-vc [...] copy gcc/testsuite/gcc.target/i386/{avx512fp16vl-vcvtph2uqq-1a.c => avx512fp16vl-v [...] copy gcc/testsuite/gcc.target/i386/{avx512fp16vl-vcvtph2qq-1b.c => avx512fp16vl-vc [...] copy gcc/testsuite/gcc.target/i386/{avx512fp16vl-vcvtph2uqq-1a.c => avx512fp16vl-v [...] copy gcc/testsuite/gcc.target/i386/{avx512fp16vl-vcvtph2qq-1b.c => avx512fp16vl-vc [...] create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvttph2udq-1a.c copy gcc/testsuite/gcc.target/i386/{avx512fp16vl-vcvtdq2ph-1b.c => avx512fp16vl-vc [...] create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvttph2uqq-1a.c copy gcc/testsuite/gcc.target/i386/{avx512fp16vl-vcvtph2qq-1b.c => avx512fp16vl-vc [...] create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvttph2uw-1a.c copy gcc/testsuite/gcc.target/i386/{avx512fp16vl-vcvtph2qq-1b.c => avx512fp16vl-vc [...] copy gcc/testsuite/gcc.target/i386/{avx512fp16vl-vcvtph2uw-1a.c => avx512fp16vl-vc [...] copy gcc/testsuite/gcc.target/i386/{avx512fp16vl-vcvtph2qq-1b.c => avx512fp16vl-vc [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig updated (364dec0701 -> adfdd8afb9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig in repository toolchain/ci/binutils-gdb. from 364dec0701 Automatic date update in version.in adds 21f6dfdb29 Automatic date update in version.in adds 9d29d8c111 Automatic date update in version.in adds 14ba5a6161 Automatic date update in version.in adds adfdd8afb9 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig updated (b1aa21b2 -> 50fd7ac4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards b1aa21b2 0: update: binutils-llvm-linux-qemu: all new 50fd7ac4 0: update: binutils-adfdd8afb97fab03bf88e0c8e2e5bb03eb4d4e9a: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b1aa21b2) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1556 -> 1524 bytes 02-prepare_abe/console.log.xz | Bin 2768 -> 2756 bytes 03-build_abe-binutils/console.log.xz | Bin 41540 -> 42116 bytes 04-build_llvm/console.log.xz | Bin 57216 -> 56820 bytes 05-build_abe-qemu/console.log.xz | Bin 32152 -> 33524 bytes 06-build_linux/console.log.xz | Bin 4536 -> 6136 bytes 07-boot_linux/console.log.xz | Bin 496 -> 496 bytes 08-check_regression/console.log.xz | Bin 488 -> 524 bytes 09-update_baseline/console.log | 20 ++++++++++---------- jenkins/manifest.sh | 15 ++++++--------- 10 files changed, 16 insertions(+), 19 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/release-aarch64-bootstrap_lto updated (6dd2650f96c -> a6aa2458a92)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/release-aarch64-bootstrap_lto in repository toolchain/ci/gcc. from 6dd2650f96c Daily bump. adds a87d7fbef55 rs6000: Expand fmod and remainder when built with fast-math [...] adds 4fc907e18d1 Give more informative error message for by-reference types adds df2f733cd99 Remove superfluous call to UI_Is_In_Int_Range adds e94730e51af Fix internal error on pointer-to-pointer binding in LTO mode adds 1355ea50498 Fix inaccurate bounds in debug info for vector array types adds 82a95c08c0d Do not issue size error for too large array type adds 40c0122a1c5 Fix PR ada/101970 adds 4bcb3213f74 Verify destination[source] of a load[store] instruction is [...] adds e9a6a100046 Daily bump. adds 819e7784a06 rs6000: Move rs6000_split_multireg_move to later in file adds ed9006264f6 rs6000: Generate an lxvp instead of two adjacent lxv instructions adds b429c81170c Enable store fusion on Power10. adds 6f61195e043 c++: Fix __is_*constructible/assignable for templates [PR102305] adds 6550198bd84 c++: Update DECL_*SIZE for objects with flexible array memb [...] adds 352c0b2668a c++: Fix handling of decls with flexible array members init [...] adds 0287b697b01 Daily bump. adds f00530266f8 Fix target/101934: aarch64 memset code creates unaligned st [...] adds b602b667c05 sparc: Print out bit names for LEON and LEON3 with -mdebug adds 807c7e12486 sparc: Treat more instructions as load or store in errata w [...] adds f5b008faf0a sparc: Skip all empty assembly statements adds 7b30a12edf7 sparc: Prevent atomic instructions in beginning of function [...] adds 3fd9656951b sparc: Add NOP in stack_protect_setsi if sparc_fix_b2bst enabled adds c503f416f22 sparc: Add scheduling information for LEON5 adds 58c76fb477b Fortran - ensure simplification of bounds of array-valued n [...] adds 3bc4ed08514 Fortran - fix handling of substring start and end indices adds a6aa2458a92 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 108 + gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 35 + gcc/ada/exp_attr.adb | 23 +- gcc/ada/gcc-interface/decl.c | 25 +- gcc/ada/gcc-interface/utils.c | 9 +- gcc/config/aarch64/aarch64.c | 4 +- gcc/config/rs6000/rs6000-cpus.def | 4 +- gcc/config/rs6000/rs6000.c | 3228 ++++++++++---------- gcc/config/rs6000/rs6000.md | 36 + gcc/config/rs6000/rs6000.opt | 4 + gcc/config/sparc/leon5.md | 103 + gcc/config/sparc/sparc-opts.h | 1 + gcc/config/sparc/sparc.c | 183 +- gcc/config/sparc/sparc.h | 36 +- gcc/config/sparc/sparc.md | 12 +- gcc/config/sparc/sparc.opt | 3 + gcc/cp/ChangeLog | 29 + gcc/cp/decl.c | 32 + gcc/cp/method.c | 1 + gcc/cp/typeck2.c | 15 +- gcc/doc/invoke.texi | 13 +- gcc/fortran/ChangeLog | 19 + gcc/fortran/decl.c | 18 + gcc/fortran/expr.c | 4 +- gcc/testsuite/ChangeLog | 73 + gcc/testsuite/g++.dg/cpp0x/pr102305.C | 39 + gcc/testsuite/g++.dg/ext/flexary39.C | 65 + gcc/testsuite/g++.dg/ext/flexary40.C | 50 + gcc/testsuite/g++.target/i386/pr102295.C | 12 + .../gcc.target/aarch64/memset-strict-align-1.c | 28 + gcc/testsuite/gcc.target/powerpc/fusion-p10-stst.c | 31 + .../gcc.target/powerpc/fusion-p10-stst2.c | 30 + gcc/testsuite/gcc.target/powerpc/mma-builtin-9.c | 28 + gcc/testsuite/gcc.target/powerpc/pr97142.c | 35 + gcc/testsuite/gfortran.dg/pr82314.f90 | 11 + gcc/testsuite/gfortran.dg/substr_6.f90 | 2 + gcc/testsuite/gnat.dg/enum_rep2.adb | 117 + gcc/varasm.c | 12 +- 39 files changed, 2866 insertions(+), 1614 deletions(-) create mode 100644 gcc/config/sparc/leon5.md create mode 100644 gcc/testsuite/g++.dg/cpp0x/pr102305.C create mode 100644 gcc/testsuite/g++.dg/ext/flexary39.C create mode 100644 gcc/testsuite/g++.dg/ext/flexary40.C create mode 100644 gcc/testsuite/g++.target/i386/pr102295.C create mode 100644 gcc/testsuite/gcc.target/aarch64/memset-strict-align-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fusion-p10-stst.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fusion-p10-stst2.c create mode 100644 gcc/testsuite/gcc.target/powerpc/mma-builtin-9.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr97142.c create mode 100644 gcc/testsuite/gfortran.dg/pr82314.f90 create mode 100644 gcc/testsuite/gnat.dg/enum_rep2.adb -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/release-aarch64-bootstrap_lto updated (21f6dfdb29 -> adfdd8afb9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/release-aarch64-bootstrap_lto in repository toolchain/ci/binutils-gdb. from 21f6dfdb29 Automatic date update in version.in adds 9d29d8c111 Automatic date update in version.in adds 14ba5a6161 Automatic date update in version.in adds adfdd8afb9 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/release-aarch64-bootstrap_lto updated (1bc6838d -> a5518c5a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/release-aarch64-bootstrap_lto in repository toolchain/ci/base-artifacts. discards 1bc6838d 0: update: binutils-gcc: 2 new a5518c5a 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1bc6838d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/release-aa [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1552 -> 1612 bytes 02-prepare_abe/console.log.xz | Bin 2780 -> 2772 bytes 04-build_abe-binutils/console.log.xz | Bin 52196 -> 51304 bytes 05-build_abe-bootstrap_lto/console.log.xz | Bin 265740 -> 265356 bytes 06-check_regression/console.log.xz | Bin 388 -> 420 bytes 07-update_baseline/console.log | 18 +++++++++--------- jenkins/manifest.sh | 14 +++++++------- 7 files changed, 16 insertions(+), 16 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto updated (9e58de3ce00 -> e2103982da7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto in repository toolchain/ci/gcc. from 9e58de3ce00 Fix PR lto/49664: liblto_plugin.so exports too many symbols adds 20f3c168205 Remove m32r{,le}-*-linux* support from GCC adds 03312cbd54f [aarch64] Fix target/95969: __builtin_aarch64_im_lane_bound [...] adds 8ea292591e4 i386: support micro-levels in target{,_clone} attrs [PR101696] adds 76b75018b3d c++: implement C++17 hardware interference size adds accf94329d6 Simplify 'gcc/diagnostic-spec.h:nowarn_map' setup adds 1985392242d Clarify 'key_type_t' to 'location_t' as used for 'gcc/diagn [...] adds 6c79057fae6 Don't maintain a warning spec for 'UNKNOWN_LOCATION'/'BUILT [...] adds 8d93ba93d3b Fortran - fix handling of substring start and end indices adds 104c05c5284 Fortran - ensure simplification of bounds of array-valued n [...] adds 07985c47dc7 Daily bump. adds 22abfa3166c c++: Fix warning on 32-bit x86 adds 4204740f649 AVX512FP16: Add vsqrtph/vrsqrtph/vsqrtsh/vrsqrtsh. adds c63657291c3 AVX512FP16: Add testcase for vsqrtph/vsqrtsh/vrsqrtph/vrsqrtsh. adds bf4c12404fb AVX512FP16: Add vrcpph/vrcpsh/vscalefph/vscalefsh. adds 03f0cbccb6d AVX512FP16: Add testcase for vrcpph/vrcpsh/vscalefph/vscalefsh. adds 8bed7617965 AVX512FP16: Add vreduceph/vreducesh/vrndscaleph/vrndscalesh. adds b6e944df4e3 AVX512FP16: Add testcase for vreduceph/vreducesh/vrndscalep [...] adds 8486e9f268b AVX512FP16: Add fpclass/getexp/getmant instructions. adds ebcdd004edf AVX512FP16: Add testcase for fpclass/getmant/getexp instructions. adds f1f5b1fbbbe Give more informative error message for by-reference types adds 45d32da2bc0 Remove superfluous call to UI_Is_In_Int_Range adds f3922acfdff Implement PR ada/101385 adds 3f89d5ebcca openmp: Add testing checks (whether lhs appears in operands [...] adds b29fc21482c testsuite: Use sync_long_long instead of sync_int_long for [...] adds caef5203d64 Fix internal error on pointer-to-pointer binding in LTO mode adds fad540552ff Strengthen compatibility warning for GCC builtins adds 26864014bba Fix internal error on broken import of vector intrinsics adds b9c35857d00 Fix inaccurate bounds in debug info for vector array types adds f349a8b5928 Do not issue size error for too large array type adds 9bb20299ba1 arc: Update ZOL pattern. adds bd55fa10271 Fix PR ada/101970 adds e2103982da7 testsuite: fix failing pytest tests No new revisions were added by this update. Summary of changes: contrib/ChangeLog | 9 + contrib/config-list.mk | 2 +- gcc/ChangeLog | 228 ++++ gcc/DATESTAMP | 2 +- .../building_executable_programs_with_gnat.rst | 11 +- gcc/ada/exp_attr.adb | 23 +- gcc/ada/gcc-interface/decl.c | 118 +- gcc/ada/gcc-interface/lang-specs.h | 7 +- gcc/ada/gcc-interface/utils.c | 9 +- gcc/ada/libgnat/s-aoinar.adb | 2 +- gcc/ada/libgnat/s-aomoar.adb | 2 +- gcc/ada/libgnat/s-aotase.adb | 2 +- gcc/ada/libgnat/s-atopex.adb | 38 +- gcc/ada/libgnat/s-atopri.ads | 7 +- gcc/c-family/ChangeLog | 6 + gcc/c-family/c-cppbuiltin.c | 14 + gcc/c-family/c.opt | 5 + gcc/common/config/i386/cpuinfo.h | 48 + gcc/common/config/i386/i386-cpuinfo.h | 8 + gcc/common/config/i386/i386-isas.h | 5 + gcc/config.gcc | 18 +- gcc/config/aarch64/aarch64-builtins.c | 35 + gcc/config/aarch64/aarch64.c | 22 + gcc/config/arc/arc.md | 8 +- gcc/config/arm/arm.c | 22 + gcc/config/i386/avx512fp16intrin.h | 1218 ++++++++++++++++++++ gcc/config/i386/avx512fp16vlintrin.h | 572 +++++++++ gcc/config/i386/i386-builtin-types.def | 11 + gcc/config/i386/i386-builtin.def | 36 + gcc/config/i386/i386-builtins.c | 22 +- gcc/config/i386/i386-expand.c | 15 + gcc/config/i386/i386-options.c | 6 + gcc/config/i386/sse.md | 178 ++- gcc/config/m32r/linux.h | 91 -- gcc/config/m32r/t-linux | 20 - gcc/cp/ChangeLog | 25 + gcc/cp/constexpr.c | 33 + gcc/cp/decl.c | 33 + gcc/diagnostic-spec.c | 24 +- gcc/diagnostic-spec.h | 6 +- gcc/doc/extend.texi | 12 + gcc/doc/invoke.texi | 65 ++ gcc/fortran/ChangeLog | 13 + gcc/fortran/decl.c | 18 + gcc/fortran/expr.c | 4 +- gcc/gimplify.c | 133 ++- gcc/params.opt | 16 + gcc/testsuite/ChangeLog | 101 ++ gcc/testsuite/c-c++-common/gomp/atomic-29.c | 11 +- gcc/testsuite/g++.dg/gcov/gcov.py | 5 +- gcc/testsuite/g++.dg/warn/Winterference-2.C | 14 + gcc/testsuite/g++.dg/warn/Winterference.C | 6 + gcc/testsuite/g++.dg/warn/Winterference.H | 7 + gcc/testsuite/g++.target/aarch64/interference.C | 9 + gcc/testsuite/g++.target/arm/interference.C | 9 + gcc/testsuite/g++.target/i386/interference.C | 8 + gcc/testsuite/g++.target/i386/mv30.C | 50 + gcc/testsuite/gcc.target/aarch64/lane-bound-1.c | 14 + gcc/testsuite/gcc.target/aarch64/lane-bound-2.c | 10 + gcc/testsuite/gcc.target/i386/avx-1.c | 22 + gcc/testsuite/gcc.target/i386/avx512fp16-helper.h | 2 + .../gcc.target/i386/avx512fp16-vfpclassph-1a.c | 16 + .../gcc.target/i386/avx512fp16-vfpclassph-1b.c | 77 ++ .../gcc.target/i386/avx512fp16-vfpclasssh-1a.c | 16 + .../gcc.target/i386/avx512fp16-vfpclasssh-1b.c | 76 ++ .../gcc.target/i386/avx512fp16-vgetexpph-1a.c | 24 + .../gcc.target/i386/avx512fp16-vgetexpph-1b.c | 99 ++ .../gcc.target/i386/avx512fp16-vgetexpsh-1a.c | 24 + .../gcc.target/i386/avx512fp16-vgetexpsh-1b.c | 61 + .../gcc.target/i386/avx512fp16-vgetmantph-1a.c | 24 + .../gcc.target/i386/avx512fp16-vgetmantph-1b.c | 102 ++ .../gcc.target/i386/avx512fp16-vgetmantsh-1a.c | 24 + .../gcc.target/i386/avx512fp16-vgetmantsh-1b.c | 62 + .../gcc.target/i386/avx512fp16-vrcpph-1a.c | 19 + .../gcc.target/i386/avx512fp16-vrcpph-1b.c | 79 ++ .../gcc.target/i386/avx512fp16-vrcpsh-1a.c | 18 + .../gcc.target/i386/avx512fp16-vrcpsh-1b.c | 57 + .../gcc.target/i386/avx512fp16-vreduceph-1a.c | 26 + .../gcc.target/i386/avx512fp16-vreduceph-1b.c | 116 ++ .../gcc.target/i386/avx512fp16-vreducesh-1a.c | 26 + .../gcc.target/i386/avx512fp16-vreducesh-1b.c | 78 ++ .../gcc.target/i386/avx512fp16-vrndscaleph-1a.c | 26 + .../gcc.target/i386/avx512fp16-vrndscaleph-1b.c | 101 ++ .../gcc.target/i386/avx512fp16-vrndscalesh-1a.c | 25 + .../gcc.target/i386/avx512fp16-vrndscalesh-1b.c | 62 + .../gcc.target/i386/avx512fp16-vrsqrtph-1a.c | 19 + .../gcc.target/i386/avx512fp16-vrsqrtph-1b.c | 77 ++ .../gcc.target/i386/avx512fp16-vrsqrtsh-1a.c | 18 + .../gcc.target/i386/avx512fp16-vrsqrtsh-1b.c | 59 + .../gcc.target/i386/avx512fp16-vscalefph-1a.c | 25 + .../gcc.target/i386/avx512fp16-vscalefph-1b.c | 94 ++ .../gcc.target/i386/avx512fp16-vscalefsh-1a.c | 23 + .../gcc.target/i386/avx512fp16-vscalefsh-1b.c | 58 + .../gcc.target/i386/avx512fp16-vsqrtph-1a.c | 24 + .../gcc.target/i386/avx512fp16-vsqrtph-1b.c | 92 ++ .../gcc.target/i386/avx512fp16-vsqrtsh-1a.c | 23 + .../gcc.target/i386/avx512fp16-vsqrtsh-1b.c | 60 + .../gcc.target/i386/avx512fp16vl-vfpclassph-1a.c | 22 + .../gcc.target/i386/avx512fp16vl-vfpclassph-1b.c | 16 + .../gcc.target/i386/avx512fp16vl-vgetexpph-1a.c | 26 + .../gcc.target/i386/avx512fp16vl-vgetexpph-1b.c | 16 + .../gcc.target/i386/avx512fp16vl-vgetmantph-1a.c | 30 + .../gcc.target/i386/avx512fp16vl-vgetmantph-1b.c | 16 + .../gcc.target/i386/avx512fp16vl-vrcpph-1a.c | 29 + .../gcc.target/i386/avx512fp16vl-vrcpph-1b.c | 16 + .../gcc.target/i386/avx512fp16vl-vreduceph-1a.c | 30 + .../gcc.target/i386/avx512fp16vl-vreduceph-1b.c | 16 + .../gcc.target/i386/avx512fp16vl-vrndscaleph-1a.c | 30 + .../gcc.target/i386/avx512fp16vl-vrndscaleph-1b.c | 16 + .../gcc.target/i386/avx512fp16vl-vrsqrtph-1a.c | 29 + .../gcc.target/i386/avx512fp16vl-vrsqrtph-1b.c | 16 + .../gcc.target/i386/avx512fp16vl-vscalefph-1a.c | 29 + .../gcc.target/i386/avx512fp16vl-vscalefph-1b.c | 16 + .../gcc.target/i386/avx512fp16vl-vsqrtph-1a.c | 29 + .../gcc.target/i386/avx512fp16vl-vsqrtph-1b.c | 16 + gcc/testsuite/gcc.target/i386/builtin_target.c | 2 + gcc/testsuite/gcc.target/i386/mvc16.c | 15 + gcc/testsuite/gcc.target/i386/sse-13.c | 22 + gcc/testsuite/gcc.target/i386/sse-14.c | 66 ++ gcc/testsuite/gcc.target/i386/sse-22.c | 63 + gcc/testsuite/gcc.target/i386/sse-23.c | 22 + gcc/testsuite/gfortran.dg/pr82314.f90 | 11 + gcc/testsuite/gfortran.dg/substr_6.f90 | 2 + gcc/testsuite/gnat.dg/enum_rep2.adb | 117 ++ gcc/testsuite/lib/target-supports.exp | 2 +- gcc/warning-control.cc | 81 +- libgcc/ChangeLog | 6 + libgcc/config.host | 6 - libgcc/config/m32r/libgcc-glibc.ver | 48 - libgcc/config/m32r/t-linux | 5 - libgfortran/ChangeLog | 6 + libstdc++-v3/ChangeLog | 5 + libstdc++-v3/include/std/version | 3 + libstdc++-v3/libsupc++/new | 10 +- lto-plugin/ChangeLog | 6 + 135 files changed, 5697 insertions(+), 479 deletions(-) delete mode 100644 gcc/config/m32r/linux.h delete mode 100644 gcc/config/m32r/t-linux create mode 100644 gcc/testsuite/g++.dg/warn/Winterference-2.C create mode 100644 gcc/testsuite/g++.dg/warn/Winterference.C create mode 100644 gcc/testsuite/g++.dg/warn/Winterference.H create mode 100644 gcc/testsuite/g++.target/aarch64/interference.C create mode 100644 gcc/testsuite/g++.target/arm/interference.C create mode 100644 gcc/testsuite/g++.target/i386/interference.C create mode 100644 gcc/testsuite/g++.target/i386/mv30.C create mode 100644 gcc/testsuite/gcc.target/aarch64/lane-bound-1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/lane-bound-2.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vfpclassph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vfpclassph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vfpclasssh-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vfpclasssh-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vgetexpph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vgetexpph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vgetexpsh-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vgetexpsh-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vgetmantph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vgetmantph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vgetmantsh-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vgetmantsh-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vrcpph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vrcpph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vrcpsh-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vrcpsh-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vreduceph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vreduceph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vreducesh-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vreducesh-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vrndscaleph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vrndscaleph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vrndscalesh-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vrndscalesh-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vrsqrtph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vrsqrtph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vrsqrtsh-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vrsqrtsh-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vscalefph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vscalefph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vscalefsh-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vscalefsh-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vsqrtph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vsqrtph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vsqrtsh-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vsqrtsh-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vfpclassph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vfpclassph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vgetexpph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vgetexpph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vgetmantph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vgetmantph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vrcpph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vrcpph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vreduceph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vreduceph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vrndscaleph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vrndscaleph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vrsqrtph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vrsqrtph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vscalefph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vscalefph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vsqrtph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vsqrtph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/mvc16.c create mode 100644 gcc/testsuite/gfortran.dg/pr82314.f90 create mode 100644 gcc/testsuite/gnat.dg/enum_rep2.adb delete mode 100644 libgcc/config/m32r/libgcc-glibc.ver delete mode 100644 libgcc/config/m32r/t-linux -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto updated (f7d4c216 -> dbff4b03)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto in repository toolchain/ci/base-artifacts. from f7d4c216 1: reset: gcc-9e58de3ce00fc2385c9efb7faf321e0c601f0b0c: 1 new dbff4b03 2: update: gcc-e2103982da7be8781900653a5f7c5a5d0a57d38a: 1 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1560 -> 1536 bytes 02-prepare_abe/console.log.xz | Bin 2752 -> 2760 bytes 04-build_abe-binutils/console.log.xz | Bin 65028 -> 63968 bytes 05-build_abe-bootstrap_lto/console.log.xz | Bin 129720 -> 130224 bytes 06-check_regression/console.log.xz | Bin 1172 -> 416 bytes 06-check_regression/jira-body.txt | 2 -- 06-check_regression/mail-body.txt | 27 ------------------- 06-check_regression/mail-subject.txt | 1 - 06-check_regression/results.regressions | 7 ----- 06-check_regression/trigger-bisect | 2 -- 07-update_baseline/console.log | 42 +++++++++++++++++++++++++++--- jenkins/manifest.sh | 10 +++---- mail/jira-body.txt | 5 ---- mail/mail-body.txt | 30 --------------------- mail/mail-subject.txt | 1 - reset-baseline | 0 results | 7 ----- 17 files changed, 43 insertions(+), 91 deletions(-) delete mode 100644 06-check_regression/jira-body.txt delete mode 100644 06-check_regression/mail-body.txt delete mode 100644 06-check_regression/mail-subject.txt delete mode 100644 06-check_regression/results.regressions delete mode 100644 06-check_regression/trigger-bisect delete mode 100644 mail/jira-body.txt delete mode 100644 mail/mail-body.txt delete mode 100644 mail/mail-subject.txt delete mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig updated (bd662023e6 -> d1fe59377b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig in repository toolchain/ci/qemu. from bd662023e6 Merge remote-tracking branch 'remotes/mcayland/tags/qemu-ope [...] adds b5328172a9 target/sparc: Drop use of gen_io_end() adds f383eb80f6 tcg: Drop gen_io_end() adds e97a8a5926 sun4m: fix setting CPU id when more than one CPU is present adds 0e042025b9 escc: checkpatch fixes adds 9d248a4be5 escc: reset register values to zero in escc_reset() adds 8e8aa96590 escc: introduce escc_soft_reset_chn() for software reset adds bf4fbb69f3 escc: introduce escc_hard_reset_chn() for hardware reset adds 1f476e78a8 escc: implement soft reset as described in the datasheet adds 160509aebe escc: implement hard reset as described in the datasheet adds a04ca92a54 escc: remove register changes from escc_reset_chn() adds 99b0f05841 escc: re-use escc_reset_chn() for soft reset adds 15a2a1a4d1 escc: fix STATUS_SYNC bit in R_STATUS register adds 500f1f3e81 Merge remote-tracking branch 'remotes/mcayland/tags/qemu-spa [...] adds 17de3d5787 mac_via: introduce new VMStateDescription for q800 VIA1 and VIA2 adds ae6f236f4f mac_via: move last_b variable into q800 VIA1 VMStateDescription adds 8064d7bb54 mac_via: move PRAM contents and block backend to MOS6522Q800 [...] adds 741258b06c mac_via: move PRAM/RTC variables to MOS6522Q800VIA1State adds 5f083d4224 mac_via: move ADB variables to MOS6522Q800VIA1State adds 84e944b2af mac_via: move q800 VIA1 timer variables to q800 VIA1 VMState [...] adds 14562b375b mac_via: move VIA1 reset logic from mac_via_reset() to mos65 [...] adds 846ae7c636 mac_via: move VIA1 realize logic from mac_via_realize() to m [...] adds 02a68a3e65 mac_via: remove mac_via device adds 323f984908 mac_via: remove explicit viaN prefix from VIA IRQ gpios adds 812f06995b mac_via: rename VIA2_IRQ_SLOT_BIT to VIA2_IRQ_NUBUS_BIT adds dde602ae53 mac_via: add qdev gpios for nubus slot interrupts to VIA2 adds 6d1272d3ef Merge remote-tracking branch 'remotes/vivier/tags/q800-pull- [...] adds 47db243233 ps2: use the whole ps2 buffer but keep queue size adds 9e24b2dd77 ps2: use a separate keyboard command reply queue adds 4e9bddcbaa ps2: migration support for command reply queue adds 3bb6040663 Merge remote-tracking branch 'remotes/kraxel/tags/input-2021 [...] adds 381c42a186 bsd-user: remove sparc and sparc64 adds 310df056cb bsd-user: add copyright header to elfload.c adds 4c0a4fe65e bsd-user: Add Stacey's copyright to main.c adds b211b3681a bsd-user: add license to bsdload.c adds a8998784ae bsd-user: style nits: bsdload.c whitespace to qemu standard adds dd869a9665 bsd-user: Remove all non-x86 code from elfload.c adds 66ef252fab bsd-user: move arch specific defines out of elfload.c adds d37853f92f bsd-user: pass the bsd_param into loader_exec adds 223005f058 bsd-user: Fix calculation of size to allocate adds 1b50ff64a5 bsd-user: implement path searching adds 7ee0986965 bsd-user: Eliminate elf personality adds ffa0366553 bsd-user: remove a.out support adds d8fcdad2d6 bsd-user: TARGET_NGROUPS unused in this file, remove adds b62f790cfb bsd-user: elfload: simplify bswap a bit. adds d42df502e3 bsd-user: assume pthreads and support of __thread adds cce7ae5c06 bsd-user: add host-os.h adds d1dc9ab3af bsd-user: Include host-os.h from main adds 01a298a57e bsd-user: save the path to the qemu emulator adds e2a7472918 bsd-user: start to move target CPU functions to target_arch* adds 031fe7af8a bsd-user: Move per-cpu code into target_arch_cpu.h adds a8fe6d5d62 bsd-user: pull in target_arch_thread.h update target_arch_elf.h adds ab77bd844b bsd-user: Include more things in qemu.h adds e5e4426306 bsd-user: define max args in terms of pages adds 82792244da bsd-user: Create target specific vmparam.h adds 312a0b1cbf bsd-user: Add system independent stack, data and text limiting adds 790baacc63 bsd-user: *BSD specific siginfo defintions adds 03ecf078fa bsd-user: Implement --seed and initialize random state adds 534217f784 bsd-user: Move stack initializtion into a per-os file. adds c336094c5c bsd-user: Add architecture specific signal tramp code adds 98b34d354b bsd-user: elf cleanup adds 2ab2b01c2b bsd-user: Remove dead #ifdefs from elfload.c adds 366c5c9f8d bsd-user: Rewrite target system call definintion glue adds 6a3b9bfde0 bsd-user: update debugging in mmap.c adds e4442059dd bsd-user: Add target_arch_reg to describe a target's register set adds 25fb5d383d bsd-user: Add target_os_user.h to capture the user/kernel st [...] adds 0475f8fac5 bsd-user: add stubbed out core dump support adds 0456a1772b bsd-user: elfload.c style catch up patch adds c09f12feba bsd-user: Refactor load_elf_sections and is_target_elf_binary adds f0f7f9dca9 bsd-user: move gemu_log to later in the file adds 63cca1067a bsd-user: Implement interlock for atomic operations adds b8012648b3 bsd-user: Add '-0 argv0' option to bsd-user/main.c adds be04f210f9 bsd-user: Update mapping to handle reserved and starting conditions adds 99c44988d5 Merge remote-tracking branch 'remotes/bsdimp/tags/pull-bsd-u [...] adds 7b275cdd69 qapi: Fix a botched type annotation adds 916fca17c7 qapi: Drop Indentation.__bool__() adds e2ff14a574 qapi: Bury some unused code in class Indentation adds 71f03ef9f6 tests/qapi-schema: Cover 'not' condition with empty argument adds 62f27589f8 qapi: Fix bogus error for 'if': { 'not': '' } adds eae587e8e3 Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi- [...] adds 69e3895f9d target/i386: add missing bits to CR4_RESERVED_MASK adds 97afb47e15 target/i386: VMRUN and VMLOAD canonicalizations adds 900eeca579 target/i386: Added VGIF feature adds e3126a5c92 target/i386: Moved int_ctl into CPUX86State structure adds b67e2796a1 target/i386: Added VGIF V_IRQ masking capability adds 66a0201ba7 target/i386: Added ignore TPR check in ctl_has_irq adds 7760bb069f target/i386: Added changed priority check for VIRQ adds 52fb8ad37a target/i386: Added vVMLOAD and vVMSAVE feature adds 8a1f7d299c docs: standardize book titles to === with overline adds 06905f6402 docs: standardize directory index to --- with overline adds f0c1507a2b docs/system: standardize man page sections to --- with overline adds c2c7f3351a docs/system: move x86 CPU configuration to a separate document adds 95e2289fda meson.build: Do not look for VNC-related libraries if have_s [...] adds d051d0e14c meson: look up cp and dtrace with find_program() adds edc54640f9 meson: do not use python.full_path() unnecessarily adds 7b94203bfc meson: remove dead variable adds bf21fe9423 fw_cfg: add etc/msr_feature_control adds 37daf1ba85 util: Suppress -Wstringop-overflow in qemu_thread_start adds 5fd0711b85 Only check CONFIG_NVMM when NEED_CPU_H is defined adds 8d4cd3dd8b Fix nvmm_ram_block_added() function arguments adds d97327342e docs: link to archived Fedora code of conduct adds 7d79344d4f Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/fo [...] adds a89b91addf hw/misc: zynq_slcr: Correctly compute output clocks in the r [...] adds 62a3f63182 hw/char: cadence_uart: Disable transmit when input clock is [...] adds 983f4adf36 hw/char: cadence_uart: Move clock/reset check to uart_can_receive() adds 7956a8f5dd hw/char: cadence_uart: Convert to memop_with_attrs() ops adds 9834ecaaea hw/char: cadence_uart: Ignore access when unclocked or in re [...] adds 47c305f6f2 hw/char: cadence_uart: Log a guest error when device is uncl [...] adds d26f2f93c1 hw/arm/virt: KVM: Probe for KVM_CAP_ARM_VM_IPA_SIZE when cre [...] adds 3b8a4733d1 hw/arm: Add support for kudo-bmc board. adds 18f6290a6a hw/intc: GICv3 ITS initial framework adds 1b08e436d0 hw/intc: GICv3 ITS register definitions added adds 7eca39e071 hw/intc: GICv3 ITS command queue framework adds c694cb4cad hw/intc: GICv3 ITS Command processing adds ac30dec396 hw/intc: GICv3 ITS Feature enablement adds 17fb5e36aa hw/intc: GICv3 redistributor ITS processing adds d7830a9bdd tests/data/acpi/virt: Add IORT files for ITS adds 0e5c1c9a23 hw/arm/virt: add ITS support in virt GIC adds 0a93293eb2 tests/data/acpi/virt: Update IORT files for ITS adds 520d1621de target/arm: Take an exception if PSTATE.IL is set adds bc7edccae0 target/arm: Merge disas_a64_insn into aarch64_tr_translate_insn adds 1518562b49 qdev: Support marking individual buses as 'full' adds e6f79acd86 hw/arm/mps2-tz.c: Add extra data parameter to MakeDevFn adds 68e579515f hw/arm/mps2-tz.c: Mark internal-only I2C buses as 'full' adds 28e987a7e7 hw/arm/mps2.c: Mark internal-only I2C buses as 'full' adds c6f5e042d8 Merge remote-tracking branch 'remotes/pmaydell/tags/pull-tar [...] adds 4c9af1ea14 gitlab-ci: Make more custom runner jobs manual, and don't al [...] adds 7f800d34aa docs: add supported host CPU architectures section adds 2a2d51bc07 meson.build: fix comment typo adds 692277f38d chardev: Propagate error from logfile opening adds 5eed493d01 chardev: remove needless class method adds 78e3e1d046 chardev: add some comments about the class methods adds 831aaf2496 Merge remote-tracking branch 'remotes/marcandre/tags/misc-pu [...] adds 4e116893c6 accel/tcg: Add DisasContextBase argument to translator_ld* adds f025692c99 accel/tcg: Clear PAGE_WRITE before translation adds fc88a52318 tcg/i386: Split P_VEXW from P_REXW adds cf3fccba00 accel/tcg: remove redundant TCG_KICK_PERIOD define adds 57d4941602 tcg: Remove tcg_global_reg_new defines adds 2fa169ba61 tcg/ppc: Replace TCG_TARGET_CALL_DARWIN with _CALL_DARWIN adds d216898563 tcg/ppc: Ensure _CALL_SYSV is set for 32-bit ELF adds 421519d82c tcg/arm: Fix tcg_out_vec_op function signature adds d2470cf0e9 target/avr: Remove pointless use of CONFIG_USER_ONLY definition adds 7ce0886598 target/i386: Restrict sysemu-only fpu_helper helpers adds 30ca39244b target/i386: Simplify TARGET_X86_64 #ifdef'ry adds b40db05daa target/xtensa: Restrict do_transaction_failed() to sysemu adds 120964219d accel/tcg: Rename user-mode do_interrupt hack as fake_user_i [...] adds 9354e6947a target/alpha: Restrict cpu_exec_interrupt() handler to sysemu adds 083afd18a9 target/arm: Restrict cpu_exec_interrupt() handler to sysemu adds 413f858d39 target/cris: Restrict cpu_exec_interrupt() handler to sysemu adds 68fa1780e0 target/hppa: Restrict cpu_exec_interrupt() handler to sysemu adds 604664726f target/i386: Restrict cpu_exec_interrupt() handler to sysemu adds 0792e6c88d target/i386: Move x86_cpu_exec_interrupt() under sysemu/ folder adds d5db810c55 target/m68k: Restrict cpu_exec_interrupt() handler to sysemu adds eb3ef3136e target/microblaze: Restrict cpu_exec_interrupt() handler to sysemu adds 6eb66e086a target/mips: Restrict cpu_exec_interrupt() handler to sysemu adds dabfe1332e target/nios2: Restrict cpu_exec_interrupt() handler to sysemu adds 250ae6dfc7 target/openrisc: Restrict cpu_exec_interrupt() handler to sysemu adds f725245c52 target/ppc: Restrict cpu_exec_interrupt() handler to sysemu adds 17b3c353e6 target/riscv: Restrict cpu_exec_interrupt() handler to sysemu adds 73166ca348 target/sh4: Restrict cpu_exec_interrupt() handler to sysemu adds 798ac8b5e9 target/sparc: Restrict cpu_exec_interrupt() handler to sysemu adds 65c575b61e target/rx: Restrict cpu_exec_interrupt() handler to sysemu adds f364a7f968 target/xtensa: Restrict cpu_exec_interrupt() handler to sysemu adds 77c0fc4e55 accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() to sysemu adds 76d0042bb2 user: Remove cpu_get_pic_interrupt() stubs adds db17d2cdb1 accel/tcg/user-exec: Fix read-modify-write of code on s390 hosts adds e0e1ad61f6 tcg/arm: Remove fallback definition of __ARM_ARCH adds 326b9669b0 tcg/arm: Standardize on tcg_out_<branch>_{reg,imm} adds 4ae82ca7eb tcg/arm: Simplify use_armv5t_instructions adds b87c1add03 tcg/arm: Support armv4t in tcg_out_goto and tcg_out_call adds 31d160adc9 tcg/arm: Split out tcg_out_ldstm adds 90606715dc tcg/arm: Simplify usage of encode_imm adds 5f726ebce1 tcg/arm: Drop inline markers adds 1446600f7f tcg/arm: Give enum arm_cond_code_e a typedef and use it adds 142fb62fd0 tcg/arm: More use of the ARMInsn enum adds e028eada62 tcg/arm: More use of the TCGReg enum adds 0b6206b9c6 Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-t [...] adds 7b7ab2d6c9 gitlab-ci: Mark manual-only jobs as allow_failure adds e24154d878 gluster: Align block-status tail adds 33ff4c9e08 block: Drop BDS comment regarding bdrv_append() adds 0bc329fbb0 block: block-status cache for data regions adds 5a1cfd2150 block: Clarify that @bytes is no limit on *pnum adds 869e7ee827 block/file-posix: Do not force-cap *pnum adds 72b4cabe5e block/gluster: Do not force-cap *pnum adds 9dbf6455f4 block/iscsi: Do not force-cap *pnum adds 81dcb9ca1f iotests: Fix unspecified-encoding pylint warnings adds cc16153f1f iotests: Fix use-{list,dict}-literal warnings adds 26db7b23ce iotests/297: Drop 169 and 199 from the skip list adds e2ad17a62d migrate-bitmaps-postcopy-test: Fix pylint warnings adds d8c2e47dbe migrate-bitmaps-test: Fix pylint warnings adds b90d7a18b6 mirror-top-perms: Fix AbnormalShutdown path adds 098d983ea5 iotests/297: Cover tests/ adds 66fed30c9c block/mirror: fix NULL pointer dereference in mirror_wait_on [...] adds 2f43482733 tests: add migrate-during-backup adds a13de40a05 block: bdrv_inactivate_recurse(): check for permissions and [...] adds 5b3f7daaec simplebench: add img_bench_templater.py adds 6d207d3501 qcow2: refactor handle_dependencies() loop body adds ff812c5563 qcow2: handle_dependencies(): relax conflict detection adds a1c62436a4 qemu-img: Allow target be aligned to sector size adds 786c22d9c2 qcow2-refcount: improve style of check_refcounts_l2() adds 9a3978a46b qcow2: compressed read: simplify cluster descriptor passing adds a6e098462b qcow2: introduce qcow2_parse_compressed_l2_entry() helper adds a2debf6506 qcow2-refcount: introduce fix_l2_entry_by_zero() adds 5c3216c046 qcow2-refcount: fix_l2_entry_by_zero(): also zero L2 entry bitmap adds 9631c7822e qcow2-refcount: check_refcounts_l2(): check l2_bitmap adds 289ef5f219 qcow2-refcount: check_refcounts_l2(): check reserved bits adds cd6efd60e9 qcow2-refcount: improve style of check_refcounts_l1() adds 98bc07d6cd qcow2-refcount: check_refcounts_l1(): check reserved bits adds 8fba395151 qcow2-refcount: check_refblocks(): add separate message for [...] adds 1899bf4737 qemu-img: Add -F shorthand to convert adds 57b6f58c1d Merge remote-tracking branch 'remotes/hreitz/tags/pull-block [...] adds eb94846280 qxl: fix pre-save logic adds 89faed62af ui/gtk: Create a common release_dmabuf helper adds 121abaf3e6 ui/egl: Add egl helpers to help with synchronization adds 65b847d284 ui: Create sync objects and fences only for blobs adds ab971f8abb ui/gtk-egl: Wait for the draw signal for dmabuf blobs adds b3a5dfdea9 virtio-gpu: Add gl_flushed callback adds 63cf61256a Merge remote-tracking branch 'remotes/kraxel/tags/vga-202109 [...] adds fae0b0de71 util: Remove redundant checks in the openpty() adds 4be8bfcb4d hw/i386/acpi-build: Fix a typo adds 526dc8405d qdev: Complete qdev_init_gpio_out() documentation adds 68857f13aa spelling: sytem => system adds cd946e5c68 configure: add missing pc-bios/qemu_vga.ndrv symlink in build tree adds 7916b5fc8c target/i386: spelling: occured=>occurred, mininum=>minimum adds 37557b09a6 intel_iommu: Fix typo in comments adds 631ba5a128 hw/vfio: Fix typo in comments adds eba6814a0a target/avr: Fix compiler errors (-Werror=enum-conversion) adds 9ac200acce target/sparc: Make sparc_cpu_dump_state() static adds d1fe59377b Merge remote-tracking branch 'remotes/vivier2/tags/trivial-b [...] No new revisions were added by this update. Summary of changes: .gitlab-ci.d/custom-runners.yml | 36 +- accel/kvm/kvm-all.c | 2 +- accel/tcg/cpu-exec.c | 14 +- accel/tcg/tcg-accel-ops-rr.c | 2 - accel/tcg/translate-all.c | 59 +- accel/tcg/translator.c | 39 + accel/tcg/user-exec.c | 48 +- block.c | 88 ++ block/file-posix.c | 9 +- block/gluster.c | 23 +- block/io.c | 68 +- block/iscsi.c | 3 - block/mirror.c | 25 +- block/qcow2-cluster.c | 78 +- block/qcow2-refcount.c | 326 +++-- block/qcow2.c | 13 +- block/qcow2.h | 7 +- bsd-user/bsd-mman.h | 121 -- bsd-user/bsdload.c | 104 +- bsd-user/elfcore.c | 10 + bsd-user/elfload.c | 1469 +++++--------------- .../{sparc/target_syscall.h => freebsd/host-os.h} | 23 +- bsd-user/freebsd/target_os_elf.h | 137 ++ bsd-user/freebsd/target_os_siginfo.h | 145 ++ bsd-user/freebsd/target_os_signal.h | 78 ++ bsd-user/freebsd/target_os_stack.h | 181 +++ .../target_os_thread.h} | 23 +- bsd-user/freebsd/target_os_user.h | 427 ++++++ .../target_os_vmparam.h} | 32 +- .../{sparc/target_syscall.h => i386/target_arch.h} | 27 +- bsd-user/i386/target_arch_cpu.c | 71 + bsd-user/i386/target_arch_cpu.h | 209 +++ .../target_syscall.h => i386/target_arch_elf.h} | 31 +- bsd-user/i386/target_arch_reg.h | 82 ++ bsd-user/i386/target_arch_signal.h | 94 ++ .../target_arch_sigtramp.h} | 27 +- bsd-user/i386/target_arch_thread.h | 47 + bsd-user/i386/target_arch_vmparam.h | 46 + bsd-user/main.c | 832 +++-------- bsd-user/mmap.c | 472 +++++-- .../{sparc/target_syscall.h => netbsd/host-os.h} | 23 +- bsd-user/netbsd/target_os_elf.h | 146 ++ bsd-user/netbsd/target_os_siginfo.h | 82 ++ bsd-user/netbsd/target_os_signal.h | 69 + bsd-user/netbsd/target_os_stack.h | 56 + .../target_syscall.h => netbsd/target_os_thread.h} | 23 +- .../{sparc/target_syscall.h => openbsd/host-os.h} | 23 +- bsd-user/openbsd/target_os_elf.h | 146 ++ bsd-user/openbsd/target_os_siginfo.h | 82 ++ bsd-user/openbsd/target_os_signal.h | 69 + bsd-user/openbsd/target_os_stack.h | 56 + .../target_os_thread.h} | 23 +- bsd-user/qemu.h | 63 +- bsd-user/sparc/target_arch_sysarch.h | 52 - bsd-user/sparc64/target_arch_sysarch.h | 52 - bsd-user/syscall.c | 11 - bsd-user/syscall_defs.h | 255 ++-- .../target_syscall.h => x86_64/target_arch.h} | 28 +- bsd-user/x86_64/target_arch_cpu.c | 71 + bsd-user/x86_64/target_arch_cpu.h | 247 ++++ .../target_syscall.h => x86_64/target_arch_elf.h} | 31 +- bsd-user/x86_64/target_arch_reg.h | 92 ++ bsd-user/x86_64/target_arch_signal.h | 94 ++ .../target_arch_sigtramp.h} | 27 +- .../target_arch_thread.h} | 38 +- bsd-user/x86_64/target_arch_vmparam.h | 46 + chardev/char-mux.c | 6 +- chardev/char.c | 7 +- configure | 11 +- docs/about/build-platforms.rst | 33 + docs/about/deprecated.rst | 2 + docs/about/index.rst | 3 +- docs/devel/code-of-conduct.rst | 4 +- docs/devel/index.rst | 3 +- docs/devel/tcg-icount.rst | 3 - docs/index.rst | 1 + docs/interop/index.rst | 3 +- docs/specs/index.rst | 3 +- docs/system/arm/nuvoton.rst | 1 + docs/system/cpu-models-x86.rst.inc | 4 +- docs/system/i386/cpu.rst | 1 + docs/system/index.rst | 3 +- docs/system/qemu-block-drivers.rst | 4 + docs/system/qemu-cpu-models.rst | 10 +- docs/system/qemu-manpage.rst | 10 +- docs/system/target-i386.rst | 8 +- docs/tools/index.rst | 3 +- docs/tools/qemu-img.rst | 5 +- docs/tools/qemu-nbd.rst | 1 + docs/tools/qemu-pr-helper.rst | 1 + docs/tools/qemu-storage-daemon.rst | 1 + docs/tools/qemu-trace-stap.rst | 1 + docs/user/index.rst | 3 +- hw/arm/mps2-tz.c | 92 +- hw/arm/mps2.c | 12 +- hw/arm/npcm7xx_boards.c | 34 + hw/arm/virt.c | 29 +- hw/char/cadence_uart.c | 61 +- hw/char/escc.c | 263 ++-- hw/char/trace-events | 2 + hw/display/qxl.c | 2 +- hw/display/virtio-gpu-udmabuf.c | 1 + hw/display/virtio-gpu.c | 32 +- hw/i386/acpi-build.c | 6 +- hw/i386/intel_iommu.c | 8 +- hw/input/ps2.c | 214 +-- hw/intc/arm_gicv3.c | 14 + hw/intc/arm_gicv3_common.c | 13 + hw/intc/arm_gicv3_cpuif.c | 7 +- hw/intc/arm_gicv3_dist.c | 5 +- hw/intc/arm_gicv3_its.c | 1322 ++++++++++++++++++ hw/intc/arm_gicv3_its_common.c | 7 +- hw/intc/arm_gicv3_its_kvm.c | 2 +- hw/intc/arm_gicv3_redist.c | 153 +- hw/intc/gicv3_internal.h | 188 ++- hw/intc/meson.build | 1 + hw/m68k/q800.c | 38 +- hw/misc/mac_via.c | 547 ++++---- hw/misc/zynq_slcr.c | 31 +- hw/nvram/fw_cfg.c | 1 + hw/sparc/sun4m.c | 2 +- hw/vfio/igd.c | 2 +- hw/vfio/pci-quirks.c | 2 +- hw/vfio/pci.c | 6 +- hw/vfio/platform.c | 2 +- include/block/block_int.h | 61 +- include/chardev/char.h | 34 +- include/exec/gen-icount.h | 27 +- include/exec/translate-all.h | 1 + include/exec/translator.h | 44 +- include/hw/arm/virt.h | 2 + include/hw/core/tcg-cpu-ops.h | 26 +- include/hw/intc/arm_gicv3_common.h | 13 + include/hw/intc/arm_gicv3_its_common.h | 32 +- include/hw/misc/mac_via.h | 101 +- include/hw/qdev-core.h | 28 + include/sysemu/nvmm.h | 7 +- include/tcg/tcg-op.h | 2 - include/ui/console.h | 3 + include/ui/egl-helpers.h | 3 + include/ui/gtk.h | 5 +- linux-user/main.c | 7 - meson.build | 11 +- pc-bios/keymaps/meson.build | 3 +- qemu-img-cmds.hx | 2 +- qemu-img.c | 18 +- scripts/qapi/common.py | 19 +- scripts/qapi/expr.py | 21 +- scripts/simplebench/img_bench_templater.py | 95 ++ scripts/simplebench/table_templater.py | 62 + softmmu/qdev-monitor.c | 7 +- target/alpha/cpu.c | 2 +- target/alpha/cpu.h | 2 +- target/alpha/helper.c | 5 +- target/alpha/translate.c | 2 +- target/arm/arm_ldst.h | 12 +- target/arm/cpu.c | 7 +- target/arm/cpu.h | 4 +- target/arm/cpu_tcg.c | 6 +- target/arm/helper-a64.c | 1 + target/arm/helper.c | 8 + target/arm/kvm.c | 7 +- target/arm/kvm_arm.h | 4 +- target/arm/syndrome.h | 5 + target/arm/translate-a64.c | 215 +-- target/arm/translate.c | 30 +- target/arm/translate.h | 2 + target/avr/cpu.c | 3 - target/avr/translate.c | 8 +- target/cris/cpu.c | 4 +- target/cris/cpu.h | 2 +- target/cris/helper.c | 17 +- target/hexagon/translate.c | 3 +- target/hppa/cpu.c | 2 +- target/hppa/cpu.h | 4 +- target/hppa/int_helper.c | 7 +- target/hppa/translate.c | 5 +- target/i386/cpu-sysemu.c | 2 +- target/i386/cpu.c | 31 +- target/i386/cpu.h | 26 + target/i386/machine.c | 22 +- target/i386/nvmm/nvmm-all.c | 5 +- target/i386/svm.h | 8 + target/i386/tcg/helper-tcg.h | 2 + target/i386/tcg/seg_helper.c | 74 +- target/i386/tcg/sysemu/excp_helper.c | 2 +- target/i386/tcg/sysemu/misc_helper.c | 11 +- target/i386/tcg/sysemu/seg_helper.c | 62 + target/i386/tcg/sysemu/svm_helper.c | 121 +- target/i386/tcg/tcg-cpu.c | 8 +- target/i386/tcg/translate.c | 10 +- target/m68k/cpu.c | 2 +- target/m68k/cpu.h | 2 + target/m68k/op_helper.c | 16 +- target/m68k/translate.c | 2 +- target/microblaze/cpu.c | 2 +- target/microblaze/cpu.h | 2 + target/microblaze/helper.c | 13 +- target/mips/cpu.c | 2 +- target/mips/tcg/exception.c | 18 - target/mips/tcg/micromips_translate.c.inc | 2 +- target/mips/tcg/mips16e_translate.c.inc | 4 +- target/mips/tcg/nanomips_translate.c.inc | 4 +- target/mips/tcg/sysemu/tlb_helper.c | 18 + target/mips/tcg/tcg-internal.h | 5 +- target/mips/tcg/translate.c | 8 +- target/mips/tcg/user/tlb_helper.c | 5 - target/nios2/cpu.c | 5 +- target/openrisc/cpu.c | 2 +- target/openrisc/cpu.h | 5 +- target/openrisc/interrupt.c | 2 - target/openrisc/meson.build | 6 +- target/openrisc/translate.c | 2 +- target/ppc/cpu.h | 4 +- target/ppc/cpu_init.c | 2 +- target/ppc/excp_helper.c | 21 +- target/ppc/translate.c | 5 +- target/riscv/cpu.c | 2 +- target/riscv/cpu.h | 2 +- target/riscv/cpu_helper.c | 5 - target/riscv/translate.c | 5 +- target/rx/cpu.c | 2 +- target/rx/cpu.h | 2 + target/rx/helper.c | 4 + target/s390x/tcg/translate.c | 16 +- target/sh4/cpu.c | 2 +- target/sh4/cpu.h | 4 +- target/sh4/helper.c | 9 +- target/sh4/translate.c | 4 +- target/sparc/cpu.c | 6 +- target/sparc/cpu.h | 1 - target/sparc/translate.c | 27 +- target/xtensa/cpu.c | 2 +- target/xtensa/cpu.h | 2 + target/xtensa/exc_helper.c | 7 +- target/xtensa/translate.c | 5 +- tcg/arm/tcg-target.c.inc | 515 ++++--- tcg/arm/tcg-target.h | 27 +- tcg/i386/tcg-target.c.inc | 13 +- tcg/ppc/tcg-target.c.inc | 25 +- tests/data/acpi/virt/IORT | Bin 0 -> 124 bytes tests/data/acpi/virt/IORT.memhp | Bin 0 -> 124 bytes tests/data/acpi/virt/IORT.numamem | Bin 0 -> 124 bytes tests/data/acpi/virt/IORT.pxb | Bin 0 -> 124 bytes tests/qapi-schema/bad-if-not.err | 2 + tests/qapi-schema/bad-if-not.json | 3 + .../py.typed => tests/qapi-schema/bad-if-not.out | 0 tests/qapi-schema/meson.build | 1 + tests/qemu-iotests/122 | 2 +- tests/qemu-iotests/271 | 5 +- tests/qemu-iotests/271.out | 4 +- tests/qemu-iotests/297 | 9 +- tests/qemu-iotests/iotests.py | 12 +- .../tests/migrate-bitmaps-postcopy-test | 13 +- tests/qemu-iotests/tests/migrate-bitmaps-test | 43 +- tests/qemu-iotests/tests/migrate-during-backup | 97 ++ .../{096.out => tests/migrate-during-backup.out} | 0 tests/qemu-iotests/tests/mirror-top-perms | 2 +- tools/virtiofsd/fuse_lowlevel.h | 4 +- trace/meson.build | 5 +- ui/egl-helpers.c | 26 + ui/gtk-egl.c | 48 +- ui/gtk-gl-area.c | 26 + ui/gtk.c | 26 +- ui/meson.build | 4 +- util/qemu-openpty.c | 7 +- util/qemu-thread-posix.c | 19 + 267 files changed, 9040 insertions(+), 4216 deletions(-) delete mode 100644 bsd-user/bsd-mman.h create mode 100644 bsd-user/elfcore.c copy bsd-user/{sparc/target_syscall.h => freebsd/host-os.h} (60%) create mode 100644 bsd-user/freebsd/target_os_elf.h create mode 100644 bsd-user/freebsd/target_os_siginfo.h create mode 100644 bsd-user/freebsd/target_os_signal.h create mode 100644 bsd-user/freebsd/target_os_stack.h copy bsd-user/{sparc/target_syscall.h => freebsd/target_os_thread.h} (60%) create mode 100644 bsd-user/freebsd/target_os_user.h copy bsd-user/{sparc/target_syscall.h => freebsd/target_os_vmparam.h} (55%) copy bsd-user/{sparc/target_syscall.h => i386/target_arch.h} (60%) create mode 100644 bsd-user/i386/target_arch_cpu.c create mode 100644 bsd-user/i386/target_arch_cpu.h copy bsd-user/{sparc/target_syscall.h => i386/target_arch_elf.h} (56%) create mode 100644 bsd-user/i386/target_arch_reg.h create mode 100644 bsd-user/i386/target_arch_signal.h copy bsd-user/{sparc/target_syscall.h => i386/target_arch_sigtramp.h} (60%) create mode 100644 bsd-user/i386/target_arch_thread.h create mode 100644 bsd-user/i386/target_arch_vmparam.h copy bsd-user/{sparc/target_syscall.h => netbsd/host-os.h} (60%) create mode 100644 bsd-user/netbsd/target_os_elf.h create mode 100644 bsd-user/netbsd/target_os_siginfo.h create mode 100644 bsd-user/netbsd/target_os_signal.h create mode 100644 bsd-user/netbsd/target_os_stack.h copy bsd-user/{sparc/target_syscall.h => netbsd/target_os_thread.h} (60%) copy bsd-user/{sparc/target_syscall.h => openbsd/host-os.h} (60%) create mode 100644 bsd-user/openbsd/target_os_elf.h create mode 100644 bsd-user/openbsd/target_os_siginfo.h create mode 100644 bsd-user/openbsd/target_os_signal.h create mode 100644 bsd-user/openbsd/target_os_stack.h copy bsd-user/{sparc/target_syscall.h => openbsd/target_os_thread.h} (60%) delete mode 100644 bsd-user/sparc/target_arch_sysarch.h delete mode 100644 bsd-user/sparc64/target_arch_sysarch.h rename bsd-user/{sparc64/target_syscall.h => x86_64/target_arch.h} (59%) create mode 100644 bsd-user/x86_64/target_arch_cpu.c create mode 100644 bsd-user/x86_64/target_arch_cpu.h copy bsd-user/{sparc/target_syscall.h => x86_64/target_arch_elf.h} (56%) create mode 100644 bsd-user/x86_64/target_arch_reg.h create mode 100644 bsd-user/x86_64/target_arch_signal.h copy bsd-user/{sparc/target_syscall.h => x86_64/target_arch_sigtramp.h} (60%) rename bsd-user/{sparc/target_syscall.h => x86_64/target_arch_thread.h} (51%) create mode 100644 bsd-user/x86_64/target_arch_vmparam.h create mode 100644 docs/system/i386/cpu.rst create mode 100644 hw/intc/arm_gicv3_its.c create mode 100755 scripts/simplebench/img_bench_templater.py create mode 100644 scripts/simplebench/table_templater.py create mode 100644 tests/data/acpi/virt/IORT create mode 100644 tests/data/acpi/virt/IORT.memhp create mode 100644 tests/data/acpi/virt/IORT.numamem create mode 100644 tests/data/acpi/virt/IORT.pxb create mode 100644 tests/qapi-schema/bad-if-not.err create mode 100644 tests/qapi-schema/bad-if-not.json copy python/qemu/machine/py.typed => tests/qapi-schema/bad-if-not.out (100%) create mode 100755 tests/qemu-iotests/tests/migrate-during-backup copy tests/qemu-iotests/{096.out => tests/migrate-during-backup.out} (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits September 2021