Tcwg-commits September 2021

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/release-aarch64-bootstrap_lto updated (79c523d40de -> e89de59a4be)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/release-aarch64-bootstrap_lto in repository toolchain/ci/gcc. from 79c523d40de Daily bump. adds b1dc26d3543 GCC11 - Fortran: combined directives - order(concurrent) no [...] adds d4b84aefe69 Daily bump. adds d891ef6ac49 Fix no_fsanitize_address effective target adds 7fbab3afca9 Fortran - (large) arrays in the main shall be static adds 5210f05c6eb rs6000: Don't use r12 for CR save on ELFv2 (PR102107) adds da0a5628d47 rs6000: Fix ELFv2 r12 use in epilogue adds ae362db3e5c Daily bump. adds cc11a171eee ipa-fnsummary: Remove inconsistent bp_pack_value adds 22b25535b8b IBM Z: Fix PR102222 adds 5acab453d48 IBM Z: TPF: Add cc clobber to profiling expanders adds e89de59a4be Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 40 ++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/rs6000/rs6000-logue.c | 15 +++++--- gcc/config/s390/s390.c | 10 ++++++ gcc/config/s390/tpf.md | 6 ++-- gcc/fortran/ChangeLog | 15 ++++++++ gcc/fortran/trans-decl.c | 5 +-- gcc/fortran/trans-openmp.c | 2 -- gcc/ipa-fnsummary.c | 15 +++++--- gcc/testsuite/ChangeLog | 28 +++++++++++++++ gcc/testsuite/g++.dg/abi/anon4.C | 1 + gcc/testsuite/gcc.dg/pr91441.c | 4 +-- gcc/testsuite/gcc.dg/pr96260.c | 2 +- gcc/testsuite/gcc.dg/pr96307.c | 2 +- gcc/testsuite/gcc.target/s390/pr102222.c | 16 +++++++++ .../gomp/distribute-order-concurrent.f90 | 25 ++++++++++++++ gcc/testsuite/gfortran.dg/pr102366.f90 | 9 +++++ gcc/testsuite/gnat.dg/asan1.adb | 2 +- gcc/testsuite/lib/target-supports.exp | 5 +-- 19 files changed, 182 insertions(+), 22 deletions(-) create mode 100644 gcc/testsuite/gcc.target/s390/pr102222.c create mode 100644 gcc/testsuite/gfortran.dg/gomp/distribute-order-concurrent.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr102366.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/release-aarch64-bootstrap_lto updated (6060c2f337 -> f0f39c9cfa)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/release-aarch64-bootstrap_lto in repository toolchain/ci/binutils-gdb. from 6060c2f337 Automatic date update in version.in adds 27439f0eda Automatic date update in version.in adds fcc561a54d Automatic date update in version.in adds f0f39c9cfa Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/release-aarch64-bootstrap_lto updated (80d604109 -> b56d01ff0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/release-aarch64-bootstrap_lto in repository toolchain/ci/base-artifacts. discards 80d604109 0: update: binutils-gcc: 2 new b56d01ff0 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (80d604109) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/release-aa [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1548 -> 1492 bytes 02-prepare_abe/console.log.xz | Bin 2776 -> 2756 bytes 04-build_abe-binutils/console.log.xz | Bin 51140 -> 50984 bytes 05-build_abe-bootstrap_lto/console.log.xz | Bin 267800 -> 263928 bytes 06-check_regression/console.log.xz | Bin 416 -> 416 bytes 07-update_baseline/console.log | 16 ++++++++-------- jenkins/manifest.sh | 14 +++++++------- 7 files changed, 15 insertions(+), 15 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-aarch64-spec2k6-Os updated (ae0873483d93 -> bc69dd62c04a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-aarch64-spec2k6-Os in repository toolchain/ci/llvm-project. from ae0873483d93 DWARFDie:DWARFTypePrinter: Add common utility function for [...] adds dee5a8ca325f [RISCV] Optimize (add (shl x, c0), (shl y, c1)) with SH*ADD adds b7ec8f3dcbcd llvm/cmake: fix a typo adds e381d8b24329 [X86][Atom] Fix (U)COMISS/SD uops, latency and throughput adds 9de88fc0eac1 [mlir][emitc] Fix indent in CondBranchOp and block label adds 1da52ef2943b [ARM] Add VGETLANEu patterns for v4f16 and v8f16 adds 9555d1edb0d1 [InstCombine] add/adjust tests for min/max intrinsics; NFC adds 1e72ca94e579 [X86] combineX86ShufflesRecursively(): call SimplifyMultip [...] adds 0852313e4783 [NFC] combineX86ShufflesRecursively(): actually address ni [...] adds 07f1d8f0caa1 [X86] lowerShuffleAsDecomposedShuffleMerge(): if both inpu [...] adds 5f2fe48d06c7 [X86][TLI] SimplifyDemandedVectorEltsForTargetNode(): don' [...] adds cf8fac7d0730 [X86][Atom] Specific uops for all IMUL/IDIV instructions adds 2ca637c9769f llvm-dwarfdump: Refactor type pretty printing tests adds b7342e3137d8 [X86] Fold SHUFPS(shuffle(x),shuffle(y),mask) -> SHUFPS(x, [...] adds f855ef260148 [X86][Atom] Fix FP uops + port usage adds f09ca5c6461b DWARFDie: Improve type printing for function and array typ [...] adds a51fb58c557c DWARFDie.cpp: Minor follow-up clang-format adds 2bde3dcd32b3 [X86] Add test cases for pr51908. NFC adds 391fa371fdfb [X86] Remove Commutable flag from mpsadbw intrinsics. adds 372e2c24b6e1 llvm-dwarfdump: Pretty printing types including a space be [...] adds 5ba8020326a5 [DebugInfo][LSR] Emit shorter expressions from scev-based [...] adds 84b07c9b3aa7 [llvm] Use pop_back_val (NFC) adds 0e89ff8195e9 [X86] SimplifyDemandedBits - only narrow a broadcast sourc [...] adds 5bfe5207ef28 llvm-dwarfdump: Pretty print names qualified/with scopes adds 11e0b79b056a llvm-dwarfdump: Don't print even an empty string when a ty [...] adds 606ea0dd2a73 llvm-dwarfdump: support for type printing "decltype(nullpt [...] adds cb42bb355061 llvm-dwarfdump: pretty type printing: print fully qualifie [...] adds def15c5fb6a1 [SCEV] Support negative values in signed/unsigned predicat [...] adds 74670e79b0a0 [libc] Add implementations of div, ldiv, lldiv and imaxdiv. adds 471217cff8e5 Revert "Revert "[IndVars] Replace PHIs if loop exits on 1s [...] adds e9d34c54290e [NFC] Add assert and test showing that revert of D109596 w [...] adds 5252aa2981ba [libc][obvious] Make *abs and *div functions buildable in [...] adds f5b8f1247cd9 [libc][obvious] Add inttypes.h and stdlib.h as deps to *di [...] adds 966922320f09 [lldb] Remove two #ifndef linux from Platform.cpp adds 9a2255dfa012 [mlir][NFC] Add explicit "::mlir" namespace to tblgen gene [...] adds ec03bbe8a74a [mlir] Fix bug in partial dialect conversion adds 76cb876563d0 [MLIR] Simplex::appendVariable: early return if count == 0 adds 4b80f0125adc [CMake] Add debuginfo-tests to LLVM_ALL_PROJECTS after D110016 adds 7f6a4826ac49 [CaptureTracking] Allow passing LI to PointerMayBeCaptured [...] adds bdcf4b9b9620 [MLIR][Linalg] Make detensoring cost-model more flexible. adds 92904cc68fbc [lldb] [gdb-remote] Remove unused arg from GDBRemoteRegist [...] adds f6e0edc23e61 [lldb] [gdb-remote] Recognize aarch64v type from gdbserver adds 92c9b28347c3 Revert "[AArch64][SVE] Teach cost model that masked loads/ [...] adds 798e4bfbeda8 [mlir] Fix integration tests failures introduced in D108505 adds 13aa102e0769 AArch64: use ldp/stp for 128-bit atomic load/store in v.84 [...] adds ca3bebd8440f [OpenCL] Supports optional writing to 3d images in C++ for [...] adds 15feaaa359c7 Add myself as a code owner for SYCL support adds eb3af1e77341 [clang][NFC] Remove dead code adds c8cb7f611fdf [NewPM] Make InlinerPass (aka 'inline') a parameterized pass adds e4c46ddd91eb [GlobalISel] Improve elimination of dead instructions in l [...] adds b1099120ff96 [lldb] [gdb-remote] Always send PID when detaching w/ mult [...] adds d6929aaa67c7 [mlir][openacc] Make use of the second counter extension i [...] adds ea17b15f2dcd [MCA] InstructionTables::execute() - use const-ref iterato [...] adds 4ab7c0d3fa06 [X86] X86TargetTransformInfo - remove unnecessary if-else [...] adds 7fc12b822c5d MachOObjectFile - checkOverlappingElement - use const-ref [...] adds 6d7b3d6b3a8d Fix CLANG_ENABLE_STATIC_ANALYZER=OFF building all analyzer source adds 7b68c0725d89 pre-commit test for D109767 adds 817e23d481be [update_mir_test_checks.py] Use -NEXT FileCheck directories adds 3f90df22f1b7 [ARM] MVE reverse shuffles. adds fae57a6a9795 [Clang] [Fix] Clang build fails when build directory conta [...] adds 4737dcbc83e0 [lldb] [test] Add unittest for DynamicRegisterInfo::Finalize() adds ec50d351ffdd [lldb] [DynamicRegisterInfo] Unset value_regs/invalidate_r [...] adds 6de19ea4b626 Thread safety analysis: Drop special block handling adds 68914dc99083 [JITLink] Adopt forEachRelocation() helper in ELF x86-64 b [...] adds e8d81d80f660 [JITLink] Adopt forEachRelocation() helper in ELF RISCV ba [...] adds 680592b5d0a7 [AMDGPU] Regenerate checks adds f988f680649a [Analysis] Add support for vscale in computeKnownBitsFromOperator adds 5dee50111c13 [analyzer] Move docs of SmartPtr to correct subcategory adds 6db928b8f31b [mlir][linalg] Fusion on tensors. adds 444a5f304f6c [clangd] Bail-out when an empty compile flag is encountered adds 228dd20c3f1e [OpenCL] Supports atomics in C++ for OpenCL 2021 adds 5b47256fa540 [X86] Add test to show the effect caused by D109607. NFC adds 227673398c2d [X86] Always check the size of SourceTy before getting the [...] adds 5661317f864a [flang] Put intrinsic function table back into order adds bc69dd62c04a [SLP]Improve graph reordering. No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/CompileCommands.cpp | 14 +- clang-tools-extra/clangd/Compiler.cpp | 2 + .../clangd/unittests/CompileCommandsTests.cpp | 7 + .../clangd/unittests/CompilerTests.cpp | 11 + clang/CODE_OWNERS.TXT | 4 + clang/cmake/modules/AddClang.cmake | 12 +- clang/docs/analyzer/checkers.rst | 27 +- clang/lib/Analysis/ThreadSafety.cpp | 57 +- clang/lib/CodeGen/TargetInfo.cpp | 14 +- .../Frontend/CreateInvocationFromCommandLine.cpp | 1 + clang/lib/Headers/opencl-c-base.h | 4 +- clang/lib/Headers/opencl-c.h | 76 +- clang/lib/Sema/SemaType.cpp | 10 +- clang/lib/StaticAnalyzer/CMakeLists.txt | 7 + clang/test/CodeGen/X86/va-arg-sse.c | 101 ++ .../CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c | 8 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c | 8 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c | 8 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c | 8 +- .../aarch64-sve-intrinsics/acle_sve_len-bfloat.c | 4 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_len.c | 44 +- clang/test/Misc/opencl-c-3.0.incorrect_options.cl | 2 + clang/test/PCH/thread-safety-attrs.cpp | 11 +- clang/test/SemaCXX/warn-thread-safety-analysis.cpp | 19 +- clang/test/SemaOpenCL/unsupported-image.cl | 3 +- clang/tools/driver/CMakeLists.txt | 2 +- flang/lib/Evaluate/intrinsics.cpp | 9 +- flang/unittests/Evaluate/intrinsics.cpp | 4 +- libc/config/linux/aarch64/entrypoints.txt | 16 +- libc/config/linux/api.td | 47 + libc/config/linux/x86_64/entrypoints.txt | 10 +- libc/spec/stdc.td | 30 +- libc/src/__support/integer_operations.h | 7 + libc/src/inttypes/CMakeLists.txt | 11 + libc/src/inttypes/imaxdiv.cpp | 21 + .../integer_operations.h => inttypes/imaxdiv.h} | 16 +- libc/src/stdlib/CMakeLists.txt | 81 +- libc/src/stdlib/div.cpp | 21 + .../integer_operations.h => stdlib/div.h} | 16 +- libc/src/stdlib/ldiv.cpp | 21 + .../integer_operations.h => stdlib/ldiv.h} | 16 +- libc/src/stdlib/lldiv.cpp | 21 + .../integer_operations.h => stdlib/lldiv.h} | 16 +- libc/test/src/inttypes/CMakeLists.txt | 13 + libc/test/src/inttypes/imaxdiv_test.cpp | 15 + libc/test/src/stdlib/CMakeLists.txt | 39 + libc/test/src/stdlib/DivTest.h | 37 + libc/test/src/stdlib/div_test.cpp | 15 + libc/test/src/stdlib/ldiv_test.cpp | 15 + libc/test/src/stdlib/lldiv_test.cpp | 15 + .../Process/Utility/DynamicRegisterInfo.cpp | 8 +- .../Plugins/Process/Utility/DynamicRegisterInfo.h | 2 +- .../gdb-remote/GDBRemoteCommunicationClient.cpp | 14 +- .../gdb-remote/GDBRemoteRegisterContext.cpp | 23 +- .../Process/gdb-remote/GDBRemoteRegisterContext.h | 2 +- .../Process/gdb-remote/ProcessGDBRemote.cpp | 3 + lldb/source/Target/Platform.cpp | 14 +- .../gdb_remote_client/TestGDBRemoteClient.py | 43 + .../gdb_remote_client/TestGDBServerTargetXML.py | 6 + lldb/unittests/Process/Utility/CMakeLists.txt | 3 +- .../Process/Utility/DynamicRegisterInfoTest.cpp | 126 ++ llvm/CMakeLists.txt | 4 +- llvm/cmake/modules/AddLLVM.cmake | 12 +- llvm/include/llvm/Analysis/CaptureTracking.h | 11 +- llvm/include/llvm/CodeGen/GlobalISel/Utils.h | 11 + llvm/include/llvm/IR/IntrinsicsX86.td | 4 +- llvm/include/llvm/Transforms/IPO/Inliner.h | 3 + .../llvm/Transforms/Vectorize/SLPVectorizer.h | 3 +- llvm/lib/Analysis/CaptureTracking.cpp | 17 +- llvm/lib/Analysis/MemorySSAUpdater.cpp | 3 +- llvm/lib/Analysis/ScalarEvolution.cpp | 5 +- llvm/lib/Analysis/StackSafetyAnalysis.cpp | 3 +- llvm/lib/Analysis/ValueTracking.cpp | 26 + llvm/lib/CodeGen/CodeGenPrepare.cpp | 6 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 3 +- llvm/lib/CodeGen/GlobalISel/Legalizer.cpp | 18 +- llvm/lib/CodeGen/GlobalISel/Utils.cpp | 34 + llvm/lib/CodeGen/LiveRangeEdit.cpp | 3 +- llvm/lib/CodeGen/LiveVariables.cpp | 6 +- llvm/lib/CodeGen/LoopTraversal.cpp | 3 +- llvm/lib/CodeGen/ReachingDefAnalysis.cpp | 3 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp | 3 +- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp | 4 +- llvm/lib/CodeGen/TwoAddressInstructionPass.cpp | 3 +- llvm/lib/DebugInfo/DWARF/DWARFDie.cpp | 255 ++- llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp | 133 +- llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp | 246 ++- .../lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp | 3 +- llvm/lib/IR/Value.cpp | 3 +- llvm/lib/MCA/Stages/InstructionTables.cpp | 2 +- llvm/lib/Object/MachOObjectFile.cpp | 6 +- llvm/lib/Passes/PassBuilder.cpp | 31 + llvm/lib/Passes/PassRegistry.def | 13 +- llvm/lib/Target/AArch64/AArch64.td | 5 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 92 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 4 + .../Target/AArch64/AArch64StackTaggingPreRA.cpp | 3 +- llvm/lib/Target/AArch64/AArch64Subtarget.h | 2 + .../Target/AArch64/AArch64TargetTransformInfo.cpp | 2 +- .../AArch64/GISel/AArch64InstructionSelector.cpp | 2 + .../Target/AArch64/GISel/AArch64LegalizerInfo.cpp | 54 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 2 +- llvm/lib/Target/ARM/A15SDOptimizer.cpp | 3 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 31 +- llvm/lib/Target/ARM/ARMInstrNEON.td | 12 + llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 3 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 55 +- .../AsmParser/WebAssemblyAsmTypeCheck.cpp | 3 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 126 +- llvm/lib/Target/X86/X86ScheduleAtom.td | 82 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 11 +- llvm/lib/Transforms/Coroutines/CoroFrame.cpp | 3 +- llvm/lib/Transforms/IPO/Inliner.cpp | 8 + llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp | 6 +- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 17 +- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp | 53 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 1364 +++++++++----- .../Analysis/CostModel/AArch64/masked_ldst_vls.ll | 51 - .../CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll | 6 +- .../AArch64/GlobalISel/artifact-find-value.mir | 5 - .../CodeGen/AArch64/GlobalISel/legalize-add.mir | 1 - .../CodeGen/AArch64/GlobalISel/legalize-and.mir | 31 +- .../CodeGen/AArch64/GlobalISel/legalize-bswap.mir | 5 +- .../AArch64/GlobalISel/legalize-extload.mir | 3 - .../GlobalISel/legalize-extract-vector-elt.mir | 10 +- .../AArch64/GlobalISel/legalize-extracts.mir | 1 - .../AArch64/GlobalISel/legalize-inserts.mir | 646 ++++--- .../AArch64/GlobalISel/legalize-load-store.mir | 21 +- .../AArch64/GlobalISel/legalize-merge-values.mir | 15 +- .../GlobalISel/legalize-phi-insertpt-decrement.mir | 18 +- .../CodeGen/AArch64/GlobalISel/legalize-phi.mir | 16 +- .../CodeGen/AArch64/GlobalISel/legalize-sadde.mir | 2 - .../CodeGen/AArch64/GlobalISel/legalize-saddo.mir | 2 - .../AArch64/GlobalISel/legalize-saddsat.mir | 55 +- .../CodeGen/AArch64/GlobalISel/legalize-shift.mir | 10 +- .../AArch64/GlobalISel/legalize-shuffle-vector.mir | 38 +- .../CodeGen/AArch64/GlobalISel/legalize-ssube.mir | 2 - .../CodeGen/AArch64/GlobalISel/legalize-ssubo.mir | 2 - .../AArch64/GlobalISel/legalize-ssubsat.mir | 55 +- .../CodeGen/AArch64/GlobalISel/legalize-uadde.mir | 2 - .../CodeGen/AArch64/GlobalISel/legalize-uaddo.mir | 2 - .../AArch64/GlobalISel/legalize-unmerge-values.mir | 10 +- .../CodeGen/AArch64/GlobalISel/legalize-usube.mir | 2 - .../CodeGen/AArch64/GlobalISel/legalize-usubo.mir | 2 - .../CodeGen/AArch64/GlobalISel/v8.4-atomic-128.ll | 212 +++ llvm/test/CodeGen/AArch64/atomic-ops-lse.ll | 2 +- llvm/test/CodeGen/AArch64/v8.4-atomic-128.ll | 194 ++ .../GlobalISel/artifact-combiner-extract.mir | 76 +- .../AMDGPU/GlobalISel/artifact-combiner-trunc.mir | 3 - .../artifact-combiner-unmerge-values.mir | 38 +- .../AMDGPU/GlobalISel/artifact-combiner-zext.mir | 8 +- ...bug-legalization-artifact-combiner-dead-def.mir | 3 - .../AMDGPU/GlobalISel/inst-select-fma.s32.mir | 144 +- .../CodeGen/AMDGPU/GlobalISel/legalize-add.mir | 2 - .../CodeGen/AMDGPU/GlobalISel/legalize-and.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir | 1 - .../CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir | 82 +- .../CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir | 45 +- .../CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir | 8 - .../CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir | 2 - .../GlobalISel/legalize-build-vector.s16.mir | 12 - .../AMDGPU/GlobalISel/legalize-concat-vectors.mir | 9 +- .../AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir | 1 - .../CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir | 1 - .../GlobalISel/legalize-extract-vector-elt.mir | 52 +- .../CodeGen/AMDGPU/GlobalISel/legalize-extract.mir | 10 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir | 43 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir | 58 +- .../AMDGPU/GlobalISel/legalize-fcanonicalize.mir | 32 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir | 12 - .../CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir | 55 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir | 12 - .../CodeGen/AMDGPU/GlobalISel/legalize-fma.mir | 73 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir | 42 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir | 42 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir | 58 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir | 28 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir | 1 - .../CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir | 2 - .../CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir | 135 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir | 239 ++- .../CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir | 12 - .../CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir | 12 - .../CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir | 54 +- .../CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir | 15 +- .../GlobalISel/legalize-implicit-def-s1025.mir | 2 - .../AMDGPU/GlobalISel/legalize-implicit-def.mir | 3 - .../GlobalISel/legalize-insert-vector-elt.mir | 71 +- .../AMDGPU/GlobalISel/legalize-intrinsic-round.mir | 39 +- .../legalize-llvm.amdgcn.image.dim.a16.ll | 18 - .../legalize-llvm.amdgcn.image.load.2d.d16.ll | 188 +- .../legalize-llvm.amdgcn.image.load.2d.ll | 48 +- .../legalize-llvm.amdgcn.image.store.2d.d16.ll | 4 - .../AMDGPU/GlobalISel/legalize-load-constant.mir | 318 ++-- .../AMDGPU/GlobalISel/legalize-load-flat.mir | 253 +-- .../AMDGPU/GlobalISel/legalize-load-global.mir | 1889 +++++--------------- .../AMDGPU/GlobalISel/legalize-load-local.mir | 609 +++---- .../AMDGPU/GlobalISel/legalize-load-private.mir | 296 ++- .../CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir | 103 +- .../CodeGen/AMDGPU/GlobalISel/legalize-memcpy.mir | 1 - .../AMDGPU/GlobalISel/legalize-memcpyinline.mir | 1 - .../CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir | 1 - .../CodeGen/AMDGPU/GlobalISel/legalize-memset.mir | 1 - .../CodeGen/AMDGPU/GlobalISel/legalize-mul.mir | 2 - .../test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/legalize-phi.mir | 19 +- .../CodeGen/AMDGPU/GlobalISel/legalize-sadde.mir | 9 +- .../CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir | 28 +- .../CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir | 195 +- .../CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir | 234 +-- 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| 2 +- llvm/test/DebugInfo/X86/addr-tu-to-non-tu.ll | 2 +- .../IndVarSimplify/eliminate-backedge.ll | 96 +- .../IndVarSimplify/eliminate-exit-no-dl.ll | 5 +- .../Transforms/IndVarSimplify/floating-point-iv.ll | 4 +- .../Transforms/IndVarSimplify/negative_ranges.ll | 4 +- llvm/test/Transforms/InstCombine/icmp-vscale.ll | 88 + .../Transforms/InstCombine/minmax-intrinsics.ll | 23 +- llvm/test/Transforms/InstSimplify/vscale.ll | 15 + .../LoopStrengthReduce/dbg-preserve-0.ll | 10 +- .../LoopVectorize/AArch64/sve-widen-phi.ll | 18 +- .../AArch64/transpose-inseltpoison.ll | 84 +- .../Transforms/SLPVectorizer/AArch64/transpose.ll | 84 +- llvm/test/Transforms/SLPVectorizer/X86/addsub.ll | 42 +- .../Transforms/SLPVectorizer/X86/crash_cmpop.ll | 6 +- llvm/test/Transforms/SLPVectorizer/X86/extract.ll | 6 +- .../SLPVectorizer/X86/jumbled-load-multiuse.ll | 12 +- .../Transforms/SLPVectorizer/X86/jumbled-load.ll | 22 +- .../SLPVectorizer/X86/jumbled_store_crash.ll | 29 +- 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mlir/include/mlir/Conversion/SCFToGPU/SCFToGPU.h | 4 + mlir/include/mlir/Dialect/Linalg/Passes.h | 3 + mlir/include/mlir/Dialect/Linalg/Passes.td | 14 + mlir/include/mlir/Dialect/Linalg/Utils/Utils.h | 58 + mlir/include/mlir/IR/OpBase.td | 6 +- mlir/lib/Analysis/Presburger/Simplex.cpp | 2 + mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp | 30 +- mlir/lib/Conversion/SCFToGPU/SCFToGPUPass.cpp | 1 + mlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp | 5 +- mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt | 1 + mlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp | 86 +- .../Dialect/Linalg/Transforms/FusionOnTensors.cpp | 481 +++++ mlir/lib/Dialect/Tensor/Transforms/Bufferize.cpp | 2 + mlir/lib/Target/Cpp/TranslateToCpp.cpp | 13 +- .../Dialect/OpenACC/OpenACCToLLVMIRTranslation.cpp | 27 +- mlir/lib/Transforms/Utils/DialectConversion.cpp | 8 +- ...ilure.mlir => detensorize_while_impure_cf.mlir} | 7 +- .../Dialect/Linalg/tile-and-fuse-on-tensors.mlir | 190 ++ mlir/test/Target/LLVMIR/openacc-llvm.mlir | 2 +- mlir/test/Transforms/test-legalizer-full.mlir | 105 +- mlir/test/Transforms/test-legalizer.mlir | 67 +- mlir/test/lib/Dialect/Test/TestOps.td | 3 + mlir/test/lib/Dialect/Test/TestPatterns.cpp | 40 +- mlir/unittests/Analysis/Presburger/SimplexTest.cpp | 1 + 324 files changed, 9144 insertions(+), 8261 deletions(-) create mode 100644 clang/test/CodeGen/X86/va-arg-sse.c create mode 100644 libc/src/inttypes/imaxdiv.cpp copy libc/src/{__support/integer_operations.h => inttypes/imaxdiv.h} (50%) create mode 100644 libc/src/stdlib/div.cpp copy libc/src/{__support/integer_operations.h => stdlib/div.h} (50%) create mode 100644 libc/src/stdlib/ldiv.cpp copy libc/src/{__support/integer_operations.h => stdlib/ldiv.h} (50%) create mode 100644 libc/src/stdlib/lldiv.cpp copy libc/src/{__support/integer_operations.h => stdlib/lldiv.h} (50%) create mode 100644 libc/test/src/inttypes/imaxdiv_test.cpp create mode 100644 libc/test/src/stdlib/DivTest.h create mode 100644 libc/test/src/stdlib/div_test.cpp create mode 100644 libc/test/src/stdlib/ldiv_test.cpp create mode 100644 libc/test/src/stdlib/lldiv_test.cpp create mode 100644 lldb/unittests/Process/Utility/DynamicRegisterInfoTest.cpp delete mode 100644 llvm/test/Analysis/CostModel/AArch64/masked_ldst_vls.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/v8.4-atomic-128.ll create mode 100644 llvm/test/CodeGen/AArch64/v8.4-atomic-128.ll create mode 100644 llvm/test/Transforms/InstCombine/icmp-vscale.ll create mode 100644 llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/ [...] copy llvm/test/tools/UpdateTestChecks/{update_llc_test_checks => update_mir_test_c [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_mir_test_checks/x86-con [...] copy llvm/test/tools/llvm-dwarfdump/X86/{prettyprint_types.s => prettyprint_types_ [...] create mode 100644 mlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp rename mlir/test/Dialect/Linalg/{detensorize_while_failure.mlir => detensorize_whi [...] create mode 100644 mlir/test/Dialect/Linalg/tile-and-fuse-on-tensors.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-aarch64-spec2k6-Os updated (5e432d08f -> e001f5a77)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-aarch64-spec2k6-Os in repository toolchain/ci/base-artifacts. from 5e432d08f 0: update: binutils-gcc-linux-glibc: 1 new e001f5a77 1: reset: llvm-bc69dd62c04a70d29943c1c06c7effed150b70e1: 1 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1564 -> 1552 bytes 02-prepare_abe/console.log.xz | Bin 2776 -> 2760 bytes 03-build_abe-binutils/console.log.xz | Bin 43752 -> 43568 bytes 04-build_abe-stage1/console.log.xz | Bin 71768 -> 75132 bytes 05-clean_sysroot/console.log.xz | Bin 332 -> 332 bytes 06-build_abe-linux/console.log.xz | Bin 8008 -> 10528 bytes 07-build_abe-glibc/console.log.xz | Bin 235720 -> 234328 bytes 08-build_abe-stage2/console.log.xz | Bin 169100 -> 176388 bytes 09-build_llvm-true/console.log.xz | Bin 60024 -> 59836 bytes 11-benchmark/benchmark-start.log | 2 +- 11-benchmark/benchmark.log | 64 +- 11-benchmark/console.log.xz | Bin 3076 -> 2272 bytes 12-check_regression/console.log.xz | Bin 5296 -> 6040 bytes 12-check_regression/exe.regressions | 1 + 12-check_regression/extra-bisect-params | 2 +- 12-check_regression/jira-body.txt | 3 + 12-check_regression/mail-body.txt | 3 + 12-check_regression/mail-subject.txt | 1 + 12-check_regression/results-0.csv | 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mode 100644 12-check_regression/results.regressions create mode 100644 12-check_regression/trigger-bisect create mode 100644 13-update_baseline/exe.regressions create mode 100644 13-update_baseline/mail-subject.txt create mode 100644 13-update_baseline/results.regressions create mode 100644 mail/jira-body.txt copy {12-check_regression => mail}/mail-body.txt (79%) create mode 100644 mail/mail-subject.txt create mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[glibc] branch release/2.34/master updated (772e33411b -> 33adeaa3e2)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch release/2.34/master in repository glibc. from 772e33411b Use support_open_dev_null_range io/tst-closefrom, misc/tst-c [...] new 33adeaa3e2 nptl: Avoid setxid deadlock with blocked signals in thread e [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: NEWS | 1 + nptl/pthread_create.c | 12 ++++- sysdeps/pthread/Makefile | 1 + .../pthread/tst-pthread-setuid-loop.c | 54 +++++++++++----------- 4 files changed, 40 insertions(+), 28 deletions(-) copy nptl/tst-pthread-attr-affinity-fail.c => sysdeps/pthread/tst-pthread-setuid-l [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[gcc] branch master updated (0d39eb28fd2 -> 9ce500289a6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 0d39eb28fd2 openmp: Diagnose omp::directive attribute without balanced [...] new cb8d916eef5 AVX512FP16: Add expander for rint/nearbyinthf2. new 1041111f198 AVX512FP16: Add expander for fmahf4 new fccd8855ed4 AVX512FP16: Add expander for smin/maxhf3. new 60698a19c77 AVX512FP16: Add fix(uns)?_truncmn2 for HF scalar and vector modes new 25faed6f379 AVX512FP16: Add float(uns)?mn2 expander new 3829793c50e AVX512FP16: add truncmn2/extendmn2 expanders new 9ce500289a6 AVX512FP16: Enable vec_cmpmn/vcondmn expanders for HF modes. The 7 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/config/i386/i386-expand.c | 2 + gcc/config/i386/i386.md | 62 +++++ gcc/config/i386/sse.md | 259 ++++++++++++++++++--- .../g++.target/i386/avx512fp16-vcondmn-minmax.C | 25 ++ .../g++.target/i386/avx512fp16-vcondmn-vec.C | 70 ++++++ .../gcc.target/i386/avx512fp16-builtin-minmax-1.c | 35 +++ .../gcc.target/i386/avx512fp16-builtin-round-1.c | 14 ++ .../gcc.target/i386/avx512fp16-floatvnhf.c | 61 +++++ gcc/testsuite/gcc.target/i386/avx512fp16-fma-1.c | 69 ++++++ .../gcc.target/i386/avx512fp16-trunc-extendvnhf.c | 55 +++++ gcc/testsuite/gcc.target/i386/avx512fp16-trunchf.c | 59 +++++ .../gcc.target/i386/avx512fp16-truncvnhf.c | 61 +++++ .../gcc.target/i386/avx512fp16-vcondmn-loop-1.c | 70 ++++++ .../gcc.target/i386/avx512fp16-vcondmn-loop-2.c | 143 ++++++++++++ .../gcc.target/i386/avx512fp16-vec_cmpmn.c | 32 +++ gcc/testsuite/gcc.target/i386/avx512fp16vl-fma-1.c | 70 ++++++ .../gcc.target/i386/avx512fp16vl-fma-vectorize-1.c | 45 ++++ 17 files changed, 1100 insertions(+), 32 deletions(-) create mode 100644 gcc/testsuite/g++.target/i386/avx512fp16-vcondmn-minmax.C create mode 100644 gcc/testsuite/g++.target/i386/avx512fp16-vcondmn-vec.C create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-builtin-minmax-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-floatvnhf.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-fma-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-trunc-extendvnhf.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-trunchf.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-truncvnhf.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcondmn-loop-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcondmn-loop-2.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vec_cmpmn.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-fma-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-fma-vectorize-1.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[glibc] branch master updated (b3f27d8150 -> 2849e2f533)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository glibc. from b3f27d8150 Add narrowing fma functions new 2849e2f533 nptl: Avoid setxid deadlock with blocked signals in thread e [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: nptl/pthread_create.c | 12 ++++- sysdeps/pthread/Makefile | 1 + .../pthread/tst-pthread-setuid-loop.c | 54 +++++++++++----------- 3 files changed, 39 insertions(+), 28 deletions(-) copy nptl/tst-pthread-attr-affinity-fail.c => sysdeps/pthread/tst-pthread-setuid-l [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap updated (e4777439fc7 -> 4c0c43623ef)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap in repository toolchain/ci/gcc. from e4777439fc7 Daily bump. adds 4c0c43623ef Overhaul jump thread state in forward threader. No new revisions were added by this update. Summary of changes: gcc/tree-ssa-dom.c | 134 +++++++++++++++++-- gcc/tree-ssa-threadedge.c | 322 ++++++++++++++++++++-------------------------- gcc/tree-ssa-threadedge.h | 51 ++++---- gcc/tree-vrp.c | 81 ++++++++++-- 4 files changed, 351 insertions(+), 237 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap updated (57420dd75 -> 182703be8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap in repository toolchain/ci/base-artifacts. discards 57420dd75 0: update: binutils-gcc: 2 new 182703be8 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (57420dd75) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-aar [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1536 -> 1548 bytes 02-prepare_abe/console.log.xz | Bin 2744 -> 2760 bytes 04-build_abe-binutils/console.log.xz | Bin 51164 -> 52320 bytes 05-build_abe-bootstrap/console.log.xz | Bin 259012 -> 258008 bytes 06-check_regression/console.log.xz | Bin 416 -> 416 bytes 07-update_baseline/console.log | 36 ---------------------------------- jenkins/manifest.sh | 8 ++++---- 7 files changed, 4 insertions(+), 40 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

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Tcwg-commits September 2021