Tcwg-commits July 2021

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_profiled updated (124bb55777c -> 0cbf03689e3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_profiled in repository toolchain/ci/gcc. from 124bb55777c Daily bump. adds acf9d1fd806 openmp: Add support for omp attributes section and scan directives adds 2050ac1a547 AArch64: correct usdot vectorizer and intrinsics optabs adds 1ab2270036d AArch64: correct dot-product RTL patterns for aarch64. adds dd44445f09b Pass gimple context to array_bounds_checker. adds 32f7506bdc3 Abstract out conditional simplification out of execute_vrp. adds 0cbf03689e3 PR fortran/93308/93963/94327/94331/97046 problems raised by [...] No new revisions were added by this update. Summary of changes: gcc/config/aarch64/aarch64-builtins.c | 4 + gcc/config/aarch64/aarch64-simd-builtins.def | 6 +- gcc/config/aarch64/aarch64-simd.md | 91 ++++---- gcc/config/aarch64/arm_neon.h | 12 +- gcc/cp/parser.c | 105 ++++++++- gcc/cp/parser.h | 4 + gcc/fortran/trans-decl.c | 32 +-- gcc/fortran/trans-expr.c | 24 +- gcc/gimple-array-bounds.cc | 17 +- gcc/gimple-array-bounds.h | 6 +- gcc/testsuite/g++.dg/gomp/attrs-1.C | 12 +- gcc/testsuite/g++.dg/gomp/attrs-2.C | 12 +- gcc/testsuite/g++.dg/gomp/attrs-6.C | 50 ++++ gcc/testsuite/g++.dg/gomp/attrs-7.C | 64 ++++++ gcc/testsuite/g++.dg/gomp/attrs-8.C | 10 + .../gfortran.dg/ISO_Fortran_binding_1.f90 | 2 +- gcc/testsuite/gfortran.dg/PR93308.f90 | 52 +++++ gcc/testsuite/gfortran.dg/PR93963.f90 | 150 ++++++++++++ gcc/testsuite/gfortran.dg/PR94327.c | 70 ++++++ gcc/testsuite/gfortran.dg/PR94327.f90 | 195 ++++++++++++++++ gcc/testsuite/gfortran.dg/PR94331.c | 73 ++++++ gcc/testsuite/gfortran.dg/PR94331.f90 | 252 +++++++++++++++++++++ gcc/testsuite/gfortran.dg/PR97046.f90 | 58 +++++ .../gfortran.dg/bind_c_array_params_2.f90 | 2 +- gcc/tree-vrp.c | 39 ++-- libgfortran/runtime/ISO_Fortran_binding.c | 56 ++++- 26 files changed, 1260 insertions(+), 138 deletions(-) create mode 100644 gcc/testsuite/g++.dg/gomp/attrs-6.C create mode 100644 gcc/testsuite/g++.dg/gomp/attrs-7.C create mode 100644 gcc/testsuite/g++.dg/gomp/attrs-8.C create mode 100644 gcc/testsuite/gfortran.dg/PR93308.f90 create mode 100644 gcc/testsuite/gfortran.dg/PR93963.f90 create mode 100644 gcc/testsuite/gfortran.dg/PR94327.c create mode 100644 gcc/testsuite/gfortran.dg/PR94327.f90 create mode 100644 gcc/testsuite/gfortran.dg/PR94331.c create mode 100644 gcc/testsuite/gfortran.dg/PR94331.f90 create mode 100644 gcc/testsuite/gfortran.dg/PR97046.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_profiled updated (b924d9bad5 -> 0b73bf7fa3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_profiled in repository toolchain/ci/binutils-gdb. from b924d9bad5 Automatic date update in version.in adds b6c4205149 gdb/mi: handle no condition argument case for -break-condition adds 730afdd139 gdb: move remaining ChangeLogs to legacy files adds 3751264cdd PATCH [1/10] arm: add 'bti' instruction for Armv8.1-M pacbti [...] adds f1e1d7f305 PATCH [2/10] arm: add 'pacbti' instruction for Armv8.1-M pac [...] adds e43ca2cbae PATCH [3/10] arm: add 'aut' instruction for Armv8.1-M pacbti [...] adds ce537a7db7 PATCH [4/10] arm: add 'pac' instruction for Armv8.1-M pacbti [...] adds 2c6ccfcfdd PATCH [5/10] arm: Extend again arm_feature_set struct to pro [...] adds 5a0c7a819f PATCH [6/10] arm: Add -march=armv8.1-m.main+pacbti flag adds e07352fa4f PATCH [7/10] arm: add 'bxaut' instruction for Armv8.1-M pacb [...] adds be05908c0c PATCH [8/10] arm: add 'autg' instruction for Armv8.1-M pacbt [...] adds 5c43020d83 PATCH [9/10] arm: add 'pacg' instruction for Armv8.1-M pacbt [...] adds 0264bf6fe3 PATCH [10/10] arm: Alias 'ra_auth_code' to r12 for pacbti. adds c9bd98593b gdb: Fix numerical field extraction for target description "flags" adds 0b73bf7fa3 Fix the Windows build No new revisions were added by this update. Summary of changes: gas/config/tc-arm.c | 64 ++++++++++++++++++++++++ gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.d | 5 ++ gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.l | 10 ++++ gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.s | 14 ++++++ gas/testsuite/gas/arm/armv8_1-m-pacbti.d | 16 ++++++ gas/testsuite/gas/arm/armv8_1-m-pacbti.s | 11 ++++ gdb/doc/{ChangeLog => ChangeLog-1991-2021} | 0 gdb/doc/gdb.texinfo | 5 +- gdb/mi/mi-cmd-break.c | 15 +++--- gdb/stubs/{ChangeLog => ChangeLog-2012-2020} | 0 gdb/testsuite/{ChangeLog => ChangeLog-2014-2021} | 0 gdb/testsuite/gdb.mi/mi-break.exp | 22 ++++++++ gdb/valprint.c | 36 ++++++++++++- gdb/windows-nat.c | 20 ++++---- gdbserver/{ChangeLog => ChangeLog-2002-2021} | 0 gdbserver/win32-low.cc | 6 +-- gdbsupport/{ChangeLog => ChangeLog-2020-2021} | 0 include/opcode/arm.h | 27 ++++++++-- opcodes/arm-dis.c | 17 +++++++ 19 files changed, 240 insertions(+), 28 deletions(-) create mode 100644 gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.l create mode 100644 gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-pacbti.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-pacbti.s rename gdb/doc/{ChangeLog => ChangeLog-1991-2021} (100%) rename gdb/stubs/{ChangeLog => ChangeLog-2012-2020} (100%) rename gdb/testsuite/{ChangeLog => ChangeLog-2014-2021} (100%) rename gdbserver/{ChangeLog => ChangeLog-2002-2021} (100%) rename gdbsupport/{ChangeLog => ChangeLog-2020-2021} (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_profiled updated (982966e4 -> d810858c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_profiled in repository toolchain/ci/base-artifacts. discards 982966e4 0: update: binutils-gcc: 1 new d810858c 0: update: binutils-gcc: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (982966e4) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-master-arm-boots [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 324 +- 02-prepare_abe/console.log | 451 +- 04-build_abe-bootstrap_profiled/console.log | 186255 ++++++++++++------------ 05-check_regression/console.log | 4 +- 06-update_baseline/console.log | 6 +- console.log | 187040 +++++++++++++------------ jenkins/manifest.sh | 12 +- 7 files changed, 187164 insertions(+), 186928 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-Os updated (34dc4f24f2d3 -> 3ca6dea05dec)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-Os in repository toolchain/ci/llvm-project. from 34dc4f24f2d3 Revert rG939291041bb35b8088e3b61be2b8b3bc950f64a7 "[AMDGPU [...] adds 99f869c8f00a [Attributes] Remove nonnull from UB-implying attributes adds 087a8eea359a [Attributes] Clean up handling of UB implying attributes (NFC) adds b95f66ad786b [X86][SSE] LowerRotate - perform modulo on the amount spla [...] adds c46ccb8538c5 [OpenMP][tests][NFC] Update test status for gcc 11 and 12 adds 6530ea409506 [AArch64] Fix Local Deallocation for Homogeneous Prolog/Epilog adds 9ebd0dbf0f69 [NFC][Codegen][X86] Improve test coverage for insertions i [...] adds 58725c12bb27 [OpenMP] Introduce RAII to protect certain RTL calls from DCE adds e30b3b23a4ed [libomptarget] Build amdgpu plugin without hsa adds 1cfecf4fc427 [X86][AVX] Add getBROADCAST_LOAD helper function. NFCI. adds a45bcde05f09 [LangRef] Reorder two paragraphs for comdat adds e3251f2ec44b Revert "[libomptarget] Build amdgpu plugin without hsa" adds b1777b04dc4b Revert "[VPlan] Add recipe for first-order rec phis, make [...] adds e814b28eeb30 [docs] Update release notes to mention lli JIT engine switch adds a6eb34624dcf [lld/mac] Add tests for the interaction between -rename_se [...] adds 14bb6e4d709c Revert "[lld/mac] Add tests for the interaction between -r [...] adds dd0b463dd9ed [libomptarget][amdgpu] More robust handling of failure to [...] adds 6bf7d2d9c92e [lld/mac] Reland: Add tests for the interaction between -r [...] adds afdeb432f0a1 [lld/mac] Move output segment rename logic into OutputSegment adds 80caa1eb4a0e [lld/mac] Add support for segment$start$ and segment$end$ symbols adds 75e7d1320cae [lld/mac] Make comment style uniform in start-end.s test adds e7a7ad134fe1 [ELF] Support quoted symbols in symbol assignments adds 48379f27d044 [NFC][SimplifyCFG] Add more negative tests for profmd-indu [...] adds e58ce35f7b67 [SimplifyCFG] Don't speculatively execute BB if it's predi [...] adds 59a5964e033c [SimplifyCFG] Don't speculatively execute BB[s] if they ar [...] adds c2dacb1cd3cc [SimplifyCFG] Fold branch to common dest: if branch is unp [...] adds 7d9a2c714c4c Remove the NotUnderValgrind caching flag adds 5eb2e9aa64b7 Build libSupport with -Werror=global-constructors (NFC) adds df7d9c8cb03c Revert "Build libSupport with -Werror=global-constructors (NFC)" adds 9451403c5f8c [OPENCL] opencl-c.h: add initial CL 3.0 conditionals for a [...] adds 2eb7e5f0eda7 [yaml2obj] Do not write the string table if there is no st [...] adds 579cc9ad2e2d Build libSupport with -Werror=global-constructors (NFC) adds 3211eadfe09a Revert "Build libSupport with -Werror=global-constructors (NFC)" adds 0d3e4d9d4d2c [Debug-Info][llvm-dwarfdump] Don't use DW_FORM_data4/8 to [...] adds 1558bb80c01b [Object] make SourceMgr available to MCContext during inli [...] adds ae6b40000238 [Preprocessor] Implement -fminimize-whitespace. adds 0425332015f4 [mlir] Added new RegionBranchTerminatorOpInterface and ada [...] adds cdcc35476833 [ORC][ORC-RT] Add initial Objective-C and Swift support to [...] adds 47afd43eaa9b [libc] fix LibcUnitTestMain when building with shared libraries adds eb6c63cb0b6e [mlir] Fix RankedTensorType::walkImmediateSubElements method adds 93fe84d32fea [libomptarget][nfc] Squash unused variable warning adds 2a613a779044 [libomptarget] Build amdgpu plugin without hsa adds 0a3c7960cba1 Revert "Revert D106562 "[clangd] Get rid of arg adjusters [...] adds f924a3d47492 [SelectionDAG] Support scalable-vector splats in yet more cases adds 0aff1798b572 [Analysis] Add simple cost model for strict (in-order) reductions adds e6ff9179cee4 [AArch64][AsmParser] NFC: Parser.getTok().getLoc() -> getLoc() adds e9274af71893 Revert "[clangd] Avoid range-loop init-list lifetime subtleties." adds f64e25156020 [X86][SSE] Don't scrub address math from interleaved shuff [...] adds c8472db0a887 [X86][AVX] Prefer vinsertf128 to vperm2f128 on AVX1 targets adds 73e4e9cd007a [AArch64][SVE] Improve code generation for vector_splice f [...] adds b2a5f0029f27 Fix test failures caused by 0aff1798b5721d5f95d16f465b99d3 [...] adds 0bfc26e3a4bf [SVE][AArch64] Improve code generation for vector_splice f [...] adds 20b0fa91c9ee [SVE] Add support for folding for select + masked loads adds d995d6376762 [VPlan] Use stored value from recipes for interleave groups. adds 46c03668774c [Inliner] Make the CallPenalty configurable adds 8a8d01d58c14 [NFC] Change VFShape so it contains an ElementCount rather [...] adds a053afed4989 [SLP]Fix costs calculations. adds 539437e288f2 [mlir] split type conversion to two lines for GCC's sake adds bf28111ebdb7 [AArch65][SVE] Remove vector_splice from AddedComplexity pattern adds d7cb2a079677 Revert "[SLP]Fix costs calculations." adds e484e1ae0332 [SVE] Fix casts to <FixedVectorType> in truncateToMinimalB [...] adds ffb3277b0036 [SimplifyCFG] Improve store speculation check adds a487a49acc5a AArch64: support i128 (& larger) returns in GlobalISel adds 010f8e305705 [ARM] Ensure correct regclass in distributing postinc adds 9ac10658aeda [AMDGPU] Fix MMO for raw/struct buffer access with non-con [...] adds 683b9ed0d593 [AMDGPU] Pre-commit global-isel test case for D106451 adds 59f6865231ff [AMDGPU][GISel] Fix MMO for raw/struct buffer access with [...] adds 87ed73fe6e01 [llvm-readobj] Display multiple function names for stack s [...] adds 81600160b3f9 [OpenCL] Change default standard version to CL1.2 adds 6ca48efcf6e1 [SLP]Fix costs calculations. adds 93664503be6b [LV] Add test to store a first-order rec via interleave group. adds f86694cb808f [InstrRef][AArch64][1/4] Accept constant physreg variable [...] adds 4761321d49db [Analyzer][solver][NFC] print constraints deterministicall [...] adds 404f0d4f7cc7 Simplify away some SmallVector copies. NFCI. adds 33146857e984 [IR] Consider non-willreturn as side effect (PR50511) adds 1139fd4270c7 [libc++][ci] Detect not committed generated files. adds 7a1e73f0b9fc Recommit "[VPlan] Add recipe for first-order rec phis, mak [...] adds 8cd8120a7b5d [SystemZ] Add support for new cpu architecture - arch14 adds 3274cdc83ecd [Clang][OpenMP] Remove the mandatory flush for capture for [...] adds 81eafb8a37c9 [AArch64][SVE] Break false dependencies for inactive lanes [...] adds 981e9dce5482 [LV] Don't assume isScalarAfterVectorization if one of the [...] adds 0d3807b365e5 [MergeICmps] Separate out BCECmp and use Optional (NFC) adds d8260269c32c [SimplifyLibCalls] reduce code duplication; NFC adds 87d604ffe494 [SimplifyLibCalls] avoid crash on pointer math adds 3ca6dea05dec [libc++][NFC] Change a few instances of > > to >> in C++20 code No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/CompileCommands.cpp | 18 +- clang-tools-extra/clangd/CompileCommands.h | 4 + clang-tools-extra/clangd/Compiler.cpp | 7 + .../clangd/GlobalCompilationDatabase.cpp | 10 +- .../clangd/unittests/CompileCommandsTests.cpp | 40 +- .../clangd/unittests/CompilerTests.cpp | 46 + clang/docs/ClangCommandLineReference.rst | 10 + clang/include/clang/Basic/BuiltinsSystemZ.def | 7 + clang/include/clang/Basic/DiagnosticDriverKinds.td | 2 + clang/include/clang/Driver/Options.td | 3 + clang/include/clang/Driver/Types.h | 8 + .../clang/Frontend/PreprocessorOutputOptions.h | 2 + clang/lib/Basic/Targets/SystemZ.cpp | 6 +- clang/lib/Basic/Targets/SystemZ.h | 2 + clang/lib/CodeGen/CGStmtOpenMP.cpp | 55 +- clang/lib/Driver/ToolChains/Clang.cpp | 15 +- clang/lib/Driver/Types.cpp | 39 + clang/lib/Frontend/CompilerInvocation.cpp | 2 +- clang/lib/Frontend/PrintPreprocessedOutput.cpp | 349 ++++--- clang/lib/Headers/opencl-c-base.h | 2 + clang/lib/Headers/opencl-c.h | 35 +- clang/lib/Headers/vecintrin.h | 35 + clang/lib/Lex/Preprocessor.cpp | 6 + clang/lib/Sema/SemaChecking.cpp | 5 + clang/lib/Sema/SemaDecl.cpp | 2 +- .../StaticAnalyzer/Core/RangeConstraintManager.cpp | 51 +- .../SystemZ/builtins-systemz-vector4-error.c | 50 + .../CodeGen/SystemZ/builtins-systemz-vector4.c | 53 ++ .../SystemZ/builtins-systemz-zvector4-error.c | 45 + .../CodeGen/SystemZ/builtins-systemz-zvector4.c | 63 ++ clang/test/CodeGen/SystemZ/systemz-abi-vector.c | 2 + clang/test/CodeGen/SystemZ/systemz-abi.c | 5 + clang/test/CodeGen/target-data.c | 2 + clang/test/CodeGenOpenCL/spir_version.cl | 7 +- clang/test/Driver/systemz-march.c | 2 + clang/test/Misc/target-invalid-cpu-note.c | 2 +- clang/test/OpenMP/atomic_capture_codegen.cpp | 24 +- clang/test/Parser/opencl-atomics-cl20.cl | 2 +- clang/test/Parser/opencl-cl20.cl | 20 +- clang/test/Parser/opencl-storage-class.cl | 2 +- clang/test/Preprocessor/comment_save.c | 1 + clang/test/Preprocessor/first-line-indent.c | 7 + clang/test/Preprocessor/hash_line.c | 4 + .../Preprocessor/line-directive-output-mincol.c | 11 + clang/test/Preprocessor/line-directive-output.c | 1 + clang/test/Preprocessor/macro_space.c | 9 + .../Preprocessor/minimize-whitespace-messages.c | 8 + clang/test/Preprocessor/minimize-whitespace.c | 55 ++ clang/test/Preprocessor/predefined-arch-macros.c | 17 +- clang/test/Preprocessor/predefined-macros.c | 2 +- clang/test/Preprocessor/print_line_include.c | 3 + clang/test/Preprocessor/stringize_space.c | 6 +- clang/test/SemaOpenCL/fp64-fp16-options.cl | 20 +- clang/test/SemaOpenCL/func.cl | 6 +- compiler-rt/lib/orc/macho_platform.cpp | 143 ++- compiler-rt/lib/orc/macho_platform.h | 12 +- .../TestCases/Darwin/x86-64/trivial-objc-methods.S | 157 +++ libc/utils/UnitTest/CMakeLists.txt | 2 +- libcxx/include/__iterator/concepts.h | 14 +- libcxx/include/__ranges/concepts.h | 18 +- libcxx/utils/ci/buildkite-pipeline.yml | 1 + libcxx/utils/ci/run-buildbot | 7 + lld/ELF/ScriptParser.cpp | 4 +- lld/MachO/ConcatOutputSection.cpp | 5 +- lld/MachO/OutputSegment.cpp | 17 + lld/MachO/OutputSegment.h | 6 + lld/MachO/SymbolTable.cpp | 20 +- lld/MachO/Writer.cpp | 1 + lld/test/ELF/linkerscript/symbol-name.test | 13 +- lld/test/ELF/linkerscript/symbolreferenced.s | 4 + lld/test/MachO/rename.s | 80 +- lld/test/MachO/start-end.s | 148 ++- llvm/docs/LangRef.rst | 12 +- llvm/docs/ReleaseNotes.rst | 3 + llvm/include/llvm/Analysis/InlineCost.h | 2 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 34 +- .../llvm/Analysis/TargetTransformInfoImpl.h | 1 + llvm/include/llvm/Analysis/VectorUtils.h | 8 +- llvm/include/llvm/CodeGen/BasicTTIImpl.h | 65 +- .../llvm/ExecutionEngine/Orc/MachOPlatform.h | 21 +- llvm/include/llvm/IR/Attributes.h | 13 +- llvm/include/llvm/IR/Constants.h | 3 +- llvm/include/llvm/IR/DerivedTypes.h | 9 +- llvm/include/llvm/IR/InstrTypes.h | 9 - llvm/include/llvm/IR/Instruction.h | 7 +- llvm/include/llvm/IR/IntrinsicsSystemZ.td | 22 + llvm/include/llvm/IR/PatternMatch.h | 8 + llvm/lib/Analysis/DemandedBits.cpp | 2 +- llvm/lib/Analysis/InlineCost.cpp | 17 +- llvm/lib/Analysis/ScalarEvolution.cpp | 2 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 5 +- llvm/lib/Analysis/VFABIDemangling.cpp | 2 +- llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 15 +- llvm/lib/CodeGen/MachineFunction.cpp | 21 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 9 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 5 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 9 +- llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp | 116 ++- llvm/lib/ExecutionEngine/Orc/Mangling.cpp | 37 +- llvm/lib/IR/Attributes.cpp | 19 +- llvm/lib/IR/Function.cpp | 6 - llvm/lib/IR/Instruction.cpp | 4 + llvm/lib/Object/ModuleSymbolTable.cpp | 9 +- llvm/lib/ObjectYAML/XCOFFEmitter.cpp | 9 +- llvm/lib/Support/Host.cpp | 5 +- llvm/lib/Support/Valgrind.cpp | 15 - .../Target/AArch64/AArch64ExpandPseudoInsts.cpp | 9 + llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 2 +- llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 16 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 40 + llvm/lib/Target/AArch64/AArch64ISelLowering.h | 1 + llvm/lib/Target/AArch64/AArch64InstrFormats.td | 1 + llvm/lib/Target/AArch64/AArch64InstrInfo.h | 1 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 36 +- .../Target/AArch64/AArch64TargetTransformInfo.cpp | 24 +- .../Target/AArch64/AArch64TargetTransformInfo.h | 14 +- .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 28 +- .../Target/AArch64/GISel/AArch64CallLowering.cpp | 8 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 174 +++- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 68 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 7 +- .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 6 +- llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 2 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 17 +- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 13 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 8 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 1 + llvm/lib/Target/SystemZ/SystemZFeatures.td | 45 +- llvm/lib/Target/SystemZ/SystemZInstrFormats.td | 79 ++ llvm/lib/Target/SystemZ/SystemZInstrInfo.td | 5 + llvm/lib/Target/SystemZ/SystemZInstrSystem.td | 25 + llvm/lib/Target/SystemZ/SystemZInstrVector.td | 54 ++ llvm/lib/Target/SystemZ/SystemZProcessors.td | 2 + llvm/lib/Target/SystemZ/SystemZSubtarget.cpp | 6 +- llvm/lib/Target/SystemZ/SystemZSubtarget.h | 26 + llvm/lib/Target/X86/X86ISelLowering.cpp | 161 ++-- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 10 +- llvm/lib/Target/X86/X86TargetTransformInfo.h | 2 +- .../lib/Transforms/IPO/DeadArgumentElimination.cpp | 5 +- llvm/lib/Transforms/IPO/OpenMPOpt.cpp | 34 + .../Transforms/InstCombine/InstCombineSelect.cpp | 31 + llvm/lib/Transforms/Scalar/ADCE.cpp | 2 +- llvm/lib/Transforms/Scalar/MergeICmps.cpp | 153 ++- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 53 +- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 19 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 52 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 32 +- .../test/Analysis/CostModel/AArch64/reduce-fadd.ll | 20 + .../Analysis/CostModel/AArch64/sve-intrinsics.ll | 41 +- .../Analysis/CostModel/X86/intrinsic-cost-kinds.ll | 6 +- llvm/test/Analysis/CostModel/X86/reduce-fadd.ll | 154 +-- llvm/test/Analysis/CostModel/X86/reduce-fmul.ll | 154 +-- .../CodeGen/AArch64/GlobalISel/arm64-fallback.ll | 28 - .../CodeGen/AArch64/GlobalISel/translate-ret.ll | 59 ++ .../AArch64/arm64-homogeneous-prolog-epilog.ll | 21 + .../test/CodeGen/AArch64/arm64-subvector-extend.ll | 7 +- .../CodeGen/AArch64/named-vector-shuffles-sve.ll | 583 ++++++------ llvm/test/CodeGen/AArch64/sve-forward-st-to-ld.ll | 1 + .../AArch64/sve-gather-scatter-dag-combine.ll | 1 + .../CodeGen/AArch64/sve-masked-gather-legalize.ll | 1 + llvm/test/CodeGen/AArch64/sve-unary-movprfx.ll | 1000 ++++++++++++++++++++ llvm/test/CodeGen/AArch64/sve2-unary-movprfx.ll | 273 ++++++ .../CodeGen/AMDGPU/GlobalISel/buffer-schedule.ll | 20 + .../llvm.amdgcn.raw.buffer.atomic.add.ll | 16 +- .../llvm.amdgcn.raw.buffer.atomic.cmpswap.ll | 10 +- .../llvm.amdgcn.raw.buffer.atomic.fadd.ll | 40 +- .../llvm.amdgcn.raw.buffer.load.format.f16.ll | 20 +- .../llvm.amdgcn.raw.buffer.load.format.ll | 12 +- .../GlobalISel/llvm.amdgcn.raw.buffer.load.ll | 68 +- .../llvm.amdgcn.raw.buffer.store.format.f16.ll | 44 +- .../llvm.amdgcn.raw.buffer.store.format.f32.ll | 24 +- .../GlobalISel/llvm.amdgcn.raw.buffer.store.ll | 68 +- .../GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll | 32 +- .../GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll | 18 +- .../llvm.amdgcn.raw.tbuffer.store.f16.ll | 40 +- .../GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll | 16 +- .../GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll | 50 +- .../llvm.amdgcn.struct.buffer.atomic.add.ll | 14 +- .../llvm.amdgcn.struct.buffer.atomic.cmpswap.ll | 10 +- .../llvm.amdgcn.struct.buffer.atomic.fadd.ll | 40 +- .../llvm.amdgcn.struct.buffer.load.format.f16.ll | 24 +- .../llvm.amdgcn.struct.buffer.load.format.ll | 14 +- .../GlobalISel/llvm.amdgcn.struct.buffer.load.ll | 32 +- .../llvm.amdgcn.struct.buffer.store.format.f16.ll | 20 +- .../llvm.amdgcn.struct.buffer.store.format.f32.ll | 12 +- .../GlobalISel/llvm.amdgcn.struct.buffer.store.ll | 20 +- .../llvm.amdgcn.struct.tbuffer.load.f16.ll | 24 +- .../GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll | 14 +- .../regbankselect-amdgcn.raw.buffer.load.ll | 10 +- .../regbankselect-amdgcn.struct.buffer.load.ll | 10 +- .../regbankselect-amdgcn.struct.buffer.store.ll | 10 +- .../AMDGPU/buffer-intrinsics-mmo-offsets.ll | 114 +-- llvm/test/CodeGen/AMDGPU/buffer-schedule.ll | 4 +- .../CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-splats.ll | 19 +- llvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll | 116 ++- llvm/test/CodeGen/SystemZ/vec-intrinsics-04.ll | 54 ++ .../test/CodeGen/Thumb2/mve-postinc-distribute.mir | 35 +- llvm/test/CodeGen/X86/avx-insertelt.ll | 156 +-- llvm/test/CodeGen/X86/min-legal-vector-width.ll | 2 - llvm/test/CodeGen/X86/sse-insertelt-from-mem.ll | 469 +++++++++ llvm/test/CodeGen/X86/sse-insertelt.ll | 376 ++++++++ llvm/test/CodeGen/X86/var-permute-128.ll | 24 +- llvm/test/CodeGen/X86/vector-fshl-256.ll | 2 - llvm/test/CodeGen/X86/vector-fshl-rot-128.ll | 16 +- llvm/test/CodeGen/X86/vector-fshl-rot-256.ll | 45 +- llvm/test/CodeGen/X86/vector-fshl-rot-sub128.ll | 9 +- llvm/test/CodeGen/X86/vector-fshr-rot-sub128.ll | 26 +- llvm/test/CodeGen/X86/vector-interleave.ll | 15 +- llvm/test/CodeGen/X86/vector-rotate-128.ll | 16 +- llvm/test/CodeGen/X86/vector-rotate-256.ll | 45 +- llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 22 +- llvm/test/CodeGen/X86/x86-interleaved-access.ll | 28 +- .../DebugInfo/AArch64/instr-ref-const-physreg.ll | 38 + llvm/test/DebugInfo/MSP430/dwarf-basics.ll | 2 +- .../PowerPC/data_member_location_dwarf3.ll | 36 + llvm/test/MC/AArch64/shift_extend_op_w_symbol.s | 4 +- llvm/test/MC/Disassembler/SystemZ/insns-arch14.txt | 499 ++++++++++ llvm/test/MC/SystemZ/insn-bad-arch14.s | 223 +++++ llvm/test/MC/SystemZ/insn-bad-z15.s | 110 +++ llvm/test/MC/SystemZ/insn-good-arch14.s | 377 ++++++++ llvm/test/Object/BPF/yaml2obj-elf-bpf-rel.yaml | 2 +- llvm/test/Transforms/DeadArgElim/NoundefAttrs.ll | 10 +- .../Inline/inline-call-penalty-option.ll | 28 + .../Transforms/InstCombine/select-masked_load.ll | 98 ++ llvm/test/Transforms/InstCombine/stpcpy-1.ll | 34 +- llvm/test/Transforms/InstCombine/unused-nonnull.ll | 4 +- llvm/test/Transforms/LICM/sinking.ll | 6 +- .../LoopDeletion/noop-loops-with-subloops.ll | 9 +- .../interleaved-store-of-first-order-recurrence.ll | 50 + .../LoopVectorize/AArch64/predication_costs.ll | 2 +- .../LoopVectorize/AArch64/strict-fadd-cost.ll | 50 + .../LoopVectorize/AArch64/sve-strict-fadd-cost.ll | 55 ++ .../LoopVectorize/AArch64/sve-widen-gep.ll | 81 ++ .../LoopVectorize/ARM/mve-reduction-predselect.ll | 37 +- .../Transforms/LoopVectorize/ARM/mve-reductions.ll | 45 +- .../Transforms/LoopVectorize/pointer-induction.ll | 35 +- llvm/test/Transforms/PGOProfile/chr.ll | 3 +- llvm/test/Transforms/SCCP/calltest.ll | 2 +- .../X86/vec_list_bias-inseltpoison.ll | 26 +- .../Transforms/SLPVectorizer/X86/vec_list_bias.ll | 26 +- ...old-two-entry-phi-node-with-one-block-profmd.ll | 49 +- ...ld-two-entry-phi-node-with-two-blocks-profmd.ll | 94 +- .../SimplifyCFG/preserve-branchweights.ll | 59 +- .../test/Transforms/SimplifyCFG/speculate-store.ll | 16 +- .../speculatively-execute-block-profmd.ll | 58 +- llvm/test/tools/llvm-readobj/ELF/stack-sizes.test | 151 +-- llvm/tools/llvm-readobj/ELFDumper.cpp | 69 +- llvm/unittests/Analysis/VectorFunctionABITest.cpp | 54 +- llvm/unittests/Analysis/VectorUtilsTest.cpp | 34 +- llvm/unittests/Support/Host.cpp | 6 +- mlir/include/mlir/Dialect/SCF/SCFOps.td | 8 +- .../mlir/Interfaces/ControlFlowInterfaces.h | 26 + .../mlir/Interfaces/ControlFlowInterfaces.td | 51 +- .../Analysis/AliasAnalysis/LocalAliasAnalysis.cpp | 14 +- mlir/lib/Analysis/BufferViewFlowAnalysis.cpp | 14 +- mlir/lib/Analysis/DataFlowAnalysis.cpp | 37 +- mlir/lib/Dialect/SCF/SCF.cpp | 22 +- mlir/lib/IR/BuiltinTypes.cpp | 2 + mlir/lib/Interfaces/ControlFlowInterfaces.cpp | 71 +- mlir/lib/Transforms/BufferDeallocation.cpp | 14 +- mlir/lib/Transforms/BufferOptimizations.cpp | 3 +- mlir/test/Dialect/SCF/invalid.mlir | 7 +- mlir/test/IR/print-attr-type-aliases.mlir | 4 + mlir/test/Transforms/sccp-structured.mlir | 15 +- mlir/test/lib/Dialect/Test/TestDialect.cpp | 1 + openmp/libomptarget/plugins/amdgpu/CMakeLists.txt | 6 +- openmp/libomptarget/plugins/amdgpu/impl/system.cpp | 4 - openmp/libomptarget/plugins/amdgpu/src/rtl.cpp | 11 +- openmp/libomptarget/src/device.cpp | 1 + .../runtime/test/ompt/tasks/task_early_fulfill.c | 4 +- openmp/runtime/test/ompt/tasks/task_late_fulfill.c | 4 +- openmp/runtime/test/ompt/tasks/taskwait-depend.c | 4 +- openmp/runtime/test/tasking/omp_detach_taskwait.c | 6 +- .../tools/archer/tests/task/task_early_fulfill.c | 6 +- openmp/tools/archer/tests/task/task_late_fulfill.c | 12 +- 276 files changed, 8748 insertions(+), 2397 deletions(-) create mode 100644 clang/test/CodeGen/SystemZ/builtins-systemz-vector4-error.c create mode 100644 clang/test/CodeGen/SystemZ/builtins-systemz-vector4.c create mode 100644 clang/test/CodeGen/SystemZ/builtins-systemz-zvector4-error.c create mode 100644 clang/test/CodeGen/SystemZ/builtins-systemz-zvector4.c create mode 100644 clang/test/Preprocessor/line-directive-output-mincol.c create mode 100644 clang/test/Preprocessor/minimize-whitespace-messages.c create mode 100644 clang/test/Preprocessor/minimize-whitespace.c create mode 100644 compiler-rt/test/orc/TestCases/Darwin/x86-64/trivial-objc-methods.S create mode 100644 llvm/test/Analysis/CostModel/AArch64/reduce-fadd.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/translate-ret.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-unary-movprfx.ll create mode 100644 llvm/test/CodeGen/AArch64/sve2-unary-movprfx.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-schedule.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-intrinsics-04.ll create mode 100644 llvm/test/CodeGen/X86/sse-insertelt-from-mem.ll create mode 100644 llvm/test/CodeGen/X86/sse-insertelt.ll create mode 100644 llvm/test/DebugInfo/AArch64/instr-ref-const-physreg.ll create mode 100644 llvm/test/DebugInfo/PowerPC/data_member_location_dwarf3.ll create mode 100644 llvm/test/MC/Disassembler/SystemZ/insns-arch14.txt create mode 100644 llvm/test/MC/SystemZ/insn-bad-arch14.s create mode 100644 llvm/test/MC/SystemZ/insn-good-arch14.s create mode 100644 llvm/test/Transforms/Inline/inline-call-penalty-option.ll create mode 100644 llvm/test/Transforms/InstCombine/select-masked_load.ll create mode 100644 llvm/test/Transforms/LoopVectorize/AArch64/interleaved-store-of [...] create mode 100644 llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-cost.ll create mode 100644 llvm/test/Transforms/LoopVectorize/AArch64/sve-strict-fadd-cost.ll create mode 100644 llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-Os updated (d34ed66f96 -> ddcc612ce9)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-Os in repository toolchain/ci/glibc. from d34ed66f96 manual: Document unsupported cases for interposition adds e785361ce3 i386: Regenerate ulps adds ddcc612ce9 Exclude static tests for mcheck and malloc-check No new revisions were added by this update. Summary of changes: malloc/Makefile | 13 ++--- sysdeps/i386/fpu/libm-test-ulps | 48 ++++++++--------- sysdeps/i386/i686/fpu/multiarch/libm-test-ulps | 74 +++++++++++++------------- 3 files changed, 64 insertions(+), 71 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-Os updated (b454c409569 -> f384e2f551f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-Os in repository toolchain/ci/gcc. from b454c409569 [Ada] Declare time_t uniformly based on a system parameter #2 adds 124bb55777c Daily bump. adds acf9d1fd806 openmp: Add support for omp attributes section and scan directives adds 2050ac1a547 AArch64: correct usdot vectorizer and intrinsics optabs adds 1ab2270036d AArch64: correct dot-product RTL patterns for aarch64. adds dd44445f09b Pass gimple context to array_bounds_checker. adds 32f7506bdc3 Abstract out conditional simplification out of execute_vrp. adds 0cbf03689e3 PR fortran/93308/93963/94327/94331/97046 problems raised by [...] adds bf6d414415e Remove legacy external declarations in toplev.h [PR101447] adds 3cb72ac1718 Pass relationship to methods calling generic fold_range. adds f384e2f551f Implement operator_bitwise_xor::op1_op2_relation_effect. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 4 + gcc/config/aarch64/aarch64-builtins.c | 4 + gcc/config/aarch64/aarch64-simd-builtins.def | 6 +- gcc/config/aarch64/aarch64-simd.md | 91 ++++---- gcc/config/aarch64/arm_neon.h | 12 +- gcc/cp/parser.c | 105 ++++++++- gcc/cp/parser.h | 4 + gcc/fortran/trans-decl.c | 32 +-- gcc/fortran/trans-expr.c | 24 +- gcc/gimple-array-bounds.cc | 17 +- gcc/gimple-array-bounds.h | 6 +- gcc/range-op.cc | 41 +++- gcc/testsuite/g++.dg/gomp/attrs-1.C | 12 +- gcc/testsuite/g++.dg/gomp/attrs-2.C | 12 +- gcc/testsuite/g++.dg/gomp/attrs-6.C | 50 ++++ gcc/testsuite/g++.dg/gomp/attrs-7.C | 64 ++++++ gcc/testsuite/g++.dg/gomp/attrs-8.C | 10 + .../gfortran.dg/ISO_Fortran_binding_1.f90 | 2 +- gcc/testsuite/gfortran.dg/PR93308.f90 | 52 +++++ gcc/testsuite/gfortran.dg/PR93963.f90 | 150 ++++++++++++ gcc/testsuite/gfortran.dg/PR94327.c | 70 ++++++ gcc/testsuite/gfortran.dg/PR94327.f90 | 195 ++++++++++++++++ gcc/testsuite/gfortran.dg/PR94331.c | 73 ++++++ gcc/testsuite/gfortran.dg/PR94331.f90 | 252 +++++++++++++++++++++ gcc/testsuite/gfortran.dg/PR97046.f90 | 58 +++++ .../gfortran.dg/bind_c_array_params_2.f90 | 2 +- gcc/toplev.h | 5 - gcc/tree-vrp.c | 39 ++-- libgfortran/runtime/ISO_Fortran_binding.c | 56 ++++- 30 files changed, 1302 insertions(+), 148 deletions(-) create mode 100644 gcc/testsuite/g++.dg/gomp/attrs-6.C create mode 100644 gcc/testsuite/g++.dg/gomp/attrs-7.C create mode 100644 gcc/testsuite/g++.dg/gomp/attrs-8.C create mode 100644 gcc/testsuite/gfortran.dg/PR93308.f90 create mode 100644 gcc/testsuite/gfortran.dg/PR93963.f90 create mode 100644 gcc/testsuite/gfortran.dg/PR94327.c create mode 100644 gcc/testsuite/gfortran.dg/PR94327.f90 create mode 100644 gcc/testsuite/gfortran.dg/PR94331.c create mode 100644 gcc/testsuite/gfortran.dg/PR94331.f90 create mode 100644 gcc/testsuite/gfortran.dg/PR97046.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-Os updated (60a5fb48d1 -> 0b73bf7fa3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-Os in repository toolchain/ci/binutils-gdb. from 60a5fb48d1 Automatic date update in version.in adds b924d9bad5 Automatic date update in version.in adds b6c4205149 gdb/mi: handle no condition argument case for -break-condition adds 730afdd139 gdb: move remaining ChangeLogs to legacy files adds 3751264cdd PATCH [1/10] arm: add 'bti' instruction for Armv8.1-M pacbti [...] adds f1e1d7f305 PATCH [2/10] arm: add 'pacbti' instruction for Armv8.1-M pac [...] adds e43ca2cbae PATCH [3/10] arm: add 'aut' instruction for Armv8.1-M pacbti [...] adds ce537a7db7 PATCH [4/10] arm: add 'pac' instruction for Armv8.1-M pacbti [...] adds 2c6ccfcfdd PATCH [5/10] arm: Extend again arm_feature_set struct to pro [...] adds 5a0c7a819f PATCH [6/10] arm: Add -march=armv8.1-m.main+pacbti flag adds e07352fa4f PATCH [7/10] arm: add 'bxaut' instruction for Armv8.1-M pacb [...] adds be05908c0c PATCH [8/10] arm: add 'autg' instruction for Armv8.1-M pacbt [...] adds 5c43020d83 PATCH [9/10] arm: add 'pacg' instruction for Armv8.1-M pacbt [...] adds 0264bf6fe3 PATCH [10/10] arm: Alias 'ra_auth_code' to r12 for pacbti. adds c9bd98593b gdb: Fix numerical field extraction for target description "flags" adds 0b73bf7fa3 Fix the Windows build No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gas/config/tc-arm.c | 64 ++++++++++++++++++++++++ gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.d | 5 ++ gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.l | 10 ++++ gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.s | 14 ++++++ gas/testsuite/gas/arm/armv8_1-m-pacbti.d | 16 ++++++ gas/testsuite/gas/arm/armv8_1-m-pacbti.s | 11 ++++ gdb/doc/{ChangeLog => ChangeLog-1991-2021} | 0 gdb/doc/gdb.texinfo | 5 +- gdb/mi/mi-cmd-break.c | 15 +++--- gdb/stubs/{ChangeLog => ChangeLog-2012-2020} | 0 gdb/testsuite/{ChangeLog => ChangeLog-2014-2021} | 0 gdb/testsuite/gdb.mi/mi-break.exp | 22 ++++++++ gdb/valprint.c | 36 ++++++++++++- gdb/windows-nat.c | 20 ++++---- gdbserver/{ChangeLog => ChangeLog-2002-2021} | 0 gdbserver/win32-low.cc | 6 +-- gdbsupport/{ChangeLog => ChangeLog-2020-2021} | 0 include/opcode/arm.h | 27 ++++++++-- opcodes/arm-dis.c | 17 +++++++ 20 files changed, 241 insertions(+), 29 deletions(-) create mode 100644 gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.l create mode 100644 gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-pacbti.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-pacbti.s rename gdb/doc/{ChangeLog => ChangeLog-1991-2021} (100%) rename gdb/stubs/{ChangeLog => ChangeLog-2012-2020} (100%) rename gdb/testsuite/{ChangeLog => ChangeLog-2014-2021} (100%) rename gdbserver/{ChangeLog => ChangeLog-2002-2021} (100%) rename gdbsupport/{ChangeLog => ChangeLog-2020-2021} (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-Os updated (4f69bc83 -> 4462b72f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-Os in repository toolchain/ci/base-artifacts. discards 4f69bc83 0: update: binutils-gcc-glibc-llvm: 1 new 4462b72f 0: update: binutils-gcc-glibc-llvm: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4f69bc83) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 155 +- 02-prepare_abe/console.log | 335 +- 03-build_abe-binutils/console.log | 11443 +-- 04-build_abe-stage1/console.log | 14688 ++-- 06-build_abe-linux/console.log | 2014 +- 07-build_abe-glibc/console.log | 39464 +++++----- 08-build_abe-stage2/console.log | 31656 ++++---- 09-build_llvm-true/console.log | 13965 ++-- 11-benchmark--Os/benchmark-start.log | 2 +- 11-benchmark--Os/benchmark.log | 42 +- 11-benchmark--Os/console.log | 232 +- 12-check_regression/console.log | 2495 +- 12-check_regression/results-0.csv | 2699 +- 12-check_regression/results-1.csv | 2723 +- 12-check_regression/results-brief.csv | 38 +- 12-check_regression/results-compare.csv | 67 +- 12-check_regression/results-full.csv | 2775 +- 12-check_regression/results.csv | 163 +- 12-check_regression/results.log | 3968 +- 13-update_baseline/console.log | 5066 +- 13-update_baseline/results-0.csv | 2759 +- 13-update_baseline/results-1.csv | 2723 +- 13-update_baseline/results-brief.csv | 38 +- 13-update_baseline/results-compare.csv | 87 +- 13-update_baseline/results-full.csv | 2795 +- 13-update_baseline/results.csv | 163 +- 13-update_baseline/results.log | 4306 +- console.log | 121735 ++++++++++++++--------------- jenkins/manifest.sh | 24 +- results_id | 2 +- 30 files changed, 132082 insertions(+), 136540 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_lto updated (124bb55777c -> cf5f544227f)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_lto in repository toolchain/ci/gcc. from 124bb55777c Daily bump. adds acf9d1fd806 openmp: Add support for omp attributes section and scan directives adds 2050ac1a547 AArch64: correct usdot vectorizer and intrinsics optabs adds 1ab2270036d AArch64: correct dot-product RTL patterns for aarch64. adds dd44445f09b Pass gimple context to array_bounds_checker. adds 32f7506bdc3 Abstract out conditional simplification out of execute_vrp. adds 0cbf03689e3 PR fortran/93308/93963/94327/94331/97046 problems raised by [...] adds bf6d414415e Remove legacy external declarations in toplev.h [PR101447] adds 3cb72ac1718 Pass relationship to methods calling generic fold_range. adds f384e2f551f Implement operator_bitwise_xor::op1_op2_relation_effect. adds 44e322f4326 Regenerate .pot files. adds cf5f544227f Fold bswap32(x) != 0 to x != 0 (and related transforms) No new revisions were added by this update. Summary of changes: gcc/config/aarch64/aarch64-builtins.c | 4 + gcc/config/aarch64/aarch64-simd-builtins.def | 6 +- gcc/config/aarch64/aarch64-simd.md | 91 +- gcc/config/aarch64/arm_neon.h | 12 +- gcc/cp/parser.c | 105 +- gcc/cp/parser.h | 4 + gcc/fortran/trans-decl.c | 32 +- gcc/fortran/trans-expr.c | 24 +- gcc/gimple-array-bounds.cc | 17 +- gcc/gimple-array-bounds.h | 6 +- gcc/match.pd | 24 + gcc/po/gcc.pot | 21070 ++++++++++--------- gcc/range-op.cc | 41 +- gcc/testsuite/g++.dg/gomp/attrs-1.C | 12 +- gcc/testsuite/g++.dg/gomp/attrs-2.C | 12 +- gcc/testsuite/g++.dg/gomp/attrs-6.C | 50 + gcc/testsuite/g++.dg/gomp/attrs-7.C | 64 + gcc/testsuite/g++.dg/gomp/attrs-8.C | 10 + gcc/testsuite/gcc.dg/fold-eqbswap-1.c | 113 + gcc/testsuite/gcc.dg/fold-eqrotate-1.c | 46 + .../gfortran.dg/ISO_Fortran_binding_1.f90 | 2 +- gcc/testsuite/gfortran.dg/PR93308.f90 | 52 + gcc/testsuite/gfortran.dg/PR93963.f90 | 150 + gcc/testsuite/gfortran.dg/PR94327.c | 70 + gcc/testsuite/gfortran.dg/PR94327.f90 | 195 + gcc/testsuite/gfortran.dg/PR94331.c | 73 + gcc/testsuite/gfortran.dg/PR94331.f90 | 252 + gcc/testsuite/gfortran.dg/PR97046.f90 | 58 + .../gfortran.dg/bind_c_array_params_2.f90 | 2 +- gcc/toplev.h | 5 - gcc/tree-vrp.c | 39 +- libcpp/po/cpplib.pot | 366 +- libgfortran/runtime/ISO_Fortran_binding.c | 56 +- 33 files changed, 12531 insertions(+), 10532 deletions(-) create mode 100644 gcc/testsuite/g++.dg/gomp/attrs-6.C create mode 100644 gcc/testsuite/g++.dg/gomp/attrs-7.C create mode 100644 gcc/testsuite/g++.dg/gomp/attrs-8.C create mode 100644 gcc/testsuite/gcc.dg/fold-eqbswap-1.c create mode 100644 gcc/testsuite/gcc.dg/fold-eqrotate-1.c create mode 100644 gcc/testsuite/gfortran.dg/PR93308.f90 create mode 100644 gcc/testsuite/gfortran.dg/PR93963.f90 create mode 100644 gcc/testsuite/gfortran.dg/PR94327.c create mode 100644 gcc/testsuite/gfortran.dg/PR94327.f90 create mode 100644 gcc/testsuite/gfortran.dg/PR94331.c create mode 100644 gcc/testsuite/gfortran.dg/PR94331.f90 create mode 100644 gcc/testsuite/gfortran.dg/PR97046.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_lto updated (b924d9bad5 -> 4b41648fff)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_lto in repository toolchain/ci/binutils-gdb. from b924d9bad5 Automatic date update in version.in adds b6c4205149 gdb/mi: handle no condition argument case for -break-condition adds 730afdd139 gdb: move remaining ChangeLogs to legacy files adds 3751264cdd PATCH [1/10] arm: add 'bti' instruction for Armv8.1-M pacbti [...] adds f1e1d7f305 PATCH [2/10] arm: add 'pacbti' instruction for Armv8.1-M pac [...] adds e43ca2cbae PATCH [3/10] arm: add 'aut' instruction for Armv8.1-M pacbti [...] adds ce537a7db7 PATCH [4/10] arm: add 'pac' instruction for Armv8.1-M pacbti [...] adds 2c6ccfcfdd PATCH [5/10] arm: Extend again arm_feature_set struct to pro [...] adds 5a0c7a819f PATCH [6/10] arm: Add -march=armv8.1-m.main+pacbti flag adds e07352fa4f PATCH [7/10] arm: add 'bxaut' instruction for Armv8.1-M pacb [...] adds be05908c0c PATCH [8/10] arm: add 'autg' instruction for Armv8.1-M pacbt [...] adds 5c43020d83 PATCH [9/10] arm: add 'pacg' instruction for Armv8.1-M pacbt [...] adds 0264bf6fe3 PATCH [10/10] arm: Alias 'ra_auth_code' to r12 for pacbti. adds c9bd98593b gdb: Fix numerical field extraction for target description "flags" adds 0b73bf7fa3 Fix the Windows build adds 4b41648fff Fix for mi-reverse.exp No new revisions were added by this update. Summary of changes: gas/config/tc-arm.c | 64 ++++++++++++++++++++++++ gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.d | 5 ++ gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.l | 10 ++++ gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.s | 14 ++++++ gas/testsuite/gas/arm/armv8_1-m-pacbti.d | 16 ++++++ gas/testsuite/gas/arm/armv8_1-m-pacbti.s | 11 ++++ gdb/doc/{ChangeLog => ChangeLog-1991-2021} | 0 gdb/doc/gdb.texinfo | 5 +- gdb/mi/mi-cmd-break.c | 15 +++--- gdb/stubs/{ChangeLog => ChangeLog-2012-2020} | 0 gdb/testsuite/{ChangeLog => ChangeLog-2014-2021} | 0 gdb/testsuite/gdb.mi/mi-break.exp | 22 ++++++++ gdb/testsuite/gdb.mi/mi-reverse.exp | 2 +- gdb/valprint.c | 36 ++++++++++++- gdb/windows-nat.c | 20 ++++---- gdbserver/{ChangeLog => ChangeLog-2002-2021} | 0 gdbserver/win32-low.cc | 6 +-- gdbsupport/{ChangeLog => ChangeLog-2020-2021} | 0 include/opcode/arm.h | 27 ++++++++-- opcodes/arm-dis.c | 17 +++++++ 20 files changed, 241 insertions(+), 29 deletions(-) create mode 100644 gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.l create mode 100644 gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-pacbti.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-pacbti.s rename gdb/doc/{ChangeLog => ChangeLog-1991-2021} (100%) rename gdb/stubs/{ChangeLog => ChangeLog-2012-2020} (100%) rename gdb/testsuite/{ChangeLog => ChangeLog-2014-2021} (100%) rename gdbserver/{ChangeLog => ChangeLog-2002-2021} (100%) rename gdbsupport/{ChangeLog => ChangeLog-2020-2021} (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

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