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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig
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discards bd690103 0: update: binutils-llvm-linux-qemu: all
new 0081d418 0: update: binutils-llvm-linux-qemu: all
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01-reset_artifacts/console.log | 191 +-
02-prepare_abe/console.log | 418 +-
03-build_abe-binutils/console.log | 10698 ++++++------
04-build_llvm/console.log | 13782 +++++++--------
05-build_abe-qemu/console.log | 3540 ++++
05-build_linux/console.log | 467 -
06-build_abe-qemu/console.log | 3536 ----
06-build_linux/console.log | 468 +
07-boot_linux/console.log | 6 +-
08-check_regression/console.log | 12 +-
09-update_baseline/console.log | 12 +-
console.log | 32998 ++++++++++++++++++------------------
jenkins/manifest.sh | 22 +-
results | 4 +-
14 files changed, 33100 insertions(+), 33054 deletions(-)
create mode 100644 05-build_abe-qemu/console.log
delete mode 100644 05-build_linux/console.log
delete mode 100644 06-build_abe-qemu/console.log
create mode 100644 06-build_linux/console.log
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_debug
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discards 960e553b 0: update: gcc-9326049e1abd28b468dbb02f8c0c2477111a1e41: 1
new 321fb00b 0: update: gcc-54b20ee0acf9aeffb71333df9cf07a1c9c6d7d58: 1
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01-reset_artifacts/console.log | 22 +-
02-prepare_abe/console.log | 428 +-
04-build_abe-bootstrap_debug/console.log | 91921 ++++++++++++++--------------
05-check_regression/console.log | 2 +-
06-update_baseline/console.log | 2 +-
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jenkins/manifest.sh | 8 +-
7 files changed, 92422 insertions(+), 92336 deletions(-)
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unknown user pushed a change to branch users/riscv/binutils-integration-branch
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discards c8d15324a16 RISC-V/zfh: Support .float16 directive for assembler.
discards 1d0db091a85 RISC-V/zfh: Add half-precision floating-point v0.1 instructions.
discards 0311e9ef630 RISC-V/rvv: Add rvv v0.10 instructions.
discards ee0e992d3a8 RISC-V/extended: Add assembler and dis-assembler hooks for [...]
new 8f23bf0a023 RISC-V/extended: Add assembler and dis-assembler hooks for [...]
new cc4d41ec3fb RISC-V/rvv: Add rvv v0.10 instructions.
new 61ce4ad0f48 RISC-V/zfh: Add half-precision floating-point v0.1 instructions.
new d13e426c78b RISC-V/zfh: Support .float16 directive for assembler.
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bfd/elfxx-riscv.c | 10 +++
gas/config/tc-riscv.c | 8 +-
gas/testsuite/gas/riscv/extended/fp-zfh-insns.d | 6 +-
include/opcode/riscv-opc-extended.h | 4 +-
include/opcode/riscv.h | 2 +-
opcodes/riscv-dis.c | 2 +-
opcodes/riscv-opc.c | 114 ++++++++++++------------
7 files changed, 78 insertions(+), 68 deletions(-)
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