Tcwg-commits May 2021

tcwg-commits@lists.linaro.org

6 participants
4708 discussions

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allyesconfig updated (589787a791 -> 3b33651e3d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allyesconfig in repository toolchain/ci/binutils-gdb. from 589787a791 Automatic date update in version.in adds 5c1f3db6a3 Automatic date update in version.in adds d480785348 Automatic date update in version.in adds 8ed1a94d7a Automatic date update in version.in adds 8a473766ae Automatic date update in version.in adds 96f32373c6 Automatic date update in version.in adds ad563d824d Automatic date update in version.in adds 8c9ca0fc8b Automatic date update in version.in adds 92cce76749 Automatic date update in version.in adds ec2451f91e PR27755, powerpc-ld infinite loop adds 685036654f Automatic date update in version.in adds 990df44330 Automatic date update in version.in adds 5fbe6f4318 Automatic date update in version.in adds beaafdf3e2 Automatic date update in version.in adds 7efc8776ec Automatic date update in version.in adds fb261566ad Automatic date update in version.in adds 54c343f5b2 Automatic date update in version.in adds 3b33651e3d Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 5 +++++ bfd/elf32-ppc.c | 2 +- bfd/version.h | 2 +- 3 files changed, 7 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig updated (a486736b -> 5195e48a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig in repository toolchain/ci/base-artifacts. discards a486736b 0: update: binutils-llvm-linux-qemu: all new 5195e48a 0: update: binutils-llvm-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a486736b) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 52 +- 02-prepare_abe/console.log | 440 +- 03-build_abe-binutils/console.log | 12009 +++++------ 04-build_llvm/console.log | 13831 ++++++------ 05-build_abe-qemu/console.log | 6982 +++--- 06-build_linux/console.log | 943 +- 07-boot_linux/console.log | 2 +- 08-check_regression/console.log | 2 +- 08-check_regression/results.regressions | 11 +- 09-update_baseline/console.log | 2 +- 09-update_baseline/results.regressions | 11 +- console.log | 34263 +++++++++++++++--------------- jenkins/manifest.sh | 22 +- results | 2 +- 14 files changed, 34360 insertions(+), 34212 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allyesconfig updated (a8387f95 -> 0a5a9799)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards a8387f95 0: update: binutils-llvm-linux-qemu: all new 0a5a9799 0: update: binutils-llvm-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a8387f95) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 172 +- 02-prepare_abe/console.log | 408 +- 03-build_abe-binutils/console.log | 11787 ++++++------- 04-build_llvm/console.log | 13973 +++++++-------- 05-build_abe-qemu/console.log | 3595 ++++ 05-build_linux/console.log | 466 - 06-build_abe-qemu/console.log | 3554 ---- 06-build_linux/console.log | 494 + 07-boot_linux/console.log | 6 +- 08-check_regression/console.log | 2 +- 09-update_baseline/console.log | 2 +- console.log | 34223 ++++++++++++++++++------------------ jenkins/manifest.sh | 22 +- results | 4 +- 14 files changed, 34430 insertions(+), 34278 deletions(-) create mode 100644 05-build_abe-qemu/console.log delete mode 100644 05-build_linux/console.log delete mode 100644 06-build_abe-qemu/console.log create mode 100644 06-build_linux/console.log -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig updated (4134c3e3af8 -> ee359d860d7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig in repository toolchain/ci/gcc. from 4134c3e3af8 libstdc++: Implement proposed resolution for LWG 3532 adds fea97413ee1 Daily bump. adds bd475d14d88 tree-optimization/100278 - handle mismatched code in TBAA a [...] adds 329f730fd1d tree-optimization/98786 - fix issue with phiopt and abnormals adds a3a6a7f0dcd PR rtl-optimization/100263: Ensure register can change mode adds 0df3ba96608 libstdc++: Implement LWG 3517/3520 for join_view/transform_view adds 92fef3f2991 PR fortran/100274 - ICE in gfc_conv_procedure_call, at fort [...] adds e3abcc56d26 Fix PR target/100402 adds f3c73cbe2fd Daily bump. adds f1370bf2aa6 arm: Do not clobber callee saved registers with CMSE. adds d218fed53d8 arm: Fix testisms introduced with fix for pr target/95646 adds 9c4797e2b5d modulo-sched: skip loops with strange register defs [PR100225] adds 8430391f4f9 Daily bump. adds d7c8e626153 libcpp: Fix up pragma preprocessing [PR100450] adds bea76e5393d Daily bump. adds 291931b924f Daily bump. adds a21d28d57b7 Daily bump. adds 5f665c1ca45 rs6000: Fix cpu selection w/ isel (PR100108) adds e45df7a8472 Daily bump. adds ee359d860d7 RISC-V: For '-march' and '-mabi' options, add 'Negative' pr [...] No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 115 ++ gcc/DATESTAMP | 2 +- gcc/config/arm/arm.c | 4 +- gcc/config/i386/i386.c | 23 +- gcc/config/riscv/riscv.opt | 4 +- gcc/config/rs6000/rs6000.c | 2 +- gcc/fortran/ChangeLog | 11 + gcc/fortran/interface.c | 11 +- gcc/fortran/trans-expr.c | 1 + gcc/modulo-sched.c | 56 +- gcc/postreload.c | 3 +- gcc/testsuite/ChangeLog | 65 + gcc/testsuite/c-c++-common/gomp/pr100450.c | 20 + gcc/testsuite/gcc.c-torture/execute/20210505-1.c | 31 + gcc/testsuite/gcc.dg/pr100225.c | 15 + gcc/testsuite/gcc.dg/torture/pr98786.c | 23 + gcc/testsuite/gcc.dg/tree-ssa/pr100278.c | 17 + gcc/testsuite/gcc.target/arm/pr95646.c | 29 + gcc/testsuite/gfortran.dg/argument_checking_25.f90 | 12 + gcc/tree-ssa-phiopt.c | 6 + gcc/tree-ssa-pre.c | 10 + libcpp/ChangeLog | 8 + libcpp/lex.c | 1 + libgomp/ChangeLog | 7 + .../libgomp.oacc-c-c++-common/atomic_capture-3.c | 1627 ++++++++++++++++++++ libstdc++-v3/ChangeLog | 116 ++ libstdc++-v3/include/std/ranges | 7 +- 27 files changed, 2185 insertions(+), 41 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/gomp/pr100450.c create mode 100644 gcc/testsuite/gcc.c-torture/execute/20210505-1.c create mode 100644 gcc/testsuite/gcc.dg/pr100225.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr98786.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr100278.c create mode 100644 gcc/testsuite/gcc.target/arm/pr95646.c create mode 100644 gcc/testsuite/gfortran.dg/argument_checking_25.f90 create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/atomic_capture-3.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allnoconfig updated (2865d114f953 -> 725bc3eb0d5c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allnoconfig in repository toolchain/ci/llvm-project. from 2865d114f953 [mlir] Use ReassociationIndices instead of affine maps in [...] adds 6f17613bfb95 [RISCV][VP] Lower VP ISD nodes to RVV instructions adds 3fbcf07a99ec [RISCV][VP][NFC] Add tests for VP_AND, VP_XOR, VP_OR adds 491a3d135993 [RISCV][VP][NFC] Add tests for VP_SHL and VP_LSHR adds 62851ea7ea2c [MLIR] Rename free function `verify` on OffsetSizeAndStrid [...] adds 13a51e017c09 [X86]Fix a crash trying to convert indices to proper type. adds 437468f31942 [RISCV][VP][NFC] Add tests for VP_MUL and VP_[US]DIV adds f106fe5f23de [AMDGPU] Autogenerate checks for a clustering test and add GFX10 adds 61a46375a25b [RISCV][VP][NFC] Add tests for VP_SREM and VP_UREM adds 6f5670a4c3d8 Revert "[Passes] Enable the relative lookup table converte [...] adds 85460a2f5b63 [X86][SSE] Move unpack(hop,hop) fold from foldShuffleOfHor [...] adds 3ee826594a9e Make dependency between certain analysis passes transitive [...] adds 1ee50b473168 [AArch64] Fix scalar imm variants of SIMD shift left instructions adds 6a12875046fd [SystemZ][z/OS] Fix return values in AutoConversion functions adds f6ef409406d7 [DebugInfo][test][MIPS] Use mtriple in tests adds e994e74bca49 [OpenCL] Add clang extension for non-portable kernel parameters. adds 3f4bad5eadac [AArch64] Fix for the pre-indexed paired load/store optimization. adds ae2aef13618b [AsmParser][SystemZ][z/OS] Reject character and string lit [...] adds 1f5cacfcb845 [AMDGPU][OpenMP] Fix clang driver crash when provided -c adds 4a6ee23d832f [mlir][linalg] Fix bug in the fusion on tensors index op h [...] adds 83646f60a8a4 [AMDGPU] Fix llc pipeline lit test for bots enabling expen [...] adds c673a95cb46a [MIPS][MSA] Regenerate bitwise tests. NFCI. adds 679e30dc3f50 [MIPS][MSA] Regenerate i5-b tests. NFCI. adds 0f97afe32044 [MIPS][MSA] Regenerate immediates tests. NFCI. adds 00341978745d [InstCombine] improve readability; NFC adds a3d273c9ff4c [GlobalISel] Fix buildZExtInReg creating new register. adds 6e876f9dedf0 [SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach co [...] adds efc31be7f8e8 [RISCV][NFC] Fix up pseudoinstruction name in comment adds 7c2ece523d7f [libc] Normalize LIBC_TARGET_MACHINE adds 897d7bceb90f Revert "[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] [...] adds 0b9447157b01 [docs] Update the llvm/example section adds 67ee2f870d3b Added a faster method to clone llvm project [DOCS] adds 20d0aca43073 [clang][Driver] Add -fintegrate-as to debug-pass-structure test adds d80b04ab0015 [mlir][Affine][Vector] Support vectorizing reduction loops adds 4c178d809b1d [AMDGPU] Pre-commit 2 new saddr load tests. NFC. adds f16afcd9b5ce [clang] remove an incremental build workaround adds 95861216ac65 [mlir][ArmSVE] Add masked arithmetic operations adds 80e802508398 [LV] Workaround PR49900 (a crash due to analyzing partiall [...] adds 632ebc4ab437 [MC] Untangle MCContext and MCObjectFileInfo adds 833b33a7f4dc [NFC][X86][CostModel] Add tests for byteswap intrinsic adds ba5c122647c7 RISSCV: clang-format RISC-V AsmParser (NFC) adds b3336bfa2e6a [llvm-objcopy][ELF] --only-keep-debug: set offset/size of [...] adds 8048005739eb [NFC][SimplifyCFG] Update documentation comments for SinkC [...] adds aefbfbcbd776 [Clang] remove text extension from diag::err_drv_invalid_v [...] adds 7907c46fe619 Make clangd CompletionModel not depend on directory layout. adds 20f51ffe67d1 [lld-macho] Have --reproduce account for path rerooting adds 8806df477834 [lld-macho] Preliminary support for ARM_RELOC_BR24 adds 18959a6a094c [hwasan] Fix missing synchronization in AllocThread. adds 25fe17d3c104 [libomptarget] Initial documentation on amdgpu offload adds 89333b35a7a9 [WebAssembly] Set alignment to 1 for SIMD memory intrinsics adds 7fbc7bfdfddd [libc++] NFC: Remove stray semicolon in from-scratch config files adds 9b24ff9cd2ef [libcxx] [ci] Add a Windows CI configuration for a statica [...] adds 75ba35130080 [lld-macho] Try to unbreak build adds 0e7c2aeaa8c0 Add fuzzer for Rust demangler adds 627a52695537 [WebAssembly] Update narrowing builtin function operand types adds 602f318cfdac [WebAssembly] Fix constness of pointer params to load intrinsics adds 0b10bb7ddd3c [libc++] Move <__sso_allocator> out of include/ into src/. NFCI. adds db9425cb060b [libc++] [LIBCXX-DEBUG-FIXME] Fix an iterator-invalidation [...] adds 12dd9cdf1a82 [libc++] [LIBCXX-DEBUG-FIXME] Iterating a string::iterator [...] adds 165ad89947e8 [libc++] [LIBCXX-DEBUG-FIXME] Our `__debug_less` breaks so [...] adds 9571b8f238f9 [libc++] [LIBCXX-DEBUG-FIXME] std::advance shouldn't use A [...] adds 9ea2db2c5135 [libc++] [LIBCXX-DEBUG-FIXME] Stop using invalid iterators [...] adds 1d767b13bfad [scudo] Align objects with alignas adds 7abb56c78ba7 [mlir][tosa] Add tosa.depthwise lowering to existing linal [...] adds 662a58fa0534 [lld] Convert LLVM_CMAKE_PATH to a CMake path adds 81fce29d6e1f [WebAssembly] Add SIMD const_splat intrinsics adds 40147c33d17e [NFC][X86][Codegen] Add some tests for 64-bit shift by (32-x) adds 1817dae19241 Preserve metadata on masked intrinsics in auto-upgrade adds 78a7d8c4dd10 [Utils][NFC] Rename replace-function-regex in update_cc_te [...] adds a11489ae3e36 [MachineCSE][NFC]: Refactor and comment on preventing CSE [...] adds 0edc4bc84aa2 [mlir] Add polynomial approximation for math::ExpM1 adds fa0b93b5a086 GlobalISel: Use DAG call lowering infrastructure in a more [...] adds 23ae35e858da X86/GlobalISel: Use generic version of splitToValueTypes adds 8fc4eb9e7320 AMDGPU/GlobalISel: Remove unnecessary override adds e723b511e6e9 GlobalISel: Update documentation adds e623ce6188d6 [clangd] Split CC and refs limit and increase refs limit to 1000 adds 909a5ccf3be7 [AMDGPU] Improve global SADDR selection adds 6bbfa0fd408e When performing template argument deduction to select a pa [...] adds 6e88539ab16d ARM/GlobalISel: Don't store a MachineInstrBuilder reference adds ef5f0adecd02 AMDGPU: Add a few more tail call tests adds ceccfaae140d [gn build] (semi-manually) port 0b10bb7ddd3c adds 23233ad139f4 [lld-macho] Check simulator platforms to avoid issuing fal [...] adds c5cf4b8f11cd [lldb] Handle missing SBStructuredData copy assignment cases adds ea3777fe2201 [gn build] (semi-manually) port 0b10bb7ddd3c more adds 7a41639c60ab [AMDGPU][GlobalISel] Widen 1 and 2 byte scalar loads adds 9d3dbcd24c7d [Driver] Move -print-runtime-dir and -print-resource-dir tests adds 7b0756a51a75 [AArch64] Fix some coding standard issues related to names [...] adds b6060b76731d [mlir][Linalg] Fix element type of results when folding reshapes. adds b6d244e5b8ab AMDGPU: Fix lit test adds 7ac3fcc526ce Allow /STACK in #pragma comment(linker, ...) adds 6251b2f7f697 Attach metadata to simplified masked loads and stores adds 4b2d7ef3ea81 [mlir][Linalg] Fix test to use new reshape op form. adds 41f8b8e8075b [MCAsmInfo] Support UsesCFIForDebug for targets with no ex [...] adds d738ac6e12ac [AArch64] Deleted unused AsmBackend functions adds 6adcdd26139c [tests] Update Transforms/FunctionAttrs/nosync.ll adds 3c952ab25fb8 [mlir] Check generated IR of math_polynomial_approx.mlir adds 535cbe02a454 [flang] Provide access to constant character array data adds 7f06cae1c19d [WebAssembly] Fix JS code mentions in LowerEmscriptenEHSjLj adds 34da083a8c6b [M68k][test] Initial migration of MC tests adds abac6023bba5 [M68k][AsmParser] Support negative integer constants adds 5b3dd2a49035 [M68k][AsmParser] Fix invalid register name parsing logics adds f3e3a1d79eee [dfsan] extend a test case to measure origin memory usage adds 9ba5238c28da [ARM] Simplification to ARMBlockPlacement Pass. adds f5199d7ae0ed [AMDGPU] Revise handling of preexisting waitcnt adds 8a156d1c2795 [InstCombine] Fully disable select to and/or i1 folding adds 5f395223200b [test] Delete redundant arm64-tls-relocs.s adds 1b11b5b01fd8 [AArch64] Replace fixup_aarch64_tlsdesc_call with FirstLit [...] adds f6d7fc801b4a [M68k][test][NFC] Scrubing some tests adds 6617a5a5eaee [AMDGPU] Move insertion of function entry waitcnt later adds ab90ae6f476d [AMDGPU] Switch AnnotateUniformValues to MemorySSA adds 6fac34251d01 [scudo] Add initialization for TSDRegistrySharedT adds 7b73cd684a8d [ORC] Introduce C API for adding object buffers directly t [...] adds f97b843d8819 [OpenMP] Fix non-determinism in clang copyin codegen adds abdd14a2d785 [ORC] Add missing library dependency on IRReader. adds 6bdfcb165e66 [BPF][Test] Disable codegen test on AIX adds 6c80361b8474 [SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach co [...] adds 207b08a9130b [OpenMP][NFC] Refactor Clang OpenMP tests using update_cc_ [...] adds 16c7829784f0 [clangd] Check if macro is already in the IdentifierTable [...] adds 875eb523c132 [MLIR][GPU][NVVM] Add warp synchronous matrix-multiply acc [...] adds 5d8d994dfbe3 [OpenMP] Make sure classes work on the device as they do o [...] adds 3f1459670009 [OpenMP] Ensure the DefaultMapperId has a location adds df729e2b82b3 [OpenMP] Overhaul `declare target` handling adds b4795544d42b [llvm][NFC] Remove deprecated Alignment::None() adds a065efa302f6 [llvm][NFC] Remove deprecated DataLayout::getPreferredAlig [...] adds 040f4a97cd40 [llvm][NFC] Remove deprecated InterleaveGroup::getAlignmen [...] adds 1fa21bf9e999 [llvm][NFC] Remove SelectionDag alignment deprecated functions adds 089ec047bea8 [llvm][NFC] Remove CallingConvLower deprecated alignment f [...] adds ab5932ffbd91 [llvm-objdump] Use std::make_unique adds abe2c906ad4c [lit] Report tool path from use_llvm_tool if found via env [...] adds b856f4a232cb [ARM] Transforming memcpy to Tail predicated Loop adds 65cd0d6be477 [flang] Remove `%f18` from LIT configuration files adds 7c706af03b86 [AMDGPU] SIFoldOperands: clean up tryConstantFoldOp adds a437befa8f85 [clang-format] Add more support for C# 8 nullables adds ec725b307f3f [clang-format] Fix C# nullable-related errors adds cdf33962d976 [clang-format] Rename common types between C#/JS adds 8c9742bd239a [SVE][LoopVectorize] Add support for scalable vectorizatio [...] adds a0da66bc1330 [SystemZ] Support builtin_frame_address with packed stack [...] adds 20e976e2487f [AMDGPU] Regenerate shift tests. NFCI. adds 0fdce16efb28 [AMDGPU] Regenerate fp2int tests. NFCI. adds a0d019fc89c5 [mlir] Add support for ops with regions in 'gpu-async-regi [...] adds 5dd9f44c17ec [LLD] Improve --strip-all help text adds 4979c9045862 [LV] Account for tripcount when calculation vectorization [...] adds 3d746962ed18 [ORC] Silence unused variable warnings in Release builds. NFC. adds fc690777fce0 Revert "[ARM] Transforming memcpy to Tail predicated Loop" adds 67cfefebbbbb [AMDGPU] Fix WQM failure with single block inactive demote adds b24e9f82b71f [amdgpu-arch] Fix rpath to run from build dir adds c28a602329a7 [OpenCL] Remove subgroups pragma in enqueue kernel and pip [...] adds d40a0b8af771 [TableGen] [Clang] Clean up Options.td and add asserts. adds ed87f512bb9e [PowerPC] Provide some P8-specific altivec overloads for P7 adds 9e026273b030 [AMDGPU] SIInsertHardClauses: move more stuff into the cla [...] adds 3026f75ed0f5 [lldb][NFC] Make assert in TestStaticVariables more expressive adds 3761b9a2345a Revert "[PowerPC] Provide some P8-specific altivec overloa [...] adds bb113b984565 [AIX][TLS] Add support for TLSGD relocations to XCOFF objects adds fe0e86e6026f [libc++] Rewrite std::to_address to avoid relying on element_type adds e4b790c5e365 [OpenMP] Temporarily require X86 target for parallel_for_c [...] adds 172d746e167b [AMDGPU][NFC] Fix typos in SIFormMemoryClauses description adds 1faf3b195e71 [PowerPC] Re-commit ed87f512bb9eb5c1d44e9a1182ffeaf23d6c5ae8 adds 0b303da6f821 [mlir][vector] add pattern to cast away lead unit dimensio [...] adds 933551eaeb08 [mlir][NFC] Fix warning in VectorTransforms.cpp adds 7654d8e1a96c [lld-macho][nfc] Convert the mock libSystem.tbd to TBDv4 adds 926076023526 [lld-macho] Support loading of zippered dylibs adds 1b47489fd0e1 [SLP] Use empty() instead of size() == 0. NFCI. adds 2dab05902112 [SLP] Constify the TreeEntry* input into dumpTreeCosts(). NFCI. adds 338c1b701f23 [SLP] Constify the TreeEntry* input into getEntryCost() + [...] adds 28f1d018b1c2 [AMDGPU] Fix 64 bit DPP validation adds 159dd447fe98 [clangd][ObjC] Highlight Objc Ivar refs adds 2e0ee68dc85c [LangRef][VP] Fix typos in VP sdiv/udiv examples adds 58323be415ce [RISCV] Cleanup instruction formats used for B extension t [...] adds 1c4cb510b4da [SystemZ] Don't use libcall for 128 bit shifts. adds 1f109f9d9cdd Fix array attribute in bindings for linalg.init_tensor adds e2d774a3dbbb [AIX][Test][ORC] Skip unsupported ORC C API tests on AIX adds 6660319cef6e [RISCV] Remove unused RISCV::VLEFF and VLEFF_MASK. NFC adds f0adf3a24cde [PowerPC][LLD] Make sure that the correct Thunks are used. adds b198b9b8974b [WebAssembly] Fix argument types in SIMD narrowing intrinsics adds 52525cb20ff3 [mlir][linalg][NFC] Make reshape folding control more fine grain adds 71eb32d97ea0 [mlir][vector] Fix typo adds 642df18f1437 [gn build] Support compiler-rt/profile on Windows adds 199a623ebf80 [flang] Runtime must defer formatted/unformatted determination adds 22aece57beb6 Allow llvm-dis to disassemble multiple files adds 4f41994c1374 [flang] Fix race condition in runtime adds 306370be0bf2 [AArch64] Fix namespace issue. NFC adds 6a1c3efa051e [flang] Implement NAMELIST I/O in the runtime adds a577d59db243 [RISCV] Minor vector instruction tablegen cleanup. NFC adds 8408d3f2d814 [libunwind] NFC: Use macros to accommodate differences in [...] adds 8cb191b724b7 [Fuchsia][CMake] Update OSX deployment target adds a40b60995882 [flang][OpenMP] Add semantic check for occurrence of const [...] adds 191ffda3f70b [RISCV] Remove unused ComplexPatterns. NFC adds 97ab06803416 [NPM] Do not run function simplification pipeline unnecessarily adds fefcb1f878c2 [PassManager] add helper function to hold set of vector passes adds 6304c0836a4d [mlir] Store the flag for dynamic operand storage in the low bits adds a3a8a1a15b52 [Index] Ignore nullptr decls for indexing adds 83af66e18e3d new altera ID dependent backward branch check adds fca10c8808ff [gn build] Port 83af66e18e3d adds d21e1b79ff7d Thread safety analysis: Eliminate parameter from intersect [...] adds 72ba78c29e92 When SendContinuePacketAndWaitForResponse returns eStateIn [...] adds 41bc54cc56fd [mlir][spirv] NFC: Replace OwningSPIRVModuleRef with OwningOpRef adds 7e9351b9dee2 [libomptarget][amdgpu][nfc] Remove dead code from amdgpu plugin adds 9ff38e2d9dd7 [ARM] Transforming memcpy to Tail predicated Loop adds 5dc1ed3f627e [mlir] Update dstNode after DenseMap insertion in loop fus [...] adds 44ee974e2f3e [libomptarget][nfc] Refactor amdgpu partial barrier to sim [...] adds d3e987c38917 [mlir][tosa] Added div op, variadic concat. Removed placeh [...] adds c714d037857f [AMDGPU] Expose __builtin_amdgcn_perm for v_perm_b32 adds c4ed142e695f [llvm][TextAPI] add mapping from OS string to Platform adds 87a6325fbe43 [dfsan] Rename and fix an internal test issue for mmap+calloc adds 05a89312d812 [mlir][Linalg] Allow folding to rank-zero tensor when usin [...] adds 819e0d105e84 [CGAtomic] Lift strong requirement for remaining compare_e [...] adds e388b9399b03 [IR] Fix typo in comment of Intrinsics.td (NFC) adds e6cf3d64412c [TableGen] Use range-based for loops (NFC) adds 605c811d2b0f BPF: fix FIELD_EXISTS relocation with array subscripts adds f7294ac8093a [PowerPC] Remove extra swap for extract+vperm on LE adds 26e916334ebc [mlir][linalg] Add IndexedGenericOp to GenericOp canonical [...] adds a95473c563bf [XCOFF] handle string constants generation for AIX adds e4dee7e7309a [MLIR][SPIRV] Properly (de-)serialize BranchConditionalOp. adds 1ccebb18ef9f [GlobalISel] Micro-optimize the conditional branch optimization. adds 9deb7eeaf76c [Debug-Info][NFC] add a wrapper for Die.addValue adds 911a541620bc [LazyValueInfo] Insert an Overdefined placeholder to preve [...] adds dafbfb1d1d8e [libcxx] Fix a case of -Wundef warnings. NFC. adds d2b2ad32b769 [lit][test] Attempt fix when paths include symlink adds cf06c8eee3a5 [LoopVectorize][SVE] Remove assert for scalable vector in [...] adds 778487a22149 [flang] Add tests for MIN for character arrays. NFC adds 2ea36e94927c [flang] Remove redundant reallocation adds 98e5ede60499 [AMDGPU] Serialize MFInfo::ScavengeFI adds 8894a4b5d70a [gn build] Port 98e5ede60499 adds f87638338464 [AsmParser][ARM] Make .thumb_func imply .thumb adds eb1b26ec1d1a [llvm][NFC] Remove deprecated TargetFrameLowering and Inst [...] adds e805b7c2d63c [llvm][NFC] Remove remaining deprecated alignment function [...] adds f0762fc42f0f [llvm-dwarfdump] Help option output should be consistent w [...] adds 0791f968fee2 [DebugInfo] Fix updateDbgUsersToReg to support DBG_VALUE_LIST adds 227678089cf6 [NFC][X86][MCA] AMD Zen 3: add tests with eliminatible GPR moves adds 7059b28d5d27 [X86] AMD Zen 3: 32/64 -bit GPR register moves are zero-cycle adds bda9ca3e44c1 [NFC][X86][MCA] AMD Zen 3: add tests with non-eliminatible [...] adds 442de0c1adf3 AMDGPU: Correct const_index_stride for wave 32 for PAL ABI adds f372ff17f74f [NFC] (test commit) Changed example invocation of C++ for OpenCL adds 8e42024f7999 [X86] Ensure we pass DebugLoc by const reference where pos [...] adds 2a3f60b5f530 [SLP] Regenerate tests to reduce diff in D98714. NFCI. adds 793b4b26039e Revert "AMDGPU: Correct const_index_stride for wave 32 for [...] adds 280aa3415e40 [DAG] Add a generic expansion for SHIFT_PARTS opcodes usin [...] adds ce0c1f3ced9b [DebugInfo] Fix crash when emitting an invalidated SDDbgValue adds d9f2960c932c [NFC] Correctly assert the indents for printEnumValHelpStr. adds 76f1de10f43e [OpenCL] Fix optional image types. adds dfe3ffaa4a47 [ARM] Transforming memset to Tail predicated Loop adds 14818a86d044 Fix: [DebugInfo] Fix crash when emitting an invalidated SD [...] adds 606d4e806192 AMDGPU: Correct const_index_stride for wave 32 for PAL ABI adds 13c0316239dc [AMDGPU] Restrict immediate scratch offsets adds 6248d1119040 Retire TargetRegisterInfo::getSpillAlignment adds dd21c6b843b2 [DAG] Ensure all SD classes consistently return a const re [...] adds c9d4b4173b56 [CodeGen] Ensure UserValue::getDebugLoc() and UserLabel::g [...] adds 7bc1dd1191ab Reapply "[DebugInfo] Drop DBG_VALUE_LISTs with an excessiv [...] adds 8935c8449b7b [libc++] [test] Test that list::swap/move/move-assign does [...] adds a1f75bf091a2 [libc++] [test] Simplify arithmetic in list.special/swap.p [...] adds f42355e17c3f [libc++] [test] Test that unordered_*::swap/move/assign do [...] adds e6d688ec9670 [NFC][X86][MCA] Increase iteration count in reg move elimi [...] adds c3cd8ed0097b [NFC][X86] AMD Zen 3: move sched classes for renameables m [...] adds d8c620257677 [X86] AMD Zen 3: throughput for renameable GPR moves is 6 adds cbabe4f4d62a [NFC][X86][MCA] AMD Zen 3: Add tests for renameable SSE XMM moves adds bcbfc22ff9b2 [NFC][X86][MCA] AMD Zen 3: Add tests for renameable AVX XMM moves adds 0d961fbd525c [NFC][X86][MCA] AMD Zen 3: Add tests for renameable AVX YMM moves adds 9db4203883f5 [X86] AMD Zen 3: SSE XMM moves are zero-cycle adds ee020b930d12 [X86] AMD Zen 3: AVX XMM moves are zero-cycle adds 715c0d0bd412 [X86] AMD Zen 3: AVX YMM moves are zero-cycle adds 758c173309ed [X86] AMD Zen 3: throughput for renameable XMM/YMM moves is 6 adds 34de155f7e33 [NFC][X86][MCA] AMD Zen3 Decrease iteration count in reg-m [...] adds 25bbff632d01 [PowerPC] Provide MMA builtins for compatibility adds faab8c140ab2 [mlir] Rename BufferAliasAnalysis to BufferViewFlowAnalysis adds f31531a30b12 [mlir][linalg] Remove redundant indexOp builder. adds a15f8589f4e8 [libomptarget] Add support for target memory allocators to [...] adds 0a6f11aabdd3 [AArch64] add test for missed vectorization; NFC adds bc302bfbef84 BasicAA: Recognize inttoptr as isEscapeSource adds 565ee6afc707 [mlir][spirv] add support lowering of extract_slice to sca [...] adds a970e69d6b62 [mlir][vector] add pattern to cast away leading unit dim f [...] adds 70cbc6dbef70 [libFuzzer] Fix stack overflow detection adds a8e30e63aca0 [NFC][X86][MCA] AMD Zen3: add test for zero-cycle X87 move adds 2819009b5aa9 [X86] AMD Zen 3: _REV variants of zero-cycles moves are al [...] adds f744723f7538 [X86] combineXor - limit fold to non-opaque constants (PR50254) adds 1006ac3963ea [LoopNest] Consider loop nest with inner loop guard using [...] adds f09414499c47 [libFuzzer] Fix stack-overflow-with-asan.test. adds 6a2850f3fc24 [AArch64][ELF] Prefer to lower MC_GlobalAddress operands t [...] adds 5b1610a25054 [X86] AMD Zen 3: MOVSX32rr32 is a zero-cycle move adds b8701dc1749e [X86] AMD Zen 3: mark XMM/YMM (but not MMX!) reg moves as [...] adds d319005a3746 lit: revert 134b103fc0f3a995d76398bf4b029d72bebe8162 adds 8002c5d65fdc [libc++][ci] Run longer CI jobs first adds d8aba75a7680 Internalize some cl::opt global variables or move them und [...] adds 50cf0a1d1ae4 Allow empty value list in propagateMetadata(Inst, ArrayOf...) adds 724604901a10 [unittest] Fix -Wunused-variable after D94717 adds 1e9c39a3f982 [WebAssembly] Use functions instead of macros for const SI [...] adds 6c99e631201a [SCEV] By more careful when traversing phis in isImpliedViaMerge. adds 7ca26c5fa2df Revert "[DebugInfo] Fix updateDbgUsersToReg to support DBG [...] adds 21db1e3b0140 [mlir][docs] remove stale statement about index type in vectors adds a3f22d020b27 [mlir] Add a pattern to bufferize linalg.tensor_reshape. adds 3444996b4c45 [mlir] Add a pattern to bufferize std.index_cast. adds f2f88f3e7a11 An attempt to abandon omptarget out-of-tree builds. adds c04c66d705b4 [RISCV] Consider scalar types for required extensions. adds 6b00b34b8a05 [BareMetal] Ensure that sysroot always comes after library paths adds 01c78a0b0764 [flang] Implement NORM2 in the runtime adds 01c26d4e048c [LV] Rename Region to TargetRegion, similar to SinkRegion (NFC). adds 337d7652823f [LV] Assert if trying to sink replicate region into anothe [...] adds c4adc49a1c98 [SEH] Fix regression with SEH in noexpect functions adds 3822ac909ead [MCA][RegisterFile] Fix register class check for move elim [...] adds 75b9997760c6 [LV] Remove reference of PHI from comment, they are not re [...] adds f97ada27aaf6 Revert "[BareMetal] Ensure that sysroot always comes after [...] adds d0453a8933a1 [mlir][vector] Extend pattern to trim lead unit dimension [...] adds b90b66bcbe3e [mlir] Missed clang-format adds d5a70db1938c [lld/mac] Write every weak symbol only once in the output adds 167906c10932 [BareMetal] Ensure that sysroot always comes after library paths adds c6ddf669dcf3 Fix the module-enabled build by removing a redundant type [...] adds 1312852040b3 [AArch64][GlobalISel] Legalize narrow type G_CTPOPs adds 6f7131002b6a [NewPM] Move analysis invalidation/clearing logging to ins [...] adds 0ad494838b85 NFC: Move TypeList implementation up the file adds 1f65f42dd37a Make `hasTypeLoc` matcher support more node types. adds 808bc11d9e1a [GlobalISel] Don't form zero/sign extending loads for atomics. adds 5b158093e246 [AArch64][GlobalISel] Create a new minimal combiner pass j [...] adds 6aaf06f92988 [mlir][vector] Fix warning adds d82bc9e81d0e [gn build] Manually port 5b158093e adds ddff81f69256 Revert "lit: revert 134b103fc0f3a995d76398bf4b029d72bebe8162" adds 5c84195b8ccb [mlir] Add hover support to mlir-lsp-server adds 44d14d5de6f1 [lit] Bump up the Windows process cap from 32 to 60 adds 53b946aa636a [mlir] Refactor the representation of function-like argume [...] adds 223852d76fcc [DebugInfo] UnwindTable::create() should not add empty row [...] adds 34a8a437bf20 [NewPM] Hide pass manager debug logging behind -debug-pass [...] adds 631da3b15203 Replace a remaining CRLF with LF. NFC. adds 77e2e5e07d01 [X86] Support AMX fast register allocation adds bebafe01a746 Revert "[X86] Support AMX fast register allocation" adds 72bd0116e3a1 Fix build after 34a8a437b adds d4bdeca5765a [X86] Support AMX fast register allocation adds e2a77644817f [mlir] Debug print pattern before and after matchAndRewrite call adds 2db4979c0fe0 [VectorCombine] Simplify to scalar store if only one eleme [...] adds c42007e266a3 [libc++] Use Xcode's CMake if it's present adds b1c38207e9ca [X86] Improve costmodel for scalar byte swaps adds 4e192edb2d65 Test commit to check commit access adds 1acd9a1a29ac Revert "[LICM] Hoist loads with invariant.group metadata" adds 73df48158bf5 [MLIR][NFC] Remove unused MLIRContext declaration adds 9610a2d753db [MLIR] Add memref dialect dependency for affine fusion pass adds 74d096e55879 [libc++] Move handling of the target triple to the DSL adds 4524d8b7552c [X86] combineHorizOpWithShuffle - generalize HOP(SHUFFLE(X [...] adds ab5ee342b92b [GlobalISel] Ensure MachineIRBuilder::getDebugLoc() return [...] adds 2bf34c0a93ff [VPlan] Add test for sink scalars and merging using VPlan. adds 20544746402a [libc++] NFC: Refactor Lit annotations adds 7b6dd265ce83 [lld/mac] Copy some of the commit message of d5a70db193 in [...] adds 9ceea66602d9 [MCA][RegisterFile] Refactor the move elimination logic to [...] adds 5be8502271ac [lld-macho] Explicitly undefine literal exported symbols adds de1843e51a76 [llvm-mca][View] Update the Register File statistics. adds 561026936bd2 [Hexagon] Propagate metadata in Hexagon Vector Combine adds 492173d42b32 [test] Fix tools/gold/X86/new-pm.ll after D101797 adds d5494931f2ac [NFCI][X86] Mark a few lately-added system instructions as [...] adds f8589292084b [NFCI][X86] Mark Znver3 scheduling model as complete adds 4aec8f4ce0f5 [NFC][LoopIdiom] Add some tests for 'lshr until zero' ('co [...] adds 4b8962940322 [lld-macho][NFC] Purge stale test-output trees prior to sp [...] adds 6ae15756a5a6 [libc++][doc] Update the Format library status. adds 7549399d0e0a [SROA] Regenerate test checks (NFC) adds ad5f3f525828 [SelectionDAG] Regenerate test checks (NFC) adds a21df76db6c4 [X86] AMD Zen 3: XCHG is a zero-cycle instruction adds 675daef58b5e [NFC][X86] Znver3: drop obsolete fixme adds 2a08d7409bf9 [SCEV] Add additional loop guard and/or tests (NFC) adds d26ca78c18ed [SCEV] Handle and/or in applyLoopGuards() adds 76786037c681 [ARM] Fix postinc of vst1xN adds ab794852ed41 [NFC][X86][MCA] AMD Zen3: add GPR zero-idiom dependency br [...] adds eed8552787d8 [X86] AMD Zen 3: same-register XOR/SUB are GPR dependency [...] adds 8d0e2d2b0f0f [NFC][X86][MCA] AMD Zen 3: add tests for SBB dependency breaking adds 11b0568dce5a [X86] AMD Zen 3: same-reg SBB is a dependency-breaking ins [...] adds 9a31efa2f51b [NFC][X86][MCA] AMD Zen 3: add tests for CMP dependency breaking adds be23d5e81439 [X86] AMD Zen 3: same-reg CMP is a zero-cycle dependency-b [...] adds 78e949159d10 [Demangle][Rust] Print special namespaces adds 0f8854f7f5d3 [lld-macho] Don't reference entry symbol for non-executables adds 7f673fcaa9a2 [lld/mac] Fix alignment on subsections adds 75f74f267350 [lld-macho] Add llvm-otool as a test dependency adds 34b5482b334f Support NativeCodeCall binding in rewrite pattern. adds 446ed6394bd3 [RISCV][NFC] Don't need to create a new STI in RISCVAsmPrinter. adds 9ffd4924e8e1 [NFC][Coroutines] Fix two tests by removing hardcoded SSA value. adds 220f6e5271f2 [SimplifyCFG] Ignore ephemeral values when counting insts [...] adds 5344c88dcb28 [ORC] Generalize materialization dispatch to task dispatch. adds 7f9a89f9a2cc [ORC] Use the new dispatchTask API to run query callbacks. adds b3aeb1389245 [AArch64][SVE] Remove index_vector node. adds 9ba661f91276 [mlir] Fix compile error. adds 6db0cedd2385 [LegalizeVectorOps][RISCV] Add scalable-vector SELECT expansion adds c711aa0f6f9d [amdgpu-arch] Guard hsa.h with __has_include adds 9586937ef513 [AMDGPU][OpenMP] Disable tests when amdgpu-arch fails adds ed4f4edea20c [libc] Allow target architecture customization adds 7f78e409d028 [AMDGPU][OpenMP] Emit textual IR for -emit-llvm -S adds 72d013dd73f4 [mlir] OpenMP-to-LLVM: properly set outer alloca insertion point adds d13ce17bb400 AMDGPU/GlobalISel: Add regbankselect test for vgpr(dest) s [...] adds f6985a197ef9 AMDGPU/GlobalISel: Use destination register bank in applyM [...] adds 541f107871bc [libc] Simplifies multi implementations and benchmarks adds a81e45b8bcb8 [MLIR][Shape] Concretize broadcast result type if possible adds 831cf15ca689 [compiler-rt] Handle None value when polling addr2line pipe adds fc253e69f9b9 Fixed bug in buffer deallocation pass using unranked memre [...] adds 7280f4b279a6 [OpenMP][MLIR]Add support for guided, auto and runtime scheduling adds 761f3d16753e [clang][PreProcessor] Cutoff parsing after hitting complet [...] adds ea64200b6197 HexagonVectorCombine.cpp - don't negate a bool value. NFCI. adds 407a33889de6 [AArch64][SVE] Fix isel failure for FP-extending loads adds f3139b20a0bf [GlobalISel] Fix wrong invocation of `getParamStackAlign` (NFC) adds f8f953c2a6b3 [AArch64][SVE] Better utilisation of unpredicated forms of [...] adds 65c89cd1a62a [AArch64][SVE] Better utilisation of unpredicated forms of [...] adds 08de6e3adaf6 clang: Fix tests after 7f78e409d028 if clang is not called [...] adds 9ad9f0c73170 [NFC][llvm-dwarfdump] Code clean up for inlined var loc stats adds f088af37e6b5 [clangd] Fix data type of WorkDoneProgressReport::percentage adds 3212a08a8c81 [Constant] Allow ConstantAggregateZero a scalable element count adds 9243a584d386 X86LoadValueInjectionLoadHardening.cpp - use const-referen [...] adds 605f90475fc6 X86FlagsCopyLowering.cpp - try to pass DebugLoc by const-r [...] adds fefd03a89129 [TableGen] Remove redundant `Error:` in msg (NFC) adds 230953d5771f [OPENMP]Fix PR48851: the locals are not globalized in SPMD mode. adds 635164b95a8e [AArch64][SVE] Improve SVE codegen for fixed length BITCAST adds 4677d795b204 [libc++][AIX] Define _LIBCPP_ELAST adds 30463bc3f183 [SLP]Do not count perfect diamond matches for gathers seve [...] adds 0c41f77857fc [PowerPC] Enable safe for 32bit vins* P10 instructions adds 6da348569cd2 [libomptarget] Add support for target allocators to dynami [...] adds 822be4bec894 Revert "[PassManager] add helper function to hold set of v [...] adds 5c7b43aa8298 [clang][AArch32] Correctly align HA arguments when passed [...] adds 91a919e8994a [NFC] Synchronize reserved identifier code between macro a [...] adds b0ef2070bc7d [X86] Fix position-independent TType encoding adds cfef7c918b82 [libc++][NFC] Remove _VSTD:: when not needed. adds 7a0231ae59e7 [llvm-objdump][MachO] Print a newline before lazy bind/bin [...] adds b483c0afb39e [X86][SSE] Merge equal X32/X64 check prefixes. NFCI. adds 1d802e166507 [X86][SSE] Add tests for missing shuffle(pack(x,y),pack(z, [...] adds 2aa5f9b45a49 [llvm-symbolizer] Update Command Guide adds c74176ee31fa [llvm-nm] Help option output should be consistent with the [...] adds 08d18af26105 [ORC] Update SpeculativeJIT example for dispatchTask chang [...] adds 68a20c7f36d1 [clang] Support -fpic -fno-semantic-interposition for AArch64 adds 2961f86317f8 [Demangle][Rust] Parse basic types adds 80b9510806cf [RISCV] Correct VL for fixed length masked scatter. adds 22f834210adb [X86][SSE] Add examples of failures to remove a permute(pa [...] adds bcfa7baec8bb [mlir][CAPI] Add CAPI bindings for the sparse_tensor dialect. adds f44c6f20f5e9 [cmake] Enable -Wmisleading-indentation adds bda8b8488442 [lld][WebAssembly] Disallow exporting of TLS symbols adds f13893f66a22 [mlir][Python] Upstream the PybindAdaptors.h helpers and u [...] adds 7086025d6567 [Dependence Analysis] Enable delinearization of fixed size [...] adds 1f44fee521c8 [lld-macho] Improve an external weak def test adds e32374ed5cb2 [X86][SSE] canonicalizeShuffleMaskWithHorizOp - add TODO f [...] adds a9196db905aa [X86][AVX] Add example of failure to remove a 256-bit perm [...] adds ecff974b66a5 [NFC][X86][MCA] AMD Zen 3: add tests for sub-32-bit CMP de [...] adds 08cf2776acff [X86] AMD Zen 3: sub-32-bit CMP also break dependencies adds f38633d1bbf5 [mlir][Python] Re-export cext sparse_tensor module to the [...] adds 88d8f10baf30 [PassManager] add helper function to hold set of vector pa [...] adds dc7549999835 [GlobalISel][IRTranslator] Fix bit-test lowering dropping [...] adds 18f3a14e1328 [RISCV] Validate the SEW and LMUL operands to __builtin_rv [...] adds 8936608e6f4d [scudo] [GWP-ASan] Add GWP-ASan variant of scudo benchmarks. adds 0c64cef89435 [libc] Rever "Simplifies multi implementations and benchmarks". adds 7e71823f1deb [mlir][linalg] Restrict distribution to parallel dims adds 16748bd2fb1f [TargetLowering] Only inspect attributes in the arguments [...] adds 6215f49b8f2f [PowerPC] Spilling to registers does not require frame ind [...] adds 3d5e5066f1af [lld-macho][nfc] Clean up tests adds 2516b0b5261d [lld-macho] Treat undefined symbols uniformly adds b1c3c2e4fc21 [lld-macho] Fix order file arch filtering adds 96a23911f6d7 [mlir][sparse] complete migration to sparse tensor type adds e78b64df9887 [Scudo] Use GWP-ASan's aligned allocations and fixup posta [...] adds aa9b02ac7535 [Inliner] Fix noalias metadata handling for instructions s [...] adds 9507bace6c12 [ORC] Use a unique_function rather than std::function for [...] adds 85af8a8c1b57 [NFC] Use ArgListEntry indirect types more in ISel lowering adds 5000a1b4b9ed [lld][WebAssembly] Initial support merging string data adds 93a9a8a8d90f [VecLib] Add support for vector fns from Darwin's libsystem. adds 463ea28e96c7 [InstCombine] Fold comparison of integers by parts adds a2c8aebd8f8f [mlir][Python] Finish adding RankedTensorType support for [...] adds 295087644a46 [mlir] Fix windows build bot break due to use of `alloca` [...] adds edfa44b73298 [test] Put aix-xcoff-huge-relocs.ll under expensive checks adds 4ff2fe1df0ce [libcxx] removes `weak_equality` and `strong_equality` fro [...] adds ba225ce961b4 [NFC][X86][MCA] AMD Zen 3: add tests for same-reg MMX PCMPEQ adds b24edfff4fb1 [X86] AMD Zen 3: same-reg PCMPEQ is an MMX all-ones dep br [...] adds 0e538f937a02 [NFC][X86][MCA] AMD Zen 3: add tests for same-reg XMM SSE PCMP adds 0f3bcb97efa8 [X86] AMD Zen 3: same-reg SSE XMM PCMP is dep breaking one-idiom adds f59db6c4f845 [NFC][X86][MCA] AMD Zen 3: add tests for same-re AVX XMM VPCMP adds 295324533700 [X86] AMD Zen 3: same-reg AVX XMM VPCMP is dep breaking one-idiom adds 5864e7b86b91 [NFC][X86][MCA] AMD Zen 3: add tests for same-re AVX YMM VPCMP adds 6a64c462eb82 [X86] AMD Zen 3: same-reg AVX YMM VPCMP is dep breaking one-idiom adds 43f4331edfb5 [clang-tidy] Aliasing: Add support for captures. adds 9b292e0edcd4 [clang-tidy] Aliasing: Add more support for captures. adds 91ca3269a1b5 [clang-tidy] Aliasing: Add support for aggregates with ref [...] adds 8a74cc139d1f [InstCombine] add tests for extract-subvector of insert; NFC adds 5577e866912e [InstCombine] fold extract subvector of bitcast insertelt adds 6dc2a6a8c9a0 Remove some unnecessary explicit defaulted copy ctors to c [...] adds 174606877df4 Clangd Matchers.h: Fix -Wdeprecated-copy by making the def [...] adds 8b9c15c2819b [Hexagon] Handle loads and stores of scalar predicate vectors adds a0fed635fe17 Pre-commit test case for D101970 adds 6d8b070d9619 [AArch64][GlobalISel] Enable memcpy family combines on min [...] adds 061e071d8c9b Revert "[lld][WebAssembly] Initial support merging string data" adds 79be9c59c6ac [AArch64][GlobalISel] Add post-legalizer lowering for NEON [...] adds 7b52aeadfa38 [mlir][Tensor] Add folding for tensor.from_elements adds 3b8d2be52725 Reland: "[lld][WebAssembly] Initial support merging string data" adds 0077dce361ae [gn build] Port 3b8d2be52725 adds 22d295f6953c [AMDGPU] Constant fold Intrinsic::amdgcn_perm adds bf812ea484b7 [mlir][linalg] remove the -now- obsolete sparse support in linalg adds e5d483f28a3a [libcxx][ranges] Add ranges::empty CPO. adds 6d263b6f1c97 [ORC-RT] Add unit test infrastructure, extensible_rtti imp [...] adds 842b1624460b [gn build] Port e5d483f28a3a adds c057779d389c [NFC][LSAN] Fix flaky multithreaded test adds 1e11616a071d Enable export of FIR includes into the install tree https: [...] adds d8ec2b183e92 [RISCV] Fix the calculation of the offset of Zvlsseg spilling. adds ad558a4ff7cd [AMDGPU] Pre-commit tests for D102211 adds 2b09a89daf95 [OpAsmParser] Refactor parseOptionalInteger to support wid [...] adds 70c23e232e50 [LLD] Improve reporting unresolved symbols in shared libraries adds d69bccf1ed30 [mlir][linalg] Remove IndexedGenericOp support from Tiling... adds daf3cb3b8a58 [clangd][index-sever] Limit results in repsonse adds 888307ee625b [clangd][remote-client] Set HasMore to true for failure adds 20506fb1f361 [libcxx] removes operator!= and globally guards against no [...] adds 9eb0969a767b [libcxx] makes comparison operators for `std::*_ordering` [...] adds 578d09c1b195 [libcxx] deprecates/removes `std::raw_storage_iterator` adds 6676e09b22c3 [mlir][linalg] Remove IndexedGenericOp support from Fusion... adds 7bc6df2528f6 [mlir][linalg] Remove IndexedGenericOp support from Linalg [...] adds 1ed296360041 [llvm-dwarfdump] Fix abstract origin vars location stats c [...] adds 65e40f0b265d [libcxx][test] Make string.modifiers/clear_and_shrink_db1. [...] adds 88a48999d249 Support VectorTransfer splitting on writes also. adds 7d20f709ea6d [OpenCL] [NFC] Fixed underline being too short in rst adds 33399405f442 Fix -Wdocumentation warnings. NFCI. adds 05d1ae4e18fa * Add support for JSON output style to llvm-symbolizer adds 04adfb660987 [flang][cmake] Enable the new driver by default adds d7086af2143d [WebAssembly] Support for WebAssembly globals in LLVM IR adds b159987054e1 [VP] Improve the VP intrinsic unittests adds b2f21b145aec [CodeGen][WebAssembly] Better lowering for WASM_SYMBOL_TYP [...] adds 518b7f913526 [LLD] [COFF] Add an assert regarding the RVA of exported s [...] adds 1c777ab459d7 [MLIR] Switch llvm.noalias to a unit attribute adds 3b873831c439 [AMDGPU] Add some GFX10.3 testing. NFC. adds df47368d406a [RegAllocFast] properly handle STATEPOINT instruction. adds c79bc5942d0e [PowerPC][Bug] Fix Bug in Stack Frame Update Code adds 3f03877f5a83 [LLDB] Don't use the local python to set a default for LLD [...] adds dedca78d486e [libomptarget][nfc] Drop stringify in macro adds 13ea238b1e1d [OpenCL] Allow use of double type without extension pragma. adds 09fe84abb4ee [AMDGPU] Move code sinking before structurizer adds 49950cb1f6f6 [SLP] restrict matching of load combine candidates adds c02476f3158f [X86][CostModel] X86TTIImpl::getMemoryOpCost(): rewrite ve [...] adds bce3cca4889a CodeGen: Fix null dereference before null check adds 9acc03ad92c6 [X86][SSE] Replace foldShuffleOfHorizOp with generalized v [...] adds 759b97e55a4b [X86] Replace repeated isa/cast<ConstantSDNode> calls with [...] adds 6ca2bdb03c0f [TableGen] Make the NUL character invalid in .td files adds 69ed93a43551 [X86] X86TTIImpl::getInterleavedMemoryOpCostAVX2(): use ge [...] adds faebc6bf108e [VPlan] Register recipe for instr if the simplified value [...] adds c765d140fe45 [OpenMP] Fix hidden helper + affinity adds 46402eb103d0 Revert "[TableGen] Make the NUL character invalid in .td files" adds c58912eca743 Fix typo "Execpt" in comments adds 29342291d25b [LoopInterchange] Fix legality for triangular loops adds eca3d6839924 Revert "[AMDGPU][OpenMP] Emit textual IR for -emit-llvm -S" adds d6a228cba47f [NFC][AMDGPU] Correct product name for gfx908 adds 4eff94694753 [IR][AutoUpgrade] Drop align attribute from void return types adds dfc1e31d49fe Produce warning for performing pointer arithmetic on a nul [...] adds 2c1f9f390b0a [NFC][X86] Precommit another testcase for D101944 adds 6400905a6152 Fix branch coverage merging in FunctionCoverageSummary::ge [...] adds 6c82b8a378a6 Change Target::ReadMemory to ensure the amount of memory r [...] adds ec28e43e0154 Add null-pointer checks when accessing a TypeSystem's SymbolFile adds b20e150c9be1 [mlir] Use static shape knowledge when lowering memref.reshape adds 72995a4bdf7d [libomptarget][nfc] Add hook to easily disable building am [...] adds ab3fcc5065a8 [libc++] s/_VSTD::declval/declval/g. NFCI. adds 0b8da5fa5915 [libc++] s/std::size_t/size_t/g. NFCI. adds aa5e3beea3d4 [libc++] s/_VSTD::chrono/chrono/g. NFCI. adds 866b27950aaf [libc++] s/_VSTD::is_unsigned/is_unsigned/ in <random>. NFCI. adds 6491d99e330c [libc++] Remove more unnecessary _VSTD:: from type names. NFCI. adds 668dccc396da Revert "Fix branch coverage merging in FunctionCoverageSum [...] adds dc00cbb50538 [RISCV] Match trunc_vector_vl+sra_vl/srl_vl with splat shi [...] adds 5f78ba001ca2 [X86][Codegen] Shift amount mod: sh? i64 x, (32-y) --> sh? [...] adds ce6e4f27dd72 [RISCV] Use fractional LMULs for fixed length types smalle [...] adds db13f832a1ee [libcxx][tests] Fix incomplte.verify tests by disabling th [...] adds 4f80340fb671 [X86][SSE] Add tests for permute(phaddw(phaddw(x,y),phaddw [...] adds eccb925147d5 Reland "[Coverage] Fix branch coverage merging in Function [...] adds 1c7c6f2b1062 Revert "[ORC-RT] Add unit test infrastructure, extensible_ [...] adds cba508fb6787 [TextAPI] Reformat llvm_unreachable message adds 5a9497d68901 [flang] Allow large and erroneous ac-implied-do's adds e0b6c99288bf Re-apply "[ORC-RT] Add unit test infrastructure, extensibl [...] adds 9ab49ae55dd7 [lld/mac] Implement -sectalign adds 0fd0a010a1ed [git-clang-format] Do not apply clang-format to symlinks adds 68de58cd649c [libcxx] [test] Fix filesystem permission tests for windows adds 49755871ad0c [mlir][ODS]: Add per-op cppNamespace. adds 61cbbba7a645 [ArgumentPromotion] Fix byval alignment handling. adds ec27c5f17044 [RISCV] Prefer to lower MC_GlobalAddress operands to .Lfoo$local adds ae2b36e8bdfa [AArch64][GlobalISel] Support truncstorei8/i16 w/ combine [...] adds 129f466e222e [GlobalOpt] Remove heap SROA adds 97e04d41e646 [X86] X86TTIImpl::getInterleavedMemoryOpCostAVX2(): canoni [...] adds b2f227c6c87c [lld][WebAssembly] Convert test to assembly. NFC. adds 2075f2b296b0 [clang] Support -fpic -fno-semantic-interposition for RISCV adds f90abac6caab [OpenMP] Use compound operators for reduction combiner if [...] adds 384dd9ddaf61 [libc++] Run `substitutes-in-compile-flags.sh.cpp` test on [...] adds 9558b602b22c Add an "interrupt timeout" to Process, and pipe that throu [...] adds b49a798e71f9 [lld][WebAssembly] Remove relocation target verification adds 731206f3684a [mlir] Move move capture in SparseElementsAttr::getValues adds 2a73b7bd8cf7 [NFC][LSAN] Limit the number of concurrent threads is the test adds 69069509b2d3 [AArch64][GlobaISel] Mark target generic instructions as H [...] adds ffbffaf6b6b0 [PowerPC] Improve codegen for int-to-fp conversion of subw [...] adds 4fb0aaf03381 [OpenMP] Changes to enable MSVC ARM64 build of libomp adds d092dd56aed8 [RISCV] Regenerate stepvector.ll. NFC adds a7757f6c22e4 [hwasan] Stress test for thread creation. adds 4433f4601e8a [AMDGPU] Fix extra waitcnt being added with BUFFER_INVL2 adds ebdcebfcb4b5 Removed unnecessary introduction of semi-colons. adds a9bbbaaa8810 [mlir] Elide large elements attrs when printing Operations [...] adds 764ad3b3fafb [mlir][tosa] Tosa elementwise broadcasting had some minor bugs adds 15565403722e [InstCombine] Clean up one-hot merge optimization (NFC) adds 3a64b7080d50 [RISCV] Move instruction information into the RISCVII name [...] adds 489a3531a42f [llvm-cov] Support for v4 format in convert-for-testing adds d3f89d4d1688 Revert "[LoopInterchange] Fix legality for triangular loops" adds 46475a79f85b [AIX][TLS] Diagnose use of unimplemented TLS models adds cbcfca343f02 [JITLink] Make LinkGraph debug dumps more readable. adds 74a96b4c9843 [JITLink][x86-64] Add an x86_64 PointerSize constexpr. adds a0162a81b137 [JITLink][MachO/x86_64] Expose API for creating eh-frame f [...] adds 8280ece0c972 [Coverage] Support overriding compilation directory adds 40e3aa39bd68 [LoopInterchange] Fix legality for triangular loops adds 5cb17728d194 [clang][Fuchsia] Introduce compat multilibs adds d63860a05226 [JITLink] Fix bogus format string. adds fec294599894 Revert "[GVN] Clobber partially aliased loads." adds 2bdfcf0cac14 GlobalISel: Move AArch64 AssignFnVarArg to base class adds 24e2e5df0e7e GlobalISel: Split ValueHandler into assignment and emissio [...] adds 6ecbdb761ffd GlobalISel: Make constant fields const adds a15ed701ab30 AMDGPU: Fix assert on constant load from addrspacecasted pointer adds 6f5ddf67319b GlobalISel: Don't hardcode varargs=false in resultsCompatible adds 697ac15a0fc7 Fix bad mangling of <data-member-prefix> for a closure in [...] adds 3978333b71bf Add test for PR50039. adds bb726383ac75 Revert "Fix bad mangling of <data-member-prefix> for a clo [...] adds 19cedd3cd3ab [lld][WebAssembly] Fix for string merging + negative addends adds 0f2eb7e6e5dc This test is failing on Linux, skip while I investigate. adds cc79aaced0a4 AMDGPU: Fix SILoadStoreOptimizer for gfx90a adds 10c309ad81e2 Removing test... adds 3f8be15f2911 [LoopInterchange] Handle lcssa PHIs with multiple predecessors adds 7d101e0f6a38 [NFC][msan] Move setlocale test into sanitizer_common adds f653313d4aec [mlir][AsmPrinter] Remove recursion while SSA naming new 04b2ada51c90 tsan: add a simple syscall test new 5dad3d1ba9ad tsan: mark sigwait as blocking new 6d2df181638a [VectorComine] Restrict single-element-store index to inbo [...] new 8214764f35e1 tsan: declare annotations in test.h new 53558ed8a0ab sanitizer_common: fix SIG_DFL warning new 85a96d82ca76 [symbolizer] Fix leak after D96883 new 23596fece043 sanitizer_common: don't write into .rodata new f8306647fa05 [libcxx][test] Split more debug mode tests new febbe4b5a0ab [PowerPC] [Clang] Enable float128 feature on VSX targets new 2721e27c3aa3 sanitizer_common: deduplicate CheckFailed new 382c505d9cfc [COFF] Fix ARM and ARM64 REL32 relocations to be relative [...] new 1dc838717a29 tsan: fix syscall test on aarch64 new 9a0ea5994bdc [mlir] Support alignment in LLVM dialect GlobalOp new 27b2bd76017f [MLIR] Enable conversion from llvm::SMLoc to mlir::Locatio [...] new 8aa7f28497b6 scudo: fix CheckFailed-related build breakage new 6351993da72e [libc] Simplifies multi implementations new 44642505ce6b [NFC][llvm-dwarfdump] Avoid passing std::string by value i [...] new d8e65585f7c7 Fixed llvm-objcopy to add correct symbol table for ELF wit [...] new edf9d8826637 [ARM] Precommit test for D101898 new 34c098b780a2 [ARM] Prevent spilling between ldrex/strex pairs new cbd93cee9bf0 Revert "[PowerPC] [Clang] Enable float128 feature on VSX targets" new 68137ef5682f [AMDGPU] Skip invariant loads when avoiding WAR conflicts new 5af3a6645f38 Remove Windows editline from LLDB new fdb055f4f139 Reapply "[DebugInfo] Fix updateDbgUsersToReg to support DB [...] new b6c0edb9792c [lldb] [Process/elf-core] Fix reading FPRs from FreeBSD/i3 [...] new 71e66da04cf1 [Process/elf-core] Read PID from FreeBSD prpsinfo new 6e6f9a636b19 [AArch64][SVE] Improve sve.convert.to.svbool lowering new b7a11274f90f [LoopVectorize] Fix scalarisation crash in widenPHIInstruc [...] new 725bc3eb0d5c [llvm-symbolizer] Place Mach-O options into the Mach-O opt [...] The 29 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../clang-tidy/altera/AlteraTidyModule.cpp | 3 + clang-tools-extra/clang-tidy/altera/CMakeLists.txt | 1 + .../altera/IdDependentBackwardBranchCheck.cpp | 264 + .../altera/IdDependentBackwardBranchCheck.h | 83 + clang-tools-extra/clang-tidy/utils/Aliasing.cpp | 38 +- clang-tools-extra/clangd/ClangdLSPServer.cpp | 4 +- clang-tools-extra/clangd/ClangdLSPServer.h | 3 + clang-tools-extra/clangd/CodeComplete.cpp | 9 +- clang-tools-extra/clangd/FindTarget.cpp | 7 + clang-tools-extra/clangd/Protocol.h | 2 +- clang-tools-extra/clangd/index/remote/Client.cpp | 9 +- .../clangd/index/remote/server/Server.cpp | 31 +- .../clangd/quality/CompletionModel.cmake | 3 +- .../clangd/test/remote-index/result-limiting.test | 39 + clang-tools-extra/clangd/tool/ClangdMain.cpp | 9 + .../clangd/unittests/CodeCompleteTests.cpp | 9 + .../clangd/unittests/FindTargetTests.cpp | 15 + clang-tools-extra/clangd/unittests/Matchers.h | 9 +- .../clangd/unittests/SemanticHighlightingTests.cpp | 15 + clang-tools-extra/docs/ReleaseNotes.rst | 7 + .../checks/altera-id-dependent-backward-branch.rst | 28 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + .../altera-id-dependent-backward-branch.cpp | 86 + .../clang-tidy/checkers/bugprone-infinite-loop.cpp | 193 +- .../bugprone-redundant-branch-condition.cpp | 148 +- clang/cmake/caches/Fuchsia-stage2.cmake | 2 +- clang/cmake/caches/Fuchsia.cmake | 2 +- clang/docs/LanguageExtensions.rst | 48 + clang/docs/LibASTMatchersReference.html | 389 +- clang/docs/OpenCLSupport.rst | 2 +- clang/docs/ReleaseNotes.rst | 3 + clang/include/clang/ASTMatchers/ASTMatchers.h | 43 +- .../clang/ASTMatchers/ASTMatchersInternal.h | 93 +- clang/include/clang/Basic/Attr.td | 1 + clang/include/clang/Basic/BuiltinsAMDGPU.def | 1 + clang/include/clang/Basic/BuiltinsPPC.def | 161 +- clang/include/clang/Basic/BuiltinsWebAssembly.def | 16 +- clang/include/clang/Basic/BuiltinsX86_64.def | 1 + clang/include/clang/Basic/DiagnosticDriverKinds.td | 9 +- clang/include/clang/Basic/DiagnosticParseKinds.td | 10 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 9 +- clang/include/clang/Basic/OpenCLExtensions.def | 1 + clang/include/clang/Basic/OpenCLImageTypes.def | 2 +- clang/include/clang/Driver/Options.td | 47 +- clang/include/clang/Parse/Parser.h | 8 +- clang/include/clang/Sema/Sema.h | 49 +- clang/lib/AST/AttrImpl.cpp | 51 +- clang/lib/Analysis/ThreadSafety.cpp | 37 +- clang/lib/Basic/Targets/AMDGPU.h | 1 + clang/lib/Basic/Targets/NVPTX.h | 1 + clang/lib/Basic/Targets/WebAssembly.h | 4 +- clang/lib/CodeGen/BackendUtil.cpp | 14 +- clang/lib/CodeGen/CGAtomic.cpp | 55 +- clang/lib/CodeGen/CGBuiltin.cpp | 16 +- clang/lib/CodeGen/CGDecl.cpp | 54 + clang/lib/CodeGen/CGException.cpp | 1 - clang/lib/CodeGen/CGExpr.cpp | 6 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 61 +- clang/lib/CodeGen/CGStmtOpenMP.cpp | 12 +- clang/lib/CodeGen/CodeGenModule.cpp | 25 +- clang/lib/CodeGen/CodeGenModule.h | 4 + clang/lib/CodeGen/TargetInfo.cpp | 11 +- clang/lib/Driver/Driver.cpp | 29 +- clang/lib/Driver/ToolChains/BareMetal.cpp | 7 +- clang/lib/Driver/ToolChains/Clang.cpp | 9 +- clang/lib/Driver/ToolChains/Fuchsia.cpp | 4 + clang/lib/Format/FormatToken.h | 14 +- clang/lib/Format/FormatTokenLexer.cpp | 108 +- clang/lib/Format/FormatTokenLexer.h | 3 +- clang/lib/Format/TokenAnnotator.cpp | 101 +- clang/lib/Format/UnwrappedLineParser.cpp | 42 +- clang/lib/Format/UnwrappedLineParser.h | 1 + clang/lib/Frontend/CompilerInvocation.cpp | 8 + clang/lib/Headers/altivec.h | 212 +- .../__clang_openmp_device_functions.h | 42 + clang/lib/Headers/openmp_wrappers/new | 26 +- clang/lib/Headers/wasm_simd128.h | 185 +- clang/lib/Index/IndexDecl.cpp | 2 +- clang/lib/Lex/PPDirectives.cpp | 34 +- clang/lib/Parse/ParseDecl.cpp | 26 +- clang/lib/Parse/ParseOpenMP.cpp | 174 +- clang/lib/Parse/ParseStmtAsm.cpp | 5 +- clang/lib/Sema/Sema.cpp | 4 - clang/lib/Sema/SemaChecking.cpp | 39 +- clang/lib/Sema/SemaDecl.cpp | 18 +- clang/lib/Sema/SemaDeclAttr.cpp | 6 + clang/lib/Sema/SemaExpr.cpp | 12 +- clang/lib/Sema/SemaOpenMP.cpp | 157 +- clang/lib/Sema/SemaTemplateDeduction.cpp | 8 + clang/lib/Sema/SemaType.cpp | 14 + clang/test/CodeCompletion/crash-if-directive.cpp | 6 + clang/test/CodeGen/RISCV/rvv_errors.c | 10 + clang/test/CodeGen/aix-tls-model.cpp | 26 + clang/test/CodeGen/arm-ha-alignstack.c | 114 + clang/test/CodeGen/atomic-ops.c | 39 +- clang/test/CodeGen/builtins-ppc-p8vector.c | 21 - clang/test/CodeGen/builtins-ppc-pair-mma.c | 438 +- clang/test/CodeGen/builtins-ppc-vsx.c | 279 + clang/test/CodeGen/builtins-wasm.c | 16 +- clang/test/CodeGen/lto-newpm-pipeline.c | 6 - clang/test/CodeGen/target-data.c | 4 +- clang/test/CodeGen/thinlto-distributed-newpm.ll | 22 - clang/test/CodeGenCXX/exceptions-seh.cpp | 2 + clang/test/CodeGenCoroutines/coro-dest-slot.cpp | 2 +- .../test/CodeGenCoroutines/coro-newpm-pipeline.cpp | 6 - clang/test/CodeGenCoroutines/coro-params.cpp | 4 +- clang/test/CodeGenOpenCL/amdgpu-nullptr.cl | 2 +- clang/test/CodeGenOpenCL/atomic-ops.cl | 31 +- clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl | 8 + clang/test/CoverageMapping/coroutine.cpp | 2 - .../lib/x86_64-unknown-fuchsia/compat/libc++.so | 0 clang/test/Driver/amdgpu-openmp-toolchain.c | 25 +- clang/test/Driver/baremetal.cpp | 45 +- clang/test/Driver/debug-pass-structure.c | 3 +- clang/test/Driver/fsemantic-interposition.c | 4 +- clang/test/Driver/fuchsia.cpp | 18 + clang/test/Driver/immediate-options.c | 17 - clang/test/Driver/print-resource-dir.c | 4 + clang/test/Driver/print-runtime-dir.c | 11 + clang/test/Driver/stack-protector-guard.c | 4 +- clang/test/Headers/Inputs/include/new | 7 + clang/test/Headers/Inputs/include/stdlib.h | 3 + clang/test/Headers/nvptx_device_math_complex.c | 24 +- clang/test/Headers/target_include_new.cpp | 32 + clang/test/Headers/wasm.c | 58 +- clang/test/Misc/amdgcn.languageOptsOpenCL.cl | 5 + clang/test/Misc/nvptx.languageOptsOpenCL.cl | 5 + clang/test/Misc/r600.languageOptsOpenCL.cl | 5 + clang/test/Misc/warning-flags.c | 2 +- clang/test/OpenMP/cancel_codegen.cpp | 6557 +++- clang/test/OpenMP/cancellation_point_codegen.cpp | 1478 +- clang/test/OpenMP/debug-info-complex-byval.cpp | 73 +- clang/test/OpenMP/debug-info-openmp-array.cpp | 212 +- .../declare_target_codegen_globalization.cpp | 129 +- .../declare_target_device_only_compilation.cpp | 20 - clang/test/OpenMP/declare_target_messages.cpp | 24 +- .../declare_target_only_one_side_compilation.cpp | 75 + clang/test/OpenMP/distribute_codegen.cpp | 11376 ++++++- .../OpenMP/distribute_firstprivate_codegen.cpp | 4814 ++- .../test/OpenMP/distribute_lastprivate_codegen.cpp | 4936 ++- .../OpenMP/distribute_parallel_for_codegen.cpp | 28107 +++++++++++++++- ...istribute_parallel_for_firstprivate_codegen.cpp | 6315 +++- .../OpenMP/distribute_parallel_for_if_codegen.cpp | 11742 ++++++- ...distribute_parallel_for_lastprivate_codegen.cpp | 6794 +++- ...distribute_parallel_for_num_threads_codegen.cpp | 11060 ++++++- .../distribute_parallel_for_private_codegen.cpp | 4937 ++- .../distribute_parallel_for_proc_bind_codegen.cpp | 1112 +- .../distribute_parallel_for_reduction_messages.cpp | 2 +- ...tribute_parallel_for_reduction_task_codegen.cpp | 1413 +- .../distribute_parallel_for_simd_codegen.cpp | 32136 +++++++++++++++++- ...bute_parallel_for_simd_firstprivate_codegen.cpp | 6609 +++- .../distribute_parallel_for_simd_if_codegen.cpp | 14696 ++++++++- ...ibute_parallel_for_simd_lastprivate_codegen.cpp | 7553 ++++- ...ibute_parallel_for_simd_num_threads_codegen.cpp | 12452 ++++++- ...istribute_parallel_for_simd_private_codegen.cpp | 5257 ++- ...tribute_parallel_for_simd_proc_bind_codegen.cpp | 1286 +- ...ribute_parallel_for_simd_reduction_messages.cpp | 2 +- clang/test/OpenMP/distribute_private_codegen.cpp | 4129 ++- clang/test/OpenMP/distribute_simd_codegen.cpp | 17689 +++++++++- .../distribute_simd_firstprivate_codegen.cpp | 5012 ++- .../OpenMP/distribute_simd_lastprivate_codegen.cpp | 5619 +++- .../OpenMP/distribute_simd_private_codegen.cpp | 4544 ++- .../OpenMP/distribute_simd_reduction_codegen.cpp | 1856 +- .../OpenMP/distribute_simd_reduction_messages.cpp | 2 +- clang/test/OpenMP/for_firstprivate_codegen.cpp | 2894 +- clang/test/OpenMP/for_lastprivate_codegen.cpp | 11463 ++++++- clang/test/OpenMP/for_linear_codegen.cpp | 3716 ++- clang/test/OpenMP/for_private_codegen.cpp | 2147 +- clang/test/OpenMP/for_reduction_codegen.cpp | 10760 ++++++- clang/test/OpenMP/for_reduction_codegen_UDR.cpp | 8080 ++++- clang/test/OpenMP/for_reduction_messages.cpp | 2 +- clang/test/OpenMP/for_reduction_task_codegen.cpp | 1231 +- clang/test/OpenMP/for_simd_reduction_messages.cpp | 2 +- clang/test/OpenMP/irbuilder_for_iterator.cpp | 18 +- clang/test/OpenMP/irbuilder_for_rangefor.cpp | 22 +- clang/test/OpenMP/irbuilder_for_unsigned.c | 16 +- .../irbuilder_nested_openmp_parallel_empty.c | 12 +- clang/test/OpenMP/irbuilder_nested_parallel_for.c | 134 +- .../master_taskloop_in_reduction_codegen.cpp | 1636 +- .../master_taskloop_in_reduction_messages.cpp | 2 +- .../OpenMP/master_taskloop_reduction_messages.cpp | 2 +- .../master_taskloop_simd_in_reduction_codegen.cpp | 1663 +- .../master_taskloop_simd_in_reduction_messages.cpp | 2 +- .../master_taskloop_simd_reduction_messages.cpp | 2 +- clang/test/OpenMP/nvptx_SPMD_codegen.cpp | 5 +- clang/test/OpenMP/nvptx_allocate_codegen.cpp | 110 +- clang/test/OpenMP/nvptx_data_sharing.cpp | 6 +- .../nvptx_declare_target_var_ctor_dtor_codegen.cpp | 6 +- .../OpenMP/nvptx_declare_variant_name_mangling.cpp | 4 +- ...tx_distribute_parallel_generic_mode_codegen.cpp | 26 +- clang/test/OpenMP/nvptx_lambda_capturing.cpp | 10 +- .../OpenMP/nvptx_multi_target_parallel_codegen.cpp | 143 +- .../test/OpenMP/nvptx_nested_parallel_codegen.cpp | 287 +- clang/test/OpenMP/nvptx_parallel_codegen.cpp | 1062 +- clang/test/OpenMP/nvptx_parallel_for_codegen.cpp | 6 +- clang/test/OpenMP/nvptx_target_codegen.cpp | 278 +- .../test/OpenMP/nvptx_target_parallel_codegen.cpp | 14 +- .../nvptx_target_parallel_num_threads_codegen.cpp | 14 +- ...get_parallel_reduction_codegen_tbaa_PR46146.cpp | 4120 ++- clang/test/OpenMP/nvptx_target_teams_codegen.cpp | 8 +- .../nvptx_target_teams_distribute_codegen.cpp | 14 +- ...arget_teams_distribute_parallel_for_codegen.cpp | 9754 +++--- ...istribute_parallel_for_generic_mode_codegen.cpp | 14 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 26 +- clang/test/OpenMP/nvptx_teams_codegen.cpp | 1815 +- .../test/OpenMP/nvptx_teams_reduction_codegen.cpp | 14 +- clang/test/OpenMP/openmp_win_codegen.cpp | 167 +- clang/test/OpenMP/ordered_codegen.cpp | 3331 +- clang/test/OpenMP/parallel_codegen.cpp | 1538 +- clang/test/OpenMP/parallel_copyin_codegen.cpp | 4459 ++- .../test/OpenMP/parallel_firstprivate_codegen.cpp | 6658 +++- clang/test/OpenMP/parallel_for_codegen.cpp | 9603 +++++- .../parallel_for_lastprivate_conditional.cpp | 659 +- clang/test/OpenMP/parallel_for_linear_codegen.cpp | 1471 +- .../OpenMP/parallel_for_reduction_messages.cpp | 2 +- .../OpenMP/parallel_for_reduction_task_codegen.cpp | 1223 +- .../parallel_for_simd_reduction_messages.cpp | 2 +- clang/test/OpenMP/parallel_if_codegen.cpp | 1103 +- clang/test/OpenMP/parallel_master_codegen.cpp | 2389 +- .../OpenMP/parallel_master_reduction_messages.cpp | 2 +- .../parallel_master_reduction_task_codegen.cpp | 1095 +- .../OpenMP/parallel_master_taskloop_codegen.cpp | 2432 +- ...arallel_master_taskloop_lastprivate_codegen.cpp | 3563 +- ...parallel_master_taskloop_reduction_messages.cpp | 2 +- .../parallel_master_taskloop_simd_codegen.cpp | 5200 ++- ...el_master_taskloop_simd_lastprivate_codegen.cpp | 3912 ++- ...lel_master_taskloop_simd_reduction_messages.cpp | 2 +- clang/test/OpenMP/parallel_private_codegen.cpp | 2427 +- clang/test/OpenMP/parallel_reduction_codegen.cpp | 5730 +++- clang/test/OpenMP/parallel_reduction_messages.cpp | 2 +- .../OpenMP/parallel_reduction_task_codegen.cpp | 1077 +- clang/test/OpenMP/parallel_sections_codegen.cpp | 498 +- .../parallel_sections_reduction_messages.cpp | 2 +- .../parallel_sections_reduction_task_codegen.cpp | 1166 +- clang/test/OpenMP/reduction_compound_op.cpp | 2558 ++ ...ks_parallel_in_multiple_target_state_machines.c | 28 +- .../remarks_parallel_in_target_state_machine.c | 8 +- .../test/OpenMP/sections_firstprivate_codegen.cpp | 2616 +- clang/test/OpenMP/sections_lastprivate_codegen.cpp | 3996 ++- clang/test/OpenMP/sections_private_codegen.cpp | 1738 +- clang/test/OpenMP/sections_reduction_codegen.cpp | 2843 +- clang/test/OpenMP/sections_reduction_messages.cpp | 2 +- .../OpenMP/sections_reduction_task_codegen.cpp | 1174 +- clang/test/OpenMP/simd_reduction_messages.cpp | 2 +- clang/test/OpenMP/single_codegen.cpp | 6725 +++- clang/test/OpenMP/single_firstprivate_codegen.cpp | 2369 +- clang/test/OpenMP/single_private_codegen.cpp | 1514 +- .../test/OpenMP/target_codegen_global_capture.cpp | 4912 ++- clang/test/OpenMP/target_map_codegen_03.cpp | 1099 +- clang/test/OpenMP/target_parallel_codegen.cpp | 15624 ++++++++- .../test/OpenMP/target_parallel_debug_codegen.cpp | 1280 +- clang/test/OpenMP/target_parallel_for_codegen.cpp | 25938 ++++++++++++++- .../OpenMP/target_parallel_for_debug_codegen.cpp | 1738 +- .../target_parallel_for_reduction_messages.cpp | 2 +- .../target_parallel_for_reduction_task_codegen.cpp | 1249 +- .../OpenMP/target_parallel_for_simd_codegen.cpp | 28941 ++++++++++++++++- ...target_parallel_for_simd_reduction_messages.cpp | 2 +- clang/test/OpenMP/target_parallel_if_codegen.cpp | 8012 ++++- .../OpenMP/target_parallel_num_threads_codegen.cpp | 6806 +++- .../OpenMP/target_parallel_reduction_messages.cpp | 2 +- .../target_parallel_reduction_task_codegen.cpp | 1103 +- clang/test/OpenMP/target_reduction_messages.cpp | 2 +- .../test/OpenMP/target_simd_reduction_messages.cpp | 2 +- clang/test/OpenMP/target_teams_codegen.cpp | 19717 +++++++++++- .../OpenMP/target_teams_distribute_codegen.cpp | 26685 ++++++++++++++- .../target_teams_distribute_collapse_codegen.cpp | 3116 +- ...rget_teams_distribute_dist_schedule_codegen.cpp | 6198 +++- ...arget_teams_distribute_firstprivate_codegen.cpp | 5341 ++- ...target_teams_distribute_lastprivate_codegen.cpp | 4931 ++- ...arget_teams_distribute_parallel_for_codegen.cpp | 5386 +++- ...ms_distribute_parallel_for_collapse_codegen.cpp | 4241 ++- ...stribute_parallel_for_dist_schedule_codegen.cpp | 9469 +++++- ...istribute_parallel_for_firstprivate_codegen.cpp | 11176 ++++++- ...et_teams_distribute_parallel_for_if_codegen.cpp | 12041 ++++++- ...distribute_parallel_for_lastprivate_codegen.cpp | 6726 +++- ...teams_distribute_parallel_for_order_codegen.cpp | 390 +- ...ams_distribute_parallel_for_private_codegen.cpp | 8944 +++++- ...s_distribute_parallel_for_proc_bind_codegen.cpp | 1112 +- ...s_distribute_parallel_for_reduction_codegen.cpp | 3308 +- ..._distribute_parallel_for_reduction_messages.cpp | 2 +- ...tribute_parallel_for_reduction_task_codegen.cpp | 2039 +- ...ms_distribute_parallel_for_schedule_codegen.cpp | 28761 ++++++++++++++++- ..._teams_distribute_parallel_for_simd_codegen.cpp | 6160 +++- ...stribute_parallel_for_simd_collapse_codegen.cpp | 4885 ++- ...ute_parallel_for_simd_dist_schedule_codegen.cpp | 10897 ++++++- ...bute_parallel_for_simd_firstprivate_codegen.cpp | 11676 ++++++- ...ams_distribute_parallel_for_simd_if_codegen.cpp | 15267 ++++++++- ...ibute_parallel_for_simd_lastprivate_codegen.cpp | 7476 ++++- ...istribute_parallel_for_simd_private_codegen.cpp | 9494 +++++- ...tribute_parallel_for_simd_proc_bind_codegen.cpp | 1286 +- ...tribute_parallel_for_simd_reduction_codegen.cpp | 3616 ++- ...ribute_parallel_for_simd_reduction_messages.cpp | 2 +- ...stribute_parallel_for_simd_schedule_codegen.cpp | 32181 ++++++++++++++++++- .../target_teams_distribute_private_codegen.cpp | 4192 ++- .../target_teams_distribute_reduction_codegen.cpp | 2023 +- .../target_teams_distribute_reduction_messages.cpp | 2 +- .../target_teams_distribute_simd_codegen.cpp | 30581 +++++++++++++++++- ...rget_teams_distribute_simd_collapse_codegen.cpp | 3624 ++- ...teams_distribute_simd_dist_schedule_codegen.cpp | 7314 ++++- ..._teams_distribute_simd_firstprivate_codegen.cpp | 5530 +++- ...t_teams_distribute_simd_lastprivate_codegen.cpp | 5599 +++- ...arget_teams_distribute_simd_private_codegen.cpp | 4406 ++- ...get_teams_distribute_simd_reduction_codegen.cpp | 2261 +- ...et_teams_distribute_simd_reduction_messages.cpp | 2 +- clang/test/OpenMP/target_teams_map_codegen.cpp | 6188 +++- .../test/OpenMP/target_teams_num_teams_codegen.cpp | 6778 +++- .../OpenMP/target_teams_reduction_messages.cpp | 2 +- .../OpenMP/target_teams_thread_limit_codegen.cpp | 7051 +++- clang/test/OpenMP/task_codegen.cpp | 5180 ++- clang/test/OpenMP/task_if_codegen.cpp | 2799 +- clang/test/OpenMP/task_in_reduction_codegen.cpp | 1600 +- clang/test/OpenMP/task_in_reduction_message.cpp | 2 +- clang/test/OpenMP/taskgroup_codegen.cpp | 308 +- .../OpenMP/taskgroup_task_reduction_messages.cpp | 2 +- .../test/OpenMP/taskloop_in_reduction_codegen.cpp | 1615 +- .../test/OpenMP/taskloop_in_reduction_messages.cpp | 2 +- clang/test/OpenMP/taskloop_reduction_messages.cpp | 2 +- .../OpenMP/taskloop_simd_in_reduction_codegen.cpp | 1649 +- .../OpenMP/taskloop_simd_in_reduction_messages.cpp | 2 +- .../OpenMP/taskloop_simd_reduction_messages.cpp | 2 +- clang/test/OpenMP/teams_codegen.cpp | 4671 ++- clang/test/OpenMP/teams_distribute_codegen.cpp | 5198 ++- .../OpenMP/teams_distribute_collapse_codegen.cpp | 3088 +- .../teams_distribute_dist_schedule_codegen.cpp | 6082 +++- .../teams_distribute_firstprivate_codegen.cpp | 5356 ++- .../teams_distribute_lastprivate_codegen.cpp | 4862 ++- .../teams_distribute_parallel_for_codegen.cpp | 7382 ++++- ...ms_distribute_parallel_for_collapse_codegen.cpp | 4177 ++- ...eams_distribute_parallel_for_copyin_codegen.cpp | 2447 +- ...stribute_parallel_for_dist_schedule_codegen.cpp | 9373 +++++- ...istribute_parallel_for_firstprivate_codegen.cpp | 6735 +++- .../teams_distribute_parallel_for_if_codegen.cpp | 12141 ++++++- ...distribute_parallel_for_lastprivate_codegen.cpp | 6708 +++- ...distribute_parallel_for_num_threads_codegen.cpp | 5737 +++- ...ams_distribute_parallel_for_private_codegen.cpp | 5244 ++- ...s_distribute_parallel_for_proc_bind_codegen.cpp | 1112 +- ...s_distribute_parallel_for_reduction_codegen.cpp | 3342 +- ..._distribute_parallel_for_reduction_messages.cpp | 2 +- ...tribute_parallel_for_reduction_task_codegen.cpp | 2049 +- ...ms_distribute_parallel_for_schedule_codegen.cpp | 28441 +++++++++++++++- .../teams_distribute_parallel_for_simd_codegen.cpp | 9274 +++++- ...stribute_parallel_for_simd_collapse_codegen.cpp | 4821 ++- ...ute_parallel_for_simd_dist_schedule_codegen.cpp | 10805 ++++++- ...bute_parallel_for_simd_firstprivate_codegen.cpp | 6998 +++- ...ams_distribute_parallel_for_simd_if_codegen.cpp | 15052 ++++++++- ...ibute_parallel_for_simd_lastprivate_codegen.cpp | 7462 ++++- ...ibute_parallel_for_simd_num_threads_codegen.cpp | 6418 +++- ...istribute_parallel_for_simd_private_codegen.cpp | 5530 +++- ...tribute_parallel_for_simd_proc_bind_codegen.cpp | 1289 +- ...tribute_parallel_for_simd_reduction_codegen.cpp | 3680 ++- ...ribute_parallel_for_simd_reduction_messages.cpp | 2 +- ...stribute_parallel_for_simd_schedule_codegen.cpp | 31873 +++++++++++++++++- .../OpenMP/teams_distribute_private_codegen.cpp | 4202 ++- .../OpenMP/teams_distribute_reduction_codegen.cpp | 2059 +- .../OpenMP/teams_distribute_reduction_messages.cpp | 2 +- .../test/OpenMP/teams_distribute_simd_codegen.cpp | 10159 +++++- .../teams_distribute_simd_collapse_codegen.cpp | 3598 ++- ...teams_distribute_simd_dist_schedule_codegen.cpp | 7202 ++++- .../teams_distribute_simd_firstprivate_codegen.cpp | 5549 +++- .../teams_distribute_simd_lastprivate_codegen.cpp | 5532 +++- .../teams_distribute_simd_private_codegen.cpp | 4423 ++- .../teams_distribute_simd_reduction_codegen.cpp | 2300 +- .../teams_distribute_simd_reduction_messages.cpp | 2 +- clang/test/OpenMP/teams_firstprivate_codegen.cpp | 6609 +++- clang/test/OpenMP/teams_private_codegen.cpp | 4637 ++- clang/test/OpenMP/teams_reduction_messages.cpp | 2 +- clang/test/OpenMP/threadprivate_codegen.cpp | 7050 +++- clang/test/OpenMP/tile_codegen.cpp | 2933 +- clang/test/OpenMP/vla_crash.c | 187 +- clang/test/Sema/aix-attr-tls_model.c | 11 + clang/test/Sema/pointer-addition.c | 3 + clang/test/Sema/pointer-addition.cpp | 8 + clang/test/SemaOpenCL/access-qualifier.cl | 2 +- clang/test/SemaOpenCL/builtins-amdgcn-error-vi.cl | 3 +- clang/test/SemaOpenCL/cl20-device-side-enqueue.cl | 6 +- clang/test/SemaOpenCL/extensions.cl | 28 +- clang/test/SemaOpenCL/invalid-image.cl | 24 +- clang/test/SemaOpenCLCXX/invalid-kernel.clcpp | 36 +- .../test/SemaTemplate/partial-spec-instantiate.cpp | 22 + clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp | 13 + .../Inputs/generated-funcs-regex.c | 1 + .../Inputs/generated-funcs-regex.c.expected | 4 +- .../Inputs/generated-funcs.c.generated.expected | 18 +- .../Inputs/generated-funcs.c.no-generated.expected | 4 +- .../generated-funcs-regex.test | 2 +- clang/tools/amdgpu-arch/AMDGPUArch.cpp | 21 +- clang/tools/amdgpu-arch/CMakeLists.txt | 2 + clang/tools/clang-format/git-clang-format | 17 +- clang/tools/driver/cc1as_main.cpp | 22 +- .../ASTMatchers/ASTMatchersTraversalTest.cpp | 92 +- clang/unittests/Format/FormatTestCSharp.cpp | 48 + clang/utils/TableGen/RISCVVEmitter.cpp | 9 +- clang/www/get_started.html | 11 + compiler-rt/cmake/config-ix.cmake | 2 +- compiler-rt/lib/asan/asan_rtl.cpp | 18 +- compiler-rt/lib/asan/asan_stack.h | 9 - compiler-rt/lib/asan/scripts/asan_symbolize.py | 2 +- compiler-rt/lib/fuzzer/FuzzerUtilPosix.cpp | 11 +- compiler-rt/lib/gwp_asan/common.h | 2 + compiler-rt/lib/hwasan/hwasan.cpp | 11 +- compiler-rt/lib/hwasan/hwasan.h | 9 - compiler-rt/lib/hwasan/hwasan_thread.cpp | 4 + compiler-rt/lib/hwasan/hwasan_thread_list.h | 2 + compiler-rt/lib/memprof/memprof_rtl.cpp | 18 +- compiler-rt/lib/memprof/memprof_stack.h | 9 - compiler-rt/lib/msan/msan.cpp | 11 +- compiler-rt/lib/msan/msan.h | 9 - compiler-rt/lib/orc/CMakeLists.txt | 9 +- compiler-rt/lib/orc/extensible_rtti.cpp | 24 + compiler-rt/lib/orc/extensible_rtti.h | 145 + compiler-rt/lib/orc/placeholder.cpp | 1 - compiler-rt/lib/orc/unittests/CMakeLists.txt | 101 + .../lib/orc/unittests/extensible_rtti_test.cpp | 54 + .../lib/orc/unittests/orc_unit_test_main.cpp | 18 + .../lib/sanitizer_common/sanitizer_common.h | 8 +- .../sanitizer_common_interceptors.inc | 8 +- .../sanitizer_common/sanitizer_posix_libcdep.cpp | 2 +- .../lib/sanitizer_common/sanitizer_termination.cpp | 33 +- compiler-rt/lib/scudo/scudo_allocator.cpp | 17 +- compiler-rt/lib/scudo/scudo_termination.cpp | 2 +- .../lib/scudo/standalone/benchmarks/CMakeLists.txt | 12 + .../standalone/benchmarks/malloc_benchmark.cpp | 14 +- compiler-rt/lib/scudo/standalone/combined.h | 56 +- compiler-rt/lib/scudo/standalone/stats.h | 7 +- .../lib/scudo/standalone/tests/combined_test.cpp | 9 + .../lib/scudo/standalone/tests/primary_test.cpp | 9 + .../lib/scudo/standalone/tests/wrappers_c_test.cpp | 12 + .../scudo/standalone/tests/wrappers_cpp_test.cpp | 4 + compiler-rt/lib/scudo/standalone/tsd_shared.h | 10 +- compiler-rt/lib/tsan/rtl/tsan_rtl.cpp | 14 +- compiler-rt/lib/tsan/rtl/tsan_rtl.h | 3 - compiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp | 20 +- compiler-rt/test/dfsan/interceptors.c | 34 - compiler-rt/test/dfsan/mmap_at_init.c | 34 + compiler-rt/test/dfsan/release_shadow_space.c | 13 +- compiler-rt/test/fuzzer/StackOverflowTest.cpp | 26 + .../test/fuzzer/stack-overflow-with-asan.test | 3 + .../TestCases/Linux/create-thread-stress.cpp | 61 + .../test/lsan/TestCases/many_threads_detach.cpp | 29 +- compiler-rt/test/msan/check-handler.cpp | 2 +- compiler-rt/test/msan/setlocale.cpp | 13 - .../test/sanitizer_common/TestCases/setlocale.cpp | 13 + compiler-rt/test/scudo/standalone/CMakeLists.txt | 6 + .../standalone/unit/gwp_asan/lit.site.cfg.py.in | 24 + compiler-rt/test/tsan/Linux/fork_syscall.cpp | 15 +- compiler-rt/test/tsan/Linux/syscall.cpp | 37 + compiler-rt/test/tsan/Linux/syscall.h | 45 + compiler-rt/test/tsan/annotate_happens_before.cpp | 16 - compiler-rt/test/tsan/benign_race.cpp | 16 +- compiler-rt/test/tsan/ignore_sync.cpp | 6 +- compiler-rt/test/tsan/mutex_bad_read_lock.cpp | 2 +- compiler-rt/test/tsan/mutex_bad_read_unlock.cpp | 3 +- compiler-rt/test/tsan/mutex_bad_unlock.cpp | 2 +- compiler-rt/test/tsan/mutex_double_lock.cpp | 5 +- compiler-rt/test/tsan/mutexset5.cpp | 2 +- compiler-rt/test/tsan/signal_block2.cpp | 88 + compiler-rt/test/tsan/signal_sync2.cpp | 12 +- compiler-rt/test/tsan/test.h | 19 + compiler-rt/test/tsan/thread_end_with_ignore.cpp | 5 +- compiler-rt/test/tsan/thread_end_with_ignore2.cpp | 2 +- compiler-rt/test/tsan/thread_end_with_ignore3.cpp | 8 +- compiler-rt/test/tsan/thread_name.cpp | 2 - flang/CMakeLists.txt | 10 +- flang/README.md | 35 +- flang/include/flang/Evaluate/constant.h | 1 + flang/include/flang/Evaluate/shape.h | 6 + flang/include/flang/ISO_Fortran_binding.h | 2 +- flang/include/flang/Parser/message.h | 3 +- flang/lib/Frontend/CompilerInvocation.cpp | 10 +- flang/lib/Lower/IO.cpp | 32 +- flang/lib/Lower/RTBuilder.h | 3 +- flang/lib/Parser/message.cpp | 26 + flang/lib/Semantics/check-directive-structure.h | 7 + flang/lib/Semantics/check-omp-structure.cpp | 89 +- flang/lib/Semantics/check-omp-structure.h | 1 + flang/runtime/CMakeLists.txt | 1 + flang/runtime/character.cpp | 2 +- flang/runtime/connection.cpp | 4 + flang/runtime/connection.h | 3 +- flang/runtime/descriptor-io.h | 4 + flang/runtime/descriptor.cpp | 19 + flang/runtime/descriptor.h | 8 +- flang/runtime/edit-input.cpp | 94 +- flang/runtime/edit-output.cpp | 42 +- flang/runtime/extrema.cpp | 115 +- flang/runtime/format.h | 3 +- flang/runtime/io-api.cpp | 47 +- flang/runtime/io-api.h | 29 +- flang/runtime/io-error.cpp | 2 + flang/runtime/io-stmt.cpp | 77 +- flang/runtime/io-stmt.h | 25 +- flang/runtime/namelist.cpp | 309 + flang/runtime/namelist.h | 37 + flang/runtime/reduction.cpp | 2 +- flang/runtime/reduction.h | 16 + flang/runtime/terminator.cpp | 1 + flang/runtime/unit.cpp | 80 +- flang/runtime/unit.h | 4 +- flang/test/Driver/fixed-line-length.f90 | 4 +- flang/test/Driver/help-f18.f90 | 10 +- flang/test/Semantics/allocate02.f90 | 1 - flang/test/Semantics/array-constr-big.f90 | 28 + flang/test/Semantics/io06.f90 | 1 - flang/test/Semantics/omp-atomic.f90 | 2 - flang/test/Semantics/omp-clause-validity01.f90 | 1 - flang/test/Semantics/omp-do05.f90 | 6 +- flang/test/Semantics/omp-flush01.f90 | 3 - flang/test/Semantics/omp-nested-simd.f90 | 214 + flang/test/Semantics/omp-ordered-simd.f90 | 1 + flang/test/Semantics/resolve70.f90 | 1 - flang/test/lit.cfg.py | 8 +- flang/unittests/RuntimeGTest/CMakeLists.txt | 1 + flang/unittests/RuntimeGTest/CharacterTest.cpp | 111 +- flang/unittests/RuntimeGTest/Namelist.cpp | 164 + .../unittests/RuntimeGTest/NumericalFormatTest.cpp | 74 +- flang/unittests/RuntimeGTest/Reduction.cpp | 16 +- flang/unittests/RuntimeGTest/tools.h | 3 +- libc/CMakeLists.txt | 10 +- libc/cmake/modules/LLVMLibCArchitectures.cmake | 22 + libc/cmake/modules/LLVMLibCCheckCpuFeatures.cmake | 108 +- libc/cmake/modules/LLVMLibCLibraryRules.cmake | 21 +- libc/cmake/modules/LLVMLibCObjectRules.cmake | 20 +- libc/cmake/modules/LLVMLibCTestRules.cmake | 4 + libc/config/linux/CMakeLists.txt | 4 +- libc/loader/linux/CMakeLists.txt | 8 +- libc/src/math/CMakeLists.txt | 8 +- libc/src/string/CMakeLists.txt | 72 +- libc/src/string/aarch64/CMakeLists.txt | 1 - libc/src/string/x86/CMakeLists.txt | 14 - libc/src/string/{x86 => x86_64}/memcpy.cpp | 0 libc/src/threads/linux/CMakeLists.txt | 4 +- libc/test/config/linux/CMakeLists.txt | 4 +- libc/test/loader/linux/CMakeLists.txt | 4 +- libc/test/src/math/CMakeLists.txt | 2 +- libc/test/src/string/CMakeLists.txt | 2 + libc/test/utils/FPUtil/CMakeLists.txt | 2 +- libc/utils/FPUtil/CMakeLists.txt | 6 +- libcxx/docs/DesignDocs/DebugMode.rst | 6 + libcxx/docs/FormatIssuePaperStatus.csv | 6 +- libcxx/docs/FormatProposalStatus.csv | 6 +- libcxx/docs/TestingLibcxx.rst | 2 +- libcxx/include/CMakeLists.txt | 2 +- libcxx/include/__functional_base | 4 +- libcxx/include/__memory/allocator_traits.h | 2 +- libcxx/include/__memory/construct_at.h | 2 +- libcxx/include/__memory/pointer_traits.h | 70 +- libcxx/include/__memory/raw_storage_iterator.h | 6 +- libcxx/include/__memory/shared_ptr.h | 10 +- libcxx/include/__ranges/empty.h | 83 + libcxx/include/__sso_allocator | 77 - libcxx/include/algorithm | 31 +- libcxx/include/chrono | 16 +- libcxx/include/compare | 549 +- libcxx/include/concepts | 8 +- libcxx/include/experimental/functional | 38 +- libcxx/include/experimental/propagate_const | 2 +- libcxx/include/experimental/type_traits | 2 +- libcxx/include/format | 6 +- libcxx/include/functional | 12 +- libcxx/include/iomanip | 2 +- libcxx/include/istream | 2 +- libcxx/include/iterator | 6 +- libcxx/include/memory | 4 +- libcxx/include/module.modulemap | 1 - libcxx/include/optional | 72 +- libcxx/include/ostream | 2 +- libcxx/include/random | 7 +- libcxx/include/ranges | 1 + libcxx/include/scoped_allocator | 2 +- libcxx/include/set | 16 +- libcxx/include/string | 14 +- libcxx/include/type_traits | 74 +- libcxx/include/variant | 6 +- libcxx/src/CMakeLists.txt | 1 + libcxx/src/include/config_elast.h | 2 + libcxx/src/include/sso_allocator.h | 77 + libcxx/src/locale.cpp | 4 +- libcxx/test/configs/legacy.cfg.in | 3 +- libcxx/test/configs/libcxx-trunk-shared.cfg.in | 2 +- libcxx/test/configs/libcxx-trunk-static.cfg.in | 2 +- .../sequences/list/list.cons/db_move.pass.cpp | 35 - .../containers/sequences/vector/db_cindex.pass.cpp | 15 +- .../sequences/vector/db_cindex_2.pass.cpp | 33 + .../containers/unord/unord.map/db_move.pass.cpp | 35 - .../unord/unord.multimap/db_move.pass.cpp | 36 - .../unord/unord.multiset/db_move.pass.cpp | 36 - .../containers/unord/unord.set/db_move.pass.cpp | 35 - .../db_deallocate.pass.cpp | 2 + .../language.support/cxa_deleted_virtual.pass.cpp | 12 +- .../aligned_alloc_availability.verify.cpp | 10 +- .../support.dynamic/libcpp_deallocate.sh.cpp | 8 +- .../new_faligned_allocation.pass.cpp | 8 +- .../aligned_allocation_macro.compile.pass.cpp | 10 +- .../substitutes-in-compile-flags.sh.cpp | 8 +- libcxx/test/libcxx/selftest/dsl/dsl.sh.py | 4 + .../string.modifiers/clear_and_shrink.pass.cpp | 39 + .../string.modifiers/clear_and_shrink_db1.pass.cpp | 42 - .../string.modifiers/erase_iter_db1.pass.cpp | 14 +- .../string.modifiers/erase_iter_db2.pass.cpp | 15 +- .../string.modifiers/erase_iter_db3.pass.cpp | 32 + .../string.modifiers/erase_iter_db4.pass.cpp | 33 + .../string.modifiers/erase_iter_iter_db1.pass.cpp | 14 +- .../string.modifiers/erase_iter_iter_db2.pass.cpp | 14 +- .../string.modifiers/erase_iter_iter_db3.pass.cpp | 14 +- .../string.modifiers/erase_iter_iter_db4.pass.cpp | 13 +- .../string.modifiers/erase_iter_iter_db5.pass.cpp | 32 + .../string.modifiers/erase_iter_iter_db6.pass.cpp | 32 + .../string.modifiers/erase_iter_iter_db7.pass.cpp | 32 + .../string.modifiers/erase_iter_iter_db8.pass.cpp | 31 + .../libcxx/thread/atomic.availability.verify.cpp | 15 +- .../libcxx/thread/barrier.availability.verify.cpp | 15 +- .../libcxx/thread/latch.availability.verify.cpp | 15 +- .../thread/semaphore.availability.verify.cpp | 15 +- ...202_notify_from_pthread_created_thread.pass.cpp | 8 +- .../thread.thread.this/sleep_for.pass.cpp | 6 +- .../thread.thread.this/sleep_for.signals.pass.cpp | 6 +- .../charconv.to.chars/availability.fail.cpp | 12 +- .../memory/pointer.conversion/to_address.pass.cpp | 149 + .../to_address_std_iterators.pass.cpp | 56 + .../alg.merge/inplace_merge_comp.pass.cpp | 4 +- .../atomic_wait.pass.cpp | 16 +- .../sequences/list/list.cons/assign_move.pass.cpp | 6 + .../sequences/list/list.cons/move.pass.cpp | 6 + .../sequences/list/list.special/swap.pass.cpp | 86 +- .../unord.map/unord.map.cnstr/assign_move.pass.cpp | 6 + .../unord/unord.map/unord.map.cnstr/move.pass.cpp | 8 + .../insert_hint_const_lvalue.pass.cpp | 2 +- .../insert_hint_rvalue.pass.cpp | 10 +- .../unord.map.swap/swap_non_member.pass.cpp | 8 + .../unord.multimap.cnstr/assign_move.pass.cpp | 6 + .../unord.multimap.cnstr/move.pass.cpp | 4 + .../insert_hint_const_lvalue.pass.cpp | 2 +- .../unord.multimap.swap/swap_non_member.pass.cpp | 8 + .../insert_hint_const_lvalue.pass.cpp | 2 +- .../unord.multiset.cnstr/assign_move.pass.cpp | 8 + .../unord.multiset.cnstr/move.pass.cpp | 4 + .../unord.multiset.swap/swap_non_member.pass.cpp | 8 + .../unord.set/insert_hint_const_lvalue.pass.cpp | 8 +- .../unord/unord.set/insert_hint_rvalue.pass.cpp | 12 +- .../unord.set/unord.set.cnstr/assign_move.pass.cpp | 6 + .../unord/unord.set/unord.set.cnstr/move.pass.cpp | 4 + .../unord.set.swap/swap_non_member.pass.cpp | 8 + .../generic_category.pass.cpp | 8 +- .../syserr.errcat.objects/system_category.pass.cpp | 8 +- .../fstreams/filebuf.members/open_path.pass.cpp | 12 +- .../fstreams/fstream.cons/path.pass.cpp | 12 +- .../fstreams/fstream.members/open_path.pass.cpp | 12 +- .../fstreams/ifstream.cons/path.pass.cpp | 12 +- .../fstreams/ifstream.members/open_path.pass.cpp | 12 +- .../fstreams/ofstream.cons/path.pass.cpp | 12 +- .../fstreams/ofstream.members/open_path.pass.cpp | 12 +- .../directory_entry.mods/refresh.pass.cpp | 2 +- .../directory_entry.obs/file_size.pass.cpp | 2 +- .../directory_entry.obs/hard_link_count.pass.cpp | 2 +- .../directory_entry.obs/last_write_time.pass.cpp | 2 +- .../path.nonmember/path.factory.pass.cpp | 6 +- .../fs.op.funcs/fs.op.copy_file/copy_file.pass.cpp | 6 +- .../create_directories.pass.cpp | 2 +- .../create_directory.pass.cpp | 2 +- .../create_directory_with_attributes.pass.cpp | 2 +- .../fs.op.funcs/fs.op.file_size/file_size.pass.cpp | 2 +- .../fs.op.last_write_time/last_write_time.pass.cpp | 2 +- .../fs.op.permissions/permissions.pass.cpp | 11 +- .../std/input.output/filesystems/lit.local.cfg | 5 +- .../istream.formatted.arithmetic/bool.pass.cpp | 12 +- .../istream.formatted.arithmetic/double.pass.cpp | 12 +- .../istream.formatted.arithmetic/float.pass.cpp | 12 +- .../istream.formatted.arithmetic/int.pass.cpp | 12 +- .../istream.formatted.arithmetic/long.pass.cpp | 12 +- .../long_double.pass.cpp | 12 +- .../long_long.pass.cpp | 12 +- .../istream.formatted.arithmetic/pointer.pass.cpp | 12 +- .../istream.formatted.arithmetic/short.pass.cpp | 12 +- .../unsigned_int.pass.cpp | 12 +- .../unsigned_long.pass.cpp | 12 +- .../unsigned_long_long.pass.cpp | 12 +- .../unsigned_short.pass.cpp | 12 +- .../istream_extractors/streambuf.pass.cpp | 12 +- .../input.streams/istream.unformatted/get.pass.cpp | 12 +- .../istream.unformatted/get_chart.pass.cpp | 12 +- .../istream.unformatted/get_pointer_size.pass.cpp | 12 +- .../get_pointer_size_chart.pass.cpp | 12 +- .../istream.unformatted/get_streambuf.pass.cpp | 12 +- .../get_streambuf_chart.pass.cpp | 12 +- .../getline_pointer_size.pass.cpp | 12 +- .../getline_pointer_size_chart.pass.cpp | 12 +- .../istream.unformatted/ignore.pass.cpp | 12 +- .../istream.unformatted/peek.pass.cpp | 12 +- .../istream.unformatted/read.pass.cpp | 12 +- .../istream.unformatted/seekg_off.pass.cpp | 6 +- .../minmax_showbase.pass.cpp | 6 +- .../ostream.inserters.arithmetic/minus1.pass.cpp | 2 +- .../ios.types/ios_Init/ios_Init.multiple.pass.cpp | 12 +- .../robust_against_adl.pass.cpp | 2 - .../cmp/cmp.categories.pre/zero_type.verify.cpp | 1 + .../cmp.common/common_comparison_category.pass.cpp | 39 +- .../cmp/cmp.partialord/partialord.pass.cpp | 22 +- .../cmp/cmp.strongeq/cmp.strongeq.pass.cpp | 97 - .../cmp/cmp.strongord/strongord.pass.cpp | 39 +- .../cmp/cmp.weakeq/cmp.weakeq.pass.cpp | 71 - .../cmp/cmp.weakord/weakord.pass.cpp | 17 +- .../delete_align_val_t_replace.pass.cpp | 10 +- .../new.delete.array/new_align_val_t.pass.cpp | 10 +- .../new_align_val_t_nothrow.pass.cpp | 10 +- .../new_align_val_t_nothrow_replace.pass.cpp | 10 +- .../sized_delete_array_fsizeddeallocation.pass.cpp | 6 +- .../delete_align_val_t_replace.pass.cpp | 10 +- .../new.delete.single/new_align_val_t.pass.cpp | 10 +- .../new_align_val_t_nothrow.pass.cpp | 10 +- .../new_align_val_t_nothrow_replace.pass.cpp | 10 +- .../sized_delete_fsizeddeallocation.pass.cpp | 6 +- .../uncaught/uncaught_exceptions.pass.cpp | 10 +- .../ctor_char16_t_char8_t.pass.cpp | 14 +- .../ctor_char32_t_char8_t.pass.cpp | 14 +- .../locale.codecvt/ctor_char16_t_char8_t.pass.cpp | 14 +- .../locale.codecvt/ctor_char32_t_char8_t.pass.cpp | 14 +- .../char16_t_char8_t_always_noconv.pass.cpp | 14 +- .../char16_t_char8_t_encoding.pass.cpp | 14 +- .../char16_t_char8_t_in.pass.cpp | 14 +- .../char16_t_char8_t_length.pass.cpp | 14 +- .../char16_t_char8_t_max_length.pass.cpp | 14 +- .../char16_t_char8_t_out.pass.cpp | 14 +- .../char16_t_char8_t_unshift.pass.cpp | 14 +- .../char32_t_char8_t_always_noconv.pass.cpp | 14 +- .../char32_t_char8_t_encoding.pass.cpp | 14 +- .../char32_t_char8_t_in.pass.cpp | 14 +- .../char32_t_char8_t_length.pass.cpp | 14 +- .../char32_t_char8_t_max_length.pass.cpp | 14 +- .../char32_t_char8_t_out.pass.cpp | 14 +- .../char32_t_char8_t_unshift.pass.cpp | 14 +- .../utf_sanity_check.pass.cpp | 14 +- .../locale.codecvt/types_char16_t_char8_t.pass.cpp | 14 +- .../locale.codecvt/types_char32_t_char8_t.pass.cpp | 14 +- .../facet.num.get.members/get_long.pass.cpp | 12 +- .../locales/locale/locale.cons/assign.pass.cpp | 14 +- .../locale/locale.cons/char_pointer.pass.cpp | 14 +- .../locales/locale/locale.cons/copy.pass.cpp | 14 +- .../locales/locale/locale.cons/default.pass.cpp | 14 +- .../locale.cons/locale_char_pointer_cat.pass.cpp | 14 +- .../locale/locale.cons/locale_facetptr.pass.cpp | 14 +- .../locale/locale.cons/locale_locale_cat.pass.cpp | 14 +- .../locale/locale.cons/locale_string_cat.pass.cpp | 14 +- .../locales/locale/locale.cons/string.pass.cpp | 14 +- .../locales/locale/locale.members/combine.pass.cpp | 14 +- .../locales/locale/locale.statics/classic.pass.cpp | 14 +- .../locales/locale/locale.statics/global.pass.cpp | 14 +- .../std/numerics/rand/rand.device/ctor.pass.cpp | 6 +- .../std/numerics/rand/rand.device/eval.pass.cpp | 6 +- .../rand/rand.eng/rand.eng.lcong/params.fail.cpp | 2 +- .../incomplete.compile.verify.cpp | 1 + .../incomplete.compile.verify.cpp | 1 + .../incomplete.compile.verify.cpp | 1 + .../range.access.end/incomplete.compile.verify.cpp | 1 + .../range.prim/empty.incomplete.verify.cpp | 53 + .../ranges/range.access/range.prim/empty.pass.cpp | 163 + .../string.capacity/over_max_size.pass.cpp | 6 +- .../string.capacity/reserve_size.pass.cpp | 14 +- .../string_assign/iterator.pass.cpp | 2 - .../futures.async/async_race.38682.pass.cpp | 12 +- .../futures/futures.future_error/what.pass.cpp | 6 +- .../futures.task.members/ctor_func_alloc.pass.cpp | 4 +- .../uses_allocator.compile.pass.cpp | 26 + .../uses_allocator.pass.cpp | 36 - .../test/std/thread/thread.barrier/arrive.pass.cpp | 16 +- .../thread/thread.barrier/arrive_and_drop.pass.cpp | 16 +- .../thread/thread.barrier/arrive_and_wait.pass.cpp | 16 +- .../std/thread/thread.barrier/completion.pass.cpp | 16 +- .../thread/thread.latch/arrive_and_wait.pass.cpp | 16 +- .../std/thread/thread.latch/count_down.pass.cpp | 16 +- .../test/std/thread/thread.latch/try_wait.pass.cpp | 16 +- .../thread.lock.shared.cons/default.pass.cpp | 6 +- .../thread.lock.shared.cons/move_assign.pass.cpp | 6 +- .../thread.lock.shared.cons/move_ctor.pass.cpp | 6 +- .../thread.lock.shared.cons/mutex.pass.cpp | 6 +- .../mutex_adopt_lock.pass.cpp | 6 +- .../mutex_defer_lock.pass.cpp | 6 +- .../mutex_duration.pass.cpp | 6 +- .../mutex_time_point.pass.cpp | 6 +- .../mutex_try_to_lock.pass.cpp | 6 +- .../thread.lock.shared.locking/lock.pass.cpp | 6 +- .../thread.lock.shared.obs/mutex.pass.cpp | 6 +- .../thread.lock.shared.obs/op_bool.pass.cpp | 6 +- .../thread.lock.shared.obs/owns_lock.pass.cpp | 6 +- .../thread.shared_mutex.class/assign.fail.cpp | 6 +- .../thread.shared_mutex.class/copy.fail.cpp | 6 +- .../thread.shared_mutex.class/default.pass.cpp | 6 +- .../thread.shared_mutex.class/lock.pass.cpp | 6 +- .../thread.shared_mutex.class/lock_shared.pass.cpp | 6 +- .../thread.shared_mutex.class/try_lock.pass.cpp | 6 +- .../try_lock_shared.pass.cpp | 6 +- .../assign.compile.fail.cpp | 6 +- .../copy.compile.fail.cpp | 6 +- .../thread.sharedtimedmutex.class/default.pass.cpp | 6 +- .../thread.sharedtimedmutex.class/lock.pass.cpp | 6 +- .../lock_shared.pass.cpp | 6 +- .../try_lock.pass.cpp | 6 +- .../try_lock_for.pass.cpp | 6 +- .../try_lock_shared.pass.cpp | 6 +- .../try_lock_shared_for.pass.cpp | 6 +- .../try_lock_shared_until.pass.cpp | 6 +- .../try_lock_until.pass.cpp | 6 +- .../try_lock_until_deadlock_bug.pass.cpp | 6 +- .../std/thread/thread.semaphore/acquire.pass.cpp | 16 +- .../std/thread/thread.semaphore/binary.pass.cpp | 16 +- .../std/thread/thread.semaphore/release.pass.cpp | 16 +- .../std/thread/thread.semaphore/timed.pass.cpp | 16 +- .../thread/thread.semaphore/try_acquire.pass.cpp | 16 +- .../any/any.class/any.assign/copy.pass.cpp | 8 +- .../any/any.class/any.assign/move.pass.cpp | 8 +- .../any/any.class/any.assign/value.pass.cpp | 8 +- .../utilities/any/any.class/any.cons/copy.pass.cpp | 8 +- .../any/any.class/any.cons/in_place_type.pass.cpp | 8 +- .../utilities/any/any.class/any.cons/move.pass.cpp | 8 +- .../any/any.class/any.cons/value.pass.cpp | 8 +- .../any/any.class/any.modifiers/emplace.pass.cpp | 8 +- .../any/any.class/any.modifiers/reset.pass.cpp | 8 +- .../any/any.class/any.modifiers/swap.pass.cpp | 8 +- .../any.cast/any_cast_pointer.pass.cpp | 8 +- .../any.cast/any_cast_reference.pass.cpp | 8 +- ...ny_cast_request_invalid_value_category.fail.cpp | 8 +- .../any.cast/const_correctness.fail.cpp | 8 +- .../any.cast/not_copy_constructible.fail.cpp | 8 +- .../utilities/any/any.nonmembers/make_any.pass.cpp | 8 +- .../std/utilities/any/any.nonmembers/swap.pass.cpp | 8 +- .../integral.roundtrip.pass.cpp | 12 +- .../charconv/charconv.to.chars/integral.pass.cpp | 12 +- .../format/format.error/format.error.pass.cpp | 14 +- .../format.parse.ctx/check_arg_id.pass.cpp | 14 +- .../format.parse.ctx/next_arg_id.pass.cpp | 14 +- .../memory/pointer.conversion/to_address.pass.cpp | 187 +- .../to_address_std_iterators.pass.cpp | 58 + .../memory/storage.iterator/deprecated.verify.cpp | 16 + .../raw_storage_iterator.base.pass.cpp | 4 + .../storage.iterator/raw_storage_iterator.pass.cpp | 4 + .../memory/temporary.buffer/overaligned.pass.cpp | 8 +- .../optional.bad_optional_access/default.pass.cpp | 8 +- .../optional.bad_optional_access/derive.pass.cpp | 8 +- .../optional.object.ctor/U.pass.cpp | 8 +- .../optional.object.ctor/const_T.pass.cpp | 8 +- .../optional.object.ctor/move.pass.cpp | 8 +- .../optional.object.ctor/rvalue_T.pass.cpp | 8 +- .../optional.object.observe/value.pass.cpp | 8 +- .../optional.object.observe/value_const.pass.cpp | 8 +- .../value_const_rvalue.pass.cpp | 8 +- .../optional.object.observe/value_rvalue.pass.cpp | 8 +- .../optional.specalg/make_optional.pass.cpp | 8 +- .../time/time.clock/time.clock.file/now.pass.cpp | 12 +- .../bad_variant_access.pass.cpp | 8 +- .../variant/variant.get/get_index.pass.cpp | 8 +- .../variant/variant.get/get_type.pass.cpp | 8 +- .../variant.variant/variant.assign/T.pass.cpp | 8 +- .../variant.variant/variant.assign/copy.pass.cpp | 8 +- .../variant.variant/variant.assign/move.pass.cpp | 8 +- .../variant.variant/variant.ctor/T.pass.cpp | 8 +- .../variant.variant/variant.ctor/copy.pass.cpp | 8 +- .../variant.variant/variant.ctor/default.pass.cpp | 8 +- .../variant.ctor/in_place_index_args.pass.cpp | 8 +- .../in_place_index_init_list_args.pass.cpp | 8 +- .../variant.ctor/in_place_type_args.pass.cpp | 8 +- .../in_place_type_init_list_args.pass.cpp | 8 +- .../variant.variant/variant.ctor/move.pass.cpp | 8 +- .../variant.mod/emplace_index_args.pass.cpp | 8 +- .../emplace_index_init_list_args.pass.cpp | 8 +- .../variant.mod/emplace_type_args.pass.cpp | 8 +- .../emplace_type_init_list_args.pass.cpp | 8 +- .../variant.variant/variant.swap/swap.pass.cpp | 8 +- .../variant.visit/robust_against_adl.pass.cpp | 8 +- .../utilities/variant/variant.visit/visit.pass.cpp | 8 +- .../variant.visit/visit_return_type.pass.cpp | 8 +- libcxx/test/support/filesystem_test_helper.h | 17 + libcxx/utils/ci/buildkite-pipeline.yml | 40 +- libcxx/utils/ci/run-buildbot | 89 +- libcxx/utils/libcxx/test/config.py | 56 +- libcxx/utils/libcxx/test/dsl.py | 69 +- libcxx/utils/libcxx/test/features.py | 47 - libcxx/utils/libcxx/test/params.py | 62 +- libcxxabi/test/catch_function_01.pass.cpp | 4 +- .../test/catch_member_data_pointer_01.pass.cpp | 4 +- .../test/catch_member_pointer_nullptr.pass.cpp | 8 +- libcxxabi/test/catch_multi_level_pointer.pass.cpp | 4 +- libcxxabi/test/catch_pointer_nullptr.pass.cpp | 8 +- libcxxabi/test/catch_ptr_02.pass.cpp | 2 +- .../test/cxa_vec_new_overflow_PR41395.pass.cpp | 12 +- libcxxabi/test/dynamic_cast.pass.cpp | 12 +- libcxxabi/test/exception_object_alignment.pass.cpp | 10 +- libcxxabi/test/forced_unwind1.pass.cpp | 14 +- libcxxabi/test/forced_unwind2.pass.cpp | 14 +- libcxxabi/test/incomplete_type.sh.cpp | 8 +- libcxxabi/test/libcxxabi/test/config.py | 9 +- libcxxabi/test/lit.site.cfg.in | 3 +- libcxxabi/test/native/arm-linux-eabi/lit.local.cfg | 2 +- .../test/test_aux_runtime_op_array_new.pass.cpp | 12 +- libcxxabi/test/test_demangle.pass.cpp | 14 +- .../test/test_exception_address_alignment.pass.cpp | 8 +- libcxxabi/test/uncaught_exceptions.pass.cpp | 12 +- libunwind/src/UnwindRegistersRestore.S | 252 +- libunwind/src/UnwindRegistersSave.S | 284 +- libunwind/src/assembly.h | 4 + libunwind/test/lit.site.cfg.in | 3 +- lld/CMakeLists.txt | 1 + lld/COFF/DLL.cpp | 2 + lld/COFF/Driver.cpp | 4 + lld/ELF/InputFiles.cpp | 3 + lld/ELF/InputFiles.h | 7 +- lld/ELF/Options.td | 2 +- lld/ELF/Thunks.cpp | 14 + lld/ELF/Writer.cpp | 27 +- lld/MachO/Arch/ARM.cpp | 79 +- lld/MachO/Config.h | 13 +- lld/MachO/Driver.cpp | 125 +- lld/MachO/Driver.h | 11 + lld/MachO/DriverUtils.cpp | 48 +- lld/MachO/InputFiles.cpp | 89 +- lld/MachO/InputFiles.h | 34 +- lld/MachO/InputSection.cpp | 10 +- lld/MachO/InputSection.h | 17 +- lld/MachO/MapFile.cpp | 11 +- lld/MachO/Options.td | 1 - lld/MachO/OutputSegment.cpp | 4 + lld/MachO/SymbolTable.cpp | 30 +- lld/MachO/SymbolTable.h | 2 +- lld/MachO/Symbols.h | 5 +- lld/MachO/Target.h | 2 +- lld/MachO/UnwindInfoSection.cpp | 26 +- lld/MachO/Writer.cpp | 13 +- lld/docs/ld.lld.1 | 2 + lld/test/CMakeLists.txt | 4 +- lld/test/COFF/lto-new-pass-manager.ll | 6 +- lld/test/COFF/stack-drectve.s | 16 + lld/test/ELF/allow-shlib-undefined.s | 13 + lld/test/ELF/arm-ldrlit-err.s | 4 + lld/test/ELF/lto/new-pass-manager.ll | 5 +- lld/test/ELF/ppc64-pcrel-cross-link.s | 140 + .../MachO/Inputs/MacOSX.sdk/usr/lib/libSystem.tbd | 80 +- lld/test/MachO/U-dynamic-lookup.s | 3 +- lld/test/MachO/adhoc-codesign.s | 3 +- lld/test/MachO/arm-branch-relocs.s | 33 + lld/test/MachO/bundle-loader.s | 14 +- lld/test/MachO/common-symbol-coalescing.s | 2 +- lld/test/MachO/dependency-info.s | 4 +- lld/test/MachO/dylib-stub.yaml | 2 +- lld/test/MachO/entry-symbol.s | 29 +- lld/test/MachO/export-options.s | 108 +- lld/test/MachO/flat-namespace.s | 3 +- lld/test/MachO/indirect-symtab.s | 2 +- lld/test/MachO/invalid/abs-duplicate.s | 2 +- .../MachO/invalid/bad-got-to-dylib-tlv-reference.s | 2 +- lld/test/MachO/invalid/incompatible-arch.s | 15 + lld/test/MachO/invalid/range-check.s | 2 +- lld/test/MachO/invalid/undefined-symbol.s | 3 +- lld/test/MachO/lc-linker-option.ll | 63 +- lld/test/MachO/local-got.s | 1 + lld/test/MachO/nonweak-definition-override.s | 2 +- lld/test/MachO/order-file.s | 2 +- lld/test/MachO/private-extern.s | 2 +- lld/test/MachO/reroot-path.s | 39 +- lld/test/MachO/sectalign.s | 42 + lld/test/MachO/sub-library.s | 2 +- lld/test/MachO/t.s | 3 +- lld/test/MachO/thin-archive.s | 2 +- lld/test/MachO/tlv-dylib.s | 2 +- lld/test/MachO/tlv.s | 1 + lld/test/MachO/u.s | 20 +- lld/test/MachO/weak-binding.s | 9 +- lld/test/MachO/weak-definition-gc.s | 197 + lld/test/MachO/weak-header-flags.s | 2 +- lld/test/MachO/weak-import.s | 2 +- lld/test/MachO/why-load.s | 3 +- lld/test/MachO/x86-64-stubs.s | 1 + lld/test/MachO/zippered.yaml | 64 + lld/test/wasm/lto/new-pass-manager.ll | 5 +- lld/test/wasm/merge-string.s | 76 + lld/test/wasm/reloc-addend.ll | 19 - lld/test/wasm/reloc-addend.s | 42 + lld/test/wasm/tls-export.s | 26 + lld/wasm/CMakeLists.txt | 1 + lld/wasm/Driver.cpp | 18 +- lld/wasm/InputChunks.cpp | 178 +- lld/wasm/InputChunks.h | 144 +- lld/wasm/InputFiles.cpp | 99 +- lld/wasm/InputFiles.h | 1 - lld/wasm/OutputSegment.cpp | 88 + lld/wasm/OutputSegment.h | 14 +- lld/wasm/Relocations.cpp | 2 +- lld/wasm/Symbols.cpp | 28 +- lld/wasm/Symbols.h | 3 +- lld/wasm/SyntheticSections.cpp | 2 +- lld/wasm/Writer.cpp | 21 +- lldb/CMakeLists.txt | 21 +- .../lldb/DataFormatters/DumpValueObjectOptions.h | 2 - lldb/include/lldb/Host/Editline.h | 4 +- lldb/include/lldb/Host/windows/editlinewin.h | 115 - lldb/include/lldb/Symbol/UnwindPlan.h | 2 - lldb/include/lldb/Target/Process.h | 1 + lldb/include/lldb/Utility/Timeout.h | 1 - lldb/source/API/SBStructuredData.cpp | 25 +- lldb/source/Host/CMakeLists.txt | 1 - lldb/source/Host/windows/EditLineWin.cpp | 349 - .../Disassembler/LLVMC/DisassemblerLLVMC.cpp | 5 +- .../Instruction/MIPS/EmulateInstructionMIPS.cpp | 5 +- .../MIPS64/EmulateInstructionMIPS64.cpp | 5 +- .../Plugins/Language/CPlusPlus/LibCxxList.cpp | 8 +- .../Plugins/Language/CPlusPlus/LibCxxMap.cpp | 7 +- .../gdb-server/PlatformRemoteGDBServer.cpp | 4 +- .../Plugins/Process/elf-core/ProcessElfCore.cpp | 35 +- .../Plugins/Process/elf-core/RegisterUtilities.h | 3 + .../Process/gdb-remote/GDBRemoteClientBase.cpp | 81 +- .../Process/gdb-remote/GDBRemoteClientBase.h | 40 +- .../gdb-remote/GDBRemoteCommunicationClient.cpp | 251 +- .../gdb-remote/GDBRemoteCommunicationClient.h | 21 +- .../gdb-remote/GDBRemoteRegisterContext.cpp | 6 +- .../Process/gdb-remote/ProcessGDBRemote.cpp | 87 +- .../source/Plugins/SymbolFile/PDB/PDBASTParser.cpp | 36 +- .../Plugins/TypeSystem/Clang/TypeSystemClang.cpp | 8 +- lldb/source/Symbol/Type.cpp | 3 +- lldb/source/Target/Process.cpp | 22 +- lldb/source/Target/Target.cpp | 36 +- lldb/source/Target/TargetProperties.td | 3 + .../lang/cpp/class_static/TestStaticVariables.py | 4 +- .../Shell/Register/Core/x86-32-freebsd-addr.test | 5 +- .../Shell/Register/Core/x86-32-freebsd-fp.test | 3 + lldb/unittests/API/CMakeLists.txt | 1 + lldb/unittests/API/SBStructuredDataTest.cpp | 35 + .../Process/gdb-remote/GDBRemoteClientBaseTest.cpp | 48 +- .../GDBRemoteCommunicationClientTest.cpp | 3 +- lldb/unittests/Symbol/TestTypeSystemClang.cpp | 12 + .../tools/lldb-server/tests/TestClient.cpp | 2 +- llvm/CMakeLists.txt | 14 +- llvm/cmake/modules/HandleLLVMOptions.cmake | 3 + llvm/docs/AMDGPUUsage.rst | 2 +- llvm/docs/CommandGuide/llvm-symbolizer.rst | 64 +- llvm/docs/GettingStarted.rst | 16 +- llvm/docs/GlobalISel/IRTranslator.rst | 4 +- llvm/docs/LangRef.rst | 4 +- llvm/docs/ReleaseNotes.rst | 8 +- llvm/examples/SpeculativeJIT/SpeculativeJIT.cpp | 12 +- llvm/include/llvm-c/Orc.h | 31 + .../include/llvm/Analysis/BlockFrequencyInfoImpl.h | 3 +- llvm/include/llvm/Analysis/CGSCCPassManager.h | 12 + llvm/include/llvm/Analysis/LoopNestAnalysis.h | 8 +- .../llvm/Analysis/MemoryDependenceAnalysis.h | 3 - llvm/include/llvm/Analysis/TargetLibraryInfo.h | 11 +- llvm/include/llvm/Analysis/VecFuncs.def | 54 + llvm/include/llvm/Analysis/VectorUtils.h | 4 - llvm/include/llvm/BinaryFormat/Wasm.h | 6 +- llvm/include/llvm/CodeGen/AsmPrinter.h | 6 + llvm/include/llvm/CodeGen/BasicTTIImpl.h | 5 + llvm/include/llvm/CodeGen/CallingConvLower.h | 16 - llvm/include/llvm/CodeGen/CodeGenPassBuilder.h | 2 +- .../include/llvm/CodeGen/GlobalISel/CallLowering.h | 174 +- .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 4 +- .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 2 +- llvm/include/llvm/CodeGen/MIRYamlMapping.h | 44 + llvm/include/llvm/CodeGen/MachineFrameInfo.h | 43 - llvm/include/llvm/CodeGen/MachineMemOperand.h | 10 +- llvm/include/llvm/CodeGen/MachinePassManager.h | 9 +- llvm/include/llvm/CodeGen/MachineRegisterInfo.h | 25 +- llvm/include/llvm/CodeGen/Passes.h | 3 + llvm/include/llvm/CodeGen/SelectionDAG.h | 52 - llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 4 - llvm/include/llvm/CodeGen/TargetFrameLowering.h | 8 - llvm/include/llvm/CodeGen/TargetLowering.h | 11 +- llvm/include/llvm/CodeGen/TargetPassConfig.h | 4 + llvm/include/llvm/CodeGen/TargetRegisterInfo.h | 6 - llvm/include/llvm/DebugInfo/Symbolize/DIPrinter.h | 49 +- llvm/include/llvm/Demangle/RustDemangle.h | 20 +- .../llvm/ExecutionEngine/JITLink/MachO_x86_64.h | 8 + llvm/include/llvm/ExecutionEngine/JITLink/x86_64.h | 5 +- llvm/include/llvm/ExecutionEngine/Orc/Core.h | 75 +- llvm/include/llvm/Frontend/OpenMP/OMP.td | 7 + llvm/include/llvm/Frontend/OpenMP/OMPConstants.h | 7 +- llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h | 2 + llvm/include/llvm/IR/Constants.h | 2 +- llvm/include/llvm/IR/DataLayout.h | 19 - llvm/include/llvm/IR/IRBuilder.h | 10 + llvm/include/llvm/IR/InstrTypes.h | 26 +- llvm/include/llvm/IR/Intrinsics.td | 2 +- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 6 + llvm/include/llvm/IR/IntrinsicsX86.td | 3 + llvm/include/llvm/IR/Metadata.def | 2 +- llvm/include/llvm/IR/PassInstrumentation.h | 36 + llvm/include/llvm/IR/PassManager.h | 25 +- llvm/include/llvm/IR/PassManagerImpl.h | 13 +- llvm/include/llvm/MC/MCAsmInfo.h | 17 +- llvm/include/llvm/MC/MCContext.h | 38 +- llvm/include/llvm/MC/MCObjectFileInfo.h | 9 +- llvm/include/llvm/MC/MCParser/MCAsmLexer.h | 6 + llvm/include/llvm/MC/MCSectionWasm.h | 13 +- llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h | 19 +- llvm/include/llvm/Passes/PassBuilder.h | 15 +- .../llvm/ProfileData/Coverage/CoverageMapping.h | 2 +- .../ProfileData/Coverage/CoverageMappingReader.h | 13 +- llvm/include/llvm/Support/Alignment.h | 10 - llvm/include/llvm/Target/GlobalISel/Combine.td | 14 +- llvm/include/llvm/Target/TargetMachine.h | 3 +- llvm/include/llvm/Target/TargetSelectionDAG.td | 3 + llvm/include/llvm/TextAPI/Platform.h | 1 + llvm/include/llvm/Transforms/IPO/Inliner.h | 3 +- .../llvm/Transforms/IPO/PassManagerBuilder.h | 3 +- .../llvm/Transforms/Scalar/LoopPassManager.h | 34 +- llvm/include/llvm/Transforms/Utils/SizeOpts.h | 19 +- llvm/lib/Analysis/AliasAnalysis.cpp | 2 + llvm/lib/Analysis/BasicAliasAnalysis.cpp | 8 + llvm/lib/Analysis/BlockFrequencyInfo.cpp | 2 + llvm/lib/Analysis/BlockFrequencyInfoImpl.cpp | 2 + llvm/lib/Analysis/CGSCCPassManager.cpp | 15 +- llvm/lib/Analysis/CallGraphSCCPass.cpp | 2 + llvm/lib/Analysis/ConstantFolding.cpp | 44 + llvm/lib/Analysis/DependenceAnalysis.cpp | 71 +- llvm/lib/Analysis/LazyBlockFrequencyInfo.cpp | 8 +- llvm/lib/Analysis/LazyBranchProbabilityInfo.cpp | 12 +- llvm/lib/Analysis/LazyValueInfo.cpp | 18 +- llvm/lib/Analysis/LoopAccessAnalysis.cpp | 10 +- llvm/lib/Analysis/LoopInfo.cpp | 17 +- llvm/lib/Analysis/LoopNestAnalysis.cpp | 16 +- llvm/lib/Analysis/MemoryDependenceAnalysis.cpp | 11 +- llvm/lib/Analysis/ScalarEvolution.cpp | 36 +- llvm/lib/Analysis/TargetLibraryInfo.cpp | 10 + llvm/lib/Analysis/VectorUtils.cpp | 2 + llvm/lib/AsmParser/LLParser.cpp | 3 - llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 8 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 15 +- .../lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp | 2 +- llvm/lib/CodeGen/AsmPrinter/DwarfCFIException.cpp | 9 +- llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 16 +- llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 36 +- llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h | 7 + llvm/lib/CodeGen/CMakeLists.txt | 1 + llvm/lib/CodeGen/GlobalISel/CallLowering.cpp | 249 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 19 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 16 +- llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 2 +- llvm/lib/CodeGen/LiveDebugVariables.cpp | 42 +- llvm/lib/CodeGen/MIRYamlMapping.cpp | 43 + llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp | 12 +- llvm/lib/CodeGen/MachineBlockPlacement.cpp | 2 + llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp | 2 + llvm/lib/CodeGen/MachineCSE.cpp | 32 +- llvm/lib/CodeGen/MachineCopyPropagation.cpp | 10 +- llvm/lib/CodeGen/MachineModuleInfo.cpp | 15 +- llvm/lib/CodeGen/MachineOperand.cpp | 4 - llvm/lib/CodeGen/MachinePassManager.cpp | 13 - llvm/lib/CodeGen/PrologEpilogInserter.cpp | 2 +- llvm/lib/CodeGen/RegAllocFast.cpp | 39 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 3 +- llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 10 +- .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 18 +- llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h | 4 +- .../CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 64 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 9 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 102 +- llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 43 +- llvm/lib/CodeGen/TargetPassConfig.cpp | 4 + llvm/lib/DWARFLinker/DWARFStreamer.cpp | 11 +- llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp | 29 +- llvm/lib/DebugInfo/Symbolize/DIPrinter.cpp | 123 +- llvm/lib/Demangle/RustDemangle.cpp | 144 +- llvm/lib/ExecutionEngine/JITLink/JITLink.cpp | 150 +- llvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp | 16 +- llvm/lib/ExecutionEngine/JITLink/x86_64.cpp | 4 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 51 +- llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 24 +- llvm/lib/ExecutionEngine/Orc/OrcV2CBindings.cpp | 15 + llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp | 5 +- llvm/lib/IR/AutoUpgrade.cpp | 14 +- llvm/lib/IR/Constants.cpp | 16 +- llvm/lib/IR/IRBuilder.cpp | 28 + llvm/lib/IR/Instructions.cpp | 3 - llvm/lib/IR/Verifier.cpp | 4 - llvm/lib/LTO/LTOBackend.cpp | 12 +- llvm/lib/LTO/SummaryBasedOptimizations.cpp | 2 + llvm/lib/MC/MCAsmInfo.cpp | 4 + llvm/lib/MC/MCAsmInfoXCOFF.cpp | 7 + llvm/lib/MC/MCAsmStreamer.cpp | 74 +- llvm/lib/MC/MCContext.cpp | 71 +- llvm/lib/MC/MCDisassembler/Disassembler.cpp | 3 +- llvm/lib/MC/MCMachOStreamer.cpp | 2 +- llvm/lib/MC/MCObjectFileInfo.cpp | 65 +- llvm/lib/MC/MCParser/AsmLexer.cpp | 6 + llvm/lib/MC/MCParser/AsmParser.cpp | 12 +- llvm/lib/MC/MCParser/COFFAsmParser.cpp | 2 +- llvm/lib/MC/MCParser/DarwinAsmParser.cpp | 4 +- llvm/lib/MC/MCParser/MasmParser.cpp | 4 +- llvm/lib/MC/MCParser/WasmAsmParser.cpp | 31 +- llvm/lib/MC/MCSectionWasm.cpp | 6 +- llvm/lib/MC/MCStreamer.cpp | 7 +- llvm/lib/MC/MCWinCOFFStreamer.cpp | 5 +- llvm/lib/MC/WasmObjectWriter.cpp | 6 +- llvm/lib/MC/WinCOFFObjectWriter.cpp | 10 +- llvm/lib/MC/XCOFFObjectWriter.cpp | 7 +- llvm/lib/MCA/HardwareUnits/RegisterFile.cpp | 101 +- llvm/lib/MCA/Stages/DispatchStage.cpp | 9 +- llvm/lib/Object/ModuleSymbolTable.cpp | 4 +- llvm/lib/Object/WasmObjectFile.cpp | 4 +- llvm/lib/ObjectYAML/WasmYAML.cpp | 6 +- llvm/lib/Passes/PassBuilder.cpp | 409 +- llvm/lib/Passes/PassRegistry.def | 2 +- llvm/lib/Passes/StandardInstrumentations.cpp | 14 +- llvm/lib/ProfileData/Coverage/CoverageMapping.cpp | 7 +- .../ProfileData/Coverage/CoverageMappingReader.cpp | 111 +- llvm/lib/Support/AutoConvert.cpp | 14 +- llvm/lib/Support/CommandLine.cpp | 2 +- llvm/lib/Target/AArch64/AArch64.h | 4 +- llvm/lib/Target/AArch64/AArch64Combine.td | 24 +- llvm/lib/Target/AArch64/AArch64ExpandImm.cpp | 13 +- llvm/lib/Target/AArch64/AArch64FastISel.cpp | 4 - llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 9 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 301 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 7 +- llvm/lib/Target/AArch64/AArch64InstrFormats.td | 7 +- llvm/lib/Target/AArch64/AArch64InstrGISel.td | 63 + .../Target/AArch64/AArch64LoadStoreOptimizer.cpp | 8 +- llvm/lib/Target/AArch64/AArch64MCInstLower.cpp | 2 +- llvm/lib/Target/AArch64/AArch64MacroFusion.cpp | 13 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 62 +- .../Target/AArch64/AArch64StackTaggingPreRA.cpp | 2 + llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 7 +- .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 7 +- llvm/lib/Target/AArch64/CMakeLists.txt | 3 + .../Target/AArch64/GISel/AArch64CallLowering.cpp | 308 +- .../AArch64/GISel/AArch64GlobalISelUtils.cpp | 121 + .../Target/AArch64/GISel/AArch64GlobalISelUtils.h | 35 +- .../AArch64/GISel/AArch64InstructionSelector.cpp | 54 - .../Target/AArch64/GISel/AArch64LegalizerInfo.cpp | 11 +- .../GISel/AArch64O0PreLegalizerCombiner.cpp | 171 + .../AArch64/GISel/AArch64PostLegalizerLowering.cpp | 132 +- .../AArch64/GISel/AArch64PreLegalizerCombiner.cpp | 66 +- .../AArch64/MCTargetDesc/AArch64AsmBackend.cpp | 11 +- .../MCTargetDesc/AArch64ELFObjectWriter.cpp | 2 - .../AArch64/MCTargetDesc/AArch64ELFStreamer.cpp | 23 +- .../AArch64/MCTargetDesc/AArch64FixupKinds.h | 3 - .../AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp | 8 +- .../AArch64/MCTargetDesc/AArch64TargetStreamer.cpp | 7 +- .../MCTargetDesc/AArch64WinCOFFObjectWriter.cpp | 7 +- .../MCTargetDesc/AArch64WinCOFFStreamer.cpp | 6 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 176 +- llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp | 9 +- llvm/lib/Target/AMDGPU/AMDGPU.td | 18 +- .../Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp | 52 +- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 66 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 119 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | 6 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 147 +- .../lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 71 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 6 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 37 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h | 3 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 34 +- llvm/lib/Target/AMDGPU/BUFInstructions.td | 9 +- llvm/lib/Target/AMDGPU/GCNSubtarget.h | 8 + .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 8 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp | 1 + llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 81 +- llvm/lib/Target/AMDGPU/R600ISelLowering.h | 3 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 119 +- llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp | 11 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 15 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 3 + llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp | 51 +- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 291 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 52 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 2 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 2 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 28 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 11 +- llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp | 2 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 6 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 11 + llvm/lib/Target/ARM/ARMBlockPlacement.cpp | 136 +- llvm/lib/Target/ARM/ARMCallLowering.cpp | 72 +- llvm/lib/Target/ARM/ARMCallingConv.cpp | 12 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 36 +- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 4 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 247 + llvm/lib/Target/ARM/ARMISelLowering.h | 7 + llvm/lib/Target/ARM/ARMInstrMVE.td | 24 + llvm/lib/Target/ARM/ARMInstrThumb.td | 18 + llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp | 66 +- llvm/lib/Target/ARM/ARMSubtarget.h | 6 + llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 5 + llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 38 +- llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp | 2 + llvm/lib/Target/BPF/BPFTargetMachine.cpp | 5 +- llvm/lib/Target/BPF/BPFTargetMachine.h | 3 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 51 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 10 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 3 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.h | 3 +- llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp | 74 +- llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp | 19 +- .../NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp | 3 +- llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp | 8 +- llvm/lib/Target/NVPTX/NVPTXTargetMachine.h | 3 +- .../PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp | 3 +- .../PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp | 13 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 22 + llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 + llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 42 +- llvm/lib/Target/PowerPC/PPCInstrVSX.td | 127 +- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 28 +- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 46 +- .../Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp | 20 +- llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h | 94 +- .../RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp | 2 +- llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp | 11 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 101 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h | 5 - llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 216 +- llvm/lib/Target/RISCV/RISCVISelLowering.h | 8 +- llvm/lib/Target/RISCV/RISCVInstrFormats.td | 21 +- llvm/lib/Target/RISCV/RISCVInstrInfoB.td | 47 +- llvm/lib/Target/RISCV/RISCVInstrInfoD.td | 6 +- llvm/lib/Target/RISCV/RISCVInstrInfoF.td | 6 +- llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td | 41 +- llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td | 188 +- llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td | 6 +- llvm/lib/Target/RISCV/RISCVMCInstLower.cpp | 10 +- llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 17 +- llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h | 8 + llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 15 +- llvm/lib/Target/TargetLoweringObjectFile.cpp | 2 +- .../WebAssembly/AsmParser/WebAssemblyAsmParser.cpp | 2 +- .../WebAssembly/Utils/WebAssemblyUtilities.h | 20 + .../Target/WebAssembly/WebAssemblyAsmPrinter.cpp | 59 +- .../lib/Target/WebAssembly/WebAssemblyAsmPrinter.h | 1 + .../lib/Target/WebAssembly/WebAssemblyFastISel.cpp | 4 + llvm/lib/Target/WebAssembly/WebAssemblyISD.def | 4 +- .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 83 +- .../Target/WebAssembly/WebAssemblyISelLowering.h | 2 + .../Target/WebAssembly/WebAssemblyInstrAtomics.td | 49 +- .../lib/Target/WebAssembly/WebAssemblyInstrInfo.td | 50 +- llvm/lib/Target/WebAssembly/WebAssemblyInstrRef.td | 40 +- .../WebAssemblyLowerEmscriptenEHSjLj.cpp | 42 +- .../Target/WebAssembly/WebAssemblyMCInstLower.cpp | 25 +- .../WebAssembly/WebAssemblyTargetMachine.cpp | 5 +- llvm/lib/Target/X86/CMakeLists.txt | 2 + llvm/lib/Target/X86/X86.h | 5 + llvm/lib/Target/X86/X86.td | 14 +- llvm/lib/Target/X86/X86CallLowering.cpp | 181 +- llvm/lib/Target/X86/X86CallLowering.h | 9 - llvm/lib/Target/X86/X86ExpandPseudo.cpp | 4 + llvm/lib/Target/X86/X86FastTileConfig.cpp | 306 + llvm/lib/Target/X86/X86FlagsCopyLowering.cpp | 52 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 35 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 351 +- llvm/lib/Target/X86/X86InstrAMX.td | 2 + llvm/lib/Target/X86/X86InstrInfo.td | 11 +- llvm/lib/Target/X86/X86InstrSystem.td | 3 - .../X86/X86LoadValueInjectionLoadHardening.cpp | 6 +- llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp | 13 +- llvm/lib/Target/X86/X86LowerAMXType.cpp | 365 +- llvm/lib/Target/X86/X86PreAMXConfig.cpp | 422 + llvm/lib/Target/X86/X86ScheduleZnver3.td | 166 +- llvm/lib/Target/X86/X86Subtarget.h | 4 + llvm/lib/Target/X86/X86TargetMachine.cpp | 11 + llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 207 +- llvm/lib/TextAPI/Platform.cpp | 20 +- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 36 +- llvm/lib/Transforms/IPO/BlockExtractor.cpp | 7 +- llvm/lib/Transforms/IPO/GlobalOpt.cpp | 540 +- llvm/lib/Transforms/IPO/Inliner.cpp | 3 +- llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 233 +- .../Transforms/IPO/SyntheticCountsPropagation.cpp | 5 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 8 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 135 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 21 +- .../Transforms/InstCombine/InstCombineInternal.h | 2 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 47 +- .../InstCombine/InstCombineVectorOps.cpp | 13 +- .../Instrumentation/PGOInstrumentation.cpp | 2 + llvm/lib/Transforms/Scalar/GVN.cpp | 19 +- llvm/lib/Transforms/Scalar/LICM.cpp | 4 - llvm/lib/Transforms/Scalar/LoopInterchange.cpp | 66 + llvm/lib/Transforms/Scalar/LoopPassManager.cpp | 7 - llvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp | 2 + llvm/lib/Transforms/Utils/InlineFunction.cpp | 106 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 36 +- llvm/lib/Transforms/Utils/SizeOpts.cpp | 18 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 162 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 54 +- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 90 +- llvm/test/Analysis/BasicAA/noalias-inttoptr.ll | 60 + llvm/test/Analysis/CostModel/X86/bswap-store.ll | 277 + .../CostModel/X86/{bswap.ll => bswap-vec.ll} | 0 llvm/test/Analysis/CostModel/X86/bswap.ll | 153 +- .../CostModel/X86/interleaved-load-i16-stride-3.ll | 4 +- .../Analysis/CostModel/X86/interleaved-load-i8.ll | 6 +- .../X86/interleaved-store-i16-stride-3.ll | 4 +- .../Analysis/CostModel/X86/interleaved-store-i8.ll | 6 +- llvm/test/Analysis/CostModel/X86/load-bswap.ll | 295 + llvm/test/Analysis/CostModel/X86/load_store.ll | 3512 +- llvm/test/Analysis/DependenceAnalysis/Coupled.ll | 6 +- llvm/test/Analysis/DependenceAnalysis/Invariant.ll | 13 +- .../PreliminaryNoValidityCheckFixedSize.ll | 10 + .../Analysis/DependenceAnalysis/Separability.ll | 16 +- .../DependenceAnalysis/SimpleSIVNoValidityCheck.ll | 18 +- .../SimpleSIVNoValidityCheckFixedSize.ll | 8 +- .../Analysis/LoopNestAnalysis/imperfectnest.ll | 67 - llvm/test/Analysis/LoopNestAnalysis/perfectnest.ll | 145 + .../max-backedge-taken-count-guard-info.ll | 172 +- llvm/test/Bitcode/upgrade-masked-keep-metadata.ll | 145 + llvm/test/Bitcode/upgrade-void-ret-attr-11.0.ll | 14 + llvm/test/Bitcode/upgrade-void-ret-attr-11.0.ll.bc | Bin 0 -> 1288 bytes .../CodeGen/AArch64/GlobalISel/arm64-atomic.ll | 52 +- .../AArch64/GlobalISel/arm64-callingconv-ios.ll | 14 +- .../AArch64/GlobalISel/arm64-callingconv.ll | 60 + .../AArch64/GlobalISel/arm64-irtranslator.ll | 5 +- .../GlobalISel/call-translator-tail-call.ll | 28 + .../CodeGen/AArch64/GlobalISel/call-translator.ll | 3 +- .../AArch64/GlobalISel/gisel-commandline-option.ll | 6 +- .../CodeGen/AArch64/GlobalISel/inline-memset.mir | 28 + .../AArch64/GlobalISel/irtranslator-reductions.ll | 25 +- .../GlobalISel/irtranslator-switch-bittest.ll | 57 + .../CodeGen/AArch64/GlobalISel/legalize-ctpop.mir | 111 + .../AArch64/GlobalISel/legalize-load-store.mir | 26 + .../GlobalISel/legalizer-info-validation.mir | 4 +- .../AArch64/GlobalISel/lower-neon-vector-fcmp.mir | 672 + .../postlegalizer-lowering-truncstore.mir | 34 + .../prelegalizercombiner-extending-loads.mir | 412 +- .../test/CodeGen/AArch64/GlobalISel/select-ext.mir | 14 + .../AArch64/GlobalISel/select-neon-vector-fcmp.mir | 162 + .../CodeGen/AArch64/GlobalISel/select-store.mir | 51 +- llvm/test/CodeGen/AArch64/O0-pipeline.ll | 2 +- llvm/test/CodeGen/AArch64/arm64-long-shift.ll | 48 +- llvm/test/CodeGen/AArch64/arm64-this-return.ll | 14 +- llvm/test/CodeGen/AArch64/arm64-vshift.ll | 366 + llvm/test/CodeGen/AArch64/basic-pic.ll | 30 - llvm/test/CodeGen/AArch64/bitfield-extract.ll | 2 +- llvm/test/CodeGen/AArch64/combine-loads.ll | 21 - llvm/test/CodeGen/AArch64/elf-globals-static.ll | 10 - llvm/test/CodeGen/AArch64/elf-preemption.ll | 114 + .../CodeGen/AArch64/neon-compare-instructions.ll | 1876 ++ .../CodeGen/AArch64/semantic-interposition-asm.ll | 25 + llvm/test/CodeGen/AArch64/strpre-str-merge.mir | 27 + .../CodeGen/AArch64/sve-fixed-length-bitcast.ll | 239 + llvm/test/CodeGen/AArch64/sve-fpext-load.ll | 85 + llvm/test/CodeGen/AArch64/sve-fptrunc-store.ll | 25 + .../AArch64/sve-intrinsics-int-arith-imm.ll | 641 +- .../CodeGen/AArch64/sve-intrinsics-logical-imm.ll | 237 + .../CodeGen/AArch64/sve-intrinsics-reinterpret.ll | 68 +- .../CodeGen/AArch64/sve-intrinsics-unpred-form.ll | 1115 + .../AArch64/sve2-intrinsics-int-arith-imm.ll | 484 + .../test/CodeGen/AArch64/tailcall-explicit-sret.ll | 12 +- llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll | 76 +- llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll | 46 +- llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll | 40 +- .../test/CodeGen/AMDGPU/GlobalISel/dummy-target.ll | 41 +- llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll | 451 +- .../test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll | 2 - llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll | 77 +- llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll | 73 +- llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll | 130 +- llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll | 179 +- llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll | 347 +- .../GlobalISel/inst-select-load-global-saddr.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll | 10 +- .../GlobalISel/irtranslator-function-args.ll | 15 +- .../CodeGen/AMDGPU/GlobalISel/load-constant.96.ll | 22 +- .../CodeGen/AMDGPU/GlobalISel/load-unaligned.ll | 43 + llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll | 42 +- .../no-cse-nonlocal-convergent-instrs.mir | 21 +- llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll | 72 +- .../CodeGen/AMDGPU/GlobalISel/readcyclecounter.ll | 1 + .../regbankselect-uniform-load-noclobber.mir | 139 + .../regbankselect-widen-scalar-loads.mir | 493 + llvm/test/CodeGen/AMDGPU/GlobalISel/roundeven.ll | 52 +- llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll | 35 +- .../CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll | 12 +- llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll | 35 +- llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll | 37 +- llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll | 28 +- llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll | 24 +- .../AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll | 430 + llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll | 7 + .../CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll | 69 + llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll | 1 - llvm/test/CodeGen/AMDGPU/call-argument-types.ll | 12 +- .../AMDGPU/callee-special-input-vgprs-packed.ll | 4 +- .../CodeGen/AMDGPU/callee-special-input-vgprs.ll | 4 +- llvm/test/CodeGen/AMDGPU/cluster_stores.ll | 294 +- llvm/test/CodeGen/AMDGPU/coalescer_remat.ll | 4 +- llvm/test/CodeGen/AMDGPU/debug_frame.ll | 15 +- llvm/test/CodeGen/AMDGPU/flat-scratch.ll | 989 +- llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll | 3 - llvm/test/CodeGen/AMDGPU/fp_to_sint.ll | 1225 +- llvm/test/CodeGen/AMDGPU/fp_to_uint.ll | 1568 +- .../CodeGen/AMDGPU/gfx-callable-argument-types.ll | 90 +- llvm/test/CodeGen/AMDGPU/global-saddr-load.ll | 151 +- llvm/test/CodeGen/AMDGPU/global-smrd-unknown.ll | 2 +- llvm/test/CodeGen/AMDGPU/global_atomics.ll | 109 +- llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll | 100 +- llvm/test/CodeGen/AMDGPU/hard-clauses.mir | 36 + llvm/test/CodeGen/AMDGPU/llc-pipeline.ll | 82 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll | 2 - llvm/test/CodeGen/AMDGPU/llvm.amdgcn.perm.ll | 47 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll | 38 + .../AMDGPU/local-stack-alloc-block-sp-reference.ll | 29 +- llvm/test/CodeGen/AMDGPU/loop_exit_with_xor.ll | 8 +- .../CodeGen/AMDGPU/memory-legalizer-flat-agent.ll | 52 - .../CodeGen/AMDGPU/memory-legalizer-flat-system.ll | 52 - .../AMDGPU/memory-legalizer-flat-volatile.ll | 1 - .../AMDGPU/memory-legalizer-flat-workgroup.ll | 13 - llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll | 86 +- llvm/test/CodeGen/AMDGPU/multilevel-break.ll | 7 +- llvm/test/CodeGen/AMDGPU/offset-split-global.ll | 186 +- llvm/test/CodeGen/AMDGPU/opt-pipeline.ll | 2 +- .../CodeGen/AMDGPU/pal-simple-indirect-call.ll | 22 +- .../AMDGPU/promote-constOffset-to-imm-gfx90a.mir | 221 + .../CodeGen/AMDGPU/promote-constOffset-to-imm.ll | 38 +- llvm/test/CodeGen/AMDGPU/ptr-arg-dbg-value.ll | 24 +- llvm/test/CodeGen/AMDGPU/readcyclecounter.ll | 6 +- llvm/test/CodeGen/AMDGPU/shl.ll | 2200 +- llvm/test/CodeGen/AMDGPU/sibling-call.ll | 162 + llvm/test/CodeGen/AMDGPU/sink-image-sample.ll | 42 + .../AMDGPU/soft-clause-exceeds-register-budget.ll | 16 +- llvm/test/CodeGen/AMDGPU/split-arg-dbg-value.ll | 15 + llvm/test/CodeGen/AMDGPU/sra.ll | 1000 +- llvm/test/CodeGen/AMDGPU/srl.ll | 575 +- llvm/test/CodeGen/AMDGPU/stack-realign.ll | 2 +- llvm/test/CodeGen/AMDGPU/tail-call-amdgpu-gfx.ll | 2 +- llvm/test/CodeGen/AMDGPU/waitcnt-debug.mir | 3 + llvm/test/CodeGen/AMDGPU/waitcnt-no-redundant.mir | 15 + .../CodeGen/AMDGPU/waitcnt-preexisting-vscnt.mir | 131 + llvm/test/CodeGen/AMDGPU/waitcnt-preexisting.mir | 267 +- .../CodeGen/ARM/GlobalISel/arm-irtranslator.ll | 30 +- llvm/test/CodeGen/ARM/GlobalISel/arm-isel.ll | 4 +- .../CodeGen/ARM/GlobalISel/arm-legalize-vfp4.mir | 4 +- .../CodeGen/ARM/GlobalISel/arm-param-lowering.ll | 13 +- .../test/CodeGen/ARM/GlobalISel/arm-unsupported.ll | 2 +- llvm/test/CodeGen/ARM/arm-vst1.ll | 278 +- .../ARM/atomicrmw_exclusive_monitor_ints.ll | 473 + llvm/test/CodeGen/ARM/ha-alignstack-call.ll | 343 + llvm/test/CodeGen/ARM/ha-alignstack.ll | 190 + llvm/test/CodeGen/ARM/ipra-r0-returned.ll | 2 +- llvm/test/CodeGen/ARM/returned-ext.ll | 30 +- llvm/test/CodeGen/ARM/this-return.ll | 14 +- .../BPF/CORE/intrinsic-fieldinfo-existence-4.ll | 109 + llvm/test/CodeGen/BPF/lit.local.cfg | 2 + ...ce-intrinsics-with-veclib-darwin-libsystem-m.ll | 64 + .../CodeGen/Hexagon/autohvx/vector-align-tbaa.ll | 299 + llvm/test/CodeGen/Hexagon/isel-memory-vNi1.ll | 276 + .../M68k/Encoding/Arith/Classes/MxBiArOp_FMI.mir | 88 - .../M68k/Encoding/Arith/Classes/MxBiArOp_FMR.mir | 73 - .../M68k/Encoding/Arith/Classes/MxBiArOp_RFRI.mir | 41 - .../M68k/Encoding/Arith/Classes/MxBiArOp_RFRRF.mir | 27 - .../Encoding/Arith/Classes/MxBiArOp_RFRR_EAd.mir | 26 - .../M68k/Encoding/Arith/Classes/MxCMP_RI.mir | 36 - .../M68k/Encoding/Arith/Classes/MxCMP_RR.mir | 27 - .../CodeGen/M68k/Encoding/Arith/Classes/MxDiMu.mir | 48 - .../CodeGen/M68k/Encoding/Arith/Classes/MxExt.mir | 25 - .../CodeGen/M68k/Encoding/Arith/Classes/MxNEG.mir | 39 - .../M68k/Encoding/Bits/Classes/MxBTST_MI.mir | 115 - .../M68k/Encoding/Bits/Classes/MxBTST_MR.mir | 104 - .../M68k/Encoding/Bits/Classes/MxBTST_RI.mir | 25 - .../M68k/Encoding/Bits/Classes/MxBTST_RR.mir | 22 - .../M68k/Encoding/Control/Classes/MxJMP.mir | 21 - .../M68k/Encoding/Control/Classes/MxNOP.mir | 16 - .../M68k/Encoding/Control/Classes/MxRTS.mir | 16 - .../M68k/Encoding/Control/Classes/MxScc.mir | 140 - .../CodeGen/M68k/Encoding/Data/Classes/MxLEA.mir | 65 - .../M68k/Encoding/Data/Classes/MxMoveCCR.mir | 34 - .../M68k/Encoding/Data/Classes/MxMove_MI.mir | 97 - .../M68k/Encoding/Data/Classes/MxMove_RI.mir | 31 - .../CodeGen/M68k/Encoding/Relocations/data-abs.mir | 24 - .../M68k/Encoding/Relocations/data-gotoff.mir | 28 - .../M68k/Encoding/Relocations/data-gotpcrel.mir | 26 - .../M68k/Encoding/Relocations/data-pc-rel.mir | 29 - .../CodeGen/M68k/Encoding/Relocations/text-plt.mir | 23 - .../M68k/Encoding/ShiftRotate/Classes/MxSR_DD.mir | 43 - .../M68k/Encoding/ShiftRotate/Classes/MxSR_DI.mir | 58 - .../invalid-frame-index-invalid-fixed-stack.mir | 17 + .../AMDGPU/invalid-frame-index-invalid-stack.mir | 17 + .../MIR/AMDGPU/invalid-frame-index-no-stack.mir | 13 + .../CodeGen/MIR/AMDGPU/invalid-frame-index.mir | 13 + .../CodeGen/MIR/AMDGPU/invalid-frame-index2.mir | 13 + .../MIR/AMDGPU/machine-function-info-after-pei.ll | 50 + .../MIR/AMDGPU/machine-function-info-no-ir.mir | 15 + llvm/test/CodeGen/Mips/atomic.ll | 1474 +- llvm/test/CodeGen/Mips/msa/bitwise.ll | 1502 +- llvm/test/CodeGen/Mips/msa/i5-b.ll | 411 +- llvm/test/CodeGen/Mips/msa/immediates.ll | 1688 +- ...-filename-special-character-double-quotation.ll | 8 + ...-filename-special-character-single-quotation.ll | 8 + .../CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll | 614 + llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll | 644 + llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll | 444 +- llvm/test/CodeGen/PowerPC/aix-xcoff-huge-relocs.ll | 3 + llvm/test/CodeGen/PowerPC/atomics-i16-ldst.ll | 132 +- llvm/test/CodeGen/PowerPC/atomics-i32-ldst.ll | 176 +- llvm/test/CodeGen/PowerPC/atomics-i64-ldst.ll | 176 +- llvm/test/CodeGen/PowerPC/atomics-i8-ldst.ll | 44 +- .../CodeGen/PowerPC/frame_index_scavenging.mir | 143 + .../CodeGen/PowerPC/stack_pointer_vec_spills.mir | 41 + llvm/test/CodeGen/PowerPC/uint-to-fp-v4i32.ll | 28 +- llvm/test/CodeGen/PowerPC/vec-extract-itofp.ll | 183 + .../CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll | 60 +- .../CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll | 60 +- llvm/test/CodeGen/PowerPC/vec_extract_p9.ll | 7 +- llvm/test/CodeGen/RISCV/atomic-signext.ll | 21 +- llvm/test/CodeGen/RISCV/elf-preemption.ll | 288 + .../CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll | 32 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll | 8 +- .../RISCV/rvv/fixed-vectors-calling-conv.ll | 18 +- .../RISCV/rvv/fixed-vectors-extload-truncstore.ll | 638 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll | 14 +- .../RISCV/rvv/fixed-vectors-extract-subvector.ll | 160 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll | 46 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll | 2 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll | 49 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll | 240 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll | 54 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll | 6 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll | 144 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll | 80 +- .../RISCV/rvv/fixed-vectors-insert-subvector.ll | 120 +- .../RISCV/rvv/fixed-vectors-int-buildvec.ll | 28 +- .../RISCV/rvv/fixed-vectors-int-exttrunc.ll | 67 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll | 16 +- .../RISCV/rvv/fixed-vectors-int-shuffles.ll | 60 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll | 6 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll | 96 +- .../RISCV/rvv/fixed-vectors-mask-buildvec.ll | 72 +- .../RISCV/rvv/fixed-vectors-mask-load-store.ll | 26 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll | 6 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll | 52 +- .../RISCV/rvv/fixed-vectors-masked-gather.ll | 70 +- .../RISCV/rvv/fixed-vectors-masked-load-fp.ll | 10 +- .../RISCV/rvv/fixed-vectors-masked-load-int.ll | 18 +- .../RISCV/rvv/fixed-vectors-masked-scatter.ll | 286 +- .../RISCV/rvv/fixed-vectors-masked-store-fp.ll | 10 +- .../RISCV/rvv/fixed-vectors-masked-store-int.ll | 18 +- .../RISCV/rvv/fixed-vectors-reduction-fp.ll | 94 +- .../RISCV/rvv/fixed-vectors-reduction-int.ll | 303 +- .../CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll | 3752 +++ .../CodeGen/RISCV/rvv/fixed-vectors-select-int.ll | 1000 + .../RISCV/rvv/fixed-vectors-stepvector-rv32.ll | 12 +- .../RISCV/rvv/fixed-vectors-stepvector-rv64.ll | 12 +- .../CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll | 1333 + .../CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll | 1333 + .../CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll | 917 + .../CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll | 917 + llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin.ll | 12 +- .../CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll | 917 + .../CodeGen/RISCV/rvv/fixed-vectors-vnsra-vnsrl.ll | 189 + .../test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll | 1333 + .../RISCV/rvv/fixed-vectors-vreductions-mask.ll | 24 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll | 917 + .../CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll | 917 + .../CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll | 981 + .../CodeGen/RISCV/rvv/fixed-vectors-vselect.ll | 12 +- .../CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll | 1333 + .../CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll | 1333 + .../CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll | 1333 + .../CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll | 917 + .../CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll | 1749 + llvm/test/CodeGen/RISCV/rvv/select-fp.ll | 777 + llvm/test/CodeGen/RISCV/rvv/select-int.ll | 1330 + llvm/test/CodeGen/RISCV/rvv/stepvector.ll | 105 +- llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll | 1789 ++ llvm/test/CodeGen/RISCV/rvv/vand-vp.ll | 1789 ++ llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll | 1217 + llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll | 1217 + llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll | 1217 + llvm/test/CodeGen/RISCV/rvv/vor-vp.ll | 1789 ++ llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll | 1217 + llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll | 1217 + llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll | 1305 + llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll | 1789 ++ llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll | 1789 ++ llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll | 1789 ++ llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll | 1217 + llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll | 2361 ++ llvm/test/CodeGen/RISCV/rvv/zvlsseg-spill.mir | 49 + .../test/CodeGen/RISCV/srem-seteq-illegal-types.ll | 2 +- .../test/CodeGen/RISCV/urem-seteq-illegal-types.ll | 8 +- llvm/test/CodeGen/SPARC/64abi.ll | 10 +- llvm/test/CodeGen/SystemZ/args-02.ll | 4 +- llvm/test/CodeGen/SystemZ/args-03.ll | 4 +- llvm/test/CodeGen/SystemZ/frameaddr-02.ll | 27 +- llvm/test/CodeGen/SystemZ/shift-12.ll | 94 +- .../CodeGen/Thumb2/LowOverheadLoops/memcall.ll | 98 +- llvm/test/CodeGen/Thumb2/block-placement.mir | 474 +- llvm/test/CodeGen/Thumb2/mve-float16regloops.ll | 56 +- llvm/test/CodeGen/Thumb2/mve-float32regloops.ll | 58 +- .../Thumb2/mve-gather-scatter-optimisation.ll | 164 +- llvm/test/CodeGen/Thumb2/mve-phireg.ll | 117 +- llvm/test/CodeGen/Thumb2/mve-tp-loop.ll | 413 + llvm/test/CodeGen/Thumb2/mve-tp-loop.mir | 239 + llvm/test/CodeGen/WebAssembly/global-get.ll | 79 + llvm/test/CodeGen/WebAssembly/global-set.ll | 62 + .../CodeGen/WebAssembly/simd-load-lane-offset.ll | 96 +- .../CodeGen/WebAssembly/simd-load-zero-offset.ll | 32 +- .../test/CodeGen/X86/64-bit-shift-by-32-minus-y.ll | 444 + llvm/test/CodeGen/X86/AMX/amx-configO0toO0.ll | 4559 +++ .../test/CodeGen/X86/AMX/amx-configO2toO0-lower.ll | 78 + .../CodeGen/X86/AMX/amx-configO2toO0-precfg.ll | 207 + llvm/test/CodeGen/X86/AMX/amx-configO2toO0.ll | 513 + llvm/test/CodeGen/X86/AMX/amx-fast-tile-config.mir | 465 + .../X86/AMX/amx-low-intrinsics-no-amx-bitcast.ll | 2 +- llvm/test/CodeGen/X86/AMX/amx-low-intrinsics.ll | 2 +- llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll | 12 +- llvm/test/CodeGen/X86/GlobalISel/callingconv.ll | 6 +- llvm/test/CodeGen/X86/GlobalISel/ext.ll | 2 + .../X86/GlobalISel/irtranslator-callingconv.ll | 60 +- .../CodeGen/X86/GlobalISel/memop-scalar-x32.ll | 8 +- llvm/test/CodeGen/X86/O0-pipeline.ll | 2 + llvm/test/CodeGen/X86/arg-copy-elide.ll | 373 +- llvm/test/CodeGen/X86/fast-cc-merge-stack-adj.ll | 2 +- llvm/test/CodeGen/X86/fast-cc-pass-in-regs.ll | 2 +- .../CodeGen/X86/gcc_except_table_bb_sections.ll | 129 +- llvm/test/CodeGen/X86/horizontal-shuffle-4.ll | 116 + llvm/test/CodeGen/X86/horizontal-shuffle.ll | 374 +- llvm/test/CodeGen/X86/horizontal-sum.ll | 256 +- llvm/test/CodeGen/X86/lea-opt2.ll | 154 + llvm/test/CodeGen/X86/mismatched-byval.ll | 45 + llvm/test/CodeGen/X86/movtopush.ll | 10 +- llvm/test/CodeGen/X86/pop-stack-cleanup.ll | 2 +- llvm/test/CodeGen/X86/pr50254.ll | 49 + llvm/test/CodeGen/X86/preallocated.ll | 6 +- llvm/test/CodeGen/X86/statepoint-fastregalloc.mir | 40 + llvm/test/CodeGen/X86/tailcall-msvc-conventions.ll | 2 +- llvm/test/CodeGen/X86/var-permute-128.ll | 122 + llvm/test/DebugInfo/AMDGPU/cfi.ll | 34 + .../DebugInfo/ARM/machine-cp-updates-dbg-reg.mir | 199 + llvm/test/DebugInfo/Mips/dsr-fixed-objects.ll | 2 +- llvm/test/DebugInfo/Mips/dsr-non-fixed-objects.ll | 2 +- llvm/test/DebugInfo/Mips/dwarfdump-tls.ll | 8 +- .../X86/invalidated-dbg-value-is-undef.ll | 53 + .../DebugInfo/X86/live-debug-vars-loc-limit.ll | 48 + llvm/test/Demangle/rust.test | 105 + llvm/test/MC/AArch64/arm64-tls-relocs.s | 338 - llvm/test/MC/AArch64/coff-relocations.s | 2 +- llvm/test/MC/AArch64/tls-relocs.s | 2 +- llvm/test/MC/AMDGPU/gfx9-asm-err.s | 3 + llvm/test/MC/AMDGPU/gfx90a_err.s | 9 +- llvm/test/MC/ARM/coff-relocations.s | 2 +- llvm/test/MC/ARM/thumb_func-implies-thumb.s | 31 + llvm/test/MC/ELF/AMDGPU/cfi.s | 29 + llvm/test/MC/ELF/AMDGPU/lit.local.cfg | 3 + llvm/test/MC/M68k/Arith/Classes/MxBiArOp_FMI.s | 32 + llvm/test/MC/M68k/Arith/Classes/MxBiArOp_FMR.s | 29 + llvm/test/MC/M68k/Arith/Classes/MxBiArOp_RFRI.s | 18 + llvm/test/MC/M68k/Arith/Classes/MxBiArOp_RFRRF.s | 15 + .../test/MC/M68k/Arith/Classes/MxBiArOp_RFRR_EAd.s | 15 + llvm/test/MC/M68k/Arith/Classes/MxCMP_RI.s | 15 + llvm/test/MC/M68k/Arith/Classes/MxCMP_RR.s | 15 + llvm/test/MC/M68k/Arith/Classes/MxDiMu.s | 27 + llvm/test/MC/M68k/Arith/Classes/MxExt.s | 15 + llvm/test/MC/M68k/Arith/Classes/MxNEG.s | 16 + llvm/test/MC/M68k/Bits/Classes/MxBTST_MI.s | 37 + llvm/test/MC/M68k/Bits/Classes/MxBTST_MR.s | 37 + llvm/test/MC/M68k/Bits/Classes/MxBTST_RI.s | 9 + llvm/test/MC/M68k/Bits/Classes/MxBTST_RR.s | 9 + llvm/test/MC/M68k/Control/Classes/MxJMP.s | 6 + llvm/test/MC/M68k/Control/Classes/MxNOP.s | 6 + llvm/test/MC/M68k/Control/Classes/MxRTS.s | 6 + llvm/test/MC/M68k/Control/Classes/MxScc.s | 100 + llvm/test/MC/M68k/Data/Classes/MxLEA.s | 23 + llvm/test/MC/M68k/Data/Classes/MxMoveCCR.s | 10 + llvm/test/MC/M68k/Data/Classes/MxMove_MI.s | 35 + llvm/test/MC/M68k/Data/Classes/MxMove_RI.s | 12 + llvm/test/MC/M68k/Relocations/data-abs.s | 9 + llvm/test/MC/M68k/Relocations/data-gotoff.s | 20 + llvm/test/MC/M68k/Relocations/data-gotpcrel.s | 14 + llvm/test/MC/M68k/Relocations/data-pc-rel.s | 20 + llvm/test/MC/M68k/Relocations/text-plt.s | 9 + llvm/test/MC/M68k/ShiftRotate/Classes/MxSR_DD.s | 33 + llvm/test/MC/M68k/ShiftRotate/Classes/MxSR_DI.s | 54 + llvm/test/MC/WebAssembly/section-flags-changed.s | 7 + llvm/test/MC/WebAssembly/unnamed-data.ll | 4 +- llvm/test/Other/loop-pm-invalidation.ll | 100 +- .../test/Other/new-pass-manager-cgscc-fct-proxy.ll | 41 + llvm/test/Other/new-pass-manager.ll | 133 +- llvm/test/Other/new-pm-O0-defaults.ll | 12 +- llvm/test/Other/new-pm-defaults.ll | 31 +- llvm/test/Other/new-pm-lto-defaults.ll | 18 +- llvm/test/Other/new-pm-pgo-preinline.ll | 4 - llvm/test/Other/new-pm-thinlto-defaults.ll | 30 +- .../Other/new-pm-thinlto-postlink-pgo-defaults.ll | 30 +- .../new-pm-thinlto-postlink-samplepgo-defaults.ll | 30 +- .../Other/new-pm-thinlto-prelink-pgo-defaults.ll | 28 +- .../new-pm-thinlto-prelink-samplepgo-defaults.ll | 24 +- llvm/test/Other/opt-LTO-pipeline.ll | 2 +- llvm/test/Other/pass-pipeline-parsing.ll | 64 +- llvm/test/Other/pr49950.ll | 78 + llvm/test/Transforms/ArgumentPromotion/attrs.ll | 12 +- llvm/test/Transforms/ArgumentPromotion/byval-2.ll | 16 +- llvm/test/Transforms/ArgumentPromotion/byval.ll | 39 +- llvm/test/Transforms/ArgumentPromotion/dbg.ll | 28 +- llvm/test/Transforms/ArgumentPromotion/tail.ll | 39 - llvm/test/Transforms/FunctionAttrs/nosync.ll | 40 +- llvm/test/Transforms/GVN/PRE/rle.ll | 246 +- .../Transforms/GlobalOpt/MallocSROA-section.ll | 5 +- llvm/test/Transforms/GlobalOpt/heap-sra-1.ll | 4 +- llvm/test/Transforms/GlobalOpt/heap-sra-2.ll | 4 +- .../Transforms/GlobalOpt/heap-sra-3-no-null-opt.ll | 41 - llvm/test/Transforms/GlobalOpt/heap-sra-3.ll | 46 - .../Transforms/GlobalOpt/heap-sra-4-no-null-opt.ll | 44 - llvm/test/Transforms/GlobalOpt/heap-sra-4.ll | 47 - llvm/test/Transforms/GlobalOpt/heap-sra-phi.ll | 5 +- llvm/test/Transforms/IRCE/decrementing-loop.ll | 11 +- .../Transforms/IndVarSimplify/eliminate-exit.ll | 3 +- .../Inline/cgscc-incremental-invalidate.ll | 9 +- llvm/test/Transforms/Inline/clear-analyses.ll | 1 - llvm/test/Transforms/Inline/pr50270.ll | 71 + .../InstCombine/2008-02-28-OrFCmpCrash.ll | 2 +- .../InstCombine/2012-03-10-InstCombine.ll | 4 +- llvm/test/Transforms/InstCombine/and-fcmp.ll | 34 +- .../Transforms/InstCombine/and-or-icmp-min-max.ll | 64 +- .../Transforms/InstCombine/and-or-icmp-nullptr.ll | 22 +- llvm/test/Transforms/InstCombine/and-or-icmps.ll | 21 +- llvm/test/Transforms/InstCombine/and.ll | 10 +- llvm/test/Transforms/InstCombine/and2.ll | 10 +- llvm/test/Transforms/InstCombine/assume.ll | 4 +- llvm/test/Transforms/InstCombine/bit-checks.ll | 150 +- llvm/test/Transforms/InstCombine/demorgan.ll | 4 +- .../div-by-0-guard-before-smul_ov-not.ll | 2 +- .../InstCombine/div-by-0-guard-before-smul_ov.ll | 2 +- .../div-by-0-guard-before-umul_ov-not.ll | 2 +- .../InstCombine/div-by-0-guard-before-umul_ov.ll | 2 +- .../Transforms/InstCombine/dont-distribute-phi.ll | 2 +- llvm/test/Transforms/InstCombine/eq-of-parts.ll | 332 +- llvm/test/Transforms/InstCombine/icmp.ll | 14 +- .../Transforms/InstCombine/load-insert-store.ll | 98 - .../InstCombine/logical-select-inseltpoison.ll | 19 +- llvm/test/Transforms/InstCombine/logical-select.ll | 19 +- .../InstCombine/masked_intrinsics_keep_metadata.ll | 48 + llvm/test/Transforms/InstCombine/onehot_merge.ll | 118 +- llvm/test/Transforms/InstCombine/or-fcmp.ll | 28 +- llvm/test/Transforms/InstCombine/or.ll | 30 +- .../Transforms/InstCombine/prevent-cmp-merge.ll | 2 +- llvm/test/Transforms/InstCombine/range-check.ll | 26 +- .../test/Transforms/InstCombine/scalable-select.ll | 17 + llvm/test/Transforms/InstCombine/select-and-or.ll | 2 +- llvm/test/Transforms/InstCombine/select-bitext.ll | 20 +- llvm/test/Transforms/InstCombine/select-cmp-br.ll | 10 +- .../InstCombine/select-safe-bool-transforms.ll | 2 +- .../select-safe-impliedcond-transforms.ll | 2 +- .../InstCombine/select-safe-transforms.ll | 2 +- llvm/test/Transforms/InstCombine/select.ll | 44 +- .../Transforms/InstCombine/shufflevec-bitcast.ll | 69 + .../Transforms/InstCombine/sign-test-and-or.ll | 28 +- .../InstCombine/signed-truncation-check.ll | 18 +- .../test/Transforms/InstCombine/umul-sign-check.ll | 1 - .../usub-overflow-known-by-implied-cond.ll | 8 +- .../Transforms/InstCombine/widenable-conditions.ll | 22 +- llvm/test/Transforms/InstCombine/zext-or-icmp.ll | 8 +- .../InstSimplify/ConstProp/AMDGPU/perm.ll | 102 + ...rt-placeholder-to-prevent-infinite-recursion.ll | 80 + llvm/test/Transforms/LICM/invariant.group.ll | 58 - .../X86/logical-right-shift-until-zero-cost.ll | 53 + .../logical-right-shift-until-zero-debuginfo.ll | 62 + .../X86/logical-right-shift-until-zero.ll | 1780 + .../inner-indvar-depend-on-outer-indvar.ll | 153 + llvm/test/Transforms/LoopInterchange/lcssa.ll | 32 + .../loop-interchange-optimization-remarks.ll | 6 +- .../Transforms/LoopInterchange/profitability.ll | 10 +- llvm/test/Transforms/LoopRotate/pr35210.ll | 16 +- llvm/test/Transforms/LoopSimplify/merge-exits.ll | 4 +- .../LoopUnroll/unroll-loop-invalidation.ll | 15 +- .../AArch64/first-order-recurrence.ll | 104 + .../LoopVectorize/AArch64/sve-widen-phi.ll | 59 + .../AArch64/veclib-calls-libsystem-darwin.ll | 724 + .../LoopVectorize/ARM/mve-known-trip-count.ll | 389 + .../X86/x86-interleaved-accesses-masked-group.ll | 12 +- .../LoopVectorize/reduction-inloop-pred.ll | 2 +- .../Transforms/LoopVectorize/reduction-inloop.ll | 2 +- llvm/test/Transforms/LoopVectorize/reduction.ll | 61 + .../scalable-first-order-recurrence.ll | 274 + .../LoopVectorize/scalable-reduction-inloop.ll | 60 + .../LoopVectorize/scev-during-mutation.ll | 77 + .../vplan-sink-scalars-and-merge-vf1.ll | 70 + .../LoopVectorize/vplan-sink-scalars-and-merge.ll | 223 + llvm/test/Transforms/PGOProfile/chr.ll | 2 +- .../PhaseOrdering/X86/vector-reductions.ll | 29 +- .../unsigned-multiply-overflow-check.ll | 6 +- .../Transforms/SCCP/ipsccp-preserve-analysis.ll | 1 - llvm/test/Transforms/SCCP/preserve-analysis.ll | 1 - .../SLPVectorizer/AArch64/gather-cost.ll | 2 +- .../test/Transforms/SLPVectorizer/AArch64/widen.ll | 152 + llvm/test/Transforms/SLPVectorizer/X86/pr44067.ll | 20 +- .../vectorizable-functions-inseltpoison.ll | 8 +- .../SLPVectorizer/vectorizable-functions.ll | 8 +- llvm/test/Transforms/SROA/basictest.ll | 174 +- llvm/test/Transforms/SROA/dead-inst.ll | 1 - llvm/test/Transforms/SROA/pointer-offset-size.ll | 2 +- llvm/test/Transforms/SROA/scalable-vectors.ll | 60 +- llvm/test/Transforms/SROA/slice-width.ll | 73 +- .../test/Transforms/SimplifyCFG/unprofitable-pr.ll | 63 +- .../Transforms/VectorCombine/load-insert-store.ll | 337 + llvm/test/tools/gold/X86/new-pm.ll | 2 +- .../llvm-cov/Inputs/compilation_dir.covmapping | Bin 0 -> 109 bytes ...xpansions.proftext => compilation_dir.proftext} | 0 llvm/test/tools/llvm-cov/branch-templates.cpp | 16 +- llvm/test/tools/llvm-cov/compilation_dir.c | 3 + llvm/test/tools/llvm-dis/multiple-files.ll | 10 + .../X86/locstats-for-absctract-origin-vars.yaml | 423 + .../X86/locstats-for-inlined-vars.yaml | 412 - .../tools/llvm-dwarfdump/X86/statistics-dwo.test | 2 +- .../tools/llvm-dwarfdump/X86/statistics-v3.test | 2 +- llvm/test/tools/llvm-dwarfdump/X86/statistics.ll | 2 +- .../X86/stats-scope-bytes-covered.yaml | 2 +- llvm/test/tools/llvm-dwarfdump/cmdline.test | 53 +- .../llvm-mca/X86/Znver3/dependency-breaking-gpr.s | 522 + .../tools/llvm-mca/X86/Znver3/one-idioms-avx-xmm.s | 386 + .../tools/llvm-mca/X86/Znver3/one-idioms-avx-ymm.s | 386 + .../tools/llvm-mca/X86/Znver3/one-idioms-mmx.s | 290 + .../tools/llvm-mca/X86/Znver3/one-idioms-sse-xmm.s | 386 + .../X86/Znver3/reg-move-elimination-avx-xmm.s | 1880 ++ .../X86/Znver3/reg-move-elimination-avx-ymm.s | 1880 ++ .../llvm-mca/X86/Znver3/reg-move-elimination-gpr.s | 1144 + .../llvm-mca/X86/Znver3/reg-move-elimination-mmx.s | 192 + .../X86/Znver3/reg-move-elimination-sse-xmm.s | 1880 ++ .../llvm-mca/X86/Znver3/reg-move-elimination-x87.s | 203 + .../tools/llvm-mca/X86/Znver3/resources-avx1.s | 50 +- .../tools/llvm-mca/X86/Znver3/resources-bmi2.s | 4 +- .../tools/llvm-mca/X86/Znver3/resources-sse1.s | 10 +- .../tools/llvm-mca/X86/Znver3/resources-sse2.s | 22 +- .../tools/llvm-mca/X86/Znver3/resources-x86_64.s | 18 +- .../tools/llvm-mca/X86/Znver3/zero-idioms-gpr.s | 450 + .../llvm-objcopy/ELF/add-symbol-no-symtab.test | 23 + .../tools/llvm-objcopy/ELF/only-keep-debug.test | 42 +- llvm/test/tools/llvm-objdump/MachO/bind.test | 19 +- .../tools/llvm-objdump/MachO/exports-trie.test | 18 +- llvm/test/tools/llvm-objdump/MachO/lazy-bind.test | 13 +- llvm/test/tools/llvm-objdump/MachO/rebase.test | 28 +- .../llvm-symbolizer/output-style-json-code.test | 63 + .../llvm-symbolizer/output-style-json-data.test | 38 + .../llvm-symbolizer/output-style-json-frame.ll | 68 + llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp | 3 +- llvm/tools/llvm-cov/CodeCoverage.cpp | 8 +- llvm/tools/llvm-cov/CoverageSummaryInfo.cpp | 6 +- llvm/tools/llvm-cov/CoverageSummaryInfo.h | 5 + llvm/tools/llvm-cov/CoverageViewOptions.h | 1 + llvm/tools/llvm-cov/TestingSupport.cpp | 18 +- llvm/tools/llvm-dis/llvm-dis.cpp | 114 +- llvm/tools/llvm-dwarfdump/Statistics.cpp | 177 +- llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp | 42 +- llvm/tools/llvm-dwp/llvm-dwp.cpp | 8 +- llvm/tools/llvm-exegesis/lib/Analysis.cpp | 5 +- llvm/tools/llvm-exegesis/lib/LlvmState.cpp | 6 +- llvm/tools/llvm-exegesis/lib/SnippetFile.cpp | 7 +- llvm/tools/llvm-jitlink/llvm-jitlink.cpp | 3 +- .../llvm-mc-assemble-fuzzer.cpp | 9 +- llvm/tools/llvm-mc/llvm-mc.cpp | 31 +- .../llvm-mca/Views/RegisterFileStatistics.cpp | 27 +- llvm/tools/llvm-mca/llvm-mca.cpp | 4 +- llvm/tools/llvm-ml/Disassembler.cpp | 15 +- llvm/tools/llvm-ml/llvm-ml.cpp | 12 +- llvm/tools/llvm-nm/llvm-nm.cpp | 47 +- llvm/tools/llvm-objcopy/ELF/Object.cpp | 25 +- llvm/tools/llvm-objdump/MachODump.cpp | 17 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 6 +- llvm/tools/llvm-opt-fuzzer/llvm-opt-fuzzer.cpp | 4 +- llvm/tools/llvm-profgen/ProfiledBinary.cpp | 4 +- llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp | 3 +- .../tools/llvm-rust-demangle-fuzzer/CMakeLists.txt | 10 + .../DummyDemanglerFuzzer.cpp | 0 .../llvm-rust-demangle-fuzzer.cpp | 21 + llvm/tools/llvm-symbolizer/Opts.td | 17 +- llvm/tools/llvm-symbolizer/llvm-symbolizer.cpp | 19 +- llvm/tools/obj2yaml/wasm2yaml.cpp | 2 +- llvm/tools/opt/NewPMDriver.cpp | 14 +- llvm/tools/opt/opt.cpp | 6 +- llvm/tools/sancov/sancov.cpp | 2 +- .../unittests/Analysis/AssumeBundleQueriesTest.cpp | 2 + llvm/unittests/Analysis/CGSCCPassManagerTest.cpp | 172 +- llvm/unittests/Analysis/LoopInfoTest.cpp | 47 + llvm/unittests/CodeGen/MachineInstrTest.cpp | 9 +- llvm/unittests/CodeGen/MachineOperandTest.cpp | 3 +- llvm/unittests/CodeGen/PassManagerTest.cpp | 13 +- llvm/unittests/CodeGen/TestAsmPrinter.cpp | 5 +- .../DebugInfo/DWARF/DWARFDebugFrameTest.cpp | 78 + llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp | 2 +- llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt | 1 + .../unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp | 30 +- llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp | 115 +- llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp | 35 +- llvm/unittests/IR/PassBuilderCallbacksTest.cpp | 9 +- llvm/unittests/IR/PassManagerTest.cpp | 38 +- llvm/unittests/IR/VPIntrinsicTest.cpp | 96 +- llvm/unittests/MC/DwarfLineTables.cpp | 11 +- llvm/unittests/MC/SystemZ/SystemZAsmLexerTest.cpp | 38 +- llvm/unittests/ProfileData/CoverageMappingTest.cpp | 35 +- llvm/unittests/TextAPI/TextStubV4Tests.cpp | 4 +- .../Transforms/Scalar/LoopPassManagerTest.cpp | 58 +- llvm/utils/TableGen/AsmMatcherEmitter.cpp | 10 +- llvm/utils/TableGen/AsmWriterEmitter.cpp | 3 +- llvm/utils/TableGen/CodeGenRegisters.cpp | 94 +- llvm/utils/TableGen/CodeGenSchedule.cpp | 131 +- llvm/utils/TableGen/CodeGenTarget.cpp | 4 +- llvm/utils/TableGen/DFAPacketizerEmitter.cpp | 4 +- llvm/utils/TableGen/ExegesisEmitter.cpp | 4 +- llvm/utils/TableGen/FastISelEmitter.cpp | 51 +- llvm/utils/TableGen/FixedLenDecoderEmitter.cpp | 10 +- llvm/utils/TableGen/GICombinerEmitter.cpp | 11 +- llvm/utils/TableGen/GlobalISelEmitter.cpp | 43 +- llvm/utils/TableGen/InstrInfoEmitter.cpp | 4 +- llvm/utils/TableGen/IntrinsicEmitter.cpp | 85 +- llvm/utils/TableGen/RISCVCompressInstEmitter.cpp | 4 +- llvm/utils/TableGen/RegisterInfoEmitter.cpp | 41 +- llvm/utils/TableGen/X86DisassemblerTables.cpp | 29 +- llvm/utils/UpdateTestChecks/common.py | 8 +- llvm/utils/gn/build/toolchain/BUILD.gn | 210 +- llvm/utils/gn/secondary/BUILD.gn | 4 +- .../clang-tools-extra/clang-tidy/altera/BUILD.gn | 1 + llvm/utils/gn/secondary/compiler-rt/BUILD.gn | 6 +- llvm/utils/gn/secondary/compiler-rt/lib/BUILD.gn | 14 +- llvm/utils/gn/secondary/compiler-rt/target.gni | 3 + llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 2 +- llvm/utils/gn/secondary/libcxx/src/BUILD.gn | 1 + llvm/utils/gn/secondary/lld/wasm/BUILD.gn | 1 + llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn | 1 + .../gn/secondary/llvm/lib/Target/AArch64/BUILD.gn | 11 + .../gn/secondary/llvm/lib/Target/X86/BUILD.gn | 2 + llvm/utils/lit/lit/llvm/config.py | 8 +- llvm/utils/lit/lit/util.py | 6 +- .../lit/tests/Inputs/use-tool-search-env/lit.cfg | 12 + .../lit/tests/Inputs/use-tool-search-env/test.tool | 0 .../true.txt | 0 llvm/utils/lit/tests/use-tool-search-env.py | 7 + llvm/utils/update_analyze_test_checks.py | 2 +- llvm/utils/update_llc_test_checks.py | 4 +- mlir/docs/DeclarativeRewrites.md | 23 +- mlir/docs/Tools/MLIRLSP.md | 3 + mlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp | 3 +- mlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp | 3 +- mlir/include/mlir-c/BuiltinTypes.h | 4 + mlir/include/mlir-c/Dialect/SparseTensor.h | 77 + mlir/include/mlir/Analysis/AffineAnalysis.h | 5 + mlir/include/mlir/Analysis/BufferAliasAnalysis.h | 59 - .../include/mlir/Analysis/BufferViewFlowAnalysis.h | 71 + mlir/include/mlir/Bindings/Python/PybindAdaptors.h | 428 + mlir/include/mlir/Dialect/Affine/Passes.td | 6 +- mlir/include/mlir/Dialect/Affine/Utils.h | 12 +- mlir/include/mlir/Dialect/ArmSVE/ArmSVE.td | 134 +- mlir/include/mlir/Dialect/GPU/GPUBase.td | 25 + mlir/include/mlir/Dialect/GPU/GPUDialect.h | 116 + mlir/include/mlir/Dialect/GPU/GPUOps.td | 128 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 20 +- mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td | 250 + .../mlir/Dialect/Linalg/IR/LinalgInterfaces.td | 13 - mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 4 - .../mlir/Dialect/Linalg/IR/LinalgStructuredOps.td | 7 +- .../mlir/Dialect/Linalg/Transforms/Transforms.h | 24 +- mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td | 8 +- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVModule.h | 30 - .../mlir/Dialect/SPIRV/Linking/ModuleCombiner.h | 13 +- mlir/include/mlir/Dialect/Shape/IR/Shape.h | 3 +- .../mlir/Dialect/SparseTensor/IR/SparseTensor.h | 8 + .../Dialect/SparseTensor/IR/SparseTensorOps.td | 58 +- .../mlir/Dialect/SparseTensor/Transforms/Passes.h | 26 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.h | 14 + mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td | 1 + mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td | 49 +- mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td | 2 + .../mlir/Dialect/Utils/StructuredOpsUtils.h | 15 - mlir/include/mlir/Dialect/Vector/VectorOps.h | 6 + mlir/include/mlir/IR/BuiltinAttributes.h | 20 +- mlir/include/mlir/IR/BuiltinAttributes.td | 2 +- mlir/include/mlir/IR/BuiltinTypes.td | 3 +- mlir/include/mlir/IR/DialectImplementation.h | 24 +- mlir/include/mlir/IR/FunctionImplementation.h | 7 +- mlir/include/mlir/IR/FunctionSupport.h | 317 +- mlir/include/mlir/IR/OpBase.td | 11 +- mlir/include/mlir/IR/OpImplementation.h | 18 +- mlir/include/mlir/IR/OperationSupport.h | 29 +- mlir/include/mlir/IR/PatternMatch.h | 24 +- mlir/include/mlir/Interfaces/ViewLikeInterface.h | 5 +- mlir/include/mlir/Interfaces/ViewLikeInterface.td | 3 +- mlir/include/mlir/Parser/AsmParserState.h | 4 + mlir/include/mlir/TableGen/CodeGenHelpers.h | 12 +- mlir/include/mlir/TableGen/Operator.h | 6 + .../include/mlir/Target/LLVMIR/ModuleTranslation.h | 98 + mlir/include/mlir/Target/SPIRV/Deserialization.h | 8 +- mlir/include/mlir/Transforms/BufferUtils.h | 6 +- mlir/include/mlir/Transforms/Bufferize.h | 2 +- mlir/include/mlir/Transforms/Passes.td | 1 + mlir/lib/Analysis/AffineAnalysis.cpp | 10 + mlir/lib/Analysis/BufferAliasAnalysis.cpp | 114 - mlir/lib/Analysis/BufferViewFlowAnalysis.cpp | 116 + mlir/lib/Analysis/CMakeLists.txt | 4 +- mlir/lib/Bindings/Python/CMakeLists.txt | 1 + mlir/lib/Bindings/Python/DialectLinalg.cpp | 12 +- mlir/lib/Bindings/Python/DialectLinalg.h | 22 - mlir/lib/Bindings/Python/DialectSparseTensor.cpp | 74 + mlir/lib/Bindings/Python/Dialects.h | 24 + mlir/lib/Bindings/Python/IRTypes.cpp | 16 +- mlir/lib/Bindings/Python/MainModule.cpp | 6 +- mlir/lib/CAPI/Dialect/CMakeLists.txt | 30 +- mlir/lib/CAPI/Dialect/SparseTensor.cpp | 71 + mlir/lib/CAPI/IR/BuiltinTypes.cpp | 4 + .../AffineToStandard/AffineToStandard.cpp | 43 - mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp | 4 +- mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.cpp | 2 +- .../SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp | 3 +- mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp | 6 +- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 32 +- mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp | 339 +- .../lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp | 10 +- .../Dialect/Affine/Transforms/SuperVectorize.cpp | 373 +- mlir/lib/Dialect/ArmSVE/IR/ArmSVEDialect.cpp | 15 + .../ArmSVE/Transforms/LegalizeForLLVMExport.cpp | 71 +- mlir/lib/Dialect/GPU/IR/GPUDialect.cpp | 229 +- .../Dialect/GPU/Transforms/AsyncRegionRewriter.cpp | 9 +- .../Dialect/GPU/Transforms/SerializeToHsaco.cpp | 4 +- mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 76 +- mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp | 220 +- mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 101 +- mlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp | 20 +- mlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp | 2 +- .../lib/Dialect/Linalg/Transforms/DropUnitDims.cpp | 5 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 28 +- .../Dialect/Linalg/Transforms/FusionOnTensors.cpp | 88 +- mlir/lib/Dialect/Linalg/Transforms/Interchange.cpp | 4 +- mlir/lib/Dialect/Linalg/Transforms/Loops.cpp | 90 +- mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp | 100 +- mlir/lib/Dialect/Linalg/Utils/Utils.cpp | 32 +- .../Math/Transforms/PolynomialApproximation.cpp | 57 +- mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp | 8 - mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp | 19 +- .../Linking/ModuleCombiner/ModuleCombiner.cpp | 2 +- .../Dialect/SPIRV/Transforms/SPIRVConversion.cpp | 2 +- mlir/lib/Dialect/Shape/IR/Shape.cpp | 37 +- .../SparseTensor/IR/SparseTensorDialect.cpp | 71 +- .../Transforms/SparseTensorConversion.cpp | 122 +- .../SparseTensor/Transforms/SparseTensorPasses.cpp | 65 +- .../SparseTensor/Transforms/Sparsification.cpp | 98 +- mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 47 + .../Dialect/StandardOps/Transforms/Bufferize.cpp | 28 +- .../Dialect/StandardOps/Transforms/ExpandOps.cpp | 18 +- mlir/lib/Dialect/Tensor/IR/TensorOps.cpp | 6 + mlir/lib/Dialect/Vector/VectorOps.cpp | 22 + mlir/lib/Dialect/Vector/VectorTransforms.cpp | 304 +- mlir/lib/ExecutionEngine/SparseUtils.cpp | 4 +- mlir/lib/IR/AsmPrinter.cpp | 73 +- mlir/lib/IR/BuiltinDialect.cpp | 61 +- mlir/lib/IR/Diagnostics.cpp | 2 +- mlir/lib/IR/FunctionImplementation.cpp | 143 +- mlir/lib/IR/FunctionSupport.cpp | 216 +- mlir/lib/IR/OperationSupport.cpp | 5 +- mlir/lib/Interfaces/ViewLikeInterface.cpp | 3 +- mlir/lib/Parser/AsmParserState.cpp | 6 + mlir/lib/Parser/DialectSymbolParser.cpp | 2 +- mlir/lib/Parser/Parser.cpp | 24 +- mlir/lib/Parser/Parser.h | 2 +- mlir/lib/Rewrite/PatternApplicator.cpp | 6 + mlir/lib/Support/MlirOptMain.cpp | 1 - mlir/lib/TableGen/Operator.cpp | 9 +- mlir/lib/TableGen/Pattern.cpp | 52 +- mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp | 17 +- .../Dialect/NVVM/NVVMToLLVMIRTranslation.cpp | 1 + .../Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp | 105 +- mlir/lib/Target/LLVMIR/ModuleTranslation.cpp | 35 +- .../SPIRV/Deserialization/Deserialization.cpp | 8 +- .../Target/SPIRV/Deserialization/Deserializer.cpp | 29 +- .../Target/SPIRV/Deserialization/Deserializer.h | 13 +- mlir/lib/Target/SPIRV/Serialization/Serializer.cpp | 20 +- mlir/lib/Target/SPIRV/TranslateRegistration.cpp | 6 +- mlir/lib/Tools/mlir-lsp-server/LSPServer.cpp | 19 + mlir/lib/Tools/mlir-lsp-server/MLIRServer.cpp | 267 +- mlir/lib/Tools/mlir-lsp-server/MLIRServer.h | 5 + mlir/lib/Tools/mlir-lsp-server/lsp/Protocol.cpp | 39 + mlir/lib/Tools/mlir-lsp-server/lsp/Protocol.h | 35 + mlir/lib/Transforms/BufferDeallocation.cpp | 4 +- mlir/lib/Transforms/BufferOptimizations.cpp | 4 +- mlir/lib/Transforms/LoopFusion.cpp | 4 + mlir/lib/Transforms/Utils/DialectConversion.cpp | 8 +- mlir/python/mlir/_cext_loader.py | 5 +- mlir/python/mlir/dialects/_linalg_ops_ext.py | 4 +- .../mlir/dialects/linalg/opdsl/lang/emitter.py | 15 +- mlir/python/mlir/dialects/sparse_tensor.py | 7 + mlir/test/CAPI/CMakeLists.txt | 64 +- mlir/test/CAPI/ir.c | 3 +- mlir/test/CAPI/sparse_tensor.c | 81 + mlir/test/CMakeLists.txt | 1 + .../StandardToLLVM/convert-static-memref-ops.mlir | 4 +- mlir/test/Conversion/StandardToSPIRV/alloc.mlir | 4 +- .../Conversion/TosaToLinalg/tosa-to-linalg.mlir | 55 +- mlir/test/Conversion/VectorToSPIRV/simple.mlir | 2 + .../Affine/SuperVectorize/vectorize_1d.mlir | 21 + .../Affine/SuperVectorize/vectorize_reduction.mlir | 468 + .../SuperVectorize/vectorize_reduction_2d.mlir | 24 + mlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir | 49 +- mlir/test/Dialect/ArmSVE/roundtrip.mlir | 47 + mlir/test/Dialect/GPU/invalid.mlir | 113 + mlir/test/Dialect/GPU/ops.mlir | 11 + mlir/test/Dialect/LLVMIR/func.mlir | 20 +- mlir/test/Dialect/LLVMIR/global.mlir | 6 + mlir/test/Dialect/LLVMIR/invalid.mlir | 166 +- mlir/test/Dialect/Linalg/bufferize.mlir | 19 +- .../Linalg/canonicalize-duplicate-inputs.mlir | 4 +- mlir/test/Dialect/Linalg/canonicalize.mlir | 33 + mlir/test/Dialect/Linalg/detensorize_trivial.mlir | 4 +- .../test/Dialect/Linalg/drop-unit-extent-dims.mlir | 24 + .../Dialect/Linalg/fusion-indexed-generic.mlir | 353 - mlir/test/Dialect/Linalg/fusion-indexed.mlir | 162 + mlir/test/Dialect/Linalg/fusion-push-reshape.mlir | 36 + mlir/test/Dialect/Linalg/fusion-tensor.mlir | 43 +- mlir/test/Dialect/Linalg/loops.mlir | 127 - mlir/test/Dialect/Linalg/reshape_fusion.mlir | 37 +- mlir/test/Dialect/Linalg/tile-and-distribute.mlir | 36 +- mlir/test/Dialect/Linalg/tile-indexed-generic.mlir | 108 - mlir/test/Dialect/Linalg/tile-tensors.mlir | 47 - .../Dialect/Math/polynomial-approximation.mlir | 324 +- mlir/test/Dialect/MemRef/ops.mlir | 16 + mlir/test/Dialect/Shape/canonicalize.mlir | 17 +- mlir/test/Dialect/SparseTensor/conversion.mlir | 137 +- mlir/test/Dialect/SparseTensor/invalid.mlir | 87 + .../Dialect/SparseTensor/invalid_encoding.mlir | 2 +- mlir/test/Dialect/SparseTensor/roundtrip.mlir | 56 +- .../Dialect/SparseTensor/roundtrip_encoding.mlir | 4 +- mlir/test/Dialect/SparseTensor/sparse_1d.mlir | 496 +- mlir/test/Dialect/SparseTensor/sparse_2d.mlir | 852 +- mlir/test/Dialect/SparseTensor/sparse_3d.mlir | 608 +- mlir/test/Dialect/SparseTensor/sparse_invalid.mlir | 186 - mlir/test/Dialect/SparseTensor/sparse_lower.mlir | 66 +- mlir/test/Dialect/SparseTensor/sparse_nd.mlir | 33 +- .../test/Dialect/SparseTensor/sparse_parallel.mlir | 29 +- mlir/test/Dialect/SparseTensor/sparse_storage.mlir | 188 +- mlir/test/Dialect/SparseTensor/sparse_vector.mlir | 231 +- mlir/test/Dialect/Standard/bufferize.mlir | 13 + mlir/test/Dialect/Standard/expand-ops.mlir | 18 +- mlir/test/Dialect/Tensor/canonicalize.mlir | 12 + mlir/test/Dialect/Tosa/ops.mlir | 15 +- .../Vector/vector-transfer-full-partial-split.mlir | 207 +- mlir/test/Dialect/Vector/vector-transforms.mlir | 48 + mlir/test/IR/invalid-func-op.mlir | 19 + mlir/test/IR/test-func-set-type.mlir | 2 - .../Dialect/SparseTensor/CPU/sparse_matvec.mlir | 65 +- .../SparseTensor/CPU/sparse_sampled_matmul.mlir | 56 +- .../Dialect/SparseTensor/CPU/sparse_sum.mlir | 50 +- mlir/test/Target/LLVMIR/arm-sve.mlir | 67 + mlir/test/Target/LLVMIR/import.ll | 10 +- mlir/test/Target/LLVMIR/llvmir-invalid.mlir | 2 +- mlir/test/Target/LLVMIR/llvmir.mlir | 12 +- mlir/test/Target/LLVMIR/nvvmir.mlir | 37 + mlir/test/Target/LLVMIR/openmp-llvm.mlir | 111 + mlir/test/Target/SPIRV/phi.mlir | 57 + mlir/test/Transforms/buffer-deallocation.mlir | 37 + mlir/test/Transforms/loop-fusion.mlir | 183 + .../lib/Dialect/SPIRV/TestGLSLCanonicalization.cpp | 1 - mlir/test/lib/Dialect/SPIRV/TestModuleCombiner.cpp | 2 +- mlir/test/lib/Dialect/Test/TestOps.td | 21 +- mlir/test/lib/Dialect/Test/TestPatterns.cpp | 9 + mlir/test/lib/Transforms/TestLinalgTransforms.cpp | 13 +- .../mlir-cpu-runner/math_polynomial_approx.mlir | 35 + mlir/test/mlir-lsp-server/hover.test | 109 + mlir/test/mlir-lsp-server/initialize-params.test | 1 + mlir/test/mlir-tblgen/dialect.td | 17 + mlir/test/mlir-tblgen/pattern.mlir | 14 + mlir/test/mlir-tblgen/rewriter-errors.td | 16 +- mlir/test/python/dialects/linalg/ops.py | 13 +- mlir/test/python/dialects/sparse_tensor/dialect.py | 90 + mlir/test/python/ir/builtin_types.py | 3 + mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 6 +- mlir/tools/mlir-tblgen/RewriterGen.cpp | 38 +- .../Dialect/SPIRV/DeserializationTest.cpp | 3 +- mlir/unittests/Dialect/SPIRV/SerializationTest.cpp | 3 +- openmp/CMakeLists.txt | 16 - openmp/README.rst | 9 + openmp/docs/SupportAndFAQ.rst | 80 +- .../Modules/LibomptargetGetDependencies.cmake | 44 +- .../libomptarget/deviceRTLs/amdgcn/CMakeLists.txt | 49 +- .../deviceRTLs/amdgcn/src/target_impl.hip | 29 +- openmp/libomptarget/plugins/amdgpu/CMakeLists.txt | 22 + openmp/libomptarget/plugins/amdgpu/impl/atmi.h | 32 +- openmp/libomptarget/plugins/amdgpu/impl/data.cpp | 17 +- openmp/libomptarget/plugins/amdgpu/impl/internal.h | 14 +- openmp/libomptarget/plugins/amdgpu/impl/system.cpp | 110 +- openmp/libomptarget/plugins/amdgpu/src/rtl.cpp | 31 +- .../plugins/common/MemoryManager/MemoryManager.h | 4 +- .../plugins/cuda/dynamic_cuda/cuda.cpp | 5 +- .../libomptarget/plugins/cuda/dynamic_cuda/cuda.h | 12 +- openmp/libomptarget/plugins/cuda/src/rtl.cpp | 87 +- openmp/libomptarget/src/CMakeLists.txt | 32 +- .../test/api/omp_device_managed_memory.c | 29 + .../libomptarget/test/api/omp_host_pinned_memory.c | 33 + openmp/runtime/src/CMakeLists.txt | 4 +- openmp/runtime/src/dllexports | 3 + openmp/runtime/src/kmp.h | 17 +- openmp/runtime/src/kmp_affinity.cpp | 32 +- openmp/runtime/src/kmp_atomic.cpp | 33 + openmp/runtime/src/kmp_os.h | 130 +- openmp/runtime/src/kmp_platform.h | 3 + openmp/runtime/src/kmp_runtime.cpp | 3 + openmp/runtime/src/z_Windows_NT-586_util.cpp | 79 +- polly/lib/Analysis/ScopDetectionDiagnostic.cpp | 2 +- polly/lib/Analysis/ScopPass.cpp | 4 + polly/lib/Support/RegisterPasses.cpp | 12 +- 2293 files changed, 1203385 insertions(+), 79518 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/altera/IdDependentBackwardBranchCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/altera/IdDependentBackwardBranchCheck.h create mode 100644 clang-tools-extra/clangd/test/remote-index/result-limiting.test create mode 100644 clang-tools-extra/docs/clang-tidy/checks/altera-id-dependent-ba [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/altera-id-dependent- [...] create mode 100644 clang/test/CodeCompletion/crash-if-directive.cpp create mode 100644 clang/test/CodeGen/RISCV/rvv_errors.c create mode 100644 clang/test/CodeGen/aix-tls-model.cpp create mode 100644 clang/test/CodeGen/arm-ha-alignstack.c copy clang-tools-extra/clangd/test/Inputs/background-index/sub_dir/compile_flags.t [...] create mode 100644 clang/test/Driver/print-resource-dir.c create mode 100644 clang/test/Driver/print-runtime-dir.c create mode 100644 clang/test/Headers/Inputs/include/new create mode 100644 clang/test/Headers/target_include_new.cpp delete mode 100644 clang/test/OpenMP/declare_target_device_only_compilation.cpp create mode 100644 clang/test/OpenMP/declare_target_only_one_side_compilation.cpp create mode 100644 clang/test/OpenMP/reduction_compound_op.cpp create mode 100644 clang/test/Sema/aix-attr-tls_model.c create mode 100644 clang/test/Sema/pointer-addition.cpp create mode 100644 compiler-rt/lib/orc/extensible_rtti.cpp create mode 100644 compiler-rt/lib/orc/extensible_rtti.h delete mode 100644 compiler-rt/lib/orc/placeholder.cpp create mode 100644 compiler-rt/lib/orc/unittests/CMakeLists.txt create mode 100644 compiler-rt/lib/orc/unittests/extensible_rtti_test.cpp create mode 100644 compiler-rt/lib/orc/unittests/orc_unit_test_main.cpp delete mode 100644 compiler-rt/test/dfsan/interceptors.c create mode 100644 compiler-rt/test/dfsan/mmap_at_init.c create mode 100644 compiler-rt/test/fuzzer/StackOverflowTest.cpp create mode 100644 compiler-rt/test/fuzzer/stack-overflow-with-asan.test create mode 100644 compiler-rt/test/hwasan/TestCases/Linux/create-thread-stress.cpp delete mode 100644 compiler-rt/test/msan/setlocale.cpp create mode 100644 compiler-rt/test/sanitizer_common/TestCases/setlocale.cpp create mode 100644 compiler-rt/test/scudo/standalone/unit/gwp_asan/lit.site.cfg.py.in create mode 100644 compiler-rt/test/tsan/Linux/syscall.cpp create mode 100644 compiler-rt/test/tsan/Linux/syscall.h create mode 100644 compiler-rt/test/tsan/signal_block2.cpp create mode 100644 flang/runtime/namelist.cpp create mode 100644 flang/runtime/namelist.h create mode 100644 flang/test/Semantics/array-constr-big.f90 create mode 100644 flang/test/Semantics/omp-nested-simd.f90 create mode 100644 flang/unittests/RuntimeGTest/Namelist.cpp create mode 100644 libc/cmake/modules/LLVMLibCArchitectures.cmake delete mode 100644 libc/src/string/aarch64/CMakeLists.txt delete mode 100644 libc/src/string/x86/CMakeLists.txt rename libc/src/string/{x86 => x86_64}/memcpy.cpp (100%) create mode 100644 libcxx/include/__ranges/empty.h delete mode 100644 libcxx/include/__sso_allocator create mode 100644 libcxx/src/include/sso_allocator.h delete mode 100644 libcxx/test/libcxx/containers/sequences/list/list.cons/db_move. [...] create mode 100644 libcxx/test/libcxx/containers/sequences/vector/db_cindex_2.pass.cpp delete mode 100644 libcxx/test/libcxx/containers/unord/unord.map/db_move.pass.cpp delete mode 100644 libcxx/test/libcxx/containers/unord/unord.multimap/db_move.pass.cpp delete mode 100644 libcxx/test/libcxx/containers/unord/unord.multiset/db_move.pass.cpp delete mode 100644 libcxx/test/libcxx/containers/unord/unord.set/db_move.pass.cpp create mode 100644 libcxx/test/libcxx/strings/basic.string/string.modifiers/clear_ [...] delete mode 100644 libcxx/test/libcxx/strings/basic.string/string.modifiers/clear_ [...] create mode 100644 libcxx/test/libcxx/strings/basic.string/string.modifiers/erase_ [...] create mode 100644 libcxx/test/libcxx/strings/basic.string/string.modifiers/erase_ [...] create mode 100644 libcxx/test/libcxx/strings/basic.string/string.modifiers/erase_ [...] create mode 100644 libcxx/test/libcxx/strings/basic.string/string.modifiers/erase_ [...] create mode 100644 libcxx/test/libcxx/strings/basic.string/string.modifiers/erase_ [...] create mode 100644 libcxx/test/libcxx/strings/basic.string/string.modifiers/erase_ [...] create mode 100644 libcxx/test/libcxx/utilities/memory/pointer.conversion/to_addre [...] create mode 100644 libcxx/test/libcxx/utilities/memory/pointer.conversion/to_addre [...] delete mode 100644 libcxx/test/std/language.support/cmp/cmp.strongeq/cmp.strongeq. [...] delete mode 100644 libcxx/test/std/language.support/cmp/cmp.weakeq/cmp.weakeq.pass.cpp create mode 100644 libcxx/test/std/ranges/range.access/range.prim/empty.incomplete [...] create mode 100644 libcxx/test/std/ranges/range.access/range.prim/empty.pass.cpp create mode 100644 libcxx/test/std/thread/futures/futures.task/futures.task.nonmem [...] delete mode 100644 libcxx/test/std/thread/futures/futures.task/futures.task.nonmem [...] create mode 100644 libcxx/test/std/utilities/memory/pointer.conversion/to_address_ [...] create mode 100644 libcxx/test/std/utilities/memory/storage.iterator/deprecated.ve [...] create mode 100644 lld/test/COFF/stack-drectve.s create mode 100644 lld/test/ELF/ppc64-pcrel-cross-link.s create mode 100644 lld/test/MachO/arm-branch-relocs.s create mode 100644 lld/test/MachO/sectalign.s create mode 100644 lld/test/MachO/weak-definition-gc.s create mode 100644 lld/test/MachO/zippered.yaml create mode 100644 lld/test/wasm/merge-string.s delete mode 100644 lld/test/wasm/reloc-addend.ll create mode 100644 lld/test/wasm/reloc-addend.s create mode 100644 lld/test/wasm/tls-export.s create mode 100644 lld/wasm/OutputSegment.cpp delete mode 100644 lldb/include/lldb/Host/windows/editlinewin.h delete mode 100644 lldb/source/Host/windows/EditLineWin.cpp create mode 100644 lldb/test/Shell/Register/Core/x86-32-freebsd-fp.test create mode 100644 lldb/unittests/API/SBStructuredDataTest.cpp create mode 100644 llvm/lib/CodeGen/MIRYamlMapping.cpp create mode 100644 llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp create mode 100644 llvm/lib/Target/X86/X86FastTileConfig.cpp create mode 100644 llvm/lib/Target/X86/X86PreAMXConfig.cpp create mode 100644 llvm/test/Analysis/BasicAA/noalias-inttoptr.ll create mode 100644 llvm/test/Analysis/CostModel/X86/bswap-store.ll copy llvm/test/Analysis/CostModel/X86/{bswap.ll => bswap-vec.ll} (100%) create mode 100644 llvm/test/Analysis/CostModel/X86/load-bswap.ll create mode 100644 llvm/test/Bitcode/upgrade-masked-keep-metadata.ll create mode 100644 llvm/test/Bitcode/upgrade-void-ret-attr-11.0.ll create mode 100644 llvm/test/Bitcode/upgrade-void-ret-attr-11.0.ll.bc create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/lower-neon-vector-fcmp.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-tru [...] create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/select-neon-vector-fcmp.mir delete mode 100644 llvm/test/CodeGen/AArch64/combine-loads.ll create mode 100644 llvm/test/CodeGen/AArch64/elf-preemption.ll create mode 100644 llvm/test/CodeGen/AArch64/semantic-interposition-asm.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-fixed-length-bitcast.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-fpext-load.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-logical-imm.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-unpred-form.ll create mode 100644 llvm/test/CodeGen/AArch64/sve2-intrinsics-int-arith-imm.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uniform-load- [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-widen-scalar- [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll create mode 100644 llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.perm.ll create mode 100644 llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx90a.mir create mode 100644 llvm/test/CodeGen/AMDGPU/sink-image-sample.ll create mode 100644 llvm/test/CodeGen/AMDGPU/waitcnt-preexisting-vscnt.mir create mode 100644 llvm/test/CodeGen/ARM/atomicrmw_exclusive_monitor_ints.ll create mode 100644 llvm/test/CodeGen/ARM/ha-alignstack-call.ll create mode 100644 llvm/test/CodeGen/ARM/ha-alignstack.ll create mode 100644 llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-4.ll create mode 100644 llvm/test/CodeGen/Generic/replace-intrinsics-with-veclib-darwin [...] create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/vector-align-tbaa.ll create mode 100644 llvm/test/CodeGen/Hexagon/isel-memory-vNi1.ll delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_FMI.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_FMR.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_RFRI.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_RFRRF.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_RFRR_EAd.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxCMP_RI.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxCMP_RR.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxDiMu.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxExt.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxNEG.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Bits/Classes/MxBTST_MI.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Bits/Classes/MxBTST_MR.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Bits/Classes/MxBTST_RI.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Bits/Classes/MxBTST_RR.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Control/Classes/MxJMP.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Control/Classes/MxNOP.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Control/Classes/MxRTS.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Control/Classes/MxScc.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxLEA.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMoveCCR.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_MI.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_RI.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Relocations/data-abs.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Relocations/data-gotoff.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Relocations/data-gotpcrel.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Relocations/data-pc-rel.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/Relocations/text-plt.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/ShiftRotate/Classes/MxSR_DD.mir delete mode 100644 llvm/test/CodeGen/M68k/Encoding/ShiftRotate/Classes/MxSR_DI.mir create mode 100644 llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index-invalid-fixed- [...] create mode 100644 llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index-invalid-stack.mir create mode 100644 llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index-no-stack.mir create mode 100644 llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index.mir create mode 100644 llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index2.mir create mode 100644 llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-filename-special-character-double [...] create mode 100644 llvm/test/CodeGen/PowerPC/aix-filename-special-character-single [...] create mode 100644 llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll create mode 100644 llvm/test/CodeGen/PowerPC/frame_index_scavenging.mir create mode 100644 llvm/test/CodeGen/PowerPC/stack_pointer_vec_spills.mir create mode 100644 llvm/test/CodeGen/PowerPC/vec-extract-itofp.ll create mode 100644 llvm/test/CodeGen/RISCV/elf-preemption.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-int.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnsra-vnsrl.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/select-fp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/select-int.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vand-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vor-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/zvlsseg-spill.mir create mode 100644 llvm/test/CodeGen/Thumb2/mve-tp-loop.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-tp-loop.mir create mode 100644 llvm/test/CodeGen/WebAssembly/global-get.ll create mode 100644 llvm/test/CodeGen/WebAssembly/global-set.ll create mode 100644 llvm/test/CodeGen/X86/64-bit-shift-by-32-minus-y.ll create mode 100644 llvm/test/CodeGen/X86/AMX/amx-configO0toO0.ll create mode 100644 llvm/test/CodeGen/X86/AMX/amx-configO2toO0-lower.ll create mode 100644 llvm/test/CodeGen/X86/AMX/amx-configO2toO0-precfg.ll create mode 100644 llvm/test/CodeGen/X86/AMX/amx-configO2toO0.ll create mode 100644 llvm/test/CodeGen/X86/AMX/amx-fast-tile-config.mir create mode 100644 llvm/test/CodeGen/X86/horizontal-shuffle-4.ll create mode 100644 llvm/test/CodeGen/X86/lea-opt2.ll create mode 100644 llvm/test/CodeGen/X86/mismatched-byval.ll create mode 100644 llvm/test/CodeGen/X86/pr50254.ll create mode 100644 llvm/test/CodeGen/X86/statepoint-fastregalloc.mir create mode 100644 llvm/test/DebugInfo/AMDGPU/cfi.ll create mode 100644 llvm/test/DebugInfo/ARM/machine-cp-updates-dbg-reg.mir create mode 100644 llvm/test/DebugInfo/X86/invalidated-dbg-value-is-undef.ll create mode 100644 llvm/test/DebugInfo/X86/live-debug-vars-loc-limit.ll delete mode 100644 llvm/test/MC/AArch64/arm64-tls-relocs.s create mode 100644 llvm/test/MC/ARM/thumb_func-implies-thumb.s create mode 100644 llvm/test/MC/ELF/AMDGPU/cfi.s create mode 100644 llvm/test/MC/ELF/AMDGPU/lit.local.cfg create mode 100644 llvm/test/MC/M68k/Arith/Classes/MxBiArOp_FMI.s create mode 100644 llvm/test/MC/M68k/Arith/Classes/MxBiArOp_FMR.s create mode 100644 llvm/test/MC/M68k/Arith/Classes/MxBiArOp_RFRI.s create mode 100644 llvm/test/MC/M68k/Arith/Classes/MxBiArOp_RFRRF.s create mode 100644 llvm/test/MC/M68k/Arith/Classes/MxBiArOp_RFRR_EAd.s create mode 100644 llvm/test/MC/M68k/Arith/Classes/MxCMP_RI.s create mode 100644 llvm/test/MC/M68k/Arith/Classes/MxCMP_RR.s create mode 100644 llvm/test/MC/M68k/Arith/Classes/MxDiMu.s create mode 100644 llvm/test/MC/M68k/Arith/Classes/MxExt.s create mode 100644 llvm/test/MC/M68k/Arith/Classes/MxNEG.s create mode 100644 llvm/test/MC/M68k/Bits/Classes/MxBTST_MI.s create mode 100644 llvm/test/MC/M68k/Bits/Classes/MxBTST_MR.s create mode 100644 llvm/test/MC/M68k/Bits/Classes/MxBTST_RI.s create mode 100644 llvm/test/MC/M68k/Bits/Classes/MxBTST_RR.s create mode 100644 llvm/test/MC/M68k/Control/Classes/MxJMP.s create mode 100644 llvm/test/MC/M68k/Control/Classes/MxNOP.s create mode 100644 llvm/test/MC/M68k/Control/Classes/MxRTS.s create mode 100644 llvm/test/MC/M68k/Control/Classes/MxScc.s create mode 100644 llvm/test/MC/M68k/Data/Classes/MxLEA.s create mode 100644 llvm/test/MC/M68k/Data/Classes/MxMoveCCR.s create mode 100644 llvm/test/MC/M68k/Data/Classes/MxMove_MI.s create mode 100644 llvm/test/MC/M68k/Data/Classes/MxMove_RI.s create mode 100644 llvm/test/MC/M68k/Relocations/data-abs.s create mode 100644 llvm/test/MC/M68k/Relocations/data-gotoff.s create mode 100644 llvm/test/MC/M68k/Relocations/data-gotpcrel.s create mode 100644 llvm/test/MC/M68k/Relocations/data-pc-rel.s create mode 100644 llvm/test/MC/M68k/Relocations/text-plt.s create mode 100644 llvm/test/MC/M68k/ShiftRotate/Classes/MxSR_DD.s create mode 100644 llvm/test/MC/M68k/ShiftRotate/Classes/MxSR_DI.s create mode 100644 llvm/test/MC/WebAssembly/section-flags-changed.s create mode 100644 llvm/test/Other/new-pass-manager-cgscc-fct-proxy.ll create mode 100644 llvm/test/Other/pr49950.ll delete mode 100644 llvm/test/Transforms/ArgumentPromotion/tail.ll delete mode 100644 llvm/test/Transforms/GlobalOpt/heap-sra-3-no-null-opt.ll delete mode 100644 llvm/test/Transforms/GlobalOpt/heap-sra-3.ll delete mode 100644 llvm/test/Transforms/GlobalOpt/heap-sra-4-no-null-opt.ll delete mode 100644 llvm/test/Transforms/GlobalOpt/heap-sra-4.ll create mode 100644 llvm/test/Transforms/Inline/pr50270.ll delete mode 100644 llvm/test/Transforms/InstCombine/load-insert-store.ll create mode 100644 llvm/test/Transforms/InstCombine/masked_intrinsics_keep_metadata.ll create mode 100644 llvm/test/Transforms/InstCombine/scalable-select.ll create mode 100644 llvm/test/Transforms/InstSimplify/ConstProp/AMDGPU/perm.ll create mode 100644 llvm/test/Transforms/JumpThreading/insert-placeholder-to-preven [...] delete mode 100644 llvm/test/Transforms/LICM/invariant.group.ll create mode 100644 llvm/test/Transforms/LoopIdiom/X86/logical-right-shift-until-ze [...] create mode 100644 llvm/test/Transforms/LoopIdiom/X86/logical-right-shift-until-ze [...] create mode 100644 llvm/test/Transforms/LoopIdiom/X86/logical-right-shift-until-zero.ll create mode 100644 llvm/test/Transforms/LoopInterchange/inner-indvar-depend-on-out [...] create mode 100644 llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence.ll create mode 100644 llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsyst [...] create mode 100644 llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll create mode 100644 llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll create mode 100644 llvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll create mode 100644 llvm/test/Transforms/LoopVectorize/scev-during-mutation.ll create mode 100644 llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge-vf1.ll create mode 100644 llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/AArch64/widen.ll create mode 100644 llvm/test/Transforms/VectorCombine/load-insert-store.ll create mode 100644 llvm/test/tools/llvm-cov/Inputs/compilation_dir.covmapping copy llvm/test/tools/llvm-cov/Inputs/{combine_expansions.proftext => compilation_d [...] create mode 100644 llvm/test/tools/llvm-cov/compilation_dir.c create mode 100644 llvm/test/tools/llvm-dis/multiple-files.ll create mode 100644 llvm/test/tools/llvm-dwarfdump/X86/locstats-for-absctract-origi [...] delete mode 100644 llvm/test/tools/llvm-dwarfdump/X86/locstats-for-inlined-vars.yaml create mode 100644 llvm/test/tools/llvm-mca/X86/Znver3/dependency-breaking-gpr.s create mode 100644 llvm/test/tools/llvm-mca/X86/Znver3/one-idioms-avx-xmm.s create mode 100644 llvm/test/tools/llvm-mca/X86/Znver3/one-idioms-avx-ymm.s create mode 100644 llvm/test/tools/llvm-mca/X86/Znver3/one-idioms-mmx.s create mode 100644 llvm/test/tools/llvm-mca/X86/Znver3/one-idioms-sse-xmm.s create mode 100644 llvm/test/tools/llvm-mca/X86/Znver3/reg-move-elimination-avx-xmm.s create mode 100644 llvm/test/tools/llvm-mca/X86/Znver3/reg-move-elimination-avx-ymm.s create mode 100644 llvm/test/tools/llvm-mca/X86/Znver3/reg-move-elimination-gpr.s create mode 100644 llvm/test/tools/llvm-mca/X86/Znver3/reg-move-elimination-mmx.s create mode 100644 llvm/test/tools/llvm-mca/X86/Znver3/reg-move-elimination-sse-xmm.s create mode 100644 llvm/test/tools/llvm-mca/X86/Znver3/reg-move-elimination-x87.s create mode 100644 llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-gpr.s create mode 100644 llvm/test/tools/llvm-symbolizer/output-style-json-code.test create mode 100644 llvm/test/tools/llvm-symbolizer/output-style-json-data.test create mode 100644 llvm/test/tools/llvm-symbolizer/output-style-json-frame.ll create mode 100644 llvm/tools/llvm-rust-demangle-fuzzer/CMakeLists.txt copy llvm/tools/{llvm-itanium-demangle-fuzzer => llvm-rust-demangle-fuzzer}/DummyD [...] create mode 100644 llvm/tools/llvm-rust-demangle-fuzzer/llvm-rust-demangle-fuzzer.cpp create mode 100644 llvm/utils/lit/tests/Inputs/use-tool-search-env/lit.cfg copy clang-tools-extra/clangd/test/Inputs/background-index/sub_dir/compile_flags.t [...] copy llvm/utils/lit/tests/Inputs/{standalone-tests-with-excludes => use-tool-searc [...] create mode 100644 llvm/utils/lit/tests/use-tool-search-env.py create mode 100644 mlir/include/mlir-c/Dialect/SparseTensor.h delete mode 100644 mlir/include/mlir/Analysis/BufferAliasAnalysis.h create mode 100644 mlir/include/mlir/Analysis/BufferViewFlowAnalysis.h create mode 100644 mlir/include/mlir/Bindings/Python/PybindAdaptors.h delete mode 100644 mlir/include/mlir/Dialect/SPIRV/IR/SPIRVModule.h delete mode 100644 mlir/lib/Analysis/BufferAliasAnalysis.cpp create mode 100644 mlir/lib/Analysis/BufferViewFlowAnalysis.cpp delete mode 100644 mlir/lib/Bindings/Python/DialectLinalg.h create mode 100644 mlir/lib/Bindings/Python/DialectSparseTensor.cpp create mode 100644 mlir/lib/Bindings/Python/Dialects.h create mode 100644 mlir/lib/CAPI/Dialect/SparseTensor.cpp create mode 100644 mlir/python/mlir/dialects/sparse_tensor.py create mode 100644 mlir/test/CAPI/sparse_tensor.c create mode 100644 mlir/test/Dialect/Affine/SuperVectorize/vectorize_reduction.mlir create mode 100644 mlir/test/Dialect/Affine/SuperVectorize/vectorize_reduction_2d.mlir delete mode 100644 mlir/test/Dialect/Linalg/fusion-indexed-generic.mlir create mode 100644 mlir/test/Dialect/Linalg/fusion-indexed.mlir delete mode 100644 mlir/test/Dialect/Linalg/tile-indexed-generic.mlir create mode 100644 mlir/test/Dialect/SparseTensor/invalid.mlir delete mode 100644 mlir/test/Dialect/SparseTensor/sparse_invalid.mlir create mode 100644 mlir/test/mlir-lsp-server/hover.test create mode 100644 mlir/test/python/dialects/sparse_tensor/dialect.py create mode 100644 openmp/libomptarget/test/api/omp_device_managed_memory.c create mode 100644 openmp/libomptarget/test/api/omp_host_pinned_memory.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-master-arm-check_binutils updated (d0cc53fa -> 09d3d175)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-arm-check_binutils in repository toolchain/ci/base-artifacts. from d0cc53fa 4: update: binutils-2d4b49864eba70606b1bee3d0a3e8414189dcd6d: 1 new 09d3d175 5: reset: binutils-d8147d7053fa848f7f1ce6692c6788224d14869d: 1 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 85 +- 02-prepare_abe/console.log | 398 +- 03-build_abe-binutils/console.log | 18113 +++++++++++----------- 04-build_abe-check_binutils/console.log | 4943 +++--- 05-check_regression/console.log | 139 +- 05-check_regression/results.regressions | 22 +- 05-check_regression/trigger-bisect | 3 + 06-update_baseline/console.log | 740 +- 06-update_baseline/results.regressions | 136 +- console.log | 24448 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- reset-baseline | 0 results | 52 + sumfiles/binutils.log.xz | Bin 40188 -> 40104 bytes sumfiles/binutils.sum | 2 +- sumfiles/gas.log.xz | Bin 95504 -> 95524 bytes sumfiles/gas.sum | 4 +- sumfiles/ld.log.xz | Bin 117740 -> 117988 bytes sumfiles/ld.sum | 10 +- sumfiles/libctf.log.xz | Bin 2232 -> 2232 bytes sumfiles/libctf.sum | 2 +- 21 files changed, 24010 insertions(+), 25099 deletions(-) create mode 100644 05-check_regression/trigger-bisect create mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-next-defconfig updated (ffa090bc56 -> e58c7a3bba)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-next-defconfig in repository toolchain/ci/qemu. from ffa090bc56 target/s390x: fix s390_probe_access to check PAGE_WRITE_ORG [...] adds 5351fb7cb2 hw/block/nvme: fix invalid msix exclusive uninit adds 0cef06d187 Update version for v6.0.0-rc5 release adds 609d759652 Update version for v6.0.0 release adds ccdf06c1db Open 6.1 development tree adds bf559ee402 hw/arm/smmuv3: Support 16K translation granule adds 8196fe9d83 target/arm: Make Thumb store insns UNDEF for Rn==1111 adds 98f96050aa target/arm: Fix mte_checkN adds f8c8a86060 target/arm: Split out mte_probe_int adds 4a09a21345 target/arm: Fix unaligned checks for mte_check1, mte_probe1 adds 09641ef931 test/tcg/aarch64: Add mte-5 adds 28f3250306 target/arm: Replace MTEDESC ESIZE+TSIZE with SIZEM1 adds bd47b61c5e target/arm: Merge mte_check1, mte_checkN adds d304d280b3 target/arm: Rename mte_probe1 to mte_probe adds 4c3310c73f target/arm: Simplify sve mte checking adds 33e74c3172 target/arm: Remove log2_esize parameter to gen_mte_checkN adds a736cbc303 target/arm: Fix decode of align in VLDST_single adds 6a01eab7d8 target/arm: Rename TBFLAG_A32, SCTLR_B adds ae6eb1e9b3 target/arm: Rename TBFLAG_ANY, PSTATE_SS adds a729a46b05 target/arm: Add wrapper macros for accessing tbflags adds 3902bfc6f0 target/arm: Introduce CPUARMTBFlags adds a378206a20 target/arm: Move mode specific TB flags to tb->cs_base adds 5896f39253 target/arm: Move TBFLAG_AM32 bits to the top adds eee81d41ec target/arm: Move TBFLAG_ANY bits to the bottom adds 4479ec30c9 target/arm: Add ALIGN_MEM to TBFLAG_ANY adds 9d486b40e8 target/arm: Adjust gen_aa32_{ld, st}_i32 for align+endianness adds 37bf7a055f target/arm: Merge gen_aa32_frob64 into gen_aa32_ld_i64 adds 9565ac4cc7 target/arm: Fix SCTLR_B test for TCGv_i64 load/store adds abe66294e1 target/arm: Adjust gen_aa32_{ld, st}_i64 for align+endianness adds 4d753eb5fb target/arm: Enforce word alignment for LDRD/STRD adds 824efdf525 target/arm: Enforce alignment for LDA/LDAH/STL/STLH adds 2e1f39e29b target/arm: Enforce alignment for LDM/STM adds c0c7f66087 target/arm: Enforce alignment for RFE adds 2fd0800c68 target/arm: Enforce alignment for SRS adds ad9aeae1a9 target/arm: Enforce alignment for VLDM/VSTM adds 6cd623d166 target/arm: Enforce alignment for VLDR/VSTR adds a8502b37f6 target/arm: Enforce alignment for VLDn (all lanes) adds 7c68c196cf target/arm: Enforce alignment for VLDn/VSTn (multiple) adds 88976ff0a4 target/arm: Enforce alignment for VLDn/VSTn (single) adds dc82164229 target/arm: Use finalize_memop for aa64 gpr load/store adds 4044a3cd1c target/arm: Use finalize_memop for aa64 fpr load/store adds acb07e08d6 target/arm: Enforce alignment for aa64 load-acq/store-rel adds a9e89e539e target/arm: Use MemOp for size + endian in aa64 vector ld/st adds c8f638d99a target/arm: Enforce alignment for aa64 vector LDn/STn (multiple) adds 37abe399df target/arm: Enforce alignment for aa64 vector LDn/STn (single) adds 0ca0f8720a target/arm: Enforce alignment for sve LD1R adds da7e13c00b hw: add compat machines for 6.1 adds a6091108aa hw/pci-host/gpex: Don't fault for unmapped parts of MMIO and [...] adds c3811c08ac Merge remote-tracking branch 'remotes/pmaydell/tags/pull-tar [...] adds d71cc67d68 tests/test-bdrv-graph-mod: add test_parallel_exclusive_write adds e6af4f0e94 tests/test-bdrv-graph-mod: add test_parallel_perm_update adds 397f7cc0c2 tests/test-bdrv-graph-mod: add test_append_greedy_filter adds ae9d441706 block: bdrv_append(): don't consume reference adds 3ca1f32257 block: BdrvChildClass: add .get_parent_aio_context handler adds 228ca37e12 block: drop ctx argument from bdrv_root_attach_child adds 53e96d1e9f block: make bdrv_reopen_{prepare,commit,abort} private adds 8cad15b156 util: add transactions.c adds 3bf416ba0f block: bdrv_refresh_perms: check for parents permissions conflict adds b0defa8356 block: refactor bdrv_child* permission functions adds 83928dc496 block: rewrite bdrv_child_try_set_perm() using bdrv_refresh_perms() adds 3ef45e0242 block: inline bdrv_child_*() permission functions calls adds bd57f8f7f8 block: use topological sort for permission update adds 2513ef5959 block: add bdrv_drv_set_perm transaction action adds b1d2bbeb3a block: add bdrv_list_* permission update functions adds 0978623e0f block: add bdrv_replace_child_safe() transaction action adds 3bb0e2980a block: fix bdrv_replace_node_common adds 548a74c0db block: add bdrv_attach_child_common() transaction action adds aa5a04c7db block: add bdrv_attach_child_noperm() transaction action adds 117caba9fc block: split out bdrv_replace_node_noperm() adds 2272edcfff block: adapt bdrv_append() for inserting filters adds 46541ee579 block: add bdrv_remove_filter_or_cow transaction action adds 3108a15cf0 block: introduce bdrv_drop_filter() adds b75d64b329 block/backup-top: drop .active adds 9397c14fcb block: drop ignore_children for permission update functions adds 332b3a175f block: make bdrv_unset_inherits_from to be a transaction action adds 1e4c797c75 block: make bdrv_refresh_limits() to be a transaction action adds 160333e1fe block: add bdrv_set_backing_noperm() transaction action adds a2aabf8895 block: bdrv_reopen_multiple(): move bdrv_flush to separate p [...] adds 72373e40fb block: bdrv_reopen_multiple: refresh permissions on updated graph adds 058acc4708 block: drop unused permission update functions adds 25409807cf block: inline bdrv_check_perm_common() adds 4954aacea0 block: inline bdrv_replace_child() adds ecb776bd93 block: refactor bdrv_child_set_perm_safe() transaction action adds 2fe5ff56f1 block: rename bdrv_replace_child_safe() to bdrv_replace_child() adds c20555e15f block: refactor bdrv_node_check_perm() adds 35b7f4abd5 block: Add BDRV_O_NO_SHARE for blk_new_open() adds 0b8fb55ce6 qemu-img convert: Unshare write permission for source adds 68bf733653 vhost-user-blk: Fail gracefully on too large queue size adds f38d1ea497 Merge remote-tracking branch 'remotes/kevin/tags/for-upstrea [...] adds d0a263cdd0 qapi/expr: Comment cleanup adds b7341b89c9 qapi/expr.py: Remove 'info' argument from nested check_if_str adds 0f231dcf29 qapi/expr.py: Check for dict instead of OrderedDict adds 59b5556ce8 qapi/expr.py: constrain incoming expression types adds b66c62a2d3 qapi/expr.py: Add assertion for union type 'check_dict' adds 926bb8add7 qapi/expr.py: move string check upwards in check_type adds 4918bb7def qapi/expr.py: Check type of union and alternate 'data' member adds 7a783ce5b5 qapi/expr.py: Add casts in a few select cases adds 538cd41065 qapi/expr.py: Modify check_keys to accept any Collection adds b9ad358aa0 qapi/expr.py: add type hint annotations adds 210fd63104 qapi/expr.py: Consolidate check_if_str calls in check_if adds e42648dccd qapi/expr.py: Remove single-letter variable adds 328e8ca71a qapi/expr.py: enable pylint checks adds 79e4fd14fb qapi/expr: Only explicitly prohibit 'Kind' nor 'List' for ty [...] adds a48653638f qapi/expr.py: Add docstrings adds eab99939a7 qapi/expr.py: Use tuples instead of lists for static data adds e81718c698 qapi/expr: Update authorship and copyright information adds 46f49468c6 qapi/error: Repurpose QAPIError as an abstract base exception class adds b54e07cc46 qapi/error: Use Python3-style super() adds 86cc2ff65a qapi/error: Make QAPISourceError 'col' parameter optional adds ac89761179 qapi/error: assert QAPISourceInfo is not None adds ac6a7d8884 qapi/error.py: move QAPIParseError to parser.py adds 92870cf3af qapi/error.py: enable pylint checks adds 30d0a016e9 qapi/error: Add type hints adds b54626e0b8 qapi/error.py: enable mypy checks adds 8f860d2633 Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi- [...] adds db647703ba exec: Remove accel/tcg/ from include paths adds c7cefe6c66 decodetree: Introduce whex and whexC helpers adds 9f6e2b4d34 decodetree: More use of f-strings adds 60c425f328 decodetree: Add support for 64-bit instructions adds af93ccacc7 decodetree: Extend argument set syntax to allow types adds 53c5433e84 Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-t [...] adds a27c100c23 target/hexagon: translation changes adds 4c82c2b433 target/hexagon: remove unnecessary checks in find_iclass_slots adds 1de468b398 target/hexagon: Change DECODE_MAPPED_REG operand name to OPNUM adds d9099caf04 target/hexagon: fix typo in comment adds 5f261764ce target/hexagon: remove unnecessary semicolons adds d799f8ad08 Hexagon (target/hexagon) TCG generation cleanup adds edf26ade43 Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pair adds 2d27cebbf8 Hexagon (target/hexagon) remove unnecessary inline directives adds 7d9ab2021f Hexagon (target/hexagon) use env_archcpu and env_cpu adds 743debbc37 Hexagon (target/hexagon) properly generate TB end for DISAS_ [...] adds 6c677c60ae Hexagon (target/hexagon) decide if pred has been written at [...] adds 92cfa25fd2 Hexagon (target/hexagon) change variables from int to bool w [...] adds 85511161f7 Hexagon (target/hexagon) remove unused carry_from_add64 function adds 8c36752435 Hexagon (target/hexagon) change type of softfloat_roundingmodes adds c0336c87b7 Hexagon (target/hexagon) use softfloat default NaN and tininess adds 1cb532fe45 Hexagon (target/hexagon) replace float32_mul_pow2 with float [...] adds b3f37abdd3 Hexagon (target/hexagon) use softfloat for float-to-int conversions adds 9fe33c0e70 Hexagon (target/hexagon) cleanup ternary operators in semantics adds 80be682844 Hexagon (target/hexagon) cleanup reg_field_info definition adds a33872eb53 Hexagon (target/hexagon) move QEMU_GENERATE to only be on du [...] adds 85580a6557 Hexagon (target/hexagon) compile all debug code adds d934c16d8a Hexagon (target/hexagon) add F2_sfrecipa instruction adds dd8705bdf5 Hexagon (target/hexagon) add F2_sfinvsqrta adds da74cd2dce Hexagon (target/hexagon) add A5_ACS (vacsh) adds 0a65d28693 Hexagon (target/hexagon) add A6_vminub_RdP adds 57d352ac29 Hexagon (target/hexagon) add A4_addp_c/A4_subp_c adds 46ef47e2a7 Hexagon (target/hexagon) circular addressing adds af7f182127 Hexagon (target/hexagon) bit reverse (brev) addressing adds 0d0b91a804 Hexagon (target/hexagon) load and unpack bytes instructions adds 7aa9ffab79 Hexagon (target/hexagon) load into shifted register instructions adds e628c0156b Hexagon (target/hexagon) CABAC decode bin adds 15106f7dc3 Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-h [...] adds bcad139192 hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ adds 84c2fdc397 target/mips: Fix CACHEE opcode (CACHE using EVA addressing) adds 298d43c96b target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRPG [...] adds bc2eb5ea1b target/mips: Remove spurious LOG_UNIMP of MTHC0 opcode adds df44e81703 target/mips: Migrate missing CPU fields adds 905bdf72a6 target/mips: Make check_cp0_enabled() return a boolean adds 58ecf15d76 target/mips: Simplify meson TCG rules adds 830a72301c target/mips: Move IEEE rounding mode array to new source file adds fed50ffd5c target/mips: Move msa_reset() to new source file adds adbf1be325 target/mips: Make CPU/FPU regnames[] arrays global adds 830b87ea25 target/mips: Optimize CPU/FPU regnames[] arrays adds 4f14ce4bf4 target/mips: Restrict mips_cpu_dump_state() to cpu.c adds 4d169b9cce target/mips: Turn printfpr() macro into a proper function adds 533fc64feb target/mips: Declare mips_env_set_pc() inlined in "internal.h" adds 0debf1400c target/mips: Merge do_translate_address into cpu_mips_transl [...] adds 6f4aec6a6d target/mips: Extract load/store helpers to ldst_helper.c adds 46369b50ee meson: Introduce meson_user_arch source set for arch-specifi [...] adds 6fe25ce587 target/mips: Introduce tcg-internal.h for TCG specific declarations adds 0a31c16c9c target/mips: Add simple user-mode mips_cpu_do_interrupt() adds 8074365fc7 target/mips: Add simple user-mode mips_cpu_tlb_fill() adds 44e3b05005 target/mips: Move cpu_signal_handler definition around adds 85d8da3fea target/mips: Move sysemu specific files under sysemu/ subfolder adds 137f4d87c6 target/mips: Move physical addressing code to sysemu/physaddr.c adds 8b28cde403 target/mips: Restrict cpu_mips_get_random() / update_pagemas [...] adds ad520a9784 target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder adds c284201702 target/mips: Restrict mmu_init() to TCG adds 920b48cc14 target/mips: Move tlb_helper.c to tcg/sysemu/ adds f3185ec2f3 target/mips: Restrict CPUMIPSTLBContext::map_address() handl [...] adds d60146a938 target/mips: Move Special opcodes to tcg/sysemu/special_helper.c adds ecdbcb0a94 target/mips: Move helper_cache() to tcg/sysemu/special_helper.c adds 6575529b65 target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c adds 8aa52bdc87 target/mips: Move exception management code to exception.c adds 5679479b9a target/mips: Move CP0 helpers to sysemu/cp0.c adds a2b0a27d33 target/mips: Move TCG source files under tcg/ sub directory adds db6b6f4dbf hw/mips: Restrict non-virtualized machines to TCG adds 1c13514449 gitlab-ci: Add KVM mips64el cross-build jobs adds e93d8bcf9d Merge remote-tracking branch 'remotes/philmd/tags/mips-20210 [...] adds ca0fd2e345 bsd-user: whitespace changes adds cefbade173 bsd-user: style tweak: keyword space ( adds fa0546370d bsd-user: style tweak: return is not a function, eliminate () adds 92ac45049b bsd-user: put back a break; that had gone missing... adds 58b3beb483 bsd-user: style tweak: Put {} around all if/else/for statements adds 3e13d8e34b Merge remote-tracking branch 'remotes/bsdimp/tags/pull-bsd-u [...] adds 0df2d9a673 aspeed/smc: Use the RAM memory region for DMAs adds d177892d4a aspeed/smc: Remove unused "sdram-base" property adds 7492515909 aspeed/i2c: Fix DMA address mask adds 3f7a53b224 aspeed/i2c: Rename DMA address space adds e9c568dbc2 hw/arm/aspeed: Do not sysbus-map mmio flash region directly, [...] adds c5475b3f9a hw: Model ASPEED's Hash and Crypto Engine adds a3888d757a aspeed: Integrate HACE adds 666099520a tests/qtest: Add test for Aspeed HACE adds a3a178c663 tests/acceptance: Test ast2400 and ast2500 machines adds 224f010ba8 tests/acceptance: Test ast2600 machine adds 8efbee28f4 hw/misc/aspeed_xdma: Add AST2600 support adds 1c5ee69da5 aspeed/smc: Add a 'features' attribute to the object class adds 1769a70e54 aspeed/smc: Add extra controls to request DMA adds 5fde7f10c0 tests/qtest: Rename m25p80 test in aspeed_smc test adds 63a9c7e0a0 aspeed: Deprecate the swift-bmc machine adds 58e52bdb87 aspeed: Add support for the rainier-bmc board adds d24aa3241a hw/block: m25p80: Add support for mt25ql02g and mt25qu02g adds 9cccb912cf aspeed: Add support for the quanta-q7l1-bmc board adds 87c6cef605 Merge remote-tracking branch 'remotes/legoater/tags/pull-asp [...] adds 56567da376 accel: kvm: clarify that extra exit data is hexadecimal adds 5c8ae30b24 hw/arm/pxa2xx: Declare PCMCIA bus with Kconfig adds 2a406e38e6 hw/ide: Add Kconfig dependency MICRODRIVE -> PCMCIA adds 32bec2eea2 hw/pcmcia: Do not register PCMCIA type if not required adds 04a2521121 Fix typo in CFI build documentation adds ac701a4f98 vmstate: Constify some VMStateDescriptions adds cfa52e09c4 hw/arm: Constify VMStateDescription adds 54cbf294d3 hw/display/qxl: Constify VMStateDescription adds db2dc7d8df hw/usb: Constify VMStateDescription adds 7c06a34c8c ui: Fix memory leak in qemu_xkeymap_mapping_table() adds e06054368c hw: Remove superfluous includes of hw/hw.h adds f6527eadeb hw: Do not include hw/sysbus.h if it is not necessary adds e924921f5c hw: Do not include hw/irq.h if it is not necessary adds 19f4ed3652 hw: Do not include qemu/log.h if it is not necessary adds 4c386f8064 Do not include sysemu/sysemu.h if it's not really necessary adds ead62c75f6 Do not include hw/boards.h if it's not really necessary adds 2068cabd3f Do not include cpu.h if it's not really necessary adds ee86213aa3 Do not include exec/address-spaces.h if it's not really necessary adds 76d79cf3d5 mc146818rtc: put it into the 'misc' category adds a058b89507 docs/system: Document the removal of "compat" property for P [...] adds e75941331e scripts: fix generation update-binfmts templates adds 56c9f00ef9 docs: More precisely describe memory-backend-*::id's user adds 9197b5d4b5 hw/rx/rx-gdbsim: Do not accept invalid memory size adds d45a5270d0 Merge remote-tracking branch 'remotes/vivier2/tags/trivial-b [...] adds 03b3542ac9 hw/ppc/mac_newworld: Restrict RAM to 2 GiB adds 8a05fd9a22 target/ppc: Move helper_regs.h functions out-of-line adds 1828504672 target/ppc: Move 601 hflags adjustment to hreg_compute_hflags adds dafe299cf0 target/ppc: Properly sync cpu state with new msr in cpu_load_old adds da77d2b037 target/ppc: Do not call hreg_compute_mem_idx after ppc_store_msr adds f7a7b6525c target/ppc: Retain hflags_nmsr only for migration adds 56ced49760 target/ppc: Fix comment for MSR_FE{0,1} adds bd4160bc6a hw/ppc/pnv_core: Update hflags after setting msr adds e81f17a3f6 hw/ppc/spapr_rtas: Update hflags after setting msr adds edece45d4a target/ppc: Extract post_load_update_msr adds 2df4fe7abe target/ppc: Disconnect hflags from MSR adds 26c55599b8 target/ppc: Reduce env->hflags to uint32_t adds 7da31f260d target/ppc: Put dbcr0 single-step bits into hflags adds f43520e5b2 target/ppc: Create helper_scv adds f03de3b44b target/ppc: Put LPCR[GTSE] in hflags adds 0e6bac3edb target/ppc: Remove MSR_SA and MSR_AP from hflags adds d764184ddb target/ppc: Remove env->immu_idx and env->dmmu_idx adds 75da499733 linux-user/ppc: Fix msr updates for signal handling adds 2da8a6bcdc target/ppc: Validate hflags with CONFIG_DEBUG_TCG adds f028c2ded2 vt82c686: QOM-ify superio related functionality adds ab74864fed vt82c686: Add VT8231_SUPERIO based on VIA_SUPERIO adds 2e84e107a0 vt82c686: Introduce abstract TYPE_VIA_ISA and base vt82c686b [...] adds f9f0c9e2fa vt82c686: Add emulation of VT8231 south bridge adds dcdf98a901 hw/pci-host: Add emulation of Marvell MV64361 PPC system controller adds ba7e5ac18e hw/ppc: Add emulation of Genesi/bPlan Pegasos II adds 4b98e72d97 spapr: Rename RTAS_MAX_ADDR to FDT_MAX_ADDR adds 53d7d7e2b1 ppc/spapr: Add support for implement support for H_SCM_HEALTH adds 8c8a7ed50c roms/Makefile: Update ppce500 u-boot build directory name adds 335b638937 roms/u-boot: Bump ppce500 u-boot to v2021.04 to fix broken p [...] adds 37337472e7 docs/system: ppc: Add documentation for ppce500 machine adds 9827f20863 target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour adds 98a6a36588 target/ppc: POWER10 supports scv adds a7913d5e3f ppc: Rename current DAWR macros and variables adds 5642e4513e spapr.c: do not use MachineClass::max_cpus to limit CPUs adds b7573092ab spapr.h: increase FDT_MAX_SIZE adds 87758fed7a spapr_drc.c: handle hotunplug errors in drc_unisolate_logical() adds 35a5d74e82 target/ppc: code motion from translate_init.c.inc to gdbstub.c adds 7468e2c842 target/ppc: move opcode table logic to translate.c adds 8b7e6b07a4 target/ppc: rework AIL logic in interrupt delivery adds 526cdce771 target/ppc: Add POWER10 exception model adds 6113563982 target/ppc: Clean up _spr_register et al adds 72369f5c95 target/ppc: Reduce the size of ppc_spr_t adds f350982f5e target/ppc: removed VSCR from SPR registration adds b2df46fd80 hw/intc/spapr_xive: Use device_cold_reset() instead of devic [...] adds 3e1c8ba988 hw/ppc/spapr_vio: Reset TCE table object with device_cold_reset() adds 4bb32cd7b1 hw/ppc/pnv_psi: Use device_cold_reset() instead of device_le [...] adds d90f154867 Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for [...] adds 62cbfdd2c5 oslib-win32: do not rely on macro to get redefined function name adds 74a414a1df Add NVMM accelerator: configure and build logic adds fdc8635e87 Add NVMM accelerator: x86 CPU support adds b9bc6169de Add NVMM accelerator: acceleration enlightenments adds 39becfce13 Add NVMM Accelerator: add maintainers for NetBSD/NVMM adds 4951967d84 ratelimit: protect with a mutex adds b8e0c4938b slirp: add configure option to disable smbd adds d77e90fa0e configure: reindent meson invocation adds 699d388430 configure: handle meson options that have changed type adds 1b874108a5 gitlab-ci: use --meson=internal for CFI jobs adds 9ba5db49ae glib-compat: accept G_TEST_SLOW environment variable adds 4cc10cae64 Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/fo [...] adds 828d01b7c5 hw/sparc/sun4m: Have sun4m machines inherit new TYPE_SUN4M_MACHINE adds 95bc47dec8 hw/sparc/sun4m: Introduce Sun4mMachineClass adds f55e8977ec hw/sparc/sun4m: Factor out sun4m_machine_class_init() adds 355eb81af1 hw/sparc/sun4m: Register machine types in sun4m_machine_types[] adds 41db3b77e3 hw/sparc/sun4m: Fix code style for checkpatch.pl adds bcdd781ff8 hw/sparc/sun4m: Move each sun4m_hwdef definition in its class_init adds 1284119991 hw/sparc: Allow building without the leon3 machine adds ef19ddfbf4 hw/sparc64: Remove unused "hw/char/serial.h" header adds 5aa7f68a2d hw/sparc64: Fix code style for checkpatch.pl adds 10fb1340b1 hw/sparc*: Move cpu_check_irqs() to target/sparc/ adds 74e31681ba Merge remote-tracking branch 'remotes/mcayland/tags/qemu-spa [...] new 5f1fffa0a6 docs: fix link in sbsa description new 68948d1822 linux-user/aarch64: Enable hwcap for RND, BTI, and MTE new eb849d8fd5 target/arm: Fix tlbbits calculation in tlbi_aa64_vae2is_write() new b5aa664679 target/arm: Move constant expanders to translate.h new d9318a5f9c target/arm: Share unallocated_encoding() and gen_exception_insn() new 5ce389f2e7 target/arm: Make functions used by m-nocp global new 9a5071abbc target/arm: Split m-nocp trans functions into their own file new 73d2f5d2bb target/arm: Move gen_aa32 functions to translate-a32.h new 06085d6a10 target/arm: Move vfp_{load, store}_reg{32, 64} to translate- [...] new 4a800a739d target/arm: Make functions used by translate-vfp global new 45fbd5a967 target/arm: Make translate-vfp.c.inc its own compilation unit new eb554d612d target/arm: Move vfp_reg_ptr() to translate-neon.c.inc new 8e30454fed target/arm: Delete unused typedef new 9194a9cbc7 target/arm: Move NeonGenThreeOpEnvFn typedef to translate.h new b5c8a457fa target/arm: Make functions used by translate-neon global new 4800b852b8 target/arm: Make translate-neon.c.inc its own compilation unit new 5b2c8af89b target/arm: Make WFI a NOP for userspace emulators new f16a3bf81b hw/sd/omap_mmc: Use device_cold_reset() instead of device_le [...] new 415a9fb880 osdep: Make os-win32.h and os-posix.h handle 'extern "C"' th [...] new b30a8c241f include/qemu/bswap.h: Handle being included outside extern " [...] new 2c316f9af4 include/disas/dis-asm.h: Handle being included outside 'extern "C"' new f463684fbf hw/arm/imx25_pdk: Fix error message for invalid RAM size new c52c266d24 hw/misc/mps2-scc: Add "QEMU interface" comment new 5bddf92e68 hw/misc/mps2-scc: Support using CFG0 bit 0 for remapping new f1dfab0d9b hw/arm/mps2-tz: Implement AN524 memory remapping via machine [...] new c3080fbdaa hw/arm/xlnx: Fix PHY address for xilinx-zynq-a9 new e58c7a3bba Merge remote-tracking branch 'remotes/pmaydell/tags/pull-tar [...] The 27 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .gitlab-ci.d/crossbuilds.yml | 8 + .gitlab-ci.yml | 10 +- MAINTAINERS | 31 +- VERSION | 2 +- accel/Kconfig | 3 + accel/kvm/kvm-all.c | 4 +- accel/stubs/kvm-stub.c | 1 - accel/stubs/tcg-stub.c | 1 - accel/tcg/cpu-exec-common.c | 1 - accel/tcg/cpu-exec.c | 1 - accel/tcg/cputlb.c | 2 - accel/tcg/plugin-gen.c | 1 - accel/tcg/tcg-accel-ops-icount.c | 1 - accel/tcg/tcg-accel-ops-rr.c | 1 - accel/tcg/tcg-accel-ops.c | 1 - accel/tcg/translate-all.c | 1 - accel/tcg/translator.c | 1 - accel/tcg/user-exec-stub.c | 1 - accel/tcg/user-exec.c | 1 - backends/hostmem-file.c | 1 - backends/hostmem-memfd.c | 1 - backends/hostmem.c | 1 - block.c | 1330 ++++++++++++-------- block/backup-top.c | 48 +- block/block-backend.c | 31 +- block/block-copy.c | 2 + block/commit.c | 1 + block/file-posix.c | 91 +- block/io.c | 31 +- block/mirror.c | 3 - block/nfs.c | 1 - blockdev.c | 4 - blockjob.c | 14 +- bsd-user/bsdload.c | 55 +- bsd-user/main.c | 1 - bsd-user/qemu.h | 4 +- bsd-user/syscall.c | 1 + chardev/char-mux.c | 1 - chardev/char.c | 1 - configure | 119 +- default-configs/devices/ppc-softmmu.mak | 2 + disas.c | 1 - disas/arm-a64.cc | 2 - disas/nanomips.cpp | 2 - docs/devel/control-flow-integrity.rst | 4 +- docs/devel/decodetree.rst | 11 +- docs/sphinx/qapidoc.py | 3 +- docs/system/arm/aspeed.rst | 2 +- docs/system/arm/mps2.rst | 10 + docs/system/arm/sbsa.rst | 2 +- docs/system/deprecated.rst | 7 + docs/system/ppc/ppce500.rst | 156 +++ docs/system/removed-features.rst | 6 + docs/system/target-ppc.rst | 1 + dump/dump.c | 1 - dump/win_dump.c | 1 - fpu/softfloat-specialize.c.inc | 3 + gdbstub.c | 1 - hw/acpi/cpu.c | 1 - hw/acpi/generic_event_device.c | 1 - hw/acpi/ich9.c | 1 - hw/acpi/memory_hotplug.c | 1 - hw/acpi/pcihp.c | 1 - hw/acpi/piix4.c | 1 - hw/alpha/dp264.c | 1 - hw/alpha/typhoon.c | 2 - hw/arm/Kconfig | 1 + hw/arm/allwinner-a10.c | 2 - hw/arm/allwinner-h3.c | 2 - hw/arm/armv7m.c | 2 - hw/arm/aspeed.c | 151 ++- hw/arm/aspeed_ast2600.c | 25 +- hw/arm/aspeed_soc.c | 26 +- hw/arm/bcm2836.c | 1 - hw/arm/boot.c | 1 - hw/arm/cubieboard.c | 4 - hw/arm/digic_boards.c | 3 - hw/arm/exynos4210.c | 1 - hw/arm/exynos4_boards.c | 2 - hw/arm/fsl-imx25.c | 2 - hw/arm/fsl-imx31.c | 1 - hw/arm/highbank.c | 3 +- hw/arm/imx25_pdk.c | 7 +- hw/arm/kzm.c | 1 - hw/arm/mcimx6ul-evk.c | 1 - hw/arm/mcimx7d-sabre.c | 1 - hw/arm/mps2-tz.c | 108 +- hw/arm/msf2-soc.c | 1 - hw/arm/msf2-som.c | 1 - hw/arm/musicpal.c | 2 - hw/arm/npcm7xx.c | 1 - hw/arm/npcm7xx_boards.c | 2 - hw/arm/nrf51_soc.c | 2 - hw/arm/nseries.c | 1 - hw/arm/omap1.c | 1 - hw/arm/omap2.c | 1 - hw/arm/orangepi.c | 3 - hw/arm/palm.c | 1 - hw/arm/pxa2xx_pic.c | 2 +- hw/arm/raspi.c | 2 - hw/arm/realview.c | 1 - hw/arm/sabrelite.c | 1 - hw/arm/sbsa-ref.c | 1 - hw/arm/smmu-common.c | 1 - hw/arm/smmuv3.c | 7 +- hw/arm/spitz.c | 4 +- hw/arm/stellaris.c | 1 - hw/arm/strongarm.c | 3 +- hw/arm/versatilepb.c | 1 - hw/arm/vexpress.c | 1 - hw/arm/virt.c | 10 +- hw/arm/xilinx_zynq.c | 3 +- hw/arm/xlnx-versal-virt.c | 2 - hw/arm/xlnx-versal.c | 1 - hw/arm/xlnx-zcu102.c | 1 - hw/arm/xlnx-zynqmp.c | 2 - hw/arm/z2.c | 4 +- hw/avr/arduino.c | 1 - hw/avr/atmega.c | 1 - hw/block/ecc.c | 2 +- hw/block/m25p80.c | 2 + hw/block/nvme-subsys.c | 1 - hw/block/nvme.c | 3 +- hw/block/vhost-user-blk.c | 5 + hw/char/mchp_pfsoc_mmuart.c | 1 - hw/char/riscv_htif.c | 1 - hw/char/sifive_uart.c | 2 - hw/char/spapr_vty.c | 1 - hw/char/virtio-serial-bus.c | 1 - hw/core/generic-loader.c | 1 - hw/core/guest-loader.c | 1 - hw/core/loader.c | 1 - hw/core/machine-qmp-cmds.c | 2 - hw/core/machine.c | 5 + hw/core/null-machine.c | 1 - hw/core/numa.c | 1 - hw/cris/axis_dev88.c | 1 - hw/display/next-fb.c | 2 - hw/display/qxl.c | 8 +- hw/dma/pl080.c | 1 - hw/dma/pxa2xx_dma.c | 4 +- hw/dma/sifive_pdma.c | 1 - hw/dma/xlnx_csu_dma.c | 1 - hw/hppa/dino.c | 2 - hw/hppa/lasi.c | 3 - hw/hppa/machine.c | 1 - hw/i2c/aspeed_i2c.c | 5 +- hw/i2c/mpc_i2c.c | 1 - hw/i386/acpi-build.c | 1 - hw/i386/acpi-microvm.c | 1 - hw/i386/intel_iommu.c | 2 - hw/i386/kvm/apic.c | 1 - hw/i386/kvm/clock.c | 1 - hw/i386/kvm/ioapic.c | 1 - hw/i386/kvmvapic.c | 1 - hw/i386/microvm.c | 1 - hw/i386/pc.c | 5 +- hw/i386/pc_piix.c | 17 +- hw/i386/pc_q35.c | 14 +- hw/i386/pc_sysfw.c | 1 - hw/i386/vmport.c | 1 - hw/i386/x86-iommu.c | 1 - hw/i386/xen/xen-hvm.c | 1 - hw/i386/xen/xen_platform.c | 2 - hw/ide/Kconfig | 1 + hw/ide/ahci_internal.h | 1 - hw/input/lasips2.c | 3 - hw/intc/apic.c | 1 - hw/intc/apic_common.c | 1 - hw/intc/arm_gic_kvm.c | 2 - hw/intc/arm_gicv3.c | 1 - hw/intc/arm_gicv3_kvm.c | 1 - hw/intc/armv7m_nvic.c | 1 - hw/intc/grlib_irqmp.c | 1 - hw/intc/imx_gpcv2.c | 1 - hw/intc/ompic.c | 1 - hw/intc/openpic.c | 1 - hw/intc/openpic_kvm.c | 2 - hw/intc/s390_flic.c | 1 - hw/intc/s390_flic_kvm.c | 2 - hw/intc/sifive_plic.c | 2 - hw/intc/spapr_xive.c | 2 +- hw/intc/xics.c | 1 - hw/intc/xics_kvm.c | 1 - hw/intc/xics_spapr.c | 1 - hw/ipmi/isa_ipmi_bt.c | 1 - hw/ipmi/isa_ipmi_kcs.c | 1 - hw/isa/isa-superio.c | 1 - hw/isa/lpc_ich9.c | 2 - hw/isa/piix3.c | 1 - hw/isa/piix4.c | 6 +- hw/isa/vt82c686.c | 423 +++++-- hw/lm32/lm32_boards.c | 1 - hw/lm32/milkymist.c | 1 - hw/m68k/an5206.c | 1 - hw/m68k/mcf5208.c | 1 - hw/m68k/mcf_intc.c | 1 - hw/m68k/next-cube.c | 2 - hw/m68k/next-kbd.c | 3 - hw/m68k/q800.c | 3 - hw/m68k/virt.c | 3 - hw/mem/sparse-mem.c | 1 - hw/microblaze/boot.c | 1 - hw/mips/boston.c | 1 - hw/mips/fuloong2e.c | 2 - hw/mips/gt64xxx_pci.c | 1 - hw/mips/jazz.c | 1 - hw/mips/loongson3_virt.c | 4 - hw/mips/malta.c | 3 - hw/mips/meson.build | 9 +- hw/mips/mips_int.c | 1 - hw/mips/mipssim.c | 2 - hw/misc/aspeed_hace.c | 389 ++++++ hw/misc/aspeed_xdma.c | 124 +- hw/misc/imx7_snvs.c | 1 - hw/misc/imx_ccm.c | 1 - hw/misc/imx_rngc.c | 1 - hw/misc/led.c | 1 - hw/misc/macio/macio.c | 1 - hw/misc/mchp_pfsoc_dmc.c | 1 - hw/misc/mchp_pfsoc_ioscb.c | 1 - hw/misc/mchp_pfsoc_sysreg.c | 1 - hw/misc/meson.build | 1 + hw/misc/mips_itu.c | 1 - hw/misc/mps2-scc.c | 13 +- hw/misc/mst_fpga.c | 2 +- hw/misc/pvpanic-isa.c | 1 - hw/misc/pvpanic-pci.c | 1 - hw/misc/sifive_e_prci.c | 1 - hw/misc/sifive_test.c | 1 - hw/misc/virt_ctrl.c | 1 - hw/moxie/moxiesim.c | 2 - hw/net/can/xlnx-zynqmp-can.c | 1 - hw/net/i82596.c | 1 - hw/net/lasi_i82596.c | 1 - hw/net/msf2-emac.c | 1 - hw/net/spapr_llan.c | 1 - hw/net/xgmac.c | 1 - hw/nios2/10m50_devboard.c | 1 - hw/nios2/boot.c | 2 - hw/nios2/generic_nommu.c | 2 - hw/nubus/nubus-bus.c | 1 - hw/nvram/nrf51_nvm.c | 1 - hw/nvram/spapr_nvram.c | 2 - hw/openrisc/openrisc_sim.c | 1 - hw/pci-host/Kconfig | 4 + hw/pci-host/bonito.c | 1 - hw/pci-host/gpex.c | 56 +- hw/pci-host/meson.build | 2 + hw/pci-host/mv64361.c | 951 ++++++++++++++ hw/pci-host/mv643xx.h | 918 ++++++++++++++ hw/pci-host/ppce500.c | 1 - hw/pci-host/prep.c | 1 - hw/pci-host/sabre.c | 1 - hw/pci-host/sh_pci.c | 1 - hw/pci-host/trace-events | 6 + hw/pci/pci.c | 1 - hw/pci/pcie_host.c | 1 - hw/pcmcia/meson.build | 2 +- hw/ppc/Kconfig | 9 + hw/ppc/e500.c | 2 - hw/ppc/mac_newworld.c | 6 +- hw/ppc/mac_oldworld.c | 2 - hw/ppc/meson.build | 2 + hw/ppc/pegasos2.c | 144 +++ hw/ppc/pnv.c | 3 - hw/ppc/pnv_core.c | 3 +- hw/ppc/pnv_pnor.c | 1 - hw/ppc/pnv_psi.c | 5 +- hw/ppc/ppc.c | 1 - hw/ppc/ppc405_boards.c | 3 - hw/ppc/ppc405_uc.c | 1 - hw/ppc/ppc440_bamboo.c | 1 - hw/ppc/ppc440_pcix.c | 1 - hw/ppc/ppc440_uc.c | 2 - hw/ppc/ppc4xx_devs.c | 1 - hw/ppc/ppc4xx_pci.c | 1 - hw/ppc/ppc_booke.c | 1 - hw/ppc/prep.c | 4 - hw/ppc/rs6000_mc.c | 1 - hw/ppc/sam460ex.c | 1 - hw/ppc/spapr.c | 36 +- hw/ppc/spapr_drc.c | 24 +- hw/ppc/spapr_events.c | 1 - hw/ppc/spapr_hcall.c | 9 +- hw/ppc/spapr_iommu.c | 1 - hw/ppc/spapr_nvdimm.c | 36 + hw/ppc/spapr_pci.c | 2 - hw/ppc/spapr_pci_vfio.c | 1 - hw/ppc/spapr_rng.c | 1 - hw/ppc/spapr_rtas.c | 4 +- hw/ppc/spapr_rtas_ddw.c | 1 - hw/ppc/spapr_rtc.c | 1 - hw/ppc/spapr_tpm_proxy.c | 1 - hw/ppc/spapr_vio.c | 2 +- hw/ppc/virtex_ml507.c | 2 - hw/remote/iohub.c | 1 - hw/remote/machine.c | 1 - hw/remote/memory.c | 1 - hw/remote/proxy-memory-listener.c | 2 - hw/riscv/microchip_pfsoc.c | 2 - hw/riscv/numa.c | 1 - hw/riscv/opentitan.c | 1 - hw/riscv/sifive_e.c | 2 - hw/riscv/sifive_u.c | 1 - hw/riscv/spike.c | 1 - hw/riscv/virt.c | 1 - hw/rtc/m48t59.c | 1 - hw/rtc/mc146818rtc.c | 2 +- hw/rx/rx-gdbsim.c | 5 +- hw/rx/rx62n.c | 2 - hw/s390x/3270-ccw.c | 1 - hw/s390x/css-bridge.c | 1 - hw/s390x/css.c | 1 - hw/s390x/ipl.c | 2 - hw/s390x/pv.c | 1 - hw/s390x/s390-ccw.c | 1 - hw/s390x/s390-pci-bus.c | 1 - hw/s390x/s390-pci-inst.c | 1 - hw/s390x/s390-stattrib-kvm.c | 1 - hw/s390x/s390-stattrib.c | 1 - hw/s390x/s390-virtio-ccw.c | 18 +- hw/s390x/sclp.c | 2 - hw/s390x/sclpcpu.c | 1 - hw/s390x/virtio-ccw.c | 1 - hw/scsi/spapr_vscsi.c | 1 - hw/sd/cadence_sdhci.c | 2 - hw/sd/omap_mmc.c | 2 +- hw/sh4/r2d.c | 1 - hw/sh4/sh7750.c | 1 - hw/sh4/shix.c | 2 - hw/sparc/leon3.c | 38 +- hw/sparc/sun4m.c | 491 +++----- hw/sparc/trace-events | 4 +- hw/sparc64/niagara.c | 1 - hw/sparc64/sparc64.c | 63 - hw/sparc64/trace-events | 4 - hw/ssi/aspeed_smc.c | 120 +- hw/ssi/sifive_spi.c | 1 - hw/ssi/xilinx_spi.c | 1 - hw/timer/mips_gictimer.c | 1 - hw/timer/sse-counter.c | 1 - hw/tpm/tpm_crb.c | 1 - hw/tricore/tc27x_soc.c | 4 - hw/tricore/triboard.c | 3 - hw/tricore/tricore_testboard.c | 1 - hw/usb/ccid-card-passthru.c | 2 +- hw/usb/chipidea.c | 1 - hw/usb/dev-smartcard-reader.c | 8 +- hw/usb/hcd-dwc3.c | 1 - hw/usb/imx-usb-phy.c | 1 - hw/usb/xen-usb.c | 1 - hw/usb/xlnx-usb-subsystem.c | 2 - hw/usb/xlnx-versal-usb2-ctrl-regs.c | 1 - hw/vfio/ap.c | 2 - hw/vfio/ccw.c | 1 - hw/vfio/display.c | 1 - hw/vfio/migration.c | 1 - hw/vfio/pci-quirks.c | 1 - hw/vfio/pci.c | 1 - hw/vfio/spapr.c | 1 - hw/virtio/vhost.c | 1 - hw/virtio/virtio.c | 1 - hw/xen/xen-bus-helper.c | 1 - hw/xen/xen-legacy-backend.c | 1 - hw/xen/xen_pt.c | 1 - hw/xtensa/sim.c | 2 - hw/xtensa/virt.c | 3 - hw/xtensa/xtensa_memory.c | 1 - hw/xtensa/xtfpga.c | 1 - include/block/block.h | 14 +- include/block/block_int.h | 8 +- include/disas/dis-asm.h | 12 +- include/exec/helper-gen.h | 4 +- include/exec/helper-proto.h | 4 +- include/exec/helper-tcg.h | 4 +- include/glib-compat.h | 17 + include/hw/arm/aspeed_soc.h | 3 + include/hw/block/flash.h | 2 +- include/hw/boards.h | 3 + include/hw/char/avr_usart.h | 1 - include/hw/i386/pc.h | 3 + include/hw/isa/vt82c686.h | 2 +- include/hw/misc/aspeed_hace.h | 43 + include/hw/misc/aspeed_xdma.h | 17 +- include/hw/misc/avr_power.h | 1 - include/hw/misc/mps2-scc.h | 21 + include/hw/misc/stm32f4xx_exti.h | 1 - include/hw/misc/stm32f4xx_syscfg.h | 1 - include/hw/pci-host/gpex.h | 4 + include/hw/pci-host/i440fx.h | 1 - include/hw/pci-host/mv64361.h | 8 + include/hw/pci/pci_ids.h | 4 +- include/hw/ppc/spapr.h | 7 +- include/hw/ssi/aspeed_smc.h | 7 +- include/hw/timer/avr_timer16.h | 1 - include/qemu/bswap.h | 26 +- include/qemu/osdep.h | 8 +- include/qemu/ratelimit.h | 14 + include/qemu/transactions.h | 63 + include/sysemu/hw_accel.h | 1 + include/sysemu/nvmm.h | 26 + include/sysemu/os-posix.h | 8 + include/sysemu/os-win32.h | 8 + linux-user/elfload.c | 13 + linux-user/hexagon/cpu_loop.c | 2 +- linux-user/main.c | 1 - linux-user/ppc/cpu_loop.c | 5 +- linux-user/ppc/signal.c | 23 +- linux-user/semihost.c | 1 - meson.build | 23 +- meson_options.txt | 2 + migration/ram.c | 2 - monitor/misc.c | 1 - monitor/monitor.c | 1 - net/dump.c | 1 - net/filter-replay.c | 1 - net/net.c | 2 - net/netmap.c | 1 - net/slirp.c | 16 +- pc-bios/u-boot.e500 | Bin 349148 -> 406920 bytes plugins/api.c | 2 - plugins/core.c | 2 - plugins/loader.c | 1 - qemu-img.c | 2 +- qemu-options.hx | 14 +- roms/Makefile | 8 +- roms/u-boot | 2 +- scripts/decodetree.py | 172 +-- scripts/qapi/error.py | 47 +- scripts/qapi/expr.py | 442 +++++-- scripts/qapi/mypy.ini | 10 - scripts/qapi/parser.py | 14 +- scripts/qapi/pylintrc | 4 +- scripts/qapi/schema.py | 4 +- scripts/qemu-binfmt-conf.sh | 4 +- semihosting/arm-compat-semi.c | 2 - semihosting/config.c | 1 - semihosting/console.c | 2 - softmmu/arch_init.c | 2 - softmmu/device_tree.c | 1 - softmmu/memory.c | 2 - softmmu/memory_mapping.c | 1 - softmmu/physmem.c | 3 - softmmu/qdev-monitor.c | 1 - softmmu/vl.c | 1 - stubs/semihost.c | 1 - target/arm/cpu.c | 1 - target/arm/cpu.h | 105 +- target/arm/helper-a64.c | 2 +- target/arm/helper-a64.h | 3 +- target/arm/helper.c | 164 +-- target/arm/internals.h | 13 +- target/arm/meson.build | 15 +- target/arm/mte_helper.c | 181 ++- target/arm/neon-ls.decode | 4 +- target/arm/op_helper.c | 15 +- target/arm/sve_helper.c | 100 +- target/arm/translate-a32.h | 144 +++ target/arm/translate-a64.c | 251 ++-- target/arm/translate-a64.h | 4 +- target/arm/translate-m-nocp.c | 221 ++++ .../arm/{translate-neon.c.inc => translate-neon.c} | 136 +- target/arm/translate-sve.c | 11 +- .../arm/{translate-vfp.c.inc => translate-vfp.c} | 250 +--- target/arm/translate.c | 416 +++--- target/arm/translate.h | 67 + target/hexagon/arch.c | 181 ++- target/hexagon/arch.h | 9 +- target/hexagon/conv_emu.c | 177 --- target/hexagon/conv_emu.h | 31 - target/hexagon/cpu.c | 15 +- target/hexagon/cpu.h | 5 - target/hexagon/cpu_bits.h | 2 +- target/hexagon/decode.c | 85 +- target/hexagon/fma_emu.c | 40 +- target/hexagon/gen_tcg.h | 424 ++++++- target/hexagon/gen_tcg_funcs.py | 2 +- target/hexagon/genptr.c | 234 +++- target/hexagon/helper.h | 23 +- target/hexagon/iclass.c | 4 - target/hexagon/imported/alu.idef | 44 + target/hexagon/imported/compare.idef | 12 +- target/hexagon/imported/encode_pp.def | 30 + target/hexagon/imported/float.idef | 32 + target/hexagon/imported/ldst.idef | 68 + target/hexagon/imported/macros.def | 47 + target/hexagon/imported/shift.idef | 47 + target/hexagon/insn.h | 21 +- target/hexagon/internal.h | 11 +- target/hexagon/macros.h | 118 +- target/hexagon/meson.build | 1 - target/hexagon/op_helper.c | 392 ++++-- target/hexagon/reg_fields.c | 3 +- target/hexagon/reg_fields.h | 4 +- target/hexagon/translate.c | 175 ++- target/hexagon/translate.h | 9 +- target/i386/cpu.h | 2 +- target/i386/helper.c | 2 +- target/i386/hvf/hvf.c | 1 - target/i386/hvf/x86_mmu.c | 1 - target/i386/machine.c | 2 +- target/i386/meson.build | 1 + target/i386/nvmm/meson.build | 8 + target/i386/nvmm/nvmm-accel-ops.c | 111 ++ target/i386/nvmm/nvmm-accel-ops.h | 24 + target/i386/nvmm/nvmm-all.c | 1226 ++++++++++++++++++ target/i386/sev.c | 1 - target/lm32/lm32-semi.c | 1 - target/mips/cpu.c | 281 +---- target/mips/fpu.c | 25 + target/mips/helper.h | 183 +-- target/mips/internal.h | 107 +- target/mips/meson.build | 53 +- target/mips/msa.c | 60 + target/mips/op_helper.c | 1210 ------------------ target/mips/{ => sysemu}/addr.c | 0 target/mips/sysemu/cp0.c | 123 ++ target/mips/{ => sysemu}/cp0_timer.c | 0 target/mips/{ => sysemu}/machine.c | 21 +- target/mips/sysemu/meson.build | 7 + target/mips/sysemu/physaddr.c | 257 ++++ target/mips/{ => tcg}/dsp_helper.c | 0 target/mips/tcg/exception.c | 167 +++ target/mips/{ => tcg}/fpu_helper.c | 8 - target/mips/tcg/ldst_helper.c | 288 +++++ target/mips/{ => tcg}/lmmi_helper.c | 0 target/mips/{ => tcg}/meson.build | 39 +- target/mips/{ => tcg}/mips32r6.decode | 0 target/mips/{ => tcg}/mips64r6.decode | 0 target/mips/{ => tcg}/msa32.decode | 0 target/mips/{ => tcg}/msa64.decode | 0 target/mips/{ => tcg}/msa_helper.c | 36 - target/mips/{ => tcg}/msa_helper.h.inc | 0 target/mips/{ => tcg}/msa_translate.c | 0 target/mips/{ => tcg}/mxu_translate.c | 0 target/mips/tcg/op_helper.c | 420 +++++++ target/mips/{ => tcg}/rel6_translate.c | 0 target/mips/{ => tcg/sysemu}/cp0_helper.c | 0 target/mips/tcg/sysemu/meson.build | 6 + target/mips/{ => tcg/sysemu}/mips-semi.c | 0 target/mips/tcg/sysemu/special_helper.c | 173 +++ target/mips/{ => tcg/sysemu}/tlb_helper.c | 623 ++++----- target/mips/tcg/sysemu_helper.h.inc | 185 +++ target/mips/tcg/tcg-internal.h | 64 + target/mips/{ => tcg}/translate.c | 115 +- target/mips/{ => tcg}/translate_addr_const.c | 0 target/mips/{ => tcg}/tx79.decode | 0 target/mips/{ => tcg}/tx79_translate.c | 0 target/mips/{ => tcg}/txx9_translate.c | 0 target/mips/tcg/user/meson.build | 3 + target/mips/tcg/user/tlb_helper.c | 64 + target/mips/translate.h | 7 +- target/openrisc/sys_helper.c | 1 - target/ppc/cpu-qom.h | 2 + target/ppc/cpu.h | 80 +- target/ppc/excp_helper.c | 217 +++- target/ppc/gdbstub.c | 258 ++++ target/ppc/helper.h | 1 + target/ppc/{helper_regs.h => helper_regs.c} | 149 ++- target/ppc/helper_regs.h | 183 +-- target/ppc/int_helper.c | 1 + target/ppc/internal.h | 13 + target/ppc/machine.c | 39 +- target/ppc/mem_helper.c | 2 +- target/ppc/meson.build | 1 + target/ppc/misc_helper.c | 13 +- target/ppc/mmu-hash64.c | 3 + target/ppc/translate.c | 493 +++++++- target/ppc/translate_init.c.inc | 833 ++---------- target/riscv/op_helper.c | 1 - target/rx/helper.c | 1 - target/s390x/cpu.c | 1 - target/s390x/diag.c | 1 - target/s390x/excp_helper.c | 1 - target/s390x/interrupt.c | 1 - target/sparc/cpu.h | 6 - target/sparc/int32_helper.c | 70 +- target/sparc/int64_helper.c | 66 + target/sparc/trace-events | 12 +- target/xtensa/op_helper.c | 1 - tcg/tcg-op-vec.c | 1 - tcg/tcg-op.c | 1 - tcg/tcg.c | 2 - tests/acceptance/boot_linux_console.py | 68 + tests/decode/succ_argset_type1.decode | 1 + tests/qapi-schema/alternate-data-invalid.err | 2 + tests/qapi-schema/alternate-data-invalid.json | 4 + .../qapi-schema/alternate-data-invalid.out | 0 tests/qapi-schema/meson.build | 2 + tests/qapi-schema/union-invalid-data.err | 2 + tests/qapi-schema/union-invalid-data.json | 6 + .../qapi-schema/union-invalid-data.out | 0 tests/qemu-iotests/245 | 2 +- tests/qemu-iotests/283.out | 2 +- tests/qemu-iotests/tests/qsd-jobs.out | 2 +- tests/qtest/aspeed_hace-test.c | 469 +++++++ tests/qtest/{m25p80-test.c => aspeed_smc-test.c} | 12 +- tests/qtest/fuzz/fuzz.c | 1 - tests/qtest/fuzz/generic_fuzz.c | 2 - tests/qtest/fuzz/qos_fuzz.c | 2 - tests/qtest/meson.build | 5 +- tests/tcg/aarch64/Makefile.target | 2 +- tests/tcg/aarch64/mte-5.c | 44 + tests/tcg/hexagon/Makefile.target | 6 + tests/tcg/hexagon/brev.c | 190 +++ tests/tcg/hexagon/circ.c | 486 +++++++ tests/tcg/hexagon/fpstuff.c | 242 ++++ tests/tcg/hexagon/load_align.c | 415 ++++++ tests/tcg/hexagon/load_unpack.c | 474 +++++++ tests/tcg/hexagon/misc.c | 47 + tests/tcg/hexagon/multi_result.c | 282 +++++ tests/unit/test-bdrv-drain.c | 2 +- tests/unit/test-bdrv-graph-mod.c | 209 ++- ui/x_keymap.c | 15 +- util/meson.build | 1 + util/oslib-win32.c | 3 +- util/transactions.c | 96 ++ 618 files changed, 16740 insertions(+), 6977 deletions(-) create mode 100644 docs/system/ppc/ppce500.rst create mode 100644 hw/misc/aspeed_hace.c create mode 100644 hw/pci-host/mv64361.c create mode 100644 hw/pci-host/mv643xx.h create mode 100644 hw/ppc/pegasos2.c create mode 100644 include/hw/misc/aspeed_hace.h create mode 100644 include/hw/pci-host/mv64361.h create mode 100644 include/qemu/transactions.h create mode 100644 include/sysemu/nvmm.h create mode 100644 target/arm/translate-a32.h create mode 100644 target/arm/translate-m-nocp.c rename target/arm/{translate-neon.c.inc => translate-neon.c} (97%) rename target/arm/{translate-vfp.c.inc => translate-vfp.c} (93%) delete mode 100644 target/hexagon/conv_emu.c delete mode 100644 target/hexagon/conv_emu.h create mode 100644 target/i386/nvmm/meson.build create mode 100644 target/i386/nvmm/nvmm-accel-ops.c create mode 100644 target/i386/nvmm/nvmm-accel-ops.h create mode 100644 target/i386/nvmm/nvmm-all.c create mode 100644 target/mips/fpu.c create mode 100644 target/mips/msa.c delete mode 100644 target/mips/op_helper.c rename target/mips/{ => sysemu}/addr.c (100%) create mode 100644 target/mips/sysemu/cp0.c rename target/mips/{ => sysemu}/cp0_timer.c (100%) rename target/mips/{ => sysemu}/machine.c (94%) create mode 100644 target/mips/sysemu/meson.build create mode 100644 target/mips/sysemu/physaddr.c rename target/mips/{ => tcg}/dsp_helper.c (100%) create mode 100644 target/mips/tcg/exception.c rename target/mips/{ => tcg}/fpu_helper.c (99%) create mode 100644 target/mips/tcg/ldst_helper.c rename target/mips/{ => tcg}/lmmi_helper.c (100%) copy target/mips/{ => tcg}/meson.build (50%) rename target/mips/{ => tcg}/mips32r6.decode (100%) rename target/mips/{ => tcg}/mips64r6.decode (100%) rename target/mips/{ => tcg}/msa32.decode (100%) rename target/mips/{ => tcg}/msa64.decode (100%) rename target/mips/{ => tcg}/msa_helper.c (99%) rename target/mips/{ => tcg}/msa_helper.h.inc (100%) rename target/mips/{ => tcg}/msa_translate.c (100%) rename target/mips/{ => tcg}/mxu_translate.c (100%) create mode 100644 target/mips/tcg/op_helper.c rename target/mips/{ => tcg}/rel6_translate.c (100%) rename target/mips/{ => tcg/sysemu}/cp0_helper.c (100%) create mode 100644 target/mips/tcg/sysemu/meson.build rename target/mips/{ => tcg/sysemu}/mips-semi.c (100%) create mode 100644 target/mips/tcg/sysemu/special_helper.c rename target/mips/{ => tcg/sysemu}/tlb_helper.c (76%) create mode 100644 target/mips/tcg/sysemu_helper.h.inc create mode 100644 target/mips/tcg/tcg-internal.h rename target/mips/{ => tcg}/translate.c (99%) rename target/mips/{ => tcg}/translate_addr_const.c (100%) rename target/mips/{ => tcg}/tx79.decode (100%) rename target/mips/{ => tcg}/tx79_translate.c (100%) rename target/mips/{ => tcg}/txx9_translate.c (100%) create mode 100644 target/mips/tcg/user/meson.build create mode 100644 target/mips/tcg/user/tlb_helper.c copy target/ppc/{helper_regs.h => helper_regs.c} (56%) create mode 100644 tests/decode/succ_argset_type1.decode create mode 100644 tests/qapi-schema/alternate-data-invalid.err create mode 100644 tests/qapi-schema/alternate-data-invalid.json copy scripts/codeconverter/codeconverter/__init__.py => tests/qapi-schema/alternat [...] create mode 100644 tests/qapi-schema/union-invalid-data.err create mode 100644 tests/qapi-schema/union-invalid-data.json copy scripts/codeconverter/codeconverter/__init__.py => tests/qapi-schema/union-in [...] create mode 100644 tests/qtest/aspeed_hace-test.c rename tests/qtest/{m25p80-test.c => aspeed_smc-test.c} (96%) create mode 100644 tests/tcg/aarch64/mte-5.c create mode 100644 tests/tcg/hexagon/brev.c create mode 100644 tests/tcg/hexagon/circ.c create mode 100644 tests/tcg/hexagon/load_align.c create mode 100644 tests/tcg/hexagon/load_unpack.c create mode 100644 tests/tcg/hexagon/multi_result.c create mode 100644 util/transactions.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig updated (685036654f -> 3b33651e3d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig in repository toolchain/ci/binutils-gdb. from 685036654f Automatic date update in version.in adds 990df44330 Automatic date update in version.in adds 5fbe6f4318 Automatic date update in version.in adds beaafdf3e2 Automatic date update in version.in adds 7efc8776ec Automatic date update in version.in adds fb261566ad Automatic date update in version.in adds 54c343f5b2 Automatic date update in version.in adds 3b33651e3d Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

[gcc] branch master updated (60af2db1801 -> cce4471bb45)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 60af2db1801 tree-optimization/100492 - avoid irreducible regions in loo [...] new cce4471bb45 testsuite/100452 - fix g++.dg/vect/slp-pr99971.cc The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/g++.dg/vect/slp-pr99971.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-next-allyesconfig updated (53c5433e84 -> d90f154867)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-next-allyesconfig in repository toolchain/ci/qemu. from 53c5433e84 Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-t [...] adds a27c100c23 target/hexagon: translation changes adds 4c82c2b433 target/hexagon: remove unnecessary checks in find_iclass_slots adds 1de468b398 target/hexagon: Change DECODE_MAPPED_REG operand name to OPNUM adds d9099caf04 target/hexagon: fix typo in comment adds 5f261764ce target/hexagon: remove unnecessary semicolons adds d799f8ad08 Hexagon (target/hexagon) TCG generation cleanup adds edf26ade43 Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pair adds 2d27cebbf8 Hexagon (target/hexagon) remove unnecessary inline directives adds 7d9ab2021f Hexagon (target/hexagon) use env_archcpu and env_cpu adds 743debbc37 Hexagon (target/hexagon) properly generate TB end for DISAS_ [...] adds 6c677c60ae Hexagon (target/hexagon) decide if pred has been written at [...] adds 92cfa25fd2 Hexagon (target/hexagon) change variables from int to bool w [...] adds 85511161f7 Hexagon (target/hexagon) remove unused carry_from_add64 function adds 8c36752435 Hexagon (target/hexagon) change type of softfloat_roundingmodes adds c0336c87b7 Hexagon (target/hexagon) use softfloat default NaN and tininess adds 1cb532fe45 Hexagon (target/hexagon) replace float32_mul_pow2 with float [...] adds b3f37abdd3 Hexagon (target/hexagon) use softfloat for float-to-int conversions adds 9fe33c0e70 Hexagon (target/hexagon) cleanup ternary operators in semantics adds 80be682844 Hexagon (target/hexagon) cleanup reg_field_info definition adds a33872eb53 Hexagon (target/hexagon) move QEMU_GENERATE to only be on du [...] adds 85580a6557 Hexagon (target/hexagon) compile all debug code adds d934c16d8a Hexagon (target/hexagon) add F2_sfrecipa instruction adds dd8705bdf5 Hexagon (target/hexagon) add F2_sfinvsqrta adds da74cd2dce Hexagon (target/hexagon) add A5_ACS (vacsh) adds 0a65d28693 Hexagon (target/hexagon) add A6_vminub_RdP adds 57d352ac29 Hexagon (target/hexagon) add A4_addp_c/A4_subp_c adds 46ef47e2a7 Hexagon (target/hexagon) circular addressing adds af7f182127 Hexagon (target/hexagon) bit reverse (brev) addressing adds 0d0b91a804 Hexagon (target/hexagon) load and unpack bytes instructions adds 7aa9ffab79 Hexagon (target/hexagon) load into shifted register instructions adds e628c0156b Hexagon (target/hexagon) CABAC decode bin adds 15106f7dc3 Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-h [...] adds bcad139192 hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ adds 84c2fdc397 target/mips: Fix CACHEE opcode (CACHE using EVA addressing) adds 298d43c96b target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRPG [...] adds bc2eb5ea1b target/mips: Remove spurious LOG_UNIMP of MTHC0 opcode adds df44e81703 target/mips: Migrate missing CPU fields adds 905bdf72a6 target/mips: Make check_cp0_enabled() return a boolean adds 58ecf15d76 target/mips: Simplify meson TCG rules adds 830a72301c target/mips: Move IEEE rounding mode array to new source file adds fed50ffd5c target/mips: Move msa_reset() to new source file adds adbf1be325 target/mips: Make CPU/FPU regnames[] arrays global adds 830b87ea25 target/mips: Optimize CPU/FPU regnames[] arrays adds 4f14ce4bf4 target/mips: Restrict mips_cpu_dump_state() to cpu.c adds 4d169b9cce target/mips: Turn printfpr() macro into a proper function adds 533fc64feb target/mips: Declare mips_env_set_pc() inlined in "internal.h" adds 0debf1400c target/mips: Merge do_translate_address into cpu_mips_transl [...] adds 6f4aec6a6d target/mips: Extract load/store helpers to ldst_helper.c adds 46369b50ee meson: Introduce meson_user_arch source set for arch-specifi [...] adds 6fe25ce587 target/mips: Introduce tcg-internal.h for TCG specific declarations adds 0a31c16c9c target/mips: Add simple user-mode mips_cpu_do_interrupt() adds 8074365fc7 target/mips: Add simple user-mode mips_cpu_tlb_fill() adds 44e3b05005 target/mips: Move cpu_signal_handler definition around adds 85d8da3fea target/mips: Move sysemu specific files under sysemu/ subfolder adds 137f4d87c6 target/mips: Move physical addressing code to sysemu/physaddr.c adds 8b28cde403 target/mips: Restrict cpu_mips_get_random() / update_pagemas [...] adds ad520a9784 target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder adds c284201702 target/mips: Restrict mmu_init() to TCG adds 920b48cc14 target/mips: Move tlb_helper.c to tcg/sysemu/ adds f3185ec2f3 target/mips: Restrict CPUMIPSTLBContext::map_address() handl [...] adds d60146a938 target/mips: Move Special opcodes to tcg/sysemu/special_helper.c adds ecdbcb0a94 target/mips: Move helper_cache() to tcg/sysemu/special_helper.c adds 6575529b65 target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c adds 8aa52bdc87 target/mips: Move exception management code to exception.c adds 5679479b9a target/mips: Move CP0 helpers to sysemu/cp0.c adds a2b0a27d33 target/mips: Move TCG source files under tcg/ sub directory adds db6b6f4dbf hw/mips: Restrict non-virtualized machines to TCG adds 1c13514449 gitlab-ci: Add KVM mips64el cross-build jobs adds e93d8bcf9d Merge remote-tracking branch 'remotes/philmd/tags/mips-20210 [...] adds ca0fd2e345 bsd-user: whitespace changes adds cefbade173 bsd-user: style tweak: keyword space ( adds fa0546370d bsd-user: style tweak: return is not a function, eliminate () adds 92ac45049b bsd-user: put back a break; that had gone missing... adds 58b3beb483 bsd-user: style tweak: Put {} around all if/else/for statements adds 3e13d8e34b Merge remote-tracking branch 'remotes/bsdimp/tags/pull-bsd-u [...] adds 0df2d9a673 aspeed/smc: Use the RAM memory region for DMAs adds d177892d4a aspeed/smc: Remove unused "sdram-base" property adds 7492515909 aspeed/i2c: Fix DMA address mask adds 3f7a53b224 aspeed/i2c: Rename DMA address space adds e9c568dbc2 hw/arm/aspeed: Do not sysbus-map mmio flash region directly, [...] adds c5475b3f9a hw: Model ASPEED's Hash and Crypto Engine adds a3888d757a aspeed: Integrate HACE adds 666099520a tests/qtest: Add test for Aspeed HACE adds a3a178c663 tests/acceptance: Test ast2400 and ast2500 machines adds 224f010ba8 tests/acceptance: Test ast2600 machine adds 8efbee28f4 hw/misc/aspeed_xdma: Add AST2600 support adds 1c5ee69da5 aspeed/smc: Add a 'features' attribute to the object class adds 1769a70e54 aspeed/smc: Add extra controls to request DMA adds 5fde7f10c0 tests/qtest: Rename m25p80 test in aspeed_smc test adds 63a9c7e0a0 aspeed: Deprecate the swift-bmc machine adds 58e52bdb87 aspeed: Add support for the rainier-bmc board adds d24aa3241a hw/block: m25p80: Add support for mt25ql02g and mt25qu02g adds 9cccb912cf aspeed: Add support for the quanta-q7l1-bmc board adds 87c6cef605 Merge remote-tracking branch 'remotes/legoater/tags/pull-asp [...] adds 56567da376 accel: kvm: clarify that extra exit data is hexadecimal adds 5c8ae30b24 hw/arm/pxa2xx: Declare PCMCIA bus with Kconfig adds 2a406e38e6 hw/ide: Add Kconfig dependency MICRODRIVE -> PCMCIA adds 32bec2eea2 hw/pcmcia: Do not register PCMCIA type if not required adds 04a2521121 Fix typo in CFI build documentation adds ac701a4f98 vmstate: Constify some VMStateDescriptions adds cfa52e09c4 hw/arm: Constify VMStateDescription adds 54cbf294d3 hw/display/qxl: Constify VMStateDescription adds db2dc7d8df hw/usb: Constify VMStateDescription adds 7c06a34c8c ui: Fix memory leak in qemu_xkeymap_mapping_table() adds e06054368c hw: Remove superfluous includes of hw/hw.h adds f6527eadeb hw: Do not include hw/sysbus.h if it is not necessary adds e924921f5c hw: Do not include hw/irq.h if it is not necessary adds 19f4ed3652 hw: Do not include qemu/log.h if it is not necessary adds 4c386f8064 Do not include sysemu/sysemu.h if it's not really necessary adds ead62c75f6 Do not include hw/boards.h if it's not really necessary adds 2068cabd3f Do not include cpu.h if it's not really necessary adds ee86213aa3 Do not include exec/address-spaces.h if it's not really necessary adds 76d79cf3d5 mc146818rtc: put it into the 'misc' category adds a058b89507 docs/system: Document the removal of "compat" property for P [...] adds e75941331e scripts: fix generation update-binfmts templates adds 56c9f00ef9 docs: More precisely describe memory-backend-*::id's user adds 9197b5d4b5 hw/rx/rx-gdbsim: Do not accept invalid memory size adds d45a5270d0 Merge remote-tracking branch 'remotes/vivier2/tags/trivial-b [...] adds 03b3542ac9 hw/ppc/mac_newworld: Restrict RAM to 2 GiB adds 8a05fd9a22 target/ppc: Move helper_regs.h functions out-of-line adds 1828504672 target/ppc: Move 601 hflags adjustment to hreg_compute_hflags adds dafe299cf0 target/ppc: Properly sync cpu state with new msr in cpu_load_old adds da77d2b037 target/ppc: Do not call hreg_compute_mem_idx after ppc_store_msr adds f7a7b6525c target/ppc: Retain hflags_nmsr only for migration adds 56ced49760 target/ppc: Fix comment for MSR_FE{0,1} adds bd4160bc6a hw/ppc/pnv_core: Update hflags after setting msr adds e81f17a3f6 hw/ppc/spapr_rtas: Update hflags after setting msr adds edece45d4a target/ppc: Extract post_load_update_msr adds 2df4fe7abe target/ppc: Disconnect hflags from MSR adds 26c55599b8 target/ppc: Reduce env->hflags to uint32_t adds 7da31f260d target/ppc: Put dbcr0 single-step bits into hflags adds f43520e5b2 target/ppc: Create helper_scv adds f03de3b44b target/ppc: Put LPCR[GTSE] in hflags adds 0e6bac3edb target/ppc: Remove MSR_SA and MSR_AP from hflags adds d764184ddb target/ppc: Remove env->immu_idx and env->dmmu_idx adds 75da499733 linux-user/ppc: Fix msr updates for signal handling adds 2da8a6bcdc target/ppc: Validate hflags with CONFIG_DEBUG_TCG adds f028c2ded2 vt82c686: QOM-ify superio related functionality adds ab74864fed vt82c686: Add VT8231_SUPERIO based on VIA_SUPERIO adds 2e84e107a0 vt82c686: Introduce abstract TYPE_VIA_ISA and base vt82c686b [...] adds f9f0c9e2fa vt82c686: Add emulation of VT8231 south bridge adds dcdf98a901 hw/pci-host: Add emulation of Marvell MV64361 PPC system controller adds ba7e5ac18e hw/ppc: Add emulation of Genesi/bPlan Pegasos II adds 4b98e72d97 spapr: Rename RTAS_MAX_ADDR to FDT_MAX_ADDR adds 53d7d7e2b1 ppc/spapr: Add support for implement support for H_SCM_HEALTH adds 8c8a7ed50c roms/Makefile: Update ppce500 u-boot build directory name adds 335b638937 roms/u-boot: Bump ppce500 u-boot to v2021.04 to fix broken p [...] adds 37337472e7 docs/system: ppc: Add documentation for ppce500 machine adds 9827f20863 target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour adds 98a6a36588 target/ppc: POWER10 supports scv adds a7913d5e3f ppc: Rename current DAWR macros and variables adds 5642e4513e spapr.c: do not use MachineClass::max_cpus to limit CPUs adds b7573092ab spapr.h: increase FDT_MAX_SIZE adds 87758fed7a spapr_drc.c: handle hotunplug errors in drc_unisolate_logical() adds 35a5d74e82 target/ppc: code motion from translate_init.c.inc to gdbstub.c adds 7468e2c842 target/ppc: move opcode table logic to translate.c adds 8b7e6b07a4 target/ppc: rework AIL logic in interrupt delivery adds 526cdce771 target/ppc: Add POWER10 exception model adds 6113563982 target/ppc: Clean up _spr_register et al adds 72369f5c95 target/ppc: Reduce the size of ppc_spr_t adds f350982f5e target/ppc: removed VSCR from SPR registration adds b2df46fd80 hw/intc/spapr_xive: Use device_cold_reset() instead of devic [...] adds 3e1c8ba988 hw/ppc/spapr_vio: Reset TCE table object with device_cold_reset() adds 4bb32cd7b1 hw/ppc/pnv_psi: Use device_cold_reset() instead of device_le [...] adds d90f154867 Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for [...] No new revisions were added by this update. Summary of changes: .gitlab-ci.d/crossbuilds.yml | 8 + MAINTAINERS | 14 +- accel/kvm/kvm-all.c | 4 +- accel/stubs/kvm-stub.c | 1 - accel/stubs/tcg-stub.c | 1 - accel/tcg/cpu-exec-common.c | 1 - accel/tcg/cpu-exec.c | 1 - accel/tcg/cputlb.c | 2 - accel/tcg/plugin-gen.c | 1 - accel/tcg/tcg-accel-ops-icount.c | 1 - accel/tcg/tcg-accel-ops-rr.c | 1 - accel/tcg/tcg-accel-ops.c | 1 - accel/tcg/translate-all.c | 1 - accel/tcg/translator.c | 1 - accel/tcg/user-exec-stub.c | 1 - accel/tcg/user-exec.c | 1 - backends/hostmem-file.c | 1 - backends/hostmem-memfd.c | 1 - backends/hostmem.c | 1 - block.c | 1 - block/block-backend.c | 1 - block/nfs.c | 1 - bsd-user/bsdload.c | 55 +- bsd-user/main.c | 1 - bsd-user/qemu.h | 4 +- bsd-user/syscall.c | 1 + chardev/char-mux.c | 1 - chardev/char.c | 1 - default-configs/devices/ppc-softmmu.mak | 2 + disas.c | 1 - docs/devel/control-flow-integrity.rst | 4 +- docs/system/arm/aspeed.rst | 2 +- docs/system/deprecated.rst | 7 + docs/system/ppc/ppce500.rst | 156 +++ docs/system/removed-features.rst | 6 + docs/system/target-ppc.rst | 1 + dump/dump.c | 1 - dump/win_dump.c | 1 - fpu/softfloat-specialize.c.inc | 3 + gdbstub.c | 1 - hw/acpi/cpu.c | 1 - hw/acpi/generic_event_device.c | 1 - hw/acpi/ich9.c | 1 - hw/acpi/memory_hotplug.c | 1 - hw/acpi/pcihp.c | 1 - hw/acpi/piix4.c | 1 - hw/alpha/dp264.c | 1 - hw/alpha/typhoon.c | 2 - hw/arm/Kconfig | 1 + hw/arm/allwinner-a10.c | 2 - hw/arm/allwinner-h3.c | 2 - hw/arm/armv7m.c | 2 - hw/arm/aspeed.c | 151 ++- hw/arm/aspeed_ast2600.c | 25 +- hw/arm/aspeed_soc.c | 26 +- hw/arm/bcm2836.c | 1 - hw/arm/boot.c | 1 - hw/arm/cubieboard.c | 4 - hw/arm/digic_boards.c | 3 - hw/arm/exynos4210.c | 1 - hw/arm/exynos4_boards.c | 2 - hw/arm/fsl-imx25.c | 2 - hw/arm/fsl-imx31.c | 1 - hw/arm/highbank.c | 3 +- hw/arm/imx25_pdk.c | 2 - hw/arm/kzm.c | 1 - hw/arm/mcimx6ul-evk.c | 1 - hw/arm/mcimx7d-sabre.c | 1 - hw/arm/msf2-soc.c | 1 - hw/arm/msf2-som.c | 1 - hw/arm/musicpal.c | 2 - hw/arm/npcm7xx.c | 1 - hw/arm/npcm7xx_boards.c | 2 - hw/arm/nrf51_soc.c | 2 - hw/arm/nseries.c | 1 - hw/arm/omap1.c | 1 - hw/arm/omap2.c | 1 - hw/arm/orangepi.c | 3 - hw/arm/palm.c | 1 - hw/arm/pxa2xx_pic.c | 2 +- hw/arm/raspi.c | 2 - hw/arm/realview.c | 1 - hw/arm/sabrelite.c | 1 - hw/arm/sbsa-ref.c | 1 - hw/arm/smmu-common.c | 1 - hw/arm/smmuv3.c | 1 - hw/arm/spitz.c | 4 +- hw/arm/stellaris.c | 1 - hw/arm/strongarm.c | 3 +- hw/arm/versatilepb.c | 1 - hw/arm/vexpress.c | 1 - hw/arm/virt.c | 3 - hw/arm/xilinx_zynq.c | 1 - hw/arm/xlnx-versal-virt.c | 2 - hw/arm/xlnx-versal.c | 1 - hw/arm/xlnx-zcu102.c | 1 - hw/arm/xlnx-zynqmp.c | 2 - hw/arm/z2.c | 4 +- hw/avr/arduino.c | 1 - hw/avr/atmega.c | 1 - hw/block/ecc.c | 2 +- hw/block/m25p80.c | 2 + hw/block/nvme-subsys.c | 1 - hw/char/mchp_pfsoc_mmuart.c | 1 - hw/char/riscv_htif.c | 1 - hw/char/sifive_uart.c | 2 - hw/char/spapr_vty.c | 1 - hw/char/virtio-serial-bus.c | 1 - hw/core/generic-loader.c | 1 - hw/core/guest-loader.c | 1 - hw/core/loader.c | 1 - hw/core/machine-qmp-cmds.c | 2 - hw/core/null-machine.c | 1 - hw/core/numa.c | 1 - hw/cris/axis_dev88.c | 1 - hw/display/next-fb.c | 2 - hw/display/qxl.c | 8 +- hw/dma/pl080.c | 1 - hw/dma/pxa2xx_dma.c | 4 +- hw/dma/sifive_pdma.c | 1 - hw/dma/xlnx_csu_dma.c | 1 - hw/hppa/dino.c | 2 - hw/hppa/lasi.c | 3 - hw/hppa/machine.c | 1 - hw/i2c/aspeed_i2c.c | 5 +- hw/i2c/mpc_i2c.c | 1 - hw/i386/acpi-build.c | 1 - hw/i386/acpi-microvm.c | 1 - hw/i386/intel_iommu.c | 2 - hw/i386/kvm/apic.c | 1 - hw/i386/kvm/clock.c | 1 - hw/i386/kvm/ioapic.c | 1 - hw/i386/kvmvapic.c | 1 - hw/i386/microvm.c | 1 - hw/i386/pc.c | 2 - hw/i386/pc_piix.c | 3 - hw/i386/pc_q35.c | 1 - hw/i386/pc_sysfw.c | 1 - hw/i386/vmport.c | 1 - hw/i386/x86-iommu.c | 1 - hw/i386/xen/xen-hvm.c | 1 - hw/i386/xen/xen_platform.c | 2 - hw/ide/Kconfig | 1 + hw/ide/ahci_internal.h | 1 - hw/input/lasips2.c | 3 - hw/intc/apic.c | 1 - hw/intc/apic_common.c | 1 - hw/intc/arm_gic_kvm.c | 2 - hw/intc/arm_gicv3.c | 1 - hw/intc/arm_gicv3_kvm.c | 1 - hw/intc/armv7m_nvic.c | 1 - hw/intc/grlib_irqmp.c | 1 - hw/intc/imx_gpcv2.c | 1 - hw/intc/ompic.c | 1 - hw/intc/openpic.c | 1 - hw/intc/openpic_kvm.c | 2 - hw/intc/s390_flic.c | 1 - hw/intc/s390_flic_kvm.c | 2 - hw/intc/sifive_plic.c | 2 - hw/intc/spapr_xive.c | 2 +- hw/intc/xics.c | 1 - hw/intc/xics_kvm.c | 1 - hw/intc/xics_spapr.c | 1 - hw/ipmi/isa_ipmi_bt.c | 1 - hw/ipmi/isa_ipmi_kcs.c | 1 - hw/isa/isa-superio.c | 1 - hw/isa/lpc_ich9.c | 2 - hw/isa/piix3.c | 1 - hw/isa/piix4.c | 6 +- hw/isa/vt82c686.c | 423 ++++++-- hw/lm32/lm32_boards.c | 1 - hw/lm32/milkymist.c | 1 - hw/m68k/an5206.c | 1 - hw/m68k/mcf5208.c | 1 - hw/m68k/mcf_intc.c | 1 - hw/m68k/next-cube.c | 2 - hw/m68k/next-kbd.c | 3 - hw/m68k/q800.c | 3 - hw/m68k/virt.c | 3 - hw/mem/sparse-mem.c | 1 - hw/microblaze/boot.c | 1 - hw/mips/boston.c | 1 - hw/mips/fuloong2e.c | 2 - hw/mips/gt64xxx_pci.c | 1 - hw/mips/jazz.c | 1 - hw/mips/loongson3_virt.c | 4 - hw/mips/malta.c | 3 - hw/mips/meson.build | 9 +- hw/mips/mips_int.c | 1 - hw/mips/mipssim.c | 2 - hw/misc/aspeed_hace.c | 389 +++++++ hw/misc/aspeed_xdma.c | 124 ++- hw/misc/imx7_snvs.c | 1 - hw/misc/imx_ccm.c | 1 - hw/misc/imx_rngc.c | 1 - hw/misc/led.c | 1 - hw/misc/macio/macio.c | 1 - hw/misc/mchp_pfsoc_dmc.c | 1 - hw/misc/mchp_pfsoc_ioscb.c | 1 - hw/misc/mchp_pfsoc_sysreg.c | 1 - hw/misc/meson.build | 1 + hw/misc/mips_itu.c | 1 - hw/misc/mst_fpga.c | 2 +- hw/misc/pvpanic-isa.c | 1 - hw/misc/pvpanic-pci.c | 1 - hw/misc/sifive_e_prci.c | 1 - hw/misc/sifive_test.c | 1 - hw/misc/virt_ctrl.c | 1 - hw/moxie/moxiesim.c | 2 - hw/net/can/xlnx-zynqmp-can.c | 1 - hw/net/i82596.c | 1 - hw/net/lasi_i82596.c | 1 - hw/net/msf2-emac.c | 1 - hw/net/spapr_llan.c | 1 - hw/net/xgmac.c | 1 - hw/nios2/10m50_devboard.c | 1 - hw/nios2/boot.c | 2 - hw/nios2/generic_nommu.c | 2 - hw/nubus/nubus-bus.c | 1 - hw/nvram/nrf51_nvm.c | 1 - hw/nvram/spapr_nvram.c | 2 - hw/openrisc/openrisc_sim.c | 1 - hw/pci-host/Kconfig | 4 + hw/pci-host/bonito.c | 1 - hw/pci-host/meson.build | 2 + hw/pci-host/mv64361.c | 951 +++++++++++++++++ hw/pci-host/mv643xx.h | 918 ++++++++++++++++ hw/pci-host/ppce500.c | 1 - hw/pci-host/prep.c | 1 - hw/pci-host/sabre.c | 1 - hw/pci-host/sh_pci.c | 1 - hw/pci-host/trace-events | 6 + hw/pci/pci.c | 1 - hw/pci/pcie_host.c | 1 - hw/pcmcia/meson.build | 2 +- hw/ppc/Kconfig | 9 + hw/ppc/e500.c | 2 - hw/ppc/mac_newworld.c | 6 +- hw/ppc/mac_oldworld.c | 2 - hw/ppc/meson.build | 2 + hw/ppc/pegasos2.c | 144 +++ hw/ppc/pnv.c | 3 - hw/ppc/pnv_core.c | 3 +- hw/ppc/pnv_pnor.c | 1 - hw/ppc/pnv_psi.c | 5 +- hw/ppc/ppc.c | 1 - hw/ppc/ppc405_boards.c | 3 - hw/ppc/ppc405_uc.c | 1 - hw/ppc/ppc440_bamboo.c | 1 - hw/ppc/ppc440_pcix.c | 1 - hw/ppc/ppc440_uc.c | 2 - hw/ppc/ppc4xx_devs.c | 1 - hw/ppc/ppc4xx_pci.c | 1 - hw/ppc/ppc_booke.c | 1 - hw/ppc/prep.c | 4 - hw/ppc/rs6000_mc.c | 1 - hw/ppc/sam460ex.c | 1 - hw/ppc/spapr.c | 21 +- hw/ppc/spapr_drc.c | 24 +- hw/ppc/spapr_events.c | 1 - hw/ppc/spapr_hcall.c | 9 +- hw/ppc/spapr_iommu.c | 1 - hw/ppc/spapr_nvdimm.c | 36 + hw/ppc/spapr_pci.c | 2 - hw/ppc/spapr_pci_vfio.c | 1 - hw/ppc/spapr_rng.c | 1 - hw/ppc/spapr_rtas.c | 4 +- hw/ppc/spapr_rtas_ddw.c | 1 - hw/ppc/spapr_rtc.c | 1 - hw/ppc/spapr_tpm_proxy.c | 1 - hw/ppc/spapr_vio.c | 2 +- hw/ppc/virtex_ml507.c | 2 - hw/remote/iohub.c | 1 - hw/remote/machine.c | 1 - hw/remote/memory.c | 1 - hw/remote/proxy-memory-listener.c | 2 - hw/riscv/microchip_pfsoc.c | 2 - hw/riscv/numa.c | 1 - hw/riscv/opentitan.c | 1 - hw/riscv/sifive_e.c | 2 - hw/riscv/sifive_u.c | 1 - hw/riscv/spike.c | 1 - hw/riscv/virt.c | 1 - hw/rtc/m48t59.c | 1 - hw/rtc/mc146818rtc.c | 2 +- hw/rx/rx-gdbsim.c | 5 +- hw/rx/rx62n.c | 2 - hw/s390x/3270-ccw.c | 1 - hw/s390x/css-bridge.c | 1 - hw/s390x/css.c | 1 - hw/s390x/ipl.c | 2 - hw/s390x/pv.c | 1 - hw/s390x/s390-ccw.c | 1 - hw/s390x/s390-pci-bus.c | 1 - hw/s390x/s390-pci-inst.c | 1 - hw/s390x/s390-stattrib-kvm.c | 1 - hw/s390x/s390-stattrib.c | 1 - hw/s390x/s390-virtio-ccw.c | 4 - hw/s390x/sclp.c | 2 - hw/s390x/sclpcpu.c | 1 - hw/s390x/virtio-ccw.c | 1 - hw/scsi/spapr_vscsi.c | 1 - hw/sd/cadence_sdhci.c | 2 - hw/sh4/r2d.c | 1 - hw/sh4/sh7750.c | 1 - hw/sh4/shix.c | 2 - hw/sparc/leon3.c | 1 - hw/sparc64/niagara.c | 1 - hw/ssi/aspeed_smc.c | 120 ++- hw/ssi/sifive_spi.c | 1 - hw/ssi/xilinx_spi.c | 1 - hw/timer/mips_gictimer.c | 1 - hw/timer/sse-counter.c | 1 - hw/tpm/tpm_crb.c | 1 - hw/tricore/tc27x_soc.c | 4 - hw/tricore/triboard.c | 3 - hw/tricore/tricore_testboard.c | 1 - hw/usb/ccid-card-passthru.c | 2 +- hw/usb/chipidea.c | 1 - hw/usb/dev-smartcard-reader.c | 8 +- hw/usb/hcd-dwc3.c | 1 - hw/usb/imx-usb-phy.c | 1 - hw/usb/xen-usb.c | 1 - hw/usb/xlnx-usb-subsystem.c | 2 - hw/usb/xlnx-versal-usb2-ctrl-regs.c | 1 - hw/vfio/ap.c | 2 - hw/vfio/ccw.c | 1 - hw/vfio/display.c | 1 - hw/vfio/migration.c | 1 - hw/vfio/pci-quirks.c | 1 - hw/vfio/pci.c | 1 - hw/vfio/spapr.c | 1 - hw/virtio/vhost.c | 1 - hw/virtio/virtio.c | 1 - hw/xen/xen-bus-helper.c | 1 - hw/xen/xen-legacy-backend.c | 1 - hw/xen/xen_pt.c | 1 - hw/xtensa/sim.c | 2 - hw/xtensa/virt.c | 3 - hw/xtensa/xtensa_memory.c | 1 - hw/xtensa/xtfpga.c | 1 - include/hw/arm/aspeed_soc.h | 3 + include/hw/block/flash.h | 2 +- include/hw/char/avr_usart.h | 1 - include/hw/isa/vt82c686.h | 2 +- include/hw/misc/aspeed_hace.h | 43 + include/hw/misc/aspeed_xdma.h | 17 +- include/hw/misc/avr_power.h | 1 - include/hw/misc/stm32f4xx_exti.h | 1 - include/hw/misc/stm32f4xx_syscfg.h | 1 - include/hw/pci-host/i440fx.h | 1 - include/hw/pci-host/mv64361.h | 8 + include/hw/pci/pci_ids.h | 4 +- include/hw/ppc/spapr.h | 7 +- include/hw/ssi/aspeed_smc.h | 7 +- include/hw/timer/avr_timer16.h | 1 - linux-user/hexagon/cpu_loop.c | 2 +- linux-user/main.c | 1 - linux-user/ppc/cpu_loop.c | 5 +- linux-user/ppc/signal.c | 23 +- linux-user/semihost.c | 1 - meson.build | 6 + migration/ram.c | 2 - monitor/misc.c | 1 - monitor/monitor.c | 1 - net/dump.c | 1 - net/filter-replay.c | 1 - net/net.c | 2 - net/netmap.c | 1 - pc-bios/u-boot.e500 | Bin 349148 -> 406920 bytes plugins/api.c | 2 - plugins/core.c | 2 - plugins/loader.c | 1 - qemu-options.hx | 6 +- roms/Makefile | 8 +- roms/u-boot | 2 +- scripts/qemu-binfmt-conf.sh | 4 +- semihosting/arm-compat-semi.c | 2 - semihosting/config.c | 1 - semihosting/console.c | 2 - softmmu/arch_init.c | 2 - softmmu/device_tree.c | 1 - softmmu/memory.c | 2 - softmmu/memory_mapping.c | 1 - softmmu/physmem.c | 3 - softmmu/qdev-monitor.c | 1 - softmmu/vl.c | 1 - stubs/semihost.c | 1 - target/arm/cpu.c | 1 - target/arm/op_helper.c | 1 - target/hexagon/arch.c | 181 +++- target/hexagon/arch.h | 9 +- target/hexagon/conv_emu.c | 177 ---- target/hexagon/conv_emu.h | 31 - target/hexagon/cpu.c | 15 +- target/hexagon/cpu.h | 5 - target/hexagon/cpu_bits.h | 2 +- target/hexagon/decode.c | 85 +- target/hexagon/fma_emu.c | 40 +- target/hexagon/gen_tcg.h | 424 +++++++- target/hexagon/gen_tcg_funcs.py | 2 +- target/hexagon/genptr.c | 234 ++++- target/hexagon/helper.h | 23 +- target/hexagon/iclass.c | 4 - target/hexagon/imported/alu.idef | 44 + target/hexagon/imported/compare.idef | 12 +- target/hexagon/imported/encode_pp.def | 30 + target/hexagon/imported/float.idef | 32 + target/hexagon/imported/ldst.idef | 68 ++ target/hexagon/imported/macros.def | 47 + target/hexagon/imported/shift.idef | 47 + target/hexagon/insn.h | 21 +- target/hexagon/internal.h | 11 +- target/hexagon/macros.h | 118 ++- target/hexagon/meson.build | 1 - target/hexagon/op_helper.c | 392 ++++--- target/hexagon/reg_fields.c | 3 +- target/hexagon/reg_fields.h | 4 +- target/hexagon/translate.c | 175 ++-- target/hexagon/translate.h | 9 +- target/i386/cpu.h | 2 +- target/i386/hvf/hvf.c | 1 - target/i386/hvf/x86_mmu.c | 1 - target/i386/machine.c | 2 +- target/i386/sev.c | 1 - target/lm32/lm32-semi.c | 1 - target/mips/cpu.c | 281 ++--- target/mips/fpu.c | 25 + target/mips/helper.h | 183 +--- target/mips/internal.h | 107 +- target/mips/meson.build | 53 +- target/mips/msa.c | 60 ++ target/mips/op_helper.c | 1210 ---------------------- target/mips/{ => sysemu}/addr.c | 0 target/mips/sysemu/cp0.c | 123 +++ target/mips/{ => sysemu}/cp0_timer.c | 0 target/mips/{ => sysemu}/machine.c | 21 +- target/mips/sysemu/meson.build | 7 + target/mips/sysemu/physaddr.c | 257 +++++ target/mips/{ => tcg}/dsp_helper.c | 0 target/mips/tcg/exception.c | 167 +++ target/mips/{ => tcg}/fpu_helper.c | 8 - target/mips/tcg/ldst_helper.c | 288 +++++ target/mips/{ => tcg}/lmmi_helper.c | 0 target/mips/{ => tcg}/meson.build | 39 +- target/mips/{ => tcg}/mips32r6.decode | 0 target/mips/{ => tcg}/mips64r6.decode | 0 target/mips/{ => tcg}/msa32.decode | 0 target/mips/{ => tcg}/msa64.decode | 0 target/mips/{ => tcg}/msa_helper.c | 36 - target/mips/{ => tcg}/msa_helper.h.inc | 0 target/mips/{ => tcg}/msa_translate.c | 0 target/mips/{ => tcg}/mxu_translate.c | 0 target/mips/tcg/op_helper.c | 420 ++++++++ target/mips/{ => tcg}/rel6_translate.c | 0 target/mips/{ => tcg/sysemu}/cp0_helper.c | 0 target/mips/tcg/sysemu/meson.build | 6 + target/mips/{ => tcg/sysemu}/mips-semi.c | 0 target/mips/tcg/sysemu/special_helper.c | 173 ++++ target/mips/{ => tcg/sysemu}/tlb_helper.c | 623 ++++++----- target/mips/tcg/sysemu_helper.h.inc | 185 ++++ target/mips/tcg/tcg-internal.h | 64 ++ target/mips/{ => tcg}/translate.c | 115 +- target/mips/{ => tcg}/translate_addr_const.c | 0 target/mips/{ => tcg}/tx79.decode | 0 target/mips/{ => tcg}/tx79_translate.c | 0 target/mips/{ => tcg}/txx9_translate.c | 0 target/mips/tcg/user/meson.build | 3 + target/mips/tcg/user/tlb_helper.c | 64 ++ target/mips/translate.h | 7 +- target/openrisc/sys_helper.c | 1 - target/ppc/cpu-qom.h | 2 + target/ppc/cpu.h | 80 +- target/ppc/excp_helper.c | 217 +++- target/ppc/gdbstub.c | 258 +++++ target/ppc/helper.h | 1 + target/ppc/{helper_regs.h => helper_regs.c} | 149 ++- target/ppc/helper_regs.h | 183 +--- target/ppc/int_helper.c | 1 + target/ppc/internal.h | 13 + target/ppc/machine.c | 39 +- target/ppc/mem_helper.c | 2 +- target/ppc/meson.build | 1 + target/ppc/misc_helper.c | 13 +- target/ppc/mmu-hash64.c | 3 + target/ppc/translate.c | 493 +++++++-- target/ppc/translate_init.c.inc | 833 ++------------- target/riscv/op_helper.c | 1 - target/rx/helper.c | 1 - target/s390x/cpu.c | 1 - target/s390x/diag.c | 1 - target/s390x/excp_helper.c | 1 - target/s390x/interrupt.c | 1 - target/xtensa/op_helper.c | 1 - tcg/tcg-op-vec.c | 1 - tcg/tcg-op.c | 1 - tcg/tcg.c | 2 - tests/acceptance/boot_linux_console.py | 68 ++ tests/qtest/aspeed_hace-test.c | 469 +++++++++ tests/qtest/{m25p80-test.c => aspeed_smc-test.c} | 12 +- tests/qtest/fuzz/fuzz.c | 1 - tests/qtest/fuzz/generic_fuzz.c | 2 - tests/qtest/fuzz/qos_fuzz.c | 2 - tests/qtest/meson.build | 5 +- tests/tcg/hexagon/Makefile.target | 6 + tests/tcg/hexagon/brev.c | 190 ++++ tests/tcg/hexagon/circ.c | 486 +++++++++ tests/tcg/hexagon/fpstuff.c | 242 +++++ tests/tcg/hexagon/load_align.c | 415 ++++++++ tests/tcg/hexagon/load_unpack.c | 474 +++++++++ tests/tcg/hexagon/misc.c | 47 + tests/tcg/hexagon/multi_result.c | 282 +++++ ui/x_keymap.c | 15 +- util/oslib-win32.c | 1 - 514 files changed, 11456 insertions(+), 4652 deletions(-) create mode 100644 docs/system/ppc/ppce500.rst create mode 100644 hw/misc/aspeed_hace.c create mode 100644 hw/pci-host/mv64361.c create mode 100644 hw/pci-host/mv643xx.h create mode 100644 hw/ppc/pegasos2.c create mode 100644 include/hw/misc/aspeed_hace.h create mode 100644 include/hw/pci-host/mv64361.h delete mode 100644 target/hexagon/conv_emu.c delete mode 100644 target/hexagon/conv_emu.h create mode 100644 target/mips/fpu.c create mode 100644 target/mips/msa.c delete mode 100644 target/mips/op_helper.c rename target/mips/{ => sysemu}/addr.c (100%) create mode 100644 target/mips/sysemu/cp0.c rename target/mips/{ => sysemu}/cp0_timer.c (100%) rename target/mips/{ => sysemu}/machine.c (94%) create mode 100644 target/mips/sysemu/meson.build create mode 100644 target/mips/sysemu/physaddr.c rename target/mips/{ => tcg}/dsp_helper.c (100%) create mode 100644 target/mips/tcg/exception.c rename target/mips/{ => tcg}/fpu_helper.c (99%) create mode 100644 target/mips/tcg/ldst_helper.c rename target/mips/{ => tcg}/lmmi_helper.c (100%) copy target/mips/{ => tcg}/meson.build (50%) rename target/mips/{ => tcg}/mips32r6.decode (100%) rename target/mips/{ => tcg}/mips64r6.decode (100%) rename target/mips/{ => tcg}/msa32.decode (100%) rename target/mips/{ => tcg}/msa64.decode (100%) rename target/mips/{ => tcg}/msa_helper.c (99%) rename target/mips/{ => tcg}/msa_helper.h.inc (100%) rename target/mips/{ => tcg}/msa_translate.c (100%) rename target/mips/{ => tcg}/mxu_translate.c (100%) create mode 100644 target/mips/tcg/op_helper.c rename target/mips/{ => tcg}/rel6_translate.c (100%) rename target/mips/{ => tcg/sysemu}/cp0_helper.c (100%) create mode 100644 target/mips/tcg/sysemu/meson.build rename target/mips/{ => tcg/sysemu}/mips-semi.c (100%) create mode 100644 target/mips/tcg/sysemu/special_helper.c rename target/mips/{ => tcg/sysemu}/tlb_helper.c (76%) create mode 100644 target/mips/tcg/sysemu_helper.h.inc create mode 100644 target/mips/tcg/tcg-internal.h rename target/mips/{ => tcg}/translate.c (99%) rename target/mips/{ => tcg}/translate_addr_const.c (100%) rename target/mips/{ => tcg}/tx79.decode (100%) rename target/mips/{ => tcg}/tx79_translate.c (100%) rename target/mips/{ => tcg}/txx9_translate.c (100%) create mode 100644 target/mips/tcg/user/meson.build create mode 100644 target/mips/tcg/user/tlb_helper.c copy target/ppc/{helper_regs.h => helper_regs.c} (56%) create mode 100644 tests/qtest/aspeed_hace-test.c rename tests/qtest/{m25p80-test.c => aspeed_smc-test.c} (96%) create mode 100644 tests/tcg/hexagon/brev.c create mode 100644 tests/tcg/hexagon/circ.c create mode 100644 tests/tcg/hexagon/load_align.c create mode 100644 tests/tcg/hexagon/load_unpack.c create mode 100644 tests/tcg/hexagon/multi_result.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits May 2021