Tcwg-commits December 2021

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_debug updated (ba4ba9711a -> a3e9c2f9da)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_debug in repository toolchain/ci/binutils-gdb. from ba4ba9711a libctf: workaround automake bug with conditional info pages adds 7a34f66b23 gdb/remote: fix use after free bug adds cc7ea7504c gdb/testsuite: give a test a real name adds bf94cfb631 gdb: make value_subscripted_rvalue static adds 69ce6091e6 aarch64: Fix uninitialised memory adds ce1a6f421d gdb: make saved_filename an std::string adds 857dfb92de gdb: return *this in target_waitstatus setters adds 7509b82979 gdb: change store_waitstatus to return a target_waitstatus by value adds 4bce7cdaf4 gdbsupport: add array_view copy function adds 2a50938ab7 gdb: make extract_integer take an array_view adds 46680d22de gdb: trivial changes to use array_view adds c471bdb198 gdb: use intrusive_list for cmd_list_element aliases list adds eccd14b3f5 gdb: change some alias functions parameters to const-reference adds 92228a334b gdb: small "maintenance info line-table" readability improvements adds d4172973cb Automatic date update in version.in adds f52ee74fea bfd: convert bfdver.h to silent automake rules adds 0f34c35dd9 bfd: move header updates up a directory adds 17ebe20800 bfd: unify header generation rules adds fb2a515fd0 gdb: revert one array_view copy change in ada-lang.c adds a3e9c2f9da gdb/testsuite: fix two "maint info line-table"-related tests No new revisions were added by this update. Summary of changes: bfd/Makefile.am | 65 +++++++------ bfd/Makefile.in | 68 ++++++++------ bfd/doc/Makefile.am | 94 ------------------- bfd/doc/Makefile.in | 94 ------------------- bfd/version.h | 2 +- gdb/ada-lang.c | 13 +-- gdb/amd64-linux-tdep.c | 2 +- gdb/cli/cli-decode.c | 132 +++++++++++++-------------- gdb/cli/cli-decode.h | 18 +++- gdb/cli/cli-logging.c | 20 ++-- gdb/defs.h | 23 ++++- gdb/dwarf2/expr.c | 11 +-- gdb/fbsd-tdep.c | 6 +- gdb/findvar.c | 35 ++++--- gdb/frame.c | 6 +- gdb/frv-tdep.c | 2 +- gdb/gnu-nat.c | 2 +- gdb/hppa-bsd-tdep.c | 2 +- gdb/hppa-linux-tdep.c | 2 +- gdb/i386-linux-tdep.c | 2 +- gdb/ia64-tdep.c | 4 +- gdb/inf-child.c | 17 ++-- gdb/inf-child.h | 5 +- gdb/inf-ptrace.c | 3 +- gdb/linux-nat.c | 6 +- gdb/netbsd-nat.c | 2 +- gdb/procfs.c | 2 +- gdb/regcache.c | 21 ++--- gdb/remote.c | 35 ++++++- gdb/rs6000-aix-nat.c | 2 +- gdb/rust-lang.c | 10 +- gdb/symmisc.c | 19 ++-- gdb/target/waitstatus.h | 48 ++++++---- gdb/testsuite/gdb.base/maint.exp | 4 + gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp | 4 + gdb/testsuite/gdb.python/py-send-packet.exp | 3 +- gdb/unittests/array-view-selftests.c | 104 +++++++++++++++++++++ gdb/unittests/gmp-utils-selftests.c | 2 +- gdb/valarith.c | 68 ++++++++------ gdb/valops.c | 66 ++++++-------- gdb/value.c | 24 ++--- gdb/value.h | 4 - gdbsupport/array-view.h | 15 +++ opcodes/aarch64-dis.c | 2 +- opcodes/aarch64-opc.c | 2 + 45 files changed, 546 insertions(+), 525 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_debug updated (6fdcdb71 -> d8238477)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_debug in repository toolchain/ci/base-artifacts. discards 6fdcdb71 0: update: binutils-gcc: 2 new d8238477 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (6fdcdb71) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-aar [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1568 -> 1520 bytes 02-prepare_abe/console.log.xz | Bin 2748 -> 2732 bytes 04-build_abe-binutils/console.log.xz | Bin 39356 -> 38916 bytes 05-build_abe-bootstrap_debug/console.log.xz | Bin 262712 -> 262204 bytes 06-check_regression/console.log.xz | Bin 416 -> 416 bytes 07-update_baseline/console.log | 77 +++------------------------- jenkins/manifest.sh | 12 ++--- 7 files changed, 14 insertions(+), 75 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/gdb] branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 updated (f52ee74fea -> a3e9c2f9da)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 in repository toolchain/ci/gdb. from f52ee74fea bfd: convert bfdver.h to silent automake rules adds 0f34c35dd9 bfd: move header updates up a directory adds 17ebe20800 bfd: unify header generation rules adds fb2a515fd0 gdb: revert one array_view copy change in ada-lang.c adds a3e9c2f9da gdb/testsuite: fix two "maint info line-table"-related tests No new revisions were added by this update. Summary of changes: bfd/Makefile.am | 61 +++++++++++------- bfd/Makefile.in | 64 +++++++++++-------- bfd/doc/Makefile.am | 94 ---------------------------- bfd/doc/Makefile.in | 94 ---------------------------- gdb/ada-lang.c | 4 +- gdb/testsuite/gdb.base/maint.exp | 4 ++ gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp | 4 ++ 7 files changed, 86 insertions(+), 239 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 updated (23c77f6018 -> 4df1fa6ddc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 in repository toolchain/ci/glibc. from 23c77f6018 nptl: Increase default TCB alignment to 32 new 4df1fa6ddc x86-64: Use notl in EVEX strcmp [BZ #28646] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: string/test-strcmp.c | 28 ++++++++++++++++++++++++++++ sysdeps/x86_64/multiarch/strcmp-evex.S | 14 ++++++++------ 2 files changed, 36 insertions(+), 6 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 updated (03a9bd059b4 -> daca416fc28)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 in repository toolchain/ci/gcc. from 03a9bd059b4 Daily bump. adds e096e2cfe9f testsuite: powerpc/vec_reve_1.c requires VSX. adds daca416fc28 [PR103028] test ifcvt trap_if seq more strictly after reload No new revisions were added by this update. Summary of changes: gcc/ifcvt.c | 4 +++- gcc/testsuite/gcc.dg/pr103028.c | 21 +++++++++++++++++++++ gcc/testsuite/gcc.target/powerpc/vec_reve_1.c | 4 ++-- 3 files changed, 26 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/pr103028.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 updated (f52ee74fea -> a3e9c2f9da)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 in repository toolchain/ci/binutils-gdb. from f52ee74fea bfd: convert bfdver.h to silent automake rules adds 0f34c35dd9 bfd: move header updates up a directory adds 17ebe20800 bfd: unify header generation rules adds fb2a515fd0 gdb: revert one array_view copy change in ada-lang.c adds a3e9c2f9da gdb/testsuite: fix two "maint info line-table"-related tests No new revisions were added by this update. Summary of changes: bfd/Makefile.am | 61 +++++++++++------- bfd/Makefile.in | 64 +++++++++++-------- bfd/doc/Makefile.am | 94 ---------------------------- bfd/doc/Makefile.in | 94 ---------------------------- gdb/ada-lang.c | 4 +- gdb/testsuite/gdb.base/maint.exp | 4 ++ gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp | 4 ++ 7 files changed, 86 insertions(+), 239 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 updated (1fd97d18 -> 1181527d)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 in repository toolchain/ci/base-artifacts. discards 1fd97d18 0: update: binutils-gcc-linux-glibc-gdb-qemu: 7 new 1181527d 0: update: binutils-gcc-linux-glibc-gdb-qemu: 7 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1fd97d18) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_cross_build/master-a [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1548 -> 1536 bytes 02-prepare_abe/console.log.xz | Bin 2772 -> 2784 bytes 04-build_abe-binutils/console.log.xz | Bin 31236 -> 31248 bytes 05-build_abe-stage1/console.log.xz | Bin 70872 -> 71632 bytes 07-build_abe-linux/console.log.xz | Bin 8988 -> 8996 bytes 08-build_abe-glibc/console.log.xz | Bin 236148 -> 236392 bytes 09-build_abe-stage2/console.log.xz | Bin 194132 -> 194664 bytes 10-build_abe-gdb/console.log.xz | Bin 38576 -> 39068 bytes 11-build_abe-qemu/console.log.xz | Bin 30160 -> 30488 bytes 12-check_regression/console.log.xz | Bin 416 -> 416 bytes 13-update_baseline/console.log | 2 +- jenkins/manifest.sh | 22 +++++++++++----------- 12 files changed, 12 insertions(+), 12 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O3_LTO updated (45a8caf1cdf6 -> 2cdc6f2ca62e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O3_LTO in repository toolchain/ci/llvm-project. from 45a8caf1cdf6 [flang] Fix reversed comparison in RESHAPE() runtime adds a68af62b422d [InstSimplify] baseline tests for icmp of lshr/udiv fold (NFC) adds 719354a57191 Revert "[SCEV] Fix and validate ValueExprMap/ExprValueMap [...] adds 30029e7407c8 [compiler-rt][CMake] Support powerpc32 on Linux adds 06f1d63cb16c [compiler-rt][CMake] Support powerpcspe build adds 53b00b821582 [InstSimplify] Fold X {lshr,udiv} C <u X --> true for nonz [...] adds 8ae815cb19a0 [sanitizer] Switch StackStore to 8 MiB blocks adds f1ba48d50800 [ELF] Simplify Symbol::extract. NFC adds 56c8ad237aa4 [libcxx][NFC] Add tests for associative containers key_com [...] adds 6fa8f7beb192 [ELF][test] Test that .o definition does not inherit .so S [...] adds a19e16352610 Fixed broken build under GCC 5.4. adds 387927bbaf96 [Target] Use range-based for loops (NFC) adds b0c742152489 [RISCV] Emit DWARF location expression for RVV stack objects. adds 8ebb3eac02a9 [test] Use -passes syntax when specifying pipeline in some [...] adds 407600604b59 [test] Use -passes in lit tests for the UpdateTestChecks tool adds 00cf717f51d7 [test] Use -passes syntax in Feature/OperandBundles lit tests adds da66263b6e50 [ARM] implement support for ALU/LDR PC-relative group relocations adds 2b160e95c89f Reland [SCEV] Fix and validate ValueExprMap/ExprValueMap c [...] adds 9f374a74c2aa [NVPTX][AsmPrinter] Avoid removing globals before calling [...] adds 25dad1064bf1 [DSE] Optimize defining access of defs while walking upwards. adds 1b2d58ba90cd [ARM] Extra testing for v2i1 types. NFC adds c2550e342732 [SCEV] Simplify invalidation after BE count calculation (NFCI) adds f492a414bad7 [SCEV] Simplify forgetSymbolicName() (NFCI) adds 904328932699 [DwarfCompileUnit] Set parent DIE right after creating a l [...] adds 7ba64ab05a17 [PowerPC] Regenerate ppc64-P9-vabsd.ll tests adds 7d5d063c7745 [ARM] Fold away unnecessary CSET/CMPZ adds ff649e080210 [Target] Use range-based for loops (NFC) adds 5c64d8ef8cc0 [ARM] CSINC/CSINV patterns from CMOV adds 2afd16fe725f [mlir] Enable MLIRDialectUtilsTests adds cc2794abeab5 [sanitizer] Switch StackStore from pointers to 32bit IDs adds a9f837bbf0ec NFC: Simplify sve-widen-phi.ll by unrolling once. adds 28a4deab921d [LV] Fix incorrectly marking a pointer indvar as 'scalar'. adds 168bc7ce7e2e [sanitizer] Remove storeIds and use padding of StackDepotNode adds 01631ffcfca7 [libc++][format] Adds formatting benchmarks. adds 7b75110fac97 [SCEV] Turn validity check in getExistingSCEV into assert (NFC). adds 730dccb98622 [libc++] Remove support for Clang 9 and older. adds cb68fc814af6 [libc++] Add myself to the credits. adds 97755ab1c67f [InstCombine] reduce code duplication; NFC adds f55d1eb3746a [InstCombine] use decomposeBitTestICmp to make icmp (trunc [...] adds 04b5c00952c3 [ARM] Add testing for various fptosi.sat patterns. NFC adds 8874ada906f6 [clang] Fix -Wreturn-type false positive in @try statements adds c73fc74ce0f8 [llvm] Use range-based for loops (NFC) adds 3495090b9bfd [LV] Move code from widenGEP to VPWidenGEPRecipe (NFC). adds 6c1c2313d1b7 [ELF] Simplify assignFileOffsets. NFC adds f9a4d9aa0309 [ELF] -z separate-*: Use max-page-size instead of common-p [...] adds 3608e18a946e [DSE] Use MapVector for IOLs adds df08b2fe8b35 [AArch64] Avoid crashing on invalid -Wa,-march= values adds f5a9bfdf8f4a [mlir] NFC - Move invalid.mlir tests to the proper dialects adds cecc6893a086 [ELF] Simplify assignFileOffsets adds d060cc1f9808 [ELF] Fix out-of-bounds write in memset(&Out::first, ...) adds 25c7ec4fc622 [ELF] Simplify OutputSection::sectionIndex assignment. NFC adds 7ea662e2dda0 [ELF] Replace one make_unique from r316378 with a stack ob [...] adds b3163c1cdde0 [Driver] Support PowerPC SPE musl dynamic linker name ld-m [...] adds 85e50c10807f [ELF] Inline InputSection::getOffset into callers and remo [...] adds e80a0b353c31 [ELF] Remove unneeded getOutputSectionVA. NFC adds 5233ad17e77e Compilation Database: Point Bazel users to a solution adds 1164c4b37583 [ELF] Simplify/remove LinkerScript::output and advance. NFC adds ace1d0ad3dc4 [mlir][python] Normalize asm-printing IR behavior. adds fd7d40640d26 [llvm] Use range-based for loops (NFC) adds 6488bd1d5171 test: add a lit configuration for Windows subdirectory adds b5f1fa3e5c15 [ELF][test] --oformat binary: Check that SIZEOF_HEADERS==0 adds 11291326cd98 [ELF] Support --oformat= beside Separate --oformat adds 01eb91fa86a0 [AIX] Disable empty.ll test using unsupported split dwarf adds 89c0f4553ea6 [ELF] Simplify/remove LinkerScript::switchTo. NFC adds e652f3f04a25 [ELF] Simplify some ctx->outSec with sec. NFC adds 286c11165e24 [ELF] Decrease InputSectionBase::entsize to uint32_t adds 4aac00a71db3 [analyzer][doc] Add user documenation for taint analysis adds 99a2d940dd77 [ELF] Speed up/simplify removeUnusedSyntheticSections. NFC adds 4709bacf18b4 [ELF] Avoid std::stable_partition which may allocate memory. NFC adds 9d1938fd1441 [flang] Return true in IsSymplyContiguous for allocatables adds a31f4bdfe821 [CodeGen][SVE] Use whilelo instruction when lowering @llvm [...] adds 0685e83534ef Fix cppcoreguidelines-virtual-base-class-destructor in macros adds 0540485436c4 [libtooling][clang-tidy] Fix crashing on rendering invalid [...] adds e1d0673aeeec [clang-tidy] Fix crashing altera-struct-pack-align on inva [...] adds a8120a771143 [clang-tidy] Ignore narrowing conversions in case of bitfields adds 1b3cd35ade5d [fir] Add base for runtime builder unittests adds fd71159f6468 [LV] Move code from widenInstruction to VPWidenRecipe. (NFC) adds 18452d1f1247 [fir] Add fir transformational intrinsic builder adds 51e2c8c9bf96 [fir] Add assignment runtime API builder adds af37d4b6fee8 [analyzer][NFC] Refactor AnalysisConsumer::getModeForDecl() adds 2e7202b0082f [fir] Add data flow optimization pass adds cffe3a084f87 [X86][Costmodel] Now that `getReplicationShuffleCost()` is [...] adds 61808066325f [AArch64][SVE] Mark fixed-type FP extending/truncating loa [...] adds 297fb66484c7 Use a deterministic order when updating the DominatorTree adds d96f92ff16ed fix typos in comments adds 5e96553608a1 [NFC][X86][LV][Costmodel] Add most basic test for masked i [...] adds 90010c2e1d60 Don't consider 'LinkageSpec' when calculating DeclContext [...] adds 84364bdaabfc [CodeGen][AArch64] Bail out in performConcatVectorsCombine [...] adds 814aabae3775 [clang-format] regressed default behavior for operator par [...] adds fc53eb69c26c Reapply 'Implement target_clones multiversioning' adds 95f34e318c46 [mlir][memref] Fix bug in verification of memref.collapse_shape adds a7363067e69a [X86] Add vector test coverage for or with no common bits tests adds 7319d11586c4 [AMDGPU] Fix "must generated" typo in docs adds 65d9dc7f1f4a [AMDGPU] Fix list indentation in docs adds 881840fc268e [AMDGPU][GlobalISel] Transform (fadd (fmul x, y), z) -> (f [...] adds 895113621653 [AMDGPU][GlobalISel] Transform (fadd (fpext (fmul x, y)), [...] adds f7322925365c [AMDGPU][GlobalISel] Transform (fadd (fma x, y, (fmul u, v [...] adds e5e49a08f116 [AMDGPU][GlobalISel] Transform (fadd (fma x, y, (fpext (fm [...] adds a7821692708c [AMDGPU][GlobalISel] Transform (fsub (fmul x, y), z) -> (f [...] adds 5fe7fcd28e5e [AMDGPU][GlobalISel] Transform (fsub (fneg (fmul, x, y)), [...] adds 37c2a2201d68 [AMDGPU][GlobalISel] Transform (fsub (fpext (fmul x, y)), [...] adds 0dd570ff56c5 [AMDGPU][GlobalISel] Transform (fsub (fpext (fneg (fmul x, [...] adds 7e73c2a66a8b [X86][Costmodel] `getInterleavedMemoryOpCostAVX512()`: mas [...] adds 1cc3b135aa61 [fir] Get rid of the global option in FIRBuilder adds 2022e2fcd05c [HWASan] Disable LTO test on aarch64. adds 77dd579827f2 [SCEV] Remove incorrect assert adds c572eb1ad9d8 [InstCombine] Fold (~A | B) ^ A --> ~(A & B) adds f240e528cea2 [llvm] Use range-based for loops (NFC) adds 8d474f1d1575 [mlir] Handle an edge case when folding reshapes with mult [...] adds 34d02fada287 [LLDB][NativePDB] fix find-functions.cpp failure on windows bots adds 23dc88622630 [NFC][AIX]Disable unsupported hip test on AIX adds a8278a747ddf [libc++] Fix incorrect REQUIRES on a locale-dependent test adds 6c27d389c8a0 OpenMP: Start calling setTargetAttributes for generated kernels adds fe270ab061fa [LLDB][NativePDB] fix find-functions.cpp failure on window [...] adds df0560ca0018 [HIP] Add atomic load, atomic store and atomic cmpxchng_we [...] adds 3c32c568844c [NFC][clang]Increase the number of driver diagnostics adds 5c6b9e1622b1 [InstCombine] (~(a | b) & c) | ~(c | (a ^ b)) -> ~((a | b) [...] adds 142044a0b52f [InstCombine] add tests for or with mul operand; NFC adds eee035235ebd [LICM] Regenerate test checks (NFC) adds 52668355f481 [mlir][sparse] some leftover cleanup from migration to buf [...] adds 25eb7fa01d7e Revert "OpenMP: Start calling setTargetAttributes for gene [...] adds 32815bc907c4 [DebugInfo][InstrRef][NFC] Test changes: DBG_VALUE to DBG_ [...] adds 4f215bfa6ee5 Update unit test API usage (NFC) adds 935abeaace12 OpenMP: Correctly query location for amdgpu-arch adds 410d276400a9 [DAG] Add tests for fpsti.sat for various architectures. NFC adds 9cf31b8d39d6 [DebugInfo][InstrRef] Preserve properties of restored variables adds 99f8b795cc03 [InstCombine] try to fold 'or' into 'mul' operand adds 1ce51a5f355f [ELF] --cref: If -Map is specified, print to the map file adds 829b62adf5db [unroll] Split full exact and full bound unroll costing [NFC] adds a20987adf4f8 [DebugInfo][InstrRef] Add indirection from dbg.declare in [...] adds a655e0f991ba [unroll] Reduce scope of UnrollFactor variable in computeU [...] adds f50207c015df [unroll] Use early return in shouldPartialUnroll [nfc] adds fc9dae420c0c [DebugInfo][InstrRef][NFC] "Final" x86 test cleanup adds 8906a0fe64ab [SCEVExpander] Drop poison generating flags when reusing i [...] adds 45ecfed6c636 [CVP] Remove ashr of -1 or 0 adds 0eee844539e4 [DebugInfo][InstrRef] Terminate overlapping variable fragments adds c7aa358798e6 [clang-tidy] Fix pr48613: "llvm-header-guard uses a reserv [...] adds 3ab150f6e44b [openmp][devicertl] Add a missing loader_uninitialized attribute adds 6f99e1aa58e3 [lldb][NFC] Format lldb/include/lldb/Symbol/Type.h adds e8b8304d76cc [NFC][Regalloc] Split canEvictInterference into hint and general adds e63c799a767b [Demangle] Add support for D simple single qualified names adds 6e08abdc256b [Demangle] Add support for multiple identifiers in D quali [...] adds b779f02a1cb7 [Demangle] Add support for D anonymous symbols adds 53dfa5254683 Tests for D112754 adds 87ba99c263af X86: Fold masked-merge when and-not is not available adds 7d4da4e1ab7f [mlir][sparse] generalize sparse tensor output implementation adds bd4c6a476fd0 Add missing header adds 2e5c47eda14a Revert "[lldb][NFC] Format lldb/include/lldb/Symbol/Type.h" adds 25a7e4b9f7c6 [sanitizer] Add Leb128 encoding/decoding adds fde937748b7d [NFC] Header comment in X86RegisterBanks.td referred to Aarch64 adds 4ae2222e143b [RISCV] Add a test case to show the bug in RISCVFrameLowering. adds 9a8856653717 [RISCV] Fix a bug in RISCVFrameLowering. adds a06d35275635 [NFC][sanitizer] Track progress of populating the block adds b121d23a9cea [RISCV] Promote f16 log/pow/exp/sin/cos/etc. to f32 libcalls. adds f1d8345a2ab3 [TwoAddressInstructionPass] Create register mapping for re [...] adds 5297cbf04532 [AMDGPU] Enable copy between VGPR and AGPR classes during [...] adds 0150645bf5ae [DebugInfo] Do not replace existing nodes from DICompileUnit adds a6e7d024a9eb [mlir][python] Add pyi stub files to enable auto completion. adds bdc3183742f1 [mlir][python] Implement more SymbolTable methods. adds a88bb5b9fee5 [mlir][python] Audit and fix a lot of the Python pyi stubs. adds 42c15c7edf17 [X86][clang] Enable floating-point type for -mno-x87 optio [...] adds 5047e3a3ba92 [ELF] Move GOT/PLT relocation code closer. NFC adds 5bbe50148f3b [clang-tidy] Warn on functional C-style casts adds 89453ed6f205 [ARM] create new pseudo t2LDRLIT_ga_pcrel for stack guards adds 8cd782487fe6 [X86][LoopVectorize] "Fix" `X86TTIImpl::getAddressComputat [...] adds c2e08aba1afd [llvm-profgen] Compute and show profile density adds 7ba70d32736a [PR52549][clang-cl] Predefine _MSVC_EXECUTION_CHARACTER_SET adds 29d4230d6b52 [RISCV] Decode vtype with reserved fields to raw immediate adds 5188f55d32a9 [ELF] Move ObjFile<ELFT>::{getLocalSymbols,getGlobalSymbol [...] adds 0d0371f58ff0 [mlir][OpDSL] Fix OpDSL tests after https://reviews.llvm.o [...] adds f89bb3c012b4 [mlir] Move bufferization-related passes to `bufferization [...] adds 3356d8837e46 [clangd] Make std symbol generation script python3 friendly adds ae1ea0bead75 [mlir] Decompose Bufferization Clone operation into Memref [...] adds 5cff77c23f43 [clang][ARM] PACBTI-M assembly support adds 5d602120c3a3 [AMDGPU] Update docs for nontemporal store adds bc5dbb0baee3 [GlobalISel] Add matchers for constant splat. adds 9a14adeae000 [lldb] Remove 'extern "C"' from the lldb-swig-python interface adds f02c5f347831 [Analyzer][solver] Do not remove the simplified symbol fro [...] adds 0a17896fe6fd [Analyzer][Core] Make SValBuilder to better simplify svals [...] adds dab776dd0fb4 [LV] Move code from widenSelectInstruction to VPWidenSelec [...] adds a48e05030bbd [DebugInfo][InstrRef] "final final" test cleanups for x86 tests adds de21f346913c [libc] Add memmove benchmarks adds af059dfef5a7 [libc] Add a reasonably optimized version for bcmp adds a34f24689945 [libc++][ABI BREAK] Do not use the C++03 emulation for std [...] adds 52ff3b009388 [DAG] Create fptosi.sat from clamped fptosi adds 8dda516b8325 [DebugInfo][InstrRef] Avoid dropping fragment info during [...] adds 14c4051122bf [AMDGPU][NFC] Remove unused defvar in AMDGPUInstructions.td. adds 7093c8101033 [DebugInfo][InstrRef][X86] Instrument expanded DYN_ALLOCAs adds f910aa910555 [mlir] Fix BufferizationToMemRef build. adds 97db64082eb0 [mlir] Add bazel build for BufferizationToMemRef. adds 651122fc4ac9 [DebugInfo][InstrRef] Pre-land on-by-default-for-x86 changes adds 47f759309eea [fir] Add array value copy pass adds ee0c75eba31b [gn build] (semimanually) port 25a7e4b9f7c6 adds a6e673643c44 [lldb] Inline Platform::LoadCachedExecutable into its (sin [...] adds 1408684957bb [lldb] Introduce PlatformQemuUser adds 9a86eb560248 [X86] Add mulh test coverage for extension to illegal type adds 3c045070882f [DebugInfo] Turn instruction referencing on by default for x86 adds 6f4dd1b2dca8 [BuildLibCalls] Add memset_chk test. adds 41d59a36459e [DSE] Add memset_chk tests. adds 0c1b18f0f3e5 Test commit adds a87782c34d66 Revert "[DAG] Create fptosi.sat from clamped fptosi" adds 6e2aecd759dc [clang][dataflow] Add base types for building dataflow analyses adds c01c62c76c60 [MC][ELF] Fix accepting abbreviated form with Type change adds cf3422d3df5b [fir] Add fir reduction builder adds 74cbd71072de [lld-macho] Mark dylib symbols coming from -weak_framework [...] adds 914e72d40014 [mlir][linalg] Run CSE after every CodegenStrategy transfo [...] adds 7986a5f23ebb [OpenMP] Add RTL function to externalization RAII adds 1ae7342a7dd4 [mlir][linalg] Fix windows build issue in hoist padding. adds 9e8a71caf02a [DAG] Create fptosi.sat from clamped fptosi adds 7f7103cd06b0 [mlir][linalg] Use top down traversal for padding. adds 3e32f827e264 [clang][dataflow] Fix broken build in ClangStaticAnalyzer adds 316e627c2b98 [mlir][linalg] Support the empty anchor op string when padding. adds c9ad356266f3 [DSE] Use optimized access if available for redundant stor [...] adds 1e8286467036 Use VersionTuple for parsing versions in Triple. This make [...] adds 98dbcff19cfe [mlir][linalg] Adapt the decompose patterns to use a filte [...] adds c8f2139eb0de [mlir][linalg] Add decompose to CodegenStrategy. adds eb97c89cacb8 [fir] Remove unused fct recordTypeCanBeMemCopied adds 3cc21ee6b966 Revert "[fir] Add fir reduction builder" adds ca57b80cd676 Code quality: Combine V_RSQ adds 455a2b824d77 Fix file extension of alignment-assumption-ignorelist.cppp test adds c41b318423c4 [LV] Remove unneeded cast to Operator [NFC] adds fd1d8e45f488 [clang][dataflow] Make header parse adds b8e03be88dc8 [PS4][DWARF] Explicitly set default DWARF version to 4 adds bf317f66989c [CSSPGO] Sorting nodes in a cycle of profiled call graph. adds 5e3200f3ce5a [JITLink][ELF] Add support for reading extended table adds c737d4d20321 [JITLink][ELF] Don't skip sections of size 0 adds 37d72991c136 [SCEV] Track and invalidate ValuesAtScopes users adds a356dae74c87 [RegionPass] Added check for -filter-print-funcs option to [...] adds 40d5eeac6cd8 Revert "Use VersionTuple for parsing versions in Triple. T [...] adds fc57cfad3c1e [SLP][NFC]Move static function to make it visible in membe [...] adds 746e632dafbe [InstSimplify] add tests for 'or' logic folds; NFC adds 1fdb0f6ffdff [InstSimplify] add tests for 'or' with logic ops; NFC adds 8dec0b23da11 [InstSimplify] refactor 'or' logic folds; NFC adds 33f8c1168f39 [InstSimplify] adjust tests for 'or' of logic ops; NFC adds 7a7c059d8675 [InstSimplify] reduce code duplication for 'or' logic fold; NFC adds dce6c434ead3 [SLP]Improve isFixedVectorShuffle and its use. adds c0b33a65f21c Typo fix adds 8bc593cbbb1a [flang] Address TODO from previous changes to IsSaved() adds 7cca33b40f77 [memprof] Extend llvm-profdata to display MemProf profile [...] adds 299cec3c51a9 [gn build] Port 7cca33b40f77 adds 8c3641d03ec0 [ELF] Change -z unknown from error to warning adds 6076c1dc1ca1 [InstSimplify] make 'or' test names more descriptive; NFC adds c49ef1448d17 [InstSimplify] reduce code duplication for 'or' logic folds; NFC adds 4b30076f16fc [InstSimplify] add logic fold for 'or' adds 0a302f666737 [lldb] Search PrivateFrameworks when using an internal SDK adds 4fa9e435209e [lldb] Fix indentation in builders/darwin.py adds ad45df91ad6a [ELF][PPC64] Remove unneeded PPC64PCRelLongBranchThunk adds a2ce97cc3f99 [memprof] Fix unit test build after refactoring shared header. adds 155f5a6dac62 [libc][clang-tidy] fix namespace check for externals adds 2e114e3fda4f fix inverted logic for HideUnrelatedOptions adds 13bdb7ab4a7a [mlir][tosa] Add tosa.conv2d as fully_connected canonicalization adds 1cf11df59128 [memprof] Disable pedantic warnings, suppress variadic mac [...] adds c379911a94c1 [NFC][Clang]Inclusive language: Replace uses of whitelist [...] adds f5ad6fa279cc [clang][docs] Inclusive language: remove use of sanity che [...] adds c9f9be0381d1 [SCEV] Verify integrity of ValuesAtScopes and users (NFC) adds 86d5dc9afc9b [memprof] Disallow memprof profile reader tests on non-x86 archs. adds 18308e171b5b AArch64 GIsel: legalize lshr operands, even if it is poison adds 311dd55c9eb9 [mlir][MemRef] Fix SubViewOp canonicalization when a subse [...] adds a08b750ce9df [mlir][tensor] InsertSliceOp verification. adds 5f2e8f579697 [lldb] Mark TestTsanBasic and TestUbsanBasic as "no debug [...] adds c47135949779 [lldb] Fix TypeError: argument of type 'NoneType' is not iterable adds 196204c72c68 [flang] Fix usage & catch errors for MAX/MIN with keyword= [...] adds d1326a3b1005 [lldb] Fix broken skipUnlessUndefinedBehaviorSanitizer decorator adds 3ad0c6b75ea5 [clang-repl][NFC] Fix calling convention mismatch in test adds cbd445e4a331 [flang] Re-fold bounds expressions in DATA implied DO loops adds 0e85232fa39d [mlir][sparse] refine simply dynamic sparse tensor outputs adds 80cdf0db67e2 [flang] Correct INQUIRE(POSITION= & PAD=) adds 7e6df41f655e [NFC] Refactor symbol table parsing. adds 9e3e1aad3161 [InstCombine] Allow fake vector insert folding to bit-logi [...] adds aeeacbd989fc [NFC][sanitizer] Fail test quickly adds 63f417ef3996 [ADT] Remove 0-width Asserts in APInt.getZExtValue adds 77ff6f7df869 [flang] Define & implement a lowering support API IsContig [...] adds 618f8dc5e5b5 [OpenMP][libomp][doc] Add environment variables documentation adds 858eb8fc11e2 [TSan][Darwin] Avoid crashes due to interpreting non-zero [...] adds 0850655da69a Big-endian version of vpermxor adds a503cb00d105 [NFC][regalloc] Factor accesses to ExtraRegInfo adds 9b704d31b54a [Clang] Add option to disable -mconstructor-aliases with - [...] adds 73863648892e Revert "[MLIR] Update Vector To LLVM conversion to be awar [...] adds 1ee6f7add1ca [flang] Rearrange prototype & code placement of IsCoarray() adds fe0508dc9d42 [mlir][sparse] fix typos in integration tests adds 5e2358c781b8 [runtimes][openmp] Change to not treat ARCH-unknown-linux- [...] adds 41a681ce096d [FS-AFDO][llvm-profgen] Generate profile with FS-AFDO disc [...] adds b83a4222b1ab [ObjectYAML/obj2yaml/yaml2obj][MachO] Support indirect sym [...] adds f15a8545672a [llvm-profgen] Truncate the context with zero probe ID adds 61e353e0b623 [mlir][sparse] added sparse out element wise mult integrat [...] adds 7c1d77798346 [NFC][sanitizer] Add entry point for compression adds 520f641877cd [test] Avoid dumping .o in source tree (expand-pseudos.ll) adds 47f230ba2c8f Add toggling for -fnew-infallible/-fno-new-infallible adds 7d18267cfef7 [libcxx][doc] Document recent spaceship projects progress adds d8f9eaad89fa [RISCV] Teach RISCVTargetLowering::shouldSinkOperands to h [...] adds bf18253b0ee5 [sanitizer] Add compress_stack_depot flag adds 62fea88bc588 [mlir] Update accessors prefixed form (NFC) adds 65a3de91ab3e [X86] Pre-commit tests to show the problem of SQRT when `R [...] adds 92a8dc0735cf [lldb] Temporarily skip TestTsanBasic on Darwin adds 3a4d373ec2ba [memprof] Align each rawprofile section to 8b. adds 1d8f2957591c [sanitizer] Add delta compression stack depot adds 15826eb43746 [Legalizer] Avoid expansion to BR_CC if illegal adds 4b553297ef3e [clang-offload-bundler] Reuse original file extension for [...] adds bc38673e4de5 [mlir] Make sure linearizeCollapsedDims doesn't drop input [...] adds 9a844c2a9b5c Revert "[mlir] Make sure linearizeCollapsedDims doesn't dr [...] adds 69a8a7cf2dc4 [mlir] Make sure linearizeCollapsedDims doesn't drop input [...] adds ce22b7f17b6a [NPM] Fix LoopNestPasses in -print-pipeline-passes adds f6ae8e8cc7f4 [fir] Add fir reduction builder adds 3666cd0216b8 [Coroutines] Make suspend_always in test noexcept (NFC) adds 46fd7fd7b342 [Flang] Replace notifyMatchFailure with TODO hard failures adds bdcc5aadf5aa [libc] Add _64 element to aarch64 adds 7de410440d46 [DSE] Allow DSE to optimize MemorySSA by default. adds 3a6c4f307bd0 [mlir] Add a helper for TiledLoopOp to get an operand tied [...] adds ec15b7307f54 Add 'LLVM_DEFAULT_TARGET_TRIPLE' to the documented list of [...] adds 67704801c679 [SCEV] Track backedge taken count users (NFCI) adds 84b978da3b80 [LoopUnrollRuntime] Remove unnecessary pointer BECount che [...] adds ec97e1206abd [OpenMP][IRBuilder] Fix createSections adds 2fd0ea960c8a [mlir][linalg][bufferize] CallOps do not bufferize to memo [...] adds 0c047a8e1332 [Sema] check PseudoObject when rebuilding CXXOperatorCallE [...] adds 388bfc540860 [ARM] Fix some identing in ARMAsmPrinter::emitInstruction, NFC adds 6a5e29d13f8e [BuildLibCalls] Add argmemonly, writeonly, nounwind to mem [...] adds a4fbae268f67 Revert "[Sema] check PseudoObject when rebuilding CXXOpera [...] adds 597884226094 Fix clang-format bug when handling conflict markers. adds 6d41de380f22 [ARM] Teach getIntImmCostInst about the cost of saturating [...] adds e3b2f0226bc0 [clang][ARM] PACBTI-M frontend support adds 639b85ea0ba2 [IR] Assert on getPointerElementType() on opaque pointer (NFC) adds ab2611d0998c [clang][ARM] emit PACBTI-M feature defines adds c12c7a84b03b [ARM] add common parts for PACBTI-M support in the backend adds 8ee55ab6c06e [IR] Remove deprecated GetElementPtrInst constructors adds 89eb85ac6eab [IRBuilder] Remove deprecated methods adds d688b3162800 Fix segfault in clang-format. adds b430782be34b [ARM] emit PACBTI-M build attributes adds 0e98659ea119 [ARM] Strengthen fpclamptosat.ll triple to attempt to fix [...] adds 9981dd142f18 [DAG] Apply clang-format to visitMSTORE + visitMLOAD. NFC. adds 0eb1efb92c30 [DAGCombiner] When combining REM ensure optimized div node [...] adds 1e1a8be21fce [LICM] Support opaque pointers in scalar promotion adds 4f7d397b6dbf [X86] Add some basic fptosi/fptoui saturate vector tests adds 5b4746f94aed [clang][ARM] removing branch protection error cmdline test adds 810b2849181f Fixed a memory leak in the PDLToPDLInterp RootOrderingTest. adds ecb9d8e4e3c4 [LICM] Hoist LOAD without sinking the STORE adds 72f9f066df17 Revert "[LICM] Hoist LOAD without sinking the STORE" adds f5f28d5b0ce7 [ARM] Implement BTI placement pass for PACBTI-M adds dee85a4ffaad [gn build] Port f5f28d5b0ce7 adds 0428d44d4cfa [Dexter] Add DexDeclareAddress command and address function adds 8d25da78aad9 [libcxx][test][NFC] Extend get_allocator() testing for containers adds 4dcfae6a003a Fix a violated precondition in clang-format. adds 9a3b357e2b85 [gn build] (manually) port 94d5f2afbef0 adds 3f643f166494 [clang-cl] Set _MSVC_LANG to 202002L with /std:c++20 adds a9d1d00b865a [VE] Make VE official adds f0eef1d21203 [Dexter] Fix address_printing test by requiring lldb adds c6bd63803f62 [BasicAA] Add strncpy libfunc tests. adds 524ad6babb8e [BasicAA] Add memset_chk libfunc tests. adds e28174cf5648 [SLP][NFC]Add a test for inserting into constant undef vec [...] adds 003c9c7457d0 Revert "[Flang] Replace notifyMatchFailure with TODO hard [...] adds e44298a8f8af [LV] Move code from vectorizeMemoryInstruction to recipe's [...] adds 13e66c070bdb Revert "[ARM] Teach getIntImmCostInst about the cost of sa [...] adds 9fce961d2f47 [mlir][linalg] Disable tensor-matmul test under asan adds 9687c1317414 [Verifier] Make matrix intrinsic verification compatible w [...] adds ddce6e05612d [SLP]Improve vectorization of cmp instructions sequences. adds fd9069ffce2d [AArch64][SVE] Duplicate FP_EXTEND/FP_TRUNC -> LOAD/STORE [...] adds cc30fbf2425c [SLP]Introduce isUndefVector function to check for undef vectors. adds 415e821a5089 [PowerPC][AIX] Add toc-data support for 64-bit AIX small c [...] adds b254c2e2c4aa [libc++] Fix `uniform_int_distribution` for 128-bit result type adds afc9e7517ada [SLP]Improve cost model for the shuffled extracts. adds 444013d324fe [VE][NFC] Use POSIX-compatible stream redirection adds 1bd01defff8a [VE] Remove switch with only default case statement to fix [...] adds 19d34f6e95fe [X86] combinePMULH - recognise 'cheap' trunctions via PACK [...] adds 058c312a449f [OpenMP][FIX] SPMDzation guarding needs to account for all [...] adds c537a943342b [mlir][Vector] Thread 0-d vectors through vector.transfer ops adds 0e9979affe29 [libc++][format][1/6] Reduce binary size. adds 7512a9280a41 [llvm][stlextras] Add const methods to concat_range and en [...] adds ca6bd9cd4320 [mlir][ods] AttrOrTypeGen uses Class adds 09859113ed23 Revert "tsan: new runtime (v3)" adds 617ad14060dc [SelectionDAG] Add pattern to haveNoCommonBitsSet adds 6dd0bfad0d3c [Clang][VE] Fix toolchain test when -DCLANG_DEFAULT_LINKER [...] adds c6fa4c481a3f [AArch64] Fix unused variable warning with NDEBUG, NFC adds fa1c077b41ae [runtimes] Remove support for GCC-style 32 bit multilib builds adds dc1244dc4e76 [runtimes] Move WARNING to FATAL_ERROR for folks using FOO [...] adds 6eeda06c1d22 [Clang] Fix nesting of discarded and immediate contexts. adds b6f3c8de6acf [ASan] Fixed include order. adds 435d44bf8ab3 [VE][NFC] Fix use-after-free in VEInstrInfo adds ecaad4a87611 [mlir][ods][nfc] fix gcc-5 build adds 3ee685f98abf [NFC][Clang] Fix some comments in clang adds da7e3fc9abed Revert "[lldb] Temporarily skip TestTsanBasic on Darwin" adds aea6b9dceeb6 [Support] replace check with assert in known bits of mul c [...] adds c0b40b96aff5 Disable issues / pull requests via templates in preparatio [...] adds 7e06474f3cde [Clang] Remove bogus "REQUIRES arm-registered-target" from [...] adds 71668a936781 [mlir][ods][nfc] fixing test cases adds b1bc627e7e99 Revert "[sanitizer] Add delta compression stack depot" adds 44bc97c83444 [flang] Adjust names in Semantics that imply too much (NFC) adds 2f6beb7b0e9e [RISCV] Add inline expansion for vector ftrunc/fceil/ffloor. adds 9e647806f3f4 [InstrProf][NFC] Refactor ProfileDataMap usage adds 7da4ee6f23dd [libcxx][NFC] Make sequence containers slightly more SFINA [...] adds a0b50c56d152 [libc++] [test] C++03-friendly MAKE_STRING macro. adds b4a13e4c9835 [libc++] [test] C++14/17-friendly `TEST_IS_CONSTANT_EVALUA [...] adds 0efd9a03fa64 [libc++] [test] Refactor string_view comparison tests for [...] adds 8d1759c404c7 [GlobalOpt] Simplify CleanupConstantGlobalUsers() adds 844a8d3cecb4 Fix false positives in `fuchsia-trailing-return` check inv [...] adds 5fe151f98f02 [DSE] Add libcall tests for functions only available on Darwin. adds 66071f440c31 [TLI checker] Update for post-commit review comments adds 641906da8de2 AMDGPU/GlobalISel: Fix constant bus restriction errors for med3 adds a0efb1750065 [libcxx][modularisation] modularises <numeric> header adds bab21a46283f [gn build] Port a0efb1750065 adds ad88a37ceadb [TLI] Add memset_pattern4, memset_pattern8 lib functions. adds 20f8733d4b8d [Analyzer][solver] Simplification: Do a fixpoint iteration [...] adds 3f6dbf1a75b2 [flang] Don't close stderr in runtime (fixes STOP output) adds afe43e071309 [mlir] Remove extractVectorTypeFromShapedValue adds 86f48fbb1c31 [NFC][sanitizer] constexpr in sanitizer_dense_map_info adds 6146e4cf89db [libc++] Make __wrap_iter constexpr adds e599aa80c085 [sanitizer] Implement MprotectReadOnly and MprotectNoAccess adds 8c6b24899e51 [libcxx][test][NFC] Various tests for std::vector adds 7cc2493daaf5 profi - a flow-based profile inference algorithm: Part I ( [...] adds 1b7150c8f89a [gn build] Port 7cc2493daaf5 adds 512534bc16d2 [Cloning] Clone metadata on function declarations adds 7cbb6e9a8f6f [llvm-reduce] Assert that the number of chunks does not ch [...] adds 6703fe25b7c2 [TSan][Darwin] Mark test unsupported adds 170783f991fa [llvm] [Support] Add HTTP Client Support library. adds ab112c2964a2 [gn build] Port 170783f991fa adds 987a21522f2c [clang-tidy] Use `hasCanonicalType()` matcher in `bugprone [...] adds 8f329cee4237 [lldb] Split TestCxxChar8_t adds 863b117411d8 [TSan][Darwin] Prevent inlining of functions in tests adds f9d585d0dd57 Revert "[sanitizer] Add compress_stack_depot flag" adds 54e21df973e1 [unroll] Fix a functional change in an NFC patch adds 27c9e8b45b25 Revert "[VE] Make VE official" adds 4479138de8e6 [mlir][linalg][bufferize] Bufferization of tensor.insert adds 3dfa76b695f8 [tests] Precommit tests for writeonly argument attribute i [...] adds 8176768b46b7 [lldb] Fix DYLD_INSERT_LIBRARIES on AS adds ae234a7545db [NFC][sanitizer] Fix "not used" warning in test adds c16b13ebf977 [libc++] Implement P1989R2: range constructor for string_view adds 399b7de0ea34 [AMDGPU] Add a regclass flag for scalar registers adds 86eb57b728c8 [mlir][drr] Simple heuristic to reduce chance of accidenta [...] adds b0ac68ccb729 [ELF] Prevent internalizing used comdat symbol adds fcd2d85cc943 [lldb] Skip test_launch_scripted_process_stack_frames with ASan adds 4756a2f1575c [X86] Insert FMUL for estimated non reciprocal SQRT when ` [...] adds f13b43d5702b [X86][FP16] Only generate approximate rsqrt when Reciproca [...] adds 16b781e6d16d [AMDGPU][clang] Fix __builtin_nontemporal_store() failure [...] adds da067ed569e0 [AMDGPU] Set most sched model resource's BufferSize to one adds 9355d115975c [ORC] Hold ResourceTracker in MaterializationResponsibility. adds 9eb591f0ace7 [ORC] Only use JITDylib::GeneratorsMutex while running gen [...] adds 758d54b462ff [ORC] Add support for removing JITDylibs. adds 646c872f9d74 [ARM] Teach getIntImmCostInst about the cost of saturating [...] adds fb9fc3c9512c [openmp][amdgpu] Disable three tests in preparation for ne [...] adds 8aabde5a4b48 [NFC][sanitizer] Check &real_pthread_join adds 57b95aed2a04 [clang-format] Add better support for co-routinues adds bc61e5e90b8d [GlobalOpt] Add test for PR39751 (NFC) adds 55d392cc30fb [llvm-c] Make LLVMAddAlias opaque pointer compatible adds 529d0942daf3 [fir] Add fir numeric intrinsic runtime call builder adds d3a4ef35685c [clangd] IncludeClenaer: Don't mark forward declarations o [...] adds 905381dc108c [ORC] Fix ambiguous call to overloaded function. adds e37000f3bff3 [VE][NFC] Fix use-after-free in PVFMK expansion adds 0496edad4993 [BuildLibCalls] Add additional attrs to memcpy_chk. adds c5bfffed4831 [ELF] Discard input .note.gnu.build-id even with default - [...] adds d9bb9bd4bf7a [InferAttrs] Add memset_pattern{4,8} declarations to test. adds 6f25e754a0da Revert "Revert "[VE] Make VE official"" adds 7ce8c6fcf1e3 [Flang] Replace notifyMatchFailure with TODO hard failures adds 73c50ccf7a6b [ARM] Add additional postinc distribute tests and regenera [...] adds 69deb1371fd4 Use cc/c++ instead of gcc/g++ on FreeBSD. adds a0ff26e08c0c [GlobalOpt] Fix assertion failure during instruction deletion adds 2de5f39e546d [BuildLibCalls] Add support for memset_pattern{4,8}. adds 878ff1f9f85f [llvm-readobj] Add support for machine-independent NetBSD [...] adds e62930255822 [ARM] Correct range in isLegalAddressImm adds 8e757b2383c9 [LICM] Adding the test as a precommit for the D113289 adds 6803d08c38af [DAG][PowerPC] Enable initial ISD::BITCAST SimplifyDemande [...] adds 47616c8855fd [BasicAA] Add tests for memset_pattern{4,8,16}. adds 2cdc6f2ca62e Reland "[LICM] Hoist LOAD without sinking the STORE" No new revisions were added by this update. Summary of changes: .github/ISSUE_TEMPLATE.md | 14 + .github/ISSUE_TEMPLATE/config.yml | 1 + .github/ISSUE_TEMPLATE/do-not-file-an-issue.md | 14 + .github/PULL_REQUEST_TEMPLATE.md | 3 + clang-tools-extra/clang-doc/ClangDoc.h | 2 +- .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 10 +- .../clang-tidy/altera/StructPackAlignCheck.cpp | 4 + .../clang-tidy/bugprone/UnusedRaiiCheck.cpp | 7 +- .../NarrowingConversionsCheck.cpp | 51 +- .../VirtualClassDestructorCheck.cpp | 11 +- .../clang-tidy/fuchsia/TrailingReturnCheck.cpp | 13 +- .../clang-tidy/google/AvoidCStyleCastsCheck.cpp | 49 +- .../clang-tidy/llvmlibc/CalleeNamespaceCheck.cpp | 12 + clang-tools-extra/clang-tidy/utils/HeaderGuard.cpp | 11 +- clang-tools-extra/clang-tidy/utils/HeaderGuard.h | 3 + clang-tools-extra/clangd/IncludeCleaner.cpp | 18 +- .../clangd/include-mapping/gen_std.py | 6 +- .../clangd/unittests/IncludeCleanerTests.cpp | 12 + clang-tools-extra/docs/ReleaseNotes.rst | 8 +- ...era-struct-pack-align-invalid-decl-no-crash.cpp | 6 + .../clang-tidy/checkers/bugprone-unused-raii.cpp | 22 + ...eguidelines-narrowing-conversions-bitfields.cpp | 203 + .../cppcoreguidelines-virtual-class-destructor.cpp | 50 + .../checkers/fuchsia-trailing-return.cpp | 32 +- .../checkers/google-readability-casting.cpp | 54 +- .../checkers/llvmlibc-callee-namespace.cpp | 6 + .../infrastructure/export-diagnostics.cpp | 23 + .../clang-tidy/ClangTidyDiagnosticConsumerTest.cpp | 45 + .../unittests/clang-tidy/LLVMModuleTest.cpp | 10 + clang/docs/ClangCommandLineReference.rst | 4 +- clang/docs/JSONCompilationDatabase.rst | 6 + clang/docs/ReleaseNotes.rst | 2 +- clang/docs/ThreadSafetyAnalysis.rst | 4 +- clang/docs/analyzer/checkers.rst | 30 +- clang/docs/analyzer/user-docs.rst | 1 + .../user-docs/TaintAnalysisConfiguration.rst | 170 + clang/include/clang/AST/Decl.h | 7 +- clang/include/clang/AST/Expr.h | 8 +- clang/include/clang/Analysis/CFG.h | 2 +- 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+- clang/lib/Sema/SemaExpr.cpp | 15 + clang/lib/Sema/SemaExprCXX.cpp | 5 +- clang/lib/Sema/SemaStmt.cpp | 9 +- .../StaticAnalyzer/Core/RangeConstraintManager.cpp | 39 +- .../lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp | 32 +- .../StaticAnalyzer/Frontend/AnalysisConsumer.cpp | 26 +- .../svalbuilder-simplify-compound-svals.cpp | 76 + clang/test/Analysis/taint-tester.c | 7 +- .../aarch64-sve-intrinsics/acle_sve_bfmmla.c | 2 +- .../acle_sve_create2-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_create2.c | 2 +- .../acle_sve_create3-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_create3.c | 2 +- .../acle_sve_create4-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_create4.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_cvtnt.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_get2-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_get3-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_get4-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_ld1ro.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c | 2 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_ld2.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c | 2 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_ld3.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c | 2 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_ld4.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_matmul_fp32.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_matmul_fp64.c | 2 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_rev-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_set2-bfloat.c | 2 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_set2.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_set3-bfloat.c | 2 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_set3.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_set4-bfloat.c | 2 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_set4.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_st2-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_st3-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_st4-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c | 2 +- .../acle_sve_trn1-fp64-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_trn1-fp64.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c | 2 +- .../acle_sve_trn2-fp64-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_trn2-fp64.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_undef-bfloat.c | 2 +- .../acle_sve_undef2-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_undef2.c | 2 +- .../acle_sve_undef3-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_undef3.c | 2 +- .../acle_sve_undef4-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_undef4.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c | 2 +- .../acle_sve_uzp1-fp64-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c | 2 +- .../acle_sve_uzp2-fp64-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c | 2 +- .../acle_sve_zip1-fp64-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_zip1-fp64.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c | 2 +- .../acle_sve_zip2-fp64-bfloat.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_zip2-fp64.c | 2 +- .../negative/acle_sve_asrd.c | 2 +- .../negative/acle_sve_cadd.c | 2 +- .../negative/acle_sve_cmla.c | 2 +- .../aarch64-sve-intrinsics/negative/acle_sve_dot.c | 2 +- .../aarch64-sve-intrinsics/negative/acle_sve_ext.c | 2 +- .../negative/acle_sve_get2.c | 2 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119 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 131 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 9 +- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 7 +- .../CodeGen/SelectionDAG/ResourcePriorityQueue.cpp | 4 +- .../CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 17 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 10 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 17 +- llvm/lib/CodeGen/StackSlotColoring.cpp | 6 +- llvm/lib/CodeGen/TargetInstrInfo.cpp | 18 + llvm/lib/CodeGen/TwoAddressInstructionPass.cpp | 28 +- llvm/lib/Demangle/DLangDemangle.cpp | 253 +- llvm/lib/ExecutionEngine/ExecutionEngine.cpp | 3 +- .../ExecutionEngine/JITLink/ELFLinkGraphBuilder.h | 40 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 232 +- .../ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp | 2 +- llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp | 2 + llvm/lib/IR/Core.cpp | 8 + llvm/lib/IR/DIBuilder.cpp | 15 +- llvm/lib/IR/Verifier.cpp | 27 +- llvm/lib/MC/MCParser/ELFAsmParser.cpp | 8 +- llvm/lib/Object/ELFObjectFile.cpp | 4 +- llvm/lib/ObjectYAML/COFFEmitter.cpp | 32 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 4 + llvm/lib/ObjectYAML/MachOEmitter.cpp | 13 + llvm/lib/ObjectYAML/MachOYAML.cpp | 1 + llvm/lib/Passes/StandardInstrumentations.cpp | 4 +- llvm/lib/ProfileData/CMakeLists.txt | 1 + llvm/lib/ProfileData/InstrProf.cpp | 11 +- llvm/lib/ProfileData/RawMemProfReader.cpp | 121 + llvm/lib/Support/AArch64TargetParser.cpp | 50 +- llvm/lib/Support/ARMAttributeParser.cpp | 26 + llvm/lib/Support/ARMBuildAttrs.cpp | 4 + llvm/lib/Support/CMakeLists.txt | 1 + llvm/lib/Support/CommandLine.cpp | 16 +- llvm/lib/Support/HTTPClient.cpp | 97 + llvm/lib/Support/KnownBits.cpp | 9 +- llvm/lib/Support/TargetParser.cpp | 48 + llvm/lib/TableGen/TGLexer.cpp | 8 +- llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp | 9 +- .../Target/AArch64/AArch64ExpandPseudoInsts.cpp | 10 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 149 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 4 + .../AArch64/GISel/AArch64InstructionSelector.cpp | 57 +- llvm/lib/Target/AMDGPU/AMDGPUCombine.td | 11 +- llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 6 - .../Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp | 46 + llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp | 22 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 12 +- llvm/lib/Target/AMDGPU/CaymanInstructions.td | 2 - llvm/lib/Target/AMDGPU/EvergreenInstructions.td | 1 - llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 5 +- llvm/lib/Target/AMDGPU/R600Instructions.td | 1 - llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp | 4 +- llvm/lib/Target/AMDGPU/SIDefines.h | 3 +- llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 6 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 49 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 7 + llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 26 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 4 - llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 2 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 74 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 22 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 90 +- llvm/lib/Target/AMDGPU/SISchedule.td | 6 +- llvm/lib/Target/ARM/ARM.h | 2 + llvm/lib/Target/ARM/ARM.td | 4 + llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 48 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 83 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 20 +- llvm/lib/Target/ARM/ARMBranchTargets.cpp | 135 + llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 84 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 8 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 72 + llvm/lib/Target/ARM/ARMISelLowering.h | 2 + llvm/lib/Target/ARM/ARMInstrThumb2.td | 104 + llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 4 +- llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp | 57 +- llvm/lib/Target/ARM/ARMMachineFunctionInfo.h | 25 + llvm/lib/Target/ARM/ARMPredicates.td | 2 + llvm/lib/Target/ARM/ARMRegisterInfo.td | 10 + llvm/lib/Target/ARM/ARMSubtarget.h | 3 + llvm/lib/Target/ARM/ARMSystemRegister.td | 18 + llvm/lib/Target/ARM/ARMTargetMachine.cpp | 2 + llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 33 +- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 17 +- llvm/lib/Target/ARM/CMakeLists.txt | 1 + .../Target/ARM/Disassembler/ARMDisassembler.cpp | 67 +- .../Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp | 5 + llvm/lib/Target/ARM/Thumb2InstrInfo.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp | 18 +- llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp | 14 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 6 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 3 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 7 +- llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp | 3 +- llvm/lib/Target/Hexagon/HexagonSubtarget.cpp | 3 +- llvm/lib/Target/Lanai/LanaiDelaySlotFiller.cpp | 3 +- llvm/lib/Target/Lanai/LanaiInstrInfo.cpp | 3 +- llvm/lib/Target/Lanai/LanaiMCInstLower.cpp | 4 +- llvm/lib/Target/MSP430/MSP430MCInstLower.cpp | 4 +- llvm/lib/Target/Mips/MipsAsmPrinter.cpp | 5 +- llvm/lib/Target/Mips/MipsConstantIslandPass.cpp | 24 +- llvm/lib/Target/Mips/MipsMCInstLower.cpp | 3 +- llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 4 +- llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 54 +- llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h | 5 + llvm/lib/Target/PowerPC/P10InstrResources.td | 3 +- llvm/lib/Target/PowerPC/P9InstrResources.td | 2 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 11 +- llvm/lib/Target/PowerPC/PPCCTRLoops.cpp | 3 +- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 68 +- llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 12 + llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 3 +- llvm/lib/Target/PowerPC/PPCInstrVSX.td | 5 + llvm/lib/Target/PowerPC/PPCMCInstLower.cpp | 4 +- .../Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp | 8 + llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 8 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 137 +- llvm/lib/Target/RISCV/RISCVISelLowering.h | 2 + llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 28 + llvm/lib/Target/RISCV/RISCVRegisterInfo.h | 3 + llvm/lib/Target/RISCV/RISCVRegisterInfo.td | 2 + llvm/lib/Target/RISCV/RISCVSystemOperands.td | 2 +- llvm/lib/Target/Sparc/DelaySlotFiller.cpp | 3 +- llvm/lib/Target/Sparc/SparcMCInstLower.cpp | 3 +- llvm/lib/Target/SystemZ/SystemZElimCompare.cpp | 3 +- llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp | 4 +- llvm/lib/Target/SystemZ/SystemZMCInstLower.cpp | 4 +- llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.cpp | 11 +- llvm/lib/Target/VE/VEInstrInfo.cpp | 3 +- llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 4 +- llvm/lib/Target/X86/X86DynAllocaExpander.cpp | 8 +- llvm/lib/Target/X86/X86ExpandPseudo.cpp | 4 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 44 +- llvm/lib/Target/X86/X86FrameLowering.h | 17 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 126 +- llvm/lib/Target/X86/X86RegisterBanks.td | 2 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 21 +- llvm/lib/Target/XCore/XCoreMCInstLower.cpp | 3 +- llvm/lib/Transforms/IPO/GlobalOpt.cpp | 132 +- llvm/lib/Transforms/IPO/OpenMPOpt.cpp | 37 +- llvm/lib/Transforms/IPO/SampleProfile.cpp | 41 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 59 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 2 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 66 +- .../Transforms/Instrumentation/InstrProfiling.cpp | 25 +- llvm/lib/Transforms/ObjCARC/DependencyAnalysis.cpp | 4 +- .../Scalar/CorrelatedValuePropagation.cpp | 17 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 57 +- llvm/lib/Transforms/Scalar/LICM.cpp | 65 +- llvm/lib/Transforms/Scalar/LoopPassManager.cpp | 14 +- llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp | 151 +- llvm/lib/Transforms/Scalar/Reassociate.cpp | 7 +- llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 71 +- llvm/lib/Transforms/Utils/BuildLibCalls.cpp | 18 +- llvm/lib/Transforms/Utils/CMakeLists.txt | 1 + llvm/lib/Transforms/Utils/CloneModule.cpp | 12 +- llvm/lib/Transforms/Utils/Local.cpp | 37 +- llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp | 6 +- llvm/lib/Transforms/Utils/SSAUpdater.cpp | 3 + .../Transforms/Utils/SampleProfileInference.cpp | 461 ++ .../Utils/SampleProfileLoaderBaseUtil.cpp | 4 + .../Transforms/Utils/ScalarEvolutionExpander.cpp | 68 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 32 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 825 ++- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 340 +- llvm/test/Analysis/BasicAA/libfuncs-darwin.ll | 122 + llvm/test/Analysis/BasicAA/libfuncs.ll | 82 + llvm/test/Analysis/BasicAA/memset_pattern.ll | 21 - .../CostModel/X86/gather-i16-with-i8-index.ll | 32 +- .../CostModel/X86/gather-i32-with-i8-index.ll | 10 +- .../CostModel/X86/gather-i64-with-i8-index.ll | 10 +- .../CostModel/X86/gather-i8-with-i8-index.ll | 32 +- .../CostModel/X86/interleaved-load-i16-stride-5.ll | 10 +- .../X86/interleaved-store-accesses-with-gaps.ll | 204 - .../CostModel/X86/masked-interleaved-load-i16.ll | 205 + .../CostModel/X86/masked-interleaved-store-i16.ll | 204 + .../X86/masked-scatter-i32-with-i8-index.ll | 4 +- .../X86/masked-scatter-i64-with-i8-index.ll | 4 +- .../CostModel/X86/scatter-i16-with-i8-index.ll | 32 +- .../CostModel/X86/scatter-i32-with-i8-index.ll | 20 +- .../CostModel/X86/scatter-i64-with-i8-index.ll | 20 +- .../CostModel/X86/scatter-i8-with-i8-index.ll | 32 +- .../addrec-computed-during-addrec-calculation.ll | 67 + .../ScalarEvolution/becount-invalidation.ll | 76 + .../CodeGen/AArch64/GlobalISel/select-binop.mir | 26 + .../AArch64/GlobalISel/select-scalar-shift-imm.mir | 44 + llvm/test/CodeGen/AArch64/active_lane_mask.ll | 214 +- .../AArch64/concat_vector-truncate-combine.ll | 20 + llvm/test/CodeGen/AArch64/fpclamptosat.ll | 1137 ++++ llvm/test/CodeGen/AArch64/fpclamptosat_vec.ll | 1589 ++++++ .../AArch64/sve-fixed-length-fp-extend-trunc.ll | 152 +- llvm/test/CodeGen/AArch64/sve-srem-combine-loop.ll | 19 + .../AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll | 499 ++ .../AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll | 159 + .../AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll | 726 +++ .../combine-fma-add-mul-post-legalize.mir | 2556 +++++++++ .../combine-fma-add-mul-pre-legalize.mir | 2532 +++++++++ .../AMDGPU/GlobalISel/combine-fma-add-mul.ll | 1025 ++++ .../AMDGPU/GlobalISel/combine-fma-sub-ext-mul.ll | 123 + .../GlobalISel/combine-fma-sub-ext-neg-mul.ll | 265 + .../AMDGPU/GlobalISel/combine-fma-sub-mul.ll | 760 +++ .../AMDGPU/GlobalISel/combine-fma-sub-neg-mul.ll | 394 ++ .../test/CodeGen/AMDGPU/GlobalISel/combine-fsh.mir | 27 + .../test/CodeGen/AMDGPU/GlobalISel/combine-rot.mir | 26 + llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.ll | 50 + .../test/CodeGen/AMDGPU/GlobalISel/combine-rsq.mir | 42 + .../CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll | 272 +- .../AMDGPU/GlobalISel/divergent-control-flow.ll | 14 +- .../AMDGPU/GlobalISel/extractelement.i128.ll | 132 +- .../CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll | 44 +- .../CodeGen/AMDGPU/GlobalISel/extractelement.ll | 62 +- llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3.ll | 34 +- .../AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll | 30 +- .../CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll | 64 +- .../CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll | 122 +- .../AMDGPU/GlobalISel/lds-global-non-entry-func.ll | 4 +- .../CodeGen/AMDGPU/GlobalISel/lds-global-value.ll | 8 +- .../AMDGPU/GlobalISel/llvm.amdgcn.atomic.dec.ll | 244 +- .../AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll | 324 +- .../AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll | 191 +- .../AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll | 100 +- .../GlobalISel/llvm.amdgcn.global.atomic.fadd.ll | 8 +- .../AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll | 93 +- .../AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll | 10 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll | 472 +- .../AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll | 50 +- .../AMDGPU/GlobalISel/llvm.amdgcn.trig.preop.ll | 26 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll | 574 +- .../AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll | 12 +- .../CodeGen/AMDGPU/GlobalISel/load-constant.96.ll | 174 +- .../CodeGen/AMDGPU/GlobalISel/load-local.96.ll | 30 +- .../CodeGen/AMDGPU/GlobalISel/load-unaligned.ll | 10 +- llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll | 12 +- .../CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll | 36 +- .../AMDGPU/GlobalISel/regbankcombiner-smed3.mir | 234 +- .../AMDGPU/GlobalISel/regbankcombiner-umed3.mir | 234 +- llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll | 234 +- llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll | 81 + .../CodeGen/AMDGPU/GlobalISel/store-local.128.ll | 154 +- .../CodeGen/AMDGPU/GlobalISel/store-local.96.ll | 134 +- llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll | 190 +- llvm/test/CodeGen/AMDGPU/GlobalISel/umed3.ll | 81 + .../abi-attribute-hints-undefined-behavior.ll | 8 +- llvm/test/CodeGen/AMDGPU/add.v2i16.ll | 2 +- .../CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll | 2619 +++++---- llvm/test/CodeGen/AMDGPU/and.ll | 22 +- llvm/test/CodeGen/AMDGPU/anyext.ll | 60 +- .../AMDGPU/atomic_optimizations_global_pointer.ll | 48 +- llvm/test/CodeGen/AMDGPU/bitreverse.ll | 460 +- .../AMDGPU/branch-relaxation-inst-size-gfx10.ll | 2 +- llvm/test/CodeGen/AMDGPU/branch-relaxation.ll | 1 - llvm/test/CodeGen/AMDGPU/bswap.ll | 64 +- llvm/test/CodeGen/AMDGPU/build_vector.ll | 12 +- llvm/test/CodeGen/AMDGPU/call-argument-types.ll | 12 +- .../CodeGen/AMDGPU/callee-special-input-vgprs.ll | 2 +- llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll | 20 +- llvm/test/CodeGen/AMDGPU/code-object-v3.ll | 4 +- llvm/test/CodeGen/AMDGPU/commute-shifts.ll | 4 +- llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll | 414 +- llvm/test/CodeGen/AMDGPU/copy_to_scc.ll | 30 +- llvm/test/CodeGen/AMDGPU/ctlz.ll | 236 +- llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll | 350 +- llvm/test/CodeGen/AMDGPU/ctpop16.ll | 617 +-- llvm/test/CodeGen/AMDGPU/ctpop64.ll | 2 +- llvm/test/CodeGen/AMDGPU/cttz.ll | 236 +- llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll | 535 +- llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 1429 +++-- llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll | 40 +- .../CodeGen/AMDGPU/dbg-value-ends-sched-region.mir | 95 +- llvm/test/CodeGen/AMDGPU/ds-alignment.ll | 115 +- llvm/test/CodeGen/AMDGPU/ds_read2.ll | 388 +- llvm/test/CodeGen/AMDGPU/ds_write2.ll | 108 +- .../AMDGPU/extend-phi-subrange-not-in-parent.mir | 11 +- llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll | 4 +- llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll | 8 +- llvm/test/CodeGen/AMDGPU/fabs.ll | 13 +- .../AMDGPU/fast-unaligned-load-store.global.ll | 39 +- .../AMDGPU/fast-unaligned-load-store.private.ll | 27 +- llvm/test/CodeGen/AMDGPU/fmax_legacy.f64.ll | 64 +- llvm/test/CodeGen/AMDGPU/fmin_legacy.f64.ll | 128 +- llvm/test/CodeGen/AMDGPU/fminnum.f64.ll | 4 +- llvm/test/CodeGen/AMDGPU/fp-min-max-atomics.ll | 268 +- llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll | 70 +- llvm/test/CodeGen/AMDGPU/fp_to_sint.ll | 94 +- llvm/test/CodeGen/AMDGPU/fp_to_uint.ll | 72 +- llvm/test/CodeGen/AMDGPU/fptosi.f16.ll | 2 +- llvm/test/CodeGen/AMDGPU/fptoui.f16.ll | 2 +- .../test/CodeGen/AMDGPU/frame-index-elimination.ll | 4 +- llvm/test/CodeGen/AMDGPU/fshl.ll | 358 +- llvm/test/CodeGen/AMDGPU/fshr.ll | 352 +- llvm/test/CodeGen/AMDGPU/fused-bitlogic.ll | 10 +- .../CodeGen/AMDGPU/gfx-callable-argument-types.ll | 56 +- llvm/test/CodeGen/AMDGPU/half.ll | 681 ++- llvm/test/CodeGen/AMDGPU/idot2.ll | 186 +- llvm/test/CodeGen/AMDGPU/idot4s.ll | 351 +- llvm/test/CodeGen/AMDGPU/idot4u.ll | 747 +-- llvm/test/CodeGen/AMDGPU/idot8s.ll | 656 +-- llvm/test/CodeGen/AMDGPU/idot8u.ll | 1818 +++---- llvm/test/CodeGen/AMDGPU/imm.ll | 516 +- llvm/test/CodeGen/AMDGPU/imm16.ll | 272 +- llvm/test/CodeGen/AMDGPU/immv216.ll | 12 +- .../AMDGPU/insert-subvector-unused-scratch.ll | 2 +- llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll | 6 +- llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 1180 ++--- .../test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll | 424 +- llvm/test/CodeGen/AMDGPU/kernel-args.ll | 818 ++- .../CodeGen/AMDGPU/kernel-argument-dag-lowering.ll | 8 +- llvm/test/CodeGen/AMDGPU/lds-atomic-fmin-fmax.ll | 572 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll | 128 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll | 18 +- .../CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll | 57 +- .../AMDGPU/llvm.amdgcn.struct.tbuffer.load.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll | 533 +- llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll | 46 +- llvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll | 12 +- llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll | 437 +- llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll | 437 +- llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll | 222 +- llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll | 46 +- llvm/test/CodeGen/AMDGPU/load-constant-f32.ll | 2 +- llvm/test/CodeGen/AMDGPU/load-constant-i16.ll | 1867 ++++--- llvm/test/CodeGen/AMDGPU/load-global-i16.ll | 2141 ++++---- llvm/test/CodeGen/AMDGPU/load-hi16.ll | 6 +- llvm/test/CodeGen/AMDGPU/load-lo16.ll | 20 +- llvm/test/CodeGen/AMDGPU/load-local.128.ll | 150 +- llvm/test/CodeGen/AMDGPU/load-local.96.ll | 121 +- llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll | 3 +- llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll | 84 +- llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll | 132 +- llvm/test/CodeGen/AMDGPU/max.i16.ll | 70 +- .../CodeGen/AMDGPU/memory-legalizer-flat-agent.ll | 432 +- .../AMDGPU/memory-legalizer-flat-nontemporal.ll | 112 +- .../AMDGPU/memory-legalizer-flat-singlethread.ll | 432 +- .../CodeGen/AMDGPU/memory-legalizer-flat-system.ll | 432 +- .../AMDGPU/memory-legalizer-flat-volatile.ll | 82 +- .../AMDGPU/memory-legalizer-flat-wavefront.ll | 432 +- .../AMDGPU/memory-legalizer-flat-workgroup.ll | 432 +- .../AMDGPU/memory-legalizer-global-agent.ll | 3014 ++++++----- .../AMDGPU/memory-legalizer-global-nontemporal.ll | 54 +- .../AMDGPU/memory-legalizer-global-singlethread.ll | 3056 ++++++----- .../AMDGPU/memory-legalizer-global-system.ll | 2870 +++++----- .../AMDGPU/memory-legalizer-global-volatile.ll | 138 +- .../AMDGPU/memory-legalizer-global-wavefront.ll | 3056 ++++++----- .../AMDGPU/memory-legalizer-global-workgroup.ll | 3056 ++++++----- .../CodeGen/AMDGPU/memory-legalizer-local-agent.ll | 64 +- .../AMDGPU/memory-legalizer-local-nontemporal.ll | 36 +- .../AMDGPU/memory-legalizer-local-singlethread.ll | 64 +- .../AMDGPU/memory-legalizer-local-system.ll | 64 +- .../AMDGPU/memory-legalizer-local-volatile.ll | 28 +- .../AMDGPU/memory-legalizer-local-wavefront.ll | 64 +- .../AMDGPU/memory-legalizer-local-workgroup.ll | 64 +- .../AMDGPU/memory-legalizer-private-nontemporal.ll | 64 +- .../AMDGPU/memory-legalizer-private-volatile.ll | 74 +- llvm/test/CodeGen/AMDGPU/memory_clause.ll | 105 +- llvm/test/CodeGen/AMDGPU/min.ll | 8 +- llvm/test/CodeGen/AMDGPU/missing-store.ll | 15 +- .../AMDGPU/move-addr64-rsrc-dead-subreg-writes.ll | 9 +- llvm/test/CodeGen/AMDGPU/mul_int24.ll | 144 +- llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll | 240 +- llvm/test/CodeGen/AMDGPU/operand-spacing.ll | 4 +- llvm/test/CodeGen/AMDGPU/packed-op-sel.ll | 2 +- ...partial-regcopy-and-spill-missed-at-regalloc.ll | 62 + llvm/test/CodeGen/AMDGPU/pr51516.mir | 2 +- .../CodeGen/AMDGPU/promote-constOffset-to-imm.ll | 2221 +++++++- llvm/test/CodeGen/AMDGPU/saddo.ll | 2 +- llvm/test/CodeGen/AMDGPU/salu-to-valu.ll | 15 +- llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll | 56 +- .../sched-assert-onlydbg-value-empty-region.mir | 94 +- llvm/test/CodeGen/AMDGPU/schedule-ilp.mir | 63 + llvm/test/CodeGen/AMDGPU/sdiv.ll | 833 +-- llvm/test/CodeGen/AMDGPU/sdiv64.ll | 242 +- llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll | 4 +- llvm/test/CodeGen/AMDGPU/select.f16.ll | 126 +- llvm/test/CodeGen/AMDGPU/select64.ll | 198 +- .../CodeGen/AMDGPU/sext-divergence-driven-isel.ll | 62 +- llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll | 4 +- llvm/test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll | 28 +- llvm/test/CodeGen/AMDGPU/shift-i128.ll | 152 +- llvm/test/CodeGen/AMDGPU/shl.ll | 920 ++-- llvm/test/CodeGen/AMDGPU/shl.v2i16.ll | 116 +- llvm/test/CodeGen/AMDGPU/shl_add_ptr_global.ll | 24 +- .../test/CodeGen/AMDGPU/shrink-add-sub-constant.ll | 226 +- llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll | 44 +- .../CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll | 4 +- llvm/test/CodeGen/AMDGPU/sign_extend.ll | 570 +- llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll | 188 +- llvm/test/CodeGen/AMDGPU/spill-agpr.ll | 126 +- .../test/CodeGen/AMDGPU/spill-vector-superclass.ll | 23 + llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll | 80 +- llvm/test/CodeGen/AMDGPU/sra.ll | 466 +- llvm/test/CodeGen/AMDGPU/srem64.ll | 566 +- llvm/test/CodeGen/AMDGPU/srl.ll | 248 +- llvm/test/CodeGen/AMDGPU/store-local.128.ll | 42 +- llvm/test/CodeGen/AMDGPU/store-local.96.ll | 32 +- llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll | 86 +- llvm/test/CodeGen/AMDGPU/sub.ll | 2 +- llvm/test/CodeGen/AMDGPU/sub.v2i16.ll | 146 +- llvm/test/CodeGen/AMDGPU/udiv.ll | 885 ++-- llvm/test/CodeGen/AMDGPU/udiv64.ll | 260 +- llvm/test/CodeGen/AMDGPU/udivrem.ll | 9 +- llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll | 150 +- llvm/test/CodeGen/AMDGPU/uniform-cfg.ll | 2 +- llvm/test/CodeGen/AMDGPU/urem64.ll | 232 +- .../test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll | 3 +- llvm/test/CodeGen/AMDGPU/v_madak_f16.ll | 28 +- llvm/test/CodeGen/AMDGPU/vector-extract-insert.ll | 9 +- .../vector-spill-restore-to-other-vector-type.mir | 224 + llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll | 33 +- llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll | 12 +- llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll | 12 +- llvm/test/CodeGen/ARM/O3-pipeline.ll | 1 + llvm/test/CodeGen/ARM/build-attributes-encoding.s | 51 +- llvm/test/CodeGen/ARM/build-attributes.ll | 3 + llvm/test/CodeGen/ARM/expand-pseudos.ll | 32 + llvm/test/CodeGen/ARM/fpclamptosat.ll | 5594 ++++++++++++++++++++ llvm/test/CodeGen/ARM/fpclamptosat_vec.ll | 5088 ++++++++++++++++++ .../hoist-and-by-const-from-lshr-in-eqcmp-zero.ll | 48 +- .../hoist-and-by-const-from-shl-in-eqcmp-zero.ll | 24 +- llvm/test/CodeGen/ARM/pacbti-module-attrs.ll | 21 + llvm/test/CodeGen/ARM/ssat.ll | 106 +- llvm/test/CodeGen/ARM/usat.ll | 51 +- llvm/test/CodeGen/MIR/X86/diexpr-win32.mir | 2 +- llvm/test/CodeGen/PowerPC/basic-toc-data-extern.ll | 9 +- .../PowerPC/basic-toc-data-local-linkage.ll | 2 + llvm/test/CodeGen/PowerPC/common-chain.ll | 46 +- llvm/test/CodeGen/PowerPC/crypto_bifs_be.ll | 165 + llvm/test/CodeGen/PowerPC/f128-branch-cond.ll | 314 ++ llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll | 1690 ++++-- llvm/test/CodeGen/PowerPC/toc-data.ll | 129 +- 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++++++++++++ llvm/test/CodeGen/X86/fptosi-sat-vector-128.ll | 1316 +++++ llvm/test/CodeGen/X86/fptoui-sat-vector-128.ll | 1336 +++++ llvm/test/CodeGen/X86/haddsub-3.ll | 12 +- llvm/test/CodeGen/X86/haddsub-shuf.ll | 4 +- llvm/test/CodeGen/X86/haddsub.ll | 84 +- llvm/test/CodeGen/X86/horizontal-reduce-fadd.ll | 69 +- llvm/test/CodeGen/X86/horizontal-sum.ll | 83 +- llvm/test/CodeGen/X86/lzcnt-cmp.ll | 14 +- llvm/test/CodeGen/X86/nontemporal-loads.ll | 8 +- ...ower-of-two-or-zero-when-comparing-with-zero.ll | 8 +- llvm/test/CodeGen/X86/or-lea.ll | 92 +- llvm/test/CodeGen/X86/pmulh.ll | 359 +- llvm/test/CodeGen/X86/popcnt.ll | 218 +- llvm/test/CodeGen/X86/pull-binop-through-shift.ll | 28 +- llvm/test/CodeGen/X86/rem.ll | 19 +- llvm/test/CodeGen/X86/sat-add.ll | 11 +- llvm/test/CodeGen/X86/sdiv_fix_sat.ll | 129 +- llvm/test/CodeGen/X86/setcc-combine.ll | 9 +- llvm/test/CodeGen/X86/shift-combine.ll | 14 +- llvm/test/CodeGen/X86/shl-crash-on-legalize.ll | 7 +- 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3 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O3_LTO updated (c49c4673 -> 757732f1)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O3_LTO in repository toolchain/ci/base-artifacts. from c49c4673 9: update: binutils-gcc-linux-glibc: 1 new 757732f1 10: reset: llvm-2cdc6f2ca62e83fec445114fbbe6276e9ab2a7d0: 1 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. 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3 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_check/master-aarch64 updated (bf548ce3e67 -> daca416fc28)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-aarch64 in repository toolchain/ci/gcc. from bf548ce3e67 libstdc++: Simplify emplace member functions in _Rb_tree adds 03a9bd059b4 Daily bump. adds e096e2cfe9f testsuite: powerpc/vec_reve_1.c requires VSX. adds daca416fc28 [PR103028] test ifcvt trap_if seq more strictly after reload No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 197 ++++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 7 + gcc/cp/ChangeLog | 18 +++ gcc/fortran/ChangeLog | 16 +++ gcc/ifcvt.c | 4 +- gcc/testsuite/ChangeLog | 84 +++++++++++ gcc/testsuite/gcc.dg/pr103028.c | 21 +++ gcc/testsuite/gcc.target/powerpc/vec_reve_1.c | 4 +- libcpp/ChangeLog | 6 + libstdc++-v3/ChangeLog | 13 ++ 11 files changed, 368 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/pr103028.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

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