Tcwg-commits January 2021

tcwg-commits@lists.linaro.org

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9360 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig updated (79bb90c70 -> 88f19c03c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards 79bb90c70 11: update: binutils-gcc-linux-qemu: 22 new 88f19c03c 11: update: binutils-gcc-linux-qemu: 22 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (79bb90c70) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-ma [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 216 +- 02-prepare_abe/console.log | 434 +- 03-build_abe-binutils/console.log | 11522 ++++---- 04-build_abe-stage1/console.log | 20775 ++++++------- 05-build_linux/console.log | 13966 ++++----- 08-check_regression/console.log | 16 +- 08-check_regression/results.regressions | 20 +- 09-update_baseline/console.log | 148 +- 09-update_baseline/results.regressions | 20 +- console.log | 47077 +++++++++++++++--------------- jenkins/manifest.sh | 18 +- 11 files changed, 47133 insertions(+), 47079 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allmodconfig updated (470dd6bd36 -> e79de63ab1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allmodconfig in repository toolchain/ci/qemu. from 470dd6bd36 Merge remote-tracking branch 'remotes/stsquad/tags/pull-test [...] adds 655a650aca linux-user: Conditionalize TUNSETVNETLE adds d2ef1b83a7 tcg/i386: Adjust TCG_TARGET_HAS_MEMORY_BSWAP adds 07ce0b0530 tcg: Introduce INDEX_op_qemu_st8_i32 adds dfbd0b873a util/oslib-win32: Use _aligned_malloc for qemu_try_memalign adds ed6f53f9ca util/oslib: Assert qemu_try_memalign() alignment is a power of 2 adds df5d2b1658 tcg: Do not flush icache for interpreter adds 1da8de39a3 util: Enhance flush_icache_range with separate data pointer adds 664a79735e util: Specialize flush_idcache_range for aarch64 adds b91ccb3115 tcg: Move tcg prologue pointer out of TCGContext adds 8b5c2b6260 tcg: Move tcg epilogue pointer out of TCGContext adds 4846cd37df tcg: Add in_code_gen_buffer adds db0c51a380 tcg: Introduce tcg_splitwx_to_{rx,rw} adds ffd0e50736 tcg: Adjust TCGLabel for const adds 2be7d76b15 tcg: Adjust tcg_out_call for const adds 92ab8e7d62 tcg: Adjust tcg_out_label for const adds 755bf9e514 tcg: Adjust tcg_register_jit for const adds 1acbad0f27 tcg: Adjust tb_target_set_jmp_target for split-wx adds d997143533 tcg: Make DisasContextBase.tb const adds 04a37d4ca4 tcg: Make tb arg to synchronize_from_tb const adds 6bc144237a tcg: Use Error with alloc_code_gen_buffer adds a35b3e1415 tcg: Add --accel tcg,split-wx property adds a8c35b2cad accel/tcg: Support split-wx for linux with memfd adds 6f70ddee19 accel/tcg: Support split-wx for darwin/iOS with vm_remap adds eba40358b4 tcg: Return the TB pointer from the rx region from exit_tb adds 705ed477d5 tcg/i386: Support split-wx code generation adds f716bab3a9 tcg/aarch64: Use B not BL for tcg_out_goto_long adds ffba3eb34b tcg/aarch64: Support split-wx code generation adds f06176be76 disas: Push const down through host disassembly adds 305daaedf6 tcg/tci: Push const down through bytecode reading adds 44c7197f15 tcg: Introduce tcg_tbrel_diff adds e6dc7f818f tcg/ppc: Use tcg_tbrel_diff adds 2d6f38ebe5 tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB adds d54401dfef tcg/ppc: Support split-wx code generation adds 47c2206ba4 tcg/sparc: Use tcg_tbrel_diff adds 0d8b6191ac tcg/sparc: Support split-wx code generation adds dd90043f5d tcg/s390: Use tcg_tbrel_diff adds 79dae4ddd8 tcg/s390: Support split-wx code generation adds 844d0442a5 tcg/riscv: Fix branch range checks adds 4b6a52d01e tcg/riscv: Remove branch-over-branch fallback adds 793f738196 tcg/riscv: Support split-wx code generation adds d1861aa409 accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd adds 91a7fd1fb6 tcg/mips: Do not assert on relocation overflow adds df5af1306a tcg/mips: Support split-wx code generation adds 69478b8b15 tcg/arm: Support split-wx code generation adds de2fac62d2 tcg: Remove TCG_TARGET_SUPPORT_MIRROR adds c8bc1168ad tcg: Constify tcg_code_gen_epilogue adds e5e2e4c739 tcg: Constify TCGLabelQemuLdst.raddr adds e79de63ab1 Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-t [...] No new revisions were added by this update. Summary of changes: accel/tcg/cpu-exec.c | 41 +++--- accel/tcg/tcg-all.c | 26 +++- accel/tcg/tcg-runtime.c | 4 +- accel/tcg/tcg-runtime.h | 2 +- accel/tcg/trace-events | 2 +- accel/tcg/translate-all.c | 305 ++++++++++++++++++++++++++++++++++--------- accel/tcg/translator.c | 4 +- bsd-user/main.c | 2 +- disas.c | 2 +- disas/capstone.c | 2 +- include/disas/dis-asm.h | 4 +- include/disas/disas.h | 2 +- include/exec/exec-all.h | 2 +- include/exec/gen-icount.h | 4 +- include/exec/log.h | 2 +- include/exec/translator.h | 2 +- include/hw/core/cpu.h | 3 +- include/qemu/cacheflush.h | 15 ++- include/sysemu/tcg.h | 3 +- include/tcg/tcg-op.h | 2 +- include/tcg/tcg-opc.h | 5 + include/tcg/tcg.h | 61 +++++++-- linux-user/ioctls.h | 2 + linux-user/main.c | 2 +- qemu-options.hx | 7 + softmmu/physmem.c | 2 +- target/arm/cpu.c | 3 +- target/arm/translate-a64.c | 2 +- target/avr/cpu.c | 3 +- target/hppa/cpu.c | 3 +- target/i386/tcg/tcg-cpu.c | 3 +- target/microblaze/cpu.c | 3 +- target/mips/cpu.c | 3 +- target/riscv/cpu.c | 3 +- target/rx/cpu.c | 3 +- target/sh4/cpu.c | 3 +- target/sparc/cpu.c | 3 +- target/tricore/cpu.c | 2 +- tcg/README | 5 + tcg/aarch64/tcg-target.c.inc | 75 ++++++----- tcg/aarch64/tcg-target.h | 3 +- tcg/arm/tcg-target.c.inc | 41 +++--- tcg/arm/tcg-target.h | 3 +- tcg/i386/tcg-target.c.inc | 174 +++++++++++------------- tcg/i386/tcg-target.h | 12 +- tcg/mips/tcg-target.c.inc | 97 ++++++-------- tcg/mips/tcg-target.h | 3 +- tcg/optimize.c | 1 + tcg/ppc/tcg-target.c.inc | 88 +++++++------ tcg/ppc/tcg-target.h | 3 +- tcg/riscv/tcg-target.c.inc | 125 ++++++------------ tcg/riscv/tcg-target.h | 3 +- tcg/s390/tcg-target.c.inc | 91 ++++++------- tcg/s390/tcg-target.h | 9 +- tcg/sparc/tcg-target.c.inc | 58 ++++---- tcg/sparc/tcg-target.h | 3 +- tcg/tcg-ldst.c.inc | 2 +- tcg/tcg-op.c | 23 +++- tcg/tcg-pool.c.inc | 6 +- tcg/tcg.c | 94 ++++++++++--- tcg/tci.c | 62 +++++---- tcg/tci/tcg-target.c.inc | 2 +- tcg/tci/tcg-target.h | 7 +- util/cacheflush.c | 107 ++++++++++++--- util/cacheinfo.c | 8 +- util/oslib-posix.c | 2 + util/oslib-win32.c | 12 +- 67 files changed, 1033 insertions(+), 628 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allmodconfig updated (6bca2ebf106 -> 98546324c79)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allmodconfig in repository toolchain/ci/gcc. from 6bca2ebf106 i386: Optimize blsi followed by comparison [PR98567] adds d54029179cb fix GIMPLE parser for loops adds dddea6d4d81 d: Merge upstream dmd 9038e64c5. adds 85fb1d7d5f4 Fortran: Improve resolution of associate variables. [PR93701]. adds 19f3c433cdc libstdc++: Fix long double to_chars testcase [PR98384] adds c8d2ed112e7 Update cpplib es.po. adds b87ec922c40 test: add new Go tests from source repo adds 0677759f753 analyzer: fix ICE when DECL_INITIAL is error_mark_node [PR98580] adds b7c3f201be5 libstdc++: Add support for C++20 barriers adds 4d65a07d54b c++: Add some conversion sanity checking. adds 6c59b8a93cf c++: Add TARGET_EXPR comments adds 2f359597e49 c++: Fix thinko in auto return type checking [PR98441] adds 178f0afce36 PR middle-end/98578 - ICE warning on uninitialized VLA access adds aa4db31dd2a c++: Fix up tsubst of BIT_CAST_EXPR [PR98329] adds 7d187e4f6f5 Daily bump. adds 0b7b4710111 RISC-V: Move class riscv_subset_list and riscv_subset_t to [...] adds e3354b6de7a RISC-V: Implement new style of architecture extension test macros. adds 01d92cfd798 Fix array-quals-1.c for RISC-V adds c231fca5de8 Fortran:Fix simplification of constructors with implied-do [...] adds 21c1a30fc73 Fortran: Allow pointer deferred length associate selectors. [...] adds c9d25aa7489 aarch64: Fix RTL patterns for UABA/SABA adds cab822d4ea7 aarch64: Reimplement vaba* intrinsics using builtins adds 79db5945ade aarch64: Reimplement vabd* intrinsics using builtins adds e811f10b61a aarch64: Reimplement most vpadal intrinsics using builtins adds 07fb24a3daf SVE2: Fix aarch64-sve2-acle-asm tests. adds f3c5d1fa53a aarch64: Support conditional unpacked UXT on SVE adds 5fe3e6bf061 aarch64: Support unpacked CNOT on SVE adds 8f1cb70d7ca i386: Fix -mcmodel= vs. target attribute [PR98585] adds 1b885264a48 x86-64: Use R10 for profiling large model adds bdcde150450 tree-optimization/98544 - more permute optimization fixes adds b407f233d7c fix vectorizer memleaks adds 77a375a3ebf reset the SCEV htab after FRE in loop pipeline adds 76be18f4429 x86-64: Use R10 and R11 for profiling large model with PIC adds 98a1fb705ea c++: Fix access checking of scoped non-static member [PR98515] adds bb1f0b50abb c++: ICE with constexpr call that returns a PMF [PR98551] adds 98546324c79 Tweak dg-prune-output regex for out-of-build-tree contexts No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 54 +++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 27 +++ gcc/analyzer/region.cc | 5 + gcc/c-family/ChangeLog | 7 + gcc/c-family/c-pretty-print.c | 29 +-- gcc/c/ChangeLog | 5 + gcc/c/gimple-parser.c | 5 +- gcc/common/config/riscv/riscv-common.c | 72 +----- gcc/config/aarch64/aarch64-simd-builtins.def | 12 + gcc/config/aarch64/aarch64-simd.md | 33 +-- gcc/config/aarch64/aarch64-sve.md | 58 ++--- gcc/config/aarch64/arm_neon.h | 238 +++----------------- gcc/config/aarch64/iterators.md | 5 + gcc/config/i386/i386-options.c | 12 - gcc/config/i386/i386.c | 34 ++- gcc/config/i386/i386.opt | 32 +-- gcc/config/riscv/riscv-c.c | 32 +++ gcc/config/riscv/riscv-subset.h | 95 ++++++++ gcc/config/riscv/t-riscv | 4 +- gcc/cp/ChangeLog | 29 +++ gcc/cp/call.c | 37 +-- gcc/cp/constexpr.c | 8 +- gcc/cp/decl.c | 8 +- gcc/cp/pt.c | 11 +- gcc/cp/semantics.c | 20 +- gcc/d/ChangeLog | 6 + gcc/d/d-builtins.cc | 2 +- gcc/d/dmd/MERGE | 2 +- gcc/d/dmd/arrayop.c | 8 +- gcc/d/dmd/clone.c | 16 +- gcc/d/dmd/cond.c | 2 +- gcc/d/dmd/declaration.c | 2 +- gcc/d/dmd/dtemplate.c | 2 +- gcc/d/dmd/expression.c | 2 +- gcc/d/dmd/expressionsem.c | 5 +- gcc/d/dmd/func.c | 24 +- gcc/d/dmd/hdrgen.c | 12 + gcc/d/dmd/mtype.c | 30 +-- gcc/d/dmd/mtype.h | 7 +- gcc/d/dmd/parse.c | 113 ++++++++-- gcc/d/dmd/statementsem.c | 24 +- gcc/d/dmd/traits.c | 39 +++- gcc/fortran/ChangeLog | 7 + gcc/fortran/resolve.c | 9 + gcc/fortran/simplify.c | 34 ++- gcc/fortran/trans-expr.c | 2 +- gcc/testsuite/ChangeLog | 78 +++++++ gcc/testsuite/g++.dg/cpp0x/auto55.C | 13 ++ gcc/testsuite/g++.dg/cpp0x/constexpr-pmf2.C | 9 + gcc/testsuite/g++.dg/cpp2a/bit-cast10.C | 42 ++++ gcc/testsuite/g++.dg/template/access32.C | 8 + gcc/testsuite/g++.dg/template/access33.C | 9 + .../aarch64/sve2/acle/aarch64-sve2-acle-asm.exp | 2 +- gcc/testsuite/gcc.dg/analyzer/pr98580-a.c | 9 + gcc/testsuite/gcc.dg/analyzer/pr98580-b.c | 2 + gcc/testsuite/gcc.dg/array-quals-1.c | 40 ++-- gcc/testsuite/gcc.dg/plugin/gil-1.c | 4 +- gcc/testsuite/gcc.dg/uninit-pr98578.c | 110 +++++++++ gcc/testsuite/gcc.dg/vect/bb-slp-pr98544.c | 32 +++ gcc/testsuite/gcc.target/aarch64/sve/cnot_2.c | 29 +++ gcc/testsuite/gcc.target/aarch64/sve/cond_cnot_4.c | 32 +++ .../gcc.target/aarch64/sve/cond_cnot_4_run.c | 26 +++ gcc/testsuite/gcc.target/aarch64/sve/cond_cnot_5.c | 32 +++ .../gcc.target/aarch64/sve/cond_cnot_5_run.c | 26 +++ gcc/testsuite/gcc.target/aarch64/sve/cond_cnot_6.c | 31 +++ .../gcc.target/aarch64/sve/cond_cnot_6_run.c | 26 +++ gcc/testsuite/gcc.target/aarch64/sve/cond_uxt_5.c | 33 +++ .../gcc.target/aarch64/sve/cond_uxt_5_run.c | 26 +++ gcc/testsuite/gcc.target/aarch64/sve/cond_uxt_6.c | 33 +++ .../gcc.target/aarch64/sve/cond_uxt_6_run.c | 26 +++ gcc/testsuite/gcc.target/aarch64/sve/cond_uxt_7.c | 29 +++ .../gcc.target/aarch64/sve/cond_uxt_7_run.c | 26 +++ gcc/testsuite/gcc.target/aarch64/sve/cond_uxt_8.c | 32 +++ .../gcc.target/aarch64/sve/cond_uxt_8_run.c | 26 +++ .../aarch64/sve2/acle/aarch64-sve2-acle-asm.exp | 2 +- gcc/testsuite/gcc.target/aarch64/usaba_1.c | 29 +++ gcc/testsuite/gcc.target/i386/pr98482-1.c | 9 + gcc/testsuite/gcc.target/i386/pr98482-2.c | 10 + gcc/testsuite/gcc.target/i386/pr98585.c | 14 ++ gcc/testsuite/gcc.target/riscv/predef-10.c | 43 ++++ gcc/testsuite/gcc.target/riscv/predef-11.c | 43 ++++ gcc/testsuite/gcc.target/riscv/predef-12.c | 43 ++++ gcc/testsuite/gcc.target/riscv/predef-13.c | 43 ++++ .../gdc.test/compilable/extra-files/header1.d | 18 ++ .../gdc.test/compilable/testheaderudamodule.d | 2 + .../gdc.test/fail_compilation/fail10207.d | 2 +- gcc/testsuite/gdc.test/runnable/uda.d | 194 ++++++++++++++++ gcc/testsuite/gfortran.dg/associate_54.f90 | 34 +++ gcc/testsuite/gfortran.dg/associate_55.f90 | 35 +++ gcc/testsuite/gfortran.dg/associate_56.f90 | 36 +++ .../gfortran.dg/deferred_character_35.f90 | 18 ++ gcc/testsuite/gfortran.dg/implied_do_3.f90 | 14 ++ .../test/fixedbugs/issue27836.dir/\303\204foo.go" | 13 ++ .../test/fixedbugs/issue27836.dir/\303\204main.go" | 13 ++ .../fixedbugs/{issue23311.go => issue27836.go} | 0 gcc/testsuite/lib/target-supports.exp | 2 +- gcc/tree-ssa-sccvn.c | 3 + gcc/tree-vect-slp.c | 37 +-- gcc/tree-vect-stmts.c | 2 +- libcpp/po/ChangeLog | 4 + libcpp/po/es.po | 89 ++++---- libstdc++-v3/ChangeLog | 21 ++ libstdc++-v3/doc/doxygen/user.cfg.in | 1 + libstdc++-v3/include/Makefile.am | 1 + libstdc++-v3/include/Makefile.in | 1 + libstdc++-v3/include/precompiled/stdc++.h | 1 + libstdc++-v3/include/std/barrier | 247 +++++++++++++++++++++ libstdc++-v3/include/std/version | 3 + libstdc++-v3/testsuite/20_util/bind/ref_neg.cc | 3 +- .../testsuite/20_util/to_chars/long_double.cc | 25 ++- libstdc++-v3/testsuite/30_threads/barrier/1.cc | 30 +++ libstdc++-v3/testsuite/30_threads/barrier/2.cc | 28 +++ .../testsuite/30_threads/barrier/arrive.cc | 48 ++++ .../30_threads/barrier/arrive_and_drop.cc | 46 ++++ .../30_threads/barrier/arrive_and_wait.cc | 46 ++++ .../testsuite/30_threads/barrier/completion.cc | 53 +++++ 117 files changed, 2759 insertions(+), 560 deletions(-) create mode 100644 gcc/config/riscv/riscv-subset.h create mode 100644 gcc/testsuite/g++.dg/cpp0x/auto55.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/constexpr-pmf2.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/bit-cast10.C create mode 100644 gcc/testsuite/g++.dg/template/access32.C create mode 100644 gcc/testsuite/g++.dg/template/access33.C create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr98580-a.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr98580-b.c create mode 100644 gcc/testsuite/gcc.dg/uninit-pr98578.c create mode 100644 gcc/testsuite/gcc.dg/vect/bb-slp-pr98544.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cnot_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_cnot_4.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_cnot_4_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_cnot_5.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_cnot_5_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_cnot_6.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_cnot_6_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_uxt_5.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_uxt_5_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_uxt_6.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_uxt_6_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_uxt_7.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_uxt_7_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_uxt_8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_uxt_8_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/usaba_1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr98482-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr98482-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr98585.c create mode 100644 gcc/testsuite/gcc.target/riscv/predef-10.c create mode 100644 gcc/testsuite/gcc.target/riscv/predef-11.c create mode 100644 gcc/testsuite/gcc.target/riscv/predef-12.c create mode 100644 gcc/testsuite/gcc.target/riscv/predef-13.c create mode 100644 gcc/testsuite/gfortran.dg/associate_54.f90 create mode 100644 gcc/testsuite/gfortran.dg/associate_55.f90 create mode 100644 gcc/testsuite/gfortran.dg/associate_56.f90 create mode 100644 gcc/testsuite/gfortran.dg/deferred_character_35.f90 create mode 100644 gcc/testsuite/gfortran.dg/implied_do_3.f90 create mode 100644 "gcc/testsuite/go.test/test/fixedbugs/issue27836.dir/\303\204foo.go" create mode 100644 "gcc/testsuite/go.test/test/fixedbugs/issue27836.dir/\303\204main.go" copy gcc/testsuite/go.test/test/fixedbugs/{issue23311.go => issue27836.go} (100%) create mode 100644 libstdc++-v3/include/std/barrier create mode 100644 libstdc++-v3/testsuite/30_threads/barrier/1.cc create mode 100644 libstdc++-v3/testsuite/30_threads/barrier/2.cc create mode 100644 libstdc++-v3/testsuite/30_threads/barrier/arrive.cc create mode 100644 libstdc++-v3/testsuite/30_threads/barrier/arrive_and_drop.cc create mode 100644 libstdc++-v3/testsuite/30_threads/barrier/arrive_and_wait.cc create mode 100644 libstdc++-v3/testsuite/30_threads/barrier/completion.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allmodconfig updated (f478212851 -> d00f086803)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allmodconfig in repository toolchain/ci/binutils-gdb. from f478212851 libtool.m4: update GNU/Hurd test from upstream. In upstream [...] adds e904f56d02 gdb/sim: add support for exporting memory map adds bfc7d04afb sim: h8300: delete opcode caching adds a39487c668 sim: cris: use -sim with C tests for cris-elf targets adds e6c1dbbfe8 sim: cris: disable test that crashes the linker adds 0f8e278da2 sim: ChangeLog: move arch-specific entries into the arch dir adds 9a50f40e82 Automatic date update in version.in adds f4cfa91741 sim: ppc: stub out sim_memory_map adds e343681375 gdb/fortran: Correct the lval type for array elements of int [...] adds 1940319c0e [gdb] Fix internal-error in process_event_stop_test adds fb932b57cb Treat the AArch64 register id_aa64mmfr2_el1 as a core system [...] adds e84c871648 Fix places in the AArch64 opcodes library code where a call [...] adds 3c8c6de21d gdb: user variables with components of dynamic type adds ed20522215 Updated Swedish translation for the opcodes/ subdirectory adds d00f086803 gdb: add missing test for completion of invalid /FMT strings No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gdb/ChangeLog | 26 + gdb/breakpoint.c | 164 +++--- gdb/f-lang.c | 6 +- gdb/remote-sim.c | 18 + gdb/testsuite/ChangeLog | 14 + gdb/testsuite/gdb.base/completion.exp | 5 + gdb/testsuite/gdb.fortran/intvar-array.exp | 59 ++ gdb/testsuite/gdb.fortran/intvar-array.f90 | 28 + gdb/testsuite/gdb.fortran/intvar-dynamic-types.exp | 97 ++++ gdb/testsuite/gdb.fortran/intvar-dynamic-types.f90 | 32 ++ gdb/value.c | 37 +- include/gdb/ChangeLog | 4 + include/gdb/remote-sim.h | 9 + opcodes/ChangeLog | 16 + opcodes/aarch64-asm.c | 13 +- opcodes/aarch64-dis.c | 4 +- opcodes/aarch64-opc.c | 2 +- opcodes/po/sv.po | 629 ++++++++++++--------- sim/ChangeLog | 490 ---------------- sim/avr/ChangeLog | 23 + sim/bpf/ChangeLog | 54 ++ sim/common/ChangeLog | 4 + sim/common/sim-core.c | 57 ++ sim/cris/ChangeLog | 355 ++++++++++++ sim/ft32/ChangeLog | 8 + sim/h8300/ChangeLog | 16 + sim/h8300/compile.c | 135 +---- sim/h8300/sim-main.h | 5 - sim/m32c/ChangeLog | 9 +- sim/or1k/ChangeLog | 52 ++ sim/ppc/ChangeLog | 8 + sim/ppc/sim_calls.c | 6 + sim/testsuite/ChangeLog | 18 +- sim/testsuite/sim/bpf/ChangeLog | 20 + sim/testsuite/sim/cris/ChangeLog | 9 + sim/testsuite/sim/cris/c/c.exp | 4 + sim/testsuite/sim/cris/c/helloaout.c | 6 +- 38 files changed, 1437 insertions(+), 1007 deletions(-) create mode 100644 gdb/testsuite/gdb.fortran/intvar-array.exp create mode 100644 gdb/testsuite/gdb.fortran/intvar-array.f90 create mode 100644 gdb/testsuite/gdb.fortran/intvar-dynamic-types.exp create mode 100644 gdb/testsuite/gdb.fortran/intvar-dynamic-types.f90 create mode 100644 sim/bpf/ChangeLog create mode 100644 sim/or1k/ChangeLog create mode 100644 sim/testsuite/sim/bpf/ChangeLog -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allmodconfig updated (632537cb4 -> e91afcb74)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards 632537cb4 2: update: binutils-gcc-linux-qemu: 21061 new e91afcb74 2: update: binutils-gcc-linux-qemu: 21061 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (632537cb4) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-lt [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 226 +- 02-prepare_abe/console.log | 439 +- 03-build_abe-binutils/console.log | 11581 ++++---- 04-build_abe-stage1/console.log | 20732 ++++++++------- 05-build_linux/console.log | 9514 +++---- 08-check_regression/console.log | 12 +- 08-check_regression/results.regressions | 20 +- 09-update_baseline/console.log | 146 +- 09-update_baseline/results.regressions | 20 +- console.log | 42650 +++++++++++++++--------------- jenkins/manifest.sh | 14 +- 11 files changed, 42693 insertions(+), 42661 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (470dd6bd36 -> 7b09f12773)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/qemu. from 470dd6bd36 Merge remote-tracking branch 'remotes/stsquad/tags/pull-test [...] adds 655a650aca linux-user: Conditionalize TUNSETVNETLE adds d2ef1b83a7 tcg/i386: Adjust TCG_TARGET_HAS_MEMORY_BSWAP adds 07ce0b0530 tcg: Introduce INDEX_op_qemu_st8_i32 adds dfbd0b873a util/oslib-win32: Use _aligned_malloc for qemu_try_memalign adds ed6f53f9ca util/oslib: Assert qemu_try_memalign() alignment is a power of 2 adds df5d2b1658 tcg: Do not flush icache for interpreter adds 1da8de39a3 util: Enhance flush_icache_range with separate data pointer adds 664a79735e util: Specialize flush_idcache_range for aarch64 adds b91ccb3115 tcg: Move tcg prologue pointer out of TCGContext adds 8b5c2b6260 tcg: Move tcg epilogue pointer out of TCGContext adds 4846cd37df tcg: Add in_code_gen_buffer adds db0c51a380 tcg: Introduce tcg_splitwx_to_{rx,rw} adds ffd0e50736 tcg: Adjust TCGLabel for const adds 2be7d76b15 tcg: Adjust tcg_out_call for const adds 92ab8e7d62 tcg: Adjust tcg_out_label for const adds 755bf9e514 tcg: Adjust tcg_register_jit for const adds 1acbad0f27 tcg: Adjust tb_target_set_jmp_target for split-wx adds d997143533 tcg: Make DisasContextBase.tb const adds 04a37d4ca4 tcg: Make tb arg to synchronize_from_tb const adds 6bc144237a tcg: Use Error with alloc_code_gen_buffer adds a35b3e1415 tcg: Add --accel tcg,split-wx property adds a8c35b2cad accel/tcg: Support split-wx for linux with memfd adds 6f70ddee19 accel/tcg: Support split-wx for darwin/iOS with vm_remap adds eba40358b4 tcg: Return the TB pointer from the rx region from exit_tb adds 705ed477d5 tcg/i386: Support split-wx code generation adds f716bab3a9 tcg/aarch64: Use B not BL for tcg_out_goto_long adds ffba3eb34b tcg/aarch64: Support split-wx code generation adds f06176be76 disas: Push const down through host disassembly adds 305daaedf6 tcg/tci: Push const down through bytecode reading adds 44c7197f15 tcg: Introduce tcg_tbrel_diff adds e6dc7f818f tcg/ppc: Use tcg_tbrel_diff adds 2d6f38ebe5 tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB adds d54401dfef tcg/ppc: Support split-wx code generation adds 47c2206ba4 tcg/sparc: Use tcg_tbrel_diff adds 0d8b6191ac tcg/sparc: Support split-wx code generation adds dd90043f5d tcg/s390: Use tcg_tbrel_diff adds 79dae4ddd8 tcg/s390: Support split-wx code generation adds 844d0442a5 tcg/riscv: Fix branch range checks adds 4b6a52d01e tcg/riscv: Remove branch-over-branch fallback adds 793f738196 tcg/riscv: Support split-wx code generation adds d1861aa409 accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd adds 91a7fd1fb6 tcg/mips: Do not assert on relocation overflow adds df5af1306a tcg/mips: Support split-wx code generation adds 69478b8b15 tcg/arm: Support split-wx code generation adds de2fac62d2 tcg: Remove TCG_TARGET_SUPPORT_MIRROR adds c8bc1168ad tcg: Constify tcg_code_gen_epilogue adds e5e2e4c739 tcg: Constify TCGLabelQemuLdst.raddr adds e79de63ab1 Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-t [...] new 4663b72a48 intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUs new 9cd07db94b hw/arm/virt: Remove virt machine state 'smp_cpus' new cc97b0019b target/arm: Fix MTE0_ACTIVE new 5b7d63706e hw/intc/armv7m_nvic: Correct handling of CCR.BFHFNMIGN new 7fbf95a037 target/arm: Correct store of FPSCR value via FPCXT_S new eb20dafdbf target/arm: Implement FPCXT_NS fp system register new 590e05d6b4 target/arm: Implement Cortex-M55 model new 416dd95295 hw/arm/highbank: Drop dead KVM support code new 5f8e93c3e2 util/qemu-timer: Make timer_free() imply timer_del() new 01b3e68bb1 scripts/coccinelle: New script to remove unnecessary timer_d [...] new 729cc68373 Remove superfluous timer_del() calls new 2d3bf65327 target/arm: Remove timer_del()/timer_deinit() before timer_free() new ea492b1245 digic-timer: Use ptimer_free() in the finalize function to a [...] new e1c5909b29 allwinner-a10-pit: Use ptimer_free() in the finalize functio [...] new 3fabd51994 exynos4210_rtc: Use ptimer_free() in the finalize function t [...] new c9342c09f8 exynos4210_pwm: Use ptimer_free() in the finalize function t [...] new e4940041f6 mss-timer: Use ptimer_free() in the finalize function to avo [...] new a4bc0334bc musicpal: Use ptimer_free() in the finalize function to avoi [...] new d97d9152c7 exynos4210_mct: Use ptimer_free() in the finalize function t [...] new 56a11a9b75 hw/misc: imx6_ccm: Update PMU_MISC0 reset value new 4591497163 hw/msic: imx6_ccm: Correct register value for silicon type new 37e33be7ea hw/arm: sabrelite: Connect the Ethernet PHY at address 6 new c9f8511ea8 docs/system: arm: Add sabrelite board description new 7b09f12773 Merge remote-tracking branch 'remotes/pmaydell/tags/pull-tar [...] The 24 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: accel/tcg/cpu-exec.c | 41 ++-- accel/tcg/tcg-all.c | 26 ++- accel/tcg/tcg-runtime.c | 4 +- accel/tcg/tcg-runtime.h | 2 +- accel/tcg/trace-events | 2 +- accel/tcg/translate-all.c | 305 ++++++++++++++++++++------ accel/tcg/translator.c | 4 +- block/iscsi.c | 2 - block/nbd.c | 1 - block/qcow2.c | 1 - bsd-user/main.c | 2 +- disas.c | 2 +- disas/capstone.c | 2 +- docs/system/arm/sabrelite.rst | 119 ++++++++++ docs/system/target-arm.rst | 1 + hw/arm/highbank.c | 14 +- hw/arm/musicpal.c | 12 + hw/arm/sabrelite.c | 4 + hw/arm/virt-acpi-build.c | 9 +- hw/arm/virt.c | 21 +- hw/block/nvme.c | 2 - hw/char/serial.c | 2 - hw/char/virtio-serial-bus.c | 2 - hw/ide/core.c | 1 - hw/input/hid.c | 1 - hw/intc/apic.c | 1 - hw/intc/arm_gic.c | 4 +- hw/intc/armv7m_nvic.c | 15 ++ hw/intc/ioapic.c | 1 - hw/ipmi/ipmi_bmc_extern.c | 1 - hw/misc/imx6_ccm.c | 4 +- hw/net/e1000.c | 3 - hw/net/e1000e_core.c | 8 - hw/net/pcnet-pci.c | 1 - hw/net/rtl8139.c | 1 - hw/net/spapr_llan.c | 1 - hw/net/virtio-net.c | 2 - hw/rtc/exynos4210_rtc.c | 9 + hw/s390x/s390-pci-inst.c | 1 - hw/sd/sd.c | 1 - hw/sd/sdhci.c | 2 - hw/timer/allwinner-a10-pit.c | 11 + hw/timer/digic-timer.c | 8 + hw/timer/exynos4210_mct.c | 14 ++ hw/timer/exynos4210_pwm.c | 11 + hw/timer/mss-timer.c | 13 ++ hw/usb/dev-hub.c | 1 - hw/usb/hcd-ehci.c | 1 - hw/usb/hcd-ohci-pci.c | 1 - hw/usb/hcd-uhci.c | 1 - hw/usb/hcd-xhci.c | 1 - hw/usb/redirect.c | 1 - hw/vfio/display.c | 1 - hw/virtio/vhost-vsock-common.c | 1 - hw/virtio/virtio-balloon.c | 1 - hw/virtio/virtio-rng.c | 1 - hw/watchdog/wdt_diag288.c | 1 - hw/watchdog/wdt_i6300esb.c | 1 - include/disas/dis-asm.h | 4 +- include/disas/disas.h | 2 +- include/exec/exec-all.h | 2 +- include/exec/gen-icount.h | 4 +- include/exec/log.h | 2 +- include/exec/translator.h | 2 +- include/hw/arm/virt.h | 3 +- include/hw/core/cpu.h | 3 +- include/qemu/cacheflush.h | 15 +- include/qemu/timer.h | 24 +- include/sysemu/tcg.h | 3 +- include/tcg/tcg-op.h | 2 +- include/tcg/tcg-opc.h | 5 + include/tcg/tcg.h | 61 +++++- linux-user/ioctls.h | 2 + linux-user/main.c | 2 +- migration/colo.c | 1 - monitor/hmp-cmds.c | 1 - net/announce.c | 1 - net/colo-compare.c | 1 - net/slirp.c | 1 - qemu-options.hx | 7 + replay/replay-debugging.c | 1 - scripts/coccinelle/timer-del-timer-free.cocci | 18 ++ softmmu/physmem.c | 2 +- target/arm/cpu.c | 5 +- target/arm/cpu_tcg.c | 42 ++++ target/arm/helper.c | 2 +- target/arm/translate-a64.c | 2 +- target/arm/translate-vfp.c.inc | 114 +++++++++- target/avr/cpu.c | 3 +- target/hppa/cpu.c | 3 +- target/i386/tcg/tcg-cpu.c | 3 +- target/microblaze/cpu.c | 3 +- target/mips/cpu.c | 3 +- target/riscv/cpu.c | 3 +- target/rx/cpu.c | 3 +- target/s390x/cpu.c | 2 - target/sh4/cpu.c | 3 +- target/sparc/cpu.c | 3 +- target/tricore/cpu.c | 2 +- tcg/README | 5 + tcg/aarch64/tcg-target.c.inc | 75 ++++--- tcg/aarch64/tcg-target.h | 3 +- tcg/arm/tcg-target.c.inc | 41 ++-- tcg/arm/tcg-target.h | 3 +- tcg/i386/tcg-target.c.inc | 174 +++++++-------- tcg/i386/tcg-target.h | 12 +- tcg/mips/tcg-target.c.inc | 97 ++++---- tcg/mips/tcg-target.h | 3 +- tcg/optimize.c | 1 + tcg/ppc/tcg-target.c.inc | 88 ++++---- tcg/ppc/tcg-target.h | 3 +- tcg/riscv/tcg-target.c.inc | 125 ++++------- tcg/riscv/tcg-target.h | 3 +- tcg/s390/tcg-target.c.inc | 91 ++++---- tcg/s390/tcg-target.h | 9 +- tcg/sparc/tcg-target.c.inc | 58 ++--- tcg/sparc/tcg-target.h | 3 +- tcg/tcg-ldst.c.inc | 2 +- tcg/tcg-op.c | 23 +- tcg/tcg-pool.c.inc | 6 +- tcg/tcg.c | 94 ++++++-- tcg/tci.c | 62 +++--- tcg/tci/tcg-target.c.inc | 2 +- tcg/tci/tcg-target.h | 7 +- ui/console.c | 1 - ui/spice-core.c | 1 - util/cacheflush.c | 107 +++++++-- util/cacheinfo.c | 8 +- util/oslib-posix.c | 2 + util/oslib-win32.c | 12 +- util/throttle.c | 1 - 131 files changed, 1454 insertions(+), 739 deletions(-) create mode 100644 docs/system/arm/sabrelite.rst create mode 100644 scripts/coccinelle/timer-del-timer-free.cocci -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (71c061d24438 -> f5e6c330254a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/linux. from 71c061d24438 Merge tag 'for-5.11-rc2-tag' of git://git.kernel.org/pub/s [...] adds cffa4b2122f5 regmap: debugfs: Fix a memory leak when calling regmap_attach_dev adds f6bcb4c7f366 regmap: debugfs: Fix a reversed if statement in regmap_deb [...] adds fc37784dc71b Merge tag 'regmap-fix-v5.11-rc2' of git://git.kernel.org/p [...] adds df9716ec9ade regulator: pf8x00: Use specific compatible strings for devices adds 3b66e4a8e58a regulator: bd718x7: Add enable times adds 2ae6f64ce1ce Merge tag 'v5.11-rc1' into regulator-5.11 adds d957d1610c66 regulator: qcom-rpmh: add QCOM_COMMAND_DB dependency adds 2bf3a72b08e7 dt-bindings: regulator: qcom,rpmh-regulator: add pm8009 revision adds df6b92fa4005 regulator: qcom-rpmh-regulator: correct hfsmps515 definition adds 36836f5b377b Merge qcom driver fix into regulator-5.11 adds a1a7b4f32433 Merge tag 'regulator-fix-v5.11-rc2' of git://git.kernel.or [...] adds 127a7a95df41 Merge remote-tracking branch 'spi/for-5.10' into spi-5.11 adds 4aa1464acbe3 spi: spi-geni-qcom: Fix geni_spi_isr() NULL dereference in [...] adds 690d8b917bbe spi: spi-geni-qcom: Fail new xfers if xfer/cancel/abort pending adds 3d7d916f9bc9 spi: spi-geni-qcom: Don't try to set CS if an xfer is pending adds 17fa81aa702e spi: spi-geni-qcom: Print an error when we timeout setting the CS adds a590370d918f spi: stm32: FIFO threshold level - fix align packet size adds 8db90aa36063 Merge tag 'v5.11-rc1' into spi-5.11 adds ede090f5a438 spi: altera: fix return value for altera_spi_txrx() adds 6820e812dafb spi: Fix the clamping of spi->max_speed_hz adds 6170d077bf92 spi: fix the divide by 0 error when calculating xfer waiting time adds f5e6c330254a Merge tag 'spi-fix-v5.11-rc2' of git://git.kernel.org/pub/ [...] No new revisions were added by this update. Summary of changes: .../bindings/regulator/nxp,pf8x00-regulator.yaml | 6 +- .../bindings/regulator/qcom,rpmh-regulator.txt | 1 + drivers/base/regmap/regmap-debugfs.c | 9 ++- drivers/regulator/Kconfig | 1 + drivers/regulator/bd718x7-regulator.c | 57 +++++++++++++++ drivers/regulator/pf8x00-regulator.c | 8 ++- drivers/regulator/qcom-rpmh-regulator.c | 2 +- drivers/spi/spi-altera.c | 26 +++---- drivers/spi/spi-geni-qcom.c | 84 ++++++++++++++++++++-- drivers/spi/spi-stm32.c | 4 +- drivers/spi/spi.c | 11 ++- 11 files changed, 181 insertions(+), 28 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (ebcc8dcb68a -> 9386483b714)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/llvm-project. from ebcc8dcb68a [Coverage] Refactor three tests from commit rG9f2967bcfe2f adds bd78f4e9321 [mlir] revert 82f5ee3c3e601daad5 adds 41e31eac14c Fix GCC5 build, require explicit this->... in this call ins [...] adds ee57d30f448 [NFC] Removed unused prefixes from CodeGen/AMDGPU adds d0154456e61 Silence warning: comparison of integers of different signs: [...] adds cf5415c727d [PGO][PGSO] Let unroll hints take precedence over PGSO. adds c9122ddef52 CodeGen: Refactor regallocator command line and target selection adds 5c38ae36c58 [WebAssembly] Fixed byval args missing DWARF DW_AT_LOCATION adds 2230bf99c71 [mlir] replace LLVMIntegerType with built-in integer type adds 906efeec0a4 [mlir] don't match the text produced only in debug mode in [...] adds 4c7148d75cd [SLP] remove opcode identifier for reduction; NFC adds ad55d5c3f32 Simplify vectorcall argument classification of HVAs, NFC adds 6a87e9b08bf [NFC][AMDGPU] Reduce include files dependency. adds abb174bbc10 [OpenMP] Add example in Libomptarget Information docs adds 467e916d303 Fix gcc5 build failure (NFC) adds 3854b81b0fd [Clang][Driver] Fix read-after-free when using /clang: adds 9ae171bcd38 [OpenMP][Docs] Add remarks intro section adds d970a285b85 [OpenMP][Fix] Make the arch selector for x86_64 work adds 36c4dc9b42f [OpenMP][FIX] Ensure the isa trait is evaluated last adds 275f30df8ad [clang] Change builtin object size when subobject is invalid adds 6e7101530da [OpenMP][Docs] Mark finished features as done adds ce7f30b2a87 [llvm-pdbutil] Don't crash when printing unknown CodeView t [...] adds 70b841ac317 [mlir] Adds argument attributes for using LLVM's sret and b [...] adds 0b0f2e6ee0c [OpenMP][FIX] Avoid string literal comparison, use `StringR [...] adds 476db17dcb6 Fix include path for check-gdb-mlir-support to include the [...] adds 9e1aaa9943b Fix check-gdb-mlir-support build after MLIR API changed to [...] adds 1f9b6ef91ff GlobalISel: Add combine for G_UREM by power of 2 adds 63b42a05145 [NFC] clang/test/openMP/target_codegen.cpp should not depen [...] adds 85f86e8a3cf [libc++abi] Simplify __gxx_personality_v0 adds d002cd4e0f1 [test] Move coro-retcon-unreachable.ll into llvm/test adds 1a2eaebc09c [CoroSplit][NewPM] Don't call LazyCallGraph functions to sp [...] adds 3503c856819 Fixup Asserts+!AbiBreakingChecks fallout from db33f85c7124 adds 973c35d3384 [TableGen] Make CodeGenDAGPatterns::getSDNodeNamed take a S [...] adds eaadb41db62 [LLD][COFF] When using PCH.OBJ, ensure func_id records indi [...] adds 274afac9a17 lldb: Add support for DW_AT_ranges on DW_TAG_subprograms adds c01202a7efd [libc++] Fix typo in run-buildbot adds 2cbbc6e87c4 GlobalISel: Fail legalization on narrowing extload below me [...] adds f78d6af7319 [hip] Enable HIP compilation with `<complex`> on MSVC. adds 2ce16810f28 [OpenMP] Always print error messages in libomptarget CUDA plugin adds 15f59711506 [LLDB][RISCV] Add RISC-V ArchSpec and rv32/rv64 variant detection adds b2dafd44ca7 [NewPM][Hexagon] Fix HexagonVectorLoopCarriedReusePass posi [...] adds ff1b6f9ff27 [libc++] Alphabetize generate_feature_test_macro_components [...] adds 9ccf13c36d1 [NewPM][NVPTX] Port NVPTX opt passes adds 087be536fea [NFC][SimplifyCFG] Add a test with cond br on constant w/ i [...] adds 16ab8e5f6db [SimplifyCFG] ConstantFoldTerminator(): handle matching des [...] adds 36593a30a40 [SimplifyCFG] ConstantFoldTerminator(): switch to non-permi [...] adds 8b9a0e6f7ed [NFC][SimlifyCFG] Add some indirectbr-of-blockaddress tests adds b3822728fae [SimplifyCFG] ConstantFoldTerminator(): switch to non-permi [...] adds 1f9b591ee66 [SimplifyCFG] TryToSimplifyUncondBranchFromEmptyBlock(): sw [...] adds f8875c313c3 [NFC][SimplifyCFG] Add test with an unreachable block with [...] adds 7600d7c7be0 [SimplifyCFG] removeUnreachableBlocks(): switch to non-perm [...] adds 6984781df9b [NFC][SimplifyCFG] Add a test with an undef cond branch to [...] adds 05adc73db05 [SimplifyCFG] changeToUnreachable(): switch to non-permissi [...] adds 66189212bbb [SimplifyCFG] MergeBlockIntoPredecessor(): switch to non-pe [...] adds be0a31d13bc [SimplifyCFG] DeleteDeadBlocks(): switch to non-permissive [...] adds f0eba8ce2d4 [SimplifyCFG] changeToCall(): switch to non-permissive DomT [...] adds d59f97bb3a6 [SimplifyCFG] removeUnwindEdge(): switch to non-permissive [...] adds f2f81c554b0 [SimplifyCFG] markAliveBlocks(): switch to non-permissive D [...] adds 946bc50e4cb [RISCV] Define the vfsqrt RVV intrinsics adds 6acfc3a7821 Fix build after eaadb41db6233cf1c9e882d74a31c1f9d6e211ff wh [...] adds 8dddcc762dd [Cloning] Copy metadata of global declarations adds 48baa7f5b11 [clang] Add powerpc64le-none-linux-gnu to gnu toolchain for PPC64 adds 658a1be76ba [builtins] Add COMPILER_RT_BUILTINS_HIDE_SYMBOLS adds b12f26733a4 Revert "Revert "Revert "[analyzer] NFC: Move path diagnosti [...] adds ab814896dc8 [gn build] Port b12f26733a4 adds 2759041786e [gn build] (manually) merge a whole bunch of libc++ header files adds f02e61a8b95 Fix MLIR DRR matching when attributes are interleaved with [...] adds b14ad90b137 [LLD][COFF] Simplify function. NFC. adds 696775d96ec Fix subprogram_ranges.test by explicitly using lld adds 4a3c2ba8904 Fix print-dot-ddg.ll so it doesn't try to write to the sour [...] adds 2ff36e79291 lldb subprogram_ranges.test - remove dependence on temp file name adds 6b0ee02747e Revert "Revert "Revert "Revert "[analyzer] NFC: Move path d [...] adds 495b301de6e [gn build] Port 6b0ee02747e adds 8febb2e0f56 [CodeGen] Remove unused function isCallerPreservedOrConstPh [...] adds 33bf1cad759 [llvm] Use *Set::contains (NFC) adds b934160aaa3 [Target] Use llvm::find_if (NFC) adds f2e05855deb [lldb] Access the ModuleList through iterators where possib [...] adds 57e0cd35628 [lldb] Make DoReadMemory a protected method. adds ae25a397e9d AMDGPU/GlobalISel: Enable sret demotion adds 0ebc1fb29f2 [CMake] Don't enable BUILD_WITH_INSTALL_RPATH when using cu [...] adds 69cf7350628 [NewPM] Don't error when there's an unrecognized pass name adds c102b9697bd [X86] Correct the comments about comparison intrinsics. NFCI. adds 7a91dad9e5f [llvm-readobj] [ARMWinEH] Clearly print an invalid case of [...] adds d1bf26fd943 [AArch64][SVE] Add lowering for llvm abs intrinsic adds 8af859d514f [MachineLoop] New helper isLoopInvariant() adds 8e3230ffa3a [clang][cli] Port DiagnosticOpts to new option parsing system adds 12167632bc5 [VE] Add SVOB intrinsic instruction adds 72fb5ba0790 [LV] Don't sink into replication regions adds 8e3e148c888 Revert "[clang][cli] Port DiagnosticOpts to new option pars [...] adds 6175fcf01f1 [NFC] Update some PPC tests marked as auto-generated adds 2fe625e9abd Fix two pessimizing moves. adds d1b606f897b [VE] Extract & insert vector element isel adds eeba70a463c [VE] Expand single-element BUILD_VECTOR to INSERT_VECTOR_ELT adds 1e7efd397ac [LV] Legalize scalable VF hints adds 38d18d93534 [SVE] Add support to vectorize_width loop pragma for scalab [...] adds ed23229a64a [AArch64] Fix crash caused by invalid vector element type adds b83b7d08730 [clangd] NFC, avoid potential ODR violation. adds c909512fdb9 [clangd] Cleanup a remaining Optional<SymbolID> usage, NFC. adds 99c84af1a25 [VE][NFC] Clean ISel patterns for LSV and LVS adds 00530dee5d1 [compiler-rt] Implement __atomic_is_lock_free adds 32733c347d7 [libc++] Add missing XFAIL to tests that need __atomic_* libcalls adds ed3b1f90611 [clangd] go-to-implementation on a base class jumps to all [...] adds 267ff7901c7 [SLP] limit verifyFunction to debug build (PR48689) adds 9c4b2225b24 Revert "Revert "Revert "Revert "Revert "[analyzer] NFC: Mov [...] adds af7cce2fa4d [AArch64] Add +pauth archictecture option, allowing the v8. [...] adds 7d4a8bc417b [AArch64] Add +flagm archictecture option, allowing the v8. [...] adds 195ffcd890f [MLIR][NFC] remove unnecessary includes form tablegen command adds b0dc54e08a9 [lldb][NFC] Refactor setup code for Clang diagnostics adds 611d3c63f32 [VP] ISD helper functions [VE] isel for vp_add, vp_and adds 657db0c6d41 [gn build] Port 9c4b2225b24 adds bcbdeafa9cb Revert "[SLP]Need shrink the load vector after reordering." adds 0ef2b68ff06 [OpenCL] Documentation for experimental C++ libs adds d012430eee7 [WebAssembly] Change label numbers to variables in test adds 5ead757f1d8 [VE] Support pack_f32p and pack_f32a intrinsic instructions adds 25d882e758c [MLIR][SPIRV] Add `UsableInSpecConstantOp` trait. adds 7b9f541c1ed [X86][SSE] Add tests for unpack(hop(),hop()) adds e97071d7952 [NFC] Renaming PackStack to AlignPackStack adds 0e57084d0ef [SLP][NFC]Add a test for reused shrink check, NFC. adds 4a582d766ae [X86][SSE] Add vphaddd/vphsubd unpack(hop(),hop()) tests adds 268ff38a716 [MLIR][OpenMP] Attribute to include WsLoop upperbound adds 6e2b6351d2c [TableGen] Add the assert statement, step 1 adds 1ae762469fd [ARM] Update and regenerate test checks. NFC adds 7be271537e9 [WebAssembly] Rename wasm_rethrow_in_catch intrinsic/builtin adds d4f2fef7464 [TableGen] Remove unused declaration that caused build failures. adds 84dc9b451bf [mlir:JitRunner] Use custom shared library init/destroy fun [...] adds a36a2864c0d [ARM][LV] Additional loop invariant reduction test. NFC adds 80dee7965df [X86][SSE] Fold unpack(hop(),hop()) -> permute(hop()) adds 740950cf1cd Revert "[mlir:JitRunner] Use custom shared library init/des [...] adds d4af86581e8 [clangd] Fix type printing in the presence of qualifiers adds e185b1dd7b3 [ConstProp] Constant propagation for get.active.lane.mask i [...] adds 2e1bb7940a4 [clangd] Add missing "override" to fix the build. adds dd5165a920f [mlir] replace LLVM dialect float types with built-ins adds 466df1718e4 [libc++] Update generate_feature_test_macro_components.py t [...] new cb6d53ccdc7 [lldb] Bump the required SWIG version to 3 new 9386483b714 [X86] Add TLBSYNC, INVLPGB and SNP instructions The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/AST.cpp | 24 +- clang-tools-extra/clangd/CodeComplete.cpp | 10 +- clang-tools-extra/clangd/XRefs.cpp | 32 +- clang-tools-extra/clangd/XRefs.h | 4 +- clang-tools-extra/clangd/index/Merge.cpp | 2 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 12 +- .../unittests/tweaks/ExpandAutoTypeTests.cpp | 5 + .../unittests/tweaks/ExtractFunctionTests.cpp | 16 + clang/docs/LanguageExtensions.rst | 14 +- clang/docs/OpenCLSupport.rst | 56 +- clang/docs/OpenMPSupport.rst | 4 +- clang/include/clang/AST/PrettyPrinter.h | 10 + .../include/clang/Analysis/CrossTUAnalysisHelper.h | 41 - .../clang/Analysis/PathDiagnosticConsumers.def | 50 - clang/include/clang/Basic/Attr.td | 6 +- clang/include/clang/Basic/BuiltinsWebAssembly.def | 2 +- clang/include/clang/Basic/DiagnosticParseKinds.td | 6 + clang/include/clang/CrossTU/CrossTranslationUnit.h | 21 +- clang/include/clang/Sema/Sema.h | 16 +- clang/include/clang/Serialization/ASTBitCodes.h | 4 +- clang/include/clang/Serialization/ASTReader.h | 12 +- .../include/clang/StaticAnalyzer/Core/Analyses.def | 37 + .../clang/StaticAnalyzer/Core/AnalyzerOptions.h | 2 +- .../Core}/PathDiagnosticConsumers.h | 13 +- .../Core/PathSensitive/AnalysisManager.h | 2 +- clang/include/clang/module.modulemap | 1 - clang/lib/AST/AttrImpl.cpp | 11 +- clang/lib/AST/ExprConstant.cpp | 6 +- clang/lib/AST/TypePrinter.cpp | 3 + clang/lib/Analysis/CMakeLists.txt | 7 - .../Analysis/PlistHTMLPathDiagnosticConsumer.cpp | 35 - clang/lib/Basic/Targets/AArch64.cpp | 4 + clang/lib/Basic/Targets/AArch64.h | 2 + clang/lib/CodeGen/CGBuiltin.cpp | 7 +- clang/lib/CodeGen/CGException.cpp | 2 +- clang/lib/CodeGen/CGLoopInfo.cpp | 52 +- clang/lib/CodeGen/CGLoopInfo.h | 7 + clang/lib/CodeGen/TargetInfo.cpp | 62 +- clang/lib/CrossTU/CrossTranslationUnit.cpp | 13 +- clang/lib/Driver/Driver.cpp | 16 +- clang/lib/Driver/ToolChains/Gnu.cpp | 3 +- clang/lib/Frontend/CompilerInvocation.cpp | 2 +- clang/lib/Headers/__clang_hip_cmath.h | 28 + clang/lib/Parse/ParsePragma.cpp | 69 +- clang/lib/Sema/Sema.cpp | 13 +- clang/lib/Sema/SemaAttr.cpp | 92 +- clang/lib/Sema/SemaStmtAttr.cpp | 21 +- clang/lib/Serialization/ASTReader.cpp | 50 +- clang/lib/Serialization/ASTWriter.cpp | 16 +- clang/lib/StaticAnalyzer/Core/CMakeLists.txt | 4 + .../Core/HTMLDiagnostics.cpp} | 111 +- .../Core/PlistDiagnostics.cpp} | 62 +- .../Core/SarifDiagnostics.cpp} | 30 +- .../Core/TextDiagnostics.cpp} | 42 +- .../StaticAnalyzer/Frontend/AnalysisConsumer.cpp | 4 +- clang/test/AST/ast-print-pragmas.cpp | 30 + clang/test/CodeGen/builtins-wasm.c | 8 +- clang/test/CodeGen/object-size.c | 10 +- clang/test/CodeGenCXX/pragma-loop-pr27643.cpp | 9 +- clang/test/CodeGenCXX/pragma-loop.cpp | 78 +- clang/test/CodeGenCXX/wasm-eh.cpp | 10 +- clang/test/Driver/cl-options.c | 5 + clang/test/OpenMP/begin_declare_variant_messages.c | 2 +- clang/test/OpenMP/declare_variant_ast_x86_64.c | 10 + clang/test/OpenMP/declare_variant_messages.c | 10 +- clang/test/OpenMP/declare_variant_messages.cpp | 4 +- .../OpenMP/nvptx_declare_variant_name_mangling.cpp | 10 +- clang/test/OpenMP/target_codegen.cpp | 2 +- clang/test/Parser/pragma-loop.cpp | 19 +- clang/test/Sema/Inputs/pragma-align-pack1.h | 11 + .../misleading-pragma-align-pack-diagnostics.c | 19 + clang/unittests/Basic/FileEntryTest.cpp | 2 +- compiler-rt/lib/builtins/CMakeLists.txt | 7 +- compiler-rt/lib/builtins/atomic.c | 10 + compiler-rt/test/builtins/Unit/atomic_test.c | 80 ++ debuginfo-tests/CMakeLists.txt | 4 +- .../llvm-prettyprinters/gdb/mlir-support.cpp | 4 +- libcxx/docs/FeatureTestMacroTable.rst | 66 +- libcxx/include/version | 120 +- .../atomic_compare_exchange_strong.pass.cpp | 1 + ...tomic_compare_exchange_strong_explicit.pass.cpp | 1 + .../atomic_compare_exchange_weak.pass.cpp | 1 + .../atomic_compare_exchange_weak_explicit.pass.cpp | 1 + .../atomic_exchange.pass.cpp | 1 + .../atomic_exchange_explicit.pass.cpp | 1 + .../atomics.types.operations.req/atomic_helpers.h | 9 +- .../atomic_init.pass.cpp | 1 + .../atomic_is_lock_free.pass.cpp | 1 + .../atomic_load.pass.cpp | 1 + .../atomic_load_explicit.pass.cpp | 1 + .../atomic_store.pass.cpp | 1 + .../atomic_store_explicit.pass.cpp | 1 + .../atomic_wait.pass.cpp | 1 + .../algorithm.version.pass.cpp | 52 +- .../barrier.version.pass.cpp | 60 + .../support.limits.general/bit.version.pass.cpp | 26 + .../support.limits.general/cmath.version.pass.cpp | 20 + .../compare.version.pass.cpp | 6 +- .../complex.version.pass.cpp | 30 +- .../concepts.version.pass.cpp | 6 +- .../execution.version.pass.cpp | 5 +- .../functional.version.pass.cpp | 42 +- .../iterator.version.pass.cpp | 46 + .../support.limits.general/latch.version.pass.cpp | 60 + .../support.limits.general/memory.version.pass.cpp | 151 +++ .../semaphore.version.pass.cpp | 60 + .../support.limits.general/string.version.pass.cpp | 51 +- .../string_view.version.pass.cpp | 57 +- ...ts.version.pass.cpp => thread.version.pass.cpp} | 36 +- .../support.limits.general/tuple.version.pass.cpp | 26 + .../type_traits.version.pass.cpp | 112 ++ .../utility.version.pass.cpp | 40 +- .../support.limits.general/vector.version.pass.cpp | 26 + .../version.version.pass.cpp | 780 +++++++++++- libcxx/utils/ci/run-buildbot | 2 +- .../generate_feature_test_macro_components.py | 815 +++++++------ libcxxabi/src/cxa_personality.cpp | 105 +- lld/COFF/DebugTypes.cpp | 18 +- lld/COFF/DebugTypes.h | 3 +- lld/test/COFF/Inputs/precomp-ghash-obj1.obj | Bin 0 -> 3263 bytes lld/test/COFF/Inputs/precomp-ghash-obj2.obj | Bin 0 -> 2413 bytes lld/test/COFF/Inputs/precomp-ghash-precomp.obj | Bin 0 -> 64047 bytes lld/test/COFF/precomp-ghash.test | 53 + lld/test/wasm/debuginfo.test | 6 +- lldb/cmake/modules/FindLuaAndSwig.cmake | 4 +- lldb/cmake/modules/FindPythonAndSwig.cmake | 4 +- lldb/docs/resources/build.rst | 2 +- lldb/include/lldb/Core/ModuleList.h | 20 +- lldb/include/lldb/Target/Process.h | 58 +- lldb/include/lldb/Utility/ArchSpec.h | 9 + lldb/include/lldb/Utility/Iterable.h | 2 +- lldb/source/Breakpoint/Breakpoint.cpp | 7 +- lldb/source/Commands/CommandObjectTarget.cpp | 162 ++- lldb/source/Core/ModuleList.cpp | 4 - lldb/source/Core/SearchFilter.cpp | 39 +- .../Darwin-Kernel/DynamicLoaderDarwinKernel.cpp | 4 +- .../Hexagon-DYLD/HexagonDYLDRendezvous.cpp | 2 +- .../MacOSX-DYLD/DynamicLoaderDarwin.cpp | 8 +- .../MacOSX-DYLD/DynamicLoaderMacOS.cpp | 26 +- .../MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp | 7 +- .../DynamicLoader/Static/DynamicLoaderStatic.cpp | 6 +- .../ExpressionParser/Clang/ClangASTSource.cpp | 15 +- .../Clang/ClangExpressionParser.cpp | 21 +- lldb/source/Plugins/JITLoader/GDB/JITLoaderGDB.cpp | 4 +- .../ObjC/AppleObjCRuntime/AppleObjCRuntime.cpp | 7 +- .../ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp | 5 +- .../AppleObjCTrampolineHandler.cpp | 10 +- .../MemoryHistory/asan/MemoryHistoryASan.cpp | 9 +- .../Plugins/ObjectFile/ELF/ObjectFileELF.cpp | 14 + .../SymbolFile/DWARF/DWARFDebugInfoEntry.cpp | 12 +- .../Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h | 2 +- lldb/source/Target/Process.cpp | 7 +- lldb/source/Utility/ArchSpec.cpp | 9 + lldb/test/Shell/ObjectFile/ELF/riscv-arch.yaml | 24 + .../SymbolFile/DWARF/Inputs/subprogram_ranges.s | 159 +++ .../Shell/SymbolFile/DWARF/subprogram_ranges.test | 19 + llvm/cmake/modules/AddLLVM.cmake | 17 +- llvm/docs/TableGen/ProgRef.rst | 43 +- llvm/include/llvm/Analysis/LoopAccessAnalysis.h | 6 + .../include/llvm/CodeGen/GlobalISel/CallLowering.h | 4 +- .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 6 + llvm/include/llvm/CodeGen/ISDOpcodes.h | 9 + llvm/include/llvm/CodeGen/MachineLoopInfo.h | 6 + llvm/include/llvm/CodeGen/MachineRegisterInfo.h | 4 - llvm/include/llvm/CodeGen/TargetPassConfig.h | 6 +- llvm/include/llvm/Frontend/OpenMP/OMPKinds.def | 20 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 22 +- llvm/include/llvm/IR/IntrinsicsVE.td | 13 + llvm/include/llvm/IR/IntrinsicsWebAssembly.td | 3 +- llvm/include/llvm/IR/PassInstrumentation.h | 2 - llvm/include/llvm/IR/ValueHandle.h | 2 + llvm/include/llvm/Support/AArch64TargetParser.def | 2 + llvm/include/llvm/Support/AArch64TargetParser.h | 2 + llvm/include/llvm/Support/TaskQueue.h | 2 +- llvm/include/llvm/TableGen/Record.h | 10 + llvm/include/llvm/Target/GlobalISel/Combine.td | 9 +- .../Vectorize/LoopVectorizationLegality.h | 4 + llvm/lib/Analysis/ConstantFolding.cpp | 20 + llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 2 + llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 7 + llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 1 + llvm/lib/CodeGen/GlobalISel/CallLowering.cpp | 6 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 22 + llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 9 +- llvm/lib/CodeGen/MachineLICM.cpp | 50 +- llvm/lib/CodeGen/MachineLoopInfo.cpp | 56 + llvm/lib/CodeGen/MachineRegisterInfo.cpp | 7 - llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 35 + .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 6 +- llvm/lib/CodeGen/TargetPassConfig.cpp | 20 +- llvm/lib/Frontend/OpenMP/OMPContext.cpp | 10 +- llvm/lib/IR/PassInstrumentation.cpp | 8 - llvm/lib/IR/Verifier.cpp | 2 +- llvm/lib/Passes/PassBuilder.cpp | 8 - llvm/lib/Support/AArch64TargetParser.cpp | 4 + llvm/lib/Support/AMDGPUMetadata.cpp | 1 - llvm/lib/TableGen/TGLexer.cpp | 1 + llvm/lib/TableGen/TGLexer.h | 4 +- llvm/lib/TableGen/TGParser.cpp | 119 +- llvm/lib/TableGen/TGParser.h | 3 + llvm/lib/Target/AArch64/AArch64.td | 24 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 2 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 40 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 3 + llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 2 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 14 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 6 +- llvm/lib/Target/AArch64/AArch64Subtarget.h | 10 +- llvm/lib/Target/AArch64/AArch64SystemOperands.td | 2 +- .../AArch64/GISel/AArch64InstructionSelector.cpp | 4 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 8 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 2 - llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp | 15 - llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h | 15 +- llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp | 5 +- .../Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp | 19 +- .../Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp | 3 - llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h | 3 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 22 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h | 23 +- llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 55 +- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.h | 5 +- llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 23 +- llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPUExportClustering.h | 3 +- llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h | 3 +- .../Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp | 5 - llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h | 3 - llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 32 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 31 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 13 +- llvm/lib/Target/AMDGPU/AMDGPUInline.cpp | 8 - .../Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp | 10 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h | 3 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 16 +- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 9 +- .../lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp | 3 - llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 3 + llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp | 18 +- llvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp | 5 +- .../Target/AMDGPU/AMDGPULowerKernelArguments.cpp | 23 +- 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llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp | 13 - llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 17 +- llvm/lib/Target/AMDGPU/GCNILPSched.cpp | 1 - llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp | 20 - llvm/lib/Target/AMDGPU/GCNIterativeScheduler.h | 6 - llvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp | 13 - llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp | 5 - llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp | 6 - llvm/lib/Target/AMDGPU/GCNRegPressure.cpp | 22 +- llvm/lib/Target/AMDGPU/GCNRegPressure.h | 8 +- llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp | 5 - .../AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp | 5 +- .../AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp | 6 - .../AMDGPU/MCTargetDesc/AMDGPUELFStreamer.cpp | 3 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUELFStreamer.h | 6 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 6 +- .../AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h | 2 +- .../AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp | 8 +- .../AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h | 12 - .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 30 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h | 18 +- .../AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp | 9 +- .../Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 14 - llvm/lib/Target/AMDGPU/R600AsmPrinter.cpp | 1 - llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp | 10 - .../lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp | 26 - llvm/lib/Target/AMDGPU/R600Defines.h | 2 - llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp | 17 - llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp | 13 - llvm/lib/Target/AMDGPU/R600FrameLowering.cpp | 4 - llvm/lib/Target/AMDGPU/R600FrameLowering.h | 1 - llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 34 +- llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | 24 - llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp | 6 - .../AMDGPU/R600OpenCLImageTypeLoweringPass.cpp | 15 - .../Target/AMDGPU/R600OptimizeVectorRegisters.cpp | 20 - llvm/lib/Target/AMDGPU/R600Packetizer.cpp | 6 - llvm/lib/Target/AMDGPU/R600RegisterInfo.cpp | 5 +- llvm/lib/Target/AMDGPU/SIAddIMGInit.cpp | 7 - llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 22 +- llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 27 - llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp | 2 - llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 8 - llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp | 6 - llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 8 +- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 1 - llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 62 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 14 +- llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp | 2 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 20 - llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 29 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 38 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 17 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 23 - llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 18 - llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 8 - llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp | 18 +- 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llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 30 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 19 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp | 6 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h | 3 +- .../Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp | 4 +- llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.h | 2 +- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 7 +- llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp | 14 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 8 +- llvm/lib/Target/NVPTX/NVPTX.h | 19 + llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp | 31 +- llvm/lib/Target/NVPTX/NVPTXTargetMachine.h | 2 + llvm/lib/Target/NVPTX/NVVMIntrRange.cpp | 40 +- llvm/lib/Target/NVPTX/NVVMReflect.cpp | 15 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 33 +- llvm/lib/Target/VE/VEISelLowering.cpp | 201 ++- llvm/lib/Target/VE/VEISelLowering.h | 2 + llvm/lib/Target/VE/VEInstrInfo.td | 14 +- llvm/lib/Target/VE/VEInstrIntrinsicVL.td | 39 +- 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mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp | 3 +- mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp | 18 +- mlir/lib/ExecutionEngine/JitRunner.cpp | 16 +- mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp | 16 +- mlir/lib/Target/LLVMIR/ModuleTranslation.cpp | 16 +- mlir/lib/Target/LLVMIR/TypeTranslation.cpp | 36 +- mlir/test/Bindings/Python/ir_attributes.py | 2 +- mlir/test/Bindings/Python/ir_operation.py | 6 +- .../Conversion/AsyncToLLVM/convert-to-llvm.mlir | 11 +- .../lower-launch-func-to-gpu-runtime-calls.mlir | 10 +- .../Conversion/GPUCommon/memory-attrbution.mlir | 120 +- .../GPUToCUDA/lower-nvvm-kernel-to-cubin.mlir | 2 +- mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir | 238 ++-- mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir | 194 +-- .../GPUToROCm/lower-rocdl-kernel-to-hsaco.mlir | 2 +- .../test/Conversion/GPUToVulkan/invoke-vulkan.mlir | 80 +- .../Conversion/OpenMPToLLVM/convert-to-llvmir.mlir | 18 +- .../SPIRVToLLVM/arithmetic-ops-to-llvm.mlir | 38 +- .../SPIRVToLLVM/bitwise-ops-to-llvm.mlir | 222 ++-- .../Conversion/SPIRVToLLVM/cast-ops-to-llvm.mlir | 44 +- .../SPIRVToLLVM/comparison-ops-to-llvm.mlir | 68 +- .../SPIRVToLLVM/constant-op-to-llvm.mlir | 16 +- .../SPIRVToLLVM/control-flow-ops-to-llvm.mlir | 32 +- .../Conversion/SPIRVToLLVM/func-ops-to-llvm.mlir | 10 +- .../Conversion/SPIRVToLLVM/glsl-ops-to-llvm.mlir | 70 +- .../SPIRVToLLVM/logical-ops-to-llvm.mlir | 12 +- .../SPIRVToLLVM/lower-host-to-llvm-calls.mlir | 8 +- .../Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir | 66 +- .../Conversion/SPIRVToLLVM/misc-ops-to-llvm.mlir | 28 +- .../Conversion/SPIRVToLLVM/shift-ops-to-llvm.mlir | 36 +- .../SPIRVToLLVM/spirv-types-to-llvm.mlir | 12 +- .../StandardToLLVM/calling-convention.mlir | 40 +- .../StandardToLLVM/convert-argattrs.mlir | 4 +- .../StandardToLLVM/convert-dynamic-memref-ops.mlir | 464 +++---- .../Conversion/StandardToLLVM/convert-funcs.mlir | 18 +- .../StandardToLLVM/convert-static-memref-ops.mlir | 440 +++---- .../StandardToLLVM/convert-to-llvmir.mlir | 1281 ++++++++++---------- .../StandardToLLVM/standard-to-llvm.mlir | 168 +-- .../VectorToLLVM/vector-mask-to-llvm.mlir | 18 +- .../VectorToLLVM/vector-reduction-to-llvm.mlir | 32 +- .../Conversion/VectorToLLVM/vector-to-llvm.mlir | 962 +++++++-------- .../Conversion/VectorToROCDL/vector-to-rocdl.mlir | 8 +- mlir/test/Dialect/GPU/invalid.mlir | 20 +- mlir/test/Dialect/GPU/multiple-all-reduce.mlir | 4 +- mlir/test/Dialect/GPU/outlining.mlir | 4 +- mlir/test/Dialect/LLVMIR/dialect-cast.mlir | 101 +- mlir/test/Dialect/LLVMIR/func.mlir | 46 +- mlir/test/Dialect/LLVMIR/global.mlir | 82 +- mlir/test/Dialect/LLVMIR/invalid.mlir | 344 +++--- mlir/test/Dialect/LLVMIR/legalize-for-export.mlir | 12 +- mlir/test/Dialect/LLVMIR/nvvm.mlir | 96 +- mlir/test/Dialect/LLVMIR/rocdl.mlir | 218 ++-- mlir/test/Dialect/LLVMIR/roundtrip.mlir | 468 +++---- mlir/test/Dialect/LLVMIR/terminator.mlir | 2 +- mlir/test/Dialect/LLVMIR/types-invalid.mlir | 43 +- mlir/test/Dialect/LLVMIR/types.mlir | 102 +- mlir/test/Dialect/Linalg/llvm.mlir | 188 +-- mlir/test/Dialect/OpenMP/ops.mlir | 12 +- mlir/test/Dialect/SPIRV/IR/types.mlir | 4 +- mlir/test/Target/arm-sve.mlir | 6 +- mlir/test/Target/avx512.mlir | 28 +- mlir/test/Target/import.ll | 124 +- mlir/test/Target/llvmir-intrinsics.mlir | 220 ++-- mlir/test/Target/llvmir-invalid.mlir | 18 +- mlir/test/Target/llvmir-types.mlir | 52 +- mlir/test/Target/llvmir.mlir | 972 +++++++-------- mlir/test/Target/nvvmir.mlir | 66 +- mlir/test/Target/openmp-llvm.mlir | 98 +- mlir/test/Target/rocdl.mlir | 140 +-- mlir/test/Transforms/test-convert-call-op.mlir | 6 +- mlir/test/lib/Transforms/TestConvertCallOp.cpp | 3 +- mlir/test/mlir-cpu-runner/bare_ptr_call_conv.mlir | 2 +- mlir/test/mlir-cpu-runner/simple.mlir | 58 +- mlir/test/mlir-tblgen/rewriter-indexing.td | 3 + mlir/tools/mlir-tblgen/RewriterGen.cpp | 12 +- openmp/docs/design/Runtimes.rst | 79 ++ openmp/docs/remarks/OptimizationRemarks.rst | 25 + openmp/libomptarget/plugins/cuda/src/rtl.cpp | 123 +- 627 files changed, 16341 insertions(+), 9469 deletions(-) delete mode 100644 clang/include/clang/Analysis/CrossTUAnalysisHelper.h delete mode 100644 clang/include/clang/Analysis/PathDiagnosticConsumers.def rename clang/include/clang/{Analysis => StaticAnalyzer/Core}/PathDiagnosticConsume [...] delete mode 100644 clang/lib/Analysis/PlistHTMLPathDiagnosticConsumer.cpp rename clang/lib/{Analysis/HTMLPathDiagnosticConsumer.cpp => StaticAnalyzer/Core/H [...] rename clang/lib/{Analysis/PlistPathDiagnosticConsumer.cpp => StaticAnalyzer/Core/ [...] rename clang/lib/{Analysis/SarifPathDiagnosticConsumer.cpp => StaticAnalyzer/Core/ [...] rename clang/lib/{Analysis/TextPathDiagnosticConsumer.cpp => StaticAnalyzer/Core/T [...] create mode 100644 clang/test/OpenMP/declare_variant_ast_x86_64.c create mode 100644 clang/test/Sema/Inputs/pragma-align-pack1.h create mode 100644 clang/test/Sema/misleading-pragma-align-pack-diagnostics.c create mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] create mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] create mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] copy libcxx/test/std/language.support/support.limits/support.limits.general/{conce [...] create mode 100644 lld/test/COFF/Inputs/precomp-ghash-obj1.obj create mode 100644 lld/test/COFF/Inputs/precomp-ghash-obj2.obj create mode 100644 lld/test/COFF/Inputs/precomp-ghash-precomp.obj create mode 100644 lld/test/COFF/precomp-ghash.test create mode 100644 lldb/test/Shell/ObjectFile/ELF/riscv-arch.yaml create mode 100644 lldb/test/Shell/SymbolFile/DWARF/Inputs/subprogram_ranges.s create mode 100644 lldb/test/Shell/SymbolFile/DWARF/subprogram_ranges.test create mode 100644 llvm/lib/Target/X86/X86InstrSNP.td create mode 100644 llvm/test/CodeGen/AArch64/aarch64-dup-ext-vectortype-crash.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/combine-urem-pow-2.mir create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll create mode 100644 llvm/test/CodeGen/VE/VELIntrinsics/pack.ll create mode 100644 llvm/test/CodeGen/VE/VELIntrinsics/svob.ll create mode 100644 llvm/test/CodeGen/VE/Vector/expand_single_elem_build_vec.ll create mode 100644 llvm/test/CodeGen/VE/Vector/extract_elt.ll create mode 100644 llvm/test/CodeGen/VE/Vector/insert_elt.ll create mode 100644 llvm/test/CodeGen/X86/horizontal-shuffle-2.ll create mode 100644 llvm/test/MC/WebAssembly/debug-byval-struct.ll create mode 100644 llvm/test/MC/X86/SNP-32.s create mode 100644 llvm/test/MC/X86/SNP-64.s create mode 100644 llvm/test/Other/copy-metadata-of-declaration.ll create mode 100644 llvm/test/TableGen/assert.td rename {clang/test/CodeGenCoroutines => llvm/test/Transforms/Coroutines}/coro-retc [...] create mode 100644 llvm/test/Transforms/InstSimplify/ConstProp/active-lane-mask.ll create mode 100644 llvm/test/Transforms/LoopVectorize/AArch64/scalable-vf-hint.ll create mode 100644 llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization [...] create mode 100644 llvm/test/Transforms/LoopVectorize/scalable-vf-hint.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/change-to-unreachable-matching [...] create mode 100644 llvm/test/Transforms/SimplifyCFG/unreachable-matching-successor.ll create mode 100644 llvm/test/tools/llvm-pdbutil/Inputs/unknown-record.obj create mode 100644 llvm/test/tools/llvm-pdbutil/unknown-records.test -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (4343e5d21 -> 1d946acc9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards 4343e5d21 0: update: llvm-linux-qemu: all new 1d946acc9 0: update: llvm-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4343e5d21) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 182 +- 02-prepare_abe/console.log | 442 +- 03-build_llvm/console.log | 13910 ++++++++++++------------ 04-build_linux/console.log | 612 +- 05-build_abe-qemu/console.log | 6762 ++++++------ 06-boot_linux/console.log | 6 +- 07-check_regression/console.log | 12 +- 08-update_baseline/console.log | 12 +- console.log | 21938 +++++++++++++++++++------------------- jenkins/manifest.sh | 16 +- 10 files changed, 22042 insertions(+), 21850 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allnoconfig updated (470dd6bd36 -> e79de63ab1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allnoconfig in repository toolchain/ci/qemu. from 470dd6bd36 Merge remote-tracking branch 'remotes/stsquad/tags/pull-test [...] adds 655a650aca linux-user: Conditionalize TUNSETVNETLE adds d2ef1b83a7 tcg/i386: Adjust TCG_TARGET_HAS_MEMORY_BSWAP adds 07ce0b0530 tcg: Introduce INDEX_op_qemu_st8_i32 adds dfbd0b873a util/oslib-win32: Use _aligned_malloc for qemu_try_memalign adds ed6f53f9ca util/oslib: Assert qemu_try_memalign() alignment is a power of 2 adds df5d2b1658 tcg: Do not flush icache for interpreter adds 1da8de39a3 util: Enhance flush_icache_range with separate data pointer adds 664a79735e util: Specialize flush_idcache_range for aarch64 adds b91ccb3115 tcg: Move tcg prologue pointer out of TCGContext adds 8b5c2b6260 tcg: Move tcg epilogue pointer out of TCGContext adds 4846cd37df tcg: Add in_code_gen_buffer adds db0c51a380 tcg: Introduce tcg_splitwx_to_{rx,rw} adds ffd0e50736 tcg: Adjust TCGLabel for const adds 2be7d76b15 tcg: Adjust tcg_out_call for const adds 92ab8e7d62 tcg: Adjust tcg_out_label for const adds 755bf9e514 tcg: Adjust tcg_register_jit for const adds 1acbad0f27 tcg: Adjust tb_target_set_jmp_target for split-wx adds d997143533 tcg: Make DisasContextBase.tb const adds 04a37d4ca4 tcg: Make tb arg to synchronize_from_tb const adds 6bc144237a tcg: Use Error with alloc_code_gen_buffer adds a35b3e1415 tcg: Add --accel tcg,split-wx property adds a8c35b2cad accel/tcg: Support split-wx for linux with memfd adds 6f70ddee19 accel/tcg: Support split-wx for darwin/iOS with vm_remap adds eba40358b4 tcg: Return the TB pointer from the rx region from exit_tb adds 705ed477d5 tcg/i386: Support split-wx code generation adds f716bab3a9 tcg/aarch64: Use B not BL for tcg_out_goto_long adds ffba3eb34b tcg/aarch64: Support split-wx code generation adds f06176be76 disas: Push const down through host disassembly adds 305daaedf6 tcg/tci: Push const down through bytecode reading adds 44c7197f15 tcg: Introduce tcg_tbrel_diff adds e6dc7f818f tcg/ppc: Use tcg_tbrel_diff adds 2d6f38ebe5 tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB adds d54401dfef tcg/ppc: Support split-wx code generation adds 47c2206ba4 tcg/sparc: Use tcg_tbrel_diff adds 0d8b6191ac tcg/sparc: Support split-wx code generation adds dd90043f5d tcg/s390: Use tcg_tbrel_diff adds 79dae4ddd8 tcg/s390: Support split-wx code generation adds 844d0442a5 tcg/riscv: Fix branch range checks adds 4b6a52d01e tcg/riscv: Remove branch-over-branch fallback adds 793f738196 tcg/riscv: Support split-wx code generation adds d1861aa409 accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd adds 91a7fd1fb6 tcg/mips: Do not assert on relocation overflow adds df5af1306a tcg/mips: Support split-wx code generation adds 69478b8b15 tcg/arm: Support split-wx code generation adds de2fac62d2 tcg: Remove TCG_TARGET_SUPPORT_MIRROR adds c8bc1168ad tcg: Constify tcg_code_gen_epilogue adds e5e2e4c739 tcg: Constify TCGLabelQemuLdst.raddr adds e79de63ab1 Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-t [...] No new revisions were added by this update. Summary of changes: accel/tcg/cpu-exec.c | 41 +++--- accel/tcg/tcg-all.c | 26 +++- accel/tcg/tcg-runtime.c | 4 +- accel/tcg/tcg-runtime.h | 2 +- accel/tcg/trace-events | 2 +- accel/tcg/translate-all.c | 305 ++++++++++++++++++++++++++++++++++--------- accel/tcg/translator.c | 4 +- bsd-user/main.c | 2 +- disas.c | 2 +- disas/capstone.c | 2 +- include/disas/dis-asm.h | 4 +- include/disas/disas.h | 2 +- include/exec/exec-all.h | 2 +- include/exec/gen-icount.h | 4 +- include/exec/log.h | 2 +- include/exec/translator.h | 2 +- include/hw/core/cpu.h | 3 +- include/qemu/cacheflush.h | 15 ++- include/sysemu/tcg.h | 3 +- include/tcg/tcg-op.h | 2 +- include/tcg/tcg-opc.h | 5 + include/tcg/tcg.h | 61 +++++++-- linux-user/ioctls.h | 2 + linux-user/main.c | 2 +- qemu-options.hx | 7 + softmmu/physmem.c | 2 +- target/arm/cpu.c | 3 +- target/arm/translate-a64.c | 2 +- target/avr/cpu.c | 3 +- target/hppa/cpu.c | 3 +- target/i386/tcg/tcg-cpu.c | 3 +- target/microblaze/cpu.c | 3 +- target/mips/cpu.c | 3 +- target/riscv/cpu.c | 3 +- target/rx/cpu.c | 3 +- target/sh4/cpu.c | 3 +- target/sparc/cpu.c | 3 +- target/tricore/cpu.c | 2 +- tcg/README | 5 + tcg/aarch64/tcg-target.c.inc | 75 ++++++----- tcg/aarch64/tcg-target.h | 3 +- tcg/arm/tcg-target.c.inc | 41 +++--- tcg/arm/tcg-target.h | 3 +- tcg/i386/tcg-target.c.inc | 174 +++++++++++------------- tcg/i386/tcg-target.h | 12 +- tcg/mips/tcg-target.c.inc | 97 ++++++-------- tcg/mips/tcg-target.h | 3 +- tcg/optimize.c | 1 + tcg/ppc/tcg-target.c.inc | 88 +++++++------ tcg/ppc/tcg-target.h | 3 +- tcg/riscv/tcg-target.c.inc | 125 ++++++------------ tcg/riscv/tcg-target.h | 3 +- tcg/s390/tcg-target.c.inc | 91 ++++++------- tcg/s390/tcg-target.h | 9 +- tcg/sparc/tcg-target.c.inc | 58 ++++---- tcg/sparc/tcg-target.h | 3 +- tcg/tcg-ldst.c.inc | 2 +- tcg/tcg-op.c | 23 +++- tcg/tcg-pool.c.inc | 6 +- tcg/tcg.c | 94 ++++++++++--- tcg/tci.c | 62 +++++---- tcg/tci/tcg-target.c.inc | 2 +- tcg/tci/tcg-target.h | 7 +- util/cacheflush.c | 107 ++++++++++++--- util/cacheinfo.c | 8 +- util/oslib-posix.c | 2 + util/oslib-win32.c | 12 +- 67 files changed, 1033 insertions(+), 628 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

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