Tcwg-commits January 2021

tcwg-commits@lists.linaro.org

5 participants
9360 discussions

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allyesconfig updated (678ea9ba72b -> fd02aeeab1c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allyesconfig in repository toolchain/ci/gcc. from 678ea9ba72b Daily bump. adds fd02aeeab1c Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allyesconfig updated (db37d938 -> bcb48f18)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards db37d938 0: update: binutils-gcc-linux-qemu: all new bcb48f18 0: update: binutils-gcc-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (db37d938) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 122 +- 02-prepare_abe/console.log | 444 +- 03-build_abe-binutils/console.log | 11562 ++++++----- 04-build_abe-stage1/console.log | 13981 +++++++------ 05-build_linux/console.log | 816 +- 06-build_abe-qemu/console.log | 4516 ++--- 07-boot_linux/console.log | 10 +- 08-check_regression/console.log | 12 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 12 +- 09-update_baseline/results.regressions | 2 +- console.log | 31477 +++++++++++++++--------------- jenkins/manifest.sh | 8 +- 13 files changed, 31477 insertions(+), 31487 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-defconfig updated (678ea9ba72b -> eddcb627ccf)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-defconfig in repository toolchain/ci/gcc. from 678ea9ba72b Daily bump. adds fd02aeeab1c Daily bump. new 0fd6247a301 tree-optimization/97623 - avoid excessive insert iteration [...] new eddcb627ccf tree-optimization/97623 - Avoid PRE hoist insertion iteration The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/DATESTAMP | 2 +- gcc/testsuite/gcc.dg/tree-ssa/ssa-hoist-3.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/ssa-hoist-7.c | 54 +++++++++++++++++++++++++++++ gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-30.c | 2 +- gcc/tree-ssa-pre.c | 33 ++++++++++++++---- 5 files changed, 83 insertions(+), 10 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/ssa-hoist-7.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-defconfig updated (a4f15c60 -> 595f619e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-defconfig in repository toolchain/ci/base-artifacts. discards a4f15c60 0: update: binutils-gcc-linux-qemu: boot new 595f619e 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a4f15c60) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 181 +- 02-prepare_abe/console.log | 432 +- 03-build_abe-binutils/console.log | 11363 +++++----- 04-build_abe-stage1/console.log | 18421 +++++++-------- 05-build_linux/console.log | 808 +- 06-build_abe-qemu/console.log | 4621 ++-- 07-boot_linux/console.log | 412 +- 08-check_regression/console.log | 2 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 10 +- 09-update_baseline/results.regressions | 2 +- console.log | 36288 +++++++++++++++--------------- jenkins/manifest.sh | 8 +- 13 files changed, 36289 insertions(+), 36261 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[binutils-gdb] branch master updated (a0c38f0d705 -> 9c70334deec)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from a0c38f0d705 sim: or1k: fix include ordering with sim-main.h new 5c1008a41f1 sim: call SIM_AC_OPTION_WARNINGS(no) in remaining ports new 9c70334deec sim: always call SIM_AC_OPTION_WARNINGS The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: sim/bpf/ChangeLog | 5 +++ sim/bpf/configure | 109 +++++++++++++++++++++++++++++++++++++++++++++++- sim/bpf/configure.ac | 1 + sim/common/ChangeLog | 4 ++ sim/common/acinclude.m4 | 4 +- sim/erc32/ChangeLog | 5 +++ sim/erc32/configure | 109 +++++++++++++++++++++++++++++++++++++++++++++++- sim/erc32/configure.ac | 1 + sim/frv/ChangeLog | 5 +++ sim/frv/configure | 109 +++++++++++++++++++++++++++++++++++++++++++++++- sim/frv/configure.ac | 1 + sim/h8300/ChangeLog | 5 +++ sim/h8300/configure | 109 +++++++++++++++++++++++++++++++++++++++++++++++- sim/h8300/configure.ac | 1 + sim/iq2000/ChangeLog | 5 +++ sim/iq2000/configure | 109 +++++++++++++++++++++++++++++++++++++++++++++++- sim/iq2000/configure.ac | 1 + sim/lm32/ChangeLog | 5 +++ sim/lm32/configure | 109 +++++++++++++++++++++++++++++++++++++++++++++++- sim/lm32/configure.ac | 1 + sim/m32r/ChangeLog | 5 +++ sim/m32r/configure | 109 +++++++++++++++++++++++++++++++++++++++++++++++- sim/m32r/configure.ac | 1 + sim/or1k/ChangeLog | 5 +++ sim/or1k/configure | 109 +++++++++++++++++++++++++++++++++++++++++++++++- sim/or1k/configure.ac | 1 + sim/rl78/ChangeLog | 5 +++ sim/rl78/configure | 109 +++++++++++++++++++++++++++++++++++++++++++++++- sim/rl78/configure.ac | 1 + sim/rx/ChangeLog | 5 +++ sim/rx/configure | 109 +++++++++++++++++++++++++++++++++++++++++++++++- sim/rx/configure.ac | 1 + 32 files changed, 1137 insertions(+), 21 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[gcc] branch releases/gcc-10 updated (eddcb627ccf -> 69894ce1724)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch releases/gcc-10 in repository gcc. from eddcb627ccf tree-optimization/97623 - Avoid PRE hoist insertion iteration new 69894ce1724 tree-optimization/98117 - fix range set by vectorization on [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/gcc.dg/torture/pr98117.c | 19 +++++++++++++++++++ gcc/tree-vect-loop-manip.c | 28 ++++++++++++++++++++++------ 2 files changed, 41 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/torture/pr98117.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (9f2d9364b04 -> 8ea72b38873)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/llvm-project. from 9f2d9364b04 [CodeGen] Update transformations to use poison for shufflev [...] adds a92248600ec [mlir] NFC - Drop spurious assertion on symbols during `pro [...] adds 47991a15d19 [lld/mac] llvm style fix: no else after return adds c701f85c455 [STLExtras] Use return type from operator* of the wrapped iter. adds bdb748a0ab2 [ConstantFold] Add tests for fptoi.sat (NFC) adds 1ecae1e62ad [ConstantFold] Fold fptoi.sat intrinsics adds 9850d3b10a1 [CodeGen, DebugInfo] Use llvm::find_if (NFC) adds 1d10a1d5b1f [MemorySSA] Remove unused dominatesUse (NFC) adds e3d3dbd3393 [llvm] Ensure newlines at the end of files (NFC) adds 0aa75fb12fa [SLP] put verifyFunction call behind EXPENSIVE_CHECKS adds 3f09c77d33d [SLP] fix typo in assert adds 377dcfd5c15 [Tests] Auto update a vectorizer test to simplify future diff adds abfe348e6b4 [test] Improve CodeGenCXX/difile_entry.cpp adds 86d6f7e90a1 Precommit tests requested for D93725 adds fc8ab254472 [Tests] Precommit tests from to simplify rebase adds 13dea030b3d [lldb] Fix some bugs in the Pipe class and add tests adds 8e8d214c4a6 [NFCI][SimplifyCFG] Prefer to add Insert edges before Delet [...] adds 894d2dbf502 [LLVM] Added OpenMP to `LLVM_ALL_RUNTIMES` adds 7be3285248b [OpenMP] Not set OPENMP_STANDALONE_BUILD=ON when building O [...] adds 407b1e65a46 [StringExtras] Add a helper class for comma-separated lists adds 02bc320545d CGDebugInfo: Delete unused DIFile* parameter adds 4739dd67e7a [LoopDeletion] Break backedge of outermost loops when known [...] adds d43a264a5dd Revert "[X86][SSE] Fold unpack(hop(),hop()) -> permute(hop())" adds 7539c75bb43 [DAGCombine] Remove the check for unsafe-fp-math when we ar [...] adds 5cf73dca77e [RISCV] Convert most of the information about RVV Pseudos i [...] adds 7f69860243e [LoopUnroll] Fix a crash adds ffa67873a3f [PowerPC] Add variants of 64-bit vector types for vec_sel. adds dcac2da1063 [IR Parser] Fix a crash handling zero width integer attributes. adds 6215c1b778f CGDebugInfo: Delete redundant test adds b8d28420885 CGDebugInfo: Delete unneeded UnwrapTypeForDebugInfo adds a40767ec885 [MLIR][SPIRV] Add (de-)serialization support for SpecConsta [...] adds 5e476061deb [NFC][AsmPrinter] Make comments for spill/reload more precise. adds 7b11f564dcf [JITLink] Rename PostAllocationPasses to PreFixupPasses. adds 131ce834e4b [RISCV] Clear isCodeGenOnly flag on VMSGE(U) pseudo instruc [...] adds af339f89a14 Remove redundant casts. adds cddd3faf5de [CSKY] Add visibility macro to fix link error adds ee27c767bd2 [clang-format] Skip UTF8 Byte Order Mark while sorting includes adds 0c8b748f321 [ARM] Additional trunc cost tests. NFC adds 7473940bae0 [clang-format] turn on formatting after "clang-format on" w [...] adds 89878e8c966 [clang-format] Find main include after block ended with #pr [...] adds dcefcd51e01 [ARM] Update trunc costs adds b7ccaca5370 [NFC] Remove min/max functions from InstructionCost adds 97100646d1b Reapply "[clang][cli] Port DiagnosticOpts to new option par [...] adds 40abeb11f45 [NFC][InstructionCost] Change LoopVectorizationCostModel::g [...] adds 8165a034203 [ARM] Add debug messages for the load store optimizer. NFC adds 1677c86124e [clangd] Add metrics for go-to-implementation. adds c5be0e0cc0e [X86] Fix tile register spill issue. adds 675be651062 Require chained analyses in BasicAA and AAResults to be transitive adds c37f68a8885 [SVE][CodeGen] Fix legalisation of floating-point masked gathers adds 41bf338dd1e Revert rGd43a264a5dd3 "Revert "[X86][SSE] Fold unpack(hop() [...] adds 59632292663 [X86][SSE] Add missing SSE test coverage for permute(hop,ho [...] adds b72ca799823 [VE] Support intrinsic to isnert/extract_subreg of v512i1 adds d02de139324 [VE] Support additional VMRGW and VMV intrinsic instructions adds c74751d4b5b [obj2yaml] - Fix the crash in getUniquedSectionName(). adds 8ea72b38873 [clang][AArch64][SVE] Avoid going through memory for coerce [...] No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/XRefs.cpp | 11 + clang/include/clang/Basic/DiagnosticOptions.h | 12 + clang/include/clang/Driver/Options.td | 112 ++-- clang/lib/CodeGen/CGCall.cpp | 15 + clang/lib/CodeGen/CGDebugInfo.cpp | 15 +- clang/lib/CodeGen/CGDebugInfo.h | 3 +- clang/lib/Format/Format.cpp | 16 +- clang/lib/Frontend/CompilerInvocation.cpp | 165 ++---- clang/lib/Headers/altivec.h | 40 ++ ...sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp | 7 +- clang/test/CodeGen/attr-arm-sve-vector-bits-call.c | 93 ++-- clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c | 27 +- .../CodeGen/attr-arm-sve-vector-bits-codegen.c | 27 +- clang/test/CodeGen/builtins-ppc-vsx.c | 60 ++ clang/test/CodeGenCXX/difile_entry.cpp | 17 +- clang/unittests/Format/SortIncludesTest.cpp | 112 ++++ .../unittests/Frontend/CompilerInvocationTest.cpp | 15 + lld/MachO/Writer.cpp | 6 +- lldb/source/Host/posix/PipePosix.cpp | 10 +- lldb/unittests/Host/CMakeLists.txt | 1 + lldb/unittests/Host/PipeTest.cpp | 48 ++ llvm/include/llvm/ADT/STLExtras.h | 2 +- llvm/include/llvm/ADT/StringExtras.h | 24 + .../llvm/Analysis/FunctionPropertiesAnalysis.h | 2 +- .../llvm/Analysis/InlineSizeEstimatorAnalysis.h | 2 +- llvm/include/llvm/Analysis/MLInlineAdvisor.h | 2 +- llvm/include/llvm/Analysis/MemorySSA.h | 1 - .../include/llvm/ExecutionEngine/JITLink/JITLink.h | 4 +- llvm/include/llvm/IR/IntrinsicsVE.td | 18 + llvm/include/llvm/Option/OptParser.td | 1 + llvm/include/llvm/Support/InstructionCost.h | 8 - llvm/include/llvm/Target/CGPassBuilderOption.h | 2 +- llvm/include/llvm/Transforms/Utils/LoopUtils.h | 6 + llvm/lib/Analysis/AliasAnalysis.cpp | 4 +- llvm/lib/Analysis/BasicAliasAnalysis.cpp | 6 +- llvm/lib/Analysis/ConstantFolding.cpp | 17 +- llvm/lib/Analysis/FunctionPropertiesAnalysis.cpp | 2 +- llvm/lib/Analysis/MemoryBuiltins.cpp | 5 +- llvm/lib/Analysis/MemorySSA.cpp | 17 - llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 17 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 2 +- llvm/lib/CodeGen/InlineSpiller.cpp | 38 +- llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp | 6 +- llvm/lib/CodeGen/LiveIntervalCalc.cpp | 2 +- llvm/lib/CodeGen/MIRCanonicalizerPass.cpp | 6 +- llvm/lib/CodeGen/MachineBasicBlock.cpp | 25 +- llvm/lib/CodeGen/RegisterScavenging.cpp | 9 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 +- llvm/lib/CodeGen/SwiftErrorValueTracking.cpp | 4 +- llvm/lib/DebugInfo/DWARF/DWARFGdbIndex.cpp | 4 +- llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp | 7 +- llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp | 2 +- .../lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp | 2 +- llvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp | 2 +- llvm/lib/IR/AutoUpgrade.cpp | 8 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 11 +- llvm/lib/Target/AArch64/AArch64InstrGISel.td | 2 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 14 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 3 +- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 98 ++-- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 13 + llvm/lib/Target/CSKY/TargetInfo/CSKYTargetInfo.cpp | 2 +- .../Target/Hexagon/HexagonLoopIdiomRecognition.cpp | 1 - llvm/lib/Target/Mips/MipsInstrInfo.cpp | 2 +- llvm/lib/Target/PowerPC/PPCCCState.cpp | 2 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 23 +- llvm/lib/Target/RISCV/RISCVInstrFormats.td | 18 + llvm/lib/Target/RISCV/RISCVInstrInfoV.td | 22 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 137 +++-- llvm/lib/Target/RISCV/RISCVMCInstLower.cpp | 18 +- llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h | 43 +- llvm/lib/Target/VE/VEInstrIntrinsicVL.td | 31 ++ llvm/lib/Target/X86/X86ISelLowering.cpp | 6 +- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 4 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 5 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 3 +- .../InstCombine/InstructionCombining.cpp | 4 +- llvm/lib/Transforms/Scalar/GVNHoist.cpp | 1 - llvm/lib/Transforms/Scalar/LoopDeletion.cpp | 51 ++ llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp | 2 +- llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 2 +- llvm/lib/Transforms/Utils/Local.cpp | 8 +- llvm/lib/Transforms/Utils/LoopUnroll.cpp | 105 ++-- llvm/lib/Transforms/Utils/LoopUtils.cpp | 32 ++ .../Transforms/Utils/PromoteMemoryToRegister.cpp | 12 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 36 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 55 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 8 +- llvm/runtimes/CMakeLists.txt | 10 +- llvm/test/Analysis/CostModel/ARM/arith-overflow.ll | 48 +- llvm/test/Analysis/CostModel/ARM/cast.ll | 110 +++- .../CostModel/ARM/mve-gather-scatter-cost.ll | 6 +- .../CodeGen/AArch64/sve-masked-gather-legalize.ll | 106 ++++ llvm/test/CodeGen/AMDGPU/fneg-combines.ll | 2 +- llvm/test/CodeGen/AMDGPU/frem.ll | 6 +- llvm/test/CodeGen/NVPTX/fast-math.ll | 6 +- llvm/test/CodeGen/NVPTX/sqrt-approx.ll | 16 +- llvm/test/CodeGen/VE/VELIntrinsics/extract.ll | 33 ++ llvm/test/CodeGen/VE/VELIntrinsics/insert.ll | 32 ++ llvm/test/CodeGen/VE/VELIntrinsics/vmrg.ll | 35 ++ llvm/test/CodeGen/VE/VELIntrinsics/vmv.ll | 91 ++- llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll | 133 +++++ llvm/test/CodeGen/X86/horizontal-shuffle-2.ll | 266 ++++----- ...zontal-shuffle-2.ll => horizontal-shuffle-3.ll} | 119 ---- llvm/test/CodeGen/X86/sqrt-fastmath-mir.ll | 36 +- llvm/test/CodeGen/X86/sqrt-fastmath.ll | 8 +- .../Transforms/IndVarSimplify/exit_value_test2.ll | 6 +- llvm/test/Transforms/InstSimplify/fptoi-sat.ll | 612 +++++++++++++++++++++ llvm/test/Transforms/LoopDeletion/update-scev.ll | 3 +- llvm/test/Transforms/LoopDeletion/zero-btc.ll | 375 +++++++++++++ .../Transforms/LoopUnroll/unroll-after-peel.ll | 48 ++ .../first-order-recurrence-complex.ll | 399 +++++++++++--- llvm/test/Transforms/LoopVectorize/loop-form.ll | 123 +++++ llvm/test/tools/obj2yaml/ELF/symbol.yaml | 41 ++ llvm/tools/obj2yaml/elf2yaml.cpp | 29 +- llvm/unittests/ADT/STLExtrasTest.cpp | 73 +++ llvm/unittests/ADT/StringExtrasTest.cpp | 14 + llvm/unittests/Support/InstructionCostTest.cpp | 4 +- llvm/utils/TableGen/OptParserEmitter.cpp | 12 +- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td | 4 +- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 10 +- mlir/lib/Dialect/Affine/IR/AffineOps.cpp | 12 +- mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp | 5 +- mlir/lib/Parser/AttributeParser.cpp | 5 + mlir/lib/Target/SPIRV/Deserialization.cpp | 139 ++++- mlir/lib/Target/SPIRV/Serialization.cpp | 49 ++ mlir/test/Dialect/SPIRV/IR/structure-ops.mlir | 14 + mlir/test/IR/invalid-ops.mlir | 8 + mlir/test/Target/SPIRV/spec-constant.mlir | 31 ++ openmp/cmake/OpenMPTesting.cmake | 4 +- 131 files changed, 3749 insertions(+), 1183 deletions(-) create mode 100644 lldb/unittests/Host/PipeTest.cpp create mode 100644 llvm/test/CodeGen/VE/VELIntrinsics/extract.ll create mode 100644 llvm/test/CodeGen/VE/VELIntrinsics/insert.ll create mode 100644 llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll copy llvm/test/CodeGen/X86/{horizontal-shuffle-2.ll => horizontal-shuffle-3.ll} (51%) create mode 100644 llvm/test/Transforms/InstSimplify/fptoi-sat.ll create mode 100644 llvm/test/Transforms/LoopDeletion/zero-btc.ll create mode 100644 llvm/test/Transforms/LoopUnroll/unroll-after-peel.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (8b4c5d1b -> 1e303e93)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards 8b4c5d1b 0: update: llvm-linux-qemu: all new 1e303e93 0: update: llvm-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (8b4c5d1b) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 106 +- 02-prepare_abe/console.log | 422 +- 03-build_llvm/console.log | 13860 ++++++++++++------------ 04-build_linux/console.log | 758 +- 05-build_abe-qemu/console.log | 6825 ++++++------ 06-boot_linux/console.log | 10 +- 07-check_regression/console.log | 20 +- 08-update_baseline/console.log | 18 +- console.log | 22019 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 10 files changed, 22022 insertions(+), 22024 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (9f2d9364b04 -> 8112a2598ce)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/llvm-project. from 9f2d9364b04 [CodeGen] Update transformations to use poison for shufflev [...] adds a92248600ec [mlir] NFC - Drop spurious assertion on symbols during `pro [...] adds 47991a15d19 [lld/mac] llvm style fix: no else after return adds c701f85c455 [STLExtras] Use return type from operator* of the wrapped iter. adds bdb748a0ab2 [ConstantFold] Add tests for fptoi.sat (NFC) adds 1ecae1e62ad [ConstantFold] Fold fptoi.sat intrinsics adds 9850d3b10a1 [CodeGen, DebugInfo] Use llvm::find_if (NFC) adds 1d10a1d5b1f [MemorySSA] Remove unused dominatesUse (NFC) adds e3d3dbd3393 [llvm] Ensure newlines at the end of files (NFC) adds 0aa75fb12fa [SLP] put verifyFunction call behind EXPENSIVE_CHECKS adds 3f09c77d33d [SLP] fix typo in assert adds 377dcfd5c15 [Tests] Auto update a vectorizer test to simplify future diff adds abfe348e6b4 [test] Improve CodeGenCXX/difile_entry.cpp adds 86d6f7e90a1 Precommit tests requested for D93725 adds fc8ab254472 [Tests] Precommit tests from to simplify rebase adds 13dea030b3d [lldb] Fix some bugs in the Pipe class and add tests adds 8e8d214c4a6 [NFCI][SimplifyCFG] Prefer to add Insert edges before Delet [...] adds 894d2dbf502 [LLVM] Added OpenMP to `LLVM_ALL_RUNTIMES` adds 7be3285248b [OpenMP] Not set OPENMP_STANDALONE_BUILD=ON when building O [...] adds 407b1e65a46 [StringExtras] Add a helper class for comma-separated lists adds 02bc320545d CGDebugInfo: Delete unused DIFile* parameter adds 4739dd67e7a [LoopDeletion] Break backedge of outermost loops when known [...] adds d43a264a5dd Revert "[X86][SSE] Fold unpack(hop(),hop()) -> permute(hop())" adds 7539c75bb43 [DAGCombine] Remove the check for unsafe-fp-math when we ar [...] adds 5cf73dca77e [RISCV] Convert most of the information about RVV Pseudos i [...] adds 7f69860243e [LoopUnroll] Fix a crash adds ffa67873a3f [PowerPC] Add variants of 64-bit vector types for vec_sel. adds dcac2da1063 [IR Parser] Fix a crash handling zero width integer attributes. adds 6215c1b778f CGDebugInfo: Delete redundant test adds b8d28420885 CGDebugInfo: Delete unneeded UnwrapTypeForDebugInfo adds a40767ec885 [MLIR][SPIRV] Add (de-)serialization support for SpecConsta [...] adds 5e476061deb [NFC][AsmPrinter] Make comments for spill/reload more precise. adds 7b11f564dcf [JITLink] Rename PostAllocationPasses to PreFixupPasses. adds 131ce834e4b [RISCV] Clear isCodeGenOnly flag on VMSGE(U) pseudo instruc [...] adds af339f89a14 Remove redundant casts. adds cddd3faf5de [CSKY] Add visibility macro to fix link error adds ee27c767bd2 [clang-format] Skip UTF8 Byte Order Mark while sorting includes adds 0c8b748f321 [ARM] Additional trunc cost tests. NFC adds 7473940bae0 [clang-format] turn on formatting after "clang-format on" w [...] adds 89878e8c966 [clang-format] Find main include after block ended with #pr [...] adds dcefcd51e01 [ARM] Update trunc costs adds b7ccaca5370 [NFC] Remove min/max functions from InstructionCost adds 97100646d1b Reapply "[clang][cli] Port DiagnosticOpts to new option par [...] adds 40abeb11f45 [NFC][InstructionCost] Change LoopVectorizationCostModel::g [...] adds 8165a034203 [ARM] Add debug messages for the load store optimizer. NFC adds 1677c86124e [clangd] Add metrics for go-to-implementation. adds c5be0e0cc0e [X86] Fix tile register spill issue. adds 675be651062 Require chained analyses in BasicAA and AAResults to be transitive new c37f68a8885 [SVE][CodeGen] Fix legalisation of floating-point masked gathers new 41bf338dd1e Revert rGd43a264a5dd3 "Revert "[X86][SSE] Fold unpack(hop() [...] new 59632292663 [X86][SSE] Add missing SSE test coverage for permute(hop,ho [...] new b72ca799823 [VE] Support intrinsic to isnert/extract_subreg of v512i1 new d02de139324 [VE] Support additional VMRGW and VMV intrinsic instructions new c74751d4b5b [obj2yaml] - Fix the crash in getUniquedSectionName(). new 8ea72b38873 [clang][AArch64][SVE] Avoid going through memory for coerce [...] new a6db7cf1ce7 [llvm-readelf/obj] - Index phdrs and relocations from 0 whe [...] new a94497a3429 [VPlan] Move initial quote emission from ::print to ::dumpB [...] new a5b484c4d41 [obj2yaml][test] - Improve and fix section-group.yaml test. new d36e879c21c [lldb] Disable PipeTest.OpenAsReader on windows new 8112a2598ce [X86][SSE] Add 'vectorized sum' test patterns The 12 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/XRefs.cpp | 11 + clang/include/clang/Basic/DiagnosticOptions.h | 12 + clang/include/clang/Driver/Options.td | 112 +- clang/lib/CodeGen/CGCall.cpp | 15 + clang/lib/CodeGen/CGDebugInfo.cpp | 15 +- clang/lib/CodeGen/CGDebugInfo.h | 3 +- clang/lib/Format/Format.cpp | 16 +- clang/lib/Frontend/CompilerInvocation.cpp | 165 +-- clang/lib/Headers/altivec.h | 40 + ...sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp | 7 +- clang/test/CodeGen/attr-arm-sve-vector-bits-call.c | 93 +- clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c | 27 +- .../CodeGen/attr-arm-sve-vector-bits-codegen.c | 27 +- clang/test/CodeGen/builtins-ppc-vsx.c | 60 + clang/test/CodeGenCXX/difile_entry.cpp | 17 +- clang/unittests/Format/SortIncludesTest.cpp | 112 ++ .../unittests/Frontend/CompilerInvocationTest.cpp | 15 + lld/MachO/Writer.cpp | 6 +- lldb/source/Host/posix/PipePosix.cpp | 10 +- lldb/unittests/Host/CMakeLists.txt | 1 + lldb/unittests/Host/PipeTest.cpp | 51 + llvm/include/llvm/ADT/STLExtras.h | 2 +- llvm/include/llvm/ADT/StringExtras.h | 24 + .../llvm/Analysis/FunctionPropertiesAnalysis.h | 2 +- .../llvm/Analysis/InlineSizeEstimatorAnalysis.h | 2 +- llvm/include/llvm/Analysis/MLInlineAdvisor.h | 2 +- llvm/include/llvm/Analysis/MemorySSA.h | 1 - .../include/llvm/ExecutionEngine/JITLink/JITLink.h | 4 +- llvm/include/llvm/IR/IntrinsicsVE.td | 18 + llvm/include/llvm/Option/OptParser.td | 1 + llvm/include/llvm/Support/InstructionCost.h | 8 - llvm/include/llvm/Target/CGPassBuilderOption.h | 2 +- llvm/include/llvm/Transforms/Utils/LoopUtils.h | 6 + llvm/lib/Analysis/AliasAnalysis.cpp | 4 +- llvm/lib/Analysis/BasicAliasAnalysis.cpp | 6 +- llvm/lib/Analysis/ConstantFolding.cpp | 17 +- llvm/lib/Analysis/FunctionPropertiesAnalysis.cpp | 2 +- llvm/lib/Analysis/MemoryBuiltins.cpp | 5 +- llvm/lib/Analysis/MemorySSA.cpp | 17 - llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 17 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 2 +- llvm/lib/CodeGen/InlineSpiller.cpp | 38 +- llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp | 6 +- llvm/lib/CodeGen/LiveIntervalCalc.cpp | 2 +- llvm/lib/CodeGen/MIRCanonicalizerPass.cpp | 6 +- llvm/lib/CodeGen/MachineBasicBlock.cpp | 25 +- llvm/lib/CodeGen/RegisterScavenging.cpp | 9 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 +- llvm/lib/CodeGen/SwiftErrorValueTracking.cpp | 4 +- llvm/lib/DebugInfo/DWARF/DWARFGdbIndex.cpp | 4 +- llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp | 7 +- llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp | 2 +- .../lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp | 2 +- llvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp | 2 +- llvm/lib/IR/AutoUpgrade.cpp | 8 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 11 +- llvm/lib/Target/AArch64/AArch64InstrGISel.td | 2 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 14 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 3 +- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 98 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 13 + llvm/lib/Target/CSKY/TargetInfo/CSKYTargetInfo.cpp | 2 +- .../Target/Hexagon/HexagonLoopIdiomRecognition.cpp | 1 - llvm/lib/Target/Mips/MipsInstrInfo.cpp | 2 +- llvm/lib/Target/PowerPC/PPCCCState.cpp | 2 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 23 +- llvm/lib/Target/RISCV/RISCVInstrFormats.td | 18 + llvm/lib/Target/RISCV/RISCVInstrInfoV.td | 22 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 137 ++- llvm/lib/Target/RISCV/RISCVMCInstLower.cpp | 18 +- llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h | 43 +- llvm/lib/Target/VE/VEInstrIntrinsicVL.td | 31 + llvm/lib/Target/X86/X86ISelLowering.cpp | 6 +- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 4 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 5 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 3 +- .../InstCombine/InstructionCombining.cpp | 4 +- llvm/lib/Transforms/Scalar/GVNHoist.cpp | 1 - llvm/lib/Transforms/Scalar/LoopDeletion.cpp | 51 + llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp | 2 +- llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 2 +- llvm/lib/Transforms/Utils/Local.cpp | 8 +- llvm/lib/Transforms/Utils/LoopUnroll.cpp | 105 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 32 + .../Transforms/Utils/PromoteMemoryToRegister.cpp | 12 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 36 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 55 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 8 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 30 +- llvm/runtimes/CMakeLists.txt | 10 +- llvm/test/Analysis/CostModel/ARM/arith-overflow.ll | 48 +- llvm/test/Analysis/CostModel/ARM/cast.ll | 110 +- .../CostModel/ARM/mve-gather-scatter-cost.ll | 6 +- .../CodeGen/AArch64/sve-masked-gather-legalize.ll | 106 ++ llvm/test/CodeGen/AMDGPU/fneg-combines.ll | 2 +- llvm/test/CodeGen/AMDGPU/frem.ll | 6 +- llvm/test/CodeGen/NVPTX/fast-math.ll | 6 +- llvm/test/CodeGen/NVPTX/sqrt-approx.ll | 16 +- llvm/test/CodeGen/VE/VELIntrinsics/extract.ll | 33 + llvm/test/CodeGen/VE/VELIntrinsics/insert.ll | 32 + llvm/test/CodeGen/VE/VELIntrinsics/vmrg.ll | 35 + llvm/test/CodeGen/VE/VELIntrinsics/vmv.ll | 91 +- llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll | 133 +++ llvm/test/CodeGen/X86/horizontal-shuffle-2.ll | 266 ++--- ...zontal-shuffle-2.ll => horizontal-shuffle-3.ll} | 119 -- llvm/test/CodeGen/X86/horizontal-sum.ll | 1189 ++++++++++++++++++++ llvm/test/CodeGen/X86/sqrt-fastmath-mir.ll | 36 +- llvm/test/CodeGen/X86/sqrt-fastmath.ll | 8 +- .../Transforms/IndVarSimplify/exit_value_test2.ll | 6 +- llvm/test/Transforms/InstSimplify/fptoi-sat.ll | 612 ++++++++++ llvm/test/Transforms/LoopDeletion/update-scev.ll | 3 +- llvm/test/Transforms/LoopDeletion/zero-btc.ll | 375 ++++++ .../Transforms/LoopUnroll/unroll-after-peel.ll | 48 + .../first-order-recurrence-complex.ll | 399 +++++-- llvm/test/Transforms/LoopVectorize/loop-form.ll | 123 ++ llvm/test/tools/llvm-readobj/ELF/gnu-notes.test | 8 +- .../llvm-readobj/ELF/note-core-ntfile-bad.test | 8 +- .../tools/llvm-readobj/ELF/relocation-errors.test | 8 +- llvm/test/tools/llvm-readobj/ELF/relocations.test | 8 +- llvm/test/tools/llvm-readobj/ELF/stack-sizes.test | 30 +- llvm/test/tools/obj2yaml/ELF/section-group.yaml | 67 +- llvm/test/tools/obj2yaml/ELF/symbol.yaml | 41 + llvm/tools/llvm-readobj/ELFDumper.cpp | 13 +- llvm/tools/obj2yaml/elf2yaml.cpp | 29 +- llvm/unittests/ADT/STLExtrasTest.cpp | 73 ++ llvm/unittests/ADT/StringExtrasTest.cpp | 14 + llvm/unittests/Support/InstructionCostTest.cpp | 4 +- llvm/utils/TableGen/OptParserEmitter.cpp | 12 +- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td | 4 +- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 10 +- mlir/lib/Dialect/Affine/IR/AffineOps.cpp | 12 +- mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp | 5 +- mlir/lib/Parser/AttributeParser.cpp | 5 + mlir/lib/Target/SPIRV/Deserialization.cpp | 139 ++- mlir/lib/Target/SPIRV/Serialization.cpp | 49 + mlir/test/Dialect/SPIRV/IR/structure-ops.mlir | 14 + mlir/test/IR/invalid-ops.mlir | 8 + mlir/test/Target/SPIRV/spec-constant.mlir | 31 + openmp/cmake/OpenMPTesting.cmake | 4 +- 140 files changed, 5016 insertions(+), 1280 deletions(-) create mode 100644 lldb/unittests/Host/PipeTest.cpp create mode 100644 llvm/test/CodeGen/VE/VELIntrinsics/extract.ll create mode 100644 llvm/test/CodeGen/VE/VELIntrinsics/insert.ll create mode 100644 llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll copy llvm/test/CodeGen/X86/{horizontal-shuffle-2.ll => horizontal-shuffle-3.ll} (51%) create mode 100644 llvm/test/CodeGen/X86/horizontal-sum.ll create mode 100644 llvm/test/Transforms/InstSimplify/fptoi-sat.ll create mode 100644 llvm/test/Transforms/LoopDeletion/zero-btc.ll create mode 100644 llvm/test/Transforms/LoopUnroll/unroll-after-peel.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (170928cf -> ea1a2082)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards 170928cf 0: update: llvm-linux-qemu: all new ea1a2082 0: update: llvm-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (170928cf) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 181 +- 02-prepare_abe/console.log | 422 +- 03-build_llvm/console.log | 13866 ++++++++++++------------ 04-build_linux/console.log | 798 +- 05-build_abe-qemu/console.log | 6800 ++++++------ 06-boot_linux/console.log | 6 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 10 +- console.log | 22085 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 10 files changed, 22094 insertions(+), 22084 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits January 2021