Tcwg-commits January 2021

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[gcc] branch master updated (78739c2df78 -> e62bb7f0834)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 78739c2df78 c++: Add support for -std=c++23 new e62bb7f0834 Daily bump. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 51 +++++++++++++++++++++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 6 +++++ gcc/c-family/ChangeLog | 10 +++++++++ gcc/cp/ChangeLog | 18 +++++++++++++++ gcc/d/ChangeLog | 8 +++++++ gcc/testsuite/ChangeLog | 58 +++++++++++++++++++++++++++++++++++++++++++++++++ libcpp/ChangeLog | 6 +++++ libgcc/ChangeLog | 7 ++++++ libphobos/ChangeLog | 7 ++++++ libsanitizer/ChangeLog | 6 +++++ 11 files changed, 178 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[binutils-gdb] branch master updated (1f583bc2fcb -> c22788d6148)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 1f583bc2fcb nios2: Don't disable relaxation with --gdwarf-N new c22788d6148 Automatic date update in version.in The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[binutils-gdb] branch gdb-10-branch updated (1cdf95e6f1f -> d459c23b8f6)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch gdb-10-branch in repository binutils-gdb. from 1cdf95e6f1f Automatic date update in version.in new d459c23b8f6 Automatic date update in version.in The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[binutils-gdb] branch binutils-2_36-branch updated (510753f8484 -> 0dd1ac834b9)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch binutils-2_36-branch in repository binutils-gdb. from 510753f8484 Segmentation fault i386-gen new 0dd1ac834b9 Automatic date update in version.in The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[binutils-gdb] branch binutils-2_35-branch updated (a2aa107b137 -> 6dcfc42f689)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch binutils-2_35-branch in repository binutils-gdb. from a2aa107b137 PR27218, memory access violation in dwarf2dbg.c new b1e65c1026a Fix thinko in objcopy's memory freeing code. new 6dcfc42f689 Segmentation fault i386-gen The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: binutils/ChangeLog | 6 ++++++ binutils/objcopy.c | 2 +- opcodes/ChangeLog | 5 +++++ opcodes/i386-gen.c | 2 ++ 4 files changed, 14 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O3_LTO updated (92be640bd7d -> 79ce46e2753)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O3_LTO in repository toolchain/ci/llvm-project. from 92be640bd7d [FPEnv][AMDGPU] Disable FSUB(-0,X)->FNEG(X) DAGCombine when [...] adds 58b6c5d932a [LoopUtils] reorder logic for creating reduction; NFC adds 97669575241 [LoopUtils] reduce code for creatng reduction; NFC adds aa169033892 [test] Pin backedge-id-bug-xfail.ll to legacy PM adds 8e293fe6ad0 [NewPM][AMDGPU] Pass TargetMachine to AMDGPUSimplifyLibCallsPass adds abbef2fd46d [ValueTracking] isGuaranteedNotToBePoison should return tru [...] adds efc82c4ad2b [NFC, Refactor] Modernize StorageClass from Specifiers.h to [...] adds 36263a7cccc [LoopUtils] remove redundant opcode parameter; NFC adds 2fd11e0b1ef Revert "[NFC, Refactor] Modernize StorageClass from Specifi [...] adds f67d3dbdb93 [clang] - Also look for devtoolset-10 adds b4f519bddda [NFCI] DwarfEHPrepare: update DomTree in non-permissive mod [...] adds 3fb57222c4c [NFCI] SimplifyCFG: switch to non-permissive DomTree update [...] adds ed9de61cc3e [SimplifyCFGPass] mergeEmptyReturnBlocks(): switch to non-p [...] adds a8604e3d5b7 [SimplifyCFG] simplifyIndirectBr(): switch to non-permissiv [...] adds 110b3d7855e [SimplifyCFG] SimplifyEqualityComparisonWithOnlyPredecessor [...] adds 32c47ebef18 [SimplifyCFG] SimplifyCondBranchToTwoReturns(): switch to n [...] adds e30fbbe9a53 [JumpThreading][NewPM] Skip when target has divergent CF adds c4f12a07a44 [WebAssembly] Remove old SDT_WebAssemblyCalls (NFC) adds f28b026d32c [InstSimplify] add a test for gep with poison operand (NFC) adds f665a8c5b8b [InstSimplify] gep with poison operand is poison adds ae614851631 [UpdateTestChecks] Fix PowerPC RE to support AIX assembly adds d51d72bbb91 [RISCV] Rename RVV intrinsics class (NFC) adds 2962f1149c8 [NFC] Add the getSizeInBytes() interface for MachineConstan [...] adds 48340fbe6a1 [NFC] [PowerPC] Update vec_constants test to reflect more patterns adds b6c8feb29fc [NFC] [PowerPC] Remove dead code in BUILD_VECTOR peephole adds 3e2b42489f8 Remove RefSCC::handleTrivialEdgeInsertion adds 854b861881a [llvm/Orc] Fix ExecutionEngine module build breakage adds 979c38cc74f [compiler-rt] [windows] Add UNUSED attributes on variables/ [...] adds 3c1d015edc7 [GlobalISel][TableGen] Fix ConstrainOperandRC bug adds 2654f33c47f [VE] Support llvm.eh.sjlj.lsda adds 1d4411e9ea0 [RISCV] Add vector integer min/max ISel patterns adds 6725860d21a Sema::BuildCallExpr - use cast<> instead of dyn_cast<> for [...] adds 52e448974b2 SystemZTargetLowering::lowerDYNAMIC_STACKALLOC - use cast<> [...] adds 84d5768d976 MemProfiler::insertDynamicShadowAtFunctionEntry - use cast< [...] adds 02eb8e20b51 Inform the consumer on invalid template instantiations. adds 53a341a61d1 [VE][NFC] Fix typo in comments adds 9ad83fd6dc4 [WebAssembly] call_indirect causes indirect function table import adds 914066fe38a [DebugInfo] Avoid LSR crash on large integer inputs adds 7a97eeb197a [Coroutines] checkAsyncFuncPointer - use cast<> instead of [...] adds a000366d050 [SimplifyIndVar] createWideIV - make WideIVInfo arg a const [...] adds 38c6933dcc9 [LV] Simplify lambda in all_of to directly return hasVF() r [...] adds eba6deab22b [SVE] Lower vector CTLZ, CTPOP and CTTZ operations. adds 313d982df65 [IR] Add ConstantInt::getBool helpers to wrap getTrue/getFalse. adds f784be0777f [VE] Support SJLJ exception related instructions adds 0e4d2361b81 [OpenCL] Warn about side effects for unevaluated vec_step arg adds 2f8d1e9eb27 [clangd] When querying drivers by binary, look in PATH too adds 4e6054a86c0 [AMDGPU] Split out new helper function macToMad in SIFoldOp [...] adds 639a50e2f13 [AMDGPU] Precommit test case for D94010 adds 3914bebe91f [AMDGPU] Handle v_fmac_legacy_f32 in SIFoldOperands adds 9a1ac97d3af [CodeGen] Format SelectionDAG::getConstant methods (NFC) adds 489000d8516 [VE] Change clang to support SjLj Lowering adds dc74d7ed1f6 [X86] getMemoryOpCost - use dyn_cast_or_null<StoreInst>. NFCI. adds 6f770292a00 [OpenCL] Restrict pointer to member functions. adds 89ae5b5b6a4 [mlir] Add canonicalization pattern out_tensor->linalg->dim [...] adds c3a21e5de3d [ASTMatchers] Ensure that we can match inside lambdas adds c3403dc63d7 [ASTMatchers] Fix build when no targets are enabled adds 73a44f437bf [X86][AVX] combineVectorSignBitsTruncation - use PACKSS/PAC [...] adds 8a47e6252ad [VPlan] Re-add interleave group members to plan. adds c0055189367 [LoopNest] Allow empty basic blocks without loops adds 3d5b18a3fdf [clang][AArch64][SVE] Avoid going through memory for coerce [...] adds 7e4f53f748d [ASTMatchers] Fix traversal matchers with explicit and defa [...] adds fec1a442e3b [-Wcalled-once-parameter] Introduce 'called_once' attribute adds c73ae747cb0 [AArch64][SVE] Add optimization to remove redundant ptest i [...] adds bf09e25e1e9 [gn build] Port fec1a442e3b adds 53c3acb89fc [clang-tidy] Add extra tests adds 9f2967bcfe2 [Coverage] Add support for Branch Coverage in LLVM Source-B [...] adds 51d5991f04d [Clang] Add AArch64 VCMLA LANE variants. adds f26bc0ddd50 [RegisterClassInfo] Return non-zero for RC without allocatable reg adds c69c9e0f0fd [mlir] Remove LLVMType, LLVM dialect types now derive Type [...] adds 9eb2284f603 [clang-tidy] Update uses of deprecated Transformer APIs in [...] adds 60466fad2dc [AMDGPU] Remove deprecated V_MUL_LO_I32 from GFX10 adds 55488bd3cd1 CGExpr - EmitMatrixSubscriptExpr - fix getAs<> null-derefer [...] adds 0c59a4da59a [ARM][AArch64] Some extra test to show anyextend lowering. NFC adds f22c0f40b5d [ASTMatchers] Omit methods from explicit template instantations adds 30dcbb2a830 [mlir][Linalg] Add a test case that consumer has "reduction [...] adds c82beaba319 [lldb] Add timers to Reproducer::Keep and Reproducer::Discard adds 675a2973ee7 [libTooling] Add support for smart pointers to relevant Tra [...] adds a427f15d607 GlobalISel: Add isKnownToBeAPowerOfTwo helper function adds 761aca1e2e3 [llvm-link] fix linker behavior when linking archives with [...] adds c707716c049 [RISCV] Match vmslt(u).vx intrinsics with a small immediate [...] adds 3b8b2c7da2e [SLP] delete unused pairwise reduction option adds 249d7de1190 [RISCV] Don't print zext.b alias. adds 7afd5cfbc75 [NFC] Fix -Wrange-loop-analysis warnings. adds 601636de980 [LoopNest] Allow empty basic blocks without loops adds 86d68e28858 [mlir] Gen removeAttr methods with tablegen adds 210bc3dc0eb [RISCV] Don't parse 'vmsltu.vi v0, v1, 0' as 'vmsleu.vi v0, [...] adds 28a326eba0a [NFC] Rename registerAliasAnalyses -> registerDefaultAliasAnalyses adds f111cf992df [clang][cli] Specify correct integer width for -fbuild-sess [...] adds 497026c9023 [WebAssembly] Prototype prefetch instructions adds 16f3401eae4 [Coverage] Fix test failures from commit rG9f2967bcfe2f adds 7b5a0e2f88e [RISCV] Move shift ComplexPatterns and custom isel to PatFr [...] adds f88a7975210 [LoopDeletion] Allows deletion of possibly infinite side-ef [...] adds 314ccc00139 [LoopNest] Remove unused include. adds ee11bf316f6 [Hexagon] Silence unused function warning with gcc10, NFC adds d4a999b453a [SLP] reduce code duplication; NFC adds 5a1d31a2849 [SLP] use reduction kind's opcode for cost model queries; NFC adds 4ef91f5871a [DAGCombiner] Don't speculatively create an all ones consta [...] adds 65cd3cbb3fc [Inliner] Compute the full cost for the cost benefit analsysis adds 21689421171 [Coverage] Fix Profile test failures from commit rG9f2967bcfe2f adds 1f8031cd748 [android] Fix some tests for AOSP-master devices. adds a9543469d54 [NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel adds 90b8fd61360 scudo: Fix compilation for non-Linux aarch64 adds 8cf1cc578d3 [FuncAttrs] Infer noreturn adds 16c6e9c58e9 [ASTMatchers] Fix child traversal over range-for loops adds bec987ea672 [NFC] Removed unused prefixes in CodeGen/AMDGPU adds 1ebe86adf52 [NFC] Removed unused prefixes in test/CodeGen/AMDGPU adds 6a03f8ab629 [SLP] reduce code for finding reduction costs; NFC adds cb5b52a06ee AMDGPU: Annotate amdgpu.noclobber for global loads only adds f98535686e3 [SimplifyCFG] simplifyUnreachable(): switch to non-permissi [...] adds 3460719f583 [NFC][SimplifyCFG] Add a test with same-destination condidi [...] adds 29ca7d5a1ad [SimplifyCFG] simplifyUnreachable(): fix handling of degene [...] adds fc96cb2dad6 [SimplifyCFG] FoldValueComparisonIntoPredecessors(): switch [...] adds d15d81ce15e [SimplifyCFG] FoldValueComparisonIntoPredecessors(): deal w [...] adds fa5447aa3fe [NFC][SimplifyCFG] SwitchToLookupTable(): pull out SI->getP [...] adds 2b437fcd479 [SimplifyCFG] SwitchToLookupTable(): switch to non-permissi [...] adds 0a87e53fc40 [NFC][SimplifyCFG] Add a test where SimplifyEqualityCompari [...] adds a14945c1db6 [SimplifyCFG] SimplifyEqualityComparisonWithOnlyPredecessor [...] adds 8b124c19f52 [mlir][sparse] adjust output shape inference to new tensor [...] adds b12e4735317 Allow dependent alias template specializations in the prefe [...] adds cbda2cba4f8 [mlir] Fully specify removeAttr return type adds dec02904d26 [libomptarget] Allow calls to omp_target_memcpy with 0 size. adds b7718b61755 Reland D93848 "[sanitizer] Define SANITIZER_GLIBC to refine [...] adds ad18b075fd6 DebugInfo: Add support for always using ranges (rather than [...] adds a39b19821b6 Make DWARFUnit use the dwo_id from the DWARF5 CU header. adds 8b0bd54d0ec [sanitizer][Darwin] Suppress -Wno-non-virtual-dtor warning adds f4bcbdf9cea Suppress GCC Wdangling-else warning on gtest macros adds 74f93bc373d [Sema] Fix deleted function problem in implicitly movable test adds 4ae7952e2b3 [mlir] Fix MathJax rendering in Affine doc adds 4a8e6ed2f79 [SLP,LV] Use poison constant vector for shufflevector/initi [...] adds 8444a2494d3 [X86] Update X86InstCombineIntrinsic to use CreateShuffleVe [...] adds 29f8628d1fc [Constant] Add containsPoisonElement adds 91f17ba24e8 [mlir] Print the correct tool name in mlirTranslateMain adds cdfd4c5c1a9 [NFC] Removed unused prefixes in test/CodeGen/AMDGPU adds aed84542d5a ELF: Teach the linker about the 'B' augmentation string character. adds 6dc3c117a30 scudo: Update a comment to match the Linux kernel behavior. NFCI. adds a032a4e7998 [-Wcalled-once-parameter][NFC] Fix operator precedence warning adds c1cd42d6984 [NFC] Removed unused prefixes in CodeGen/AMDGPU adds d68458bd56d [GlobalISel] Base implementation for sret demotion. adds 441650d5893 [tools] Use llvm::append_range (NFC) adds cea1c63756f [MachineSink] Construct SmallVector with iterator ranges (NFC) adds cd088ba7e61 [llvm] Use llvm::lower_bound and llvm::upper_bound (NFC) adds 993d8ac5cb9 [libc] Add implementations of nearbyint[f|l]. adds 7f7b0dc4e15 [libc] Add implementations of nextafter[f|l] functions. adds 4909cb1a0fe [OpenMP][AMDGPU] Use AMDGPU_KERNEL calling convention for e [...] adds 979228f120f [clangd][fuzzyFind] Do not show stale symbols in the result. adds e130dea92a8 [RISCV] Add vector integer mul/mulh/div/rem ISel patterns adds 30d314aae10 [MC][WebAssembly] Avoid recalculating indexes in -gsplit-dw [...] adds a9f5e4375b3 [AArch64] Use faddp to implement fadd reductions. adds a7e3339f3b0 [AArch64][SVE] Emit DWARF location expression for SVE stack [...] adds 78d8a821e23 [AArch64] Handle any extend whilst lowering mull adds e49dc2981cb [flang][driver] Add checks for errors from `Prescan` and `Parse` adds 4839378ca05 Revert "[sanitizer] Define SANITIZER_GLIBC to refine SANITI [...] adds a9b6440eddd [AArch64] Handle any extend whilst lowering addw/addl/subw/subl adds fa1e543e0b8 [flang][driver] Update error messages (nfc) adds e4cda13d5a5 Fix test failure in a7e3339f3b0eb71e43d44e6f59cc8db6a7b110bf adds f73c09caa2a [VPlan] Use public VPValue constructor in VPPRedInstPHIReci [...] adds ddb82fc76ce [ARM] Handle any extend whilst lowering mull adds 351a45ca73d [RISCV][NFC] Add new test cases for mul adds 74438eff511 [mlir] Use thread_local stack in LLVM dialect type parsing [...] adds 0ce5f402e01 [VPlan] Add getLiveInIRValue accessor to VPValue. adds 63dce70b794 [ARM] Handle any extend whilst lowering addw/addl/subw/subl adds 84a1120943a [LiveDebugValues] Handle spill locations with a fixed and s [...] adds 6e6e24bb09c [ValueTypes] Fix formatting on scalable vector warning (NFC) adds aa280c99f70 [AArch64][SVE] Emit DWARF location expr for SVE (dbg.declare) adds 816dba48af4 [VPlan] Keep start value in VPWidenIntOrFpInductionRecipe (NFC). adds cb0c034edc9 [PowerPC] Fix issue where vsrq is given incorrect shift vector adds dfcb872c3e8 [X86] Add scalar/vector test coverage for D93599 adds 223a6f94c59 [libc] remove modulo from CircularArrayRef iterator adds aa9db51ef69 [libc] Align src buffer instead of dst buffer adds 643e3c90761 [AArch64] Add BRB IALL and BRB INJ instructions adds ce8c59e6af4 Reapply multiple "[clang][cli]" patches adds 37ac4f865fb [Hexagon] Regenerate zext-v4i1.ll tests adds 29d375f5ff2 [OpenCL][NFC] Improve OpenCL test file naming adds 396dd6cd3d8 [ProfileData] Pass Twine by const reference instead of by value. adds df5c2caf0fc [MIPS] MipsAsmParser - Pass Twine by const reference instea [...] adds 26c486c2eb1 [TableGen] RegisterBankEmitter - Pass Twine by const refere [...] adds f60e0a91fbd [MLIR][SPIRV] Add `UnsignedOp` trait. adds 4e0e79dd349 [lldb] Simplify some lldb-server tests adds 494db3816b0 [LoopDeletion] Also consider loops with subloops for deletion. adds 0c41b1c9f93 [Driver][MachineOutliner] Support outlining option with LTO adds 3fa6cedb6be Fix MaterializeTemporaryExpr's type when its an incomplete array. adds 25c78de6d2a [mlir][spirv] Update pass docs adds 46975b5b29e [Hexagon] Wrap functions only used in asserts in ifndef NDEBUG adds b69fe6a85db [X86] Add icmp ne/eq (srl (ctlz x), log2(bw)) test coverage. adds 500864f928c Remove some unused <vector> includes. NFCI. adds 350247a93c0 [AArch64] Rearrange mul(dup(sext/zext)) to mul(sext/zext(dup)) adds 1307e3f6c46 [TargetLowering] Add icmp ne/eq (srl (ctlz x), log2(bw)) ve [...] adds 7809fa20400 [flang][driver] Add support for `-D`, `-U` adds 136f4989195 AMDGPU: Explicitly use SelectionDAG in legacy intrinsic tests adds 0a3cf7f4762 AMDGPU/GlobalISel: Add baseline IR tests for fdiv adds dfd3384feec [InstCombine] Update valueCoversEntireFragment to use TypeSize adds 3e357ecd44a [llvm][NFC] Disallow all warnings in TypeSize tests adds ab3a3f543b1 AMDGPU/GlobalISel: Update fdiv lowering for denormal/ulp in [...] adds b4706309130 [NFC] Removed unused prefixes from CodeGen/AMDGPU adds 2b638ed5a12 [mlir] NFC: fix trivial typos fix typos under docs, test, a [...] adds bd166c813c5 Nit: fix spacing adds 6173d1277be Remove allow-unregistered-dialect from some tests that don' [...] adds 08e5e91e45a [X86] Remove [ER]SP from all CSR lists adds 7ef9139a391 [Clang] Remove unnecessary Attr.isArgIdent checks. adds 3f8c2520c04 [X86] Add commuted patterns test coverage for D93599 adds 90347ab96f2 [NFC] Removed unused prefixes in CodeGen/AMDGPU adds 1ca5e68aa07 [NVPTX] Fix debugging information being added to NVPTX targ [...] adds 7afdc89c205 [sanitizer] Define SANITIZER_GLIBC to refine SANITIZER_LINU [...] adds 7916fd71e94 [lld-macho] Fix GCC -Wunused-variable in -DLLVM_ENABLE_ASSE [...] adds 322e98bc279 [flang][openacc] Add more parsing/sema tests for init and s [...] adds 7fea561eb1c [CGSCC][Coroutine][NewPM] Properly support function splitti [...] adds 5d24089a700 [SLP] reduce code for propagating flags on reductions; NFC adds 4c022b5a41d [SLP] use reduction kind's opcode to create new instructions; NFC adds 8f9da24fa7f [GVN] Regenerate test checks (NFC) adds a6df39236fd [InstSimplify] Fold out-of-bounds shift to poison adds 54c01057b68 Fix non-assert builds after D93828 adds a515342de9c [test] Pin AMDGPU/opt-pipeline.ll to legacy PM adds c68faed041e [RISCV] Return a vXi1 vector type from getSetCCResultType i [...] adds 47fba9e1eae [test] Pin partial-unswitch.ll to legacy PM adds 0bfe1001456 [NFC] Test case refactor adds 7d48eff8ba1 [PowerPC] Avoid call to undef in test (NFC) adds d042f2db5bf [InstSimplify] Fold call null/undef to poison adds 221c3b174b1 [InstSimplify] Canonicalize non-demanded shuffle op to pois [...] adds badc7606b0f [mlir] Remove a number of methods from mlir::OpState that j [...] adds 4fde2b6a0c0 [OpenCL] Add clang extension for function pointers. adds 0e874fc014b [OpenCL] Add clang extension for variadic functions. adds f6f6f6375d1 [BasicAA] Fix BatchAA results for phi-phi assumptions adds 90bf3ecef4b [clang-offload-bundler] Add option -list adds f9190c86813 [mlir][vector] Support unrolling for transfer ops using tensors adds 2a29ce30345 [hip] Fix HIP version parsing. adds e2a623094f6 [OpenMP] Fixed the test environment when building along with LLVM adds 5acdae1f9a7 [OpenMP] Fixed an issue that wrong LLVM headers might be in [...] adds 4726bec8f29 [libc] Add implementation of fmaf. adds e0a93e4b65b [mlir][ODS] Rename several uses of 'description' to 'summary' adds c42cee0c64f [mlir][ODS] Fix the use of cppClassName in Type constraints [...] adds efd05040e13 [mlir] Add hoisting transformation for transfer ops on tensor adds fb1c5285269 [OpenMP] Use c_int/c_size_t in Fortran target memory routin [...] adds 63aeaf754a7 [DominatorTree] Add support for mixed pre/post CFG views. adds a1265690cf6 Fix failing triple test for macOS 11 with non-zero minor versions. adds 41d919aa294 [mlir][TypeDefGen] Remove the need to define parser/printer [...] adds f9e858f5fd7 [libc] Use a wrapper for rand instead of calling std::rand [...] adds 080943f7525 [mlir][vector] Support transfer op on tensor optimizations adds b37de2afa30 [Support] Untie the llvm::Signpost interface from llvm::Timer adds 6d94eeadd28 [lldb] Ad os_signpost support to lldb_private::Timer adds 781c476ce09 [libc++] ADL-proof vector<bool> by adding _VSTD:: qualifica [...] adds 4bdab548266 [PPC] Remove old PPCSubTarget variable. adds 8deaec122ec [analyzer] Update Fuchsia checker to catch releasing unowne [...] adds 8871a4b4cab [Constant] Update ConstantVector::get to return poison if a [...] adds d853bd7a4e8 [lldb/Lua] add support for multiline scripted breakpoints adds 7a8ced43d7e [RISCV] Fix a few section number comments in RISCVInstrInfo [...] adds 37e83bc6db3 [NFC] Move readAPValue/writeAPValue up the inheritance hierarchy adds c95f39891a2 [Constant] Add tests for ConstantVector::get (NFC) adds 3a60a1f1657 [InstSimplify] Fold insertelement vec, poison, idx into vec adds b9bfe8a7530 [lldb] [debugserver] Add stN aliases for stmmN for compatibility adds fbc13e9345c [lldb] Skip scoped enum checks with Dwarf <4 adds 1d0bc055515 [llvm] Use llvm::append_range (NFC) adds 9b228f107d4 [llvm] Use BasicBlock::phis() (NFC) adds cfeecdf7b6d [llvm] Use llvm::all_of (NFC) adds 3505d8dc074 [clangd][NFC] Use PathRef for getCorrespondingHeaderOrSource adds a855c9403fb [NFC] Don't copy MachineFrameInfo on each invocation of HasAlias adds 25bf4a8f428 [debuginfo-test] Fix -Wunused-value adds 25f23a60398 [AsmPrinter] Make OpAsmPrinter::printFunctionalType be resi [...] adds 7510c1152f0 Update for review feedback: Inline var declaration and expa [...] adds 01a2508aa58 [PowerPC] Delete remnant isOSDarwin references adds bfa6ca07a8c [PowerPC] Delete remnant Darwin ISelLowering code adds 022cc6e3434 [PowerPC] Delete dead Lower* adds 3bfc9bb8ef2 [VE][NFC] Update comments to match the generated instructions adds dbfc1ac4d86 [X86] Update tests for znver3 adds 238dbeb1e7b [mlir][ODS] Fix missed rename of TypeParameter 'description [...] adds 7ddbe0cb905 [LV] Merge tests into a single file (NFC) adds 248e3450fb8 [LLD] [MinGW] Pass the --demangle and --no-demangle options [...] adds f4485240a21 [libcxx] Handle backslash as path separator on windows adds c3529a5b080 [mlir] Mark methods from mlir::OpState that just forward to [...] adds d2ddc694ff9 Revert "Revert "[analyzer] NFC: Move path diagnostic consum [...] adds 5471b1fa401 [gn build] Port d2ddc694ff9 adds 77db83ae997 [clang][cli] Allow users to specify a conditional to preven [...] adds c6ea4d5b2c0 [clang][cli] Implement ContainsN Google Test matcher adds d0fa7a05be9 Revert "[clang][cli] Allow users to specify a conditional t [...] adds 76f6b125cef Revert "[llvm] Use BasicBlock::phis() (NFC)" adds c9154e8fa37 [RISCV] Add vector mask arithmetic ISel patterns adds 67a4c672b02 Reapply "[clang][cli] Allow users to specify a conditional [...] adds 0877b963ef2 [clang][ASTImporter] Fix a possible assertion failure `Need [...] adds 801c7866e6d [lldb][ARM/AArch64] Update disasm flags to latest v8.7a ISA adds a828fb463ed [clang][cli] Port a CommaJoined option to the marshalling i [...] adds e5cdb6c56ed [flang][driver] Add support for `-c` and `-emit-obj` adds b6ba5983079 [clang][cli] Port getAllArgumentValues to the marshalling i [...] adds b6fb0209b6d [libc++] [CI] Install Tip-of-Trunk clang. adds 33f90f38e11 [clang][cli] Report the actual argument parsing result adds 350ab7aa1c6 [DAG] Simplify OR(X,SHL(Y,BW/2)) eq/ne 0/-1 'all/any-of' st [...] adds 7da3e3a8983 [libcxx] Mark a test as unsupported for C++03 adds 044b892c79b [libc++] Use c++20 instead of c++2a consistently. adds 10164a2e50b [mlir] Refactor translation of OpenMP dialect ops to LLVM IR adds 213329d7c64 [clangd] Add server capability advertising hot-reloading of CDBs. adds 4284afdf943 [SLP]Need shrink the load vector after reordering. adds 236129fb446 [CompilationDatabase] Pass Twine by const reference instead [...] adds 028091195d7 [DWARF] DWARFDebugLoc::dumpRawEntry - remove dead stores. NFCI. adds a9a8caf2ce2 [llvm-objdump] Pass Twine by const reference instead of by [...] adds c1d58c2b002 [mlir] Add fastmath flags support to some LLVM dialect ops adds e72cdc5ba1e [clang][cli] NFC: Ensure non-null DiagnosticsEngine in Pars [...] adds 75d63630ebb [clang][cli] NFC: Move parseSimpleArgs adds a7cbc32a916 [mlir] remove a use of deprecated OpState::setAttr adds fcd1e35e4cc [clang][cli] NFC: Make parsing macro reusable adds 01c190e907c [AArch64][CostModel]Fix gather scatter cost model adds a2957f80f87 [flang][driver] Rename driver tests (nfc) adds fa6d8977999 [Analysis] MemoryDepChecker::couldPreventStoreLoadForward - [...] adds 037b058e419 [AArch64] SVEIntrinsicOpts - use range loop and cast<> inst [...] adds b73736a4048 [flang][openacc] Enforce delcare directive restriction adds aa7968a87b6 [TableGen] Add field kind to the RecordVal class. adds 048f184ee48 [SplitEdge] Add new parameter to SplitEdge to name the newl [...] adds 8dee0b4bd63 [llvm-reduce] ReduceGlobalVarInitializers delta pass: fix h [...] adds 6be1fd6b20f [SimplifyCFG] FoldValueComparisonIntoPredecessors(): drop r [...] adds ebfe4de2c04 [DDG] Fix duplicate edge removal during pi-block formation adds 6b7d5a928f5 AMDGPU/GlobalISel: Start cleaning up calling convention lowering adds 573d5782482 [DDG] Data Dependence Graph - DOT printer tests adds f4013359b3d [SVE] Add unpacked scalable floating point ZIP/UZP/TRN patterns adds e881a25f1e1 [NFC] Removed unused prefixes in CodeGen/AMDGPU adds db33f85c712 [IR] Use LLVM_ENABLE_ABI_BREAKING_CHECKS to guard ABI changes. adds 82f5ee3c3e6 Adds argument attributes for using LLVM's sret and byval at [...] adds 59fce6b0661 [NFC] make clang/test/CodeGen/arm_neon_intrinsics.c resiste [...] adds f88fab50068 [mlir] NFC: fix trivial typos adds acbb3652931 [AST][NFC] Silence GCC warning about multiline comments adds 43043adcfbc Add element-type to the Vector TypeLoc types. adds ebcc8dcb68a [Coverage] Refactor three tests from commit rG9f2967bcfe2f adds bd78f4e9321 [mlir] revert 82f5ee3c3e601daad5 adds 41e31eac14c Fix GCC5 build, require explicit this->... in this call ins [...] adds ee57d30f448 [NFC] Removed unused prefixes from CodeGen/AMDGPU adds d0154456e61 Silence warning: comparison of integers of different signs: [...] adds cf5415c727d [PGO][PGSO] Let unroll hints take precedence over PGSO. adds c9122ddef52 CodeGen: Refactor regallocator command line and target selection adds 5c38ae36c58 [WebAssembly] Fixed byval args missing DWARF DW_AT_LOCATION adds 2230bf99c71 [mlir] replace LLVMIntegerType with built-in integer type adds 906efeec0a4 [mlir] don't match the text produced only in debug mode in [...] adds 4c7148d75cd [SLP] remove opcode identifier for reduction; NFC adds ad55d5c3f32 Simplify vectorcall argument classification of HVAs, NFC adds 6a87e9b08bf [NFC][AMDGPU] Reduce include files dependency. adds abb174bbc10 [OpenMP] Add example in Libomptarget Information docs adds 467e916d303 Fix gcc5 build failure (NFC) adds 3854b81b0fd [Clang][Driver] Fix read-after-free when using /clang: adds 9ae171bcd38 [OpenMP][Docs] Add remarks intro section adds d970a285b85 [OpenMP][Fix] Make the arch selector for x86_64 work adds 36c4dc9b42f [OpenMP][FIX] Ensure the isa trait is evaluated last adds 275f30df8ad [clang] Change builtin object size when subobject is invalid adds 6e7101530da [OpenMP][Docs] Mark finished features as done adds ce7f30b2a87 [llvm-pdbutil] Don't crash when printing unknown CodeView t [...] adds 70b841ac317 [mlir] Adds argument attributes for using LLVM's sret and b [...] adds 0b0f2e6ee0c [OpenMP][FIX] Avoid string literal comparison, use `StringR [...] adds 476db17dcb6 Fix include path for check-gdb-mlir-support to include the [...] adds 9e1aaa9943b Fix check-gdb-mlir-support build after MLIR API changed to [...] adds 1f9b6ef91ff GlobalISel: Add combine for G_UREM by power of 2 adds 63b42a05145 [NFC] clang/test/openMP/target_codegen.cpp should not depen [...] adds 85f86e8a3cf [libc++abi] Simplify __gxx_personality_v0 adds d002cd4e0f1 [test] Move coro-retcon-unreachable.ll into llvm/test adds 1a2eaebc09c [CoroSplit][NewPM] Don't call LazyCallGraph functions to sp [...] adds 3503c856819 Fixup Asserts+!AbiBreakingChecks fallout from db33f85c7124 adds 973c35d3384 [TableGen] Make CodeGenDAGPatterns::getSDNodeNamed take a S [...] adds eaadb41db62 [LLD][COFF] When using PCH.OBJ, ensure func_id records indi [...] adds 274afac9a17 lldb: Add support for DW_AT_ranges on DW_TAG_subprograms adds c01202a7efd [libc++] Fix typo in run-buildbot adds 2cbbc6e87c4 GlobalISel: Fail legalization on narrowing extload below me [...] adds f78d6af7319 [hip] Enable HIP compilation with `<complex`> on MSVC. adds 2ce16810f28 [OpenMP] Always print error messages in libomptarget CUDA plugin adds 15f59711506 [LLDB][RISCV] Add RISC-V ArchSpec and rv32/rv64 variant detection adds b2dafd44ca7 [NewPM][Hexagon] Fix HexagonVectorLoopCarriedReusePass posi [...] adds ff1b6f9ff27 [libc++] Alphabetize generate_feature_test_macro_components [...] adds 9ccf13c36d1 [NewPM][NVPTX] Port NVPTX opt passes adds 087be536fea [NFC][SimplifyCFG] Add a test with cond br on constant w/ i [...] adds 16ab8e5f6db [SimplifyCFG] ConstantFoldTerminator(): handle matching des [...] adds 36593a30a40 [SimplifyCFG] ConstantFoldTerminator(): switch to non-permi [...] adds 8b9a0e6f7ed [NFC][SimlifyCFG] Add some indirectbr-of-blockaddress tests adds b3822728fae [SimplifyCFG] ConstantFoldTerminator(): switch to non-permi [...] adds 1f9b591ee66 [SimplifyCFG] TryToSimplifyUncondBranchFromEmptyBlock(): sw [...] adds f8875c313c3 [NFC][SimplifyCFG] Add test with an unreachable block with [...] adds 7600d7c7be0 [SimplifyCFG] removeUnreachableBlocks(): switch to non-perm [...] adds 6984781df9b [NFC][SimplifyCFG] Add a test with an undef cond branch to [...] adds 05adc73db05 [SimplifyCFG] changeToUnreachable(): switch to non-permissi [...] adds 66189212bbb [SimplifyCFG] MergeBlockIntoPredecessor(): switch to non-pe [...] adds be0a31d13bc [SimplifyCFG] DeleteDeadBlocks(): switch to non-permissive [...] adds f0eba8ce2d4 [SimplifyCFG] changeToCall(): switch to non-permissive DomT [...] adds d59f97bb3a6 [SimplifyCFG] removeUnwindEdge(): switch to non-permissive [...] adds f2f81c554b0 [SimplifyCFG] markAliveBlocks(): switch to non-permissive D [...] adds 946bc50e4cb [RISCV] Define the vfsqrt RVV intrinsics adds 6acfc3a7821 Fix build after eaadb41db6233cf1c9e882d74a31c1f9d6e211ff wh [...] adds 8dddcc762dd [Cloning] Copy metadata of global declarations adds 48baa7f5b11 [clang] Add powerpc64le-none-linux-gnu to gnu toolchain for PPC64 adds 658a1be76ba [builtins] Add COMPILER_RT_BUILTINS_HIDE_SYMBOLS adds b12f26733a4 Revert "Revert "Revert "[analyzer] NFC: Move path diagnosti [...] adds ab814896dc8 [gn build] Port b12f26733a4 adds 2759041786e [gn build] (manually) merge a whole bunch of libc++ header files adds f02e61a8b95 Fix MLIR DRR matching when attributes are interleaved with [...] adds b14ad90b137 [LLD][COFF] Simplify function. NFC. adds 696775d96ec Fix subprogram_ranges.test by explicitly using lld adds 4a3c2ba8904 Fix print-dot-ddg.ll so it doesn't try to write to the sour [...] adds 2ff36e79291 lldb subprogram_ranges.test - remove dependence on temp file name adds 6b0ee02747e Revert "Revert "Revert "Revert "[analyzer] NFC: Move path d [...] adds 495b301de6e [gn build] Port 6b0ee02747e adds 8febb2e0f56 [CodeGen] Remove unused function isCallerPreservedOrConstPh [...] adds 33bf1cad759 [llvm] Use *Set::contains (NFC) adds b934160aaa3 [Target] Use llvm::find_if (NFC) adds f2e05855deb [lldb] Access the ModuleList through iterators where possib [...] adds 57e0cd35628 [lldb] Make DoReadMemory a protected method. adds ae25a397e9d AMDGPU/GlobalISel: Enable sret demotion adds 0ebc1fb29f2 [CMake] Don't enable BUILD_WITH_INSTALL_RPATH when using cu [...] adds 69cf7350628 [NewPM] Don't error when there's an unrecognized pass name adds c102b9697bd [X86] Correct the comments about comparison intrinsics. NFCI. adds 7a91dad9e5f [llvm-readobj] [ARMWinEH] Clearly print an invalid case of [...] adds d1bf26fd943 [AArch64][SVE] Add lowering for llvm abs intrinsic adds 8af859d514f [MachineLoop] New helper isLoopInvariant() adds 8e3230ffa3a [clang][cli] Port DiagnosticOpts to new option parsing system adds 12167632bc5 [VE] Add SVOB intrinsic instruction adds 72fb5ba0790 [LV] Don't sink into replication regions adds 8e3e148c888 Revert "[clang][cli] Port DiagnosticOpts to new option pars [...] adds 6175fcf01f1 [NFC] Update some PPC tests marked as auto-generated adds 2fe625e9abd Fix two pessimizing moves. adds d1b606f897b [VE] Extract & insert vector element isel adds eeba70a463c [VE] Expand single-element BUILD_VECTOR to INSERT_VECTOR_ELT adds 1e7efd397ac [LV] Legalize scalable VF hints adds 38d18d93534 [SVE] Add support to vectorize_width loop pragma for scalab [...] adds ed23229a64a [AArch64] Fix crash caused by invalid vector element type adds b83b7d08730 [clangd] NFC, avoid potential ODR violation. adds c909512fdb9 [clangd] Cleanup a remaining Optional<SymbolID> usage, NFC. adds 99c84af1a25 [VE][NFC] Clean ISel patterns for LSV and LVS adds 00530dee5d1 [compiler-rt] Implement __atomic_is_lock_free adds 32733c347d7 [libc++] Add missing XFAIL to tests that need __atomic_* libcalls adds ed3b1f90611 [clangd] go-to-implementation on a base class jumps to all [...] adds 267ff7901c7 [SLP] limit verifyFunction to debug build (PR48689) adds 9c4b2225b24 Revert "Revert "Revert "Revert "Revert "[analyzer] NFC: Mov [...] adds af7cce2fa4d [AArch64] Add +pauth archictecture option, allowing the v8. [...] adds 7d4a8bc417b [AArch64] Add +flagm archictecture option, allowing the v8. [...] adds 195ffcd890f [MLIR][NFC] remove unnecessary includes form tablegen command adds b0dc54e08a9 [lldb][NFC] Refactor setup code for Clang diagnostics adds 611d3c63f32 [VP] ISD helper functions [VE] isel for vp_add, vp_and adds 657db0c6d41 [gn build] Port 9c4b2225b24 adds bcbdeafa9cb Revert "[SLP]Need shrink the load vector after reordering." adds 0ef2b68ff06 [OpenCL] Documentation for experimental C++ libs adds d012430eee7 [WebAssembly] Change label numbers to variables in test adds 5ead757f1d8 [VE] Support pack_f32p and pack_f32a intrinsic instructions adds 25d882e758c [MLIR][SPIRV] Add `UsableInSpecConstantOp` trait. adds 7b9f541c1ed [X86][SSE] Add tests for unpack(hop(),hop()) adds e97071d7952 [NFC] Renaming PackStack to AlignPackStack adds 0e57084d0ef [SLP][NFC]Add a test for reused shrink check, NFC. adds 4a582d766ae [X86][SSE] Add vphaddd/vphsubd unpack(hop(),hop()) tests adds 268ff38a716 [MLIR][OpenMP] Attribute to include WsLoop upperbound adds 6e2b6351d2c [TableGen] Add the assert statement, step 1 adds 1ae762469fd [ARM] Update and regenerate test checks. NFC adds 7be271537e9 [WebAssembly] Rename wasm_rethrow_in_catch intrinsic/builtin adds d4f2fef7464 [TableGen] Remove unused declaration that caused build failures. adds 84dc9b451bf [mlir:JitRunner] Use custom shared library init/destroy fun [...] adds a36a2864c0d [ARM][LV] Additional loop invariant reduction test. NFC adds 80dee7965df [X86][SSE] Fold unpack(hop(),hop()) -> permute(hop()) adds 740950cf1cd Revert "[mlir:JitRunner] Use custom shared library init/des [...] adds d4af86581e8 [clangd] Fix type printing in the presence of qualifiers adds e185b1dd7b3 [ConstProp] Constant propagation for get.active.lane.mask i [...] adds 2e1bb7940a4 [clangd] Add missing "override" to fix the build. adds dd5165a920f [mlir] replace LLVM dialect float types with built-ins adds 466df1718e4 [libc++] Update generate_feature_test_macro_components.py t [...] adds cb6d53ccdc7 [lldb] Bump the required SWIG version to 3 adds 9386483b714 [X86] Add TLBSYNC, INVLPGB and SNP instructions adds c493e9216bd [VPlan] Move reduction start value creation to widenPHIRecipe. adds 913c430403b Revert "[CMake] Don't enable BUILD_WITH_INSTALL_RPATH when [...] adds 95729f95d80 [libc++] Add basic support for -std=c++2b. adds 955dd7b7f3f [libc++] LWG2070: Use Allocator construction for objects cr [...] adds 311b247c9fb [lldb] Remove stale LLDB-Info.plist adds ae0d1d2e5cd [flang] Fix bogus message on internal subprogram with alter [...] adds 024af42c601 [ARM] Custom lower i1 vector truncates adds fe50b7363a1 [TableGen] Fix use of *CurRec when CurRec is null. adds d9ce31ae7d1 Re-land "[CMake] Don't enable BUILD_WITH_INSTALL_RPATH when [...] adds ec13f6c3e56 [mlir][Linalg] Add verification checks to disallow illegal [...] adds bf401256edd [Signal] Re-raise SIGPIPE if the handler is uninstalled adds 840a2c97837 [CMake] Fix incorrect rpath for tests if LLVM_LOCAL_RPATH i [...] adds 0875a9da2a3 [RISCV] Cleanup a few section comments in RISCVInstrInfoVPs [...] adds a8bda3df425 [NFC] Disallow unused prefixes in CodeGen/AMDGPU adds fa8c397dfa2 [mlir][Linalg] NFC: Refactor fusion of LinalgOp with Tensor [...] adds 8e36d21fabc [clangd] Add go-to-def metric. adds 0386f3d4f41 [NFC] Specify C11 in loop-opt-setup.c adds e45840f4af4 [mlir][PDL] Use ODS for defining PDL types adds 16fdc5da890 APINotes: annotate dump methods (NFC) adds ffac9001d98 [compiler-rt] [sanitizer] Silence -Wframe-larger-than= for [...] adds 0e23fd676c3 [Driver] Add DWARF64 flag: -gdwarf64 adds 1fc986427ba [mlir:JitRunner] Use custom shared library init/destroy fun [...] adds aa1943a2d16 Don't take the address of a temporary adds 1ba5ea67a30 [mlir] Add a hook for initializing passes before execution [...] adds a57def30f53 [mlir][vector] generalized masked l/s and compressed l/s wi [...] adds 78b3bce23b1 [mlir] AsyncRuntime: disable mlir-runner init/disable for WIN32 adds bc556e5685c [libc++/abi] Re-remove unnecessary null pointer checks from [...] adds ca1694b9d07 Re-enable __cpp_lib_constexpr_functional. adds 963b771e24c [libc++] Mark [P0475] "LWG2511: guaranteed copy elision for [...] adds cdd7cbf7b56 [libc++] Mark [P0809] "LWG2831: Comparing Unordered Contain [...] adds 77501bd1754 [mlir][PassManager] Properly set the initialization generat [...] adds d86e16e4bd5 [libc++] NFC: Document the Differential queries to avoid du [...] adds e05baf40de8 [InitLLVM] Ensure SIGPIPE handler installed before sigaction() adds 2bf6e443e54 Attempt to complete an incomplete expression type when cons [...] adds bc8acf2ce8a Update the maximum integer bitwidth in MLIR. adds 756dd707668 [NewPM] Run ObjC ARC passes adds daaaed6bb89 [lld-macho] Fix TLV data initialization adds a0b65a7bcd6 [libc] Switch to use a macro which does not insert a sectio [...] adds b02ca0969ea [libc][NFC] add includes for internal headers to all libc f [...] adds aab25fa7d85 Never call a destroying operator delete when cleaning up fr [...] adds 2f499b9affb [AMDGPU] Add volatile support to SIMemoryLegalizer adds 7d78875f93a [X86] Remove IntrArgMemOnly from ldmxcsr intrinsic. adds 467cbd29818 [clangd][NFC] Remove unnecessary copy in CodeComplete adds 55f0a1b0663 [RISCV] Optimize multiplication with constant adds b7c5e0b02cc [Target, Transforms] Use *Set::contains (NFC) adds 1c5b8482b7a [Tablegen] Use llvm::find_if (NFC) adds f62b93b9a25 [SCEV] Remove unused getExactExistingExpansion (NFC) adds 7a204362f5c [DWARFLinker] Print the unsupport DWARF form as part of the [...] adds 272355128f4 [debugserver] Various plist changes adds 04359eece13 [DWARFLinker] Link against BinaryFormat adds 33c8e16f660 PR47391: Canonicalize DIFiles adds 1816de08232 This adds a new test checking llvm-symbolizer with an objec [...] adds 8278fcaef40 Revert "This adds a new test checking llvm-symbolizer with [...] adds d466e10ab13 [IR] Delete unused ReplaceLast in DebugLoc::appendInlineAt adds 9724c3cff46 [WebAssembly] Update WasmEHPrepare for the new spec adds 1d3ebbf5378 Add -f[no-]direct-access-external-data to supersede -mpie-c [...] adds 38a716c30f0 Make -fno-pic respect -fno-direct-access-external-data adds 052b8fe4781 Fix CodeGenCXX/difile_entry.cpp on Windows adds 9e4eadeb135 [WebAssembly] Update basic EH instructions for the new spec adds 52e240a0721 [WebAssembly] Remove exnref and br_on_exn adds bb0e621387f [mlir] AsyncRuntime: use LLVM ThreadPool to run async tasks adds 0d8dfbb42a7 [WebAssembly] Update InstPrinter support for EH adds c0cea2d9b8a [Test][FileCheck] Fix use of undef var adds 2c442629f0b [RISCV] Add tests for scalable constant-folding (NFC) adds 4e4df1e38d6 [WebAssembly] Remove unreachable EH pads adds 7c3ae48fe85 [mlir][spirv] Replace SPIRVOpLowering with OpConversionPattern adds 9f76788b093 [clang][Sema] Compare SourceLocations directly [NFCI] adds 65f578fc0e6 [VPlan] Keep start value of VPWidenPHIRecipe as VPValue. adds 524d8fa9a5a [RISCV] Do not grow the stack a second time when we need to [...] adds 676c7cb0c0d [OpenMP] Added the support for cache line size 256 for A64FX adds de373ef7798 [SelectionDAG] Extend immAll(Ones|Zeros)V to handle ISD::SP [...] adds 9a7c03b8009 [SCEV] Remove unused getOrInsertCanonicalInductionVariable (NFC) adds 4d92ab1669a [Transforms] Use llvm::find_if (NFC) adds 6a6e382161a [llvm] Drop unnecessary make_range (NFC) adds e98b441a09f [lld-macho] Remove unnecessary llvm:: namespace prefixes adds 175c336a1c5 [OpenMP] Remove copy constructor of `RTLInfoTy` adds 87d4ea24336 [gn build] Make an explicit `use_lld = true` on mac use lld [...] adds d98fc62ae68 [SimplifyCFG] Keep !dgb metadata of moved instruction, if t [...] adds 6728af16cf9 [mlir][vector] modified scatter/gather syntax, pass_thru mandatory adds 75c04327a5e [NFC] Disallow unused prefixes in CodeGen/X86 tests. adds 4dbb3f57c6f [clang] Add llvm-strip to test dependencies adds 03d249396d6 [mlir] Enhance mlir-opt show-dialects test case adds 41d06095b0d [SelectionDAG] Teach isConstOrConstSplat about ISD::SPLAT_VECTOR adds b02eab9058e [RISCV] Add scalable vector icmp ISel patterns adds e2e82c9983f [CodeGenModule] Drop dso_local on function declarations for [...] adds 9f452fbf2fe Recommit D91678 after fixing the test breakage. adds 1198478c420 [lld/mac] remove redundant null check adds 59908fc06ac [RISCV] Use uint16_t instead of unsigned for opcodes in the [...] adds 6fc7a92eeeb [RISCV] Change ConstraintMask in RISCVII enum to be shifted [...] adds b41b743d461 [test] Improve weakref & weak_import tests adds 9f2d9364b04 [CodeGen] Update transformations to use poison for shufflev [...] adds a92248600ec [mlir] NFC - Drop spurious assertion on symbols during `pro [...] adds 47991a15d19 [lld/mac] llvm style fix: no else after return adds c701f85c455 [STLExtras] Use return type from operator* of the wrapped iter. adds bdb748a0ab2 [ConstantFold] Add tests for fptoi.sat (NFC) adds 1ecae1e62ad [ConstantFold] Fold fptoi.sat intrinsics adds 9850d3b10a1 [CodeGen, DebugInfo] Use llvm::find_if (NFC) adds 1d10a1d5b1f [MemorySSA] Remove unused dominatesUse (NFC) adds e3d3dbd3393 [llvm] Ensure newlines at the end of files (NFC) adds 0aa75fb12fa [SLP] put verifyFunction call behind EXPENSIVE_CHECKS adds 3f09c77d33d [SLP] fix typo in assert adds 377dcfd5c15 [Tests] Auto update a vectorizer test to simplify future diff adds abfe348e6b4 [test] Improve CodeGenCXX/difile_entry.cpp adds 86d6f7e90a1 Precommit tests requested for D93725 adds fc8ab254472 [Tests] Precommit tests from to simplify rebase adds 13dea030b3d [lldb] Fix some bugs in the Pipe class and add tests adds 8e8d214c4a6 [NFCI][SimplifyCFG] Prefer to add Insert edges before Delet [...] adds 894d2dbf502 [LLVM] Added OpenMP to `LLVM_ALL_RUNTIMES` adds 7be3285248b [OpenMP] Not set OPENMP_STANDALONE_BUILD=ON when building O [...] adds 407b1e65a46 [StringExtras] Add a helper class for comma-separated lists adds 02bc320545d CGDebugInfo: Delete unused DIFile* parameter adds 4739dd67e7a [LoopDeletion] Break backedge of outermost loops when known [...] adds d43a264a5dd Revert "[X86][SSE] Fold unpack(hop(),hop()) -> permute(hop())" adds 7539c75bb43 [DAGCombine] Remove the check for unsafe-fp-math when we ar [...] adds 5cf73dca77e [RISCV] Convert most of the information about RVV Pseudos i [...] adds 7f69860243e [LoopUnroll] Fix a crash adds ffa67873a3f [PowerPC] Add variants of 64-bit vector types for vec_sel. adds dcac2da1063 [IR Parser] Fix a crash handling zero width integer attributes. adds 6215c1b778f CGDebugInfo: Delete redundant test adds b8d28420885 CGDebugInfo: Delete unneeded UnwrapTypeForDebugInfo adds a40767ec885 [MLIR][SPIRV] Add (de-)serialization support for SpecConsta [...] adds 5e476061deb [NFC][AsmPrinter] Make comments for spill/reload more precise. adds 7b11f564dcf [JITLink] Rename PostAllocationPasses to PreFixupPasses. adds 131ce834e4b [RISCV] Clear isCodeGenOnly flag on VMSGE(U) pseudo instruc [...] adds af339f89a14 Remove redundant casts. adds cddd3faf5de [CSKY] Add visibility macro to fix link error adds ee27c767bd2 [clang-format] Skip UTF8 Byte Order Mark while sorting includes adds 0c8b748f321 [ARM] Additional trunc cost tests. NFC adds 7473940bae0 [clang-format] turn on formatting after "clang-format on" w [...] adds 89878e8c966 [clang-format] Find main include after block ended with #pr [...] adds dcefcd51e01 [ARM] Update trunc costs adds b7ccaca5370 [NFC] Remove min/max functions from InstructionCost adds 97100646d1b Reapply "[clang][cli] Port DiagnosticOpts to new option par [...] adds 40abeb11f45 [NFC][InstructionCost] Change LoopVectorizationCostModel::g [...] adds 8165a034203 [ARM] Add debug messages for the load store optimizer. NFC adds 1677c86124e [clangd] Add metrics for go-to-implementation. adds c5be0e0cc0e [X86] Fix tile register spill issue. adds 675be651062 Require chained analyses in BasicAA and AAResults to be transitive adds c37f68a8885 [SVE][CodeGen] Fix legalisation of floating-point masked gathers adds 41bf338dd1e Revert rGd43a264a5dd3 "Revert "[X86][SSE] Fold unpack(hop() [...] adds 59632292663 [X86][SSE] Add missing SSE test coverage for permute(hop,ho [...] adds b72ca799823 [VE] Support intrinsic to isnert/extract_subreg of v512i1 adds d02de139324 [VE] Support additional VMRGW and VMV intrinsic instructions adds c74751d4b5b [obj2yaml] - Fix the crash in getUniquedSectionName(). adds 8ea72b38873 [clang][AArch64][SVE] Avoid going through memory for coerce [...] adds a6db7cf1ce7 [llvm-readelf/obj] - Index phdrs and relocations from 0 whe [...] adds a94497a3429 [VPlan] Move initial quote emission from ::print to ::dumpB [...] adds a5b484c4d41 [obj2yaml][test] - Improve and fix section-group.yaml test. adds d36e879c21c [lldb] Disable PipeTest.OpenAsReader on windows adds 8112a2598ce [X86][SSE] Add 'vectorized sum' test patterns adds 2e17d9c0ee7 [ARM] Add uses for locals introduced for debug messages. NFC. adds 6dcf9207df1 [AMDGPU] Fix a urem combine test to test what it was supposed to adds 4fe7b16ae3f [mlir] Remove unnecessary llvm.mlir.cast in AsyncToLLVM lowering. adds 4c372a35cd8 [mlir] Make GpuAsyncRegion pass depend on async dialect. adds 8298ec2d629 [flang][driver] Copy input files into a temp dir when testing adds df86f15f0c5 [mlir][linalg] Support parsing attributes in named op spec adds 55225471d98 [mlir][linalg] Support permutation when lowering to loop nests adds 007358239de [DAGCombiner] Use getVectorElementCount inside visitINSERT_ [...] adds c163aae45ef [attributes] Add a facility for enforcing a Trusted Comput [...] adds eb0371e403a [VPlan] Unify value/recipe printing after VPDef transition. adds 419ef38a502 Revert "[attributes] Add a facility for enforcing a Truste [...] adds d59ddba7772 [mlir] Fix gpu-to-llvm lowering for gpu.alloc with dynamic sizes. adds a46982a2551 [X86] Add nounwind to lzcnt-cmp tests adds a0f82749f4f [X86] Extend lzcnt-cmp tests to test on non-lzcnt targets adds dbd5fa1e75d [ARM] Update existing test case with +pauth targets adds a2dbf3443af [clangd] Fix -check mode doesn't respect any tidy configs. adds 97517055128 [OpenMPOpt][WIP] Expand parallel region merging adds 31732e6f52c [clangd] Remove ScratchFS from tests adds e5eb5c8a7f3 NFC: Use -LABEL more adds c161775decd [FastISel] Flush local value map on every instruction adds 4214ca96145 [X86][AVX] Attempt to fold vpermf128(op(x,i),op(y,i)) -> op [...] adds 9c0dc0b2c1c [mlir][Linalg] Fold init_tensor -> linalg.tensor_reshape. adds c15b0e2229e [Clang][Docs] Fix ambiguity in clang-offload-bundler docs adds 7200d2cf089 [NFC] Disallow unused prefixes in CodeGen/PowerPC tests. adds 3d693bd0bd7 [mlir][vector] Add memory effects to transfer_read transfer [...] adds c4486cfd556 [mlir][Linalg] Fix reshape fusion to reshape the outs inste [...] adds be179b9946f [FastISel] NFC: Remove obsolete -fast-isel-sink-local-value [...] adds ac2224c0228 [ELF] --exclude-libs: localize defined libcall symbols refe [...] adds 171771e0780 [SystemZ] Minor NFC fix in SchedModels. adds 1f9c29228ce [FastISel] NFC: Clean up unnecessary bookkeeping adds 072714b9619 [X86] Regenerate vector-constrained-fp-intrinsics.ll tests adds 35c9baa11e4 [attributes] Add a facility for enforcing a Trusted Comput [...] adds a90214760d0 [Hexagon] Custom-widen SETCC's operands adds bcec0f27a2c [AMDGPU] Deduplicate VOP tablegen asm & ins adds 74628c43053 [mlir] Add Python bindings for AffineExpr adds e79bd0b4f25 [mlir] More Python bindings for AffineMap adds 547e3eef14a [mlir] Expose MemRef layout in Python bindings adds 47567ca5fac [flang][openxx][NFC] Remove duplicated function to check re [...] adds d8c6d24359f -funique-internal-linkage-names appends a hex md5hash suffi [...] adds 43a830ed941 Introduce new quiet mode and new option handling for -print [...] adds 5464baaae8c Fix minor build issue (NFC) adds 1027a22ccd7 [SystemZ][z/OS] Fix Permission denied pattern matching adds 195728c75aa [mlir] Add structural conversion to async dialect lowering. adds 37b41bd0879 [RISCV] Add scalable vector fcmp ISel patterns adds 30a7d430e86 [libc++] Turn off auto-formatting of generated files. NFC. adds 72f1f084670 [NFC][AMDGPU] Clarify memory model support for volatile adds 20741773013 [mlir][ODS] Add a C++ abstraction for OpBuilders adds 948be58258d [mlir][TypeDefGen] Add support for adding builders when gen [...] adds d79642b3db1 [mlir][IR][NFC] Move the definitions of Complex/Function/In [...] adds d3ff24cbf87 [ADT] Add makeIntrusiveRefCnt helper function adds 8ad998a6115 [tools] Mark output of tools as text if it is really text adds 05e90cefeb4 [NFC] Disallow unused prefixes under llvm/test/CodeGen adds c1ae378205d [mlir][vector] Add side-effect information to different loa [...] adds 53c866c286a Enable python bindings for tensor, shape and linalg dialects. adds cceb1bfcbbc [mlir][CAPI] Introduce standard source layout for mlir-c di [...] adds 110775809ad Revert "[mlir][linalg] Support parsing attributes in named [...] adds 288f3fc5dfe [InstCombine] reduce icmp(ashr X, C1), C2 to sign-bit test adds 32c073acb32 [GlobalISel] Map extractelt to G_EXTRACT_VECTOR_ELT adds aefeb5f136e [libc][NFC] Make __support/common.h an in tree header. adds 9b222b108a2 [c++20] Don't consider string literal operator templates fo [...] adds f4cec703ec8 Add an assert to CGDebugInfo::getTypeOrNull adds 7989684a2e4 [RISCV] Add scalable vector fadd/fsub/fmul/fdiv ISel patterns adds 046612d29d7 [mlir][vector] verify memref of vector memory ops adds a808d89d355 [PredicateInfo] Add test for one unknown condition in and/or (NFC) adds 00f773cf424 [SCCP] Fix misclassified conditions in test (NFC) adds b88c8f1aab5 CGDebugInfo: Delete unused parameters adds 32bcfcda4e2 Rename debug linkage name with -funique-internal-linkage-names adds a81c68ae6be [OpenMP] Take elf_common.c as a interface library adds 9ecc991c559 [RISCV] Add scalable vector vselect ISel patterns adds 0a23fbd28c7 clang: Always pass PowerPC endian information to GNU as adds 762ffc95550 Update syntax for tensor and memref types to match parser. adds 278a3ea1b27 [RISCV] Use vmv.v.i vd, 0 instead of vmv.v.x vd, x0 for llv [...] adds c22bc5f1f8b [SimplifyCFG] SwitchToLookupTable(): don't insert a DomTree [...] adds c0de0a1b72c [SimplifyCFG] SimplifyBranchOnICmpChain(): don't insert a D [...] adds f9ba3477063 [SimplifyCFG] FoldValueComparisonIntoPredecessors(): don't [...] adds 90a92f8b4d7 [NFCI][Utils/Local] removeUnreachableBlocks(): cleanup supp [...] adds 81afeacd379 [SimplifyCFGPass] mergeEmptyReturnBlocks(): skip blocks sch [...] adds ec8a6c11db4 [SimplifyCFGPass] iterativelySimplifyCFG(): support lazy Do [...] adds 5ccff5aaa68 ADT: Fix pointer comparison UB in SmallVector adds 7470017f247 [RISCV] Define the vfclass RVV intrinsics adds f635bcd1610 NFC: Pre-commit test: -Wpointer-sign with plain char to [un [...] adds c6ffe4d76fb [clang] Fix message text for `-Wpointer-sign` to account fo [...] adds eefd420e003 [github] Move repo lockdown config into llvm-project repo adds f75f391fc68 [MLIR][Linalg] Refactor transforms to use linalg::getDynOpe [...] adds f9902514fe5 [MC] Make getEHFrameSection const like every other getter (NFC) adds ef50c07b1fa [JITLink] Add a new PostAllocationPasses list. adds 70474dfebcd [VE][compiler-rt] Add VE as a target of crt adds 9f8b25769ef [WebAssembly] Ensure terminate pads are a single BB adds 905623b64df [NFC][LICM] Minor improvements to debug output adds 0871d6d5164 [OpenMP] Move memory manager to plugin and make it a common [...] adds 89e8eb946d8 [llvm] Use llvm::find_if (NFC) adds 8590a3e3adc [llvm] Use *Set::contains (NFC) adds e5b4dbab041 [llvm] Simplify string comparisons (NFC) adds b1c304c4946 [CodeGen] Try to make the print of memory operand alignment [...] adds edde2eb1d20 Add unconditional logging to debugserver for launch/attach [...] adds f9ef3a60037 [SelectionDAG] Make isConstantIntBuildVectorOrConstantInt a [...] adds b688c5875d0 [CMake] Split the target side of runtimes build adds df74c001fa5 [DAGCombiner] Replace static helper function isConstantFPBu [...] adds 93ad0edf674 [ELF] Drop .rel[a].debug_gnu_pub{names,types} for --gdb-ind [...] adds 1cc5235712f [WebAssembly] Misc. refactoring in CFGStackify (NFC) adds 215ed9b33cc Adapt CastExpr::getSubExprAsWritten to ConstantExpr adds c8a914db5c6 [LiveDebugValues] Fix comparison operator in VarLocBasedImpl adds 6a195491b60 [AMDGPU] Fix failing assert with scratch ST mode adds 7ab803095ae [clang][cli] Remove -f[no-]trapping-math from -cc1 command line adds bd30a796fc4 [mlir] use built-in vector types instead of LLVM dialect ty [...] adds e8287cb2b29 [Test] Add failing test for PR48725 adds c93b9559390 [WebAssembly] Remove more unnecessary brs in CFGStackify adds 9ec72cfc61a [llvm-readef/obj] - Change the design structure of ELF dump [...] adds 1e11402aa8e [llvm-readobj] - Add 'override' to fix build bots. adds cc91efdabee [llvm-readobj] - An attempt to fix BB. adds 4744478b99f [mlir][openmp][NFCI] Rename `continuationIP` to `continuati [...] adds 891b4873c12 [llvm-readobj] - One more attempt to fix BB. adds c1e08f0073e [clang][AST] Get rid of an alignment hack in DeclObjC.h [NFCI] adds f264f9ad7df [SlotIndexes] Fix and simplify basic block splitting adds 794e3d94d5a [AMDGPU][GlobalISel] Remove some duplicate RUN lines adds 60df7c08b1f [obj2yaml,yaml2obj] - Fix issues with creating/dumping grou [...] adds c15a57cc1a8 [obj2yaml] - Don't crash when an object has an empty symbol table. adds a06aa1037c1 Revert "[Test] Add failing test for PR48725" adds ace516fb33d Change the LLVM_ATTRIBUTE_DEPRECATED macro to use C++14 attribute. adds 09db958e37b [RISCV] Improve scalable-vector shift tests (NFC) adds a5212b5c91c [X86][SSE] combineSubToSubus - remove SSE2 early-out. adds c4944a6f53f [Fixed Point] Add codegen for conversion between fixed-poin [...] adds 7e44208115b [X86][SSE] combineSubToSubus - add v16i32 handling on pre-A [...] adds 2ed914cb7e9 [X86][SSE] getFauxShuffleMask - handle PACKSS(SRAI(),SRAI() [...] adds 80f07854886 [mlir][Linalg] NFC - Refactor fusion APIs adds a6759477129 [TableGen] Improve error message for semicolon after braced body. adds 0bd9a136911 [mlir][openacc] Use TableGen information for default enum adds 07605ea1f3c [X86] Improved lowering for saturating float to int. adds 24faa87075a [VE] Update VELIntrinsic tests adds 2f7ec77e3cd [mlir][spirv] NFC: place ops in the proper file for their c [...] adds dd07d60ec33 [SLP] Add test case showing a bug when dealing with padded types adds 3f7b4ce9606 [PowerPC] Add support for embedded devices with EFPU2 adds 4086072f8a9 Reland "[mlir][linalg] Support parsing attributes in named [...] adds 4fa01f72de6 [mlir][CAPI] Fix inline function declaration adds 9667d15e749 [mlir] Fix for LIT tests adds 1f1250151f2 [libc++] [C++2b] [P1048] Add is_scoped_enum and is_scoped_enum_v. adds 8349fa0fdd3 [mlir][spirv] NFC: split deserialization into multiple sour [...] adds 93b54b7c673 [PowerPC][NFCI] PassSubtarget to ASMWriter adds 67a339e9683 [MLIR] Disallow `sym_visibility`, `sym_name` and `type` att [...] adds 85aaa3e310c [X86] Regenerate sdiv_fix_sat.ll + udiv_fix_sat.ll tests adds dd955771240 Fix typo in diagnostic message adds a4931d4fe38 [AMDGPU] Regenerate umax crash test adds 3d9c51d111d [SVE][NFC] Regenerate a few CodeGen tests adds 348471575d9 Add -ansi option to CompileOnly group adds b117d17d264 [doc] Place sha256 in lld/README.md into backticks adds ef3800e8216 Return false from __has_declspec_attribute() if not explici [...] adds 5aefc8dc4d1 [llvm] [cmake] Remove obsolete /usr/local hack for *BSD adds bb9ebf6baf7 [Tests] Add tests for new InstCombine OR transformation, NFC adds 0529946b5ba [instCombine] Add (A ^ B) | ~(A | B) -> ~(A & B) adds 6f4d4607620 [Flang][openmp][openacc] Extend CheckNoBranching to handle [...] adds 03c8d6a0c4b [LegalizeDAG][RISCV][PowerPC][AMDGPU][WebAssembly] Improve [...] adds 4718ec01669 [clangd] Avoid recursion in TargetFinder::add() adds f748e922955 [NewPM] Run non-trivial loop unswitching under -O2/3/s/z adds a14040bd4d9 [RISCV] Use vmerge.vim for llvm.riscv.vfmerge with a 0.0 sc [...] adds 08d4a50467e [FunctionAttrs] Precommit tests for willreturn inference. adds eef4bdbb34d [libc++] Add a missing `<_Compare>` template argument. adds 79f99ba65d9 [libcxx] Port to OpenBSD adds 7ecad2e4ced [InstSimplify] Don't fold gep p, -p to null adds bdd1ad5e5c5 [OpenMP] Fixed include directories for OpenMP when building [...] adds 33e2494bea6 [libomptarget][amdgpu][nfc] Fix build on centos adds e5f51fdd650 [clang][aarch64] Precondition isHomogeneousAggregate on isC [...] adds 6cd44b204c6 [FunctionAttrs] Derive willreturn for fns with readonly` & [...] adds e53bbd99516 [IR] move nomerge attribute from function declaration/defin [...] adds 922a5b89411 [clang-tidy] Add test for Transformer-based checks with dia [...] adds d49974f9c98 [InstCombine] Regenerate test checks (NFC) adds 9f61fbd75ae [LV] Relax assumption that LCSSA implies single entry adds f706486eaf0 Fix for crash in __builtin_return_address in template context. adds fb063c933f0 [InstCombine] Duplicate tests for logical and/or (NFC) adds caafdf07bbc [LV] Weaken spuriously strong assert in LoopVersioning adds 46507a96fc1 [SLP] reduce code duplication while matching reductions; NFC adds 554be30a428 [SLP] reduce code duplication in processing reductions; NFC adds 92fb5c49e8a [SLP] rename variable to improve readability; NFC adds 9e7895a8682 [SLP] reduce code duplication while processing reductions; NFC adds 7583ae48a3c [RISCV] Add double test cases to vfmerge-rv32.ll. NFC adds e15f3ddcae6 [InstCombine] Add tests for logical and/or poison implicati [...] adds 71ed4b6ce57 [RISCV] Legalize select when Zbt extension available adds 23390e7a131 [InstCombine] Handle logical and/or in assume optimization adds 7fd18508134 [mlir] Update LLVM dialect type documentation adds 2a49b7c64a3 [Inliner] Change inline remark format and update ReplayInli [...] adds 68ff52ffead [OpenMP] Fixed the link error that cannot find static data member adds d1fa7afc7ae [AArch64] [Windows] Properly add :lo12: reloc specifiers wh [...] adds 02f1d28ed6b [libcxx] Avoid overflows in the windows __libcpp_steady_clo [...] adds 01f1273fe2f [OpenMP] Fixed a typo in openmp/CMakeLists.txt adds 3d397091591 AMDGPU: Remove wrapper only call limitation adds cf45731f0ea [Driver] Fix assertion failure when -fprofile-generate -fcs [...] adds 55f2eeebc96 [NFC] Disallow unused prefixes in MC/AMDGPU adds a7130d85e4b [ADT][NFC] Use empty base optimisation in BumpPtrAllocatorImpl adds 1730b0f66ad [RISCV] Remove '.mask' from vcompress intrinsic name. NFC adds 6166b91e837 [ELF][NFCI] small cleanup to OutputSections.h adds 175288a1afe Add sample-profile-suffix-elision-policy attribute with -fu [...] adds ddcb0aae8b0 [MIPatternMatch] Add matcher for G_PTR_ADD adds 8f5ec459375 [Sanitizer][Darwin] Fix test for macOS 11+ point releases adds 585612355cd [NFC] Disallow unused prefixes under MC/AMDGPU adds 0d88d7d82bc Delete unused function (was breaking the -Werror build) adds 314e29ed2b7 [AMDGPU] Add _e64 suffix to VOP3 Insts adds 04edcc02638 [libc] add isascii and toascii implementations adds 0c8466c0015 [libc][NFC] Use more specific comparison macros in LdExpTest.h. adds 76643c48cdd [LangRef] State that a nocapture pointer cannot be returned adds 25eb7b08ba7 [DAGCombiner] Fold BRCOND(FREEZE(COND)) to BRCOND(COND) adds 82655c15145 [MSan] Tweak CopyOrigin adds 25b3921f2fc [gn build] (manually) port 79f99ba65d96 adds c0f3ea8a08c [mlir][Python] Add checking process before create an Affine [...] adds 055644cc459 [X86][AMX] Prohibit pointer cast on load. adds 5c7dcd7aead [Coroutine] Update promise object's final layout index adds 6529d7c5a45 [PDB] Defer relocating .debug$S until commit time and paral [...] adds 6f0f0220380 [OpenMP] Update allocator trait key/value definitions adds acea470c167 [gn build] Reorganize libcxx/include/BUILD.gn a bit adds 0066a09579c [libc++] Give extern templates default visibility on gcc adds bba3a82b56c [OpenMP] Use persistent memory for omp_large_cap_mem adds 914e2f5a02f [NFC] Use generic name for scalable vector stack ID. adds e5553b9a6ab [dsymutil] Warn on timestmap mismatch between object file a [...] adds cd8a80de960 [Orc] Add a unit test for asynchronous definition generation. adds f454c9f102a [InlineSpiller] Re-tie operands if folding failed adds 8a47d875b07 [dsymutil] Copy eh_frame content into the dSYM companion file. adds 84e0b14a0a4 [libomptarget][nvptx] Include omp_data.cu in bitcode deviceRTL adds ad735badb69 [dsymutil] s/dwarfdump/llvm-dwarfdump/ in test adds 35e4998f0c9 [dsymutil] Fix spurious space in REQUIRES: line adds 790c75c1637 [AMDGPU] Add SI_EARLY_TERMINATE_SCC0 for early terminating shader adds 157efd84abf [Statepoint Lowering] Add an option to allow use gc values [...] adds fba9805ba34 [Verifier] Extend statepoint verifier to cover more constants adds 12fc9ca3a40 [llvm] Remove redundant string initialization (NFC) adds 2c2d489b78c [CodeGen] Remove unused function isRegLiveInExitBlocks (NFC) adds 8a20e2b3d3e [llvm] Use Optional::getValueOr (NFC) adds f1d5cbbdee5 [dsymutil] Add preliminary support for DWARF 5. adds 0b99385e151 [MSan] Partially revert some changes from D94552 adds 8f8c207b8f2 [Verifier] Add tied-ness verification to statepoint intsruction adds 3aeb30d1a68 [ARM] Additional tests for different interleaving patterns. NFC adds 141906fa149 [llvm-readelf/obj] - Add support of multiple SHT_SYMTAB_SHN [...] adds c29ca8551af [ARM] Update isVMOVNOriginalMask to handle single input shu [...] adds 6d3098e7ff9 [obj2yaml,yaml2obj] - Refine how we set/dump the sh_entsize field. adds cbea6737d51 [clang][driver] Restore the original help text for `-I` adds f638c2eb4ee [LTO] Replace anonymous namespace with static functions (NFC). adds 4cd48535eca [NFC][InstructionCost] Use InstructionCost in Transforms/Sc [...] adds 3122c66aee7 [AArch64][SVE] Remove chains of unnecessary SVE reinterpret [...] adds 0f59d099571 [X86][AVX] combineVectorSignBitsTruncation - limit AVX512 t [...] adds ad85e396706 [SVE] Add ISel pattern for addvl adds 1854594b80b Hwasan InitPrctl check for error using internal_iserror adds ceb9379a90f [ADT] Fix join_impl using the wrong size when calculating t [...] adds ada96fa6217 [LTO] Add test to ensure objc-arc-contract is executed. adds af1bb4bc823 Fix build errors after ceb9379a9 adds c6e341c8995 Revert "[dsymutil] Warn on timestmap mismatch between objec [...] adds 2170e0ee60d [SVE][CodeGen] CTLZ, CTTZ & CTPOP operations (predicates) adds f8cece18630 [ValueTracking] Fix one s/dyn_cast/dyn_cast_or_null/ adds 704831fe1f1 Revert "Hwasan InitPrctl check for error using internal_iserror" adds d307d892ade [Tests] Added test for memcpy loop idiom recognization adds 0a0ee7f5a5a [X86] canonicalizeShuffleMaskWithHorizOp - minor refactor t [...] adds ab577807165 [libc] Refresh benchmark progress bar when needed. adds 7c77b536efd [OpenCL] Improve OpenCL operator tests adds b7b1e8c37a9 [X86] Add tests for rv_marker lowering. adds 3bc7555ffac [mlir][linalg] Use attributes in named ops' indexing maps adds 90164ba957a [clangd] Split out a base class for delegating GlobalCompil [...] adds dda60035e9f [AArch64] Attempt to sink mul operands adds d55d592a921 GlobalISel: Do not set observer of MachineIRBuilder in Lega [...] adds 350c0552c66 [NFC][RISCV] Add double type in RISC-V V CodeGen test cases [...] adds 4e8e888905a [AArch64][GlobalISel] Add support for FCONSTANT of FP128 type adds 07b6aeb5685 [lld][WebAssembly] Fix for TLS + --relocatable adds f0abe2aeaca [Frontend] Add pragma align natural and sort out pragma pac [...] adds a957634942a [OpenMP] Add documentation for error messages and release notes adds 4fe17ada55a [OpenMP] Fix hierarchical barrier adds 66d5994bd38 [clangd] Explicitly avoid background-indexing the same file twice. adds 466acd69486 [clangd] Avoid reallocating buffers for each message read: adds e433ca28ec9 [SLP] add reduction test for FMF; NFC adds 17863614da1 [InstCombine] Fold select -> and/or using impliesPoison adds a4f38668823 [clangd] Remove "decision-forest-base" experimental flag. adds 0bbc6a6bb64 [clangd] Remove some old CodeCompletion options that are ne [...] adds 05b1a15f703 [IROutliner] Adapting to hoisted bitcasts in CodeExtractor adds 48d2068fb73 [dsymutil] Warn on timestmap mismatch between object file a [...] adds cbbfc825861 [X86][SSE] canonicalizeShuffleMaskWithHorizOp - simplify sh [...] adds efb6e45d2be [X86][AVX] Add test for another 'reverse HADD' pattern ment [...] adds 993c488ed2b [DAG] visitVECTOR_SHUFFLE - use all_of to check for all-und [...] adds 60fda8ebb6d [ARM] Add a pass that re-arranges blocks when there is a ba [...] adds 14f322f074b [gn build] Port 60fda8ebb6d adds a50bb84ec0c [flang] Fix classification of shape inquiries in specificat [...] adds a2e6506c47b [Hexagon] Improve legalizing of ISD::SETCC result adds 123674a8167 [SLP] simplify type check for reductions adds 166e5c335cb [flang] Do not create HostAssoc symbols in derived type scopes adds b3154d11bc6 [CSSPGO][llvm-profgen] Pseudo probe decoding and disassembling adds 414930b91bf [CSSPGO][llvm-profgen] Refactor to unify hashable interface [...] adds c681400b25a [CSSPGO][llvm-profgen] Virtual unwinding with pseudo probe adds 33a8466531e [NFC] fix missing SectionName declaration adds 3bd620d4504 [mlir] Correct 2 places that result in corrupted conversion [...] adds e7a371f9fd0 [LLD][COFF] Avoid std::vector resizes during type merging adds bb72adcaee7 [NFC] Use correct ssa.copy spelling when referring to the i [...] adds f4f158b2f89 [mlir][sparse] add vectorization strategies to sparse compiler adds 01c3135850d [LTO] Add test for freestanding LTO option. adds 18278ff1aac [flang] Fix accessibility of USEd name in .mod file adds 4cfccd51335 [libc][NFC] add macro for fuchsia to switch test backend to zxtest adds fb98a1be436 Fix the warnings on unused variables (NFC) adds f711cb9a8ad [FuncAttrs] Add additional willreturn tests (NFC) adds 6077d55381a [DSE] Add tests with stores of existing values. adds ea8034ec35a [libc][NFC] change isblank and iscntrl from implicit casting adds 74a42aedfe1 [test] Add Clang side tests for -fdebug-info-for-profiling adds 35debdfcaca [NFC] Fix build break by a initializer list converting error adds 82c4153e66f Revert "[AsmParser] make .ascii support spaces as separators" adds 39e6d242378 [NewPM] Only non-trivially loop unswitch at -O3 and for non [...] adds 7ec8f436598 [SPARC] Fix fp128 load/stores adds 854f0984f0b Fix llvm::Optional build breaks in MSVC using std::is_trivi [...] adds 86341247c4a [NFC] Rename ThinLTOPhase to ThinOrFullLTOPhase and move it [...] adds ddd03842c34 [SystemZ] Clear Available set in SystemZPostRASchedStrateg [...] adds c82deed6764 [libunwind] Unwind through aarch64/Linux sigreturn frame adds 3de92ca78cd [flang] Add tests for procedure arguments with implicit interfaces adds dfc1901d513 [RISCV] Custom lower ISD::VSCALE. adds cd4c55c9740 Fix grammar in diagnostic for wrong arity in a structured binding. adds 336ab2d51df [Support] On Windows, take the affinity mask into account adds ff40fb07ad6 [PowerPC] Try to fold sqrt/sdiv test results with the branch. adds eec856848cc Revert "[Support] On Windows, take the affinity mask into account" adds 9abac603090 ADT: Fix reference invalidation in SmallVector::push_back a [...] adds b196dc66072 [NFC] Remove unused entry in PassRegistry.def adds 56d1ffb927d Revert "ADT: Fix reference invalidation in SmallVector::pus [...] adds 5c1c39e8d80 [llvm] Use *Set::contains (NFC) adds 125ea20d55c [llvm] Use llvm::stable_sort (NFC) adds 4c1617dac8f [llvm] Use std::any_of (NFC) adds 49142991a68 Reapply "ADT: Fix reference invalidation in SmallVector::pu [...] adds 3043e5a5c33 ADT: Fix reference invalidation in N-element SmallVector::a [...] adds 752fafda3db [NFC] Fix -Wsometimes-uninitialized adds 260a856c2ab ADT: Fix reference invalidation in SmallVector::resize adds c224a834583 ADT: Reduce code duplication in SmallVector::resize by usin [...] adds 3f98b66f23f ADT: Reduce code duplication in SmallVector by reusing rese [...] adds 53b34601abf [Driver] -gsplit-dwarf: Produce .dwo regardless of -gN for [...] adds 6ed3083a965 ADT: Reduce code duplication in SmallVector by calling rese [...] adds ff5e8964255 Fix unused variable in CoroFrame.cpp when building Release [...] adds 885eae9d85d Add func call so we don't instruction-step into the builtin_trap adds 7ad54d19387 [lldb][wasm] Parse DWO section names adds 2bbf724feea Implement vAttachWait in lldb-server adds ed205f63b4a [mlir] Update doc to omit the usage of LLVMIntegerType adds 4b284b9ca80 [lldb] Fix TestPlatformProcessConnect.py adds 259936f4910 [NFC][AsmPrinter] Windows warning: Use explicit cast adds 2b1e25befef [AArch64] Adding ACLE intrinsics for the LS64 extension adds 4bb11b3eafb [LTO] Expose opt() in LTOBackend (NFC). adds 53e3b81faaf [lld][WebAssembly] Add support for handling table symbols adds d58512b2e31 [SLP] Don't vectorize stores of non-packed types (like i1, i2) adds 17f8c458de6 [clang] Use SourceLocations in unions [NFCI] adds af8d27a7a82 [DAG] visitVECTOR_SHUFFLE - pull out shuffle merging code i [...] adds 8f1d7f3753c [X86] Improve sum-of-reductions v4f32 test coverage adds a997a1d7fbe [lldb/test] Ensure launched processes are ready to be attached adds 7c30c05ff71 [DAG] visitVECTOR_SHUFFLE - MergeInnerShuffle - reset shuff [...] adds 2e25be0b613 [clangd] Add main file macros into the main-file index. adds 19297a41711 Change XCore code owner. adds 3bccd87a588 [clang][cli] NFC: Remove SSPBufferSize assignment adds fa2fe9608c1 [clang][cli] Port more CodeGenOptions to marshalling infras [...] adds 6abbba3fca9 Revert "Fix llvm::Optional build breaks in MSVC using std:: [...] adds 176f5e95e1a [clang-tidy] Use DenseSet<SourceLocation> in UpgradeDuratio [...] adds a1bbd1ef1db [flang][driver] Unify f18_version.h.in and Version.inc.in adds c23e34e606b [InferFunctionAttrs] Improve CHECK variable names (NFC). adds a1cba5b7a1f [SelectionDAG] Make use of KnownBits::commonBits. NFC. adds 517196e5691 [Analysis,CodeGen] Make use of KnownBits::makeConstant. NFC. adds 90b310f6caf [Support] Simplify KnownBits::icmp helpers. NFC. adds e8622d27c0e [Support] Add KnownBits::sextInReg exhaustive tests adds 332e220ef42 [docs] Update DebuggingJITedCode page after fix in LLDB adds 0b46f19a9ec [Support] Ensure KnownBits::sextInReg can handle the src == [...] adds 3e41ab18db2 [flang] Fix dangling pointer in LabelEnforce adds adb77a74569 [OpenCL] Improve online documentation. adds 6b9fa8a50d0 [mlir][linalg] Add docstring support for named op spec adds c0939fddf80 [Support] Simplify KnownBits::sextInReg implementation. adds a022be62538 [TableGen] Enhance !cast<string> to handle bit and bits types. adds dbaa6a1858a Revert "[AArch64] Attempt to sink mul operands" adds d0dbb0468c2 [Support] Remove redundant sign bit tests from KnownBits::g [...] adds 0a59647ee40 [SystemZ] misched-cutoff tests can only be tested on non-ND [...] adds 17fb21f875f [clangd] Remove another option that was effectively always [...] adds 7c9c2a2ea5e Revert "[RISCV] Legalize select when Zbt extension available" adds 0afdbb4d2de [flang][driver] Use __FLANG_VERISION__ in f18.cpp (nfc) adds e21bf875c0f [NFC] Disallow unused prefixes under MC/ARM adds 2f395b7092b [clangd] Make AST-based signals available to runWithPreamble. adds 8b09cf7956d [clangd] Trivial: Documentation fix in ASTSignals. adds b4e083b0ef7 [gn build] Port 2f395b7092bd adds 4864d9f7e91 [flang] Fix some module file issues exposed by Whizard adds 35c8a6cbf5f [NFC] Disallow unused prefixes under MC/AArch64 adds a03ffa98503 [NewPM] Fix placement of LoopFlatten adds b99782cf785 [X86][AVX] Adjust unsigned saturation downconvert negative test adds 5d165f0b893 [libomptarget][amdgpu] Fix kernel launch tracing to match p [...] adds 868da2ea939 [SelectionDAG] Remove an early-out from computeKnownBits fo [...] adds 85dfcaadc5f [LLDB] MinidumpParser: Prefer executable module even at hig [...] adds be40c12040a [HIP] Add signbit(long double) decl adds 6ebeba88f51 Support emptiness checks for unbounded FlatAffineConstraints. adds 763c1f99334 [OpenMP] Drop the static library libomptarget-nvptx adds 4fffbc150cc [clang][MSVC] Fix missing MSInheritanceAttr in template spe [...] adds 202d359753d [X86] Add the FSRM feature (Fast Short Rep Mov) to Zen3. adds 64e9e9aeee0 [OpenMP] Dropped unnecessary define when compiling deviceRT [...] adds a8520f6970f [GWP-ASan] Minor refactor of optional components. adds ca98baa0425 [openacc] Rename generated file from ACC.cpp.inc to ACC.inc [...] adds 9e53c94d8dd [NFC] Update test to not check for 'opaque' in the file name. adds 1d973b7ded1 [MLIR][TOSA] First lowerings from Tosa to Linalg adds d8113cda782 Add newline to terminate debug message (NFC) adds a3904cc77f1 [BasicAA] Handle recursive queries more efficiently adds 00a61b327dd [mlir][ODS] Add new RangedTypesMatchWith operation predicate adds 93592b726c7 [mlir][OpFormatGen] Format enum attribute cases as keywords [...] adds e3b9af92a48 [Driver] -gsplit-dwarf: Produce .dwo regardless of -gN for [...] adds 387d3c24792 [RISCV] Merge Utils library into MCTargetDesc adds c8fb6ee3415 [mlir][PatternRewriter] Add a new hook to selectively repla [...] adds 5cf2696317a [mlir] Remove TosaToLinalg dependency on all Passes adds a71877edfbb [clang] Do not crash when CXXRecordDecl has a non-CXXRecord [...] adds e2d7d3cb0ea [mlir][docs] Bring bufferization docs up to date. adds 0f588ac03e1 [PowerPC] Only use some extend mne if assembler is modern enough adds 0975604cc01 [gn build] (manually) port 387d3c24792f adds e7228062b2b [libc] Use #undef isascii in specific header adds f85b1531666 Add -fexceptions to test as it uses them and fails on platf [...] adds b894a9fb237 [RISCV] Optimize select_cc after fp compare expansion adds 4fcb25583c3 Re-land [Support] On Windows, take the affinity mask into account adds 5b42fd8dd4e [LTO] Test format fix (NFC) adds 8a53a7375a8 [RISCV][NFC] Regenerate Calling Convention Tests adds a55a0a3056b [mlir] Remove over specified memory effects adds 4183999e0fe [clangd] Reduce logspam for CDB scanning adds 722ae10907e [mlir][Linalg] Add canonicalization to remove no-op linalg [...] adds b21905dfe37 [SLP] remove unnecessary state in matching reductions adds 547b032ccc8 [OpenMP] Remove omptarget-nvptx from deps as it is no longe [...] adds 774c9c6ef3a [mlir][Linalg] Add canonicalization of linalg op -> dim op. adds 42444d0cf0c [mlir][Linalg] NFC: Verify tiling on linalg.generic operati [...] adds 6e7094c14b2 [libomptarget][nvptx][nfc] Move target_impl functions out o [...] adds d6acf3c2012 [flang] Fix use-associated procedure in generic adds 036bc798f2a [AArch64][GlobalISel] Assign FPR banks to loads which are u [...] adds 9dfeec85300 Reland "[AsmParser] make .ascii support spaces as separators" adds 214387c2c69 [libomptarget][nvptx] Reduce calls to cuda header adds 1fabe6e5191 [libTooling] Change `addInclude` to use expansion locs. adds 8f283cafddf [AArch64][GlobalISel] Add selection support for fpr bank so [...] adds 2423ec58376 [libc] Add memmove implementation. adds 9bcc0d1040d [CodeGen, Transforms] Use llvm::sort (NFC) adds 2efcbe24a75 [llvm] Use llvm::drop_begin (NFC) adds 7dc3575ef2d [llvm] Remove redundant return and continue statements (NFC) adds 39665d9aabb Add Semantic check for Flang OpenMP 4.5 - 2.7.1 Do Loop re [...] adds 5508516b066 [mlir][sparse] retry sparse-only for cyclic iteration graphs adds c495dfe0268 [clang][cli] NFC: Decrease the scope of ParseLangArgs parameters adds 1a49944b59d [clang][cli] NFC: Decrease the scope of ParseCodeGenArgs pa [...] adds b6575bfd0ee [clang][cli] Specify KeyPath prefixes via TableGen classes adds b54337070b1 [AArch64] Add Fujitsu A64FX scheduling model adds 38dfce706f7 [WebAssembly] Add support for table linking to wasm-ld adds 33be50daa9c Revert "Reapply "ADT: Fix reference invalidation in SmallVe [...] adds 168be420830 [Clang] Mutate long-double math builtins into f128 under IEEE-quad adds 1185d3f43d2 [llvm-readobj] - Fix the compilation with GCC < 7.0. adds 89e84dec187 [AArch64][GlobalISel] Fix fallbacks introduced for G_SITOFP [...] adds 78036360573 [libcxx testing] Fix UB in tests for std::lock_guard adds 104a9f99cca [Debuginfo][DW_OP_implicit_pointer] (1/7) Support for DW_OP [...] adds bfb8f45ef3f [llvm-nm] - Move MachO specific logic out from the dumpSymb [...] adds a10300a2b27 [libc] Allow customization of memcpy via flags. adds 021ea78a97e [llvm-nm] - Simplify the code in dumpSymbolNamesFromObject. NFC. adds 3676ef10538 [ARM][GISel] Treat calls as variadic even if only fixed arg [...] adds d9afe8588e4 [yaml2obj/obj2yaml] - Refine handling of SHT_GNU_verdef sections. adds 45ef053bd70 [llvm-readobj][test] - Remove excessive YAML fields from tests. adds 9cc221b99be [clangd] exclude symbols from document outline which do not [...] adds 4fd77668b2c [LLDB] Add per-thread register infos shared pointer in gdb-remote adds b9993fcbf53 DynamicRegisterInfo calculate offsets in separate function adds 141e45b99ca [RISCV] Optimize Branch Comparisons adds 2b8db40c921 [SVE] Restrict the usage of REINTERPRET_CAST. adds a5eb9df1e3b [Orc][NFC] Turn LLJIT member ObjTransformLayer into unique_ptr adds cf905274c6f [Orc] Allow LLJITBuilder's CreateObjectLinkingLayer to retu [...] adds 619eb147759 [NFC][RISCV] Remove useless code in RISCVRegisterInfo.td. adds bab121a1b66 [lldb][docs] Use sphinx instead of epydoc to generate LLDB' [...] adds 6edc3fe598a [Orc] Fix OrcV2Examples after D94690 adds 9d2053f61aa Revert "[lldb][docs] Use sphinx instead of epydoc to genera [...] adds aeaeb9e6bdc [clangd] Make ExpandAutoType not available on template params. adds c77c3d1d18c [clangd] Set correct CWD when using compile_flags.txt adds 4017c6fe7f1 [lldb][docs] Translate ASCII art to restructured text formatting adds 1dfd5c9ad8c [X86][AVX] combineHorizOpWithShuffle - support target shuff [...] adds e9f1ed2306b [WebAssembly] MC layer writes table symbols to object files adds 5e4480b6c0f [ARM] Don't run the block placement pass at O0 adds 0acc260b574 [mlir][linalg] Support generating builders for named op attributes adds 061d1520858 [SVE] Fix unused variable. adds d1862a16310 [OpenCL][Docs] Fixed malformed table in OpenCLSupport adds 791634b999e [clang][cli] Parse & generate options necessary for LangOpt [...] adds 5183a13d378 [X86] Add umin knownbits/demandedbits ult test for D94532 adds 17d0fb7f574 Set option default for enabling memory ssa for new pass man [...] adds 46aa3c6c331 [DAG] visitVECTOR_SHUFFLE - MergeInnerShuffle - improve shu [...] adds cf0173de69a [mlir] Add better support for f80 and f128 adds 5bf47e142b6 [libc] CopyAlignedBlocks can now specify alignment on top o [...] adds bf1aa5db5c7 [RISCV][NFC] Fix order of parameters in cmov ge/le tests adds 38326293304 [clang][cli] NFC: Add PIE parsing for precompiled input and IR adds a7dcd3aeb0f [clang][cli] NFC: Parse some LangOpts after the defaults are set adds 1744f4c6764 [clang][cli] NFC: Promote ParseLangArgs and ParseCodeGenArg [...] adds 1a497ae9b83 [ARM][Block placement] Check the predecessor exists before [...] adds be69e66b1cd [X86][SSE] Attempt to fold shuffle(binop(),binop()) -> bino [...] adds 1e1a011b09d [flang] Disallow INTENT attribute on procedure dummy arguments adds 4c5066b0789 [TargetLowering] Don't speculatively call ComputeNumSignBits. NFC adds b6e06a740c2 [flang][driver] Copy test file into a temp dir when testing (nfc) adds d5047d762f3 [clangd] Update CC Ranking model with better sampling. adds bc84f89c71a [OpenCL][Docs] Fixed cross-section reference in OpenCLSupport adds 6227069bdce [DebugInfo][CodeView] Change in line tables only mode to em [...] adds a0770f9e4e9 [ARM] Constant tripcount tail predication loop tests. NFC adds f5abf0bd485 [ARM] Tail predication with constant loop bounds adds cc90d41945f [MIPatternMatch] Add m_OneNonDBGUse adds d0cb0d30a43 [mlir] Add Complex dialect. adds 86e604c4d68 [RISCV] Add implementation of targetShrinkDemandedConstant [...] adds 84de4faf4ca GetMacosAlignedVersion() fails if sysctl is not setup adds 4f24d0dd538 Fix libc++ clang-cl build, swap attribute order adds a9e939760c6 [CodeGen] Removes unwanted optimisation for TargetConstantFP adds 1f21de535d3 [SLP] remove unused reduction functions; NFC adds a1be47b4771 [CodeView][DebugInfo] Add test case to show that linkage na [...] adds 64db296e5a8 Revert "[BasicAA] Handle recursive queries more efficiently" adds 61ec2280308 [NFC][SimplifyCFG] Add testcase showing that we fail to pre [...] adds b81f75fa791 [Utils] splitBlockBefore() always operates on DomTreeUpdate [...] adds c845c724c23 [Utils][SimplifyCFG] Port SplitBlock() to DomTreeUpdater adds 286cf6cb029 [SimplifyCFG] Port SplitBlockAndInsertIfThen() to DomTreeUpdater adds c6654a4cdab [SimplifyCFG][BasicBlockUtils] Port SplitBlockPredecessors( [...] adds a14c36fe27f [SimplifyCFG] switchToSelect(): don't forget to insert DomT [...] adds 6a42cbf6d21 [GWP-ASan] Add inbuilt options parser. adds 98c89ccfbd7 [MSVC] Don't add -nostdinc++ -isystem to runtimes builds adds 4a47da2cf44 [Sema] turns -Wfree-nonheap-object on by default adds ed0fd567ebd BreakCriticalEdges: do not split the critical edge from a C [...] adds d7bc3b7ce23 [mlir][Linalg] Add missing check to canonicalization of Gen [...] adds 10ac9b29a4c Skip 'g' packet tests when running on darwin; debugserver d [...] adds ceb3cdccd0f [SLP] remove dead code in reduction matching; NFC adds ceaf0110ff5 Revert "Revert "ADT: Fix reference invalidation in SmallVec [...] adds aa8a2d8a3da [AArch64][GlobalISel] Select immediate fcmp if the zero is [...] adds 76f5c5a7b05 [ADT][Support] Fix C4146 error from MSVC adds a1500105ee6 [SimplifyCFG] Optimize CFG when null is passed to a functio [...] adds e65b9b04cde Revert "[WebAssembly] MC layer writes table symbols to obje [...] adds 187d771d27e Revert "[WebAssembly] Add support for table linking to wasm-ld" adds d302398ff05 hwasan: Update register-dump-read.c test to reserve x23 ins [...] adds aa3d4d99395 [NFC] Disallow unused prefixes under MC/RISCV adds 1bd083b5d6d [flang] Create names to allow access to inaccessible specifics adds 3afbfb4145b [mlir][NFC] Move helper substWithMin into Affine utils adds 2a27a9819a1 [mlir][AsmPrinter] Properly escape strings when printing locations adds fd2083d73c2 [mlir] Fixing potential build break in my previous commit adds 999f5da6b30 [debugserver] Fix inverted if block that resulted in us usi [...] adds e8049dc3c8a [NewPM][Inliner] Move the 'always inliner' case in the same [...] adds 029c2257c21 [Inline] Fix a missing character in inline_stats.ll adds a396e2e088e [utils] Use llvm::sort (NFC) adds 4707b21298a [AMDGPU] Use llvm::is_contained (NFC) adds 8fd8ff1f67e [StringExtras] Rename SubsequentDelim to ListSeparator adds be68c9222b8 [NFC] Add -std=c11 to attr-availability.c adds a61e42efbb7 [NPM][Inliner] Temporarily remove inline_stats test case fo [...] adds 8456c3a7892 AArch64: fix regression introduced by fcmp immediate selection. adds 668827b6485 Introduce llvm.noalias.decl intrinsic adds b664bef2ad9 [InstCombine] Add a test file that contains safe select tra [...] adds e0a979ccadd [InstCombine] Add more tests to select-safe-transforms.ll (NFC) adds f0a0ec2d085 [InstCombine] Add more tests for select operand replacement (NFC) adds a7101450a42 [ASTMatchers] Add mapAnyOf matcher adds dbe056c2e37 [ASTMatchers] Make cxxOperatorCallExpr matchers API-compati [...] adds 4f155567317 [LegalizeDAG] Handle NeedInvert when expanding BR_CC adds e810e95e4bb [ASTMatchers] Add binaryOperation matcher adds b765eaf9a61 [ASTMatchers] Add support for CXXRewrittenBinaryOperator adds 25c1578a46f Fix llvm::Optional build breaks in MSVC using std::is_trivi [...] adds 9fc814ed596 [Tests] Added tests for new instcombine or simplification; NFC adds a4e2a5145a2 [InstSimplify] Add (~A & B) | ~(A | B) --> ~A adds 098dbf190a5 [RISCV] Correct alignment settings for vector registers. adds bdd4dda58b0 [InstSimplify] Update comments, remove redundant tests adds bca16e2fbb4 [LTO] Remove options to disable inlining, vectorization & G [...] adds ba0fc7e1f8d [StringExtras] Fix comment typos (NFC) adds 19aacdb715a [llvm] Construct SmallVector with iterator ranges (NFC) adds 2082b10d100 [llvm] Use *::empty (NFC) adds 416854d0f7c [InstSimplify] Precommit new testcases; NFC adds c1ab698dce8 [ARM] Remove LLC tests from transform/hardware loop tests. adds 372eb2bbb6f [ARM] Add low overhead loops terminators to AnalyzeBranch adds 63bedc80da3 [InstSimplify] Handle commutativity for 'and' and 'outer or [...] adds 48dbac5b6b0 [SLP] remove unnecessary use of 'OperationData' adds fcfcc3cc6b1 [SLP] fix typos; NFC adds 49b96cd9ef2 [SLP] remove opcode field from reduction data class adds ed939f853da [OpenMP] Added the support for hidden helper task in RTL adds d8fc27301d1 [mlir][sparse] improved sparse runtime support library adds bfd75bdf3fd [NFC] Removed extra text in comments adds 2a5b576e3ea [ARM] Test for aligned blocks. NFC adds 14547242153 [ARM] Align blocks that are not fallthough targets adds 32fc32317a3 [SimplifyCFG] markAliveBlocks(): catchswitch: preserve PostDomTree adds 5238e7b302f [InstCombine] Replace one-use select operand based on condition adds a048ce13e32 [X86] Default to -x86-pad-for-align=false to drop assembler [...] adds 633c5afccfb [RISCV] Remove unneeded StringRef to std::string conversion [...] adds 97f7e4e8c93 [RISC] Replace dyn_casts that are only checked by an assert [...] adds 2b6a92625fd [RISCV] Simplify mergeCondAndCode in RISCVCompressInstEmitt [...] adds 1327c730bb9 [RISCV] Few more minor cleanups to RISCVCompressInstEmitter. NFC adds 061f681c0df [RISCV] Remove an extra map lookup from RISCVCompressInstEm [...] adds 3cbd476c548 [VE] Support VE in libunwind adds 3809f4ebabd [ELF] Support R_PPC_ADDR24 (ba foo; bla foo) adds b1c2f1282a2 [BasicAA] Move assumption tracking into AAQI adds 0b84afa5fcb Reapply [BasicAA] Handle recursive queries more efficiently adds 9af03864df7 [clang-format] Revert e9e6e3b34a8e adds e7bc6c594b7 Reland [lldb][docs] Use sphinx instead of epydoc to generat [...] adds 00dc97f1670 [clang-format] PR48594 BraceWrapping: SplitEmptyRecord igno [...] adds 0f9908a7c9c [clangd] Use empty() instead of size()>0 adds 9abbc050974 [clangd] Use !empty() instead of size()>0 adds 4bfbfb9bcb7 [InstSimplify] Add tests for x*C1/C2<=x (NFC) adds a13c0f62c38 [InstSimplify] Fold x*C1/C2 <= x (PR48744) adds acdc7456892 [lldb][docs] Cleanup the Python doc strings for SB API classes adds 469ceaf5389 [Tests] Add test for PR45691 adds ed396212da4 [InstCombine] Transform abs pattern using multiplication to [...] adds 7e9e6ac526e [lldb][docs] Fix some RST formatting errors related to code [...] adds 352fcfc6978 [llvm] Use llvm::sort (NFC) adds a59126115e9 [IRBuilder] "Zero"-initialize SmallVector (NFC) adds 50be8e44715 [TableGen] Drop redundant const from return types (NFC) adds 9a7fb084877 NFC: Minor cleanup of function calls adds 1cc477f030b [SimplifyCFG] Add test for PR48778 (NFC) adds 4229b87ed36 [ValueTracking] Fix isSafeToSpeculativelyExecute for sdiv ( [...] adds a89242d874d [lldb] Skip TestPlatformProcessConnect on windows and darwin adds 95d146182fd Makefile.rules: Delete GCC 4.6 workaround adds f855751c128 Fix openmp CMake build on non-Linux AArch64 systems. adds 3bdf4507b66 [NFC] [TargetRegisterInfo] add one use check to lookThruCopyLike. adds b74ae43c44b Makefile.rules: Make HOST_OS/OS simply expanded variable to [...] adds a817f46d50c [JITLink][ELF] Skip DWARF sections in ELF objects. adds 2639c162b71 [InstCombine] more tests for D94861 (NFC) adds 2d9890775f5 [PowerPC] [NFC] Add AIX triple to some regression tests adds f776d8b12f0 [Legalizer] Promote result type in expanding FP_TO_XINT adds 7011086dc1c [test] Autogen a loop vectorizer test to make future change [...] adds 8356610f8d4 [test] pre commit a couple more tests for vectorizing multi [...] adds e5619065b8b [JITLink][ELF] New ELF skip-debug-sections test requires asserts. adds 26a396c4ef4 [PowerPC] support register pressure reduction in machine combiner. adds bcc1dee6001 [clang-format] Add StatementAttributeLikeMacros option adds cfec6cd50c3 [IR] Allow scalable vectors in structs to support intrinsic [...] adds 383b6501ffe [RISCV] Use tail agnostic policy for instructions with tied [...] adds f446fc5acf8 [lldb][docs] Resolve the remaining sphinx formatter warning [...] adds b9ce772b8fb [Object, llvm-readelf] - Move the API for retrieving symbol [...] adds b43075e34a5 [clang-format] Fix documentation of bcc1dee600 adds 6e75ee6b65c [lldb][docs] Use inline literals for code/paths instead of [...] adds 770d1e0a882 [X86][SSE] isHorizontalBinOp - reuse any existing horizontal ops. adds ac603c8d385 [RISCV] Add scalable vector truncate patterns adds 207f32948b2 [DAG] SimplifyDemandedBits - use KnownBits comparisons to r [...] adds aca240b4f69 [mlir] Fix cross-compilation (Linalg ODS gen) adds 3bd24574c7d Revert "[PowerPC] support register pressure reduction in ma [...] adds 83aa93e9954 [VectorUtils] Do not try to add indices matching tombstone/ [...] adds 9bf843bdc88 Revert "[OpenMP] Added the support for hidden helper task in RTL" adds 911961c9c13 [AMDGPU][MC][GFX10] Improved dpp8 errors handling adds 689aaba7acf [SystemZ][z/OS] Fix No such file or directory expression er [...] adds f7443905af1 [Statepoint] Handle `undef` operands in statepoint. adds 9399681a57c [Doc] Fix example in codegen doc. adds 36710c38c1b [NFC]Migrate VectorCombine.cpp to use InstructionCost adds e6d758de82b [InferAttrs] Mark some library functions as willreturn. adds ead71a23edd [PowerPC][AIX]Do not emit xxspltd mnemonic on AIX. adds 2040c1110b6 [CSInfo][MIPS] Update CSInfo in delay slot filler adds d1c4e859ce4 [SLP] reduce opcode API dependency in reduction cost calc; NFC adds 3dbbadb8ef5 [SLP] rename reduction query for min/max ops; NFC adds 55c557a5d25 [AMDGPU][MC] Refactored parsing of dpp ctrl adds 34a2c138c89 [LoopRotate] Precommit test for prepare-for-lto handling. adds 30b8f55378c Fix for sanitizer issue in 55c557a adds ce06475da94 [X86][AVX] IsElementEquivalent - add matchShuffleWithUNPCK [...] adds 63393828078 [WebAssembly] Add support for table linking to wasm-ld adds d806618636f [WebAssembly] MC layer writes table symbols to object files adds f5fcbe4e3c6 [AArch64] Further restricts when a dup(*ext) can be rearranged adds 16bf02c3a19 Reland "[AArch64] Attempt to sink mul operands"" adds 9f32f1d6fbf [MLIR] Support checking if two FlatAffineConstraints are equal adds 69295815ed9 [ARM] Update test target triple. NFC adds 275716d6db7 [clangd] Derive new signals in CC from ASTSignals. adds 1d04dc52dd2 [Coroutine] Do not CoroElide if there are musttail calls adds e7dc083a410 [ARM] Don't handle low overhead branches in AnalyzeBranch adds fa9851ebfee [MLIR] NFC: simplify PresburgerSet::isEqual adds a5a6164f6de [AArch64] Add test to check the attributes for some intrinsics. adds ca7e27054c2 [SLP] add more FMF tests for fmax/fmin reductions; NFC adds b42ff9fb038 [RISCV][NFC] Increase test coverage of Zbt extension adds 50ae6a3ac9b [AArch64] Make target intrinsics DefaultAttrIntrinsics. adds 2f92386e721 [LLD][ELF][AArch64] Set _GLOBAL_OFFSET_TABLE_ at the start of .got adds 291ac7e622d [AArch64] Revert back to Intrinsic<> for TME instructions. adds a58aceffad6 [lldb][docs] Use 'any' as the default role in LLDB's sphinx [...] adds 28ea50f524b [llvm] Populate std::vector at construction time (NFC) adds dc300beba7a [STLExtras] Add a default value to drop_begin adds 23b0ab2acb4 [llvm] Use the default value of drop_begin (NFC) adds 196cc96f9a6 [clang] Allow LifetimeExtendedTemporary to have no access s [...] adds 2c51bef76cb [RISCV] Add a test of vector sadd.overflow to demonstrate i [...] adds 5d431c3d32c Revert "[RISCV] Add a test of vector sadd.overflow to demon [...] adds 79e798aca38 Recommit "[RISCV] Add a test of vector sadd.overflow to dem [...] adds 01a13f127a8 [libc++] Rename check-cxx-deps to cxx-test-depends for consistency adds 417f6137432 [NFC] Update some mlir python documentation. adds 2776be43f0c [libc++] improve feature test macro script adds d9b6e4d583c NFC: Document current MLIR Python ODS conventions. adds aa3a59e0c69 [OpenMP][NFC] Fix test adds 22b68440e16 [PredicateInfo] Add more and/or tests (NFC) adds 1c314591536 [RISCV] Remove empty Sched instantiations from the end of I [...] adds 5b77ac32b11 [SLP] match maxnum/minnum intrinsics as FP reduction ops adds 2cb4a96a99e [libc++] NFCI: Refactor allocator_traits adds d27bb5c375c [x86] add cast to avoid compile-time warning; NFC adds fe301f47497 [LoopInfo] Fix a typo in compareLoops adds 395c737d9fc [SimplifyCFG] Update SimplifyBranchOnICmpChain to recognize [...] adds 9d81073acb4 [OpenMP][Docs] Fix typos in FAQ (NFC) adds 14573d44ae0 Regenerate the feature test macro unit-tests. NFCI. adds 0441df94ad8 [InstCombine,InstSimplify] Optimize select followed by and/or/xor adds 2d89ebd5d17 Address unused variable warning adds a9b3303a884 Revert "[NFC] [TargetRegisterInfo] add one use check to loo [...] adds c535a7fdadb [X86] Fix tile spill merge issue. adds bc713f6a004 PR48763: Better handling for classes that inherit a default [...] adds 61f69153e8d [PowerPC] Sign extend comparison operand for signed atomic [...] adds e147eccafa1 [X86][AMX] Clear AMX lit test case. adds e3065ce2384 DR2064: decltype(E) is only a dependent type if E is type-d [...] adds fbb83f18b54 PR24076, PR33655, C++ CWG 1558: Consider the instantiation- [...] adds 5a391d38ac6 Following up on PR48517, fix handling of template arguments [...] adds 4b574008aef [c++20] P1907R1: Support for generalized non-type template [...] adds 24672ddea3c [ORC] Move OrcError.h to include/llvm/ExecutionEngine/Orc/Shared. adds bfbbb62b22f [libc][NFC] Use ASSERT_EQ instead of EXPECT_EQ in fenv/exce [...] adds 7dadcd02d6c Fix a few GCC compiler warnings (NFC) adds ffb254978cf [libc][NFC][Obvious] Add a missing dep. adds 9a0900dc4c6 [NFC][AIX][XCOFF] Fix compile warning on strncpy adds 9cf511aa08a [RISCV] Add intrinsics for vector AMO operations adds a11f8b1ad66 [libc++] [P0935] [C++20] Eradicating unnecessarily explicit [...] adds d4bb3ef5327 [libc][NFC] Remove dead code adds e517dff50a4 [libc][NFC] remove dependency on non standard ssize_t adds b86e7ae66cb [clang][driver][NFC][obvious] Remove obsolete unistd.h include adds 418df4a6ab3 [WebAssembly] call_indirect issues table number relocs adds 831a143e50c [WebAssembly] Change prefix on data segment flags to WASM_D [...] adds 39a2a233f88 [clang][cli] Parse Lang and CodeGen options separately adds 7e1d2224b42 [X86][AMX] Fix the typo. adds c3ce2627949 [NFC] Make remaining cost functions in LoopVectorize.cpp us [...] adds 170199f5626 [llvm][nvptx] add atomicity to counter in ISelLowering adds 95b63c7b139 [ORC] Move LookupRequest from OrcShared to Orc. adds fb5b12e42ef [lit] Harmonize lit and llvm versionning adds a003f26539c [llvm] Prevent infinite loop in InstCombine of select statements adds c81ea9429f8 [RISCV] Add scalable-vector integer extension patterns adds 9a7672ac498 [lldb] Fix crash in "help memory read" adds 244ad228f34 [ARM][MachineOutliner] Add stack fixup feature adds 079e6646617 [lldb] Re-enable TestPlatformProcessConnect on macos adds e448ad787e1 [LLDB] Add support to resize SVE registers at run-time adds 4d3081331ad [LLDB] Test SVE dynamic resize with multiple threads adds 83daa49758a [LoopRotate] Add PrepareForLTO stage, avoid rotating with i [...] adds 49dce85584e [AMDGPU] Simplify AMDGPUInstPrinter::printExpSrcN. NFC. adds 58bdfcfac04 Revert 5238e7b302 "[InstCombine] Replace one-use select ope [...] adds 5626adcd6bb [X86][SSE] combineVectorSignBitsTruncation - fold trunc(srl [...] adds 11f4c58c153 [mlir] Add `complex.abs`, `complex.div` and `complex.mul` t [...] adds 87dfd5e012e [flang][driver] Add support for `-I` in the new driver adds b7e516202eb [DebugInfo][dexter] Add dexter tests for merged values adds 172f1f8952c [AArch64][SVE]Add cost model for vector reduce for scalable vector adds 2c4f6be86c1 [SystemZ][z/OS] Fix No such file or directory expression error adds 9a60ad216d2 [mlir] Clarify docs around LLVM dialect-compatible types adds a6f9077b16d [clang] Check for nullptr when instantiating late attrs adds 443d6957ca7 [flang][driver] Add support for fixed form detection adds d77a5720877 [DebugInfo][dexter] Tweak dexter test for merged values adds a60bc55c693 [OpenMP] libomp: cleanup parsing of OMP_ALLOCATOR env variable. adds 197d9a55f10 [flang][driver] Add standard macro predefinitions for compi [...] adds 1d37db6ef53 [llvm/Orc] Fix ExecutionEngine module build breakage adds ec877106a38 [ThinLTO] Also prune Thin-* files from the ThinLTO cache adds 93a873dfc9e [mlir][Affine] Revisit and simplify composeAffineMapAndOperands. adds 6259fbd8b69 AArch64: add apple-a14 as a CPU adds 3a56a96664d [mlir][spirv] Define spv.GLSL.Fma and add lowerings adds 626681b09a3 [lldb] Fix two documentation typos adds 2988f940d86 [X86] Regenerate fmin/fmax reduction tests adds c42f5ca3d84 [Flang][OpenMP] Add semantic checks for OpenMP Workshare Construct adds 3747b69b531 [LoopRotate] Calls not lowered to calls should not block rotation. adds 077a84f9114 [libc++] Sync TEST_HAS_TIMESPEC_GET and _LIBCPP_HAS_TIMESPE [...] adds 54e38440e74 [ARM] Expand add.sat/sub.sat cost checks. NFC adds 1a9b6e4a327 [WebAssembly][lld] Fix call-indirect.s test to validate adds 8bf7116d50b [clangd] Index local classes, virtual and overriding methods. adds 480643a95cd [CMake] Remove dead code setting policies to NEW adds 909d6c86eae [PowerPC] Fix the check for the instruction using FRSP/XSRS [...] adds 6bd0a4451cc [flang][directive] Get rid of flangClassValue in TableGen adds f373b30923d [ARM] Add MVE add.sat costs adds 15fd6bae0e4 [RISCV] Extend RVV VType info with the type's AVL (NFC) adds 2d911f7c72f [OpenMP] Fix atomic entries for captured logical operation adds de2f9423995 [AMDGPU] Simplify test case for D94010 adds 27820496a71 [MLIR][SPIRV] Add `SignedOp` trait. adds 0808c7009a0 [AMDGPU] Fix test case for D94010 adds 051ec9f5f43 [ValueTracking] Strengthen impliesPoison reasoning adds cbdde495ba2 [clang-format] Apply Allman style to lambdas adds 71b6b010e6b [mlir][python] Factor out standalone OpView._ods_build_defa [...] adds cea3abc26f7 [flang][driver] Move isFixedFormSuffix and isFreeFormSuffix [...] adds 3cae8b33297 [lldb][docs] Add a doc page for enums and constants adds 6a563eef132 [ARM] Expand vXi1 VSELECT's adds 2f809950903 [lldb][docs] Update .htaccess to redirect from old SB API d [...] adds 842314b5f07 [Polly] Update isl to isl-0.23-61-g24e8cd12. adds 88e7c3498c3 [SystemZ][z/OS] Fix Permission denied pattern matching adds 9c6a00fe99c [RISCV] Add ISel patterns for scalable mask exts & truncs adds cfc60730179 [GlobalISel] Combine (a[0]) | (a[1] << k1) | ...| (a[m] << [...] adds cbf52463599 Fix buildbot after cfc60730179042a93cb9cb338982e71d20707a24 adds 18cb7441b69 [AMDGPU] Simpler names for arch-specific ttmp registers. NFC. adds 17846ed5af4 [clangd] Use ASTSignals in Heuristics CC Ranking. adds 57443bfb4ab [Hexagon] Fix segment start to adjust for gaps between segments adds 987760b463c [www] Fix background color in table cell. adds 121cac01e8f [noalias.decl] Look through llvm.experimental.noalias.scope.decl adds 6f69f2ed61a Consider ASan messages interesting for creduce adds e678656625a Add bounds checking assertions to APValue, NFC adds 68dba7eae1d [libc++] Unbreak the debug mode adds 933518fff82 [libc++] Make LIBCXX_ENABLE_FILESYSTEM fully consistent adds 82e537a9d28 [Clang][OpenMP] Fixed an issue that clang crashed when comp [...] adds ce8b3937dda [RISCV] Add DAG combine to turn (setcc X, 1, setne) -> (set [...] adds a2317869098 [wasm][LLD] Rename --lto-new-pass-manager to --no-lto-legac [...] adds bedbb58203c [InstCombine] Add additional tests for select operand repla [...] adds 21443381c00 Reapply [InstCombine] Replace one-use select operand based [...] adds 7113de301a8 [ScalarizeMaskedMemIntrin] Add missing dependency adds 6ac9cb2a7c6 [libc++][P1679] add string contains adds a4b42c621b9 [llvm] Protect signpost map with a mutex adds d39adeaf440 [ELF] Improve R_PPC64_ADDR* relocation tests adds e12e0d66c03 [ELF] Error for out-of-range R_PPC64_ADDR16_HA, R_PPC64_ADD [...] adds 5fcb412ed08 [ELF] Support R_PPC64_ADDR16_HIGH adds 24e8e21f19f [flang] Refine WhyNotModifiable() adds 5b7aef6eb4b Revert "[PDB] Defer relocating .debug$S until commit time a [...] adds d8ffaa9f723 [NFC] cleanup noalias2.ll test adds e463bd53c03 Revert "[SLP]Merge reorder and reuse shuffles." adds 27afc091e2c [NFC] Disallow unused prefixes under Other adds cabe1b11243 [polly][NewPM][test] Fix polly tests under -enable-new-pm adds b272698de79 [OPENMP]Do not use OMP_MAP_TARGET_PARAM for data movement d [...] adds 7bd3702b640 [libc] Extend the current fenv functions to aarch64. adds 5a684b70dc7 Ensure we don't strip the ConstantExpr carrying a non-type [...] adds da986511fb9 Revert "DR2064: decltype(E) is only a dependent type if E i [...] adds b99147b4fa7 [lld][WebAssembly] Don't defined indirect function table in [...] adds 894d88a759c [mlir][python] Add facility for extending generated python ODS. adds ce24bb0edda [ASTMatchers] NFC Rearrange declarations to allow more arg [...] adds be7352c00d5 [mlir][splitting std] move 2 more ops to `tensor` adds 34714553844 [lldb/test] Skip TestProcessAttach: test_attach_to_process_ [...] adds ecf696641e6 [ASTMatchers] Allow use of mapAnyOf in more contexts adds e75a4b6ea9e [RISCV] Remove NotHasStdExtZbb predicate from zext.h/sext.b [...] adds 18e093faf72 [msabi] Mangle a template argument referring to array-to-po [...] adds 8d112a8eda9 Remove TypedMatcherOps from VariantValue adds 22eb1cf89f3 Remove unused functions. adds 0cd0eb6e0a8 Add API to retrieve a clade kind from ASTNodeKind adds 96ef4f307df Revert "[WebAssembly] call_indirect issues table number relocs" adds 1bf2b1665b4 Implement constant folding for DivFOp adds 21b1ad0340a [SampleFDO] Add the support to split the function profiles [...] adds 3729ee89394 Fix Wmissing-field-initializers warnings. adds 68a1f09107a [xray] Honor xray-never function-instrument attribute adds be59bac184e [gn build] (manually) port 933518fff82c adds 7f36df0fb19 [gn build] fix libcxx gn file with libcxx_abi_namespace set adds b62c7e04742 [mlir][python] Swap shape and element_type order for MemRefType. adds 233106269db [llvm-link] Improve link time for bitcode archives [NFC] adds daeea961a6d [llvm-profgen][NFC] Fix the incorrect computation of callsi [...] adds 4479c0c2c0b Allow nonnull/align attribute to accept poison adds 4dae2247fd6 [RISCV] refactor VPatBinary (NFC) adds 2e74a277566 [SimplifyCFG] Reapply update_test_checks.py (NFC) adds 88572024892 [llvm] Use llvm::find (NFC) adds 978c754076e [llvm] Use llvm::any_of (NFC) adds b023cdeacce [llvm] Use llvm::all_of (NFC) adds b5c542d64b9 [mlir][sparse] add narrower choices for pointers/indices adds 8031785f4a7 [ELF][test] Improve --wrap tests adds f96ff3c0f8e [ELF] --wrap: Produce a dynamic symbol for undefined __wrap_ adds 8ca4b174d70 [RISCV] Implement vlseg intrinsics. adds e22295385c7 [X86] Add segment and address-size override prefixes adds 7fce3b240b6 [lldb][docs] Remove -webkit-hyphens in table cells so that [...] adds 3c69ff4b03a [lldb][docs] Filter out 'thisown' attribute and inheritance [...] adds 255a507716b [NFC][InstructionCost] Use InstructionCost in lib/Transform [...] adds b3c260d8fa0 [lldb][docs] Expand CSS fix for LLDB doc tables adds 2aeaaf841b5 [GlobalISel] Add missing operand update when copy is required adds 4ab704d6282 [AMDGPU][MC] Add tfe disassembler support MIMG opcodes adds e20d46628a3 [clang][cli] Port more options to new parsing system adds fc6677f0bba [Test Commit] This is a test commit for https://reviews.llv [...] adds 536a1b0ea21 [clangd] Allow CDBs to have background work to block on. adds de4ba7073bd [clangd] Move DirBasedCDB broadcasting onto its own thread. adds e6be5c7cd6d [clangd] Remove the recovery-ast options. adds 2ab5fd2c856 [clangd] Retire some flags for uncontroversial, stable features. adds a6a72dfdf2e [AMDGPU][GlobalISel] Avoid selecting S_PACK with constants adds c1bc7981bab [Coroutine] Remain alignment information when merging frame [...] adds 29aaae28140 [PostRASched] Regenerate Whole Test with update_llc_test_checks.py adds cf50f4f7645 [mlir] Link mlir_runner_utils statically into cuda/rocm-run [...] adds 43f34f58349 Added check if there are regions that do not implement the [...] adds eff6e75c3f7 [LLD][ELF] Correct test temporary file paths adds eee2e8813f8 [LV] Add test cases with multiple exits which require versioning. adds f07403eb1a5 [llvm-symbolizer][doc] Reorder --relativenames in options list adds a1d4649a5b1 [clangd] Fix division by zero when computing scores adds f344c028dea [AArch64] Add missing "pauth" feature to the .arch_extensio [...] adds cab20f61057 [AArch64] Add missing "flagm" feature to the .arch_extensio [...] adds cba1ca90258 Fix cuda-runner tests. adds 42830f8bdc8 [clangd] Extend find-refs to include overrides. adds 985b9b7e421 [PM] Avoid duplicates in the Used/Preserved/Required sets adds 5d718374a68 [SCEV] Add a test with wrong exit counts. (NFC) adds 21bfd068b32 [AArch64] Add support for the GNU ILP32 ABI adds c056f824340 [TableGen] Improve algorithm for inheriting class template [...] adds 19d02842ee5 [X86][AVX] Fold extract_subvector(VSRLI/VSHLI(x,32)) -> VSR [...] adds 4f5f29d4097 Revert "[TableGen] Improve algorithm for inheriting class t [...] adds 8ba442bc213 Revert "Following up on PR48517, fix handling of template a [...] adds cad4275d697 [DAGCombiner] Enable SimplifyDemandedBits vector support fo [...] adds 8000c778532 Make it possible to store a ASTNodeKind in VariantValue adds 537d90db827 [libc++] Split re.alg tests into locale-dependent and indep [...] adds e069662deb1 [libomptarget][devicertl] Wrap source in declare target pragmas adds e377c8eeb4a Implement dynamic mapAnyOf in terms of ASTNodeKinds adds 40cd262c433 Loop peeling: check that latch is conditional branch adds 6c1bc0d24ce [docs] Fix overly specific link to uploading patches on Pha [...] adds 8590d245434 [SLP] move reduction createOp functions; NFC adds 1c54112a576 [SLP] refactor more reduction functions; NFC adds c09be0d2a0f [SLP] reduce reduction code for checking vectorizable ops; NFC adds c540ce9900f [AMDGPU] pin lit test divergent-unswitch.ll to the old pass [...] adds fd70f70d1e0 [OpenMP][NVPTX] Replaced CUDA builtin vars with LLVM intrinsics adds 7dd198852b4 [mlir][Affine] Add support for multi-store producer fusion adds b11b6ab3e09 [RISCV] Add way to mark CompressPats that should only be us [...] adds cad16e4a926 Avoid unused variable warning in opt mode adds 4c1eaf26ae7 [mlir] fix the rocm runtime wrapper to account for cuda / r [...] adds 7169d3a315f [lldb/Commands] Refactor ProcessLaunchCommandOptions to use [...] adds 719b563ecf6 [PowerPC][Power10] Exploit splat instruction xxsplti32dx in [...] adds cc4244d55f9 [MLIR][Standard] Add log1p operation to std adds 36e62b1ff7e [AArch64] Fix -Wunused-but-set-variable in GCC -DLLVM_ENABL [...] adds b8b5e87e6b8 [X86][AVX] Handle vperm2x128 shuffling of a subvector splat. adds 9d792fef577 [RISCV] Remove unnecessary APInt copy. NFC adds 16d6e852718 [BuildLibcalls] Mark some libcalls with inaccessiblememonly [...] adds 69e0bc77a5d [COFF] Use range for on relocations, NFC adds b270fd59f0a Revert "[clang] Change builtin object size when subobject i [...] adds a51226057fc Revert "[DAGCombiner] Enable SimplifyDemandedBits vector su [...] adds e8aec763a57 [NPM][Inliner] Factor ImportedFunctionStats in the InlineAdvisor adds ff3b51b0549 [flang] Fix ASSOCIATE statement name resolution adds d97f776be5f Revert "[NPM][Inliner] Factor ImportedFunctionStats in the [...] adds b3e73dc5af6 [lld-macho][easy] Create group for LLD-specific CLI flags adds 697f4e429b9 [lld-macho] Run ObjCContractPass during LTO adds 560d7e04113 [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets adds f5d8eb085af [mlir][Linalg] NFC - getAssumedNonShapedOperands now return [...] adds 11802eced5d [WebAssembly] Prototype new f64x2 conversions adds 8776e3f289c [EXTINT][OMP] Fix _ExtInt type checking in device code adds b564b12bc66 [flang][driver] Refactor one unit-test case to use fixtures (nfc) adds ca4ed1e7aee [PredicateInfo] Generalize processing of conditions adds ea616f9026d [libomptarget][devicertl][nfc] Remove some cuda intrinsics, [...] adds 9e708ac6b99 [COFF] Fix relocation offsets in pdb-file-statics test input adds 599fdfc5db8 Revert "[lldb] Re-enable TestPlatformProcessConnect on macos" adds fbc1dcb9465 [libomptarget][devicertl][nfc] Simplify target_atomic abstraction adds c075572646a [mlir][Linalg] NFC - Expose getSmallestBoundingIndex as an [...] adds 1a9bd5b8132 Reland "[PDB] Defer relocating .debug$S until commit time a [...] adds e406de77c6f [PredicateInfo][SCCP][NewGVN] Add tests for logical and/or (NFC) adds 8fc9b6c2c56 [lldb/Commands] Align process launch --plugin with process [...] adds 1c6d1e57c15 [PredicateInfo] Handle logical and/or adds 866cb260390 [mlir] Fix SubTensorInsertOp semantics adds b1e1bbae0e3 [mlir] Add ComplexDialect to SCF->GPU pass. adds 8dd58a509cc [mlir][Linalg] NFC - Fully compose map and operands when cr [...] adds 0996b590aaa [flang] Infrastructure improvements in utility routines adds a3d7cee7f9b [CodeView] Emit function types in -gline-tables-only. adds 33a5d212c61 [OpenMP][NVPTX] Added forward declaration to pave the way f [...] adds bebbe64075a [flang] Fix creation of deferred shape arrays by POINTER statement adds 95ce32c7878 [NFC] Move ImportedFunctionsInliningStatistics to Analysis adds 36b05d2e9f5 [gn build] Port 95ce32c7878d adds a2223b09b10 [mlir:async] Fix data races in AsyncRuntime adds ccec2cf1d9d Reland "[NPM][Inliner] Factor ImportedFunctionStats in the [...] adds 7b5d7c7b0a2 [hip] Fix `<complex>` compilation on Windows with VS2019. adds 079967cdf9e [NFC][AMDGPU] Document target ID syntax for code object V2 to V3 adds 555a395f2cc [mlir] NFC - Fix unused variable in non-debug mode adds 6afdf13ae4c Makefile.rules: Avoid redundant .d generation (make restart [...] adds 045d84f4e6d D94954: Fixes Snapdragon Kryo CPU core detection adds 5959c28f248 [mlir][sparse] add asserts on reading in tensor data adds 735a07f0478 Revert "[mlir][Affine] Add support for multi-store producer [...] adds 0f8386c4f6a [RISCV] Add addu.w and slliu.w test that uses getelementptr [...] adds e996f1d4194 [RISCV] Add another isel pattern for slliu.w. adds bb3f169b59e [BuildLibcalls, Attrs] Support more variants of C++'s new, [...] adds 1df0dbfcb5c [libc][NFC] add "LlvmLibc" as a prefix to all test names adds 689de5841c1 [libc][NFC][obvious] fix the names of MPFR tests adds 87a89549c4b [NFC] Minor cleanup for ValueHandle code. adds 6ccf2d62b48 [mlir] Add an interface for Cast-Like operations adds c78219f644c [mlir] Add a new builtin `unrealized_conversion_cast` operation adds 8a7ff7301a6 [mlir] Make MLIRContext::getOrLoadDialect(StringRef, TypeID [...] adds 825c2b4a41c [mlir][OpFormatGen] Fix incorrect kind used for RegionsDirective adds 96296d9220e [DAGCombiner] Precommit test case for D95086 adds 3809e5dac96 [Clang][OpenMP] Use `clang_cc1` test for `declare_target_de [...] adds 34e8fcf63f8 [lld-macho] Add dependency on ObjCARC to fix shared build adds bff389120fa Fix a bug with setting breakpoints on C++11 inline initiali [...] adds f86db34defc [MSan] Move origins for overlapped memory transfer adds 98feb08e449 Use CXX_SOURCES and point to the right source file. adds f354b87df23 [dsymutil] Compare object modification times using second p [...] adds 6cab3f88ee4 [RISCV] Use update_llc_test_checks.py to regenerate check l [...] adds baf6c2987e5 [lldb] Upstream eCore_arm_arm64e enum value in ArchSpec adds 47228f78546 [RISCV] Implement vsseg intrinsics. adds e5e329023bb [RISCV] Implement vlsseg intrinsics. adds a8b96eadfd9 [RISCV] Implement vssseg intrinsics. adds d6bb96e6777 [X86] Add experimental option to separately tune alignment [...] adds 8f5da41c4d1 [llvm] Construct SmallVector with iterator ranges (NFC) adds e53472de688 [Transforms] Use llvm::append_range (NFC) adds 6de4865545d [llvm] Use hasSingleElement (NFC) adds dd8ae42674b [IndirectFunctions] Skip propagating attributes to address [...] adds 51f4958057d [yaml2obj/obj2yaml] - Improve dumping/creating of ELF versi [...] adds 20013d02f33 [X86][AMX] Fix tile config register spill issue. adds dd5c9828047 [llvm-nm][ELF] - Make -D display symbol versions. adds 71635ea5ffd MCDwarf: Delete uneeded parameter adds fc58bfd02f8 [mlir] Remove complex ops from Standard dialect. adds bee486851c1 [LoopUnswitch] Implement first version of partial unswitching. adds facea4a2d4f [clangd] Fix a missing override keyword, NFC. adds 64132f541ed Revert "[X86][AMX] Fix tile config register spill issue." adds 86021d98d3f [X86] Avoid a std::string copy by replacing auto with const [...] adds bc9ab9a5cd6 [DAG] CombineToPreIndexedLoadStore - use const APInt& for g [...] adds ff41ae8b367 MC: AArch64: Add support for gotpage_lo15 adds 99b7b41edf4 [lldb][import-std-module] Do some basic file checks before [...] adds 060b51e0524 [lldb] Make TestBSDArchives a no-debug-info-test adds ed2853d2c82 Reland [lldb] Fix TestThreadStepOut.py after "Flush local v [...] adds 935bacd3a72 [DAG] SimplifyDemandedBits - correctly adjust truncated shi [...] adds 0ca81b90d19 [X86][SSE] Add uitofp(trunc(and(lshr(x,c)))) vector test adds 294e2544c99 Add log1p lowering from standard to NVVM intrinsics adds 69bc0990a91 [DAGCombiner] Enable SimplifyDemandedBits vector support fo [...] adds 4ef38f9c125 Add log1p lowering from standard to ROCDL intrinsics adds 2b4716d6dff [MC] Use std::make_tuple to make some toolchains happy again adds 070af1b7887 [InstCombine] avoid crashing on attribute propagation adds 726de41e2bf [clang][AST] Add get functions for CXXFoldExpr paren locations. adds 37510f69b4c [lldb][NFC] Fix build with GCC<6 adds 20566a2ed82 AMDGPU: Add occupancy to serialized MachineFunctionInfo adds e4eaf9d8206 [OpenMP] Add support for mapping names in mapper API adds 0eeb15741bd [flang][driver] Make the driver report diagnostics from the [...] adds dfac521da1b [ARM] Fix vector saddsat costs. adds ba7dcd8542a [AMDGPU] Implement mir parseCustomPseudoSourceValue adds 35c535a7df3 AArch64/GlobalISel: Factor out parametersInCSRMatch adds 48c54f0f623 [OpenMP][NVPTX] Added forward declaration for atomic operations adds 2a0db8d70ee AMDGPU: Use more accurate fast f64 fdiv adds 94375d1083c AMDGPU: Remove v_rsq_f64 patterns adds c0b3c5a0645 [AMDGPU][GlobalISel] Run SIAddImgInit adds 4234292ecf4 [mlir][SPIRV] Rename OpSpecConstantOperation -> OpSpecConstantOp adds 615167c9f74 [mlir]][SPIRV] Define OrderedOp and UnorderedOp and add low [...] adds 9dd5aea1e03 [RISCV] Make LMUL field in VTYPE continuous. adds aba24c1580c [flang][driver] Move fixed/free from detection out of Front [...] adds 266820be352 [RISCV] Add new V instructions in v1.0-08a0b46. adds f3b979b65e9 [libc++] Use ioctl when available to get random_device entropy. adds 4dbdff66fed Revert "[AMDGPU] Implement mir parseCustomPseudoSourceValue" adds 6b7645dd31e [OpenMP] Add time profiling support in libomp adds b8921af63b0 [RISCV] Update V instructions constraints to conform to v1.0 adds b3a5abcb369 [NFC][Doc] Mention SystemZ supports StackMap generation adds a75840a09c6 [flang] Better C_LOC and C_ASSOCIATED in flang/module adds 127091bfd5e [CUDA] Normalize handling of defauled dtor. adds 119a9ea13f9 [OpenMP] Fix failing test due to change in offloading flags adds f2fd41d7897 X86: Fix use-after-realloc in X86AsmParser::ParseIntelExpression adds 65fd034b95d [FunctionAttrs] Infer willreturn for functions without loops adds 8e0b1793153 [ELF] report section sizes when output file too large adds d77753381fe [SLP] simplify reduction matching adds 4ab0f51a751 Recommit "[RISCV] Legalize select when Zbt extension available" adds d7ff0036463 ADT: Fix reference invalidation in SmallVector::emplace_bac [...] adds 8827e07aaf2 Remove deprecated methods from OpState. adds bfec9148a04 Scalar: Don't visit constants in findInnerReductionPhi in L [...] adds 2f03528f5e7 [SLP] rename reduction variable to avoid shadowing; NFC adds 39db5753f99 [LV][ARM] Inloop reduction cost modelling adds 39239f9b566 [lldb-vscode] improve modules request adds 866d480fe05 [libc++abi] Add an option to avoid demangling in terminate. adds bd3a387ee76 Revert [mlir] Link mlir_runner_utils statically into cuda/r [...] adds d75b3719828 [WebAssembly] Test that invalid symbol/relocation types gen [...] adds 1deee5cacbb Fix crash when emitting NullReturn guards for functions ret [...] adds 922b26cde4d Add Python bindings for the builtin dialect adds d38be2ba0e4 [llvm-mca] Initial implementation of serialization using JS [...] adds cfe9ccbddd9 [libc++abi] Simplify scan_eh_tab adds 0cd1e47327e [gn build] Port d38be2ba0e4e adds b0143352634 [libc] Distinguish compiler and run failures adds b7ab6726b6d [RISCV] New vector load/store in V extension v1.0 adds 04af1ca2e90 [llvm-mca] Forgot a couple of override specifiers. adds 6e360460f14 [RISCV] Use v8-v23 as argument registers to conform to the [...] adds 3738447c96c [flang] Address name resolution problems adds 020c00b5d3d [llvm-mca] Test case was missing a triple. adds 0cfadb37f4f [flang] Allow NULL() actual argument for pointer dummy adds 1be2524b7d2 [libcxx] Check return value for asprintf() adds 2de5ea3b3ed [flang] Fix bogus error message with binding adds 8120cfedf55 [NFC] [TargetRegisterInfo] add another API to get srcreg th [...] adds 3b5430eb0da [RISCV] Add a VL output to vleff intrinsics. adds c6e8f81410a [llvm-mca] Addressing build failures due to missing overrid [...] adds 0a7a1ac73d0 [mlir] Support FuncOpSignatureConversion for more FunctionL [...] adds 3d349ed7e11 [CodeGen][ObjC] Fix broken IR generated when there is a nil [...] adds b6c3a59c3f5 [AMDGPU] Test case demonstrating issues with generation of [...] adds 449f2f7140e [PowerPC] Duplicate inherited heuristic from base scheduler adds bd3ca6666d1 [Inlining] Delete redundant optnone/alwaysinline check adds bea661d9a52 [RISCV] Add intrinsics for RVV 1.0 vrgatherei16 adds 976cf53cc7a [RISCV] Add intrinsics for vector unordered indexed load in [...] adds 96677503315 [RISCV] Add intrinsics for RVV1.0 VFRSQRTE7 & VFRECE7 adds 3dedad475da [AArch64][GlobalISel] Make G_USUBO legal and select it. adds f8f1b20e6b3 [RISCV] Don't create LMUL=8 pseudo instructions for ternary [...] adds 5d354220d44 [RISCV] Correct DWARF number for vector registers. adds be611431cd1 [NewPM][opt] Run the "default" AA pipeline by default adds c5c4dbd2790 [CodeGen] Use llvm::append_range (NFC) adds cfa241680fd [llvm] Don't include StringSwitch.h where unnecessary (NFC) adds 551aaa24afe [llvm] Use isDigit (NFC) adds aee622fa200 [mlir] Enable passing crash reproducer stream factory method adds ba9b4ea4eea Revert "[NewPM][opt] Run the "default" AA pipeline by default" adds a11bf9a7fbd [AMDGPU][Inliner] Remove amdgpu-inline and add a new TTI in [...] adds c042aff8860 [NFC] Disallow unused prefixes under llvm/test adds b0e89906f5b [ASTReader] Allow controlling separately whether validation [...] adds f9b5f6937eb [JITLink][ELF/x86-64] Range check 32-bit relocs. adds 6699029b67b [NewPM][opt] Run the "default" AA pipeline by default adds f374138058b [test] Make incorrect-exit-count.ll work under NPM adds 16d4bbef30a [mlir][Linalg] Introduce linalg.pad_tensor op. adds 2cb130f7661 [mlir][StandardToSPIRV] Add support for lowering uitofp to SPIR-V adds 541d98efa22 [AArch64][GlobalISel] Implement widenScalar for signed overflow adds 5660dc5968e [TargetLowering] Simplify some code in SimplifySetCC that t [...] adds c971bcd2102 [AMDGPU] Test clean up (NFC) adds f20bb857add Update filename to workers.py file in documentation adds 75f10c95747 NFC: Remove simple_ilist comment mentioning ilist/iplist al [...] adds c953a833470 [TargetLowering] Use getBoolConstant instead of assuming ze [...] adds ff5f42e4133 [clang][cli] Port visibility LangOptions to marshalling system adds 4edb63bbbe3 [RISCV] Fix intrinsic CodeGen test cases for vrgather adds ff8a1cae181 [AMDGPU] Fix the inconsistency in soffset for MUBUF stack a [...] adds 3e8d1e8b12b [APSInt][NFC] Clean up doxygen comments adds 2e080eb00ad [SVE] Add support for scalable vectorization of loops with [...] adds 14eea6b0ecd [LegacyPM] Update InversedLastUser on the fly. NFC. adds 3b1f17ca549 [JITLink][ELF/x86-64] Add support for weak and hidden symbols. adds 83e7a96c068 Fix build failure caused by 2e080eb00ad76654313e0e119bb7fa0 [...] adds 481659c55c4 [X86][SSE] Add v16i8 02_20_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu [...] adds 636b87785c1 [X86][SSE] Add PR48823 HSUB test case adds 8214982b504 [AMDGPU] Implement mir parseCustomPseudoSourceValue adds 509741382f6 [gn build] Port 8214982b5042 adds 176c7f22172 [IR] Optimize adding attribute to AttributeList (NFC) adds 476de8cea35 [ARM] Add new and regenerate SSAT tests. NFC adds 4cca2222793 [clangd] Add documentation for building and testing clangd adds 9ae73cdbc1e [ARM] Adjust isSaturatingConditional to return a new SDValue. NFC adds ffe72f987f4 [X86][SSE] Don't fold shuffle(binop(),binop()) -> binop(shu [...] adds 5dbe5d2c912 [DAG] Commute shuffle(splat(A,u), shuffle(C,D)) -> shuffle' [...] adds def99ad68bc [NFC] Add CMakeUserPresets.json filename to .gitignore adds d972d4c7490 Revert "[clang] Suppress "follow-up" diagnostics on recover [...] adds e16959c9b85 Don't delete default constructor of PathDiagnosticConsumerOptions adds a0e30914f8c [clang][Tooling] Get rid of a hack in SymbolOccurrences, NFCI adds a4914dc1f2b [SLP] do not traverse constant uses adds b1166e1317c [X86][AVX] combineX86ShufflesRecursively - attempt to const [...] adds 7388c346859 [clangd][SwapIndex] ensure that the old index is alive whil [...] adds 60cd75a098d [clangd] Inject context provider rather than config into Cl [...] adds 2a8cbdd8300 [LTO] Add support for existing Config::Freestanding option. adds b46545542b3 Avoid fragile type lookups in GDB pretty printer adds af033249840 [ARM] Disable sign extended SSAT pattern recognition. adds 98a8344895a [clang][ASTImporter] Add support for importing CXXFoldExpr. adds 0895b836d74 [SimplifyCFG] FoldBranchToCommonDest(): don't deal with unc [...] adds aabed3718ae [NFCI-ish][SimplifyCFG] FoldBranchToCommonDest(): really do [...] adds 256a0357524 [NFC][SimplifyCFG] FoldBranchToCommonDest(): unclutter Cond [...] adds 7b89efb55e4 [NFC][SimplifyCFG] FoldBranchToCommonDest(): somewhat bette [...] adds b482560a597 [NFC][SimplifyCFG] FoldBranchToCommonDest(): extract check [...] adds efeb8caf8bd [NFC][SimplifyCFG] FoldBranchToCommonDest(): extract the ac [...] adds 4ed0d8f2f07 [NFC][InstCombine] Extract freelyInvertAllUsersOf() out of [...] adds 62604906b5b [NFC][InstCombine] Add tests for `(~x) &/| y` --> `~(x |/& [...] adds 79b0d21ce92 [InstCombine] Fold `(~x) & y` --> `~(x | (~y))` iff it is f [...] adds d1a6f92fd54 [InstCombine] Fold `(~x) | y` --> `~(x & (~y))` iff it is f [...] adds 85e7578c6db Revert "[NFCI-ish][SimplifyCFG] FoldBranchToCommonDest(): r [...] adds 9b19ecb8f1e [libomptarget][devicertl] Drop templated atomic functions adds 87b628dadde [coro.async] Make sure we process async coroutines adds c8b4337911f [LoopUnswitch] Add test cases with atomic loads & call adds 86991d32313 [LoopUnswitch] Fix logic to avoid unswitching with atomic loads. adds 02e174e8f77 [flang] Fix typo in error message adds 4846f6ab815 [X86][AVX] combineTargetShuffle - simplify the X86ISD::VPER [...] adds c33d36e0667 [X86][AVX] canonicalizeLaneShuffleWithRepeatedOps - handle [...] adds bd122f6d217 [X86][AVX] canonicalizeLaneShuffleWithRepeatedOps - handle [...] adds 06f8a496939 [SystemZ][z/OS] Fix No such file or directory expression error adds 622eaa4a4ce [HIP] Support __managed__ attribute adds 14056dfb4dc [MLIR] Add support for extracting an integer sample point ( [...] adds 1b535df1ccd [mlir][StandardOps] Fix typos in the td file. adds d24b94f070f [ELF] --wrap: retain __wrap_foo if foo is defined in an obj [...] adds edbcc17b7a0 [OpenMP] libomp: properly initialize buckets in __kmp_depha [...] adds 03b6dc30053 [libc++] Fix broken build when merging libc++abi into libc+ [...] adds 7143b630175 [llvm-mca] Adding local lit config file for X86 targets adds cc77a2c7685 [mlir] Add coro intrinsics operations to LLVM dialect adds dc057e87f6c [LLDB] Fix how ObjCBOOLSummaryProvider deals with BOOL adds 167fb9b4b43 [mlir][spirv] Fix script for availability autogen and refresh ops adds 59bf9a89d82 [flang] Remove some needless operations in expr rewriting adds e27197f3605 [mlir][spirv] Define spv.IsNan/spv.IsInf and add lowerings adds e679eea6d20 [InstCombine] add tests for abs(sext X); NFC adds 411c144e4c9 [InstCombine] narrow abs with sign-extended input adds 07f1e1f44c8 [flang] Correct shape analysis for transformational intrins [...] adds 520b5ecf856 [SystemZ][z/OS] Fix No such file or directory expression er [...] adds f187d64c80a [flang][nfc] Fix comments, remove needless API, tweak script adds 8aa3ee241d5 [CSSPGO] LTO option for pseudo probe adds bce318f58da [mlir][Linalg] NFC: Refactor LinalgDependenceGraphElem to a [...] adds 3317b38ef86 [NFC][libc++] Update the implementation status. adds 01defcc8d74 [mlir][Linalg] Extend tile+fuse to work on Linalg operation [...] adds 73de3df1d28 Add more explicit assert for failures adds faa440786cc [libc++] Bring back mach_absolute_time implementation of st [...] adds 45b259f9950 [SimplifyLibCalls] Skip unused calls in sincos transform adds 975086b10a6 Remove obsolete TODOs adds 29d420e0bf0 [mlir][OpFormatGen] Add support for anchoring optional grou [...] adds 72f863fd37c [CodeGen] Use getCharWidth() more consistently in CGRecordL [...] adds ea2cfda386f [CGExpr] Use getCharWidth() more consistently in CCGExprCon [...] adds b973e2e2f27 [libc++] Introduce __bits adds 42d682a217b [NewPM][AMDGPU] Skip adding CGSCCOptimizerLate callbacks at O0 adds 9d2796210f7 [Tests] Add willreturn to libcalls in some tests adds 6aced6bf396 [RISCV] Rename pcnt->cpop to match 0.93 bitmanip spec. adds b2f859500f1 [RISCV] Remove addiwu, addwu, subwu, subuw, clmulw, clmulrw [...] adds d985c7321f0 [RISCV] Swap encodings of max and minu to match 0.93 bitman [...] adds b825278364d [RISCV] Rename mnemonics slliu.w->slli.uw and addu.w->add.u [...] adds 4e6ad11bc6f [RISCV] Add Zba feature and move add.uw and slli.uw to it. adds 83a93ae63b1 [RISCV] Add SH*ADD(.UW) instructions to Zba extension based [...] adds 1355458ef66 [RISCV] Move Shift Ones instructions from Zbb to Zbp to mat [...] adds efbcd66861d [RISCV] Rename Zbs instructions to start with just 'b' inst [...] adds 9d499e037e6 [RISCV] Modify add.uw patterns to put the masked operand in [...] adds 5ae92f1e11a [RISCV] Change zext.w to be an alias of add.uw rd, rs1, x0 [...] adds 83c92fdeda6 [RISCV] Move pack instructions to Zbp extension only. adds 3c94cee63b4 [RISCV] Add zext.h instruction to Zbb. adds 4d5aa760a7d [RISCV] Add support for rev8 and orc.b to Zbb. adds f25f7e8ecd9 [RISCV] Add xperm.* instructions to Zbp extension. adds 20f2e32d2c5 [RISCV] Update B extension version to 0.93. adds 430d43e010b [mlir][Linalg] Disable fusion of tensor_reshape op by expan [...] adds fdab28edef3 [InstSimplify] Add willreturn to more libcall tests (NFC) adds 99a0aa07e9f [Analysis] Support AIX vec_malloc routines adds 095e245e164 [RISCV] Add isel patterns for SH*ADD(.UW) adds d6c763e0985 [Inline] Precommit tests for dead calls and willreturn. adds 083088d136b [gn build] Port 622eaa4a4cea adds 041f3ee664c [lld-macho] Ignore -lto_library adds 607e5a5000b [RISCV] Add B extension tests to make sure RV64 only instru [...] adds 2bb92bf451d [GlobalISel] LegalizerHelper - Extract widenScalarAddoSubo method adds 0be9ca7c0f9 [VFS] Fix inconsistencies between relative paths and fallthrough. adds 9bd8bcf993f [NFC][SimplifyCFG] PerformBranchToCommonDestFolding(): fix [...] adds e8387500059 [NFC][SimplifyCFG] fold-branch-to-common-dest.ll: reduce co [...] adds eae1cc0de5b [NFC][SimplifyCFG] PerformBranchToCommonDestFolding(): move [...] adds 17422038442 [SimplifyCFG] FoldBranchToCommonDest(): re-lift restriction [...] adds 554b3211fef Revert "[GlobalISel] LegalizerHelper - Extract widenScalarA [...] adds e3a7532cc95 Revert "[AArch64][GlobalISel] Implement widenScalar for sig [...] adds 19ec559c665 Revert "[AArch64][GlobalISel] Make G_USUBO legal and select it." adds 0cc38acfc4e [Matrix] Propagate shape information through fneg adds 6e8ef3b76ab [mlir][Linalg] Make Fill operation work on tensors. adds d65e8ee507f [RISCV] Add more cmov isel patterns to handle seteq/ne with [...] adds 6ef95056b9d [RGT][ADT] Remove test assertion that will not be executed adds 3a50ed84f48 [lldb] FixFileSystem::GetExternalPath for VFS API change adds 6ea7ecbb72a [RGT] Don't use EXPECT* macros in a subprocess that exits b [...] adds 25fefa5a098 [RGT][TextAPI] Remove a zero-trip loop and the assertions w [...] adds d18c3c7b18e [CodeComplete] Add ranged for loops code pattern. adds e92be7cd9f0 PR47682: Merge the DeclContext of a merged FunctionDecl bef [...] adds 607bec0bb9f Change materializeFrameBaseRegister() to return register adds ca904b81e64 [AMDGPU] Fix FP materialization/resolve with flat scratch adds ad25bdcb8e4 Change static buffer to be BSS instead of DATA in HandlePac [...] adds 47e95e87a3e [libomptarget] Build cuda plugin without cuda installed locally adds ba5628f2c2a ADT: Use 'using' to inherit assign and append in SmallString adds ef51eed37b7 [LoopDeletion] Handle inner loops w/untaken backedges adds 97e33feb08a [RISCV] Implement vloxseg/vluxseg intrinsics. adds a41cb92eb81 [RISCV] Add RV32 test cases for vluxseg. adds b23fe6ff6ff [RISCV] Add RV64 test cases for vluxseg. adds 9e5beadf180 [RISCV] Add RV32 test cases for vloxseg. adds c28bbd97a15 [RISCV] Add RV64 test cases for vloxseg. adds 66a49aef690 [RISCV] Implement vsoxseg/vsuxseg intrinsics. adds a2875500378 [RISCV] Add RV32 test cases for vsuxseg. adds 438e118c29a [RISCV] Add RV64 test cases for vsuxseg. adds 408ed11c85d [RISCV] Add RV32 test cases for vsoxseg. adds dc94cecac03 [RISCV] Add RV64 test cases for vsoxseg. adds 480cbed31e7 [OpenMP] Remove unnecessary pointer checks in a few locations adds 867bdfeff17 [InstCombine] remove incompatible attribute when simplifyin [...] adds bd64ad3fe17 Recommit "[AArch64][GlobalISel] Make G_USUBO legal and select it." adds eda973bbc7a [ELF][test] Add a test about --exclude-libs applying to ver [...] adds 6fe193bf271 [test] Add -mtriple adds dd922bc2a62 [LSan] Introduce a callback mechanism to allow adding data [...] adds 147c0c263d8 [TargetLowering] Use isOneConstant to simplify some code. NFC adds 6c435645303 [Coroutine] Improve coro-elide-musttail.ll test adds 018984ae683 [PowerPC] Fix va_arg in C++, Objective-C on 32-bit ELF targets adds a3254904b28 [Analysis] Use llvm::append_range (NFC) adds 5f843b2dd2e [llvm] Use isAlpha/isAlnum (NFC) adds 49231c1f808 [llvm] Use static_assert instead of assert (NFC) adds 596d534ac35 [ASan] Stop blocking child thread progress from parent thre [...] adds 267a57a6457 [llvm-link] Fix for an assertion when linking global with a [...] adds d4ce0623400 [RISCV][PrologEpilogInserter] "Float" emergency spill slots [...] adds 344afa853fc [Support] TrigramIndex::insert - pass std::String argument [...] adds 2b9a834c43c [InlineFunction] Use llvm.experimental.noalias.scope.decl f [...] adds 08dbcc14e25 [LTO] Store target attributes as vector of strings (NFC). adds a49a3a3ed56 [LSR] Add test for PR46943 (NFC) adds 2325157c056 [Clang] Move assembler into a separate file adds dbf87da739b [gn build] Port 2325157c0568 adds 022da61f6b3 [SimplifyCFG] Change 'LoopHeaders' to be ArrayRef<WeakVH>, [...] adds 0057cc5a215 Revert "[Clang] Move assembler into a separate file" adds d5c4de40c67 [gn build] Port 0057cc5a215e adds 5997e8987f6 [lldb/Lua] add initial Lua typemaps adds 2bbc762b8ff [lldb/Lua] add 'Lua' before naming versions adds 25531a1d965 [AVR] Optimize 8-bit logic left/right shifts adds 292077072ec [Local] Treat calls that may not return as being alive. adds 39e1e53a7c1 [SLP] add reduction test with mixed fast-math-flags; NFC adds a6f02212764 [SLP] fix fast-math-flag propagation on FP reductions adds 1eb8c5cd35e [AVR] Optimize 16-bit comparison with constant adds 757b93bb7b3 [ASan] Fix broken Windows build due to 596d534ac3524052df21 [...] adds a8e06361ddb [libc++] Implements concept destructible adds d60b74c28a0 [InstCombine] Set MadeIRChange in replaceInstUsesWith. adds 2f1ffa94d74 [llvm] Forward-declare ICFLoopSafetyInfo (NFC) adds cc7a2382865 [Target] Use llvm::append_range (NFC) adds 1238378f185 [llvm] Use pop_back_val (NFC) adds a5b895110f0 [Polly] Gist new access relations using the SCoP context. adds de0457a013a [Polly] Clean up hasFeasibleRuntimeContext. adds 02e8a5ad3c7 [Polly] Allow param sets for dumpPw(). adds 3b9677e1ece [Polly] Track defined behavior for PHI predecessor computation. adds 166d40f2ed3 [FuzzMutate] Add mutator to modify instruction flags. adds 99d5fad7a5c [libc++] Remove invalid C++20 code from a test. adds e4847a7fcf7 Revert "[Target] Use llvm::append_range (NFC)" adds 5ad038aafa3 [Clang][OpenMP][NVPTX] Replace `libomptarget-nvptx-path` wi [...] adds 5c62d661312 [SimplifyCFG] Regenerate test checks (NFC) adds cd3d80eaceb [PhaseOrdering] Add tests for PR44461 and PR48844 (NFC) adds 78b0630b72a [libomptarget][cuda] Call v2 functions explicitly adds a22ba5afc8d [test] Pin dead-calls-willreturn.ll to legacy PM adds c37dd3b6d55 [NewPM][opt] Make -enable-new-pm default to LLVM_ENABLE_NEW [...] adds c83cff45c7a [IR] Add NoAliasScopeDeclInst (NFC) adds a4e6c2e647b [NFC][SimplifyCFG] Extract PerformValueComparisonIntoPredec [...] adds 67f9c87a651 [NFC][SimplifyCFG] Perform early-continue in FoldValueCompa [...] adds 6f2753273ee [NFC][SimplifyCFG] Extract CloneInstructionsIntoPredecessor [...] adds 52586c46b08 [mlir][CAPI] Add result type inference to the CAPI. adds dc70c56be59 [libomptarget][amdgpu][nfc] Update comments adds d2927f786e8 [RISCV] Add isel patterns to remove (and X, 31) from sllw/s [...] adds 5a73daf9078 [RISCV] Add test cases for SRO/SLO with shift amounts maske [...] adds 998057ec06a [RISCV] Add isel patterns to remove masks on SLO/SRO shift [...] adds 92bb81aac1f [SystemZ][ZOS] Provide PATH_MAX macro for libcxx adds c7d5d8fa33a [RISCV] Group some Zbs isel patterns together and remove a [...] adds b7dee667b64 [OpenMPIRBuilder] Implement tileLoops. adds b890fafe672 [OpenMPIRBuilder] Silence compiler warning. NFC. adds 2a4acf3ea8d [AVR] Optimize 8-bit int shift adds 45ad6fac6ad [JITLink] Use edge kind names for fixups in EHFrameEdgeFixer. adds c50457f3e42 [RISCV] Make the code in MatchSLLIUW ignore the lower bits [...] adds 5d12b976b00 [ValueTracking] Don't assume readonly function will return adds c3074d48d38 [libomptarget][nvptx] Replace cuda atomic primitives with c [...] adds b3d7e761e34 [examples] Fix "Target does not support MC emission!" in Ho [...] adds 774629641bf [LoopUnroll] Use llvm.experimental.noalias.scope.decl for d [...] adds 659c7bcde62 [LoopRotate] Use llvm.experimental.noalias.scope.decl for d [...] adds dcc7706fcf2 [InstCombine] Remove unused llvm.experimental.noalias.scope.decl adds 06ab7953e98 [AArch64] Saturating add cost tests. NFC adds 1bc8daba4fa Fix x86 exegesis tests after c042aff8860df3cad2b274bf0a495e [...] adds 77adbe6a8c7 [SLP] fix fast-math requirements for fmin/fmax reductions adds f959d8195da [LTO] Move DisableVerify setting to LTOCodeGenerator class (NFC). adds 4cc94b73134 [CostModel] Tests for showing the cost of intrinsics from t [...] adds 8b9df70bf7e [Utils] Use NoAliasScopeDeclInst in a few more places (NFC) adds cfd978d5d3c [OpenMP] Fixed test environment of `check-libomptarget-nvptx` adds e5e448aafa7 [libomptarget][cuda] Fix build, change missed from D95274 adds 116177afcce [RISCV] Use SRLIWPat in the PACKUW pattern. adds d44ca0cf2f6 [CodeGen] Forward-declare TargetMachine (NFC) adds 054444177b1 [Target] Use llvm::append_range (NFC) adds 16baad8f4e0 [llvm] Use pop_back_val (NFC) adds 50830e50031 [lldb] Add -Wl,-rpath to make tests run with fresh built libc++ adds 2afaf072f5c Implement vAttachOrWait adds f3f3c9c2549 [RISCV] Fix name of Zba extension (NFC) adds e841bd5f335 [ARM] Extra MVE unaligned VLDn tests. NFC adds 60ebf6408e9 [RISCV] Add test cases for missed opportunities to use fcvt [...] adds f22aa8f8793 [RISCV] Add test cases for missed opportunities to use *W i [...] adds 12d0753aca2 [RISCV] Use bitsLE instead of strict == MVT::i32 in asserts [...] adds afd483e57d1 [RISCV] Add support for Zvamo/Zvlsseg to driver adds a80ebd01798 [AMDGPU] Fix llvm.amdgcn.init.exec and frame materialization adds f4537935dcd Suppress non-conforming GNU paste extension in all standard [...] adds 0ed4cf4bf3b [PowerPC] support register pressure reduction in machine combiner. adds b3fcc72eb07 Fix sign-comparison warnings in unit test EXPECTs adds 78d41a1295d lldb: Add support for printing variables with DW_AT_ranges [...] adds fd226c9b028 [mlir][Python] Roll up of python API fixes. adds 89a5147e5a0 [clang][AVR] Improve avr-ld command line options adds ffc3e800c65 [NFC] [DAGCombine] Correct the result for sqrt even the ite [...] adds 6884fbc2c4f [JITLink] Enable exception handling for ELF. adds 8fbc1437c60 [AArch64] Merge [US]MULL with half adds and subs into [US]ML[AS]L adds 46ec0254a97 [clang][cli] NFC: Move prefix to the front of BoolOption adds 209f4618891 [clang][cli] NFC: Pass CC1Option explicitly to BoolOption adds 01d9f13c3a5 Revert "[clang][AVR] Improve avr-ld command line options" adds f00a20e51c1 [clang-format] Add the possibility to align assignments spa [...] adds 7b9d88ab389 Revert "[clang-format] Add the possibility to align assignm [...] adds 256314711f3 [clang-format] Add the possibility to align assignments spa [...] adds c6bd6607bf8 Fix a build-bot failure. adds d5bbaaaf957 [XRay] Make __xray_customevent support non-Linux adds d745b82de1d [XRay] Support DW_TAG_call_site and delete unneeded PATCHAB [...] adds 5e7a93a954e [libc++] Set CMAKE_FOLDER. NFC. adds 666815d61bc [RISCV] Implement new architecture extension macros adds a7c1239f374 [RISCV] Add attribute support for all supported extensions adds 815dd4b2920 [AArch64] Add Cortex CPU subtarget features for instruction [...] adds 3747eb9c85b [mlir][Linalg] Add a padding option to Linalg tiling adds 7e5d41a6825 [clang] NFC: Remove else if after return adds b37a349ff24 [lld][ELF][test] Add testing for IE/LD TLS weak undef references adds 33a63a36d3c [clang-format] [docs] Fix RST indentation. adds 9c89dcf8073 [yaml2obj, obj2yaml] - Implement section header table as a [...] adds c8d2ae52c15 [clang] NFC: Remove else-after-return pattern from some files adds 19245b78157 [ObjectYAML] - An attempt to fix BB after commit of D95140. adds 6367306a1be [mlir] Perfectly forward ImplicitLocOpBuilder ctors to OpBuilder adds da489946a9d [llvm-dwp] Automatically set the target triple adds fde24661718 [SelectionDAG] Support scalable-vector splats in more cases adds 8fdd5784f0d [OpenCL][Docs] Describe tablegen BIFs declarations. adds d196f9e2fca [InstructionCost] Prevent InstructionCost being created wit [...] adds 9641bd0f87d [TableGen] RuleMatcher::defineComplexSubOperand avoid std:: [...] adds f461e35cbaf [X86][AVX] combineX86ShuffleChain - avoid bitcasts around i [...] adds 8e3adda820e [flang][driver] Remove newline in CompilerInvocation adds 14947cd0470 [clang] Fix signedness in vector bitcast evaluation adds 1b780cf32e3 [X86][AVX] LowerTRUNCATE - avoid bitcasts around extract_su [...] adds 171d12489f2 [SLPVectorizer] NFC: Migrate getVectorCallCosts to use Inst [...] adds 1c8f199f449 [flang][driver] Update PP tests to use the new driver adds dbf9bedf407 [mlir][Linalg] Add a hoistPaddingOnTensors transformation adds b16fb1ffc3c Revert "[clang] Fix signedness in vector bitcast evaluation" adds 07b60d00606 [InstCombine] add tests for min/max intrinsics with extende [...] adds 09a136bcc69 [InstCombine] narrow min/max intrinsics with extended inputs adds d6d36baa33e Add a --use-color option to clang-query to allow forcing th [...] adds 84851a274e2 Revert "[SystemZ][z/OS] Fix No such file or directory expre [...] adds 978444d531d Revert "[SystemZ][z/OS] Fix No such file or directory expre [...] adds 821a51a9cac [X86][AVX] combineX86ShuffleChainWithExtract - widen to at [...] adds 68eee55ce6a [mlir][Linalg] Address missed review item adds d462aa5a619 [clang] Fix a nullptr dereference bug on invalid code adds 52e25523a98 [mlir][Linalg] Fix incorrect erase order adds 7163aa99906 [NFC] Fix title comment typo and provide description for LL [...] adds 05d5125d8a9 [mlir] Generalize OpFoldResult usage in ops with offsets, s [...] adds 3201274dea6 [VPlan] Handle scalarized values in VPTransformState. adds 3546b372219 [Doc][NFC] Fix Kaleidoscope links, typos and add blog posts [...] adds 00054382b95 [clangd] Fix a crash when indexing invalid ObjC method declaration adds 7e506b30a1e [clangd] Allow diagnostics to be suppressed with configuration adds 6e530a3dac0 [Verifier] enable and limit llvm.experimental.noalias.scope [...] adds 13f2aee7831 [X86][AVX] Generalize vperm2f128/vperm2i128 patterns to sup [...] adds 3b5d36ece21 [Verifier] disable llvm.experimental.noalias.scope.decl dom [...] adds b45020cf63f [LLDB] Remove leftovers and typos from RegisterInfos_arm64_sve.h adds 2fd4d923a82 [LLDB] Define AUXV_AT_HWCAP2 in AuxVector.h adds e9a3fac76cf [LLDB] Skip TestPlatformProcessConnect on arm/aarch64 buildbot adds f80782590c6 Revert "[JITLink] Enable exception handling for ELF." adds 558b3bbb5b6 [AMDGPU][MC] Improved errors handling for SDWA operands adds 95f0d1edafe [libomptarget] Compile with older cuda, revert D95274 adds 51faba35fd8 [libc++] Implement P0655R1 visit<R>: Explicit Return Type f [...] adds 17c3538aef6 Revert "Fix unused variable in CoroFrame.cpp when building [...] adds e123cd674c0 [OpenCL] Refactor of targets OpenCL option settings adds e9cc5fef646 [scudo][standalone] Enable death tests on Fuchsia adds 193cda105d9 [libc++][doc] Update the release notes. adds 4eb4f8963f1 [RISCV] Use sign extend for i32 arguments and returns in ma [...] adds 93eef7d8e97 [OpenMP][NFC] Fix SourceInfo.h variable names adds 9390b85ac6a [ARM] Use half directly for args/return types in test. NFC adds 3395a336b02 [clang-format] add case aware include sorting adds 3fbd3eaf28c [libc++] Implement [P0769] "Add shift to algorithm" (shift_ [...] adds c4355670b4b [Sema] Fix an assertion failure in -Wcompletion-handler adds f851db3dae5 [libc++] [P0879] constexpr std::reverse, partition, *_permutation. adds c3324450b20 [clang] Add -fprofile-prefix-map adds 1e739552ee9 [mlir] Use more C99 comments in C API header files adds 1150bfa6bb0 [PowerPC] Add missing negate for VPERMXOR on little endian [...] adds 299b0e5ee9e [lld] Consistent help text for `--save-temps` adds c9cd9a00663 [SampleFDO] Report error when reading a bad/incompatible pr [...] adds c8fc5c0385d [mlir][Affine] Add support for multi-store producer fusion adds 988a5334ed4 [Win64] Ensure all stack frames are 8 byte aligned adds 9d509587575 [libc++] Fix build after 51faba35fd81fbd3af407a29c136895a718ccd96 adds 239cfbccb05 [RISCV] Custom type legalize i8/i16 UDIV/UREM/SDIV on RV64 [...] adds f05b492aae4 [clangd][NFC] Simplify handing on methods with no params adds 27cc4a8138d [OpenMP][NVPTX] Rewrite CUDA intrinsics with NVVM intrinsics adds f5c7c031e24 [mlir] Add C API for IntegerSet adds d36812892c1 [GVN] do not repeat PRE on failure to split critical edge adds 4bb6244871c [ThreadPlan] fix exec on Linux adds 76afbf60ed7 [VPlan] Replace uses with new value in VPInstructionsToVPRe [...] adds 9946b169c37 [lit] Use os.cpu_count() to cleanup TODO adds 9d9ceb37453 Revert "[clangd][NFC] Simplify handing on methods with no params" adds 53176c16806 [ObjC][ARC] Annotate calls with attributes instead of emitt [...] adds 6cb28879712 [clang-format] [NFC] Use some constexpr StringRef adds 7c8b9c102f3 [clang-format] [NFC] Restructure getLineCommentIndentPrefix adds 9aa38a06151 [clang-format] [NFC] Remove unsued arguments adds 60bf5826cfd [clang-format] PR16518 Add flag to suppress empty line inse [...] adds f02eca0f3fe [clang-format] [NFC] Rerun dump_format_style.py adds a206d991f96 libcxx: Try to fix build after D92044 adds 12b34ffc35f [gn build] Port e123cd674c02 adds 71af5a19cba Reland"[clangd][NFC] Simplify handing on methods with no params" adds 0f0462cacf3 [vscode] Improve runInTerminal and support linux adds f05dc40c31d Fix SBDebugger::CreateTargetWithFileAndArch to accept LLDB_ [...] adds 2cdb34efdac Revert "[IndirectFunctions] Skip propagating attributes to [...] adds 12049d88859 Fix 0f0462cacf34aa88ae71a13c4199c1b1e70f3ee6 adds db1a7089eaf Revert "[lit] Use os.cpu_count() to cleanup TODO" adds f50b8ee71fa [YAML I/O] Fix bug in emission of empty sequence adds d987b61b1dc [flang] Search for #include "file" in right directory adds 03f1c9fa85d [flang] Fix errors in ISO_FORTRAN_ENV module for REAL128 adds 925ae8c790c Revert "[ObjC][ARC] Annotate calls with attributes instead [...] adds aa8f3677f79 Recommit "[AArch64][GlobalISel] Implement widenScalar for s [...] adds 3680cb99a77 [clangd] ignore parallelism level for quick tasks adds 9c53b8e52e0 [mlir:Async] Add intermediate async.coro and async.runtime [...] adds 1ac36b34db8 Fix 0f0462cacf34aa88ae71a13c4199c1b1e70f3ee6 adds 15141cd115e [RISCV] Add RVV insertelt/extractelt scalable-vector patterns adds 835104a1141 [LSR] Drop potentially invalid nowrap flags when switching [...] adds 118c33ef47a [clangd] Allow configuration database to be specified in config. adds 1fba21778f8 Follow on to: f05dc40c31d1883b46b8bb60547087db2f4c03e3 adds b43c26d036d Restore GNU , ## __VA_ARGS__ behavior in MSVC mode adds 50337fb933e Fix runInTerminal errors on ARM adds 68466861283 Fix -Wmissing-override in lldb adds 080952a9447 Support: Remove duplicated code in {File,clang::ModulesDepe [...] adds c0e94e99747 [clang][Fuchsia] Add relative-vtables + asan multilibs adds 3333244d77c [OpenMP][deviceRTLs] Remove omp_is_initial_device adds ce7f9cdb50a [InlineAdvisor] Allow replay of inline decisions for the CG [...] adds 532e4203c5b [lldb/Lua] add support for Lua function breakpoint adds eace81c48f7 [AMDGPU] Added -mcpu=tahiti to 3 tests. NFC. adds 91b61abafb5 [NFC] Disallow unused prefixes in clang/test/Analysis adds 3dd5ea9dd8d [lld-macho] Link against ObjCARCOpts instead of ObjCARC adds 5b648df1a84 AMDGPU: Reduce the number of expensive calls in SIFormMemoryClause adds 15f66cf7496 [RISCV] Add isel patterns to optimize slli.uw patterns with [...] adds c9466ede7e8 Revert "Revert "[GlobalISel] LegalizerHelper - Extract wide [...] adds 70e251497c4 DebugInfo: Generalize the .debug_addr minimization flag to [...] adds f9b6fd269b6 [libc++] Support immovable return types in std::function. adds ea87cf2acd8 [TargetLowering][RISCV] Don't transform (seteq/ne (sext_inr [...] adds 8b6aedc4c99 ExpressionParser: Migrate to FileEntryRef in ParseInternal, NFC adds d37b5393e89 [mlir:Async] Use LLVM coro operations in async.coro lowering adds cda4d3d37f1 [JITLink] Re-apply 6884fbc2c4f (ELF eh support) with fix fo [...] adds 46b1645e6c4 SourceManager: Unify FileEntry/FileEntryRef versions of cre [...] adds 8d67b9e2461 SourceManager: Migrate to FileEntryRef in getOrCreateConten [...] adds 350395d82fd [x86] Fix trivial typo in emmintrin.h adds 6f1d4fb8fc5 [lit] Update lit.py shebang for Python3 adds 03bce0bf4e3 [GlobalISel][Localizer] Don't localize phi operands which a [...] adds f4d02fbe418 Frontend: Take VFS and MainFileBuffer by reference in Preco [...] adds 4b6d7fdd207 [libcxx] random_device, for OpenBSD specify optimal entropy [...] adds 8b117148857 Revert "Fix SBDebugger::CreateTargetWithFileAndArch to acce [...] adds 13cedcaf453 [llvm-link] Fix crash when materializing appending global adds 231a82a150b [X86] Correct some cross references in avxintrin.h. adds fafd45c01f3 [libomptarget][cuda] Gracefully handle missing cuda library adds 8018f731f02 [PowerPC] Do not emit HW loop with half precision operations adds 236b0d04078 [JITLink] Disable ELF_ehframe_basic.s test on Windows. adds 2ba1f9c4e0e [Test][AArch64] Move overflow add/sub tests to their own file. NFC adds fdbfda2178a [Test][AArch64] Add s32 legalizer test for UADDE/USUBE adds 357eea6e8bf Revert "[libomptarget][cuda] Gracefully handle missing cuda [...] adds 9d64275ae08 [OpenMP] Added the support for hidden helper task in RTL adds 5d3f3d3a059 [TableGen] Use llvm::append_range (NFC) adds 772134e3ec4 [StackSafety] Use ListSeparator (NFC) adds c85b6bf33c4 [AMDGPU] Forward-declare MachineIRBuilder (NFC) adds b69932b550a [RISCV] Implement vlsegff intrinsics. adds f19849a07b6 [RISCV] Update V extension to v1.0-draft 08a0b464. adds bd756286d2e [OpenMP][FIX] Enforce a function boundary for a new data en [...] adds 8c7fdc4c61b [OpenMP] Add source location information to the libomptarge [...] adds a2914e0c158 [mlir][Python] Fix comments of 'getCapsule' and 'createFrom [...] adds 84c6f325840 [Object][WebAssembly] Update format of error messages adds d705c2fbd48 Revert "[WebAssembly] MC layer writes table symbols to obje [...] adds 90ebc489ded Add vp2intersect to AVX512 dialect. adds b61639985e2 [clang][cli] NFC: Simplify BoolOption API adds e72b22a40b0 [RISCV] Define different pseudo instructions for different FPR. adds 2154cffdc2a [clang][cli] Store LangStandard::Kind in LangOptions adds 956d8e02e8a [clang][cli] Port GNU language options to marshalling system adds 9338f3a586b [clang][cli] Accept strings instead of options in ImpliedByAnyOf adds 64cdba65bbf [clangd] Fix filename completion at the end of file adds b3b0acdc6fb [NFC] Refine some uninitialized used variables. adds bfc60acd980 [RISCV] Adjust RISCVInstrInfoVSDPatterns.td for different p [...] adds e98d5c31925 [libObject,llvm-readelf/obj] - Don't use @@ when printing v [...] adds 68dbd1aefe5 [clangd] Add include-fixer fixit for no_member_template dia [...] adds db92d47cf70 [llvm-nm][ELF] - Use @@ prefix when printing default versions. adds 029644ee510 [yaml2obj] - Refine how we set the sh_link field. NFCI. adds 7025fef3f65 [clang][cli] Port GPU-related language options to marshalli [...] adds 2a33b092f5b [LLDB][test] - Fix test after yaml2obj change. adds 2d7aa149a40 [update_llc_test_checks] Support AVR adds 510b3d4b3e0 [llvm-nm] Silence a gcc warning about a stray semicolon. NFC. adds d5e48f1347d [yaml2obj][obj2yaml] - Improve how we set/dump the sh_entsi [...] adds 2f7baffdc13 [mlir:async] Use ODS to define async types adds 6d5c1cd2aba Revert "[clang-format] add case aware include sorting" new 7c164a92250 [SVE] Fix some logical arithmetic tests new 25f80e16d10 [mlir] Async: add a separate pass to lower from async to as [...] new 745064e36b8 [AMDGPU][MC] Refactored exp tgt handling new 988cc0a0833 [LLD][ELF][AArch64] Add support for R_AARCH64_LD64_GOTPAGE_ [...] new 91bd1156f3b [mlir] drop unused statics new 4a63e53373f [LIBOMPTARGET]FIX define declaration, NFC new b3e0135a6f2 [JITLink][ELF/x86-64] When building PLT stub, use -4 offset [...] new 476abdb562d [ORC] Fix debug logging message. new 028d7a36681 Remove requirement for -maltivec to be used when using -mab [...] new e878589098c Revert "[flang] Search for #include "file" in right directory" new 4dc110a4b83 [ORC] Attempt to auto-claim responsibility for weak defs in [...] new 35b3989a30e [Passes] Run peeling as part of simple/full loop unrolling. new 608ac62540a [AMDGPU] Fix use of HasModifiers in VopProfile new b36370d1533 [AMDGPU] Add IntrWillReturn to three intrinsics new b9417c3616d [CostModel] Handle CTLZ and CCTZ in getTypeBasedIntrinsicInstrCost new 110837fbf6a Fix signed/unsigned comparison warning. NFCI. new b2b2aa1c607 [LoopUnswitch] Add some additional tests. new 1272f16d142 [LoopUnswitch] Avoid partially unswitching too aggressively. new 551a69e4184 AMDGPU: Clear IsSSA property in SIFormMemoryClauses new 94cf89d1c2c [libomptarget][NFC] Fixed obsolete function names in comments new ee3da8958a6 [AMDGPU] Fix null-dereference static analysis warnings. NFCI. new feb0b4ec0a4 [Sema] diagnoseEquivalentInternalLinkageDeclarations - asse [...] new 80966447a20 [mlir][nfc] Move `getInnermostParallelLoops` to SCF/Transfo [...] new 0c0d009a88f [NFC] Disallow unused prefixes under clang/test/CodeGen new f82cff31d35 [AMDGPU] HSAMD::fromString - replace std::string arg with S [...] new 879c12d95a2 Fix null dereference static analysis warning. NFCI. new 09b1c56366b [LoopUtils] do not initialize Cmp predicate unnecessarily; NFC new 00773ef78aa [LoopVectorize] add test for fmin/fmax FMF propagation; NFC new b208e5bcd0b [mlir] Add Python bindings for IntegerSet new 9190f17a7cc [clangd] Add std::size_t to StdSymbol mapping new 90b8ae016bc [lldb] Remove unused ThreadPlanStack::GetStackOfKind (NFC) new 7c03f7d7d04 [OpenMP][deviceRTLs] Build the deviceRTLs with OpenMP inste [...] new 92d1195b5f7 AMDGPU: Add assertion to determineCalleeSaves new 5f9707b7960 AMDGPU: Fix redundant FP spilling/assert in some functions new 8262cd8a0e2 [mlir] Set CUDA/ROCm context before creating resources. new 48e09faa945 [lldb][NFC] Another attempt to fix GCC 5.x compilation new 302432f75da Reland "[lit] Use os.cpu_count() to cleanup TODO" new 1d6df1fcf0a [mlir] sret and byval now require a type argument when cons [...] new f9d7f77267b [RISCV] Have customLegalizeToWOp truncate to the original t [...] new dad55c22182 [ARM] [ELF] Fix ARMMaterializeGV for Indirect calls new d92413a45e2 [clangd] Selection handles CXXBaseSpecifier new 7730599c416 [clangd] FindTarget resolves base specifier new 32cc5564e27 [libomptarget][devicertl][amdgpu] Fix build, variable renam [...] new 4edf35f11a9 Support for instrumenting only selected files or functions new 96f09aa2fb1 [gn build] Port 4edf35f11a9e new 683719bc0cc [OpenMP][Libomptarget] Introduce changes to support remote plugin new 2291bd137d1 [AMDGPU] Update subtarget features for new target ID support new 31d375f178c CGDebugInfo: Drop Loc.isInvalid() special case from getLineNumber new 189f311130d CGDebugInfo CreatedLimitedType: Drop file/line for RecordTy [...] new d2abd62b9d1 [flang][openacc][NFC] Organize clause validity tests by directive new 7636b1f6efd Make SBDebugger::CreateTargetWithFileAndArch work with lldb [...] new 1e634f3952a Revert "Support for instrumenting only selected files or fu [...] new 34b60d8a568 Add -fbinutils-version= to gate ELF features on the specifi [...] new 4210b87020b [libc++] Fix oss-fuzz build new 15313f64be9 [llvm-elfabi] Support ELF file that lacks .gnu.hash section new ec8f4a38c83 [OpenMP][Libomptarget] Introduce Remote Offloading Plugin new fdeffd6fb0c [libomptarget][cuda] Only run tests when sure there is cuda [...] new 7baff00eeed [libomptarget][cuda] Gracefully handle missing cuda library new 79ce46e2753 [llvm-elfabi] Fix test after D95140 The 59 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .github/lockdown.yml | 8 + .gitignore | 5 + clang-tools-extra/clang-query/Query.cpp | 3 +- clang-tools-extra/clang-query/tool/ClangQuery.cpp | 21 + .../abseil/StringFindStrContainsCheck.cpp | 59 +- .../abseil/UpgradeDurationConversionsCheck.cpp | 4 +- .../abseil/UpgradeDurationConversionsCheck.h | 5 +- clang-tools-extra/clangd/AST.cpp | 25 +- clang-tools-extra/clangd/ASTSignals.cpp | 42 + clang-tools-extra/clangd/ASTSignals.h | 39 + clang-tools-extra/clangd/CMakeLists.txt | 1 + clang-tools-extra/clangd/ClangdLSPServer.cpp | 45 +- clang-tools-extra/clangd/ClangdLSPServer.h | 8 +- clang-tools-extra/clangd/ClangdServer.cpp | 183 +- clang-tools-extra/clangd/ClangdServer.h | 49 +- clang-tools-extra/clangd/CodeComplete.cpp | 36 +- clang-tools-extra/clangd/CodeComplete.h | 23 +- clang-tools-extra/clangd/CollectMacros.cpp | 8 +- clang-tools-extra/clangd/CollectMacros.h | 18 +- clang-tools-extra/clangd/Compiler.cpp | 5 - clang-tools-extra/clangd/Compiler.h | 4 +- clang-tools-extra/clangd/Config.h | 17 +- clang-tools-extra/clangd/ConfigCompile.cpp | 53 + clang-tools-extra/clangd/ConfigFragment.h | 26 + clang-tools-extra/clangd/ConfigYAML.cpp | 3 + clang-tools-extra/clangd/Diagnostics.cpp | 18 + clang-tools-extra/clangd/Diagnostics.h | 9 + clang-tools-extra/clangd/FindSymbols.cpp | 14 +- clang-tools-extra/clangd/FindTarget.cpp | 13 +- clang-tools-extra/clangd/FindTarget.h | 3 + .../clangd/GlobalCompilationDatabase.cpp | 444 +- .../clangd/GlobalCompilationDatabase.h | 45 +- clang-tools-extra/clangd/HeaderSourceSwitch.cpp | 15 +- clang-tools-extra/clangd/HeaderSourceSwitch.h | 5 +- clang-tools-extra/clangd/IncludeFixer.cpp | 2 + clang-tools-extra/clangd/JSONTransport.cpp | 56 +- clang-tools-extra/clangd/ParsedAST.cpp | 22 +- clang-tools-extra/clangd/Preamble.cpp | 3 +- clang-tools-extra/clangd/Protocol.h | 2 - clang-tools-extra/clangd/Quality.cpp | 72 +- clang-tools-extra/clangd/Quality.h | 10 + clang-tools-extra/clangd/QueryDriverDatabase.cpp | 45 +- clang-tools-extra/clangd/README.md | 19 + clang-tools-extra/clangd/Selection.cpp | 3 + clang-tools-extra/clangd/SemanticHighlighting.cpp | 4 +- clang-tools-extra/clangd/TUScheduler.cpp | 92 +- clang-tools-extra/clangd/TUScheduler.h | 14 + clang-tools-extra/clangd/XRefs.cpp | 121 +- clang-tools-extra/clangd/XRefs.h | 4 +- clang-tools-extra/clangd/index/Background.cpp | 7 +- clang-tools-extra/clangd/index/Background.h | 4 + clang-tools-extra/clangd/index/BackgroundQueue.cpp | 26 +- .../clangd/index/CanonicalIncludes.cpp | 4 + clang-tools-extra/clangd/index/FileIndex.cpp | 3 +- clang-tools-extra/clangd/index/Index.cpp | 8 +- clang-tools-extra/clangd/index/IndexAction.cpp | 2 + clang-tools-extra/clangd/index/Merge.cpp | 63 +- clang-tools-extra/clangd/index/Merge.h | 4 - clang-tools-extra/clangd/index/Serialization.cpp | 4 +- clang-tools-extra/clangd/index/SymbolCollector.cpp | 26 +- clang-tools-extra/clangd/index/SymbolCollector.h | 5 +- clang-tools-extra/clangd/index/remote/Client.cpp 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llvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp | 6 +- .../Target/AMDGPU/AMDGPULowerKernelArguments.cpp | 25 +- .../Target/AMDGPU/AMDGPULowerKernelAttributes.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 2 - llvm/lib/Target/AMDGPU/AMDGPUMIRFormatter.cpp | 38 + llvm/lib/Target/AMDGPU/AMDGPUMIRFormatter.h | 47 + .../Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp | 27 +- llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h | 1 - llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.cpp | 1 - llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.h | 4 - llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.h | 3 +- .../AMDGPU/AMDGPUOpenCLEnqueuedBlockLowering.cpp | 5 - llvm/lib/Target/AMDGPU/AMDGPUPTNote.h | 7 +- llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp | 4 - llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.h | 1 - .../Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp | 8 +- .../Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp | 6 +- .../Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp | 41 +- llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp | 49 +- .../Target/AMDGPU/AMDGPUPropagateAttributes.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 70 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 2 +- .../Target/AMDGPU/AMDGPURewriteOutArguments.cpp | 19 - llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 70 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 1215 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 70 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h | 17 +- llvm/lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp | 9 +- .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 144 +- llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 75 +- .../AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPUUnifyMetadata.cpp | 5 - llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp | 29 +- llvm/lib/Target/AMDGPU/AMDKernelCodeT.h | 8 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 372 +- llvm/lib/Target/AMDGPU/CMakeLists.txt | 2 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 44 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 7 - llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp | 14 +- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 52 +- llvm/lib/Target/AMDGPU/GCNILPSched.cpp | 1 - llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp | 21 - llvm/lib/Target/AMDGPU/GCNIterativeScheduler.h | 6 - llvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp | 13 - llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp | 7 +- llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp | 8 +- llvm/lib/Target/AMDGPU/GCNRegPressure.cpp | 23 +- llvm/lib/Target/AMDGPU/GCNRegPressure.h | 10 +- llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp | 6 - llvm/lib/Target/AMDGPU/GCNSubtarget.h | 1064 + .../AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp | 6 +- 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llvm/lib/Target/AMDGPU/SIFrameLowering.h | 1 - llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 203 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 15 +- llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp | 5 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 87 +- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 34 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 143 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 25 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 214 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 152 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 24 +- llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 113 +- llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 18 +- llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp | 21 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 16 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 55 +- llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp | 19 - llvm/lib/Target/AMDGPU/SIMachineScheduler.h | 8 +- llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp | 168 +- llvm/lib/Target/AMDGPU/SIModeRegister.cpp | 15 +- llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 7 +- .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 3 +- llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 34 +- llvm/lib/Target/AMDGPU/SIPostRABundler.cpp | 6 +- llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp | 8 +- llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp | 4 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 82 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 24 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 24 +- .../Target/AMDGPU/SIRemoveShortExecBranches.cpp | 3 +- llvm/lib/Target/AMDGPU/SISchedule.td | 2 +- llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 11 +- llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp | 20 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp | 2 + llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.h | 5 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 276 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 113 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp | 6 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h | 3 +- .../Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp | 4 +- llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.h | 2 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 1 - llvm/lib/Target/AMDGPU/VOP2Instructions.td | 13 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 544 +- llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 67 +- llvm/lib/Target/ARC/ARCTargetMachine.cpp | 4 +- llvm/lib/Target/ARM/A15SDOptimizer.cpp | 3 +- llvm/lib/Target/ARM/ARM.h | 2 + llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 145 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 15 + llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 11 +- llvm/lib/Target/ARM/ARMBaseRegisterInfo.h | 5 +- llvm/lib/Target/ARM/ARMBlockPlacement.cpp | 231 + llvm/lib/Target/ARM/ARMCallLowering.cpp | 19 +- llvm/lib/Target/ARM/ARMCallLowering.h | 6 +- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 34 +- llvm/lib/Target/ARM/ARMFastISel.cpp | 4 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 6 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 167 +- llvm/lib/Target/ARM/ARMInstrMVE.td | 7 - llvm/lib/Target/ARM/ARMInstrNEON.td | 8 +- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 104 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 3 +- llvm/lib/Target/ARM/ARMParallelDSP.cpp | 3 +- llvm/lib/Target/ARM/ARMTargetMachine.cpp | 7 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 81 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 3 + llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 8 +- llvm/lib/Target/ARM/CMakeLists.txt | 1 + llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp | 1 - llvm/lib/Target/ARM/MVETailPredication.cpp | 22 +- llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp | 108 + llvm/lib/Target/AVR/AVRISelLowering.cpp | 66 +- llvm/lib/Target/AVR/AVRISelLowering.h | 7 + llvm/lib/Target/AVR/AVRInstrInfo.td | 23 +- llvm/lib/Target/AVR/AVRTargetMachine.cpp | 2 +- llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp | 1 - llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp | 14 +- llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp | 2 - llvm/lib/Target/BPF/BPFTargetMachine.cpp | 4 +- llvm/lib/Target/CSKY/CSKYTargetMachine.cpp | 2 +- llvm/lib/Target/CSKY/TargetInfo/CSKYTargetInfo.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 1 + llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 116 +- .../Target/Hexagon/HexagonLoopIdiomRecognition.cpp | 1 - llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp | 9 +- llvm/lib/Target/Hexagon/HexagonSubtarget.cpp | 4 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 12 +- llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp | 26 +- .../Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp | 2 +- .../Hexagon/MCTargetDesc/HexagonShuffler.cpp | 5 +- llvm/lib/Target/Hexagon/RDFDeadCode.cpp | 3 +- llvm/lib/Target/Lanai/LanaiTargetMachine.cpp | 4 +- .../Target/MSP430/AsmParser/MSP430AsmParser.cpp | 1 - llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 8 +- llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp | 1 - llvm/lib/Target/Mips/MipsCallLowering.cpp | 11 +- llvm/lib/Target/Mips/MipsCallLowering.h | 6 +- llvm/lib/Target/Mips/MipsConstantIslandPass.cpp | 2 +- llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp | 6 +- llvm/lib/Target/Mips/MipsInstrInfo.cpp | 2 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 11 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.h | 2 +- llvm/lib/Target/NVPTX/NVPTX.h | 19 + llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp | 4 +- llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp | 26 +- llvm/lib/Target/NVPTX/NVPTXISelLowering.h | 3 +- llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp | 31 +- llvm/lib/Target/NVPTX/NVPTXTargetMachine.h | 2 + llvm/lib/Target/NVPTX/NVVMIntrRange.cpp | 40 +- llvm/lib/Target/NVPTX/NVVMReflect.cpp | 15 +- llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 1 - llvm/lib/Target/PowerPC/GISel/PPCCallLowering.cpp | 8 +- llvm/lib/Target/PowerPC/GISel/PPCCallLowering.h | 5 +- .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp | 100 +- .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.h | 85 +- .../lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h | 1 - .../PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp | 12 +- llvm/lib/Target/PowerPC/PPC.td | 15 + llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 2 +- llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp | 3 +- llvm/lib/Target/PowerPC/PPCCCState.cpp | 2 +- llvm/lib/Target/PowerPC/PPCCTRLoops.cpp | 4 +- llvm/lib/Target/PowerPC/PPCFastISel.cpp | 2 - llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 80 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 1329 +- llvm/lib/Target/PowerPC/PPCISelLowering.h | 20 +- llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 7 +- llvm/lib/Target/PowerPC/PPCInstrAltivec.td | 4 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 517 +- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 22 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 7 + llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 44 +- llvm/lib/Target/PowerPC/PPCInstrVSX.td | 34 +- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 2 +- llvm/lib/Target/PowerPC/PPCMachineScheduler.cpp | 140 +- llvm/lib/Target/PowerPC/PPCMacroFusion.cpp | 4 +- llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp | 4 +- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 11 +- llvm/lib/Target/PowerPC/PPCRegisterInfo.h | 5 +- llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 3 + llvm/lib/Target/PowerPC/PPCSubtarget.h | 7 +- llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | 22 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 30 +- llvm/lib/Target/RISCV/AsmParser/CMakeLists.txt | 1 - llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 177 +- llvm/lib/Target/RISCV/CMakeLists.txt | 2 - .../RISCV/Disassembler/RISCVDisassembler.cpp | 2 +- llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt | 3 +- .../Target/RISCV/MCTargetDesc/RISCVAsmBackend.h | 2 +- .../{Utils => MCTargetDesc}/RISCVBaseInfo.cpp | 0 llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h | 406 + 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llvm/lib/Target/SystemZ/SystemZScheduleZ15.td | 2 +- llvm/lib/Target/SystemZ/SystemZScheduleZ196.td | 2 +- llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td | 2 +- llvm/lib/Target/TargetMachine.cpp | 9 + llvm/lib/Target/VE/VEAsmPrinter.cpp | 8 +- llvm/lib/Target/VE/VEISelLowering.cpp | 952 +- llvm/lib/Target/VE/VEISelLowering.h | 58 +- llvm/lib/Target/VE/VEInstrBuilder.h | 41 + llvm/lib/Target/VE/VEInstrInfo.td | 52 +- llvm/lib/Target/VE/VEInstrIntrinsicVL.td | 70 +- llvm/lib/Target/VE/VEInstrPatternsVec.td | 67 +- llvm/lib/Target/VE/VETargetMachine.cpp | 4 +- llvm/lib/Target/VE/VVPNodes.def | 10 +- .../WebAssembly/AsmParser/WebAssemblyAsmParser.cpp | 33 +- .../MCTargetDesc/WebAssemblyInstPrinter.cpp | 91 +- .../MCTargetDesc/WebAssemblyInstPrinter.h | 4 - .../MCTargetDesc/WebAssemblyMCTargetDesc.cpp | 2 - .../MCTargetDesc/WebAssemblyMCTargetDesc.h | 21 +- .../Target/WebAssembly/WebAssemblyAsmPrinter.cpp | 10 - .../Target/WebAssembly/WebAssemblyCFGStackify.cpp | 640 +- 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llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | 23 +- llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 5 +- llvm/lib/Target/X86/X86.td | 3 +- llvm/lib/Target/X86/X86CallLowering.cpp | 13 +- llvm/lib/Target/X86/X86CallLowering.h | 6 +- llvm/lib/Target/X86/X86CallingConv.td | 9 +- llvm/lib/Target/X86/X86CmovConversion.cpp | 2 +- llvm/lib/Target/X86/X86FlagsCopyLowering.cpp | 1 - llvm/lib/Target/X86/X86FrameLowering.cpp | 20 +- llvm/lib/Target/X86/X86FrameLowering.h | 2 + llvm/lib/Target/X86/X86ISelLowering.cpp | 709 +- llvm/lib/Target/X86/X86ISelLowering.h | 3 + llvm/lib/Target/X86/X86IndirectThunks.cpp | 1 - llvm/lib/Target/X86/X86InsertPrefetch.cpp | 8 +- llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp | 8 +- llvm/lib/Target/X86/X86InstrInfo.td | 29 + llvm/lib/Target/X86/X86InstrSNP.td | 47 + llvm/lib/Target/X86/X86InstrSSE.td | 65 +- llvm/lib/Target/X86/X86InstrSystem.td | 11 + llvm/lib/Target/X86/X86InstructionSelector.cpp | 7 +- llvm/lib/Target/X86/X86MCInstLower.cpp | 11 +- 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llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll | 5898 + llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll | 84946 +++ llvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll | 112578 ++++ llvm/test/CodeGen/RISCV/rvv/vlse-rv32.ll | 465 +- llvm/test/CodeGen/RISCV/rvv/vlse-rv64.ll | 593 +- llvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll | 4722 + llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll | 5120 + llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32-dead.ll | 89 + llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32.ll | 5239 + llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64-dead.ll | 89 + llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64.ll | 5681 + llvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll | 4722 + llvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll | 5120 + llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll | 4138 + llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll | 5898 + llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll | 84946 +++ llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll | 112578 ++++ llvm/test/CodeGen/RISCV/rvv/vlxe-rv32.ll | 3281 - llvm/test/CodeGen/RISCV/rvv/vlxe-rv64.ll | 5361 - llvm/test/CodeGen/RISCV/rvv/vmacc-rv32.ll | 481 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv64.ll | 577 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 433 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll | 529 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 487 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv64.ll | 595 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll | 481 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv64.ll | 577 +- llvm/test/CodeGen/RISCV/rvv/vmand-rv32.ll | 57 +- llvm/test/CodeGen/RISCV/rvv/vmand-rv64.ll | 57 +- llvm/test/CodeGen/RISCV/rvv/vmandnot-rv32.ll | 57 +- llvm/test/CodeGen/RISCV/rvv/vmandnot-rv64.ll | 57 +- llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll | 479 + llvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll | 583 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv64.ll | 713 +- llvm/test/CodeGen/RISCV/rvv/vmax-sdnode-rv32.ll | 867 + llvm/test/CodeGen/RISCV/rvv/vmax-sdnode-rv64.ll | 839 + llvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll | 583 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv64.ll | 713 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode-rv32.ll | 867 + llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode-rv64.ll | 839 + llvm/test/CodeGen/RISCV/rvv/vmclr-rv32.ll | 57 +- llvm/test/CodeGen/RISCV/rvv/vmclr-rv64.ll | 57 +- llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll | 433 +- llvm/test/CodeGen/RISCV/rvv/vmerge-rv64.ll | 529 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll | 370 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll | 493 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll | 190 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll | 253 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv32.ll | 190 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll | 253 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll | 370 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv64.ll | 493 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll | 370 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll | 493 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll | 370 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll | 493 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll | 583 +- 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llvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll | 1297 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll | 871 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll | 1045 +- llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vmul-rv32.ll | 583 +- llvm/test/CodeGen/RISCV/rvv/vmul-rv64.ll | 713 +- llvm/test/CodeGen/RISCV/rvv/vmul-sdnode-rv32.ll | 801 + llvm/test/CodeGen/RISCV/rvv/vmul-sdnode-rv64.ll | 773 + llvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll | 583 +- llvm/test/CodeGen/RISCV/rvv/vmulh-rv64.ll | 713 +- llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode-rv32.ll | 28 + llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv32.ll | 583 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv64.ll | 713 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv32.ll | 583 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv64.ll | 713 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll | 297 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll | 297 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll | 289 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll | 353 +- llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv64.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vmxnor-rv32.ll | 57 +- llvm/test/CodeGen/RISCV/rvv/vmxnor-rv64.ll | 57 +- llvm/test/CodeGen/RISCV/rvv/vmxor-rv32.ll | 57 +- llvm/test/CodeGen/RISCV/rvv/vmxor-rv64.ll | 57 +- llvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll | 562 +- llvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll | 766 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll | 562 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll | 766 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv32.ll | 481 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv64.ll | 577 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll | 481 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv64.ll | 577 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv32.ll | 562 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll | 766 +- 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3 years, 10 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O3_LTO updated (6ea5b57afa -> 3725ee39db)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O3_LTO in repository toolchain/ci/glibc. from 6ea5b57afa x86: Check IFUNC definition in unrelocated executable [BZ #20019] adds c50c65a8bf nptl: Fix comment typo in pthread_cond_wait.c adds f5082c7010 aarch64: push the set of rules before falling into slow path adds 6cc992412c alpha: Provide wait4 for static library [BZ #27150] adds ef8c78a6c6 Import idx.h from gnulib adds 47f4316095 Import filename.h from gnulib adds 448a256359 malloc: Add scratch_buffer_dupfree adds c6e0b0b5b0 stdlib: Sync canonicalize with gnulib [BZ #10635] [BZ #26592 [...] adds ecdb06cdf2 support: Add support_small_thread_stack_size adds 3016596a81 Add SEGV_MTEAERR and SEGV_MTESERR from Linux 5.10. adds caa884dda7 Remove dbl-64/wordsize-64 adds 9e97f239ea Remove dbl-64/wordsize-64 (part 2) adds ecce11aa07 x86: Support GNU_PROPERTY_X86_ISA_1_V[234] marker [BZ #26717] adds 18b640c570 Update NEWS for CVE-2019-25013. adds 2f056e8a5d aarch64: define PI_STATIC_AND_HIDDEN adds eeaa19f75e mntent: Use __putc_unlocked instead of fputc_unlocked adds 1b5c9dfeb2 ARC: Regenerate ulps adds c6e2ca2c3f POSIX locale: Fix typo in comment adds a7e9dbb774 Add xchdir to libsupport. adds 7a72265436 Add xfchmod to libsupport adds 2cd361b511 posix: Correct attribute access mode on readlinkat [BZ #27024]. adds c31b1f5231 riscv: support GNU indirect function adds 313bfd505e riscv: Initialize $gp before resolving the IRELATIVE relocation adds 1c426b1d59 Update STATX_ATTR_DAX value from Linux 5.10. adds 7b9c3260bc support: Add xchmod wrapper adds 42dda89dcb posix: Fix return value of system if shell can not be execut [...] adds 4dddd7e9cb posix: Sync tempname with gnulib [BZ #26648] adds bf7db6d369 math: Add BZ#18980 fix back on dbl-64 cosh adds 87d583c6e8 install: Replace scripts/output-format.sed with objdump -f [ [...] adds 0400f92833 Makerules: Do not require startup files for format.lds probe object adds f430293d84 posix: consume less entropy on tempname adds 2ef23b5205 x86: Set header.feature_1 in TCB for always-on CET [BZ #27177] adds 86a4d3fa7d elf: work around a gcc bug in elf_get_dynamic_info adds efbbd9c33a ldconfig/x86: Store ISA level in cache and aux cache adds cf12900645 Use the right argument code in unnormal tests adds 7137d682eb ifuncmain6pie: Remove the circular IFUNC dependency [BZ #20019] adds d18f59bf92 Fix x86 build with --enable-tunable=no adds 2d651eb926 x86: Move x86 processor cache info to cpu_features adds cc528f9a7e math/test-tgmath2: Fix fabs failure when no long double adds 86f65dffc2 ld.so: Add --list-tunables to print tunable values adds 96f17e6e63 ARC: nofpu: Regenerate ulps adds f678099de9 Update hppa libm-test-ulps adds a031b3abad Update powerpc-nofpu libm-test-ulps. adds 07169fcac7 Update arm libm-test-ulps. adds 202586f73e Update MIPS libm-test-ulps. adds 0887fff0b0 Hurd: Add rtld-strncpy-c.c adds 0ec583d926 libmvec: Add extra-test-objs to test-extras adds cabc8a2916 elf: Avoid RELATIVE relocation for _dl_sysinfo adds 22b79ed7f4 Use <startup.h> in __libc_init_secure adds 1006250ea2 posix: Fix regex_internal.h on bootstrap adds 961d7cff51 stdlib: Add testcase for BZ #26241 adds d7ee6bd8c2 posix: Fix fnmatch.c on bootstrap adds ff6d62e9ed <sys/platform/x86.h>: Remove the C preprocessor magic adds 058308066c elf: Make the tunable struct definition internal only adds bfe04789a8 elf: Avoid RELATIVE relocs in __tunables_init adds 374cef32ac configure: Check for static PIE support adds 04af1eb313 csu: Avoid weak ref for __ehdr_start in static PIE adds 47618209d0 Use hidden visibility for early static PIE code adds 86d439b06f csu: Move static pie self relocation later [BZ #27072] adds 2682695e5c Make libc symbols hidden in static PIE adds 28f2ce2772 aarch64: revert memcpy optimze for kunpeng to avoid performa [...] adds 46c1c765d1 Revert "linux: Move {f}xstat{at} to compat symbols" for stat [...] adds 7a5ab88e21 x86: Check ifunc resolver with CPU_FEATURE_USABLE [BZ #27072] adds 527c89cd32 powerpc64: Select POWER9 machine for the scv instruction adds f543259500 x86-64: Update tst-glibc-hwcaps-2.c for x86-64 baseline adds 5f478eb0fb x86: Properly match CPU features in /proc/cpuinfo [BZ #27222] adds 42d6270439 linux: mips: Fix getdents64 fallback on mips64-n32 adds 56ef6ab0cd manual: Correct argument order in mount examples [BZ #27207] adds fcfa4bb48d Update C-SKY libm-test-ulps adds 31f6488722 Fix misplaced const adds c3c4a25e65 aarch64: Move and update the definition of MTE_ENABLED adds ad47748992 Update INSTALL with package versions that are known to work adds 04c6a8073d aarch64: Fix the list of tested IFUNC variants [BZ #26818] adds 3725ee39db benchtests: Do not build bench-timing-type with MODULE_NAME=libc No new revisions were added by this update. Summary of changes: INSTALL | 26 +- Makerules | 16 +- NEWS | 7 + benchtests/Makefile | 14 +- benchtests/strcoll-inputs/filelist#en_US.UTF-8 | 1 - config.h.in | 6 + config.make.in | 1 - configure | 32 +- configure.ac | 15 +- csu/libc-start.c | 15 +- elf/Makefile | 13 + elf/cache.c | 39 +- elf/dl-cache.c | 4 + elf/dl-main.h | 2 +- elf/dl-reloc-static-pie.c | 2 + elf/dl-support.c | 16 +- elf/dl-tunable-types.h | 42 +- elf/dl-tunables.c | 49 +- elf/dl-tunables.h | 37 +- elf/dl-usage.c | 7 +- elf/elf.h | 35 +- elf/enbl-secure.c | 10 +- elf/get-dynamic-info.h | 41 +- elf/ifuncmain6pie.c | 14 +- elf/ifuncmod6.c | 8 +- elf/ldconfig.c | 18 +- elf/readelflib.c | 81 ++- elf/readlib.c | 7 +- elf/rtld.c | 19 + elf/tst-glibc-hwcaps-2-cache.c | 45 ++ .../etc/ld.so.conf | 0 .../postclean.req | 0 elf/tst-glibc-hwcaps-2-cache.script | 8 + elf/tst-rtld-list-tunables.exp | 14 + elf/tst-rtld-list-tunables.sh | 34 + include/filename.h | 112 +++ include/idx.h | 114 +++ include/libc-symbols.h | 9 +- include/scratch_buffer.h | 16 + include/shlib-compat.h | 23 +- io/bits/statx-generic.h | 2 +- libc-abis | 1 + localedata/locales/POSIX | 2 +- malloc/Makefile | 1 + malloc/Versions | 1 + .../fxstat64.c => malloc/scratch_buffer_dupfree.c | 37 +- malloc/tst-scratch_buffer.c | 26 +- manual/install.texi | 24 +- manual/platform.texi | 7 +- manual/sysinfo.texi | 4 +- manual/tunables.texi | 38 + math/libm-test-driver.c | 12 +- math/libm-test-fpclassify.inc | 14 +- math/libm-test-isinf.inc | 14 +- math/libm-test-isnan.inc | 14 +- math/libm-test-issignaling.inc | 14 +- math/test-tgmath2.c | 4 +- misc/mntent_r.c | 12 +- misc/sbrk.c | 4 + nptl/pthread_cond_wait.c | 2 +- posix/fnmatch.c | 2 +- posix/regex_internal.h | 6 +- posix/unistd.h | 2 +- scripts/gen-tunables.awk | 16 +- scripts/output-format.sed | 35 - stdlib/Makefile | 3 +- stdlib/canonicalize.c | 546 +++++++++----- stdlib/test-bz22786.c | 11 +- stdlib/tst-canon-bz26341.c | 101 +++ stdlib/tst-system.c | 17 + support/Makefile | 3 + support/support_set_small_thread_stack_size.c | 12 +- .../linux/aarch64/libc-start.c => support/xchdir.c | 22 +- .../linux/aarch64/libc-start.c => support/xchmod.c | 22 +- .../aarch64/libc-start.c => support/xfchmod.c | 22 +- support/xthread.h | 2 + support/xunistd.h | 3 + sysdeps/aarch64/Implies | 1 - sysdeps/aarch64/configure | 9 + sysdeps/aarch64/configure.ac | 7 + sysdeps/aarch64/dl-tlsdesc.S | 2 + sysdeps/aarch64/multiarch/ifunc-impl-list.c | 8 +- sysdeps/aarch64/multiarch/init-arch.h | 13 +- sysdeps/aarch64/multiarch/memcpy.c | 2 +- sysdeps/aarch64/multiarch/strlen.c | 11 +- sysdeps/alpha/Implies | 1 - sysdeps/arc/fpu/libm-test-ulps | 8 +- sysdeps/arc/nofpu/libm-test-ulps | 11 +- sysdeps/arm/libm-test-ulps | 23 +- sysdeps/csky/fpu/libm-test-ulps | 82 ++- sysdeps/csky/nofpu/libm-test-ulps | 33 +- sysdeps/generic/dl-cache.h | 16 +- .../libc-start.c => generic/dl-isa-level.h} | 21 +- .../hurd/lxstat.c => generic/elf-read-prop.h} | 30 +- sysdeps/generic/ldconfig.h | 22 +- sysdeps/generic/startup.h | 26 + sysdeps/hppa/fpu/libm-test-ulps | 23 +- sysdeps/i386/configure | 3 + sysdeps/i386/configure.ac | 3 + sysdeps/ieee754/dbl-64/e_acosh.c | 50 +- sysdeps/ieee754/dbl-64/e_cosh.c | 76 +- sysdeps/ieee754/dbl-64/e_fmod.c | 202 ++---- sysdeps/ieee754/dbl-64/e_log10.c | 42 +- sysdeps/ieee754/dbl-64/s_frexp.c | 81 ++- sysdeps/ieee754/dbl-64/s_getpayload.c | 15 +- sysdeps/ieee754/dbl-64/s_issignaling.c | 14 +- sysdeps/ieee754/dbl-64/s_llround.c | 49 +- sysdeps/ieee754/dbl-64/s_lround.c | 57 +- sysdeps/ieee754/dbl-64/s_modf.c | 80 +-- sysdeps/ieee754/dbl-64/s_remquo.c | 43 +- sysdeps/ieee754/dbl-64/s_roundeven.c | 79 +-- sysdeps/ieee754/dbl-64/s_scalbln.c | 63 +- sysdeps/ieee754/dbl-64/s_scalbn.c | 63 +- sysdeps/ieee754/dbl-64/s_setpayload_main.c | 42 +- sysdeps/ieee754/dbl-64/s_totalorder.c | 32 +- sysdeps/ieee754/dbl-64/s_totalordermag.c | 24 +- sysdeps/ieee754/dbl-64/wordsize-64/e_acosh.c | 68 -- sysdeps/ieee754/dbl-64/wordsize-64/e_cosh.c | 85 --- sysdeps/ieee754/dbl-64/wordsize-64/e_fmod.c | 106 --- sysdeps/ieee754/dbl-64/wordsize-64/e_log10.c | 87 --- sysdeps/ieee754/dbl-64/wordsize-64/s_frexp.c | 66 -- sysdeps/ieee754/dbl-64/wordsize-64/s_getpayload.c | 35 - sysdeps/ieee754/dbl-64/wordsize-64/s_issignaling.c | 43 -- sysdeps/ieee754/dbl-64/wordsize-64/s_llround.c | 75 -- sysdeps/ieee754/dbl-64/wordsize-64/s_lround.c | 86 --- sysdeps/ieee754/dbl-64/wordsize-64/s_modf.c | 65 -- sysdeps/ieee754/dbl-64/wordsize-64/s_remquo.c | 111 --- sysdeps/ieee754/dbl-64/wordsize-64/s_roundeven.c | 71 -- sysdeps/ieee754/dbl-64/wordsize-64/s_scalbln.c | 60 -- sysdeps/ieee754/dbl-64/wordsize-64/s_scalbn.c | 60 -- .../ieee754/dbl-64/wordsize-64/s_setpayload_main.c | 54 -- sysdeps/ieee754/dbl-64/wordsize-64/s_totalorder.c | 76 -- .../ieee754/dbl-64/wordsize-64/s_totalordermag.c | 73 -- sysdeps/mach/hurd/fxstat.c | 4 +- sysdeps/mach/hurd/fxstat64.c | 2 +- sysdeps/mach/hurd/fxstatat.c | 3 +- sysdeps/mach/hurd/fxstatat64.c | 3 +- .../mach/hurd/i386/i686/multiarch/rtld-strncpy-c.c | 1 + sysdeps/mach/hurd/i386/ld.abilist | 1 - sysdeps/mach/hurd/i386/libc.abilist | 1 + sysdeps/mach/hurd/lxstat.c | 2 +- sysdeps/mach/hurd/lxstat64.c | 3 +- sysdeps/mach/hurd/xstat.c | 2 +- sysdeps/mach/hurd/xstat64.c | 2 +- sysdeps/mips/mips32/libm-test-ulps | 23 +- sysdeps/mips/mips64/Implies | 1 - sysdeps/mips/mips64/libm-test-ulps | 23 +- sysdeps/posix/system.c | 4 + sysdeps/posix/tempname.c | 291 +++++--- sysdeps/powerpc/nofpu/libm-test-ulps | 33 +- sysdeps/powerpc/powerpc64/sysdep.h | 3 + sysdeps/riscv/dl-irel.h | 56 ++ sysdeps/riscv/dl-machine.h | 44 +- sysdeps/s390/s390-64/Implies | 1 - sysdeps/sparc/sparc64/Implies | 1 - sysdeps/unix/sysv/linux/aarch64/libc-start.c | 5 + sysdeps/unix/sysv/linux/alpha/wait4.c | 2 + sysdeps/unix/sysv/linux/arm/readelflib.c | 22 +- sysdeps/unix/sysv/linux/bits/siginfo-consts.h | 6 +- sysdeps/unix/sysv/linux/faccessat.c | 3 +- sysdeps/unix/sysv/linux/fxstat.c | 4 +- sysdeps/unix/sysv/linux/fxstat64.c | 4 +- sysdeps/unix/sysv/linux/fxstatat.c | 4 +- sysdeps/unix/sysv/linux/fxstatat64.c | 4 +- sysdeps/unix/sysv/linux/i386/ld.abilist | 1 - sysdeps/unix/sysv/linux/i386/libc.abilist | 1 + sysdeps/unix/sysv/linux/i386/startup.h | 29 +- sysdeps/unix/sysv/linux/ia64/readelflib.c | 22 +- sysdeps/unix/sysv/linux/lxstat.c | 2 +- sysdeps/unix/sysv/linux/lxstat64.c | 4 +- sysdeps/unix/sysv/linux/mips/mips64/getdents64.c | 37 +- sysdeps/unix/sysv/linux/mips/readelflib.c | 22 +- sysdeps/unix/sysv/linux/powerpc/powerpc64/clone.S | 3 + sysdeps/unix/sysv/linux/powerpc/readelflib.c | 22 +- sysdeps/unix/sysv/linux/powerpc/sysdep.h | 5 +- sysdeps/unix/sysv/linux/riscv/readelflib.c | 22 +- sysdeps/unix/sysv/linux/s390/readelflib.c | 22 +- sysdeps/unix/sysv/linux/sparc/readelflib.c | 22 +- sysdeps/unix/sysv/linux/tst-getdents64.c | 29 +- sysdeps/unix/sysv/linux/x86/elf-read-prop.h | 60 ++ sysdeps/unix/sysv/linux/x86/readelflib.c | 23 +- sysdeps/unix/sysv/linux/x86_64/64/ld.abilist | 1 - sysdeps/unix/sysv/linux/x86_64/64/libc.abilist | 1 + sysdeps/unix/sysv/linux/x86_64/Makefile | 51 ++ .../unix/sysv/linux/x86_64/tst-glibc-hwcaps-2.c | 83 +++ sysdeps/unix/sysv/linux/x86_64/x32/ld.abilist | 1 - sysdeps/unix/sysv/linux/x86_64/x32/libc.abilist | 1 + .../sysv/linux/x86_64/x86-64-isa-level-VALUE.c | 4 + sysdeps/unix/sysv/linux/xstat.c | 6 +- sysdeps/unix/sysv/linux/xstat64.c | 5 +- sysdeps/x86/Makefile | 51 ++ sysdeps/x86/Versions | 7 +- sysdeps/{mach/hurd/fxstat.c => x86/abi-note.c} | 34 +- sysdeps/x86/bits/platform/x86.h | 299 ++++++++ sysdeps/x86/cacheinfo.c | 48 +- sysdeps/x86/cacheinfo.h | 400 +---------- sysdeps/x86/configure | 79 +++ sysdeps/x86/configure.ac | 66 ++ sysdeps/x86/cpu-features.c | 106 ++- sysdeps/x86/dl-cacheinfo.h | 460 ++++++++++++ sysdeps/x86/dl-cet.c | 17 +- sysdeps/x86/dl-get-cpu-features.c | 8 +- .../{mach/hurd/fxstatat.c => x86/dl-isa-level.h} | 27 +- sysdeps/x86/dl-prop.h | 113 ++- .../libc-start.c => x86/get-cpuid-feature-leaf.c} | 24 +- sysdeps/x86/get-isa-level.h | 67 ++ sysdeps/x86/include/cpu-features.h | 783 ++++++++++++++++++++- sysdeps/x86/isa-level.c | 97 +++ sysdeps/x86/libc-start.c | 5 + sysdeps/x86/link_map.h | 18 +- sysdeps/x86/sys/platform/x86.h | 777 +------------------- sysdeps/x86/tst-cpu-features-cpuinfo.c | 43 +- sysdeps/x86/tst-get-cpu-features.c | 29 +- sysdeps/x86/tst-ifunc-isa-1-static.c | 1 + .../aarch64/libc-start.c => x86/tst-ifunc-isa-1.c} | 22 +- sysdeps/x86/tst-ifunc-isa-2-static.c | 1 + .../{mach/hurd/lxstat.c => x86/tst-ifunc-isa-2.c} | 30 +- sysdeps/x86/tst-ifunc-isa.h | 104 +++ sysdeps/x86/tst-isa-level-1.c | 103 +++ sysdeps/x86/tst-isa-level-mod-1-baseline.c | 1 + sysdeps/x86/tst-isa-level-mod-1-v2.c | 1 + sysdeps/x86/tst-isa-level-mod-1-v3.c | 1 + sysdeps/x86/tst-isa-level-mod-1-v4.c | 1 + .../libc-start.c => x86/tst-isa-level-mod-1.c} | 19 +- sysdeps/x86/tst-setjmp-cet.c | 1 + sysdeps/x86_64/Implies | 1 - sysdeps/x86_64/configure | 3 + sysdeps/x86_64/configure.ac | 3 + sysdeps/x86_64/dl-hwcaps-subdirs.c | 30 +- sysdeps/x86_64/fpu/Makefile | 8 + sysdeps/x86_64/tst-glibc-hwcaps.c | 44 +- 231 files changed, 5353 insertions(+), 4214 deletions(-) create mode 100644 elf/tst-glibc-hwcaps-2-cache.c copy elf/{tst-glibc-hwcaps-cache.root => tst-glibc-hwcaps-2-cache.root}/etc/ld.so. [...] copy elf/{tst-glibc-hwcaps-cache.root => tst-glibc-hwcaps-2-cache.root}/postclean. [...] create mode 100644 elf/tst-glibc-hwcaps-2-cache.script create mode 100644 elf/tst-rtld-list-tunables.exp create mode 100755 elf/tst-rtld-list-tunables.sh create mode 100644 include/filename.h create mode 100644 include/idx.h copy sysdeps/mach/hurd/fxstat64.c => malloc/scratch_buffer_dupfree.c (55%) delete mode 100644 scripts/output-format.sed create mode 100644 stdlib/tst-canon-bz26341.c copy sysdeps/unix/sysv/linux/aarch64/libc-start.c => support/xchdir.c (68%) copy sysdeps/unix/sysv/linux/aarch64/libc-start.c => support/xchmod.c (68%) copy sysdeps/unix/sysv/linux/aarch64/libc-start.c => support/xfchmod.c (68%) copy sysdeps/{unix/sysv/linux/aarch64/libc-start.c => generic/dl-isa-level.h} (68%) copy sysdeps/{mach/hurd/lxstat.c => generic/elf-read-prop.h} (59%) delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/e_acosh.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/e_cosh.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/e_fmod.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/e_log10.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_frexp.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_getpayload.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_issignaling.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_llround.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_lround.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_modf.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_remquo.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_roundeven.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_scalbln.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_scalbn.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_setpayload_main.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_totalorder.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_totalordermag.c create mode 100644 sysdeps/mach/hurd/i386/i686/multiarch/rtld-strncpy-c.c create mode 100644 sysdeps/riscv/dl-irel.h create mode 100644 sysdeps/unix/sysv/linux/x86/elf-read-prop.h create mode 100644 sysdeps/unix/sysv/linux/x86_64/tst-glibc-hwcaps-2.c create mode 100644 sysdeps/unix/sysv/linux/x86_64/x86-64-isa-level-VALUE.c copy sysdeps/{mach/hurd/fxstat.c => x86/abi-note.c} (52%) create mode 100644 sysdeps/x86/bits/platform/x86.h copy sysdeps/{mach/hurd/fxstatat.c => x86/dl-isa-level.h} (56%) copy sysdeps/{unix/sysv/linux/aarch64/libc-start.c => x86/get-cpuid-feature-leaf.c} (64%) create mode 100644 sysdeps/x86/get-isa-level.h create mode 100644 sysdeps/x86/isa-level.c create mode 100644 sysdeps/x86/tst-ifunc-isa-1-static.c copy sysdeps/{unix/sysv/linux/aarch64/libc-start.c => x86/tst-ifunc-isa-1.c} (68%) create mode 100644 sysdeps/x86/tst-ifunc-isa-2-static.c copy sysdeps/{mach/hurd/lxstat.c => x86/tst-ifunc-isa-2.c} (60%) create mode 100644 sysdeps/x86/tst-ifunc-isa.h create mode 100644 sysdeps/x86/tst-isa-level-1.c create mode 100644 sysdeps/x86/tst-isa-level-mod-1-baseline.c create mode 100644 sysdeps/x86/tst-isa-level-mod-1-v2.c create mode 100644 sysdeps/x86/tst-isa-level-mod-1-v3.c create mode 100644 sysdeps/x86/tst-isa-level-mod-1-v4.c copy sysdeps/{unix/sysv/linux/aarch64/libc-start.c => x86/tst-isa-level-mod-1.c} (68%) create mode 100644 sysdeps/x86/tst-setjmp-cet.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O3_LTO updated (f262a351887 -> a4dfd0f089a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O3_LTO in repository toolchain/ci/gcc. from f262a351887 MAINTAINERS: Update my email address. adds a000eb5918e C: Add test for incorrect warning for assignment of certain [...] adds 7e73f511573 Daily bump. adds 15af33a8806 analyzer: fix ICE with -fsanitize=undefined [PR98293] adds bf183413c6f Go frontend: add -fgo-embedcfg option adds 560d9915762 Fix testsuite/g++.dg/cpp1y/constexpr-66093.C execution failure... adds 6b69738c1e3 Restore input_location after recursive expand_call_inline adds 4615cde5d7e simplify-rtx: Optimize (x - 1) * y + y [PR98334] adds a20893cf6b9 build: libcody: Link with -lsocket -lnsl if necessary [PR98316] adds 01be45eccee vect: Fix missing alias checks for 128-bit SVE [PR98371] adds 8a25be517f8 rtl-ssa: Fix updates to call clobbers [PR98403] adds eac8675225c recog: Fix a constrain_operands corner case [PR97144] adds e8beba1cfc7 explow, aarch64: Fix force-Pmode-to-mem for ILP32 [PR97269] adds bea984814c6 i386: Optimize pmovskb on zero_extend of subreg HI of pmovs [...] adds b679559385f arc: fix accumulator first register. adds af60b0ec79e x86: Cast to unsigned short first for _mm_extract_pi16 adds 6ffaffd5d10 [c++]: Improve module-decl diagnostics [PR 98327] adds 951bdbde6ad i386: Add _mm256_cmov_si256 [PR98521] adds 1ff0ddcd8b4 i386: Prevent spurious FP exceptions with _mm_cvt{,t}ps_pi3 [...] adds 01da03c915f tree-optimization/98381 - fix live bool vector extract adds f7028937872 go: Fix -fgo-embedcfg= option description. adds a7553ad60be store-merging: Handle vector CONSTRUCTORs using bswap [PR96239] adds 5ca2400270e match.pd: Improve (A / (1 << B)) -> (A >> B) optimization [ [...] adds 576714b309b phiopt: Optimize x < 0 ? ~y : y to (x >> 31) ^ y [PR96928] adds 4ddee425b8c reassoc: Fix reassociation on 32-bit hosts with > 32767 bbs [...] adds 26b5062be99 tree-optimization/98428 - avoid pre-existing vectors for loop SLP adds 27aad521570 move SLP debug counter adds af362af18f4 c++: ICE with deferred noexcept when deducing targs [PR82099] adds 606f2af1973 c++: Fix ICE with __builtin_bit_cast [PR98469] adds 33a63257701 tree-optimization/98516 - fix SLP permute opt materialization adds 8ea81f56140 Don't link cc1 etc. against libcody.a adds 407bcf8e28f A couple of comment tweaks adds 6b577a17b26 nvptx: Cache stacks block for OpenMP kernel launch adds 5de7bf5bc98 expand: Fold x - y < 0 to x < y during expansion [PR94802] adds e2e2f3f2c94 c++: Fix deduction from the type of an NTTP adds f6dd35cf930 x86: Use unsigned short to compute pextrw result adds ae1ada95fee Add <source_location> to the precompiled header. adds c5e94699efa d: Merge upstream dmd a5c86f5b9 adds db7ce388dce doc: reflect the publication of C++20 in invoke.texi and st [...] adds a9f76d03bbc internal/cpu: more build fixes for Go1.16beta1 release adds f47c00cf95d syscall: don't define sys_SETREUID and friends adds e591f18ff87 xfail test that will never pass on i?86 FreeBSD adds c21f47f4019 IBM Z: Fix check_effective_target_s390_z14_hw adds f56de3557fa Update GNU/Hurd configure support adds ad92bf4b165 doc: Re-add HSAIL to Language Standards adds 651b8a50a6d Daily bump. adds df1eba3cead analyzer: remove xfail [PR98223] adds 23fc2be633c analyzer: add regression test for PR 98073 adds ac3966e315a analyzer: fix false leaks when writing through unknown ptrs [...] adds 57706dd7e00 gcc-changelog: workaround for utf8 filenames adds a05cc70a6c1 tree-optimization/98513 - fix bug in range intersection code adds c9ee9c1e355 add signed_bool_precision attribute for GIMPLE FE use adds cecf8c662de robustify vxworks glimits.h overriding adds 758abf1ae31 add alignment to enable store merging in strict-alignment targets adds 6d0b075d662 Fix libcody build on hppa*-*-hpux11.11. adds e6a5daae7ec c++: Fix g++.dg/warn/Wmismatched-dealloc.C for C++11 [PR98566] adds 8b6f1e8f97f PR fortran/78746 - invalid access after error recovery adds 334a295fafd testsuite, coroutines : Fix a bad testcase [PR96504]. adds fd64f348a6b PR c++/98305 spurious -Wmismatched-new-delete on template instance adds abb1b6058c0 PR c++/95768 - pretty-printer ICE on -Wuninitialized with a [...] adds 15a47f437d2 [PR97978] LRA: Permit temporary allocation incorrectness af [...] adds f05bbca3d95 sync libctf toplevel from binutils-gdb adds 942ae5be662 Daily bump. adds cffe6dd2ce3 analyzer: fix missing bitmap_clear [PR98564] adds be6c485b24f analyzer: fix false leak reports when merging states [PR97074] adds 1b566975242 Adjust testcase for PR 92658 adds d02a8b63e5a bswap: Fix up recent vector CONSTRUCTOR optimization [PR98568] adds d54be5ad210 i386: Merge various insn name mapping code attributes adds 78595e918ee gimple-isel: Fall back to using vcond_mask [PR98560] adds 298e76e6562 gimple-isel: Check whether IFN_VCONDEQ is supported [PR98560] adds 0f9d2c1a318 aarch64: Support conditional unpacked integer unary arithme [...] adds 6bca2ebf106 i386: Optimize blsi followed by comparison [PR98567] adds d54029179cb fix GIMPLE parser for loops adds dddea6d4d81 d: Merge upstream dmd 9038e64c5. adds 85fb1d7d5f4 Fortran: Improve resolution of associate variables. [PR93701]. adds 19f3c433cdc libstdc++: Fix long double to_chars testcase [PR98384] adds c8d2ed112e7 Update cpplib es.po. adds b87ec922c40 test: add new Go tests from source repo adds 0677759f753 analyzer: fix ICE when DECL_INITIAL is error_mark_node [PR98580] adds b7c3f201be5 libstdc++: Add support for C++20 barriers adds 4d65a07d54b c++: Add some conversion sanity checking. adds 6c59b8a93cf c++: Add TARGET_EXPR comments adds 2f359597e49 c++: Fix thinko in auto return type checking [PR98441] adds 178f0afce36 PR middle-end/98578 - ICE warning on uninitialized VLA access adds aa4db31dd2a c++: Fix up tsubst of BIT_CAST_EXPR [PR98329] adds 7d187e4f6f5 Daily bump. adds 0b7b4710111 RISC-V: Move class riscv_subset_list and riscv_subset_t to [...] adds e3354b6de7a RISC-V: Implement new style of architecture extension test macros. adds 01d92cfd798 Fix array-quals-1.c for RISC-V adds c231fca5de8 Fortran:Fix simplification of constructors with implied-do [...] adds 21c1a30fc73 Fortran: Allow pointer deferred length associate selectors. [...] adds c9d25aa7489 aarch64: Fix RTL patterns for UABA/SABA adds cab822d4ea7 aarch64: Reimplement vaba* intrinsics using builtins adds 79db5945ade aarch64: Reimplement vabd* intrinsics using builtins adds e811f10b61a aarch64: Reimplement most vpadal intrinsics using builtins adds 07fb24a3daf SVE2: Fix aarch64-sve2-acle-asm tests. adds f3c5d1fa53a aarch64: Support conditional unpacked UXT on SVE adds 5fe3e6bf061 aarch64: Support unpacked CNOT on SVE adds 8f1cb70d7ca i386: Fix -mcmodel= vs. target attribute [PR98585] adds 1b885264a48 x86-64: Use R10 for profiling large model adds bdcde150450 tree-optimization/98544 - more permute optimization fixes adds b407f233d7c fix vectorizer memleaks adds 77a375a3ebf reset the SCEV htab after FRE in loop pipeline adds 76be18f4429 x86-64: Use R10 and R11 for profiling large model with PIC adds 98a1fb705ea c++: Fix access checking of scoped non-static member [PR98515] adds bb1f0b50abb c++: ICE with constexpr call that returns a PMF [PR98551] adds 98546324c79 Tweak dg-prune-output regex for out-of-build-tree contexts adds f47df2af313 IBM Z: Introduce __LONG_DOUBLE_VX__ macro adds 745d04e796c x86-64: Require lp64 for PR target/98482 tests adds 0e47d6c808f IBM Z: Fix constraints in vpdi patterns adds 0b874e0ffd5 ipa-modref: avoid linebreak split in debug print adds bf5cbb9edff Daily bump. adds 57450da2fef final: accept markers at line 0 adds 16dae48e9cd vregs: Fix up instantiate_virtual_regs_in_insn for asm goto [...] adds 991656092f7 tree-cfg: Allow enum types as result of POINTER_DIFF_EXPR [ [...] adds 859be2e44ac RTL: Update `const_double_zero' handling for mode and calla [...] adds be7e807242b PDP11: Use a mode with `const_double_zero' expressions adds c38bbf5eed1 VAX: Use a mode with `const_double_zero' expressions adds 7f5c4d23db8 VAX: Remove a duplicate `cc' mode attribute adds f2a5346244a VAX/testsuite: Remove notsi comparison elimination regressions adds acae7b21bc0 d: Implement expression-based contract syntax adds 7a103daef78 d: Support deprecated, @disable, and user-defined attribute [...] adds 7da827c99c0 d: Synchronize testsuite with upstream dmd adds 872373360da Daily bump. adds 4a1d7f7e203 libstdc++: Suppress more vstring testsuite warnings. [PR 98613] adds 366f86bd429 Daily bump. adds bcb3065b2ba ira: Skip some pseudos in move_unallocated_pseudos adds fa4586d8545 if-to-switch: remove memory leaks adds 4e275dccfc2 Add pytest for a GCOV test-case adds 64dc013853b aarch64: Reimplement vmovl*/vmovn* intrinsics using __built [...] adds a2106317cd6 widening_mul: Pattern recognize unsigned multiplication wit [...] adds 9febe9e4be7 widening_mul: Pattern recognize also signed multiplication [...] adds 9a6c37e6ae5 reassoc: Reassociate integral multiplies [PR95867] adds 39666d2b885 slp: fix is_linear_load_p to prevent multiple answers adds bd4298e1927 slp: handle externals correctly in linear_loads_p adds 0c18faac3fb slp: upgrade complex add to new format and fix memory leaks adds 300a3ce5c56 tree-optimization/98221 - fix wrong unpack operation used f [...] adds 928e96bbe98 d: Remove visibility and lookup deprecation adds 04bff1bbfc1 tree-optimization/98526 - fix vectorizer reduction cost adds 6ebf79fcd4c testsuite: Fix test failures from outputs.exp [PR98225] adds 84684e0f78c tree-optimization/91403 - avoid excessive code-generation adds 3b25e83536b Port update-copyright.py to Python3 adds 8c09b788a96 Make the serialized link target more verbose adds 3dd0d3ee1d2 c++, abi: Fix abi_tag attribute handling [PR98481] adds cbe9758ff49 Properly release symtab::m_clones. adds b81fbfe1eb5 aarch64: Add support for unpacked SVE shifts adds 48c7f5b8811 aarch64: Add support for unpacked SVE mult, max and min adds ab76e3db6b8 aarch64: Add general unpacked SVE conditional binary arithmetic adds 3f8b0bba035 aarch64: Add support for unpacked SVE ADR adds 907ea379559 aarch64: Add support for unpacked SVE ABD adds 7446de5a2af aarch64: Add support for unpacked SVE MULH adds 37426e0f060 aarch64: Add support for unpacked SVE conditional BIC adds a958b2fc6da aarch64: Add support for unpacked SVE ASRD adds 67fbb7f0fda Daily bump. adds ab88f360723 analyzer: fix ICE merging dereferencing unknown ptrs [PR98628] adds 640296c367f make FOR_EACH_IMM_USE_STMT safe for early exits adds 240f0a490da Delete dead code in ix86_expand_sse_comi. adds 814299a9d49 c++: -Wmissing-field-initializers in unevaluated ctx [PR98620] adds ab96073df00 MAINTAINERS: Add myself for write after approval adds ff99d05f40f configure, make: Fix up --enable-link-serialization adds 13d47c37a2c reassoc: Optimize in reassoc x < 0 && y < 0 to (x | y) < 0 [...] adds 24ea113f75c widening_mul: Fix up ICE caused by my signed multiplication [...] adds b2230210f17 gcov: add more debugging facility adds e91910d3576 options: properly compare string arguments adds 52a170b1a18 tree-optimization/98550 - fix BB vect unrolling check adds e0bec6ceac4 c++: Fix ICE with CTAD in concept [PR98611] adds cf2ac1c30af [PR97969] LRA: Transform pattern `plus (plus (hard reg, con [...] adds 25bef68902f arm: Add movmisalign patterns for MVE (PR target/97875) adds 1aff68d54c3 Fix typo in function-abi.h adds 248feb2fa2c gcov: fix printf format for 32-bit hosts adds e2aa8a5f982 libcody: Simplify configure [PR 98414, 98509] adds 728fee7a798 MAINTAINERS: Fix spacing adds 5a9cfad2de9 Avoid a couple more ICEs in print_mem_ref (PR c/98597). adds cfaaa6a1ca7 syscall: ensure openat uses variadic libc wrapper adds 6851dda2e79 Daily bump. adds abb3993e49c amdgcn: Fix subdf3 pattern adds c8812bac8ee amdgcn: Improve FP division accuracy adds 3df6fac0080 amdgcn: Fix exec register live-on-entry to BB in md-reorg adds 7993fe1877a amdgcn: Remove dead code for fixed v0 register adds b668a06e37f i386: Optimize _mm_unpacklo_epi8 of 0 vector as second argu [...] adds 3f325179b32 [PATCH v2] aarch64: Add cpu cost tables for A64FX adds 6b70fa678b1 ipa: remove a dead code adds 5d057bfeff7 i386: Add define_insn_and_split patterns for btrl [PR96938] adds ffd28c265e6 tree-optimization/98640 - fix bogus sign-extension with VN adds 4c598b038df doc: Fix typos in C++ Modules documentation adds 0db5f488486 libstdc++: Remove <debug/array> from Doxygen config adds 7875e8dc831 if-to-switch: fix also virtual phis adds b1d1e2b54c6 i386, expand: Optimize also 256-bit and 512-bit permutatati [...] adds 2b356e689c3 hurd: libgcc unwinding over signal trampolines with SIGINFO adds c23aea6edc9 gcc-changelog: Allow modifications to old ChangeLogs without entry adds f04e7e540e2 libstdc++: Fix typo in ChangeLog-2020 adds e9cb89b936f Hurd: Enable ifunc by default adds 40b371a7c2f sh: Remove match_scratch operand test adds 6d75168146f rtl-ssa: Fix reversed comparisons in accesses.h comment adds 5ab67cdee61 aarch64: Tighten condition on sve/sel* tests adds 3ddc18251a8 tree-optimization/92645 - improve SLP with existing vectors adds cf7a3353061 aarch64: Add support for unpacked SVE MLA and MAD adds 264a1269b44 aarch64: Add support for unpacked SVE MLS and MSB adds 11cbea852b0 c++: Fix cp_build_function_call_vec [PR 98626] adds a2d04f3d2c9 mklog: support define_insn_and_split format adds 285fa338b06 tree-optimization/92645 - avoid harmful early BIT_FIELD_REF [...] adds 7d7ef413ef1 gcc-changelog: Support multiline parentheses wrapping adds 8fc183ccd06 match.pd: Fold (~X | C) ^ D into (X | C) ^ (~D ^ C) if (~D [...] adds 796ead19f85 c++: Failure to lookup using-decl name [PR98231] adds 8cba7cb3202 or1k: Implement profile hook calling _mcount adds e1171c32502 or1k: Add builtin define to detect hard float adds b77f6d2fa84 or1k: Support for softfloat to emulate hw exceptions adds 6ed637c585b or1k: Add note to indicate execstack adds e40fdcc4f42 or1k: Fixup exception header data encodings adds be0851b8e93 Daily bump. adds c7f1ff01a23 aarch64: Reimplement vmovn_high_* intrinsics using builtins adds 52cd1cd1b67 aarch64: reimplement vqmovn_high* intrinsics using builtins adds 48f8d1d48f2 aarch64: Reimplememnt vmovn/vmovl intrinsics with builtins instead adds e45c41988bf vect: Account for unused IFN_LOAD_LANES results adds 8f8762a2e86 match.pd: Optimize ~(X >> Y) to ~X >> Y if ~X can be simpli [...] adds 0efdc7b31c2 i386: Fix the pmovzx SSE4.1 define_insn_and_split patterns [...] adds 08a4adcf2b6 i386: Remove reduntand assignment in i386-options.c [PR98671] adds d61d2a5f3ce c++: Fix erroneous parm comparison logic [PR 98372] adds 194a9d67be4 libstdc++: Update copyright dates on new files adds a802a2ef5f1 arm: Replace calls to __builtin_vcge* by <=,>= in arm_neon. [...] adds a512079ef40 i386: Update PR target/95021 tests adds 2182274f510 tree-optimization/98674 - improve dependence analysis adds 5ebdd53534d i386: Resolve variable shadowing in i386-options.c [PR98671] adds 77d372abec0 x86: Error on -fcf-protection with incompatible target adds 236d6a33ca6 mklog: skip unsupported files adds 7624c58c6b7 gcov: add one more pytest adds aa3d33dccb5 RTEMS: Fix Ada build for riscv adds 57a4f5e4eac libstdc++: Define function to throw filesystem_error [PR 98471] adds 6106dfb9f73 [nvptx libgomp plugin] Build only in supported configurations adds 9ac3e2feb3d libgo: update hurd support adds d0d2becf2df PR fortran/98661 - valgrind issues with error recovery adds c1a2cf88059 Revert "PR fortran/98661 - valgrind issues with error recovery" adds 9e1e6e63104 PR fortran/98661 - valgrind issues with error recovery adds 05a30af3f23 libstdc++: Implement N3644 for _GLIBCXX_DEBUG iterators adds 505caa7295b [gcn offloading] Only supported in 64-bit configurations adds 088e46b8d4d declare getpass in analyzer/sensitive-1.c test adds 6541fcadc86 use sigjmp_buf for analyzer sigsetjmp tests adds 3651c1b5c9c calibrate intervals to avoid zero in futures poll test adds bdd1b1f5552 PR fortran/93340 - fix missed substring simplifications adds f6ffd449e0c c++: Tweak g++.dg/template/pr98372.C. adds 8a18261afd9 analyzer: const fixes [PR98679] adds dea4a32b24f analyzer: fixes to -fdump-analyzer-json adds fe701195313 slp: elide intermediate nodes for complex add and avoid truncate adds 500600c7840 slp: Support optimizing load distribution adds e09173d84da slp: support complex multiply and complex multiply conjugate adds 31fac31800b slp: support complex FMA and complex FMA conjugate adds 478e571a3ee slp: support complex FMS and complex FMS conjugate adds b50df1e749b slp: Add complex operations class to share first match amon [...] adds 59832db9a71 slp: Add Tests for complex mul, mls and mla" adds f1096055854 Add GCC_EXTRA_DIAGNOSTIC_OUTPUT environment variable for fi [...] adds 02e7af1122c libstdc++: Implement N3644 for _GLIBCXX_DEBUG iterators adds 387f6c15d30 Handle fancy_abort before diagnostic initialization [PR98586] adds f1fc27b6c51 c++: Minor refactoring in process_init_constructor_record adds b95d97f1a5f jit: remove "Alpha" warning from docs adds 5fff80fd79c Daily bump. adds b0ccd3922f5 compiler: add support for reading embedcfg files adds c4eec1efae0 testsuite: Fix sed script errors in complex tests adds 2ea6f4a377e tree-optimization/98685 - fix placement of extern converts adds 7432f255b70 arm: Auto-vectorization for MVE: vshl adds bfab355012c arm: Auto-vectorization for MVE: vshr adds 0411ae7f08e libatomic, libgomp, libitc: Fix bootstrap [PR70454] adds cb60334b716 testsuite/96098 - remove redundant testcase adds 1a630642009 arm: Implement vceqq_p64, vceqz_p64 and vceqzq_p64 intrinsics adds d03f14c354a testsuite/96147 - remove scanning for ! vect_hw_misalign adds e1bd80fb706 testsuite/96147 - key scanning on vect_hw_misalign adds aa4ee5798fe testsuite/96147 - scan for vectorized load adds b36c9cd0947 testsuite/96147 - align vector access adds dc8475e3348 Pytest in tests: improve adds 446703ccc2c tree-optimization/96376 - do not check alignment for invari [...] adds f1d054017ef Revert "arm: Implement vceqq_p64, vceqz_p64 and vceqzq_p64 [...] adds 63999d751df arm: Implement vceqq_p64, vceqz_p64 and vceqzq_p64 intrinsics adds f9a577927eb IBM Z: Fix linking to libatomic in target test cases adds 7f6cdaa9a8d rtl-ssa: Fix a silly typo adds f2cc526f47a recog: Fix insn_change_watermark destructor adds 5a783f42d77 aarch64: Add a minipass for fusing CC insns [PR88836] adds 492b90f33df c++: Fix langspecs with -fsyntax-only [PR98591] adds 1ba71fabb78 preprocessor: Make quoting : [PR 95253] adds 7d0df0aeb67 i386: Use cpp_define_formatted for __SIZEOF_FLOAT80__ definition adds d3959070aa4 [PATCH] aarch64: Implement vmlsl[_high]* intrinsics using builtins adds 50dbced2f37 openmp: Change the way of building of reduction array type adds adb520606ce c-family: Improve MEM_REF printing for diagnostics [PR98597] adds a3128bf0128 bootstrap: fix failing diagnostic selftest on Windows [PR98696] adds aaec739250b testsuite: Add testcase coverage for already fixed [PR96671] adds c0194736b47 gcc.dg/analyzer tests: use __builtin_alloca, not alloca.h adds cd09079cfd5 c++: Fix list-init of array of no-copy type [PR63707] adds ad260343385 AArch64: Add NEON, SVE and SVE2 RTL patterns for Multiply, [...] adds 424deca72b6 c++: Fix copy elision for base initialization adds d75199f7823 c++: Avoid redundant copy in {} init [PR98642] adds e63c2161d09 drop -dumpbase-ext from producer string adds 5c046034e3e match.pd: Optimize (x < 0) ^ (y < 0) to (x ^ y) < 0 etc. [PR96681] adds 0425f4c1b63 match.pd: Generalize the PR64309 simplifications [PR96669] adds e1efa6af61a preprocessor: Make quoting : [PR 95253] adds 9beb6d88eff c++: Fix qualified array-type construction [PR 98538] adds b90e4a97419 fortran: Fixes a bug in ISO_Fortran_binding.c. adds c029fcb5680 Reset force_source_line in final.c adds f1ad419ebfd rs6000, vector integer multiply/divide/modulo instructions adds 2f7f0d32e74 Daily bump. adds 2c356f221bb libstdc++-v3: Add -fcf-protection=none to -march=i486 adds b673e7547fb cd_dce: Return TODO_update_address_taken from last cd_dce [ [...] adds e2559c3945a match.pd: Optimize ((cst << x) & 1) [PR96669] adds 7e02426ba0c nios2: Remove custom instruction warnings adds 42f4e239924 nios2: Add -mcustom-fpu-cfg=fph2 adds 5e5d56919dd RTEMS: Add -mcustom-fpu-cfg=fph2 multilib adds a6d22fb21c6 openmp: Add support for the OpenMP 5.0 task detach clause adds a2960a04d51 testsuite: Fix up a testcase to find the right ISO_Fortran_ [...] adds 59cf67d1cf7 Daily bump. adds 3804e937b0e Default to DWARF5 adds 0f4c8f517b7 ipa: Adjust cgraph verifier to materialization on demand (P [...] adds 192105b6a2a Avoid assuming SSA_NAME_IDENTIFIER is nonnull. adds 56b5d13e278 aix: default to DWARF 4. adds b654d23a470 testsuite: Skip DWARF 5 testcases on AIX. adds 4c9bcd5c81a Daily bump. adds 4905f404018 Fix ChangeLog entries. adds 994fb69ac1b testsuite: powerpc fold-vec and sse updates. adds d3b41bde961 libgomp: Don't access gomp_sem_t as int using atomics uncon [...] adds 0f951b3dd34 RTEMS: Fix libgomp build adds 2e43880dbd4 libstd++: : Add workaround for as Error: file number less t [...] adds a81d2f1e414 libstdc++: Fix narrow char test to use stringbuf not wstringbuf adds 104304cd246 testsuite/97299 - fix test condition of gcc.dg/vect/slp-reduc-3.c adds acdc49fabf0 [arm,testsuite]: Fix options for vceqz_p64.c and vceqzq_p64.c adds b8c3f5196e1 libgomp: enable linux-futex on riscv64 adds e393f03b1a7 testsuite/97494 - adjust gcc.dg/vect/slp-11b.c adds ec153f96f89 libstdc++: Only test writing to wostream if supported [PR 98725] adds c7e276b869b analyzer: use "malloc" attribute adds 66cbe54960c Avoid no-stack-protector-attr fails on hppa*-*-*. adds 76c1dd15e4a Skip asm goto tests on hppa*-*-*. adds f56e14101b9 aix: document dwarf 4 default (and TPF default) adds 9675ccd64ef widening_mul: Fix up signed multiplication overflow check h [...] adds 32b6e917ac4 c++: Add CTAD + pack expansion testcase adds a89c5d3539c [PR97847] IRA: Skip abnormal critical edge splitting adds 325e70b47c6 libbacktrace: use correct directory/filename for DWARF 5 adds bfde774667f libbacktrace: don't fail tests if dwz fails adds 9a3ab93ceb2 [committed] Minor fix to pr41445-7 testcase adds ef1f8ee67d4 Daily bump. adds c907e439413 compiler: read embedcfg files, parse go:embed directives adds 9ee33d7c33f RISC-V: The 'multilib-generator' enhancement. adds 665e80ca5ec Fix PR ada/98740 adds 9b8741c98f2 ipa-sra: Do not remove return values needed because of non-call EH adds 049bfd186fa OpenMP/Fortran: Fixes for {use,is}_device_ptr adds 7d6f7e92c3b ipa/97673 - fix input_location leak adds 4b690f161b8 sparc,rtems: add __FIX_LEON3FT_TN0018 for affected targets adds f27cd6f4226 middle-end/98638 - avoid SSA reference to stmts after SSA d [...] adds 66dd412feea ipa/98330 - avoid ICEing on call indirect call adds 8227106f566 [committed] Fix dwarf-float.c test in testsuite adds 763b865a17d aarch64: Remove testing of saturation cumulative QC bit adds 04b472ad0e1 aarch64: Relax flags of saturation builtins adds 04cdb132020 [PATCH, rs6000] Update pr88233.c test (pr91799) adds 6a2a38620cf alias: Fix offset checks involving section anchors [PR92294] adds 6e6f3ed47e5 c++: Fix null this pointer [PR 98624] adds 7266ff2a243 c++: Remove unused fn adds c37f1d4081f c++: ICE when late parsing noexcept/NSDMI [PR98333] adds 29853c65324 c++: Always check access during late-parsing of members [PR58993] adds 9693e255ee2 PR middle-end/98664 - inconsistent -Wfree-nonheap-object fo [...] adds d89b00c095e c++: ICE with USING_DECL redeclaration [PR98687] adds eed40bca6f2 compiler: initialize variables with go:embed directives adds 2b27f37f90c c++: Crash when deducing template arguments [PR98659] adds a311dfaf92c Update gcc de.po. adds 6bc6094fa3f testsuite: aix testsuite adjustments adds f35a4f96373 Daily bump. adds b83604c75fe dwarf2out: reset generation count in toplev::finalize [PR98751] adds c05cdfb3f63 OpenMP/Fortran: Fix gfortran.dg/gomp/is_device_ptr-2.f90 adds 7ab1abf3b82 openmp: Don't ICE on detach clause with erroneous decl [PR98742] adds 34599780d0d tree-optimization/98758 - fix integer arithmetic in data-re [...] adds 4d2ecd960a0 builtins: Fix up two bugs in access_ref::inform_access [PR98721] adds a95538b6c5a Fix gfortran.dg/gomp/task-detach-1.f90 for non 64bit pointers adds ea74a3f548e vect: Fix VLA SLP invariant optimisation [PR98535] adds 79e1251b642 c++: Defer access checking when processing bases [PR82613] adds cafcfcb5840 c++: Fix tsubsting CLASS_PLACEHOLDER_TEMPLATE [PR95434] adds 49e8c14ef6f Optimize combination of comparisons to dec+compare adds 261cdd23195 Handle overflow in dependence analysis lambda ops gracefully adds 4334b524274 [PR98722] LRA: Check that target has no 3-op add insn to tr [...] adds 27c792895bd debug: Fix up DWARF 5 -g -flto -ffat-lto-objects [PR98765] adds f8c67777661 rs6000: Fix rs6000_emit_le_vsx_store (PR98549) adds e140f5fd3e2 aarch64: Split vec_selects of bottom elements into simple move adds 911f797a9be c++: Avoid UB in signed shift [PR 98625] adds 0bb27b81a76 libgomp: Fix up GOMP_task on s390x adds 842afc4e289 Re: trapv question adds fb39c4fe445 aix: make ctype_inline.h thread-safe and avoid _OBJ_DATA ch [...] adds b93d0e36c0a Daily bump. adds e711b67a908 Fix incorrect optimization by cprop_hardreg. adds fa9d1ad2ff6 testsuite/98224 - un-XFAIL Walloca-2.c on ilp32 adds 8afef308b49 testsuite/98241 - remove ilp32 XFAIL of gcc.dg/pr78973.c adds f46a40112ca testsuite/97299 - more gcc.dg/vect/slp-reduc-3.c massaging adds eaf883710c0 Fortran: This patch fixes comments 23 and 24 of PR96320. adds a1a967ce1ff libstdc++: Regenerate Makefile.in adds 3c1cf7350bf c++: Stat-hack for members [PR 98530] adds 9be0a89c95c gcc/fortran/intrinsic.texi: Fix typo adds 0568f801eff arm: [testuiste] Fix ivopts.c target test [PR96372] adds e154009f35a Fix typo in arm_mve.h __arm_vcmpneq_s8 return type adds 279d3a89b79 d: Enable private member access for __traits adds 43705f3fa34 aarch64: Use canonical RTL for sqdmlal patterns adds 0fb7aa205af c++: Fix up potential_constant_expression_1 FOR/WHILE_STMT [...] adds 7944753fad5 c++: Fix null this pointer [PR 98624] adds f645da0e4ab c++: Fix excessive instantiation inside decltype [PR71879] adds efb6bc55a93 fwprop: Allow (subreg (mem)) simplifications adds 68ba1039c7d [PR98777] LRA: Use preliminary created pseudo for in LRA el [...] adds 9929d04ee24 testsuite: Adjust cpp2a/lambda-uneval regrex adds 7559d465fda Daily bump. adds 070a1fb5f52 MAINTAINERS: Update my e-mail address adds bca467e56fe c++: ICE with delayed noexcept and attribute used [PR97966] adds ee78c20e74d Lower AVX512 vector comparison to AVX version when dest is vector. adds 4e3beaca15c arm: Fix ICE with incompatible values for -mfp16-format [PR98636]. adds fd61ca67f97 tree-optimization/98786 - fix issue with phiopt and abnormals adds e287a2a11d7 on ARRAY_REFs sign-extend offsets only from sizetype's prec [...] adds 36fe1cdc953 match.pd: Replace incorrect simplifications into copysign [ [...] adds 8bad25eb56b middle-end/98773 - always sign extend CHREC_RIGHT adds 4804de453e7 driver: do not check file existence here [PR 98452] adds b46027c6544 Drop time profile for multi-threaded training run. adds b2922559758 rs6000: Support variable insert and Expand vec_insert in ex [...] adds e3a8ef8ef2a rs6000: Enable vec_insert for P8 with rs6000_expand_vector_ [...] adds 4be156d6bef middle-end/98793 - properly handle BLKmode vectors in vecto [...] adds eee8ed2f22b testsuite: Uniquify test names [PR 98795] adds 9d33785f57d tree-ssa-mathopts: Use proper poly_int64 comparison with pa [...] adds d7e681fc3af Testcase for old PR 47059 adds bf8ee9e4eed Fortran: Fix for class functions as associated target [PR98565]. adds 25fc4d01a8e c++: ICE when mangling operator name [PR98545] adds a9ed18295bf c++: Fix up ubsan false positives on references [PR95693] adds 90cbc769006 c++: Fix base copy elision thinko [PR98744] adds 32a93eac7ad MAINTAINERS: Add myself for write after approval adds b485fa167ef dwarf2out: Always emit required 0 entries for DWARF 5 in *. [...] adds d08677c11dc testsuite: Fix sse2-andnpd-1.c and sse-andnps-1.c testscase [...] adds b30e19b517f testsuite: Fix a typo - UINON_TYPE to UNION_TYPE - in gcc.t [...] adds 70ab52b8caf testsuite: Fix a typo - UINON_TYPE to UNION_TYPE - in gcc.t [...] adds 9cead790738 doc: ensure GCC_EXTRA_DIAGNOSTIC_OUTPUT gets an HTML anchor adds ab8cde87cac testsuite: Enable spbp.C on AIX. adds 89100826ace c++: ICE with noexcept in class in member function [PR96623] adds 16b7b8a32d4 aarch64: Use RTL builtins for integer mla intrinsics adds 8502e23d1f2 Daily bump. adds eb9883c1312 testsuite: fix gcc.target/powerpc ilp32 failures adds a8cef3cba69 c++: 'this' injection and static member functions [PR97399] adds c63f091db89 rs6000: Fix up __m64 typedef in mmintrin.h [PR97301] adds 7e0f147a29f c++: private inheritance access diagnostics fix [PR17314] adds 81f928ec8e8 libphobos: Fix executables segfault on mipsel architecture adds 6b1633378b7 Daily bump. adds 02551aa9996 Daily bump. adds 389b67feac7 Arm: Add NEON and MVE complex mul, mla and mls patterns. adds b7a0507ad9f fold: Fix up strn{case,}cmp folding [PR98771] adds 28229916e1b RTEMS: Fix GCC specification adds c6b0e33febb Fortran: Fix deferred character lengths in array constructo [...] adds 5d01fc7c116 Fix internal error on extension with interface at -O2 adds 0433fc2d7d4 RTEMS: Fix default linker script adds defc40db9e0 middle-end/98807 - more vector_element_bits fixes adds 5089df534b8 Restore profile reproducibility. adds e05a117dc4b Enable -fprofile-reproducible=parallel-runs for profiledbootstrap. adds fe5cb7f94d4 configure: Add workaround for buggy binutils 2.35 [PR98811] adds 10c83fb7131 gcc/fortran/intrinsic.texi: Fix typos adds 94ff4c9dd98 c++: [[no_unique_address]] in empty base [PR98463] adds d9ad3b422f0 Fix wrong format for fprintf. adds 0194e2f02d7 libgomp: Add documentation for omp_fulfill_event runtime function adds a43e0dfb63f Add test case for PR 96843. adds 7d54cccad33 Commit test case for PR 96386. adds d6f1cf644c4 PR c++/98646 - spurious -Wnonnull calling a member on the r [...] adds a61efd46937 PR fortran/70070 - ICE on initializing character data beyon [...] adds 161e4c08624 Daily bump. adds 667c8e33270 skip asan-poisoning of discarded vars adds 7423731691e dwarf2asm: Fix up -gdwarf-64 for 32-bit targets adds eb77a934eec testsuite: Fix up pr98807.c on i686-linux [PR98807] adds 5a36cae275a d: Merge upstream dmd 609c3ce2d, phobos 3dd5df686 adds d9f50366102 amdgcn: Allow V64DFmode min/max reductions adds b3cc0c9a6ac testsuite/g++.dg/modules/modules.exp: Janitorial fixes adds 80198c701a7 Commit test case for PR 67539. adds d40b21eebc9 libgcov: improve profile reproducibility adds 2e81b16c243 liblsan: build missing lsan_posix.cpp file adds 4b59dbb5d67 middle-end/98726 - fix VECTOR_CST element access adds 5bbc80d0e40 Fix dumping of VEC_WIDEN_{PLUS,MINUS}_{LO,HI}_EXPR adds 17ad8cdebe6 aarch64: Tighten up checks for ubfix [PR98681] adds 6e44c09b2df dwarf2asm: Fix bootstrap on powerpc*-*-* [PR98839] adds 9c41bcc59c2 Fix PR ada/98228 new e80f1f6b7a3 testsuite: Fix TBAA in sse*and*p[sd]*.c tests new a4dfd0f089a c++: constexpr and empty fields [PR97566] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 40 + MAINTAINERS | 10 +- Makefile.def | 5 +- Makefile.in | 44 +- c++tools/ChangeLog | 14 + c++tools/Makefile.in | 3 +- c++tools/configure | 211 ++ c++tools/configure.ac | 10 + config/ChangeLog | 5 + config/ax_lib_socket_nsl.m4 | 40 + contrib/ChangeLog | 57 + contrib/gcc-changelog/git_commit.py | 70 +- contrib/gcc-changelog/git_email.py | 6 +- contrib/gcc-changelog/git_repository.py | 6 +- contrib/gcc-changelog/test_email.py | 15 +- contrib/gcc-changelog/test_patches.txt | 82 + contrib/mklog.py | 15 +- contrib/test_mklog.py | 42 + contrib/update-copyright.py | 25 +- gcc/ChangeLog | 1929 +++++++++++++++ gcc/DATESTAMP | 2 +- gcc/Makefile.in | 21 +- gcc/aclocal.m4 | 1 + gcc/ada/ChangeLog | 20 + gcc/ada/Makefile.rtl | 5 + gcc/ada/gcc-interface/trans.c | 35 +- gcc/ada/gcc-interface/utils.c | 14 +- gcc/alias.c | 47 +- gcc/analyzer/ChangeLog | 164 ++ gcc/analyzer/analyzer.h | 3 +- gcc/analyzer/diagnostic-manager.cc | 15 +- gcc/analyzer/engine.cc | 30 +- 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.../gcc.target/aarch64/advsimd-intrinsics/vqadd.c | 91 +- .../aarch64/advsimd-intrinsics/vqdmlXl.inc | 17 +- .../aarch64/advsimd-intrinsics/vqdmlXl_lane.inc | 21 +- .../aarch64/advsimd-intrinsics/vqdmlXl_n.inc | 17 +- .../aarch64/advsimd-intrinsics/vqdmlal.c | 9 - .../aarch64/advsimd-intrinsics/vqdmlal_lane.c | 14 - .../aarch64/advsimd-intrinsics/vqdmlal_n.c | 9 - .../aarch64/advsimd-intrinsics/vqdmlsl.c | 9 - .../aarch64/advsimd-intrinsics/vqdmlsl_lane.c | 14 - .../aarch64/advsimd-intrinsics/vqdmlsl_n.c | 9 - .../aarch64/advsimd-intrinsics/vqdmulh.c | 42 +- .../aarch64/advsimd-intrinsics/vqdmulh_lane.c | 42 +- .../aarch64/advsimd-intrinsics/vqdmulh_n.c | 42 +- .../aarch64/advsimd-intrinsics/vqdmull.c | 30 +- .../aarch64/advsimd-intrinsics/vqdmull_lane.c | 30 +- .../aarch64/advsimd-intrinsics/vqdmull_n.c | 29 +- .../gcc.target/aarch64/advsimd-intrinsics/vqmovn.c | 49 +- .../aarch64/advsimd-intrinsics/vqmovun.c | 31 +- .../gcc.target/aarch64/advsimd-intrinsics/vqneg.c | 29 +- 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gcc/testsuite/gcc.target/i386/pr95021-3.c | 2 +- gcc/testsuite/gcc.target/i386/pr95852-1.c | 266 +++ gcc/testsuite/gcc.target/i386/pr95852-2.c | 266 +++ gcc/testsuite/gcc.target/i386/pr95852-3.c | 266 +++ gcc/testsuite/gcc.target/i386/pr95852-4.c | 266 +++ gcc/testsuite/gcc.target/i386/pr95905-1.c | 26 + gcc/testsuite/gcc.target/i386/pr95905-2.c | 82 + gcc/testsuite/gcc.target/i386/pr95905-3.c | 82 + gcc/testsuite/gcc.target/i386/pr95905-4.c | 82 + gcc/testsuite/gcc.target/i386/pr96271.c | 11 + gcc/testsuite/gcc.target/i386/pr96938.c | 66 + gcc/testsuite/gcc.target/i386/pr97978.c | 22 + gcc/testsuite/gcc.target/i386/pr98334.c | 36 + gcc/testsuite/gcc.target/i386/pr98482-1.c | 9 + gcc/testsuite/gcc.target/i386/pr98482-2.c | 10 + gcc/testsuite/gcc.target/i386/pr98495-1.c | 10 + gcc/testsuite/gcc.target/i386/pr98495-2.c | 11 + gcc/testsuite/gcc.target/i386/pr98495-3.c | 8 + gcc/testsuite/gcc.target/i386/pr98495-4.c | 8 + gcc/testsuite/gcc.target/i386/pr98495-5.c | 9 + gcc/testsuite/gcc.target/i386/pr98522.c | 39 + gcc/testsuite/gcc.target/i386/pr98567-1.c | 31 + gcc/testsuite/gcc.target/i386/pr98567-2.c | 31 + gcc/testsuite/gcc.target/i386/pr98585.c | 14 + gcc/testsuite/gcc.target/i386/pr98603.c | 11 + gcc/testsuite/gcc.target/i386/pr98667-1.c | 9 + gcc/testsuite/gcc.target/i386/pr98667-2.c | 9 + gcc/testsuite/gcc.target/i386/pr98667-3.c | 7 + gcc/testsuite/gcc.target/i386/pr98670.c | 16 + gcc/testsuite/gcc.target/i386/pr98694.c | 41 + gcc/testsuite/gcc.target/i386/sse2-mmx-pextrw.c | 2 +- gcc/testsuite/gcc.target/i386/sse2-pr98461-2.c | 25 + .../gcc.target/powerpc/builtins-1-p10-runnable.c | 398 ++++ .../gcc.target/powerpc/fold-vec-extract-char.p7.c | 2 +- .../powerpc/fold-vec-extract-double.p7.c | 3 +- .../gcc.target/powerpc/fold-vec-extract-float.p7.c | 3 +- .../gcc.target/powerpc/fold-vec-extract-float.p8.c | 2 +- .../gcc.target/powerpc/fold-vec-extract-int.p7.c | 3 +- .../gcc.target/powerpc/fold-vec-extract-int.p8.c | 2 +- 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3 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O3_LTO updated (cd6d537c48 -> 1f583bc2fc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O3_LTO in repository toolchain/ci/binutils-gdb. from cd6d537c48 elf: Allow mixed ordered/unordered inputs for non-relocatable link adds dbed468bcb sim: common: rename sim_print_config adds 19b1c38562 sim: common: add a version output helper w/copyright+license info adds 2b667e3297 sim: common: use sim_config_print name adds babd2ee15d sim: common: version: add build & homepage info when interactive adds dfb856ba26 sim: update bug URI to https:// adds c68ea49f59 gdb: bfin: use align helper adds 9353bb9ed6 Automatic date update in version.in adds 9416af6e7d sim: stdlib.h for abs() adds 3d52735bab sim: include stdlib.h for atoi() adds 18b9872261 RISC-V: Ouput __global_pointer$ as dynamic symbol when gener [...] adds de6a7ee4bd asan: heap buffer overflow in _bfd_vms_slurp_egsd adds 40b119304e Re: elf: Allow mixed ordered/unordered inputs for non-reloca [...] adds 5f8c2a1507 Update config.sub and config.guess adds d750c713c9 Update libiberty with latest sources from gcc mainline adds c8bad65eee is_relocatable_executable --exclude-libs failure adds b281a04ff0 ld sysroot-prefix test fails adds b5ff370e96 Fix TUI source window drawing adds 1b6d4bb223 Redraw both spaces between line numbers and source code adds 5519536196 Prevent flickering when redrawing the TUI source window adds b09ad6eae9 libctf: do not print array declarators backwards adds 57f97d0e6d libctf, ld: CTF dumper changes for consistency adds 91e7ce2fd7 libctf, ld: more dumper improvements adds ffeece6ac2 libctf, ld: prohibit getting the size or alignment of forwards adds 37002871ac libctf, ld: dump enums: generally improve dump formatting adds 1038406a8f libctf: rip out BFD_DEPENDENCIES / BFD_LIBADD adds c59e30ed17 libctf: new testsuite adds 9bc769718d libctf: new test of enum lookups with the _next iterator adds abed0b0718 libctf: warn about information loss because of unreleased fo [...] adds 6c3a38777b libctf, include: support unnamed structure members better adds 8769046e5a libctf: remove outdated comment about parent dict importing adds abe4ca69a1 libctf: fix lookups of pointers by name in parent dicts adds 608a333d7d libctf: fix old ChangeLog typo adds b4b6ea4680 libctf, ld: fix formatting of forwards to unions and enums adds 70d3120f32 libctf, testsuite: don't run without a suitable compiler adds 0814dbfbfc libctf, testsuite: adjust for real return type of ctf_member_count adds 85dd67bd6d Automatic date update in version.in adds 0c7f5bd08c sim: h8300: simplify testsuite runner adds a2f8e947a8 sim: h8300: fix test mach markers adds c004e77f7d sim: testsuite: delete unused Make-common.in file adds 865288236d sim: fr30: delete unused testsuite adds fbc09e7af7 RISC-V: Implement support for big endian targets. adds f36ce378b4 RISC-V: Fix riscv gas/ld testsuites failures for big endian. adds 286d2f2cd7 RISC-V: Mention -mbig-endian and -mlittle-endian in doc adds 22206e847d gas APP macro tests adds 73624512cf ld rgn-at10 and rgn-at11 test adds 3677b72961 sparc-sun-solaris2 and sparc64-sun-solaris2 config adds 85f55c2b75 sparc-elf ld test fails adds 599c86c4a5 score-elf binutils-all/strip-13 fail adds 4b186f88b8 gdbsupport: common-utils.h: fix typo in header adds 3c55062cc1 gdb/testsuite: fix race in gdb.threads/signal-while-stepping [...] adds b49180acf2 Fix fixed-point binary operation type handling adds 1606216201 config.sub update broke powerpc-eabivle adds 4018f4e0fc ld pr22471 test fails adds f526791a6f Regen ld/po/BLD-POTFILES.in adds e2ede46cb2 Automatic date update in version.in adds 6987d5a1bb binutils/readelf.c: Correct grammar in comment adds d4e57b87a3 bfin: Check bfd_link_hash_indirect adds 2652cfad8d RISC-V: Support riscv bitmanip frozen ZBA/ZBB/ZBC instructio [...] adds 1861f7cfbf sim: cris: fix C tests with newer toolchains adds 9446bcf6be fix paths in ChangeLog adds 4d4490b8d7 ld: xfail riscv64*-*-* for ld-scripts/empty-address-2 tests. adds aa881ecde4 RISC-V: Add pause hint instruction. adds 78e4948694 [gdb/build] Fix gdbserver build with -fsanitize=address adds 17d60030ae Fix another path length problem opening files on Win32 systems. adds d4813f1046 Fix regression in Ada aggregate assignment adds 8e604ff077 xfail more cases of complaints about relocs in read-only sections adds dc20061339 sh-pe ld XPASSes adds 959d6a673e Fix regression in Ada do_full_match adds 3b288c8e2e m68k: Require m68020up rather than m68000up for CHK.L instruction. adds d1bcae833b ELF: Don't generate unused section symbols adds 1b0927db3c Updated French translation for the opcodes/ subdirectory. adds f478212851 libtool.m4: update GNU/Hurd test from upstream. In upstream [...] adds e904f56d02 gdb/sim: add support for exporting memory map adds bfc7d04afb sim: h8300: delete opcode caching adds a39487c668 sim: cris: use -sim with C tests for cris-elf targets adds e6c1dbbfe8 sim: cris: disable test that crashes the linker adds 0f8e278da2 sim: ChangeLog: move arch-specific entries into the arch dir adds 9a50f40e82 Automatic date update in version.in adds f4cfa91741 sim: ppc: stub out sim_memory_map adds e343681375 gdb/fortran: Correct the lval type for array elements of int [...] adds 1940319c0e [gdb] Fix internal-error in process_event_stop_test adds fb932b57cb Treat the AArch64 register id_aa64mmfr2_el1 as a core system [...] adds e84c871648 Fix places in the AArch64 opcodes library code where a call [...] adds 3c8c6de21d gdb: user variables with components of dynamic type adds ed20522215 Updated Swedish translation for the opcodes/ subdirectory adds d00f086803 gdb: add missing test for completion of invalid /FMT strings adds 6abd4cf281 gdb: check for empty strings in get_standard_cache_dir/get_s [...] adds 8fc48b7961 Pass void_context_p to parse_expression adds 46f900c065 sim: require a C11 compiler adds a7e906e8f5 Automatic date update in version.in adds 6430704567 configure regen adds aae7fcb8d7 POWER10: Add Return-Oriented Programming instructions adds b1b29aa51a elf: Verify section size for mixed ordered/unordered inputs adds ba9e922fa0 ld/x86-64: Also set LAM_U57 when setting LAM_U48 adds ce0be4070f sim: common: add missing stdlib.h for abort() adds 055bc77a80 Add Changelog entries and NEWS entries for 2.36 branch adds 573fe3fbc1 Change version number to 2.36.50 and regenerate files adds be2c78856d Update release howto with 2.37 numbers adds b5a4a01af4 sim: hw: rework code to avoid gcc warnings adds f41464416a sim: pru: fix include ordering with sim-main.h adds 0a94990bf6 ld/x86-64: Properly Handle -z lam-u48/lam-u57 adds bf470982f9 sim: enable -Werror by default for some arches adds 50df264dae sim: clean up stale AC_PREREQ refs adds f8cab0b995 sim: sh64: delete port adds f074c07d8d sim: common: clean up asprintf includes a bit adds 7eb99e5e27 sim: cr16/d10v: move storage out of header adds a9fd212a24 sim: replace rindex with strrchr adds 50ad1254d5 GCC: Pass --plugin to AR and RANLIB adds a4966cd965 Binutils: Pass --plugin to AR and RANLIB adds af019bfde9 Support the PGO build for binutils+gdb adds 66beed0227 Fix erroneous agent expression test adds bc167b6b3e Remove a use of print_expression adds 54585eee2e Avoid crash in compile_to_object adds 5834526f4b Automatic date update in version.in adds 46b1518d4c Automatic date update in version.in adds a8aa72b913 Updated translations for multiple subdirectories adds 68ed285428 sim: clean up C11 header includes adds 933306703a sim: rl78: move storage out of header adds 90e123dd60 sim: common: fix printf formats adds a0c38f0d70 sim: or1k: fix include ordering with sim-main.h adds 5c1008a41f sim: call SIM_AC_OPTION_WARNINGS(no) in remaining ports adds 9c70334dee sim: always call SIM_AC_OPTION_WARNINGS adds c0f6e439cc Add support for more MIPS variants to the linker command line. adds 82c70b08df aarch64: Remove support for CSRE adds 10dadadc5b [gdb/testsuite] Fix gdb.arch/amd64-stap-three-arg-disp.S adds 062eaacbac gdb: change jit_debug to a bool adds eef401dce1 gdb: convert solib-aix to new-style debug macros adds c6185dce03 gdb: convert aarch64 to new-style debug macros adds 254c3783fe sim: tests: get common tests working again adds eabdd87b2e Automatic date update in version.in adds 03c02f3116 GCC: Check if AR works with --plugin and rc adds 83b33c6cb9 Binutils: Check if AR works with --plugin and rc adds 44124a4683 binuitils: Check if AR is usable for LTO build adds f631b79abe sim: or1k: delete redundant SIM_AC_OPTION_INLINE call adds f220ef633c sim: common: use #error properly adds 68895f7d7e sim: README-HACKING: clean up stale run references adds 5e9e2f41eb sim: or1k: clean up stale build entries adds e998918e98 sim: or1k: fix mixing of code & decl warning adds 7c654b719d gdb/fortran: add symbol base comparison operators adds ce38f5edf1 gdb: fix debug dump of OP_BOOL expressions adds 6d104cac0a Updated translations for some subdirectories adds c2e9a4a3ed elf/x86-64: Adjust R_AMD64_DIR64/R_AMD64_DIR32 for PE/x86-64 inputs adds 18bfb5057f [gdb/testsuite] Require is_amd64_regs_target in gdb.base/dis [...] adds d546b61084 Implement a workaround for GNU mak jobserver adds 5291fe3cd1 aarch64: Add support for bfloat16 in gdb. adds b2f2ae0d6f gdb: remove pre_init_ui_hook from top.c adds 3f94e58859 [gdb/testsuite] Add have_mpx in lib/gdb.exp adds 16e9019ef7 gdb: move baud_rate and serial_parity declarations to serial.h adds fe7a351a8e gdb: move read{now,never}_symbol_files declarations to symfile.h adds 24a7f1b548 gdb: fix indentation in infrun.c adds 3034143dc6 src-release: fix indentation adds 4180301e81 Automatic date update in version.in adds 62fe7512a7 sim: watch: fix pc watchpoints on little endian host systems adds c54f3efdc2 sim: watch: fix range expression processing adds 2ce40d1a51 Add SEH support to code generated by dlltool. adds 8c4645b488 Remove sflag_info param from wild callback functions adds b209b5a6b8 SHF_LINK_ORDER fixup_link_order in ld adds 5347ed60c5 Regen Makefile.in for jobserver.m4 aclocal.m4 dependency adds 844bf810cf x86: Don't generate GOT_symbol for PLT relocations adds b634d11d61 ld: Check for ELF input before accessing ELF section data adds 54ca900277 gdb: convert jit to new-style debug macros adds 5e12f48ffb gdb: bool-ify file_is_auto_load_safe adds db972fce46 gdb: bool-ify ext_lang_auto_load_enabled and friends adds 5bf7e91b2b gdb: bool-ify users of file_is_auto_load_safe adds 506195754c gdb: bool-ify maybe_add_script_{text,file} adds fb0f5031bb gdb: turn arc_debug into a bool adds d8d1feb424 gdb: convert arc to new-style debug macros adds 4120e4885b Re: SHF_LINK_ORDER fixup_link_order in ld adds 3eeabe12c3 Automatic date update in version.in adds c9d220893e gdb: make the remote target track its own thread resume state adds bd497355ea gdb: remove target_ops::commit_resume implementation in reco [...] adds 8f66807b98 gdb: better handling of 'S' packets adds d9b1deff13 sim: watch: add basic default handler that traps adds 54780889e9 sim: h8300: drop separate eightbit memory buffer adds adb0bd8fda gas: bfin: fix build time warnings adds abad28152e gas: bfin: build lexer with -Werror adds 271bea6acd ld: tests: add -msim when testing bfin targets adds 7e0d77ef5f Fix an illegal memory access parsing a win32pstatus note wit [...] adds 116d0cf103 [gdb/testsuite] Fix gdb.base/style.exp with -m32 adds 5fae2a2c66 [gdb/breakpoint] Handle .plt.sec in in_plt_section adds 5a10699ff3 Updated translations for some subdirectories adds 8ca9c7eb67 bfin: Skip non SEC_ALLOC section for R_BFIN_FUNCDESC adds 58eadc4b69 Fix building gdb with gcc-4.x adds c14dee84dd Update my email address (long overdue!) adds 17e8913732 Add myself to gdb/MAINTAINERS adds 5aa06b1b14 Automatic date update in version.in adds 5fda40b28f gas: make [248]byte directives available everywhere adds 3624a6c15c PR26539, memory leak in inflate.c adds 37a9c3a53e sim: testsuite: allow tests to declare expected exit status adds 7cf91a2481 sim: m32r: clean up redundant test coverage adds 89bfc2a429 sim: frv: clean up redundant test coverage adds 137d6efd8a sim: mips: delete empty stub test dir adds 29fd199ed8 sim: d10v: relocate tests & clean up test harness adds bb3eddb5bd sim: testsuite: delete configure script adds dcd709e056 RISC-V: Comments tidy and improvement. adds b800637e76 RISC-V: Error and warning messages tidy. adds 1942a04836 RISC-V: Indent and GNU coding standards tidy, also aligned t [...] adds 4bb5732e27 RISC-V: Fixed the indent that caused by the previous commits [...] adds 10f92414d6 [gdb/testsuite] Fix gdb.fortran/array-slices.exp with -m32 adds 5a11fff005 gdb/tui: compare pointer to nullptr, not 0 adds e403a898b5 Automatic date update in version.in adds 1368b914e9 sim: testsuite: flatten tree adds eb6e6af8c1 PR26002 undefined symbol VER_NDX_GLOBAL vs. VER_NDX_LOCAL adds ad92f33d38 Tidy inflateEnd calls adds 68b007788a ld/x86: Add -z report-relative-reloc adds 75a933f399 ld/elf/x86: Don't compare IFUNC address in the shared object adds 514fca98df Automatic date update in version.in adds edf0f284b1 PR binutils/23460: Increase the max number of open files to 20 adds d46153313b Automatic date update in version.in adds 25294ff049 gold: Remove the circular IFUNC dependency in ifuncmain6pie adds 994b251328 ld/elf: Ignore section symbols when matching linkonce with comdat adds 44365e88c0 PR27198, segv in S_IS_WEAK adds cecb191290 gdb: const-ify unpack_* functions in remote.c adds e3b2741b16 gdb: const-ify remote_target::add_current_inferior_and_threa [...] adds b5c8f22d28 gdb: move remote_target::start_remote variable to narrower scope adds aa2838ccc5 gdb: const-ify hostio methods parameter in remote.c adds d3d7d1ba3b [gdb/tdep] Handle si_addr_bnd in compat_siginfo_from_siginfo adds 326adec374 PR26378, sections initialised only by linker scripts are alw [...] adds 6a9ad81c44 gdb/riscv: use a single regset supply function for riscv fbs [...] adds 705989f19a as: Automatically enable DWARF5 support adds 02baa13385 gdb/testsuite: remove actual addresses from some test names adds 4cfcd3b333 sim: common: modernize gennltvals.sh adds 5e25901fcc sim: common: delete configure & Makefile adds f89f33e57c sim: common: simplify version script adds f0c1efa53d Automatic date update in version.in adds 85e963f185 ld: Just xfail riscv little endian targets for compressed1d.d test. adds 0e7620dcdc sim: bfin: delete accidental ADI copyright adds a75a6a4164 [GOLD] powerpc assertion failure adds 30845f113a PowerPC use_local_plt adds 0c4e2c6c88 [gdb/testsuite] Fix gdb.arch/i386-mpx.exp with -m32 adds 1485212328 [gdb/testsuite] Fix gdb.base/step-over-syscall.exp with -m32 adds c98de297b3 libctf, ld: fix data symbol test with newer GCC adds e05a3e5a49 libctf: lookup_by_name: do not return success for nonexisten [...] adds 26503e2f5e libctf, create: fix ctf_type_add of structs with unnamed members adds ccbe4c82d5 Use gdb::array_view for setting value bytes in trad-frame adds c65ca138c4 sim: ppc: update version script usage adds bdec2917b1 Convert some frame functions to use gdb::array_view. adds a9a87d3525 trad-frame cleanups adds 1c3b85ad28 use DISABLE_COPY_AND_ASSIGN in switch_thru_all_uis adds 11321a0505 Automatic date update in version.in adds 8bd10d6b16 PowerPC64 synthetic symbols adds 4bd7c90276 PowerPC: Don't generate unused section symbols adds 037e8112b9 [gdb/server] Don't overwrite fs/gs_base with -m32 adds 6f52fdf404 Fix a few stap parser issues and add a new test for probe ex [...] adds 1402665c8f [gdb/testsuite] Skip gdb.rust/*.exp for target board unix/-m32 adds 7c794afd54 [gdb/testsuite] Fix gdb.python/py-format-string.exp with -m32 adds 6571ffc620 gdb/testsuite: add links for handled control sequences in li [...] adds c3e96aa78f gdb/testsuite: rename _cur_x/_cur_y to _cur_col/_cur_row in [...] adds 3f0781f389 Automatic date update in version.in adds a6c11cbb14 gdb/remote.c: address conflicting enum and method name adds 6bd434d6ca gdb: make some variables static adds 17e593e966 gdb/dwarf: add some logging in dwarf2/read.c adds de53369b2e gdb/dwarf: add assertion in maybe_queue_comp_unit adds f9e9ba90b3 gdb/testsuite: use multi_line in gdb.base/skip.exp adds d4dd4fca16 gdb: change debug_bfd_cache to bool adds c78eec4424 mips XPASS pr26936 adds 498ff0328f PR27218, memory access violation in dwarf2dbg.c adds be07043ea8 PR27221, 058430b4a1 warnings while assembling the Linux kernel adds 7cb6d92a3f gdb: convert arm to new-style debug macros adds 325d39e4e0 Add Python support for hardware breakpoints adds a72d0f3d69 gdb/doc: reorder and group sections relating to aliases adds 730af66356 gdb/testsuite: improve logging in lib/tuiterm.exp adds 439706e6a9 gdb: use interruptible_select when connecting to a remote adds 1e15fcac94 gdb: convert bfd-cache to new-style debug macros adds d3abc0cee0 gdb: remove unused f77_array_offset_tbl from f-valprint.c adds a59902a7c1 gdb: convert auto-load to new-style debug macros adds d5d24e12f9 Fix build errors for armhf adds cd211c75cb Handle additional connection error adds e534c7e8c4 Automatic date update in version.in adds c651f0a614 MAINTAINERS: Update my e-mail address adds cc4bc93e52 gdb/doc: down case contents of @var adds fe461d2f70 gdb/doc: move @menu to the end of the node adds 5b7d941b90 gdb: add owner-related methods to struct type adds 3062502019 gdb: remove TYPE_OBJFILE_OWNED macro adds 344e9841d9 gdb: remove TYPE_OBJFILE macro adds baf2b57f18 gdb: move set remote commands to remote.c adds cda09ec9f9 gdb: move remote_debug to remote.{h,c} adds 02349803fc gdb: change remote_debug to bool adds 2189c31265 gdb: add remote_debug_printf adds d8c4766d31 gdb/doc: don't rely on @menu item within the docs adds e7b430724d gdb: don't print escape characters when a style is disabled adds 9d2d8a16e1 gdb: add new version style adds 0ac85db529 gdb/testsuite: eliminate gdb_suppress_tests mechanism adds 705646c074 Fix expected output of gdb.base/line65535.exp with dwarf-5 adds e753591581 Automatic date update in version.in adds 1af4c9c420 Disable bracketed paste mode in GDB tests adds ef45cb65a7 Use readline's variant of Windows patch adds d3ee35dbf7 Improve gdb_tilde_expand logic. adds dd5ca05f47 gdb: fix regression in copy_type_recursive adds c99d72de18 Automatic date update in version.in adds 9f7f6cb8d2 Remove call to reset from compile_to_object adds 18454c151f DWARF-5: Fix parsing DWARF-5 line number tables adds 3637a558a5 Use std::vector for "registers_used" in compile feature adds b10bae1875 Avoid crash when "compile" expression uses cooked register adds 68fcee4fa7 PR27228, .reloc wrong symbol emitted for undefined local symbol adds 9b351c9bc9 Minor updates to the 'how to make a release' document adds eea133e655 gas: Add a testcase for PR gas/27228 adds 940d0202fd DWARF-5: Ignore empty range in DWARF-5 line number tables adds 123b18bf62 Automatic date update in version.in adds b8df69003d Update linker scripts with the names of new DWARF-5 debug sections. adds 04de9f3e31 gdb/doc: move @menu blocks to the end of their enclosing @node adds 9e42b97628 Add some more DWARF-5 sections adds acd6125f01 Add test case for symbol menu for local enumerators adds 191849105b Specially handle array contexts in Ada expression resolution adds a625a8c9eb Fix fixed-point regression with recent GCC adds f3bdc2dbb9 gdb/docs: add parentheses in Python examples using print adds 9f6c202e57 [gdb/symtab] Handle DW_AT_ranges with DW_FORM_sec_off in par [...] adds 01a01e0ab3 Automatic date update in version.in adds d0021af39c [gdb/testsuite] Fix gdb.opt/solib-intra-step.exp with -m32 adds 4ca40594f9 [gdb/testsuite] Fix gdb.threads/killed-outside.exp with -m32 adds d56834cbfb arc: Log "pc" value in "arc_skip_prologue" adds e37709f090 Fix thinko in objcopy's memory freeing code. adds ac3571d941 Fix the date for the last entry in gdb/ChangeLog adds d0cc52bdf2 gdb: Add default reggroups for ARC adds 4287950e54 pr27228 testcase adds 9886ff0319 gas byte test adds a45ef9a30b gas testsuite tidy adds 1c9c9b9b55 PR27226, ld.bfd contains huge .rodata section adds c3ffb8f340 Segmentation fault i386-gen adds 4cb1265b3f bfd: add elfcore_write_file_note adds 4ef367bffd Use debug_prefixed_printf_cond in windows-nat.c adds 1f583bc2fc nios2: Don't disable relaxation with --gdwarf-N No new revisions were added by this update. Summary of changes: ChangeLog | 159 + Makefile.def | 4 +- Makefile.in | 81 +- Makefile.tpl | 63 +- bfd/ChangeLog | 345 + bfd/Makefile.in | 1 + bfd/aclocal.m4 | 1 + bfd/aix386-core.c | 1 + bfd/aout-target.h | 1 + bfd/bfd-in2.h | 24 +- bfd/bfdio.c | 23 +- bfd/binary.c | 1 + bfd/cisco-core.c | 2 + bfd/coff-alpha.c | 1 + bfd/coff-i386.c | 4 +- bfd/coff-ia64.c | 1 + bfd/coff-mips.c | 3 + bfd/coff-rs6000.c | 2 + bfd/coff-sh.c | 2 + bfd/coff-tic30.c | 1 + bfd/coff-tic54x.c | 26 + bfd/coff-x86_64.c | 2 + bfd/coff64-rs6000.c | 2 + bfd/coffcode.h | 3 + bfd/compress.c | 3 +- bfd/config.bfd | 17 +- bfd/configure | 87 +- bfd/configure.ac | 4 + bfd/doc/Makefile.in | 1 + bfd/dwarf2.c | 5 +- bfd/elf-bfd.h | 2 + bfd/elf-linker-x86.h | 3 + bfd/elf.c | 28 +- bfd/elf32-bfin.c | 245 +- bfd/elf32-ft32.c | 3 +- bfd/elf32-i386.c | 36 + bfd/elf32-ppc.c | 55 +- bfd/elf32-score.c | 10 +- bfd/elf32-score7.c | 10 +- bfd/elf64-ppc.c | 83 +- bfd/elf64-x86-64.c | 33 + bfd/elfcode.h | 8 +- bfd/elflink.c | 262 +- bfd/elfnn-riscv.c | 425 +- bfd/elfxx-riscv.c | 56 +- bfd/elfxx-riscv.h | 4 +- bfd/elfxx-target.h | 6 + bfd/elfxx-x86.c | 72 +- bfd/elfxx-x86.h | 7 + bfd/hppabsd-core.c | 1 + bfd/hpux-core.c | 1 + bfd/i386msdos.c | 1 + bfd/ihex.c | 1 + bfd/irix-core.c | 1 + bfd/mach-o-target.c | 1 + bfd/mmo.c | 1 + bfd/netbsd-core.c | 1 + bfd/osf-core.c | 1 + bfd/pdp11.c | 1 + bfd/pef.c | 2 + bfd/plugin.c | 1 + bfd/po/bfd.pot | 2574 +-- bfd/po/fr.po | 2666 +-- bfd/po/pt.po | 2681 ++-- bfd/po/sr.po | 2687 ++-- bfd/po/uk.po | 2666 +-- bfd/ppcboot.c | 1 + bfd/ptrace-core.c | 1 + bfd/reloc.c | 7 + bfd/sco5-core.c | 1 + bfd/section.c | 7 +- bfd/som.c | 1 + bfd/srec.c | 2 + bfd/syms.c | 3 + bfd/targets.c | 18 + bfd/tekhex.c | 1 + bfd/trad-core.c | 1 + bfd/verilog.c | 1 + bfd/version.h | 2 +- bfd/version.m4 | 2 +- bfd/vms-alpha.c | 4 +- bfd/vms-lib.c | 1 + bfd/wasm-module.c | 1 + bfd/xsym.c | 1 + binutils/BRANCHES | 1 + binutils/ChangeLog | 107 + binutils/MAINTAINERS | 8 +- binutils/Makefile.in | 1 + binutils/NEWS | 2 + binutils/README-how-to-make-a-release | 64 +- binutils/aclocal.m4 | 1 + binutils/configure | 85 +- binutils/configure.ac | 2 + binutils/dlltool.c | 50 +- binutils/doc/Makefile.in | 1 + binutils/objcopy.c | 26 +- binutils/po/binutils.pot | 3317 ++-- binutils/po/fr.po | 3826 +++-- binutils/po/pt.po | 3943 ++--- binutils/po/sr.po | 3845 +++-- binutils/po/sv.po | 3804 +++-- binutils/po/uk.po | 3840 +++-- binutils/readelf.c | 10 +- binutils/testsuite/binutils-all/readelf.exp | 6 +- binutils/testsuite/binutils-all/readelf.s-64 | 2 +- .../{readelf.s-64 => readelf.s-64-unused} | 0 binutils/testsuite/binutils-all/readelf.ss | 5 +- binutils/testsuite/binutils-all/readelf.ss-64 | 5 +- .../{readelf.ss-64 => readelf.ss-64-unused} | 0 .../binutils-all/{readelf.ss => readelf.ss-unused} | 0 binutils/testsuite/lib/binutils-common.exp | 31 + config.guess | 272 +- config.sub | 638 +- config/ChangeLog | 19 + config/gcc-plugin.m4 | 40 + config/jobserver.m4 | 24 + configure | 246 +- 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rename sim/testsuite/{sim => }/bfin/c_alu2op_divs.s (100%) rename sim/testsuite/{sim => }/bfin/c_alu2op_log_l_sft.s (100%) rename sim/testsuite/{sim => }/bfin/c_alu2op_log_r_sft.s (100%) rename sim/testsuite/{sim => }/bfin/c_alu2op_shadd_1.s (100%) rename sim/testsuite/{sim => }/bfin/c_alu2op_shadd_2.s (100%) rename sim/testsuite/{sim => }/bfin/c_br_preg_killed_ac.s (100%) rename sim/testsuite/{sim => }/bfin/c_br_preg_killed_ex1.s (100%) rename sim/testsuite/{sim => }/bfin/c_br_preg_stall_ac.s (100%) rename sim/testsuite/{sim => }/bfin/c_br_preg_stall_ex1.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_bp1.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_bp2.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_bp3.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_bp4.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_brf_bp.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_brf_brt_bp.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_brf_brt_nbp.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_brf_fbkwd.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_brf_nbp.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_brt_bp.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_brt_nbp.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_kills_dhits.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_kills_dmiss.s (100%) rename sim/testsuite/{sim => }/bfin/c_cactrl_iflush_pr.s (100%) rename sim/testsuite/{sim => }/bfin/c_cactrl_iflush_pr_pp.s (100%) rename sim/testsuite/{sim => }/bfin/c_calla_ljump.s (100%) rename sim/testsuite/{sim => }/bfin/c_calla_subr.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc2dreg.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc2stat_cc_ac.S (100%) rename sim/testsuite/{sim => }/bfin/c_cc2stat_cc_an.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc2stat_cc_aq.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc2stat_cc_av0.S (100%) rename sim/testsuite/{sim => }/bfin/c_cc2stat_cc_av1.S (100%) rename sim/testsuite/{sim => }/bfin/c_cc2stat_cc_az.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc_flag_ccmv_depend.S (100%) rename sim/testsuite/{sim => }/bfin/c_cc_flagdreg_mvbrsft.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc_flagdreg_mvbrsft_s1.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc_flagdreg_mvbrsft_sn.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc_regmvlogi_mvbrsft.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc_regmvlogi_mvbrsft_s1.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc_regmvlogi_mvbrsft_sn.S (100%) rename sim/testsuite/{sim => }/bfin/c_ccflag_a0a1.S (100%) rename sim/testsuite/{sim => }/bfin/c_ccflag_dr_dr.s (100%) rename sim/testsuite/{sim => }/bfin/c_ccflag_dr_dr_uu.s (100%) rename sim/testsuite/{sim => }/bfin/c_ccflag_dr_imm3.s (100%) rename sim/testsuite/{sim => }/bfin/c_ccflag_dr_imm3_uu.s (100%) rename sim/testsuite/{sim => }/bfin/c_ccflag_pr_imm3.s (100%) rename sim/testsuite/{sim => }/bfin/c_ccflag_pr_imm3_uu.s (100%) rename sim/testsuite/{sim => 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sim/testsuite/{sim => }/bfin/c_compi2opd_dr_add_i7_n.s (100%) rename sim/testsuite/{sim => }/bfin/c_compi2opd_dr_add_i7_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_compi2opd_dr_eq_i7_n.s (100%) rename sim/testsuite/{sim => }/bfin/c_compi2opd_dr_eq_i7_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_compi2opd_flags.S (100%) rename sim/testsuite/{sim => }/bfin/c_compi2opd_flags_2.S (100%) rename sim/testsuite/{sim => }/bfin/c_compi2opp_pr_add_i7_n.s (100%) rename sim/testsuite/{sim => }/bfin/c_compi2opp_pr_add_i7_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_compi2opp_pr_eq_i7_n.s (100%) rename sim/testsuite/{sim => }/bfin/c_compi2opp_pr_eq_i7_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_dagmodik_lnz_imgebl.s (100%) rename sim/testsuite/{sim => }/bfin/c_dagmodik_lnz_imltbl.s (100%) rename sim/testsuite/{sim => }/bfin/c_dagmodik_lz_inc_dec.s (100%) rename sim/testsuite/{sim => }/bfin/c_dagmodim_lnz_imgebl.s (100%) rename sim/testsuite/{sim => }/bfin/c_dagmodim_lnz_imltbl.s (100%) rename sim/testsuite/{sim => }/bfin/c_dagmodim_lz_inc_dec.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_a0_pm_a1.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_a0a1s.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_a_abs_a.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_a_neg_a.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_aa_absabs.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_aa_negneg.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_abs.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_absabs.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_alhwx.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_awx.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_byteop1ew.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_byteop2.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_byteop3.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_bytepack.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_byteunpack.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_disalnexcpt.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_max.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_maxmax.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_min.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_minmin.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_mix.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_r_lh_a0pa1.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_r_negneg.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rh_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rh_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rh_rnd12_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rh_rnd12_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rh_rnd20_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rh_rnd20_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rl_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rl_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rl_rnd12_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rl_rnd12_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rl_rnd20_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rl_rnd20_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rlh_rnd.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rm.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rmm.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rmp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rpm.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rpp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rr_lph_a1a0.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rrpm.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rrpm_aa.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rrpmmp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rrpmmp_sft.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rrpmmp_sft_x.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rrppmm.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rrppmm_sft.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rrppmm_sft_x.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_saa.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_sat_aa.S (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_search.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_sgn.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_a1a0.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_a1a0_iuw32.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_a1a0_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a0.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a0_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a0_ih.s (100%) rename sim/testsuite/{sim => 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sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_a1_s.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_a1_u.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_a1a0.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_a1a0_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_a1a0_is.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_a1a0_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_a1a0_s.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_a1a0_u.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_mix.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_ih.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_is.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_iu.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_m_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_m_iutsh.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_m_s.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_m_t.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_m_u.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_mix.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_s.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_t.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_tu.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_u.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_pair.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_pair_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_pair_is.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_pair_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_pair_m_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_pair_m_is.s (100%) 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sim/testsuite/{sim => }/bfin/c_dsp32shift_ahh.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_ahh_s.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_align16.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_align24.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_align8.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_amix.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_bitmux.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_bxor.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_expadj_h.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_expadj_l.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_expadj_r.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_expexp_r.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_fdepx.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_fextx.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_lf.s (100%) rename sim/testsuite/{sim => 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sim/testsuite/{sim => }/bfin/c_dsp32shiftim_lhalf_ln.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_lhalf_lp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_lhalf_rn.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_lhalf_rp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_lhh.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_lmix.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_rot.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_ld_dr_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_ld_dr_ipp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_ld_dr_ippm.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_ld_drhi_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_ld_drhi_ipp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_ld_drlo_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_ld_drlo_ipp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_st_dr_i.s (100%) rename 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sim/testsuite/{sim => }/bfin/c_logi2op_nbittst.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_nested.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_nested_bot.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_nested_prelc.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_nested_top.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_overlap.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_preg_div2_lc0.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_preg_div2_lc1.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_preg_lc0.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_preg_lc1.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_preg_stld.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_prelc.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_topbotcntr.s (100%) rename sim/testsuite/{sim => }/bfin/c_mmr_interr_ctl.s (100%) rename sim/testsuite/{sim => }/bfin/c_mmr_loop.S (100%) rename sim/testsuite/{sim => }/bfin/c_mmr_loop_user_except.S (100%) rename sim/testsuite/{sim => }/bfin/c_mmr_ppop_illegal_adr.S (100%) rename sim/testsuite/{sim => }/bfin/c_mmr_ppopm_illegal_adr.S (100%) rename sim/testsuite/{sim => }/bfin/c_mmr_timer.S (100%) rename sim/testsuite/{sim => }/bfin/c_mode_supervisor.S (100%) rename sim/testsuite/{sim => }/bfin/c_mode_user.S (100%) rename sim/testsuite/{sim => }/bfin/c_mode_user_superivsor.S (100%) rename sim/testsuite/{sim => }/bfin/c_multi_issue_dsp_ld_ld.s (100%) rename sim/testsuite/{sim => }/bfin/c_multi_issue_dsp_ldst_1.s (100%) rename sim/testsuite/{sim => }/bfin/c_multi_issue_dsp_ldst_2.s (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_call_pcpr.s (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_call_pr.s (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_clisti_interr.S (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_csync_mmr.S (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_except_rtx.S (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_excpt.S (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_jump_pcpr.s (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_jump_pr.s (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_nop.s (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_raise_rt_i_n.S (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_rts.s (100%) rename sim/testsuite/{sim => }/bfin/c_ptr2op_pr_neg_pr.s (100%) rename sim/testsuite/{sim => }/bfin/c_ptr2op_pr_sft_2_1.s (100%) rename sim/testsuite/{sim => }/bfin/c_ptr2op_pr_shadd_1_2.s (100%) rename sim/testsuite/{sim => }/bfin/c_pushpopmultiple_dp.s (100%) rename sim/testsuite/{sim => }/bfin/c_pushpopmultiple_dp_pair.s (100%) rename sim/testsuite/{sim => }/bfin/c_pushpopmultiple_dreg.s (100%) rename sim/testsuite/{sim => }/bfin/c_pushpopmultiple_preg.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_acc_acc.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_dag_lz_dep.s (100%) rename sim/testsuite/{sim => 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sim/testsuite/{sim => }/bfin/c_seq_ac_raise_mv_ppop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ac_regmv_pushpop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_dec_raise_pushpop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex1_brcc_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex1_call_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex1_j_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex1_raise_brcc_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex1_raise_call_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex1_raise_j_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex2_brcc_mp_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex2_mmr_mvpop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex2_mmrj_mvpop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex2_raise_mmr_mvpop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex2_raise_mmrj_mvpop.S (100%) rename sim/testsuite/{sim => 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sim/testsuite/{sim => }/frv/fdivs.cgs (100%) rename sim/testsuite/{sim => }/frv/fdmadds.cgs (100%) rename sim/testsuite/{sim => }/frv/fdmas.cgs (100%) rename sim/testsuite/{sim => }/frv/fdmovs.cgs (100%) rename sim/testsuite/{sim => }/frv/fdmss.cgs (100%) rename sim/testsuite/{sim => }/frv/fdmulcs.cgs (100%) rename sim/testsuite/{sim => }/frv/fdmuls.cgs (100%) rename sim/testsuite/{sim => }/frv/fdnegs.cgs (100%) rename sim/testsuite/{sim => }/frv/fdsads.cgs (100%) rename sim/testsuite/{sim => }/frv/fdsqrts.cgs (100%) rename sim/testsuite/{sim => }/frv/fdstoi.cgs (100%) rename sim/testsuite/{sim => }/frv/fdsubs.cgs (100%) rename sim/testsuite/{sim => }/frv/fdtoi.cgs (100%) rename sim/testsuite/{sim => }/frv/fitod.cgs (100%) rename sim/testsuite/{sim => }/frv/fitos.cgs (100%) rename sim/testsuite/{sim => }/frv/fmad.cgs (100%) rename sim/testsuite/{sim => }/frv/fmaddd.cgs (100%) rename sim/testsuite/{sim => }/frv/fmadds.cgs (100%) rename sim/testsuite/{sim => }/frv/fmas.cgs (100%) rename sim/testsuite/{sim => }/frv/fmovd.cgs (100%) rename sim/testsuite/{sim => }/frv/fmovs.cgs (100%) rename sim/testsuite/{sim => }/frv/fmsd.cgs (100%) rename sim/testsuite/{sim => }/frv/fmss.cgs (100%) rename sim/testsuite/{sim => }/frv/fmsubd.cgs (100%) rename sim/testsuite/{sim => }/frv/fmsubs.cgs (100%) rename sim/testsuite/{sim => }/frv/fmuld.cgs (100%) rename sim/testsuite/{sim => }/frv/fmuls.cgs (100%) rename sim/testsuite/{sim => }/frv/fnegd.cgs (100%) rename sim/testsuite/{sim => }/frv/fnegs.cgs (100%) rename sim/testsuite/{sim => }/frv/fnop.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/addss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/allinsn.exp (100%) rename sim/testsuite/{sim => }/frv/fr400/csdiv.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/maddaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/masaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/maveh.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/mclracc.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/mhdseth.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/mhdsets.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/mhsethih.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/mhsethis.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/mhsetloh.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/mhsetlos.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/movgs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/movsg.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/msubaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/scutss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/sdiv.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/sdivi.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/slass.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/smass.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/smsss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/smu.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/subss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/udiv.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/udivi.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/allinsn.exp (100%) rename sim/testsuite/{sim => }/frv/fr500/cmqaddhss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/cmqaddhus.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/cmqsubhss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/cmqsubhus.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/dcpl.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/dcul.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/mclracc.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/mqaddhss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/mqaddhus.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/mqsubhss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/mqsubhus.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/allinsn.exp (100%) rename sim/testsuite/{sim => }/frv/fr550/cmaddhss.cgs (100%) rename sim/testsuite/{sim => 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rename sim/testsuite/{sim => }/frv/fr550/maddhss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/maddhus.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/masaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mdaddaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mdasaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mdsubaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mmachs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mmachu.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mmrdhs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mmrdhu.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mqaddhss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mqaddhus.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mqmachs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mqmachu.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mqmacxhs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mqsubhss.cgs (100%) rename sim/testsuite/{sim => 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sim/testsuite/{sim => }/frv/ftige.cgs (100%) rename sim/testsuite/{sim => }/frv/ftigt.cgs (100%) rename sim/testsuite/{sim => }/frv/ftile.cgs (100%) rename sim/testsuite/{sim => }/frv/ftilg.cgs (100%) rename sim/testsuite/{sim => }/frv/ftilt.cgs (100%) rename sim/testsuite/{sim => }/frv/ftine.cgs (100%) rename sim/testsuite/{sim => }/frv/ftino.cgs (100%) rename sim/testsuite/{sim => }/frv/ftio.cgs (100%) rename sim/testsuite/{sim => }/frv/ftira.cgs (100%) rename sim/testsuite/{sim => }/frv/ftiu.cgs (100%) rename sim/testsuite/{sim => }/frv/ftiue.cgs (100%) rename sim/testsuite/{sim => }/frv/ftiug.cgs (100%) rename sim/testsuite/{sim => }/frv/ftiuge.cgs (100%) rename sim/testsuite/{sim => }/frv/ftiul.cgs (100%) rename sim/testsuite/{sim => }/frv/ftle.cgs (100%) rename sim/testsuite/{sim => }/frv/ftlg.cgs (100%) rename sim/testsuite/{sim => }/frv/ftlt.cgs (100%) rename sim/testsuite/{sim => }/frv/ftne.cgs (100%) rename sim/testsuite/{sim => }/frv/ftno.cgs (100%) rename sim/testsuite/{sim => }/frv/fto.cgs (100%) rename sim/testsuite/{sim => }/frv/ftra.cgs (100%) rename sim/testsuite/{sim => }/frv/ftu.cgs (100%) rename sim/testsuite/{sim => }/frv/ftue.cgs (100%) rename sim/testsuite/{sim => }/frv/ftug.cgs (100%) rename sim/testsuite/{sim => }/frv/ftuge.cgs (100%) rename sim/testsuite/{sim => }/frv/ftul.cgs (100%) rename sim/testsuite/{sim => }/frv/ftule.cgs (100%) create mode 100644 sim/testsuite/frv/grloop.ms create mode 100644 sim/testsuite/frv/hello.ms rename sim/testsuite/{sim => }/frv/icei.cgs (100%) rename sim/testsuite/{sim => }/frv/ici.cgs (100%) rename sim/testsuite/{sim => }/frv/icpl.cgs (100%) rename sim/testsuite/{sim => }/frv/icul.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts.exp (100%) rename sim/testsuite/{sim => }/frv/interrupts/Ipipe-fr400.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/Ipipe-fr500.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/badalign-fr550.cgs (100%) rename sim/testsuite/{sim => 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=> }/frv/interrupts/shadow_regs.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/timer.cgs (100%) rename sim/testsuite/{sim => }/frv/jmpil.cgs (100%) rename sim/testsuite/{sim => }/frv/jmpl.cgs (100%) rename sim/testsuite/{sim => }/frv/jmpl.pcgs (100%) rename sim/testsuite/{sim => }/frv/ld.cgs (100%) rename sim/testsuite/{sim => }/frv/ldbf.cgs (100%) rename sim/testsuite/{sim => }/frv/ldbfi.cgs (100%) rename sim/testsuite/{sim => }/frv/ldbfu.cgs (100%) rename sim/testsuite/{sim => }/frv/ldc.cgs (100%) rename sim/testsuite/{sim => }/frv/ldcu.cgs (100%) rename sim/testsuite/{sim => }/frv/ldd.cgs (100%) rename sim/testsuite/{sim => }/frv/lddc.cgs (100%) rename sim/testsuite/{sim => }/frv/lddcu.cgs (100%) rename sim/testsuite/{sim => }/frv/lddf.cgs (100%) rename sim/testsuite/{sim => }/frv/lddfi.cgs (100%) rename sim/testsuite/{sim => }/frv/lddfu.cgs (100%) rename sim/testsuite/{sim => }/frv/lddi.cgs (100%) rename sim/testsuite/{sim => }/frv/lddu.cgs (100%) rename sim/testsuite/{sim => }/frv/ldf.cgs (100%) rename sim/testsuite/{sim => }/frv/ldfi.cgs (100%) rename sim/testsuite/{sim => }/frv/ldfu.cgs (100%) rename sim/testsuite/{sim => }/frv/ldhf.cgs (100%) rename sim/testsuite/{sim => }/frv/ldhfi.cgs (100%) rename sim/testsuite/{sim => }/frv/ldhfu.cgs (100%) rename sim/testsuite/{sim => }/frv/ldi.cgs (100%) rename sim/testsuite/{sim => }/frv/ldq.cgs (100%) rename sim/testsuite/{sim => }/frv/ldqc.cgs (100%) rename sim/testsuite/{sim => }/frv/ldqcu.cgs (100%) rename sim/testsuite/{sim => }/frv/ldqf.cgs (100%) rename sim/testsuite/{sim => }/frv/ldqfi.cgs (100%) rename sim/testsuite/{sim => }/frv/ldqfu.cgs (100%) rename sim/testsuite/{sim => }/frv/ldqi.cgs (100%) rename sim/testsuite/{sim => }/frv/ldqu.cgs (100%) rename sim/testsuite/{sim => }/frv/ldsb.cgs (100%) rename sim/testsuite/{sim => }/frv/ldsbi.cgs (100%) rename sim/testsuite/{sim => }/frv/ldsbu.cgs (100%) rename sim/testsuite/{sim => }/frv/ldsh.cgs (100%) rename sim/testsuite/{sim => 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}/frv/mcmpuh.cgs (100%) rename sim/testsuite/{sim => }/frv/mcop1.cgs (100%) rename sim/testsuite/{sim => }/frv/mcop2.cgs (100%) rename sim/testsuite/{sim => }/frv/mcplhi.cgs (100%) rename sim/testsuite/{sim => }/frv/mcpli.cgs (100%) rename sim/testsuite/{sim => }/frv/mcpxis.cgs (100%) rename sim/testsuite/{sim => }/frv/mcpxiu.cgs (100%) rename sim/testsuite/{sim => }/frv/mcpxrs.cgs (100%) rename sim/testsuite/{sim => }/frv/mcpxru.cgs (100%) rename sim/testsuite/{sim => }/frv/mcut.cgs (100%) rename sim/testsuite/{sim => }/frv/mcuti.cgs (100%) rename sim/testsuite/{sim => }/frv/mcutss.cgs (100%) rename sim/testsuite/{sim => }/frv/mcutssi.cgs (100%) rename sim/testsuite/{sim => }/frv/mdaddaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/mdasaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/mdcutssi.cgs (100%) rename sim/testsuite/{sim => }/frv/mdpackh.cgs (100%) rename sim/testsuite/{sim => }/frv/mdrotli.cgs (100%) rename sim/testsuite/{sim => }/frv/mdsubaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/mdunpackh.cgs (100%) rename sim/testsuite/{sim => }/frv/membar.cgs (100%) rename sim/testsuite/{sim => }/frv/mexpdhd.cgs (100%) rename sim/testsuite/{sim => }/frv/mexpdhw.cgs (100%) rename sim/testsuite/{sim => }/frv/mhdseth.cgs (100%) rename sim/testsuite/{sim => }/frv/mhdsets.cgs (100%) rename sim/testsuite/{sim => }/frv/mhsethih.cgs (100%) rename sim/testsuite/{sim => }/frv/mhsethis.cgs (100%) rename sim/testsuite/{sim => }/frv/mhsetloh.cgs (100%) rename sim/testsuite/{sim => }/frv/mhsetlos.cgs (100%) rename sim/testsuite/{sim => }/frv/mhtob.cgs (100%) create mode 100644 sim/testsuite/frv/misc.exp rename sim/testsuite/{sim => }/frv/mmachs.cgs (100%) rename sim/testsuite/{sim => }/frv/mmachu.cgs (100%) rename sim/testsuite/{sim => }/frv/mmrdhs.cgs (100%) rename sim/testsuite/{sim => }/frv/mmrdhu.cgs (100%) rename sim/testsuite/{sim => }/frv/mmulhs.cgs (100%) rename sim/testsuite/{sim => }/frv/mmulhu.cgs (100%) rename sim/testsuite/{sim => }/frv/mmulxhs.cgs (100%) rename sim/testsuite/{sim => }/frv/mmulxhu.cgs (100%) rename sim/testsuite/{sim => }/frv/mnop.cgs (100%) rename sim/testsuite/{sim => }/frv/mnot.cgs (100%) rename sim/testsuite/{sim => }/frv/mor.cgs (100%) rename sim/testsuite/{sim => }/frv/mov.cgs (100%) rename sim/testsuite/{sim => }/frv/movfg.cgs (100%) rename sim/testsuite/{sim => }/frv/movfgd.cgs (100%) rename sim/testsuite/{sim => }/frv/movfgq.cgs (100%) rename sim/testsuite/{sim => }/frv/movgf.cgs (100%) rename sim/testsuite/{sim => }/frv/movgfd.cgs (100%) rename sim/testsuite/{sim => }/frv/movgfq.cgs (100%) rename sim/testsuite/{sim => }/frv/movgs.cgs (100%) rename sim/testsuite/{sim => }/frv/movsg.cgs (100%) rename sim/testsuite/{sim => }/frv/mpackh.cgs (100%) rename sim/testsuite/{sim => }/frv/mqcpxis.cgs (100%) rename sim/testsuite/{sim => }/frv/mqcpxiu.cgs (100%) rename sim/testsuite/{sim => }/frv/mqcpxrs.cgs (100%) rename sim/testsuite/{sim => }/frv/mqcpxru.cgs (100%) rename sim/testsuite/{sim => }/frv/mqlclrhs.cgs (100%) rename sim/testsuite/{sim => }/frv/mqlmths.cgs (100%) rename sim/testsuite/{sim => }/frv/mqmachs.cgs (100%) rename sim/testsuite/{sim => }/frv/mqmachu.cgs (100%) rename sim/testsuite/{sim => }/frv/mqmacxhs.cgs (100%) rename sim/testsuite/{sim => }/frv/mqmulhs.cgs (100%) rename sim/testsuite/{sim => }/frv/mqmulhu.cgs (100%) rename sim/testsuite/{sim => }/frv/mqmulxhs.cgs (100%) rename sim/testsuite/{sim => }/frv/mqmulxhu.cgs (100%) rename sim/testsuite/{sim => }/frv/mqsaths.cgs (100%) rename sim/testsuite/{sim => }/frv/mqsllhi.cgs (100%) rename sim/testsuite/{sim => }/frv/mqsrahi.cgs (100%) rename sim/testsuite/{sim => }/frv/mqxmachs.cgs (100%) rename sim/testsuite/{sim => }/frv/mqxmacxhs.cgs (100%) rename sim/testsuite/{sim => }/frv/mrdacc.cgs (100%) rename sim/testsuite/{sim => }/frv/mrdaccg.cgs (100%) rename sim/testsuite/{sim => }/frv/mrotli.cgs (100%) rename sim/testsuite/{sim => }/frv/mrotri.cgs (100%) rename sim/testsuite/{sim => }/frv/msaths.cgs (100%) rename sim/testsuite/{sim => }/frv/msathu.cgs (100%) rename sim/testsuite/{sim => }/frv/msllhi.cgs (100%) rename sim/testsuite/{sim => }/frv/msrahi.cgs (100%) rename sim/testsuite/{sim => }/frv/msrlhi.cgs (100%) rename sim/testsuite/{sim => }/frv/msubhss.cgs (100%) rename sim/testsuite/{sim => }/frv/msubhus.cgs (100%) rename sim/testsuite/{sim => }/frv/mtrap.cgs (100%) rename sim/testsuite/{sim => }/frv/munpackh.cgs (100%) rename sim/testsuite/{sim => }/frv/mwcut.cgs (100%) rename sim/testsuite/{sim => }/frv/mwcuti.cgs (100%) rename sim/testsuite/{sim => }/frv/mwtacc.cgs (100%) rename sim/testsuite/{sim => }/frv/mwtaccg.cgs (100%) rename sim/testsuite/{sim => }/frv/mxor.cgs (100%) rename sim/testsuite/{sim => }/frv/nandcr.cgs (100%) rename sim/testsuite/{sim => }/frv/nandncr.cgs (100%) rename sim/testsuite/{sim => }/frv/nfadds.cgs (100%) rename sim/testsuite/{sim => }/frv/nfdadds.cgs (100%) rename sim/testsuite/{sim => }/frv/nfdcmps.cgs (100%) rename sim/testsuite/{sim => }/frv/nfddivs.cgs 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3 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O3_LTO updated (05e1456f -> f834dc38)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O3_LTO in repository toolchain/ci/base-artifacts. discards 05e1456f 6: update: llvm-92be640bd7d4fbc8e032a0aa81381a0246efa0be: 1 discards cfba536d 5: reset: llvm-87d7757bbe14fed420092071ded3430072053316: 1 discards 0fb1dd31 4: update: binutils-gcc-glibc: 1 discards 266beb60 3: reset: llvm-bb7d3af1139c36270bc9948605e06f40e4c51541: 1 discards 99e84448 2: update: llvm-b3e139444f41e5c281972b4002c09ee0500831f6: 1 discards 8102b2cb 1: reset: llvm-c23aefd7c38c9413a23fee3664655a10f4a2f41a: 1 discards 1d014cd8 0: update: binutils-gcc-glibc: 1 new f834dc38 0: update: binutils-gcc-glibc-llvm: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (05e1456f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 181 +- 02-prepare_abe/console.log | 417 +- 03-build_abe-binutils/console.log | 11857 +-- 04-build_abe-stage1/console.log | 15379 ++-- 05-build_abe-linux/console.log | 1998 +- 06-build_abe-glibc/console.log | 40192 +++++----- 07-build_abe-stage2/console.log | 30634 ++++---- 08-build_llvm-true/console.log | 13966 ++-- 10-benchmark--O3_LTO/benchmark-start.log | 2 +- 10-benchmark--O3_LTO/benchmark.log | 12 +- 10-benchmark--O3_LTO/console.log | 265 +- 11-check_regression/console.log | 406 +- 11-check_regression/results-0.csv | 53 - 11-check_regression/results-1.csv | 53 - 11-check_regression/results-brief.csv | 19 - 11-check_regression/results-compare.csv | 24 - 11-check_regression/results-full.csv | 53 - 11-check_regression/results.csv | 24 - 11-check_regression/results.log | 2704 +- 12-update_baseline/console.log | 1233 +- 12-update_baseline/extra-bisect-params | 2 +- 12-update_baseline/results-0.csv | 53 - 12-update_baseline/results-1.csv | 53 - 12-update_baseline/results-brief.csv | 19 - 12-update_baseline/results-compare.csv | 24 - 12-update_baseline/results-full.csv | 53 - 12-update_baseline/results.csv | 24 - 12-update_baseline/results.log | 2676 +- 12-update_baseline/results.regressions | 1 - console.log | 116580 ++++++++++++++-------------- jenkins/manifest.sh | 30 +- results_id | 2 +- 32 files changed, 117295 insertions(+), 121694 deletions(-) delete mode 100644 12-update_baseline/results.regressions -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

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Tcwg-commits January 2021