Tcwg-commits January 2021

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9360 discussions

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig updated (7b09f12773 -> b3f846c59d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig in repository toolchain/ci/qemu. from 7b09f12773 Merge remote-tracking branch 'remotes/pmaydell/tags/pull-tar [...] adds b115ea3a0d gitlab-ci.yml: Add openSUSE Leap 15.2 for gitlab CI/CD adds 661465c2e0 qtest/libqtest: fix heap-buffer-overflow in qtest_cb_for_eve [...] adds 124bd3e0a8 util/oslib-win32: Fix _aligned_malloc() arguments order adds 22ec0c696f fuzz: accelerate non-crash detection adds 7b339f287f fuzz: double the IOs to remove for every loop adds e72203abec fuzz: split write operand using binary approach adds 247ab240c2 fuzz: remove IO commands iteratively adds 9d20f2af53 fuzz: set bits in operand of write/out to zero adds dd21ed0edf fuzz: add minimization options adds 4cc5752303 fuzz: heuristic split write based on past IOs adds 4d306e59cb bsd-user: regenerate FreeBSD's system call numbers adds ea1ab4cf2c bsd-user: move strace OS/arch dependent code to host/arch dirs adds f6eb4a0841 bsd-user: Update strace.list for FreeBSD's latest syscalls adds 333168efe5 tests/acceptance: Fix race conditions in s390x tests & skip [...] adds b677001d70 fuzz: map all BARs and enable PCI devices adds b3f846c59d Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull- [...] No new revisions were added by this update. Summary of changes: .gitlab-ci.d/containers.yml | 5 + .gitlab-ci.yml | 31 ++ bsd-user/arm/target_arch_sysarch.h | 78 +++ bsd-user/arm/target_syscall.h | 36 ++ bsd-user/{signal.c => freebsd/os-strace.h} | 17 +- bsd-user/freebsd/strace.list | 65 ++- bsd-user/freebsd/syscall_nr.h | 695 ++++++++++++++------------ bsd-user/i386/target_arch_sysarch.h | 77 +++ bsd-user/i386/target_syscall.h | 19 + bsd-user/mips/target_arch_sysarch.h | 69 +++ bsd-user/mips/target_syscall.h | 52 ++ bsd-user/mips64/target_arch_sysarch.h | 69 +++ bsd-user/mips64/target_syscall.h | 53 ++ bsd-user/netbsd/os-strace.h | 1 + bsd-user/openbsd/os-strace.h | 1 + bsd-user/sparc/target_arch_sysarch.h | 52 ++ bsd-user/sparc/target_syscall.h | 24 +- bsd-user/sparc64/target_arch_sysarch.h | 52 ++ bsd-user/sparc64/target_syscall.h | 24 +- bsd-user/strace.c | 11 + bsd-user/x86_64/target_arch_sysarch.h | 76 +++ bsd-user/x86_64/target_syscall.h | 21 +- meson.build | 1 + scripts/oss-fuzz/minimize_qtest_trace.py | 260 ++++++++-- tests/acceptance/machine_s390_ccw_virtio.py | 14 +- tests/docker/dockerfiles/opensuse-leap.docker | 55 ++ tests/qtest/fuzz/generic_fuzz.c | 24 + tests/qtest/libqtest.c | 2 +- util/oslib-win32.c | 2 +- 29 files changed, 1500 insertions(+), 386 deletions(-) create mode 100644 bsd-user/arm/target_arch_sysarch.h create mode 100644 bsd-user/arm/target_syscall.h copy bsd-user/{signal.c => freebsd/os-strace.h} (60%) create mode 100644 bsd-user/i386/target_arch_sysarch.h create mode 100644 bsd-user/mips/target_arch_sysarch.h create mode 100644 bsd-user/mips/target_syscall.h create mode 100644 bsd-user/mips64/target_arch_sysarch.h create mode 100644 bsd-user/mips64/target_syscall.h create mode 100644 bsd-user/netbsd/os-strace.h create mode 100644 bsd-user/openbsd/os-strace.h create mode 100644 bsd-user/sparc/target_arch_sysarch.h create mode 100644 bsd-user/sparc64/target_arch_sysarch.h create mode 100644 bsd-user/x86_64/target_arch_sysarch.h create mode 100644 tests/docker/dockerfiles/opensuse-leap.docker -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig updated (7c53f6b671f4 -> a0d54b4f5b21)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig in repository toolchain/ci/linux. from 7c53f6b671f4 Linux 5.11-rc3 adds dfe94d4086e4 x86/hyperv: Fix kexec panic/hang issues adds ad0a6bad4475 x86/hyperv: check cpu mask after interrupt has been disabled adds f1ee3e150bd9 Merge tag 'hyperv-fixes-signed-20210111' of git://git.kern [...] adds 72d78717c6d0 nfsd: Fixes for nfsd4_encode_read_plus_data() adds b68f0cbd3f95 nfsd: Don't set eof on a truncated READ_PLUS adds d6c9e4368cc6 NFSD: Fix sparse warning in nfssvc.c adds 4a85a6a3320b SUNRPC: Handle TCP socket sends with kernel_sendpage() again adds 7b723008f9c9 NFSD: Restore NFSv4 decoding's SAVEMEM functionality adds c912fd05fab9 Merge tag 'nfsd-5.11-1' of git://git.linux-nfs.org/project [...] adds 71008734d27f btrfs: print the actual offset in btrfs_root_name adds 29b665cc51e8 btrfs: prevent NULL pointer dereference in extent_io_tree_panic adds 347fb0cfc9ba btrfs: tree-checker: check if chunk item end overflows adds 50e31ef486af btrfs: reloc: fix wrong file extent type check to avoid fa [...] adds e076ab2a2ca7 btrfs: shrink delalloc pages instead of full inodes adds 6e68b9961ff6 Merge tag 'for-5.11-rc3-tag' of git://git.kernel.org/pub/s [...] adds 7bb83f6fc4ee tracing/kprobes: Do the notrace functions check without kp [...] adds a0d54b4f5b21 Merge tag 'trace-v5.11-rc2' of git://git.kernel.org/pub/sc [...] No new revisions were added by this update. Summary of changes: arch/x86/hyperv/hv_init.c | 4 ++ arch/x86/hyperv/mmu.c | 12 ++++-- arch/x86/include/asm/mshyperv.h | 2 + arch/x86/kernel/cpu/mshyperv.c | 18 +++++++++ drivers/hv/vmbus_drv.c | 2 - fs/btrfs/disk-io.c | 2 +- fs/btrfs/extent_io.c | 4 +- fs/btrfs/inode.c | 60 ++++++++++++++++++++-------- fs/btrfs/print-tree.c | 10 ++--- fs/btrfs/print-tree.h | 2 +- fs/btrfs/relocation.c | 7 +++- fs/btrfs/space-info.c | 4 +- fs/btrfs/tree-checker.c | 7 ++++ fs/nfsd/nfs4proc.c | 5 +++ fs/nfsd/nfs4xdr.c | 56 +++++++++++++++++---------- fs/nfsd/nfssvc.c | 6 --- fs/nfsd/xdr4.h | 1 - kernel/trace/Kconfig | 2 +- kernel/trace/trace_kprobe.c | 2 +- net/sunrpc/svcsock.c | 86 ++++++++++++++++++++++++++++++++++++++++- 20 files changed, 228 insertions(+), 64 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig updated (7539c75bb43 -> 0871d6d5164)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig in repository toolchain/ci/llvm-project. from 7539c75bb43 [DAGCombine] Remove the check for unsafe-fp-math when we ar [...] adds 5cf73dca77e [RISCV] Convert most of the information about RVV Pseudos i [...] adds 7f69860243e [LoopUnroll] Fix a crash adds ffa67873a3f [PowerPC] Add variants of 64-bit vector types for vec_sel. adds dcac2da1063 [IR Parser] Fix a crash handling zero width integer attributes. adds 6215c1b778f CGDebugInfo: Delete redundant test adds b8d28420885 CGDebugInfo: Delete unneeded UnwrapTypeForDebugInfo adds a40767ec885 [MLIR][SPIRV] Add (de-)serialization support for SpecConsta [...] adds 5e476061deb [NFC][AsmPrinter] Make comments for spill/reload more precise. adds 7b11f564dcf [JITLink] Rename PostAllocationPasses to PreFixupPasses. adds 131ce834e4b [RISCV] Clear isCodeGenOnly flag on VMSGE(U) pseudo instruc [...] adds af339f89a14 Remove redundant casts. adds cddd3faf5de [CSKY] Add visibility macro to fix link error adds ee27c767bd2 [clang-format] Skip UTF8 Byte Order Mark while sorting includes adds 0c8b748f321 [ARM] Additional trunc cost tests. NFC adds 7473940bae0 [clang-format] turn on formatting after "clang-format on" w [...] adds 89878e8c966 [clang-format] Find main include after block ended with #pr [...] adds dcefcd51e01 [ARM] Update trunc costs adds b7ccaca5370 [NFC] Remove min/max functions from InstructionCost adds 97100646d1b Reapply "[clang][cli] Port DiagnosticOpts to new option par [...] adds 40abeb11f45 [NFC][InstructionCost] Change LoopVectorizationCostModel::g [...] adds 8165a034203 [ARM] Add debug messages for the load store optimizer. NFC adds 1677c86124e [clangd] Add metrics for go-to-implementation. adds c5be0e0cc0e [X86] Fix tile register spill issue. adds 675be651062 Require chained analyses in BasicAA and AAResults to be transitive adds c37f68a8885 [SVE][CodeGen] Fix legalisation of floating-point masked gathers adds 41bf338dd1e Revert rGd43a264a5dd3 "Revert "[X86][SSE] Fold unpack(hop() [...] adds 59632292663 [X86][SSE] Add missing SSE test coverage for permute(hop,ho [...] adds b72ca799823 [VE] Support intrinsic to isnert/extract_subreg of v512i1 adds d02de139324 [VE] Support additional VMRGW and VMV intrinsic instructions adds c74751d4b5b [obj2yaml] - Fix the crash in getUniquedSectionName(). adds 8ea72b38873 [clang][AArch64][SVE] Avoid going through memory for coerce [...] adds a6db7cf1ce7 [llvm-readelf/obj] - Index phdrs and relocations from 0 whe [...] adds a94497a3429 [VPlan] Move initial quote emission from ::print to ::dumpB [...] adds a5b484c4d41 [obj2yaml][test] - Improve and fix section-group.yaml test. adds d36e879c21c [lldb] Disable PipeTest.OpenAsReader on windows adds 8112a2598ce [X86][SSE] Add 'vectorized sum' test patterns adds 2e17d9c0ee7 [ARM] Add uses for locals introduced for debug messages. NFC. adds 6dcf9207df1 [AMDGPU] Fix a urem combine test to test what it was supposed to adds 4fe7b16ae3f [mlir] Remove unnecessary llvm.mlir.cast in AsyncToLLVM lowering. adds 4c372a35cd8 [mlir] Make GpuAsyncRegion pass depend on async dialect. adds 8298ec2d629 [flang][driver] Copy input files into a temp dir when testing adds df86f15f0c5 [mlir][linalg] Support parsing attributes in named op spec adds 55225471d98 [mlir][linalg] Support permutation when lowering to loop nests adds 007358239de [DAGCombiner] Use getVectorElementCount inside visitINSERT_ [...] adds c163aae45ef [attributes] Add a facility for enforcing a Trusted Comput [...] adds eb0371e403a [VPlan] Unify value/recipe printing after VPDef transition. adds 419ef38a502 Revert "[attributes] Add a facility for enforcing a Truste [...] adds d59ddba7772 [mlir] Fix gpu-to-llvm lowering for gpu.alloc with dynamic sizes. adds a46982a2551 [X86] Add nounwind to lzcnt-cmp tests adds a0f82749f4f [X86] Extend lzcnt-cmp tests to test on non-lzcnt targets adds dbd5fa1e75d [ARM] Update existing test case with +pauth targets adds a2dbf3443af [clangd] Fix -check mode doesn't respect any tidy configs. adds 97517055128 [OpenMPOpt][WIP] Expand parallel region merging adds 31732e6f52c [clangd] Remove ScratchFS from tests adds e5eb5c8a7f3 NFC: Use -LABEL more adds c161775decd [FastISel] Flush local value map on every instruction adds 4214ca96145 [X86][AVX] Attempt to fold vpermf128(op(x,i),op(y,i)) -> op [...] adds 9c0dc0b2c1c [mlir][Linalg] Fold init_tensor -> linalg.tensor_reshape. adds c15b0e2229e [Clang][Docs] Fix ambiguity in clang-offload-bundler docs adds 7200d2cf089 [NFC] Disallow unused prefixes in CodeGen/PowerPC tests. adds 3d693bd0bd7 [mlir][vector] Add memory effects to transfer_read transfer [...] adds c4486cfd556 [mlir][Linalg] Fix reshape fusion to reshape the outs inste [...] adds be179b9946f [FastISel] NFC: Remove obsolete -fast-isel-sink-local-value [...] adds ac2224c0228 [ELF] --exclude-libs: localize defined libcall symbols refe [...] adds 171771e0780 [SystemZ] Minor NFC fix in SchedModels. adds 1f9c29228ce [FastISel] NFC: Clean up unnecessary bookkeeping adds 072714b9619 [X86] Regenerate vector-constrained-fp-intrinsics.ll tests adds 35c9baa11e4 [attributes] Add a facility for enforcing a Trusted Comput [...] adds a90214760d0 [Hexagon] Custom-widen SETCC's operands adds bcec0f27a2c [AMDGPU] Deduplicate VOP tablegen asm & ins adds 74628c43053 [mlir] Add Python bindings for AffineExpr adds e79bd0b4f25 [mlir] More Python bindings for AffineMap adds 547e3eef14a [mlir] Expose MemRef layout in Python bindings adds 47567ca5fac [flang][openxx][NFC] Remove duplicated function to check re [...] adds d8c6d24359f -funique-internal-linkage-names appends a hex md5hash suffi [...] adds 43a830ed941 Introduce new quiet mode and new option handling for -print [...] adds 5464baaae8c Fix minor build issue (NFC) adds 1027a22ccd7 [SystemZ][z/OS] Fix Permission denied pattern matching adds 195728c75aa [mlir] Add structural conversion to async dialect lowering. adds 37b41bd0879 [RISCV] Add scalable vector fcmp ISel patterns adds 30a7d430e86 [libc++] Turn off auto-formatting of generated files. NFC. adds 72f1f084670 [NFC][AMDGPU] Clarify memory model support for volatile adds 20741773013 [mlir][ODS] Add a C++ abstraction for OpBuilders adds 948be58258d [mlir][TypeDefGen] Add support for adding builders when gen [...] adds d79642b3db1 [mlir][IR][NFC] Move the definitions of Complex/Function/In [...] adds d3ff24cbf87 [ADT] Add makeIntrusiveRefCnt helper function adds 8ad998a6115 [tools] Mark output of tools as text if it is really text adds 05e90cefeb4 [NFC] Disallow unused prefixes under llvm/test/CodeGen adds c1ae378205d [mlir][vector] Add side-effect information to different loa [...] adds 53c866c286a Enable python bindings for tensor, shape and linalg dialects. adds cceb1bfcbbc [mlir][CAPI] Introduce standard source layout for mlir-c di [...] adds 110775809ad Revert "[mlir][linalg] Support parsing attributes in named [...] adds 288f3fc5dfe [InstCombine] reduce icmp(ashr X, C1), C2 to sign-bit test adds 32c073acb32 [GlobalISel] Map extractelt to G_EXTRACT_VECTOR_ELT adds aefeb5f136e [libc][NFC] Make __support/common.h an in tree header. adds 9b222b108a2 [c++20] Don't consider string literal operator templates fo [...] adds f4cec703ec8 Add an assert to CGDebugInfo::getTypeOrNull adds 7989684a2e4 [RISCV] Add scalable vector fadd/fsub/fmul/fdiv ISel patterns adds 046612d29d7 [mlir][vector] verify memref of vector memory ops adds a808d89d355 [PredicateInfo] Add test for one unknown condition in and/or (NFC) adds 00f773cf424 [SCCP] Fix misclassified conditions in test (NFC) adds b88c8f1aab5 CGDebugInfo: Delete unused parameters adds 32bcfcda4e2 Rename debug linkage name with -funique-internal-linkage-names adds a81c68ae6be [OpenMP] Take elf_common.c as a interface library adds 9ecc991c559 [RISCV] Add scalable vector vselect ISel patterns adds 0a23fbd28c7 clang: Always pass PowerPC endian information to GNU as adds 762ffc95550 Update syntax for tensor and memref types to match parser. adds 278a3ea1b27 [RISCV] Use vmv.v.i vd, 0 instead of vmv.v.x vd, x0 for llv [...] adds c22bc5f1f8b [SimplifyCFG] SwitchToLookupTable(): don't insert a DomTree [...] adds c0de0a1b72c [SimplifyCFG] SimplifyBranchOnICmpChain(): don't insert a D [...] adds f9ba3477063 [SimplifyCFG] FoldValueComparisonIntoPredecessors(): don't [...] adds 90a92f8b4d7 [NFCI][Utils/Local] removeUnreachableBlocks(): cleanup supp [...] adds 81afeacd379 [SimplifyCFGPass] mergeEmptyReturnBlocks(): skip blocks sch [...] adds ec8a6c11db4 [SimplifyCFGPass] iterativelySimplifyCFG(): support lazy Do [...] adds 5ccff5aaa68 ADT: Fix pointer comparison UB in SmallVector adds 7470017f247 [RISCV] Define the vfclass RVV intrinsics adds f635bcd1610 NFC: Pre-commit test: -Wpointer-sign with plain char to [un [...] adds c6ffe4d76fb [clang] Fix message text for `-Wpointer-sign` to account fo [...] adds eefd420e003 [github] Move repo lockdown config into llvm-project repo adds f75f391fc68 [MLIR][Linalg] Refactor transforms to use linalg::getDynOpe [...] adds f9902514fe5 [MC] Make getEHFrameSection const like every other getter (NFC) adds ef50c07b1fa [JITLink] Add a new PostAllocationPasses list. adds 70474dfebcd [VE][compiler-rt] Add VE as a target of crt adds 9f8b25769ef [WebAssembly] Ensure terminate pads are a single BB adds 905623b64df [NFC][LICM] Minor improvements to debug output new 0871d6d5164 [OpenMP] Move memory manager to plugin and make it a common [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .github/lockdown.yml | 8 + clang-tools-extra/clangd/XRefs.cpp | 11 + clang-tools-extra/clangd/tool/Check.cpp | 1 + .../unittests/GlobalCompilationDatabaseTests.cpp | 75 +- clang/docs/ClangOffloadBundler.rst | 4 +- clang/include/clang/Basic/Attr.td | 16 + clang/include/clang/Basic/AttrDocs.td | 25 + clang/include/clang/Basic/DiagnosticOptions.h | 12 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 25 +- clang/include/clang/Driver/Options.td | 112 +- clang/include/clang/Sema/Sema.h | 5 + clang/lib/CodeGen/CGCall.cpp | 15 + clang/lib/CodeGen/CGDebugInfo.cpp | 18 +- clang/lib/CodeGen/CGDebugInfo.h | 8 +- clang/lib/CodeGen/CodeGenFunction.cpp | 3 +- clang/lib/Driver/ToolChains/Gnu.cpp | 2 + clang/lib/Format/Format.cpp | 16 +- clang/lib/Frontend/CompilerInvocation.cpp | 165 +- clang/lib/Headers/altivec.h | 40 + clang/lib/Sema/SemaChecking.cpp | 38 + clang/lib/Sema/SemaDecl.cpp | 4 + clang/lib/Sema/SemaDeclAttr.cpp | 77 + clang/lib/Sema/SemaExpr.cpp | 10 + clang/lib/Sema/SemaLookup.cpp | 7 + ...sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp | 7 +- clang/test/CodeGen/attr-arm-sve-vector-bits-call.c | 93 +- clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c | 27 +- .../CodeGen/attr-arm-sve-vector-bits-codegen.c | 27 +- clang/test/CodeGen/builtins-ppc-vsx.c | 60 + .../test/CodeGen/unique-internal-linkage-names.cpp | 20 +- clang/test/Driver/ppc-features.cpp | 27 +- ...pragma-attribute-supported-attributes-list.test | 2 + clang/test/Sema/attr-enforce-tcb-errors.cpp | 80 + clang/test/Sema/attr-enforce-tcb.c | 65 + clang/test/Sema/attr-enforce-tcb.cpp | 70 + clang/test/Sema/incompatible-sign.c | 18 + clang/test/Sema/incompatible-sign.cpp | 14 + clang/test/SemaCXX/cxx2a-user-defined-literals.cpp | 29 + clang/test/SemaObjC/objc-cf-audited-warning.m | 2 +- clang/unittests/Format/SortIncludesTest.cpp | 112 + .../unittests/Frontend/CompilerInvocationTest.cpp | 15 + compiler-rt/cmake/config-ix.cmake | 3 +- flang/lib/Semantics/check-directive-structure.h | 15 +- flang/lib/Semantics/check-omp-structure.cpp | 3 +- flang/test/Frontend/multiple-input-files.f90 | 10 +- flang/test/Semantics/omp-device-constructs.f90 | 2 +- libc/src/__support/CMakeLists.txt | 10 +- libc/src/__support/{common.h.def => common.h} | 18 +- .../algorithm.version.pass.cpp | 2 + .../support.limits.general/any.version.pass.cpp | 2 + .../support.limits.general/array.version.pass.cpp | 2 + .../support.limits.general/atomic.version.pass.cpp | 2 + .../barrier.version.pass.cpp | 2 + .../support.limits.general/bit.version.pass.cpp | 2 + .../support.limits.general/chrono.version.pass.cpp | 2 + .../support.limits.general/cmath.version.pass.cpp | 2 + .../compare.version.pass.cpp | 2 + .../complex.version.pass.cpp | 2 + .../concepts.version.pass.cpp | 2 + .../cstddef.version.pass.cpp | 2 + .../support.limits.general/deque.version.pass.cpp | 2 + .../exception.version.pass.cpp | 2 + .../execution.version.pass.cpp | 2 + .../filesystem.version.pass.cpp | 2 + .../forward_list.version.pass.cpp | 2 + .../functional.version.pass.cpp | 2 + .../iomanip.version.pass.cpp | 2 + .../istream.version.pass.cpp | 2 + .../iterator.version.pass.cpp | 2 + .../support.limits.general/latch.version.pass.cpp | 2 + .../support.limits.general/limits.version.pass.cpp | 2 + .../support.limits.general/list.version.pass.cpp | 2 + .../support.limits.general/locale.version.pass.cpp | 2 + .../support.limits.general/map.version.pass.cpp | 2 + .../support.limits.general/memory.version.pass.cpp | 2 + .../support.limits.general/mutex.version.pass.cpp | 2 + .../support.limits.general/new.version.pass.cpp | 2 + .../numbers.version.pass.cpp | 2 + .../numeric.version.pass.cpp | 2 + .../optional.version.pass.cpp | 2 + .../ostream.version.pass.cpp | 2 + .../support.limits.general/regex.version.pass.cpp | 2 + .../scoped_allocator.version.pass.cpp | 2 + .../semaphore.version.pass.cpp | 2 + .../support.limits.general/set.version.pass.cpp | 2 + .../shared_mutex.version.pass.cpp | 2 + .../support.limits.general/span.version.pass.cpp | 2 + .../support.limits.general/string.version.pass.cpp | 2 + .../string_view.version.pass.cpp | 2 + .../support.limits.general/thread.version.pass.cpp | 2 + .../support.limits.general/tuple.version.pass.cpp | 2 + .../type_traits.version.pass.cpp | 2 + .../unordered_map.version.pass.cpp | 2 + .../unordered_set.version.pass.cpp | 2 + .../utility.version.pass.cpp | 2 + .../variant.version.pass.cpp | 2 + .../support.limits.general/vector.version.pass.cpp | 2 + .../version.version.pass.cpp | 2 + .../generate_feature_test_macro_components.py | 2 + lld/ELF/Driver.cpp | 11 +- lld/test/ELF/lto/exclude-libs-libcall.ll | 28 + lld/test/wasm/debug-removed-fn.ll | 2 +- .../Shell/SymbolFile/NativePDB/disassembly.cpp | 4 +- lldb/test/Shell/SymbolFile/NativePDB/load-pdb.cpp | 2 +- lldb/unittests/Host/PipeTest.cpp | 3 + llvm/docs/AMDGPUUsage.rst | 48 +- llvm/include/llvm/ADT/IntrusiveRefCntPtr.h | 6 + llvm/include/llvm/ADT/SmallVector.h | 41 +- llvm/include/llvm/CodeGen/FastISel.h | 25 +- .../include/llvm/ExecutionEngine/JITLink/JITLink.h | 22 +- llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h | 5 +- llvm/include/llvm/IR/DebugInfoMetadata.h | 4 + llvm/include/llvm/IR/IntrinsicsRISCV.td | 30 +- llvm/include/llvm/IR/IntrinsicsVE.td | 18 + llvm/include/llvm/IR/Value.h | 4 + llvm/include/llvm/MC/MCObjectFileInfo.h | 4 +- llvm/include/llvm/Option/OptParser.td | 1 + .../include/llvm/Passes/StandardInstrumentations.h | 14 +- llvm/include/llvm/Support/InstructionCost.h | 8 - .../llvm/Target/GlobalISel/SelectionDAGCompat.td | 2 +- llvm/lib/Analysis/AliasAnalysis.cpp | 4 +- llvm/lib/Analysis/BasicAliasAnalysis.cpp | 6 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 17 +- llvm/lib/CodeGen/InlineSpiller.cpp | 42 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 12 +- llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 246 +- llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp | 2 +- .../lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp | 14 +- llvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp | 2 +- llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp | 21 +- llvm/lib/IR/Value.cpp | 12 + llvm/lib/Passes/StandardInstrumentations.cpp | 52 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 11 +- llvm/lib/Target/AArch64/AArch64InstrGISel.td | 2 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 14 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 195 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 1 + llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 104 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 13 + llvm/lib/Target/CSKY/TargetInfo/CSKYTargetInfo.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 1 + llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 87 +- .../Target/Hexagon/HexagonLoopIdiomRecognition.cpp | 1 - llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 65 +- llvm/lib/Target/RISCV/RISCVInstrFormats.td | 18 + llvm/lib/Target/RISCV/RISCVInstrInfoV.td | 22 +- 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mlir/include/mlir-c/Bindings/Python/Interop.h | 21 + mlir/include/mlir-c/BuiltinTypes.h | 8 +- mlir/include/mlir-c/Dialect/Linalg.h | 25 + mlir/include/mlir-c/Dialect/SCF.h | 25 + mlir/include/mlir-c/Dialect/Shape.h | 25 + .../{StandardDialect.h => Dialect/Standard.h} | 22 +- mlir/include/mlir-c/Dialect/Tensor.h | 25 + mlir/include/mlir-c/Registration.h | 55 +- mlir/include/mlir/CAPI/Registration.h | 40 + .../mlir/Conversion/AsyncToLLVM/AsyncToLLVM.h | 16 + .../StandardToLLVM/ConvertStandardToLLVM.h | 2 +- mlir/include/mlir/Dialect/ArmSVE/ArmSVE.td | 2 +- mlir/include/mlir/Dialect/GPU/Passes.td | 1 + mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 8 + mlir/include/mlir/Dialect/Linalg/Passes.td | 22 +- .../mlir/Dialect/Linalg/Transforms/Transforms.h | 58 +- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td | 4 +- .../include/mlir/Dialect/StandardOps/Utils/Utils.h | 32 + mlir/include/mlir/Dialect/Vector/VectorOps.td | 18 +- mlir/include/mlir/IR/BuiltinTypes.h | 219 +- mlir/include/mlir/IR/BuiltinTypes.td | 240 ++ mlir/include/mlir/IR/OpBase.td | 82 + mlir/include/mlir/TableGen/Builder.h | 85 + mlir/include/mlir/TableGen/Operator.h | 7 + mlir/include/mlir/TableGen/TypeDef.h | 43 +- mlir/lib/Bindings/Python/CMakeLists.txt | 20 +- mlir/lib/Bindings/Python/IRModules.cpp | 579 ++++- mlir/lib/Bindings/Python/IRModules.h | 29 + mlir/lib/Bindings/Python/LinalgOps.td | 16 + mlir/lib/Bindings/Python/ShapeOps.td | 15 + mlir/lib/Bindings/Python/TensorOps.td | 15 + mlir/lib/CAPI/CMakeLists.txt | 2 +- mlir/lib/CAPI/Dialect/CMakeLists.txt | 48 + mlir/lib/CAPI/Dialect/Linalg.cpp | 14 + mlir/lib/CAPI/Dialect/SCF.cpp | 13 + mlir/lib/CAPI/Dialect/Shape.cpp | 13 + mlir/lib/CAPI/Dialect/Standard.cpp | 13 + mlir/lib/CAPI/Dialect/Tensor.cpp | 14 + mlir/lib/CAPI/IR/AffineExpr.cpp | 20 + mlir/lib/CAPI/IR/AffineMap.cpp | 17 +- mlir/lib/CAPI/IR/BuiltinTypes.cpp | 11 + mlir/lib/CAPI/Standard/CMakeLists.txt | 7 - mlir/lib/CAPI/Standard/StandardDialect.cpp | 25 - mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp | 73 +- .../GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp | 6 +- .../SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp | 4 +- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 18 +- .../Dialect/GPU/Transforms/AsyncRegionRewriter.cpp | 4 +- mlir/lib/Dialect/GPU/Transforms/PassDetail.h | 1 + mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 126 +- mlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp | 13 +- .../Linalg/Transforms/ElementwiseToLinalg.cpp | 17 +- .../Dialect/Linalg/Transforms/FusionOnTensors.cpp | 99 +- mlir/lib/Dialect/Linalg/Transforms/Loops.cpp | 83 +- mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp | 5 +- mlir/lib/Dialect/StandardOps/CMakeLists.txt | 1 + mlir/lib/Dialect/StandardOps/Utils/Utils.cpp | 28 + mlir/lib/Dialect/Vector/VectorOps.cpp | 48 +- mlir/lib/IR/BuiltinTypes.cpp | 46 +- mlir/lib/IR/MLIRContext.cpp | 8 - mlir/lib/IR/TypeDetail.h | 43 - mlir/lib/Parser/AttributeParser.cpp | 5 + mlir/lib/Parser/TypeParser.cpp | 6 +- mlir/lib/TableGen/Builder.cpp | 74 + mlir/lib/TableGen/CMakeLists.txt | 1 + mlir/lib/TableGen/Operator.cpp | 12 + mlir/lib/TableGen/TypeDef.cpp | 53 + mlir/lib/Target/SPIRV/Deserialization.cpp | 139 +- mlir/lib/Target/SPIRV/Serialization.cpp | 49 + mlir/lib/Transforms/BufferDeallocation.cpp | 10 +- mlir/lib/Transforms/PipelineDataTransfer.cpp | 10 +- mlir/test/Bindings/Python/CMakeLists.txt | 4 +- mlir/test/Bindings/Python/ir_affine_expr.py | 275 ++ mlir/test/Bindings/Python/ir_affine_map.py | 148 ++ mlir/test/Bindings/Python/ir_types.py | 16 +- mlir/test/CAPI/ir.c | 52 +- .../lower-alloc-to-gpu-runtime-calls.mlir | 11 +- .../Conversion/VectorToSCF/vector-to-loops.mlir | 16 +- mlir/test/Dialect/Linalg/canonicalize.mlir | 36 + mlir/test/Dialect/Linalg/loop-order.mlir | 24 + mlir/test/Dialect/Linalg/reshape_fusion.mlir | 166 +- .../Linalg/reshape_linearization_fusion.mlir | 145 +- mlir/test/Dialect/SPIRV/IR/structure-ops.mlir | 14 + mlir/test/Dialect/Vector/canonicalize.mlir | 35 + mlir/test/Dialect/Vector/invalid.mlir | 31 + mlir/test/IR/invalid-ops.mlir | 8 + mlir/test/Target/SPIRV/spec-constant.mlir | 31 + mlir/test/lib/Dialect/Test/TestTypeDefs.td | 20 +- mlir/test/lib/Dialect/Test/TestTypes.cpp | 2 +- mlir/test/mlir-tblgen/typedefs.td | 24 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 98 +- mlir/tools/mlir-tblgen/TypeDefGen.cpp | 245 +- openmp/libomptarget/plugins/CMakeLists.txt | 33 +- openmp/libomptarget/plugins/amdgpu/CMakeLists.txt | 1 + openmp/libomptarget/plugins/amdgpu/src/rtl.cpp | 2 +- openmp/libomptarget/plugins/common/CMakeLists.txt | 14 + .../plugins/common/MemoryManager/CMakeLists.txt | 11 + .../plugins/common/MemoryManager/MemoryManager.h | 341 +++ .../plugins/common/elf_common/CMakeLists.txt | 15 + .../{elf_common.c => elf_common/elf_common.h} | 6 +- openmp/libomptarget/plugins/cuda/CMakeLists.txt | 2 + openmp/libomptarget/plugins/cuda/src/rtl.cpp | 102 +- .../plugins/generic-elf-64bit/src/rtl.cpp | 2 +- openmp/libomptarget/plugins/ve/CMakeLists.txt | 1 + openmp/libomptarget/plugins/ve/src/rtl.cpp | 2 +- openmp/libomptarget/src/CMakeLists.txt | 1 - openmp/libomptarget/src/MemoryManager.cpp | 262 -- openmp/libomptarget/src/MemoryManager.h | 95 - openmp/libomptarget/src/device.cpp | 24 +- openmp/libomptarget/src/device.h | 4 - 466 files changed, 24634 insertions(+), 4485 deletions(-) create mode 100644 .github/lockdown.yml create mode 100644 clang/test/Sema/attr-enforce-tcb-errors.cpp create mode 100644 clang/test/Sema/attr-enforce-tcb.c create mode 100644 clang/test/Sema/attr-enforce-tcb.cpp create mode 100644 clang/test/Sema/incompatible-sign.cpp rename libc/src/__support/{common.h.def => common.h} (54%) create mode 100644 lld/test/ELF/lto/exclude-libs-libcall.ll create mode 100644 llvm/test/CodeGen/AArch64/dag-combine-insert-subvector.ll create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/widen-setcc.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfclass-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfclass-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vselect-int-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vselect-int-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsplats-fp.ll create mode 100644 llvm/test/CodeGen/VE/VELIntrinsics/extract.ll create mode 100644 llvm/test/CodeGen/VE/VELIntrinsics/insert.ll create mode 100644 llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll delete mode 100644 llvm/test/CodeGen/X86/fast-isel-constant.ll create mode 100644 llvm/test/CodeGen/X86/fast-isel-prolog-dbgloc.ll create mode 100644 llvm/test/CodeGen/X86/horizontal-shuffle-3.ll create mode 100644 llvm/test/CodeGen/X86/horizontal-sum.ll copy llvm/test/CodeGen/{X86 => }/lit.local.cfg (82%) create mode 100644 llvm/test/Transforms/LoopUnroll/unroll-after-peel.ll create mode 100644 llvm/test/Transforms/UniqueInternalLinkageNames/unique-internal [...] delete mode 100644 llvm/test/Transforms/UniqueLinkageNames/unique-internal-linkage [...] create mode 100644 mlir/include/mlir-c/Dialect/Linalg.h create mode 100644 mlir/include/mlir-c/Dialect/SCF.h create mode 100644 mlir/include/mlir-c/Dialect/Shape.h rename mlir/include/mlir-c/{StandardDialect.h => Dialect/Standard.h} (52%) create mode 100644 mlir/include/mlir-c/Dialect/Tensor.h create mode 100644 mlir/include/mlir/CAPI/Registration.h create mode 100644 mlir/include/mlir/Dialect/StandardOps/Utils/Utils.h create mode 100644 mlir/include/mlir/TableGen/Builder.h create mode 100644 mlir/lib/Bindings/Python/LinalgOps.td create mode 100644 mlir/lib/Bindings/Python/ShapeOps.td create mode 100644 mlir/lib/Bindings/Python/TensorOps.td create mode 100644 mlir/lib/CAPI/Dialect/CMakeLists.txt create mode 100644 mlir/lib/CAPI/Dialect/Linalg.cpp create mode 100644 mlir/lib/CAPI/Dialect/SCF.cpp create mode 100644 mlir/lib/CAPI/Dialect/Shape.cpp create mode 100644 mlir/lib/CAPI/Dialect/Standard.cpp create mode 100644 mlir/lib/CAPI/Dialect/Tensor.cpp delete mode 100644 mlir/lib/CAPI/Standard/CMakeLists.txt delete mode 100644 mlir/lib/CAPI/Standard/StandardDialect.cpp create mode 100644 mlir/lib/Dialect/StandardOps/Utils/Utils.cpp create mode 100644 mlir/lib/TableGen/Builder.cpp create mode 100644 mlir/test/Bindings/Python/ir_affine_expr.py create mode 100644 mlir/test/Dialect/Linalg/loop-order.mlir create mode 100644 openmp/libomptarget/plugins/common/CMakeLists.txt create mode 100644 openmp/libomptarget/plugins/common/MemoryManager/CMakeLists.txt create mode 100644 openmp/libomptarget/plugins/common/MemoryManager/MemoryManager.h create mode 100644 openmp/libomptarget/plugins/common/elf_common/CMakeLists.txt rename openmp/libomptarget/plugins/common/{elf_common.c => elf_common/elf_common.h} (93%) delete mode 100644 openmp/libomptarget/src/MemoryManager.cpp delete mode 100644 openmp/libomptarget/src/MemoryManager.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig updated (4c4c219b -> b8c6d64a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig in repository toolchain/ci/base-artifacts. discards 4c4c219b 0: update: llvm-linux-qemu: boot new b8c6d64a 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4c4c219b) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-prepare_abe/console.log | 438 +- 03-build_llvm/console.log | 13794 +++++++++++------------ 04-build_linux/console.log | 648 +- 05-build_abe-qemu/console.log | 6780 ++++++------ 06-boot_linux/console.log | 490 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 22320 +++++++++++++++++++------------------- jenkins/manifest.sh | 16 +- 10 files changed, 22318 insertions(+), 22338 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-defconfig updated (7b09f12773 -> b3f846c59d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-defconfig in repository toolchain/ci/qemu. from 7b09f12773 Merge remote-tracking branch 'remotes/pmaydell/tags/pull-tar [...] adds b115ea3a0d gitlab-ci.yml: Add openSUSE Leap 15.2 for gitlab CI/CD adds 661465c2e0 qtest/libqtest: fix heap-buffer-overflow in qtest_cb_for_eve [...] adds 124bd3e0a8 util/oslib-win32: Fix _aligned_malloc() arguments order adds 22ec0c696f fuzz: accelerate non-crash detection adds 7b339f287f fuzz: double the IOs to remove for every loop adds e72203abec fuzz: split write operand using binary approach adds 247ab240c2 fuzz: remove IO commands iteratively adds 9d20f2af53 fuzz: set bits in operand of write/out to zero adds dd21ed0edf fuzz: add minimization options adds 4cc5752303 fuzz: heuristic split write based on past IOs adds 4d306e59cb bsd-user: regenerate FreeBSD's system call numbers adds ea1ab4cf2c bsd-user: move strace OS/arch dependent code to host/arch dirs adds f6eb4a0841 bsd-user: Update strace.list for FreeBSD's latest syscalls adds 333168efe5 tests/acceptance: Fix race conditions in s390x tests & skip [...] adds b677001d70 fuzz: map all BARs and enable PCI devices adds b3f846c59d Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull- [...] No new revisions were added by this update. Summary of changes: .gitlab-ci.d/containers.yml | 5 + .gitlab-ci.yml | 31 ++ bsd-user/arm/target_arch_sysarch.h | 78 +++ bsd-user/arm/target_syscall.h | 36 ++ bsd-user/{signal.c => freebsd/os-strace.h} | 17 +- bsd-user/freebsd/strace.list | 65 ++- bsd-user/freebsd/syscall_nr.h | 695 ++++++++++++++------------ bsd-user/i386/target_arch_sysarch.h | 77 +++ bsd-user/i386/target_syscall.h | 19 + bsd-user/mips/target_arch_sysarch.h | 69 +++ bsd-user/mips/target_syscall.h | 52 ++ bsd-user/mips64/target_arch_sysarch.h | 69 +++ bsd-user/mips64/target_syscall.h | 53 ++ bsd-user/netbsd/os-strace.h | 1 + bsd-user/openbsd/os-strace.h | 1 + bsd-user/sparc/target_arch_sysarch.h | 52 ++ bsd-user/sparc/target_syscall.h | 24 +- bsd-user/sparc64/target_arch_sysarch.h | 52 ++ bsd-user/sparc64/target_syscall.h | 24 +- bsd-user/strace.c | 11 + bsd-user/x86_64/target_arch_sysarch.h | 76 +++ bsd-user/x86_64/target_syscall.h | 21 +- meson.build | 1 + scripts/oss-fuzz/minimize_qtest_trace.py | 260 ++++++++-- tests/acceptance/machine_s390_ccw_virtio.py | 14 +- tests/docker/dockerfiles/opensuse-leap.docker | 55 ++ tests/qtest/fuzz/generic_fuzz.c | 24 + tests/qtest/libqtest.c | 2 +- util/oslib-win32.c | 2 +- 29 files changed, 1500 insertions(+), 386 deletions(-) create mode 100644 bsd-user/arm/target_arch_sysarch.h create mode 100644 bsd-user/arm/target_syscall.h copy bsd-user/{signal.c => freebsd/os-strace.h} (60%) create mode 100644 bsd-user/i386/target_arch_sysarch.h create mode 100644 bsd-user/mips/target_arch_sysarch.h create mode 100644 bsd-user/mips/target_syscall.h create mode 100644 bsd-user/mips64/target_arch_sysarch.h create mode 100644 bsd-user/mips64/target_syscall.h create mode 100644 bsd-user/netbsd/os-strace.h create mode 100644 bsd-user/openbsd/os-strace.h create mode 100644 bsd-user/sparc/target_arch_sysarch.h create mode 100644 bsd-user/sparc64/target_arch_sysarch.h create mode 100644 bsd-user/x86_64/target_arch_sysarch.h create mode 100644 tests/docker/dockerfiles/opensuse-leap.docker -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-defconfig updated (7c53f6b671f4 -> a0d54b4f5b21)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-defconfig in repository toolchain/ci/linux. from 7c53f6b671f4 Linux 5.11-rc3 adds dfe94d4086e4 x86/hyperv: Fix kexec panic/hang issues adds ad0a6bad4475 x86/hyperv: check cpu mask after interrupt has been disabled adds f1ee3e150bd9 Merge tag 'hyperv-fixes-signed-20210111' of git://git.kern [...] adds 72d78717c6d0 nfsd: Fixes for nfsd4_encode_read_plus_data() adds b68f0cbd3f95 nfsd: Don't set eof on a truncated READ_PLUS adds d6c9e4368cc6 NFSD: Fix sparse warning in nfssvc.c adds 4a85a6a3320b SUNRPC: Handle TCP socket sends with kernel_sendpage() again adds 7b723008f9c9 NFSD: Restore NFSv4 decoding's SAVEMEM functionality adds c912fd05fab9 Merge tag 'nfsd-5.11-1' of git://git.linux-nfs.org/project [...] adds 71008734d27f btrfs: print the actual offset in btrfs_root_name adds 29b665cc51e8 btrfs: prevent NULL pointer dereference in extent_io_tree_panic adds 347fb0cfc9ba btrfs: tree-checker: check if chunk item end overflows adds 50e31ef486af btrfs: reloc: fix wrong file extent type check to avoid fa [...] adds e076ab2a2ca7 btrfs: shrink delalloc pages instead of full inodes adds 6e68b9961ff6 Merge tag 'for-5.11-rc3-tag' of git://git.kernel.org/pub/s [...] adds 7bb83f6fc4ee tracing/kprobes: Do the notrace functions check without kp [...] adds a0d54b4f5b21 Merge tag 'trace-v5.11-rc2' of git://git.kernel.org/pub/sc [...] No new revisions were added by this update. Summary of changes: arch/x86/hyperv/hv_init.c | 4 ++ arch/x86/hyperv/mmu.c | 12 ++++-- arch/x86/include/asm/mshyperv.h | 2 + arch/x86/kernel/cpu/mshyperv.c | 18 +++++++++ drivers/hv/vmbus_drv.c | 2 - fs/btrfs/disk-io.c | 2 +- fs/btrfs/extent_io.c | 4 +- fs/btrfs/inode.c | 60 ++++++++++++++++++++-------- fs/btrfs/print-tree.c | 10 ++--- fs/btrfs/print-tree.h | 2 +- fs/btrfs/relocation.c | 7 +++- fs/btrfs/space-info.c | 4 +- fs/btrfs/tree-checker.c | 7 ++++ fs/nfsd/nfs4proc.c | 5 +++ fs/nfsd/nfs4xdr.c | 56 +++++++++++++++++---------- fs/nfsd/nfssvc.c | 6 --- fs/nfsd/xdr4.h | 1 - kernel/trace/Kconfig | 2 +- kernel/trace/trace_kprobe.c | 2 +- net/sunrpc/svcsock.c | 86 ++++++++++++++++++++++++++++++++++++++++- 20 files changed, 228 insertions(+), 64 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-defconfig updated (366f86bd429 -> ab88f360723)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-defconfig in repository toolchain/ci/gcc. from 366f86bd429 Daily bump. adds bcb3065b2ba ira: Skip some pseudos in move_unallocated_pseudos adds fa4586d8545 if-to-switch: remove memory leaks adds 4e275dccfc2 Add pytest for a GCOV test-case adds 64dc013853b aarch64: Reimplement vmovl*/vmovn* intrinsics using __built [...] adds a2106317cd6 widening_mul: Pattern recognize unsigned multiplication wit [...] adds 9febe9e4be7 widening_mul: Pattern recognize also signed multiplication [...] adds 9a6c37e6ae5 reassoc: Reassociate integral multiplies [PR95867] adds 39666d2b885 slp: fix is_linear_load_p to prevent multiple answers adds bd4298e1927 slp: handle externals correctly in linear_loads_p adds 0c18faac3fb slp: upgrade complex add to new format and fix memory leaks adds 300a3ce5c56 tree-optimization/98221 - fix wrong unpack operation used f [...] adds 928e96bbe98 d: Remove visibility and lookup deprecation adds 04bff1bbfc1 tree-optimization/98526 - fix vectorizer reduction cost adds 6ebf79fcd4c testsuite: Fix test failures from outputs.exp [PR98225] adds 84684e0f78c tree-optimization/91403 - avoid excessive code-generation adds 3b25e83536b Port update-copyright.py to Python3 adds 8c09b788a96 Make the serialized link target more verbose adds 3dd0d3ee1d2 c++, abi: Fix abi_tag attribute handling [PR98481] adds cbe9758ff49 Properly release symtab::m_clones. adds b81fbfe1eb5 aarch64: Add support for unpacked SVE shifts adds 48c7f5b8811 aarch64: Add support for unpacked SVE mult, max and min adds ab76e3db6b8 aarch64: Add general unpacked SVE conditional binary arithmetic adds 3f8b0bba035 aarch64: Add support for unpacked SVE ADR adds 907ea379559 aarch64: Add support for unpacked SVE ABD adds 7446de5a2af aarch64: Add support for unpacked SVE MULH adds 37426e0f060 aarch64: Add support for unpacked SVE conditional BIC adds a958b2fc6da aarch64: Add support for unpacked SVE ASRD new 67fbb7f0fda Daily bump. new ab88f360723 analyzer: fix ICE merging dereferencing unknown ptrs [PR98628] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: contrib/ChangeLog | 5 + contrib/update-copyright.py | 25 +- gcc/ChangeLog | 176 ++++++++ gcc/DATESTAMP | 2 +- gcc/Makefile.in | 2 +- gcc/analyzer/store.cc | 7 +- gcc/config/aarch64/aarch64-sve.md | 413 +++++++++++-------- gcc/config/aarch64/arm_neon.h | 84 +--- gcc/config/aarch64/iterators.md | 4 + gcc/cp/ChangeLog | 10 + gcc/cp/class.c | 8 + gcc/cp/decl2.c | 7 +- gcc/cp/tree.c | 22 +- gcc/d/ChangeLog | 10 + gcc/d/d-lang.cc | 8 - gcc/d/dmd/MERGE | 2 +- gcc/d/dmd/access.c | 21 +- gcc/d/dmd/dscope.c | 75 +--- gcc/d/dmd/dsymbol.c | 23 +- gcc/d/dmd/expression.c | 35 +- gcc/d/dmd/expression.h | 2 +- gcc/d/dmd/expressionsem.c | 47 ++- gcc/d/dmd/globals.h | 2 - gcc/d/dmd/mtype.c | 69 +--- gcc/d/dmd/parse.c | 1 - gcc/d/dmd/scope.h | 1 - gcc/d/dmd/traits.c | 2 +- gcc/d/gdc.texi | 10 - gcc/d/lang.opt | 8 - gcc/gimple-if-to-switch.cc | 97 +++-- gcc/ira.c | 9 + gcc/symtab-clones.h | 2 +- gcc/testsuite/ChangeLog | 97 +++++ gcc/testsuite/g++.dg/abi/abi-tag24.C | 17 + gcc/testsuite/g++.dg/gcov/gcov.py | 10 + gcc/testsuite/g++.dg/gcov/pr98273.C | 24 ++ gcc/testsuite/g++.dg/gcov/test-pr98273.py | 27 ++ gcc/testsuite/g++.target/aarch64/sve/abd_1.C | 38 ++ gcc/testsuite/g++.target/aarch64/sve/cond_abd_1.C | 60 +++ gcc/testsuite/g++.target/aarch64/sve/cond_abd_2.C | 60 +++ gcc/testsuite/g++.target/aarch64/sve/cond_abd_3.C | 49 +++ gcc/testsuite/g++.target/aarch64/sve/cond_abd_4.C | 43 ++ .../g++.target/aarch64/sve/cond_arith_1.C | 89 +++++ .../g++.target/aarch64/sve/cond_arith_2.C | 89 +++++ .../g++.target/aarch64/sve/cond_arith_3.C | 91 +++++ .../g++.target/aarch64/sve/cond_arith_4.C | 91 +++++ gcc/testsuite/g++.target/aarch64/sve/cond_bic_1.C | 40 ++ gcc/testsuite/g++.target/aarch64/sve/cond_bic_2.C | 31 ++ gcc/testsuite/g++.target/aarch64/sve/cond_bic_3.C | 36 ++ gcc/testsuite/g++.target/aarch64/sve/cond_bic_4.C | 36 ++ .../g++.target/aarch64/sve/cond_shift_1.C | 92 +++++ .../g++.target/aarch64/sve/cond_shift_2.C | 91 +++++ .../g++.target/aarch64/sve/cond_shift_3.C | 94 +++++ .../g++.target/aarch64/sve/cond_shift_4.C | 94 +++++ gcc/testsuite/g++.target/aarch64/sve/max_1.C | 73 ++++ gcc/testsuite/g++.target/aarch64/sve/min_1.C | 73 ++++ gcc/testsuite/gcc.dg/analyzer/pr98628.c | 19 + gcc/testsuite/gcc.dg/tree-ssa/pr95867.c | 14 + gcc/testsuite/gcc.dg/vect/pr91403.c | 11 + gcc/testsuite/gcc.misc-tests/outputs.exp | 23 +- gcc/testsuite/gcc.target/aarch64/sve/adr_6.c | 43 ++ gcc/testsuite/gcc.target/aarch64/sve/asrdiv_4.c | 29 ++ gcc/testsuite/gcc.target/aarch64/sve/cond_asrd_1.c | 32 ++ .../gcc.target/aarch64/sve/cond_asrd_1_run.c | 26 ++ gcc/testsuite/gcc.target/aarch64/sve/cond_asrd_2.c | 35 ++ .../gcc.target/aarch64/sve/cond_asrd_2_run.c | 26 ++ gcc/testsuite/gcc.target/aarch64/sve/cond_asrd_3.c | 35 ++ .../gcc.target/aarch64/sve/cond_asrd_3_run.c | 26 ++ gcc/testsuite/gcc.target/aarch64/sve/mul_2.c | 52 +++ .../gcc.target/aarch64/sve/mul_highpart_3.c | 34 ++ gcc/testsuite/gcc.target/aarch64/sve/shift_2.c | 81 ++++ gcc/testsuite/gcc.target/i386/pr95852-1.c | 266 +++++++++++++ gcc/testsuite/gcc.target/i386/pr95852-2.c | 266 +++++++++++++ gcc/testsuite/gcc.target/i386/pr95852-3.c | 266 +++++++++++++ gcc/testsuite/gcc.target/i386/pr95852-4.c | 266 +++++++++++++ gcc/testsuite/gdc.test/compilable/checkimports3.d | 12 + gcc/testsuite/gdc.test/compilable/ddoc14633.d | 6 - gcc/testsuite/gdc.test/compilable/deprecate14283.d | 6 - gcc/testsuite/gdc.test/compilable/diag11066.d | 6 - .../{fail_compilation => compilable}/diag12598.d | 7 +- gcc/testsuite/gdc.test/compilable/diag3243.d | 6 - gcc/testsuite/gdc.test/compilable/dip22d.d | 10 + .../imports/checkimports3a.d | 0 .../imports/checkimports3b.d | 0 .../imports/checkimports3c.d | 0 .../imports/diag12598a.d | 0 .../imports/dip22d.d | 0 .../imports/dip22e.d | 0 gcc/testsuite/gdc.test/compilable/test12567a.d | 5 - gcc/testsuite/gdc.test/compilable/test12567b.d | 5 - gcc/testsuite/gdc.test/compilable/test12567d.d | 5 - gcc/testsuite/gdc.test/compilable/test12567e.d | 5 - gcc/testsuite/gdc.test/compilable/test13053.d | 6 - gcc/testsuite/gdc.test/compilable/test14375.d | 6 +- gcc/testsuite/gdc.test/compilable/test15785.d | 5 - gcc/testsuite/gdc.test/compilable/test15856.d | 2 +- gcc/testsuite/gdc.test/compilable/test15925.d | 18 - gcc/testsuite/gdc.test/compilable/test17791.d | 7 +- gcc/testsuite/gdc.test/compilable/test7815.d | 6 - .../gdc.test/compilable/testcheckimports.d | 8 +- gcc/testsuite/gdc.test/compilable/warn3882.d | 6 - .../gdc.test/fail_compilation/checkimports1a.d | 20 - .../gdc.test/fail_compilation/checkimports1b.d | 20 - .../gdc.test/fail_compilation/checkimports1c.d | 20 - .../gdc.test/fail_compilation/checkimports2a.d | 15 +- .../gdc.test/fail_compilation/checkimports2b.d | 13 +- .../gdc.test/fail_compilation/checkimports2c.d | 14 +- .../gdc.test/fail_compilation/checkimports3.d | 15 - .../gdc.test/fail_compilation/diag10169.d | 3 +- gcc/testsuite/gdc.test/fail_compilation/diag5385.d | 24 +- gcc/testsuite/gdc.test/fail_compilation/dip22a.d | 17 +- gcc/testsuite/gdc.test/fail_compilation/dip22b.d | 4 +- gcc/testsuite/gdc.test/fail_compilation/dip22d.d | 12 - gcc/testsuite/gdc.test/fail_compilation/dip22e.d | 6 +- .../gdc.test/fail_compilation/fail10528.d | 20 +- gcc/testsuite/gdc.test/fail_compilation/fail262.d | 2 +- gcc/testsuite/gdc.test/fail_compilation/fail313.d | 8 +- .../imports/imp15925.d | 0 .../gdc.test/fail_compilation/imports/imp21353.d | 7 + .../gdc.test/fail_compilation/imports/test15117a.d | 9 + gcc/testsuite/gdc.test/fail_compilation/lookup.d | 4 +- gcc/testsuite/gdc.test/fail_compilation/test143.d | 2 +- .../gdc.test/fail_compilation/test15117.d | 30 ++ .../gdc.test/fail_compilation/test15785.d | 7 +- .../gdc.test/fail_compilation/test15785b.d | 8 +- .../gdc.test/fail_compilation/test15897.d | 2 +- .../gdc.test/fail_compilation/test15925.d | 19 + .../gdc.test/fail_compilation/test21353.d | 26 ++ gcc/testsuite/gdc.test/fail_compilation/test314.d | 10 +- gcc/testsuite/lib/gcov.exp | 45 +++ gcc/tree-ssa-forwprop.c | 21 +- gcc/tree-ssa-math-opts.c | 442 +++++++++++++++++++-- gcc/tree-ssa-math-opts.h | 26 ++ gcc/tree-ssa-reassoc.c | 77 +++- gcc/tree-vect-data-refs.c | 6 +- gcc/tree-vect-loop.c | 17 +- gcc/tree-vect-slp-patterns.c | 47 ++- 137 files changed, 4410 insertions(+), 929 deletions(-) create mode 100644 gcc/testsuite/g++.dg/abi/abi-tag24.C create mode 100644 gcc/testsuite/g++.dg/gcov/gcov.py create mode 100644 gcc/testsuite/g++.dg/gcov/pr98273.C create mode 100644 gcc/testsuite/g++.dg/gcov/test-pr98273.py create mode 100644 gcc/testsuite/g++.target/aarch64/sve/abd_1.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/cond_abd_1.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/cond_abd_2.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/cond_abd_3.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/cond_abd_4.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/cond_arith_1.C create mode 100644 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create mode 100644 gcc/testsuite/gcc.dg/vect/pr91403.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/adr_6.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/asrdiv_4.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_asrd_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_asrd_1_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_asrd_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_asrd_2_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_asrd_3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_asrd_3_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/mul_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/mul_highpart_3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/shift_2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr95852-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr95852-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr95852-3.c create mode 100644 gcc/testsuite/gcc.target/i386/pr95852-4.c create mode 100644 gcc/testsuite/gdc.test/compilable/checkimports3.d rename gcc/testsuite/gdc.test/{fail_compilation => compilable}/diag12598.d (50%) create mode 100644 gcc/testsuite/gdc.test/compilable/dip22d.d rename gcc/testsuite/gdc.test/{fail_compilation => compilable}/imports/checkimport [...] rename gcc/testsuite/gdc.test/{fail_compilation => compilable}/imports/checkimport [...] rename gcc/testsuite/gdc.test/{fail_compilation => compilable}/imports/checkimport [...] rename gcc/testsuite/gdc.test/{fail_compilation => compilable}/imports/diag12598a. [...] copy gcc/testsuite/gdc.test/{fail_compilation => compilable}/imports/dip22d.d (100%) copy gcc/testsuite/gdc.test/{fail_compilation => compilable}/imports/dip22e.d (100%) delete mode 100644 gcc/testsuite/gdc.test/compilable/test15925.d delete mode 100644 gcc/testsuite/gdc.test/fail_compilation/checkimports1a.d delete mode 100644 gcc/testsuite/gdc.test/fail_compilation/checkimports1b.d delete mode 100644 gcc/testsuite/gdc.test/fail_compilation/checkimports1c.d delete mode 100644 gcc/testsuite/gdc.test/fail_compilation/checkimports3.d delete mode 100644 gcc/testsuite/gdc.test/fail_compilation/dip22d.d rename gcc/testsuite/gdc.test/{compilable => fail_compilation}/imports/imp15925.d (100%) create mode 100644 gcc/testsuite/gdc.test/fail_compilation/imports/imp21353.d create mode 100644 gcc/testsuite/gdc.test/fail_compilation/imports/test15117a.d create mode 100644 gcc/testsuite/gdc.test/fail_compilation/test15117.d create mode 100644 gcc/testsuite/gdc.test/fail_compilation/test15925.d create mode 100644 gcc/testsuite/gdc.test/fail_compilation/test21353.d create mode 100644 gcc/tree-ssa-math-opts.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-defconfig updated (a7e906e8f5 -> 44124a4683)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-defconfig in repository toolchain/ci/binutils-gdb. from a7e906e8f5 Automatic date update in version.in adds 6430704567 configure regen adds aae7fcb8d7 POWER10: Add Return-Oriented Programming instructions adds b1b29aa51a elf: Verify section size for mixed ordered/unordered inputs adds ba9e922fa0 ld/x86-64: Also set LAM_U57 when setting LAM_U48 adds ce0be4070f sim: common: add missing stdlib.h for abort() adds 055bc77a80 Add Changelog entries and NEWS entries for 2.36 branch adds 573fe3fbc1 Change version number to 2.36.50 and regenerate files adds be2c78856d Update release howto with 2.37 numbers adds b5a4a01af4 sim: hw: rework code to avoid gcc warnings adds f41464416a sim: pru: fix include ordering with sim-main.h adds 0a94990bf6 ld/x86-64: Properly Handle -z lam-u48/lam-u57 adds bf470982f9 sim: enable -Werror by default for some arches adds 50df264dae sim: clean up stale AC_PREREQ refs adds f8cab0b995 sim: sh64: delete port adds f074c07d8d sim: common: clean up asprintf includes a bit adds 7eb99e5e27 sim: cr16/d10v: move storage out of header adds a9fd212a24 sim: replace rindex with strrchr adds 50ad1254d5 GCC: Pass --plugin to AR and RANLIB adds a4966cd965 Binutils: Pass --plugin to AR and RANLIB adds af019bfde9 Support the PGO build for binutils+gdb adds 66beed0227 Fix erroneous agent expression test adds bc167b6b3e Remove a use of print_expression adds 54585eee2e Avoid crash in compile_to_object adds 5834526f4b Automatic date update in version.in adds 46b1518d4c Automatic date update in version.in adds a8aa72b913 Updated translations for multiple subdirectories adds 68ed285428 sim: clean up C11 header includes adds 933306703a sim: rl78: move storage out of header adds 90e123dd60 sim: common: fix printf formats adds a0c38f0d70 sim: or1k: fix include ordering with sim-main.h adds 5c1008a41f sim: call SIM_AC_OPTION_WARNINGS(no) in remaining ports adds 9c70334dee sim: always call SIM_AC_OPTION_WARNINGS adds c0f6e439cc Add support for more MIPS variants to the linker command line. adds 82c70b08df aarch64: Remove support for CSRE adds 10dadadc5b [gdb/testsuite] Fix gdb.arch/amd64-stap-three-arg-disp.S adds 062eaacbac gdb: change jit_debug to a bool adds eef401dce1 gdb: convert solib-aix to new-style debug macros adds c6185dce03 gdb: convert aarch64 to new-style debug macros new 254c3783fe sim: tests: get common tests working again new eabdd87b2e Automatic date update in version.in new 03c02f3116 GCC: Check if AR works with --plugin and rc new 83b33c6cb9 Binutils: Check if AR works with --plugin and rc new 44124a4683 binuitils: Check if AR is usable for LTO build The 5 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 50 + Makefile.in | 68 +- Makefile.tpl | 63 +- bfd/ChangeLog | 48 + bfd/configure | 55 +- bfd/elflink.c | 8 + bfd/elfxx-x86.c | 22 +- bfd/po/bfd.pot | 2574 +-- bfd/po/fr.po | 2666 +-- bfd/po/pt.po | 2681 +-- bfd/po/sr.po | 2687 ++-- bfd/po/uk.po | 2666 +-- bfd/version.h | 2 +- bfd/version.m4 | 2 +- binutils/BRANCHES | 1 + binutils/ChangeLog | 31 + binutils/NEWS | 2 + binutils/README-how-to-make-a-release | 40 +- binutils/configure | 55 +- binutils/po/binutils.pot | 3317 ++-- binutils/po/pt.po | 3943 ++--- binutils/po/sr.po | 3845 +++-- binutils/po/uk.po | 3840 +++-- config/ChangeLog | 14 + config/gcc-plugin.m4 | 40 + configure | 246 +- configure.ac | 84 + cpu/ChangeLog | 4 + elfcpp/ChangeLog | 4 + gas/ChangeLog | 52 + gas/NEWS | 10 +- gas/config/tc-aarch64.c | 31 - gas/configure | 55 +- gas/doc/c-aarch64.texi | 2 - gas/po/gas.pot | 2131 +-- gas/po/uk.po | 7237 ++++----- gas/testsuite/gas/aarch64/csre-invalid.d | 3 - gas/testsuite/gas/aarch64/csre-invalid.s | 6 - gas/testsuite/gas/aarch64/csre.d | 29 - gas/testsuite/gas/aarch64/csre_csr-invalid.d | 3 - gas/testsuite/gas/aarch64/csre_csr-invalid.l | 2 - gas/testsuite/gas/aarch64/csre_csr-invalid.s | 4 - gas/testsuite/gas/aarch64/csre_csr.d | 10 - gas/testsuite/gas/aarch64/csre_csr.s | 4 - gas/testsuite/gas/ppc/ppc.exp | 2 + gas/testsuite/gas/ppc/rop-checks.d | 3 + gas/testsuite/gas/ppc/rop-checks.l | 17 + gas/testsuite/gas/ppc/rop-checks.s | 18 + gas/testsuite/gas/ppc/rop.d | 27 + gas/testsuite/gas/ppc/rop.s | 21 + gdb/ChangeLog | 29 + gdb/aarch64-tdep.c | 89 +- gdb/arch/aarch64-insn.c | 9 +- gdb/arch/aarch64-insn.h | 5 + gdb/compile/compile.c | 4 +- gdb/jit.c | 18 +- gdb/solib-aix.c | 23 +- gdb/testsuite/ChangeLog | 10 + gdb/testsuite/gdb.arch/amd64-stap-three-arg-disp.S | 5 +- gdb/testsuite/gdb.trace/ax.exp | 2 +- gdb/tracepoint.c | 17 +- gdb/tracepoint.h | 2 +- gold/ChangeLog | 9 + gold/po/sr.po | 729 +- gold/po/uk.po | 730 +- gprof/ChangeLog | 22 + gprof/configure | 55 +- gprof/po/gprof.pot | 4 +- include/ChangeLog | 9 + include/opcode/aarch64.h | 2 - ld/ChangeLog | 46 + ld/Makefile.in | 1 - ld/NEWS | 2 + ld/configure | 67 +- ld/ldmain.c | 4 + ld/po/ld.pot | 2266 +-- ld/po/pt_BR.po | 3715 +++-- ld/po/uk.po | 3703 +++-- ld/testsuite/ld-x86-64/lam-u48.rd | 6 + ld/testsuite/ld-x86-64/lam-u57.rd | 6 + ld/testsuite/ld-x86-64/property-x86-lam-u48-4.d | 2 +- ld/testsuite/ld-x86-64/property-x86-lam-u48-5.d | 2 +- ld/testsuite/ld-x86-64/x86-64.exp | 16 + libctf/ChangeLog | 17 + libctf/configure | 35 +- libiberty/ChangeLog | 15 + libiberty/Makefile.in | 5 +- libiberty/aclocal.m4 | 1 + libiberty/configure | 140 + libiberty/configure.ac | 12 + libtool.m4 | 32 +- opcodes/ChangeLog | 48 + opcodes/aarch64-asm-2.c | 248 +- opcodes/aarch64-dis-2.c | 2579 ++- opcodes/aarch64-opc-2.c | 16 +- opcodes/aarch64-opc.c | 4 - opcodes/aarch64-tbl.h | 7 - opcodes/configure | 55 +- opcodes/po/de.po | 514 +- opcodes/po/fr.po | 514 +- opcodes/po/opcodes.pot | 505 +- opcodes/po/pt_BR.po | 619 +- opcodes/po/sv.po | 516 +- opcodes/po/uk.po | 516 +- opcodes/ppc-opc.c | 46 +- sim/ChangeLog | 11 + sim/MAINTAINERS | 2 +- sim/README-HACKING | 1 - sim/aarch64/ChangeLog | 8 + sim/aarch64/config.in | 6 - sim/aarch64/configure | 62 +- sim/arm/ChangeLog | 8 + sim/arm/config.in | 6 - sim/arm/configure | 62 +- sim/avr/ChangeLog | 9 + sim/avr/config.in | 6 - sim/avr/configure | 62 +- sim/avr/interp.c | 3 +- sim/bfin/ChangeLog | 8 + sim/bfin/config.in | 6 - sim/bfin/configure | 62 +- sim/bpf/ChangeLog | 13 + sim/bpf/config.in | 6 - sim/bpf/configure | 159 +- sim/bpf/configure.ac | 1 + sim/common/ChangeLog | 45 + sim/common/acinclude.m4 | 35 +- sim/common/callback.c | 10 - sim/common/cgen-par.c | 1 + sim/common/cgen-scache.c | 2 - sim/common/cgen-trace.c | 1 + sim/common/dv-glue.c | 6 - sim/common/dv-pal.c | 9 - sim/common/dv-sockser.c | 8 - sim/common/hw-alloc.c | 3 - sim/common/hw-base.c | 21 +- sim/common/hw-device.c | 5 - sim/common/hw-events.c | 3 +- sim/common/hw-handles.c | 2 - sim/common/hw-ports.c | 10 - sim/common/hw-properties.c | 6 - sim/common/hw-tree.c | 10 - sim/common/nrun.c | 7 - sim/common/sim-abort.c | 1 + sim/common/sim-arange.c | 5 - sim/common/sim-basics.h | 5 - sim/common/sim-core.c | 4 +- sim/common/sim-events.c | 10 - sim/common/sim-fpu.c | 2 - sim/common/sim-hw.c | 9 - sim/common/sim-load.c | 2 - sim/common/sim-memopt.c | 10 - sim/common/sim-options.c | 8 - sim/common/sim-profile.c | 9 - sim/common/sim-trace.c | 8 - sim/common/sim-utils.c | 13 - sim/common/sim-watch.c | 11 +- sim/common/syscall.c | 6 - sim/configure | 8 - sim/configure.tgt | 3 - sim/cr16/ChangeLog | 19 + sim/cr16/config.in | 6 - sim/cr16/configure | 59 +- sim/cr16/configure.ac | 2 +- sim/cr16/cr16_sim.h | 4 +- sim/cr16/interp.c | 2 + sim/cr16/simops.c | 4 - sim/cris/ChangeLog | 16 + sim/cris/config.in | 9 - sim/cris/configure | 61 +- sim/cris/configure.ac | 4 +- sim/cris/dv-rv.c | 14 - sim/cris/rvdummy.c | 7 - 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159 +- sim/iq2000/configure.ac | 1 + sim/iq2000/sim-if.c | 4 +- sim/lm32/ChangeLog | 14 + sim/lm32/config.in | 6 - sim/lm32/configure | 159 +- sim/lm32/configure.ac | 1 + sim/lm32/sim-if.c | 2 - sim/m32c/ChangeLog | 13 + sim/m32c/config.in | 6 - sim/m32c/configure | 59 +- sim/m32c/configure.ac | 2 +- sim/m32r/ChangeLog | 15 + sim/m32r/config.in | 6 - sim/m32r/configure | 159 +- sim/m32r/configure.ac | 1 + sim/m32r/sim-if.c | 8 - sim/m68hc11/ChangeLog | 13 + sim/m68hc11/config.in | 6 - sim/m68hc11/configure | 59 +- sim/m68hc11/configure.ac | 2 +- sim/mcore/ChangeLog | 13 + sim/mcore/config.in | 6 - sim/mcore/configure | 59 +- sim/mcore/configure.ac | 2 +- sim/microblaze/ChangeLog | 8 + sim/microblaze/config.in | 6 - sim/microblaze/configure | 62 +- sim/mips/ChangeLog | 15 + sim/mips/config.in | 6 - sim/mips/configure | 59 +- sim/mips/configure.ac | 2 +- sim/mips/interp.c | 8 - sim/mn10300/ChangeLog | 15 + sim/mn10300/config.in | 6 - sim/mn10300/configure | 59 +- sim/mn10300/configure.ac | 2 +- sim/mn10300/interp.c | 10 - sim/mn10300/op_utils.c | 11 - sim/moxie/ChangeLog | 13 + sim/moxie/config.in | 6 - sim/moxie/configure | 59 +- sim/moxie/configure.ac | 2 +- sim/msp430/ChangeLog | 8 + sim/msp430/config.in | 6 - sim/msp430/configure | 62 +- sim/or1k/ChangeLog | 19 + sim/or1k/config.in | 6 - sim/or1k/configure | 159 +- sim/or1k/configure.ac | 1 + sim/or1k/sim-if.c | 8 - sim/or1k/sim-main.h | 2 + sim/ppc/ChangeLog | 22 + sim/ppc/config.in | 3 - sim/ppc/configure | 15 +- sim/ppc/configure.ac | 2 +- sim/ppc/cpu.c | 6 - sim/ppc/debug.c | 4 - sim/ppc/device.c | 10 - sim/ppc/device_table.c | 3 - sim/ppc/device_table.h | 6 - sim/ppc/dgen.c | 10 - sim/ppc/emul_bugapi.c | 10 - sim/ppc/emul_chirp.c | 7 - sim/ppc/emul_netbsd.c | 9 - sim/ppc/emul_unix.c | 9 - sim/ppc/filter.c | 6 - sim/ppc/gen-model.c | 2 - sim/ppc/hw_com.c | 9 - sim/ppc/hw_eeprom.c | 6 - sim/ppc/hw_nvram.c | 17 - sim/ppc/hw_opic.c | 6 - sim/ppc/hw_pal.c | 9 - sim/ppc/hw_phb.c | 3 - sim/ppc/hw_sem.c | 7 - sim/ppc/hw_shm.c | 7 - sim/ppc/lf.c | 9 - sim/ppc/main.c | 11 - sim/ppc/misc.c | 9 - sim/ppc/misc.h | 10 - sim/ppc/mon.c | 15 - sim/ppc/pk_disklabel.c | 4 - sim/ppc/psim.c | 12 - sim/ppc/registers.c | 10 - sim/ppc/sim_calls.c | 9 - sim/ppc/table.c | 3 - sim/ppc/tree.c | 11 - sim/pru/ChangeLog | 17 + sim/pru/config.in | 6 - sim/pru/configure | 62 +- sim/pru/configure.ac | 1 - sim/pru/sim-main.h | 2 + sim/rl78/ChangeLog | 18 + sim/rl78/config.in | 6 - sim/rl78/configure | 159 +- sim/rl78/configure.ac | 1 + sim/rl78/cpu.c | 2 + sim/rl78/cpu.h | 2 +- sim/rx/ChangeLog | 14 + sim/rx/config.in | 6 - sim/rx/configure | 159 +- sim/rx/configure.ac | 1 + sim/rx/main.c | 2 - sim/sh/ChangeLog | 15 + sim/sh/config.in | 6 - sim/sh/configure | 59 +- sim/sh/configure.ac | 2 +- sim/sh/interp.c | 12 - sim/sh64/ChangeLog | 860 - sim/sh64/Makefile.in | 150 - sim/sh64/aclocal.m4 | 119 - sim/sh64/arch.c | 67 - sim/sh64/arch.h | 216 - sim/sh64/config.in | 254 - sim/sh64/configure | 16093 ------------------- sim/sh64/configure.ac | 15 - sim/sh64/cpu.c | 564 - sim/sh64/cpu.h | 341 - sim/sh64/cpuall.h | 75 - sim/sh64/decode-compact.c | 6134 ------- sim/sh64/decode-compact.h | 279 - sim/sh64/decode-media.c | 4100 ----- sim/sh64/decode-media.h | 269 - sim/sh64/decode.h | 16 - sim/sh64/defs-compact.h | 509 - sim/sh64/defs-media.h | 920 -- sim/sh64/eng-compact.h | 34 - sim/sh64/eng-media.h | 34 - sim/sh64/eng.h | 23 - sim/sh64/mloop-compact.c | 635 - sim/sh64/mloop-media.c | 624 - sim/sh64/sem-compact-switch.c | 5210 ------ sim/sh64/sem-compact.c | 5589 ------- sim/sh64/sem-media-switch.c | 5656 ------- sim/sh64/sem-media.c | 6063 ------- sim/sh64/sh-desc.c | 3562 ---- sim/sh64/sh-desc.h | 315 - sim/sh64/sh-opc.h | 214 - sim/sh64/sh64-sim.h | 84 - sim/sh64/sh64.c | 1138 -- sim/sh64/sim-if.c | 204 - sim/sh64/sim-main.h | 72 - sim/testsuite/ChangeLog | 21 +- sim/testsuite/common/alu-tst.c | 7 +- sim/testsuite/common/bits-gen.c | 25 +- sim/testsuite/common/bits-tst.c | 39 +- sim/testsuite/configure | 3 - sim/testsuite/sim/cris/ChangeLog | 4 + sim/testsuite/sim/cris/c/readlink4.c | 4 +- sim/testsuite/sim/sh64/ChangeLog | 21 - sim/testsuite/sim/sh64/compact.exp | 19 - sim/testsuite/sim/sh64/compact/ChangeLog | 26 - sim/testsuite/sim/sh64/compact/add.cgs | 55 - sim/testsuite/sim/sh64/compact/addc.cgs | 90 - sim/testsuite/sim/sh64/compact/addi.cgs | 46 - sim/testsuite/sim/sh64/compact/addv.cgs | 48 - sim/testsuite/sim/sh64/compact/and.cgs | 33 - sim/testsuite/sim/sh64/compact/andb.cgs | 24 - sim/testsuite/sim/sh64/compact/andi.cgs | 43 - sim/testsuite/sim/sh64/compact/bf.cgs | 24 - sim/testsuite/sim/sh64/compact/bfs.cgs | 28 - sim/testsuite/sim/sh64/compact/bra.cgs | 23 - sim/testsuite/sim/sh64/compact/braf.cgs | 24 - sim/testsuite/sim/sh64/compact/brk.cgs | 18 - sim/testsuite/sim/sh64/compact/bsr.cgs | 21 - sim/testsuite/sim/sh64/compact/bsrf.cgs | 22 - sim/testsuite/sim/sh64/compact/bt.cgs | 24 - sim/testsuite/sim/sh64/compact/bts.cgs | 28 - sim/testsuite/sim/sh64/compact/clrmac.cgs | 13 - sim/testsuite/sim/sh64/compact/clrs.cgs | 14 - sim/testsuite/sim/sh64/compact/clrt.cgs | 16 - sim/testsuite/sim/sh64/compact/cmpeq.cgs | 52 - sim/testsuite/sim/sh64/compact/cmpeqi.cgs | 39 - sim/testsuite/sim/sh64/compact/cmpge.cgs | 69 - sim/testsuite/sim/sh64/compact/cmpgt.cgs | 69 - sim/testsuite/sim/sh64/compact/cmphi.cgs | 68 - sim/testsuite/sim/sh64/compact/cmphs.cgs | 59 - sim/testsuite/sim/sh64/compact/cmppl.cgs | 37 - sim/testsuite/sim/sh64/compact/cmppz.cgs | 37 - sim/testsuite/sim/sh64/compact/cmpstr.cgs | 148 - sim/testsuite/sim/sh64/compact/div0s.cgs | 52 - sim/testsuite/sim/sh64/compact/div0u.cgs | 21 - sim/testsuite/sim/sh64/compact/div1.cgs | 52 - sim/testsuite/sim/sh64/compact/dmulsl.cgs | 115 - sim/testsuite/sim/sh64/compact/dmulul.cgs | 53 - sim/testsuite/sim/sh64/compact/dt.cgs | 42 - sim/testsuite/sim/sh64/compact/extsb.cgs | 29 - sim/testsuite/sim/sh64/compact/extsw.cgs | 32 - sim/testsuite/sim/sh64/compact/extub.cgs | 31 - sim/testsuite/sim/sh64/compact/extuw.cgs | 31 - sim/testsuite/sim/sh64/compact/fabs.cgs | 88 - sim/testsuite/sim/sh64/compact/fadd.cgs | 31 - sim/testsuite/sim/sh64/compact/fcmpeq.cgs | 88 - sim/testsuite/sim/sh64/compact/fcmpgt.cgs | 95 - sim/testsuite/sim/sh64/compact/fcnvds.cgs | 13 - sim/testsuite/sim/sh64/compact/fcnvsd.cgs | 27 - sim/testsuite/sim/sh64/compact/fdiv.cgs | 83 - sim/testsuite/sim/sh64/compact/fipr.cgs | 44 - sim/testsuite/sim/sh64/compact/fldi0.cgs | 17 - sim/testsuite/sim/sh64/compact/fldi1.cgs | 17 - sim/testsuite/sim/sh64/compact/flds.cgs | 26 - sim/testsuite/sim/sh64/compact/float.cgs | 80 - sim/testsuite/sim/sh64/compact/fmac.cgs | 78 - sim/testsuite/sim/sh64/compact/fmov.cgs | 273 - sim/testsuite/sim/sh64/compact/fmul.cgs | 121 - sim/testsuite/sim/sh64/compact/fneg.cgs | 83 - sim/testsuite/sim/sh64/compact/frchg.cgs | 13 - sim/testsuite/sim/sh64/compact/fschg.cgs | 13 - sim/testsuite/sim/sh64/compact/fsqrt.cgs | 93 - sim/testsuite/sim/sh64/compact/fsts.cgs | 11 - sim/testsuite/sim/sh64/compact/fsub.cgs | 120 - sim/testsuite/sim/sh64/compact/ftrc.cgs | 132 - sim/testsuite/sim/sh64/compact/ftrv.cgs | 74 - sim/testsuite/sim/sh64/compact/jmp.cgs | 29 - sim/testsuite/sim/sh64/compact/jsr.cgs | 29 - sim/testsuite/sim/sh64/compact/ldc-gbr.cgs | 22 - sim/testsuite/sim/sh64/compact/ldcl-gbr.cgs | 28 - sim/testsuite/sim/sh64/compact/lds-fpscr.cgs | 22 - sim/testsuite/sim/sh64/compact/lds-fpul.cgs | 17 - sim/testsuite/sim/sh64/compact/lds-mach.cgs | 23 - sim/testsuite/sim/sh64/compact/lds-macl.cgs | 23 - sim/testsuite/sim/sh64/compact/lds-pr.cgs | 23 - sim/testsuite/sim/sh64/compact/ldsl-fpscr.cgs | 43 - sim/testsuite/sim/sh64/compact/ldsl-fpul.cgs | 27 - sim/testsuite/sim/sh64/compact/ldsl-mach.cgs | 26 - sim/testsuite/sim/sh64/compact/ldsl-macl.cgs | 26 - sim/testsuite/sim/sh64/compact/ldsl-pr.cgs | 28 - sim/testsuite/sim/sh64/compact/macl.cgs | 76 - sim/testsuite/sim/sh64/compact/macw.cgs | 70 - sim/testsuite/sim/sh64/compact/mov.cgs | 40 - sim/testsuite/sim/sh64/compact/mova.cgs | 29 - sim/testsuite/sim/sh64/compact/movb1.cgs | 27 - sim/testsuite/sim/sh64/compact/movb10.cgs | 25 - sim/testsuite/sim/sh64/compact/movb2.cgs | 34 - sim/testsuite/sim/sh64/compact/movb3.cgs | 30 - sim/testsuite/sim/sh64/compact/movb4.cgs | 28 - sim/testsuite/sim/sh64/compact/movb5.cgs | 25 - sim/testsuite/sim/sh64/compact/movb6.cgs | 26 - sim/testsuite/sim/sh64/compact/movb7.cgs | 35 - sim/testsuite/sim/sh64/compact/movb8.cgs | 27 - sim/testsuite/sim/sh64/compact/movb9.cgs | 27 - sim/testsuite/sim/sh64/compact/movcal.cgs | 28 - sim/testsuite/sim/sh64/compact/movi.cgs | 39 - sim/testsuite/sim/sh64/compact/movl1.cgs | 31 - sim/testsuite/sim/sh64/compact/movl10.cgs | 34 - sim/testsuite/sim/sh64/compact/movl11.cgs | 32 - sim/testsuite/sim/sh64/compact/movl2.cgs | 43 - sim/testsuite/sim/sh64/compact/movl3.cgs | 36 - sim/testsuite/sim/sh64/compact/movl4.cgs | 38 - sim/testsuite/sim/sh64/compact/movl5.cgs | 37 - sim/testsuite/sim/sh64/compact/movl6.cgs | 25 - sim/testsuite/sim/sh64/compact/movl7.cgs | 37 - sim/testsuite/sim/sh64/compact/movl8.cgs | 24 - sim/testsuite/sim/sh64/compact/movl9.cgs | 24 - sim/testsuite/sim/sh64/compact/movt.cgs | 28 - sim/testsuite/sim/sh64/compact/movw1.cgs | 29 - sim/testsuite/sim/sh64/compact/movw10.cgs | 32 - sim/testsuite/sim/sh64/compact/movw11.cgs | 35 - sim/testsuite/sim/sh64/compact/movw2.cgs | 36 - sim/testsuite/sim/sh64/compact/movw3.cgs | 31 - sim/testsuite/sim/sh64/compact/movw4.cgs | 31 - sim/testsuite/sim/sh64/compact/movw5.cgs | 32 - sim/testsuite/sim/sh64/compact/movw6.cgs | 30 - sim/testsuite/sim/sh64/compact/movw7.cgs | 36 - sim/testsuite/sim/sh64/compact/movw8.cgs | 31 - sim/testsuite/sim/sh64/compact/movw9.cgs | 33 - sim/testsuite/sim/sh64/compact/mull.cgs | 64 - sim/testsuite/sim/sh64/compact/mulsw.cgs | 91 - sim/testsuite/sim/sh64/compact/muluw.cgs | 96 - sim/testsuite/sim/sh64/compact/neg.cgs | 55 - sim/testsuite/sim/sh64/compact/negc.cgs | 66 - sim/testsuite/sim/sh64/compact/nop.cgs | 13 - sim/testsuite/sim/sh64/compact/not.cgs | 47 - sim/testsuite/sim/sh64/compact/ocbi.cgs | 14 - sim/testsuite/sim/sh64/compact/ocbp.cgs | 15 - sim/testsuite/sim/sh64/compact/ocbwb.cgs | 15 - sim/testsuite/sim/sh64/compact/or.cgs | 43 - sim/testsuite/sim/sh64/compact/orb.cgs | 24 - sim/testsuite/sim/sh64/compact/ori.cgs | 40 - sim/testsuite/sim/sh64/compact/pref.cgs | 15 - sim/testsuite/sim/sh64/compact/rotcl.cgs | 121 - sim/testsuite/sim/sh64/compact/rotcr.cgs | 103 - sim/testsuite/sim/sh64/compact/rotl.cgs | 62 - sim/testsuite/sim/sh64/compact/rotr.cgs | 55 - sim/testsuite/sim/sh64/compact/rts.cgs | 24 - sim/testsuite/sim/sh64/compact/sets.cgs | 13 - sim/testsuite/sim/sh64/compact/sett.cgs | 16 - sim/testsuite/sim/sh64/compact/shad.cgs | 58 - sim/testsuite/sim/sh64/compact/shal.cgs | 57 - sim/testsuite/sim/sh64/compact/shar.cgs | 40 - sim/testsuite/sim/sh64/compact/shld.cgs | 48 - sim/testsuite/sim/sh64/compact/shll.cgs | 57 - sim/testsuite/sim/sh64/compact/shll16.cgs | 44 - sim/testsuite/sim/sh64/compact/shll2.cgs | 40 - sim/testsuite/sim/sh64/compact/shll8.cgs | 38 - sim/testsuite/sim/sh64/compact/shlr.cgs | 33 - sim/testsuite/sim/sh64/compact/shlr16.cgs | 14 - sim/testsuite/sim/sh64/compact/shlr2.cgs | 14 - sim/testsuite/sim/sh64/compact/shlr8.cgs | 14 - sim/testsuite/sim/sh64/compact/stc-gbr.cgs | 21 - sim/testsuite/sim/sh64/compact/stcl-gbr.cgs | 27 - sim/testsuite/sim/sh64/compact/sts-fpscr.cgs | 23 - sim/testsuite/sim/sh64/compact/sts-fpul.cgs | 14 - sim/testsuite/sim/sh64/compact/sts-mach.cgs | 22 - sim/testsuite/sim/sh64/compact/sts-macl.cgs | 21 - sim/testsuite/sim/sh64/compact/sts-pr.cgs | 22 - sim/testsuite/sim/sh64/compact/stsl-fpscr.cgs | 28 - sim/testsuite/sim/sh64/compact/stsl-fpul.cgs | 27 - sim/testsuite/sim/sh64/compact/stsl-mach.cgs | 42 - sim/testsuite/sim/sh64/compact/stsl-macl.cgs | 42 - sim/testsuite/sim/sh64/compact/stsl-pr.cgs | 42 - sim/testsuite/sim/sh64/compact/sub.cgs | 68 - sim/testsuite/sim/sh64/compact/subc.cgs | 109 - sim/testsuite/sim/sh64/compact/subv.cgs | 55 - sim/testsuite/sim/sh64/compact/swapb.cgs | 44 - sim/testsuite/sim/sh64/compact/swapw.cgs | 43 - sim/testsuite/sim/sh64/compact/tasb.cgs | 26 - sim/testsuite/sim/sh64/compact/testutils.inc | 49 - sim/testsuite/sim/sh64/compact/trapa.cgs | 13 - sim/testsuite/sim/sh64/compact/tst.cgs | 62 - sim/testsuite/sim/sh64/compact/tstb.cgs | 30 - sim/testsuite/sim/sh64/compact/tsti.cgs | 32 - sim/testsuite/sim/sh64/compact/xor.cgs | 70 - sim/testsuite/sim/sh64/compact/xorb.cgs | 24 - sim/testsuite/sim/sh64/compact/xori.cgs | 50 - sim/testsuite/sim/sh64/compact/xtrct.cgs | 46 - sim/testsuite/sim/sh64/interwork.exp | 20 - sim/testsuite/sim/sh64/media.exp | 19 - sim/testsuite/sim/sh64/media/ChangeLog | 102 - sim/testsuite/sim/sh64/media/add.cgs | 47 - sim/testsuite/sim/sh64/media/addi.cgs | 37 - sim/testsuite/sim/sh64/media/addil.cgs | 49 - sim/testsuite/sim/sh64/media/addl.cgs | 61 - sim/testsuite/sim/sh64/media/addzl.cgs | 39 - sim/testsuite/sim/sh64/media/alloco.cgs | 10 - sim/testsuite/sim/sh64/media/and.cgs | 68 - sim/testsuite/sim/sh64/media/andc.cgs | 50 - sim/testsuite/sim/sh64/media/andi.cgs | 46 - sim/testsuite/sim/sh64/media/beq.cgs | 52 - sim/testsuite/sim/sh64/media/beqi.cgs | 40 - sim/testsuite/sim/sh64/media/bge.cgs | 40 - sim/testsuite/sim/sh64/media/bgeu.cgs | 47 - sim/testsuite/sim/sh64/media/bgt.cgs | 32 - sim/testsuite/sim/sh64/media/bgtu.cgs | 36 - sim/testsuite/sim/sh64/media/blink.cgs | 17 - sim/testsuite/sim/sh64/media/bne.cgs | 23 - sim/testsuite/sim/sh64/media/bnei.cgs | 23 - sim/testsuite/sim/sh64/media/brk.cgs | 11 - sim/testsuite/sim/sh64/media/byterev.cgs | 67 - sim/testsuite/sim/sh64/media/cmpeq.cgs | 42 - sim/testsuite/sim/sh64/media/cmpgt.cgs | 43 - sim/testsuite/sim/sh64/media/cmpgtu.cgs | 43 - sim/testsuite/sim/sh64/media/cmveq.cgs | 32 - sim/testsuite/sim/sh64/media/cmvne.cgs | 32 - sim/testsuite/sim/sh64/media/fabsd.cgs | 39 - sim/testsuite/sim/sh64/media/fabss.cgs | 39 - sim/testsuite/sim/sh64/media/faddd.cgs | 33 - sim/testsuite/sim/sh64/media/fadds.cgs | 34 - sim/testsuite/sim/sh64/media/fcmpeqd.cgs | 36 - sim/testsuite/sim/sh64/media/fcmpeqs.cgs | 36 - sim/testsuite/sim/sh64/media/fcmpged.cgs | 46 - sim/testsuite/sim/sh64/media/fcmpges.cgs | 46 - sim/testsuite/sim/sh64/media/fcmpgtd.cgs | 36 - sim/testsuite/sim/sh64/media/fcmpgts.cgs | 36 - sim/testsuite/sim/sh64/media/fcmpund.cgs | 26 - sim/testsuite/sim/sh64/media/fcmpuns.cgs | 26 - sim/testsuite/sim/sh64/media/fcnvds.cgs | 27 - sim/testsuite/sim/sh64/media/fcnvsd.cgs | 27 - sim/testsuite/sim/sh64/media/fdivd.cgs | 39 - sim/testsuite/sim/sh64/media/fdivs.cgs | 39 - sim/testsuite/sim/sh64/media/fgetscr.cgs | 14 - sim/testsuite/sim/sh64/media/fiprs.cgs | 42 - sim/testsuite/sim/sh64/media/fldd.cgs | 13 - sim/testsuite/sim/sh64/media/fldp.cgs | 16 - sim/testsuite/sim/sh64/media/flds.cgs | 13 - sim/testsuite/sim/sh64/media/fldxd.cgs | 16 - sim/testsuite/sim/sh64/media/fldxp.cgs | 22 - sim/testsuite/sim/sh64/media/fldxs.cgs | 16 - sim/testsuite/sim/sh64/media/floatld.cgs | 12 - sim/testsuite/sim/sh64/media/floatls.cgs | 12 - sim/testsuite/sim/sh64/media/floatqd.cgs | 12 - sim/testsuite/sim/sh64/media/floatqs.cgs | 12 - sim/testsuite/sim/sh64/media/fmacs.cgs | 39 - sim/testsuite/sim/sh64/media/fmovd.cgs | 24 - sim/testsuite/sim/sh64/media/fmovdq.cgs | 23 - sim/testsuite/sim/sh64/media/fmovls.cgs | 26 - sim/testsuite/sim/sh64/media/fmovqd.cgs | 22 - sim/testsuite/sim/sh64/media/fmovs.cgs | 24 - sim/testsuite/sim/sh64/media/fmovsl.cgs | 21 - sim/testsuite/sim/sh64/media/fmuld.cgs | 30 - sim/testsuite/sim/sh64/media/fmuls.cgs | 31 - sim/testsuite/sim/sh64/media/fnegd.cgs | 35 - sim/testsuite/sim/sh64/media/fnegs.cgs | 35 - sim/testsuite/sim/sh64/media/fputscr.cgs | 14 - sim/testsuite/sim/sh64/media/fsqrtd.cgs | 27 - sim/testsuite/sim/sh64/media/fsqrts.cgs | 27 - sim/testsuite/sim/sh64/media/fstd.cgs | 34 - sim/testsuite/sim/sh64/media/fstp.cgs | 14 - sim/testsuite/sim/sh64/media/fsts.cgs | 34 - sim/testsuite/sim/sh64/media/fstxd.cgs | 31 - sim/testsuite/sim/sh64/media/fstxp.cgs | 14 - sim/testsuite/sim/sh64/media/fstxs.cgs | 30 - sim/testsuite/sim/sh64/media/fsubd.cgs | 36 - sim/testsuite/sim/sh64/media/fsubs.cgs | 36 - sim/testsuite/sim/sh64/media/ftrcdl.cgs | 26 - sim/testsuite/sim/sh64/media/ftrcdq.cgs | 24 - sim/testsuite/sim/sh64/media/ftrcsl.cgs | 26 - sim/testsuite/sim/sh64/media/ftrcsq.cgs | 25 - sim/testsuite/sim/sh64/media/ftrvs.cgs | 67 - sim/testsuite/sim/sh64/media/getcfg.cgs | 10 - sim/testsuite/sim/sh64/media/getcon.cgs | 29 - sim/testsuite/sim/sh64/media/gettr.cgs | 48 - sim/testsuite/sim/sh64/media/icbi.cgs | 10 - sim/testsuite/sim/sh64/media/ldb.cgs | 21 - sim/testsuite/sim/sh64/media/ldhil.cgs | 14 - sim/testsuite/sim/sh64/media/ldhiq.cgs | 14 - sim/testsuite/sim/sh64/media/ldl.cgs | 21 - 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4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-defconfig updated (59e7d6ef -> 229adfa0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-defconfig in repository toolchain/ci/base-artifacts. discards 59e7d6ef 0: update: qemu-7b09f127738ae3d0e71716cea086fc8f847a5686: boot new 229adfa0 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (59e7d6ef) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 78 +- 02-prepare_abe/console.log | 438 +- 03-build_abe-binutils/console.log | 11369 +++++----- 04-build_abe-stage1/console.log | 16225 +++++++------- 05-build_linux/console.log | 562 +- 06-build_abe-qemu/console.log | 6691 +++--- 07-boot_linux/console.log | 490 +- 08-check_regression/console.log | 8 +- 08-check_regression/results.regressions | 3 +- 09-update_baseline/console.log | 10 +- 09-update_baseline/results.regressions | 3 +- console.log | 36025 +++++++++++++++--------------- jenkins/manifest.sh | 22 +- 13 files changed, 36707 insertions(+), 35217 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig updated (7b09f12773 -> b3f846c59d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig in repository toolchain/ci/qemu. from 7b09f12773 Merge remote-tracking branch 'remotes/pmaydell/tags/pull-tar [...] adds b115ea3a0d gitlab-ci.yml: Add openSUSE Leap 15.2 for gitlab CI/CD adds 661465c2e0 qtest/libqtest: fix heap-buffer-overflow in qtest_cb_for_eve [...] adds 124bd3e0a8 util/oslib-win32: Fix _aligned_malloc() arguments order adds 22ec0c696f fuzz: accelerate non-crash detection adds 7b339f287f fuzz: double the IOs to remove for every loop adds e72203abec fuzz: split write operand using binary approach adds 247ab240c2 fuzz: remove IO commands iteratively adds 9d20f2af53 fuzz: set bits in operand of write/out to zero adds dd21ed0edf fuzz: add minimization options adds 4cc5752303 fuzz: heuristic split write based on past IOs adds 4d306e59cb bsd-user: regenerate FreeBSD's system call numbers adds ea1ab4cf2c bsd-user: move strace OS/arch dependent code to host/arch dirs adds f6eb4a0841 bsd-user: Update strace.list for FreeBSD's latest syscalls adds 333168efe5 tests/acceptance: Fix race conditions in s390x tests & skip [...] adds b677001d70 fuzz: map all BARs and enable PCI devices adds b3f846c59d Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull- [...] No new revisions were added by this update. Summary of changes: .gitlab-ci.d/containers.yml | 5 + .gitlab-ci.yml | 31 ++ bsd-user/arm/target_arch_sysarch.h | 78 +++ bsd-user/arm/target_syscall.h | 36 ++ bsd-user/{signal.c => freebsd/os-strace.h} | 17 +- bsd-user/freebsd/strace.list | 65 ++- bsd-user/freebsd/syscall_nr.h | 695 ++++++++++++++------------ bsd-user/i386/target_arch_sysarch.h | 77 +++ bsd-user/i386/target_syscall.h | 19 + bsd-user/mips/target_arch_sysarch.h | 69 +++ bsd-user/mips/target_syscall.h | 52 ++ bsd-user/mips64/target_arch_sysarch.h | 69 +++ bsd-user/mips64/target_syscall.h | 53 ++ bsd-user/netbsd/os-strace.h | 1 + bsd-user/openbsd/os-strace.h | 1 + bsd-user/sparc/target_arch_sysarch.h | 52 ++ bsd-user/sparc/target_syscall.h | 24 +- bsd-user/sparc64/target_arch_sysarch.h | 52 ++ bsd-user/sparc64/target_syscall.h | 24 +- bsd-user/strace.c | 11 + bsd-user/x86_64/target_arch_sysarch.h | 76 +++ bsd-user/x86_64/target_syscall.h | 21 +- meson.build | 1 + scripts/oss-fuzz/minimize_qtest_trace.py | 260 ++++++++-- tests/acceptance/machine_s390_ccw_virtio.py | 14 +- tests/docker/dockerfiles/opensuse-leap.docker | 55 ++ tests/qtest/fuzz/generic_fuzz.c | 24 + tests/qtest/libqtest.c | 2 +- util/oslib-win32.c | 2 +- 29 files changed, 1500 insertions(+), 386 deletions(-) create mode 100644 bsd-user/arm/target_arch_sysarch.h create mode 100644 bsd-user/arm/target_syscall.h copy bsd-user/{signal.c => freebsd/os-strace.h} (60%) create mode 100644 bsd-user/i386/target_arch_sysarch.h create mode 100644 bsd-user/mips/target_arch_sysarch.h create mode 100644 bsd-user/mips/target_syscall.h create mode 100644 bsd-user/mips64/target_arch_sysarch.h create mode 100644 bsd-user/mips64/target_syscall.h create mode 100644 bsd-user/netbsd/os-strace.h create mode 100644 bsd-user/openbsd/os-strace.h create mode 100644 bsd-user/sparc/target_arch_sysarch.h create mode 100644 bsd-user/sparc64/target_arch_sysarch.h create mode 100644 bsd-user/x86_64/target_arch_sysarch.h create mode 100644 tests/docker/dockerfiles/opensuse-leap.docker -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

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