Tcwg-commits January 2021

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[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (b3f846c59d -> 45240eed4f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig in repository toolchain/ci/qemu. from b3f846c59d Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull- [...] adds c36c65ea3c target/arm: ARMv8.4-TTST extension adds 078e9fe3cb target/arm: enable Small Translation tables in max CPU adds 9a286bcdfd target/arm: fix typo in cpu.h ID_AA64PFR1 field name adds f6450bcb6b target/arm: make ARMCPU.clidr 64-bit adds a5fd319ae7 target/arm: make ARMCPU.ctr 64-bit adds 2a14526a6f target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_E [...] adds 00a92832f4 target/arm: add aarch64 ID register fields to cpu.h adds bd78b6be24 target/arm: add aarch32 ID register fields to cpu.h adds 8d6fda8c10 ui/cocoa: Update path to docs in build tree adds fa56cf7e86 docs: Add qemu-storage-daemon(1) manpage to meson.build adds e4d51ac692 target/arm: Don't decode insns in the XScale/iWMMXt space as [...] adds e7e29fdbbe hw/net/lan9118: Fix RX Status FIFO PEEK value adds 5cab6d5a5a hw/net/lan9118: Add symbolic constants for register offsets adds bcda710f6c hw/misc: Add clock converter in NPCM7XX CLK module adds 0be12dc76a hw/timer: Refactor NPCM7XX Timer to use CLK clock adds 77c05b0b74 hw/adc: Add an ADC module for NPCM7XX adds 1e943c586a hw/misc: Add a PWM module for NPCM7XX adds 73314f1384 hw/misc: Add QTest for NPCM7XX PWM Module adds 828d651c58 hw/*: Use type casting for SysBusDevice in NPCM7XX adds 1ff5a063d6 ui/cocoa: Fix openFile: deprecation on Big Sur adds f8e1d8852e Merge remote-tracking branch 'remotes/pmaydell/tags/pull-tar [...] adds 2c9dce0196 meson: do not use CONFIG_VIRTFS adds 9102c96821 whpx: rename whp-dispatch to whpx-internal.h adds 84f4ef17ae whpx: move internal definitions to whpx-internal.h adds dc83539872 cirrus/msys2: Exit powershell with $LastExitCode adds 29c7ac489f cirrus/msys2: Cache msys2 mingw in a better way. adds daee8de314 maintainers: Add me as Windows Hosted Continuous Integration [...] adds 9a46d044d8 whpx: move whpx_lapic_state from header to c file adds cb7abd8319 meson: fix Cocoa option in summary adds 4cbf8efc5b scripts/gdb: fix 'qemu coroutine' when users selects a non t [...] adds b9a0de3773 scripts/gdb: implement 'qemu bt' adds d533d6359b Docs/RCU: Correct sample code of qatomic_rcu_set adds 3eacf70bb5 meson: Propagate gnutls dependency adds eb8cb3d9dc virtio-scsi: trace events adds a23a6789c0 cocoa: do not enable coreaudio automatically adds 5cb69566da gtk: remove CONFIG_GTK_GL adds 9d71037f4b configure: move X11 detection to Meson adds 1b6954713f configure: move GTK+ detection to Meson adds c1ec49415c configure: move Cocoa incompatibility checks to Meson adds 835af8990c configure: quote command line arguments in config.status adds c117e5b11a target/i386: Use X86Seg enum for segment registers adds 6b63d12612 Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/fo [...] adds 50186051f4 Introduce yank feature adds fee091cdff block/nbd.c: Add yank feature adds 8ee4480692 chardev/char-socket.c: Add yank feature adds b5eea99ec2 migration: Add yank feature adds e4d2bfb170 io/channel-tls.c: make qio_channel_tls_shutdown thread-safe adds 8659f317d3 io: Document qmp oob suitability of qio_channel_shutdown and [...] adds 91d48e520a tests/test-char.c: Wait for the chardev to connect in char_s [...] adds 45240eed4f Merge remote-tracking branch 'remotes/armbru/tags/pull-yank- [...] No new revisions were added by this update. Summary of changes: .cirrus.yml | 119 +-- MAINTAINERS | 13 + block/meson.build | 2 +- block/nbd.c | 153 ++-- chardev/char-socket.c | 34 + configure | 93 +-- docs/devel/rcu.txt | 2 +- docs/meson.build | 1 + docs/system/arm/nuvoton.rst | 4 +- fsdev/meson.build | 2 +- hw/adc/meson.build | 1 + hw/adc/npcm7xx_adc.c | 301 ++++++++ hw/adc/trace-events | 5 + hw/adc/trace.h | 1 + hw/arm/npcm7xx.c | 55 +- hw/arm/npcm7xx_boards.c | 2 +- hw/mem/npcm7xx_mc.c | 2 +- hw/misc/meson.build | 1 + hw/misc/npcm7xx_clk.c | 797 ++++++++++++++++++++- hw/misc/npcm7xx_gcr.c | 2 +- hw/misc/npcm7xx_pwm.c | 550 ++++++++++++++ hw/misc/npcm7xx_rng.c | 2 +- hw/misc/trace-events | 6 + hw/net/lan9118.c | 26 +- hw/nvram/npcm7xx_otp.c | 2 +- hw/scsi/trace-events | 9 + hw/scsi/virtio-scsi.c | 30 +- hw/ssi/npcm7xx_fiu.c | 2 +- hw/timer/npcm7xx_timer.c | 39 +- include/hw/adc/npcm7xx_adc.h | 69 ++ include/hw/arm/npcm7xx.h | 4 + include/hw/misc/npcm7xx_clk.h | 146 +++- include/hw/misc/npcm7xx_pwm.h | 105 +++ include/hw/timer/npcm7xx_timer.h | 1 + include/io/channel.h | 5 +- include/qemu/yank.h | 97 +++ include/sysemu/whpx.h | 22 +- io/channel-tls.c | 6 +- io/meson.build | 2 +- meson.build | 58 +- meson_options.txt | 2 + migration/channel.c | 13 + migration/migration.c | 22 + migration/multifd.c | 10 + migration/qemu-file-channel.c | 7 + migration/savevm.c | 5 + qapi/meson.build | 1 + qapi/qapi-schema.json | 1 + qapi/yank.json | 119 +++ scripts/qemu-gdb.py | 1 + scripts/qemugdb/coroutine.py | 35 +- storage-daemon/meson.build | 2 +- target/arm/cpu.h | 85 ++- target/arm/cpu64.c | 1 + target/arm/helper.c | 15 +- target/arm/translate.c | 7 + target/i386/cpu.h | 4 +- target/i386/gdbstub.c | 2 +- target/i386/tcg/seg_helper.c | 8 +- target/i386/tcg/translate.c | 6 +- target/i386/whpx/whpx-all.c | 9 +- target/i386/whpx/whpx-apic.c | 9 +- target/i386/whpx/whpx-cpus.c | 4 +- .../i386/whpx/{whp-dispatch.h => whpx-internal.h} | 17 +- tests/meson.build | 6 +- tests/qtest/meson.build | 8 +- tests/qtest/npcm7xx_adc-test.c | 377 ++++++++++ tests/qtest/npcm7xx_pwm-test.c | 490 +++++++++++++ tests/test-char.c | 1 + ui/cocoa.m | 7 +- ui/gtk.c | 16 +- ui/meson.build | 11 +- util/meson.build | 1 + util/yank.c | 207 ++++++ 74 files changed, 3935 insertions(+), 345 deletions(-) create mode 100644 hw/adc/npcm7xx_adc.c create mode 100644 hw/adc/trace-events create mode 100644 hw/adc/trace.h create mode 100644 hw/misc/npcm7xx_pwm.c create mode 100644 include/hw/adc/npcm7xx_adc.h create mode 100644 include/hw/misc/npcm7xx_pwm.h create mode 100644 include/qemu/yank.h create mode 100644 qapi/yank.json rename target/i386/whpx/{whp-dispatch.h => whpx-internal.h} (93%) create mode 100644 tests/qtest/npcm7xx_adc-test.c create mode 100644 tests/qtest/npcm7xx_pwm-test.c create mode 100644 util/yank.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (0b0e7c53418e -> f6c7d64a3e05)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig in repository toolchain/ci/linux. from 0b0e7c53418e Merge v5.10.6 adds d9dea80af65e i40e: Fix Error I40E_AQ_RC_EINVAL when removing VFs adds e2572423ab92 iavf: fix double-release of rtnl_lock adds db8895aa58c7 net/sched: sch_taprio: ensure to reset/destroy all child qdiscs adds 121164dc3314 net: mvpp2: Add TCAM entry to drop flow control pause frames adds cf65734dee5f net: mvpp2: prs: fix PPPoE with ipv6 packet parse adds ca126e9e0345 net: systemport: set dev->max_mtu to UMAC_MAX_MTU_SIZE adds 116395a26d95 ethernet: ucc_geth: fix use-after-free in ucc_geth_remove() adds 15741c05a889 ethernet: ucc_geth: set dev->max_mtu to 1518 adds 0e2dee9a6b26 ionic: account for vlan tag len in rx buffer len adds 8ece401fa3d6 atm: idt77252: call pci_disable_device() on error path adds 04f241fc7eb3 net: mvpp2: Fix GoP port 3 Networking Complex Control conf [...] adds cad75a6bdba6 net: stmmac: dwmac-meson8b: ignore the second clock input adds 0583c8ed2d30 ibmvnic: fix login buffer memory leak adds 933b2ba7f9de ibmvnic: continue fatal error reset after passive init adds c7d068a2d711 net: ethernet: mvneta: Fix error handling in mvneta_probe adds 087cfc73598a qede: fix offload for IPIP tunnel packets adds 23f8bea3e9d9 virtio_net: Fix recursive call to cpus_read_lock() adds 2cdf8c2747d3 net/ncsi: Use real net-device for response handler adds 7eab4e69cb01 net: ethernet: Fix memleak in ethoc_probe adds 4da25d83b7cc net-sysfs: take the rtnl lock when storing xps_cpus adds 0ca897c1ec41 net-sysfs: take the rtnl lock when accessing xps_cpus_map [...] adds 90297553d870 net-sysfs: take the rtnl lock when storing xps_rxqs adds e4535dbb721d net-sysfs: take the rtnl lock when accessing xps_rxqs_map [...] adds 44dc29d44b84 net: ethernet: ti: cpts: fix ethtool output when no ptp_cl [...] adds e3cbce80be89 tun: fix return value when the number of iovs exceeds MAX_ [...] adds 35a44ba54587 e1000e: Only run S0ix flows if shutdown succeeded adds 4e7176129f4f e1000e: bump up timeout to wait when ME un-configures ULP mode adds d0cd009b052e Revert "e1000e: disable s0ix entry and exit flows for ME systems" adds 7c0681c2b681 e1000e: Export S0ix flags to ethtool adds 9b350728118e bnxt_en: Check TQM rings for maximum supported value. adds cdb02a7a9e8d net: mvpp2: fix pkt coalescing int-threshold configuration adds 042c7f35fa61 bnxt_en: Fix AER recovery. adds 5e87eabce7bc ipv4: Ignore ECN bits for fib lookups in fib_compute_spec_dst() adds 7a20969b874e net: sched: prevent invalid Scell_log shift count adds cd63471a4184 net: hns: fix return value check in __lb_other_process() adds 0d6eeee3b9d4 erspan: fix version 1 check in gre_parse_header() adds 8ca1d23e6ad3 net: hdlc_ppp: Fix issues when mod_timer is called while t [...] adds cfcd702d038e bareudp: set NETIF_F_LLTX flag adds cf78c32ac7eb bareudp: Fix use of incorrect min_headroom size adds 0ad31889c481 vhost_net: fix ubuf refcount incorrectly when sendmsg fails adds f62153027b9a r8169: work around power-saving bug on some chip versions adds 495442144c74 net: dsa: lantiq_gswip: Enable GSWIP_MII_CFG_EN also for i [...] adds 143143feae03 net: dsa: lantiq_gswip: Fix GSWIP_MII_CFG(p) register access adds 57dde18a1e60 CDC-NCM: remove "connected" log message adds 063608092aa5 ibmvnic: fix: NULL pointer dereference. adds 7b81c2f8ad8f net: usb: qmi_wwan: add Quectel EM160R-GL adds 22c0b151bca4 selftests: mlxsw: Set headroom size of correct port adds 952264ac96ef stmmac: intel: Add PCI IDs for TGL-H platform adds 2dc3447a043b selftests/vm: fix building protection keys test adds bfb39e6d67a5 block: add debugfs stanza for QUEUE_FLAG_NOWAIT adds dfec7dc891d7 workqueue: Kick a worker based on the actual activation of [...] adds 42b464fb10ff scsi: ufs: Fix wrong print message in dev_err() adds 20e1aec964ea scsi: ufs-pci: Fix restore from S4 for Intel controllers adds 46e435583610 scsi: ufs-pci: Ensure UFS device is in PowerDown mode for [...] adds 3a1be8e3806e scsi: ufs-pci: Fix recovery from hibernate exit errors for [...] adds 4bdd912c724e scsi: ufs-pci: Enable UFSHCD_CAP_RPM_AUTOSUSPEND for Intel [...] adds 8ed46b329d4e scsi: block: Introduce BLK_MQ_REQ_PM adds 2d8b9f991de7 scsi: ide: Do not set the RQF_PREEMPT flag for sense requests adds 60fb6a8d782b scsi: ide: Mark power management requests with RQF_PM inst [...] adds a97d55de10aa scsi: scsi_transport_spi: Set RQF_PM for domain validation [...] adds 271822bbf9fe scsi: core: Only process PM requests if rpm_status != RPM_ACTIVE adds 2179bae04b12 local64.h: make <asm/local64.h> mandatory adds 8532d3ec57e5 lib/genalloc: fix the overflow when size is too big adds 43dee885bead depmod: handle the case of /sbin/depmod without /sbin in PATH adds e5383432d92c scsi: ufs: Clear UAC for FFU and RPMB LUNs adds 3ca425885bb7 kbuild: don't hardcode depmod path adds faa613d033f3 Bluetooth: revert: hci_h5: close serdev device and free hu [...] adds 782c9ef2ac05 scsi: block: Remove RQF_PREEMPT and BLK_MQ_REQ_PREEMPT adds d55d15a332ec scsi: block: Do not accept any requests while suspended adds 3f20005ab271 crypto: ecdh - avoid buffer overflow in ecdh_set_secret() adds 80a364421c95 crypto: asym_tpm: correct zero out potential secrets adds cb5a170e979e powerpc: Handle .text.{hot,unlikely}.* in linker script adds b8c9bb139331 Staging: comedi: Return -EFAULT if copy_to_user() fails adds 22f56c63d50e staging: mt7621-dma: Fix a resource leak in an error handl [...] adds b55debd08b8f usb: gadget: enable super speed plus adds 1452fefc4c29 USB: cdc-acm: blacklist another IR Droid device adds 340db7c0a6c0 USB: cdc-wdm: Fix use after free in service_outstanding_in [...] adds 5a5ce1e75c77 usb: typec: intel_pmc_mux: Configure HPD first for HPD+IRQ [...] adds 906b0510dde5 usb: dwc3: meson-g12a: disable clk on error handling path [...] adds dd8363fbca50 usb: dwc3: gadget: Restart DWC3 gadget when enabling pullup adds 8907a10c8ffa usb: dwc3: gadget: Clear wait flag on dequeue adds b51963e9f562 usb: dwc3: ulpi: Use VStsDone to detect PHY regs access co [...] adds 97abe6663fa3 usb: dwc3: ulpi: Replace CPU-based busyloop with Protocol- [...] adds 150a9c163c3d usb: dwc3: ulpi: Fix USB2.0 HS/FS/LS PHY suspend regression adds 4485bdb99624 usb: chipidea: ci_hdrc_imx: add missing put_device() call [...] adds cee536f1a5c7 USB: xhci: fix U1/U2 handling for hardware with XHCI_INTEL [...] adds 91a6375b1836 usb: usbip: vhci_hcd: protect shift size adds 677503c72765 usb: uas: Add PNY USB Portable SSD to unusual_uas adds 5410726d7def USB: serial: iuu_phoenix: fix DMA from stack adds 3013ff766dad USB: serial: option: add LongSung M5710 module support adds 008689576a4e USB: serial: option: add Quectel EM160R-GL adds 4f7e97ffb4eb USB: yurex: fix control-URB timeout handling adds 0a5b28c99dc4 USB: usblp: fix DMA to stack adds 88eaa6c077f8 ALSA: usb-audio: Fix UBSAN warnings for MIDI jacks adds 2cd6988fbfa5 usb: gadget: select CONFIG_CRC32 adds e7f2c25aa88e USB: Gadget: dummy-hcd: Fix shift-out-of-bounds bug adds c4aa893e2e0d usb: gadget: f_uac2: reset wMaxPacketSize adds e698e1478be7 usb: gadget: function: printer: Fix a memory leak for inte [...] adds 9cc6bf99c64d usb: gadget: u_ether: Fix MTU size mismatch with RX packet size adds c92e6831dc90 USB: gadget: legacy: fix return error code in acm_ms_bind() adds 8ca9626a819c usb: gadget: Fix spinlock lockup on usb_function_deactivate adds ed57b762f51b usb: gadget: configfs: Preserve function ordering after bi [...] adds a4b202cba3ab usb: gadget: configfs: Fix use-after-free issue with udc_name adds 3f47b182241f USB: serial: keyspan_pda: remove unused variable adds 96e6724310f2 hwmon: (amd_energy) fix allocation of hwmon_channel_info config adds 876195e1c8c6 mm: make wait_on_page_writeback() wait for multiple pendin [...] adds 23220e87c91f x86/mm: Fix leak of pmd ptlock adds afd621673f03 KVM: x86/mmu: Use -1 to flag an undefined spte in get_mmio_spte() adds f4064ef40c5c KVM: x86/mmu: Get root level from walkers when retrieving [...] adds ffee6772c489 kvm: check tlbs_dirty directly adds c3cf9ffe8d9c KVM: x86/mmu: Ensure TDP MMU roots are freed after yield adds 34e4ae4dca72 x86/resctrl: Use an IPI instead of task_work_add() to upda [...] adds 397e352ca96f x86/resctrl: Don't move a task to the same resource group adds cafc6e70a63c blk-iocost: fix NULL iocg deref from racing against initia [...] adds c03f37d52934 ALSA: hda/via: Fix runtime PM for Clevo W35xSS adds 2eda063db992 ALSA: hda/conexant: add a new hda codec CX11970 adds 582de98b59fd ALSA: hda/realtek - Fix speaker volume control on Lenovo C940 adds 3e1bcaebe8b1 ALSA: hda/realtek: Add mute LED quirk for more HP laptops adds 41af04d3037a ALSA: hda/realtek: Enable mute and micmute LED on HP Elite [...] adds a07c54917aad ALSA: hda/realtek: Add two "Intel Reference board" SSID in [...] adds 1c31964eca13 iommu/vt-d: Move intel_iommu info from struct intel_svm to [...] adds 1888e5df8449 btrfs: qgroup: don't try to wait flushing if we're already [...] adds 5e84c99055eb btrfs: send: fix wrong file path when there is an inode wi [...] adds 6844bc38c9fe Revert "device property: Keep secondary firmware node seco [...] adds a19dae4254c4 dmabuf: fix use-after-free of dmabuf's file->f_inode adds 1cd7e30a6db6 arm64: link with -z norelro for LLD or aarch64-elf adds 13738d7d5a24 drm/i915: clear the shadow batch adds 36d366ace154 drm/i915: clear the gpu reloc batch adds fbb23cd18755 bcache: fix typo from SUUP to SUPP in features.h adds a9c413cd0cdf bcache: check unsupported feature sets for bcache register adds a3601005de8f bcache: introduce BCH_FEATURE_INCOMPAT_LOG_LARGE_BUCKET_SI [...] adds 00a6b090d5c9 net/mlx5e: Fix SWP offsets when vlan inserted by driver adds 56429ddfd59c ARM: dts: OMAP3: disable AES on N950/N9 adds 27bc60d9678a netfilter: x_tables: Update remaining dereference to RCU adds d17f2ccf6f99 netfilter: ipset: fix shift-out-of-bounds in htable_bits() adds 810bc977f8a4 netfilter: xt_RATEEST: reject non-null terminated string f [...] adds 8b109f4cd1dc netfilter: nft_dynset: report EOPNOTSUPP on missing set feature adds 6e3c67976eda dmaengine: idxd: off by one in cleanup code adds 02ccda90ef7e x86/mtrr: Correct the range check before performing MTRR t [...] adds 563135ec664f KVM: x86: fix shift out of bounds reported by UBSAN adds 0fae7d269ef7 xsk: Fix memory leak for failed bind adds 513729aecb53 rtlwifi: rise completion at the last step of firmware callback adds 6f1e88527c18 scsi: target: Fix XCOPY NAA identifier lookup adds 659361086d8b Linux 5.10.7 adds f6c7d64a3e05 Merge v5.10.7 No new revisions were added by this update. Summary of changes: Makefile | 4 +- arch/alpha/include/asm/local64.h | 1 - arch/arc/include/asm/Kbuild | 1 - arch/arm/boot/dts/omap3-n950-n9.dtsi | 8 ++ arch/arm/include/asm/Kbuild | 1 - arch/arm64/Makefile | 10 +- arch/arm64/include/asm/Kbuild | 1 - arch/csky/include/asm/Kbuild | 1 - arch/h8300/include/asm/Kbuild | 1 - arch/hexagon/include/asm/Kbuild | 1 - arch/ia64/include/asm/local64.h | 1 - arch/m68k/include/asm/Kbuild | 1 - arch/microblaze/include/asm/Kbuild | 1 - arch/mips/include/asm/Kbuild | 1 - arch/nds32/include/asm/Kbuild | 1 - arch/parisc/include/asm/Kbuild | 1 - arch/powerpc/include/asm/Kbuild | 1 - arch/powerpc/kernel/vmlinux.lds.S | 2 +- arch/riscv/include/asm/Kbuild | 1 - arch/s390/include/asm/Kbuild | 1 - arch/sh/include/asm/Kbuild | 1 - arch/sparc/include/asm/Kbuild | 1 - arch/x86/include/asm/local64.h | 1 - arch/x86/kernel/cpu/mtrr/generic.c | 6 +- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 117 +++++++++----------- arch/x86/kvm/mmu.h | 2 +- arch/x86/kvm/mmu/mmu.c | 22 ++-- arch/x86/kvm/mmu/tdp_mmu.c | 111 +++++++++---------- arch/x86/kvm/mmu/tdp_mmu.h | 4 +- arch/x86/mm/pgtable.c | 2 + arch/xtensa/include/asm/Kbuild | 1 - block/blk-core.c | 13 +-- block/blk-iocost.c | 16 ++- block/blk-mq-debugfs.c | 2 +- block/blk-mq.c | 4 +- block/blk-pm.h | 14 ++- crypto/asymmetric_keys/asym_tpm.c | 2 +- crypto/ecdh.c | 3 +- drivers/atm/idt77252.c | 2 +- drivers/base/core.c | 2 +- drivers/bluetooth/hci_h5.c | 8 +- drivers/dma-buf/dma-buf.c | 21 +++- drivers/dma/idxd/sysfs.c | 4 +- drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 4 +- drivers/gpu/drm/i915/i915_cmd_parser.c | 27 ++--- drivers/hwmon/amd_energy.c | 3 +- drivers/ide/ide-atapi.c | 1 - drivers/ide/ide-io.c | 7 +- drivers/ide/ide-pm.c | 2 +- drivers/iommu/intel/svm.c | 9 +- drivers/md/bcache/features.c | 2 +- drivers/md/bcache/features.h | 30 +++++- drivers/md/bcache/super.c | 36 ++++++- drivers/net/bareudp.c | 3 +- drivers/net/dsa/lantiq_gswip.c | 27 ++--- drivers/net/ethernet/broadcom/bcmsysport.c | 1 + drivers/net/ethernet/broadcom/bnxt/bnxt.c | 38 +++---- drivers/net/ethernet/broadcom/bnxt/bnxt.h | 7 +- drivers/net/ethernet/ethoc.c | 3 +- drivers/net/ethernet/freescale/ucc_geth.c | 3 +- drivers/net/ethernet/hisilicon/hns/hns_ethtool.c | 4 + drivers/net/ethernet/ibm/ibmvnic.c | 10 +- drivers/net/ethernet/intel/e1000e/e1000.h | 1 + drivers/net/ethernet/intel/e1000e/ethtool.c | 46 ++++++++ drivers/net/ethernet/intel/e1000e/ich8lan.c | 17 ++- drivers/net/ethernet/intel/e1000e/netdev.c | 59 ++-------- drivers/net/ethernet/intel/i40e/i40e.h | 3 + drivers/net/ethernet/intel/i40e/i40e_main.c | 10 ++ drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c | 4 +- drivers/net/ethernet/intel/iavf/iavf_main.c | 4 +- drivers/net/ethernet/marvell/mvneta.c | 2 +- drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 13 +-- drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c | 38 ++++++- drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.h | 2 +- drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h | 9 ++ .../mellanox/mlx5/core/en_accel/en_accel.h | 8 +- drivers/net/ethernet/mellanox/mlx5/core/en_tx.c | 9 +- drivers/net/ethernet/pensando/ionic/ionic_txrx.c | 2 +- drivers/net/ethernet/qlogic/qede/qede_fp.c | 5 + drivers/net/ethernet/realtek/r8169_main.c | 6 +- drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c | 4 + .../net/ethernet/stmicro/stmmac/dwmac-meson8b.c | 2 +- drivers/net/ethernet/ti/cpts.c | 2 + drivers/net/tun.c | 2 +- drivers/net/usb/cdc_ncm.c | 3 - drivers/net/usb/qmi_wwan.c | 1 + drivers/net/virtio_net.c | 12 ++- drivers/net/wan/hdlc_ppp.c | 7 ++ drivers/net/wireless/realtek/rtlwifi/core.c | 8 +- drivers/scsi/scsi_lib.c | 27 ++--- drivers/scsi/scsi_transport_spi.c | 27 +++-- drivers/scsi/ufs/ufshcd-pci.c | 73 ++++++++++++- drivers/scsi/ufs/ufshcd.c | 72 +++++++++++-- drivers/scsi/ufs/ufshcd.h | 1 + drivers/staging/comedi/comedi_fops.c | 4 +- drivers/staging/mt7621-dma/mtk-hsdma.c | 4 +- drivers/target/target_core_xcopy.c | 119 ++++++++++++--------- drivers/target/target_core_xcopy.h | 1 + drivers/usb/chipidea/ci_hdrc_imx.c | 6 +- drivers/usb/class/cdc-acm.c | 4 + drivers/usb/class/cdc-wdm.c | 16 ++- drivers/usb/class/usblp.c | 21 +++- drivers/usb/dwc3/core.h | 1 + drivers/usb/dwc3/dwc3-meson-g12a.c | 2 +- drivers/usb/dwc3/gadget.c | 16 +-- drivers/usb/dwc3/ulpi.c | 38 ++++--- drivers/usb/gadget/Kconfig | 2 + drivers/usb/gadget/composite.c | 10 +- drivers/usb/gadget/configfs.c | 19 ++-- drivers/usb/gadget/function/f_printer.c | 1 + drivers/usb/gadget/function/f_uac2.c | 69 +++++++++--- drivers/usb/gadget/function/u_ether.c | 9 +- drivers/usb/gadget/legacy/acm_ms.c | 4 +- drivers/usb/gadget/udc/dummy_hcd.c | 35 +++--- drivers/usb/host/xhci.c | 24 ++--- drivers/usb/misc/yurex.c | 3 + drivers/usb/serial/iuu_phoenix.c | 20 +++- drivers/usb/serial/keyspan_pda.c | 2 - drivers/usb/serial/option.c | 3 + drivers/usb/storage/unusual_uas.h | 7 ++ drivers/usb/typec/mux/intel_pmc_mux.c | 11 ++ drivers/usb/usbip/vhci_hcd.c | 2 + drivers/vhost/net.c | 6 +- fs/btrfs/qgroup.c | 30 ++++-- fs/btrfs/send.c | 49 +++++---- include/asm-generic/Kbuild | 1 + include/linux/blk-mq.h | 4 +- include/linux/blkdev.h | 18 +++- include/linux/intel-iommu.h | 2 +- include/net/red.h | 4 +- include/uapi/linux/bcache.h | 2 +- kernel/workqueue.c | 13 ++- lib/genalloc.c | 25 ++--- mm/page-writeback.c | 2 +- net/core/net-sysfs.c | 65 ++++++++--- net/ipv4/fib_frontend.c | 2 +- net/ipv4/gre_demux.c | 2 +- net/ipv4/netfilter/arp_tables.c | 2 +- net/ipv4/netfilter/ip_tables.c | 2 +- net/ipv6/netfilter/ip6_tables.c | 2 +- net/ncsi/ncsi-rsp.c | 2 +- net/netfilter/ipset/ip_set_hash_gen.h | 20 +--- net/netfilter/nft_dynset.c | 6 +- net/netfilter/xt_RATEEST.c | 3 + net/sched/sch_choke.c | 2 +- net/sched/sch_gred.c | 2 +- net/sched/sch_red.c | 2 +- net/sched/sch_sfq.c | 2 +- net/sched/sch_taprio.c | 7 +- net/xdp/xsk.c | 4 + net/xdp/xsk_buff_pool.c | 2 - scripts/depmod.sh | 2 + sound/pci/hda/hda_intel.c | 2 - sound/pci/hda/patch_conexant.c | 1 + sound/pci/hda/patch_realtek.c | 10 ++ sound/pci/hda/patch_via.c | 13 +++ sound/usb/midi.c | 4 + .../testing/selftests/drivers/net/mlxsw/qos_pfc.sh | 2 +- tools/testing/selftests/vm/Makefile | 10 +- virt/kvm/kvm_main.c | 3 +- 160 files changed, 1211 insertions(+), 667 deletions(-) delete mode 100644 arch/alpha/include/asm/local64.h delete mode 100644 arch/ia64/include/asm/local64.h delete mode 100644 arch/x86/include/asm/local64.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allnoconfig updated (348471575d9 -> 14f322f074b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allnoconfig in repository toolchain/ci/llvm-project. from 348471575d9 Add -ansi option to CompileOnly group adds b117d17d264 [doc] Place sha256 in lld/README.md into backticks adds ef3800e8216 Return false from __has_declspec_attribute() if not explici [...] adds 5aefc8dc4d1 [llvm] [cmake] Remove obsolete /usr/local hack for *BSD adds bb9ebf6baf7 [Tests] Add tests for new InstCombine OR transformation, NFC adds 0529946b5ba [instCombine] Add (A ^ B) | ~(A | B) -> ~(A & B) adds 6f4d4607620 [Flang][openmp][openacc] Extend CheckNoBranching to handle [...] adds 03c8d6a0c4b [LegalizeDAG][RISCV][PowerPC][AMDGPU][WebAssembly] Improve [...] adds 4718ec01669 [clangd] Avoid recursion in TargetFinder::add() adds f748e922955 [NewPM] Run non-trivial loop unswitching under -O2/3/s/z adds a14040bd4d9 [RISCV] Use vmerge.vim for llvm.riscv.vfmerge with a 0.0 sc [...] adds 08d4a50467e [FunctionAttrs] Precommit tests for willreturn inference. adds eef4bdbb34d [libc++] Add a missing `<_Compare>` template argument. adds 79f99ba65d9 [libcxx] Port to OpenBSD adds 7ecad2e4ced [InstSimplify] Don't fold gep p, -p to null adds bdd1ad5e5c5 [OpenMP] Fixed include directories for OpenMP when building [...] adds 33e2494bea6 [libomptarget][amdgpu][nfc] Fix build on centos adds e5f51fdd650 [clang][aarch64] Precondition isHomogeneousAggregate on isC [...] adds 6cd44b204c6 [FunctionAttrs] Derive willreturn for fns with readonly` & [...] adds e53bbd99516 [IR] move nomerge attribute from function declaration/defin [...] adds 922a5b89411 [clang-tidy] Add test for Transformer-based checks with dia [...] adds d49974f9c98 [InstCombine] Regenerate test checks (NFC) adds 9f61fbd75ae [LV] Relax assumption that LCSSA implies single entry adds f706486eaf0 Fix for crash in __builtin_return_address in template context. adds fb063c933f0 [InstCombine] Duplicate tests for logical and/or (NFC) adds caafdf07bbc [LV] Weaken spuriously strong assert in LoopVersioning adds 46507a96fc1 [SLP] reduce code duplication while matching reductions; NFC adds 554be30a428 [SLP] reduce code duplication in processing reductions; NFC adds 92fb5c49e8a [SLP] rename variable to improve readability; NFC adds 9e7895a8682 [SLP] reduce code duplication while processing reductions; NFC adds 7583ae48a3c [RISCV] Add double test cases to vfmerge-rv32.ll. NFC adds e15f3ddcae6 [InstCombine] Add tests for logical and/or poison implicati [...] adds 71ed4b6ce57 [RISCV] Legalize select when Zbt extension available adds 23390e7a131 [InstCombine] Handle logical and/or in assume optimization adds 7fd18508134 [mlir] Update LLVM dialect type documentation adds 2a49b7c64a3 [Inliner] Change inline remark format and update ReplayInli [...] adds 68ff52ffead [OpenMP] Fixed the link error that cannot find static data member adds d1fa7afc7ae [AArch64] [Windows] Properly add :lo12: reloc specifiers wh [...] adds 02f1d28ed6b [libcxx] Avoid overflows in the windows __libcpp_steady_clo [...] adds 01f1273fe2f [OpenMP] Fixed a typo in openmp/CMakeLists.txt adds 3d397091591 AMDGPU: Remove wrapper only call limitation adds cf45731f0ea [Driver] Fix assertion failure when -fprofile-generate -fcs [...] adds 55f2eeebc96 [NFC] Disallow unused prefixes in MC/AMDGPU adds a7130d85e4b [ADT][NFC] Use empty base optimisation in BumpPtrAllocatorImpl adds 1730b0f66ad [RISCV] Remove '.mask' from vcompress intrinsic name. NFC adds 6166b91e837 [ELF][NFCI] small cleanup to OutputSections.h adds 175288a1afe Add sample-profile-suffix-elision-policy attribute with -fu [...] adds ddcb0aae8b0 [MIPatternMatch] Add matcher for G_PTR_ADD adds 8f5ec459375 [Sanitizer][Darwin] Fix test for macOS 11+ point releases adds 585612355cd [NFC] Disallow unused prefixes under MC/AMDGPU adds 0d88d7d82bc Delete unused function (was breaking the -Werror build) adds 314e29ed2b7 [AMDGPU] Add _e64 suffix to VOP3 Insts adds 04edcc02638 [libc] add isascii and toascii implementations adds 0c8466c0015 [libc][NFC] Use more specific comparison macros in LdExpTest.h. adds 76643c48cdd [LangRef] State that a nocapture pointer cannot be returned adds 25eb7b08ba7 [DAGCombiner] Fold BRCOND(FREEZE(COND)) to BRCOND(COND) adds 82655c15145 [MSan] Tweak CopyOrigin adds 25b3921f2fc [gn build] (manually) port 79f99ba65d96 adds c0f3ea8a08c [mlir][Python] Add checking process before create an Affine [...] adds 055644cc459 [X86][AMX] Prohibit pointer cast on load. adds 5c7dcd7aead [Coroutine] Update promise object's final layout index adds 6529d7c5a45 [PDB] Defer relocating .debug$S until commit time and paral [...] adds 6f0f0220380 [OpenMP] Update allocator trait key/value definitions adds acea470c167 [gn build] Reorganize libcxx/include/BUILD.gn a bit adds 0066a09579c [libc++] Give extern templates default visibility on gcc adds bba3a82b56c [OpenMP] Use persistent memory for omp_large_cap_mem adds 914e2f5a02f [NFC] Use generic name for scalable vector stack ID. adds e5553b9a6ab [dsymutil] Warn on timestmap mismatch between object file a [...] adds cd8a80de960 [Orc] Add a unit test for asynchronous definition generation. adds f454c9f102a [InlineSpiller] Re-tie operands if folding failed adds 8a47d875b07 [dsymutil] Copy eh_frame content into the dSYM companion file. adds 84e0b14a0a4 [libomptarget][nvptx] Include omp_data.cu in bitcode deviceRTL adds ad735badb69 [dsymutil] s/dwarfdump/llvm-dwarfdump/ in test adds 35e4998f0c9 [dsymutil] Fix spurious space in REQUIRES: line adds 790c75c1637 [AMDGPU] Add SI_EARLY_TERMINATE_SCC0 for early terminating shader adds 157efd84abf [Statepoint Lowering] Add an option to allow use gc values [...] adds fba9805ba34 [Verifier] Extend statepoint verifier to cover more constants adds 12fc9ca3a40 [llvm] Remove redundant string initialization (NFC) adds 2c2d489b78c [CodeGen] Remove unused function isRegLiveInExitBlocks (NFC) adds 8a20e2b3d3e [llvm] Use Optional::getValueOr (NFC) adds f1d5cbbdee5 [dsymutil] Add preliminary support for DWARF 5. adds 0b99385e151 [MSan] Partially revert some changes from D94552 adds 8f8c207b8f2 [Verifier] Add tied-ness verification to statepoint intsruction adds 3aeb30d1a68 [ARM] Additional tests for different interleaving patterns. NFC adds 141906fa149 [llvm-readelf/obj] - Add support of multiple SHT_SYMTAB_SHN [...] adds c29ca8551af [ARM] Update isVMOVNOriginalMask to handle single input shu [...] adds 6d3098e7ff9 [obj2yaml,yaml2obj] - Refine how we set/dump the sh_entsize field. adds cbea6737d51 [clang][driver] Restore the original help text for `-I` adds f638c2eb4ee [LTO] Replace anonymous namespace with static functions (NFC). adds 4cd48535eca [NFC][InstructionCost] Use InstructionCost in Transforms/Sc [...] adds 3122c66aee7 [AArch64][SVE] Remove chains of unnecessary SVE reinterpret [...] adds 0f59d099571 [X86][AVX] combineVectorSignBitsTruncation - limit AVX512 t [...] adds ad85e396706 [SVE] Add ISel pattern for addvl adds 1854594b80b Hwasan InitPrctl check for error using internal_iserror adds ceb9379a90f [ADT] Fix join_impl using the wrong size when calculating t [...] adds ada96fa6217 [LTO] Add test to ensure objc-arc-contract is executed. adds af1bb4bc823 Fix build errors after ceb9379a9 adds c6e341c8995 Revert "[dsymutil] Warn on timestmap mismatch between objec [...] adds 2170e0ee60d [SVE][CodeGen] CTLZ, CTTZ & CTPOP operations (predicates) adds f8cece18630 [ValueTracking] Fix one s/dyn_cast/dyn_cast_or_null/ adds 704831fe1f1 Revert "Hwasan InitPrctl check for error using internal_iserror" adds d307d892ade [Tests] Added test for memcpy loop idiom recognization adds 0a0ee7f5a5a [X86] canonicalizeShuffleMaskWithHorizOp - minor refactor t [...] adds ab577807165 [libc] Refresh benchmark progress bar when needed. adds 7c77b536efd [OpenCL] Improve OpenCL operator tests adds b7b1e8c37a9 [X86] Add tests for rv_marker lowering. adds 3bc7555ffac [mlir][linalg] Use attributes in named ops' indexing maps adds 90164ba957a [clangd] Split out a base class for delegating GlobalCompil [...] adds dda60035e9f [AArch64] Attempt to sink mul operands adds d55d592a921 GlobalISel: Do not set observer of MachineIRBuilder in Lega [...] adds 350c0552c66 [NFC][RISCV] Add double type in RISC-V V CodeGen test cases [...] adds 4e8e888905a [AArch64][GlobalISel] Add support for FCONSTANT of FP128 type adds 07b6aeb5685 [lld][WebAssembly] Fix for TLS + --relocatable adds f0abe2aeaca [Frontend] Add pragma align natural and sort out pragma pac [...] adds a957634942a [OpenMP] Add documentation for error messages and release notes adds 4fe17ada55a [OpenMP] Fix hierarchical barrier adds 66d5994bd38 [clangd] Explicitly avoid background-indexing the same file twice. adds 466acd69486 [clangd] Avoid reallocating buffers for each message read: adds e433ca28ec9 [SLP] add reduction test for FMF; NFC adds 17863614da1 [InstCombine] Fold select -> and/or using impliesPoison adds a4f38668823 [clangd] Remove "decision-forest-base" experimental flag. adds 0bbc6a6bb64 [clangd] Remove some old CodeCompletion options that are ne [...] adds 05b1a15f703 [IROutliner] Adapting to hoisted bitcasts in CodeExtractor adds 48d2068fb73 [dsymutil] Warn on timestmap mismatch between object file a [...] adds cbbfc825861 [X86][SSE] canonicalizeShuffleMaskWithHorizOp - simplify sh [...] adds efb6e45d2be [X86][AVX] Add test for another 'reverse HADD' pattern ment [...] adds 993c488ed2b [DAG] visitVECTOR_SHUFFLE - use all_of to check for all-und [...] adds 60fda8ebb6d [ARM] Add a pass that re-arranges blocks when there is a ba [...] adds 14f322f074b [gn build] Port 60fda8ebb6d No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/CodeComplete.cpp | 9 +- clang-tools-extra/clangd/CodeComplete.h | 11 - clang-tools-extra/clangd/FindTarget.cpp | 10 + clang-tools-extra/clangd/FindTarget.h | 3 + .../clangd/GlobalCompilationDatabase.cpp | 52 +- .../clangd/GlobalCompilationDatabase.h | 26 +- clang-tools-extra/clangd/JSONTransport.cpp | 56 +- clang-tools-extra/clangd/QueryDriverDatabase.cpp | 21 +- clang-tools-extra/clangd/index/Background.cpp | 7 +- clang-tools-extra/clangd/index/Background.h | 4 + clang-tools-extra/clangd/index/BackgroundQueue.cpp | 26 +- clang-tools-extra/clangd/tool/ClangdMain.cpp | 9 - .../clangd/unittests/BackgroundIndexTests.cpp | 76 +- .../clangd/unittests/CodeCompleteTests.cpp | 12 +- .../clangd/unittests/FindTargetTests.cpp | 41 + .../clang-tidy/TransformerClangTidyCheckTest.cpp | 38 +- clang/docs/ClangCommandLineReference.rst | 7 +- clang/include/clang/Basic/Attr.td | 7 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 4 + clang/include/clang/Basic/LangOptions.def | 2 + clang/include/clang/Driver/Options.td | 16 +- clang/include/clang/Sema/Sema.h | 116 +- clang/include/clang/Serialization/ASTReader.h | 10 +- clang/include/clang/Serialization/ASTWriter.h | 5 + clang/lib/AST/RecordLayoutBuilder.cpp | 21 +- clang/lib/CodeGen/CGCXXABI.h | 7 + clang/lib/CodeGen/CGCall.cpp | 16 +- clang/lib/CodeGen/CodeGenModule.cpp | 3 - clang/lib/CodeGen/MicrosoftCXXABI.cpp | 16 +- clang/lib/CodeGen/TargetInfo.cpp | 6 +- clang/lib/Driver/ToolChains/Clang.cpp | 8 +- clang/lib/Frontend/CompilerInvocation.cpp | 1 + clang/lib/Lex/PPMacroExpansion.cpp | 10 +- clang/lib/Parse/ParsePragma.cpp | 29 +- clang/lib/Sema/Sema.cpp | 3 +- clang/lib/Sema/SemaAttr.cpp | 151 +- clang/lib/Sema/SemaChecking.cpp | 3 +- clang/lib/Serialization/ASTReader.cpp | 11 +- clang/lib/Serialization/ASTWriter.cpp | 10 +- clang/test/CodeGen/attr-nomerge.cpp | 54 +- clang/test/CodeGenCXX/homogeneous-aggregates.cpp | 69 + clang/test/Driver/aix-pragma-pack.c | 4 + clang/test/Driver/fcs-profile-generate.c | 15 + .../optimization-remark-with-hotness-new-pm.c | 2 +- .../Frontend/optimization-remark-with-hotness.c | 2 +- clang/test/Layout/aix-double-struct-member.cpp | 9 +- .../test/Layout/aix-power-natural-interaction.cpp | 146 ++ clang/test/PCH/aix-pragma-pack.c | 119 ++ clang/test/Sema/aix-pragma-pack-and-align.c | 229 +++ clang/test/Sema/builtin-returnaddress.c | 12 + clang/test/SemaOpenCL/invalid-vector-literals.cl | 1 - .../SemaOpenCL/{logical-ops.cl => operators.cl} | 6 + clang/test/SemaOpenCL/vector_inc_dec_ops.cl | 9 +- compiler-rt/lib/msan/msan_poisoning.cpp | 2 +- .../sanitizer_common/tests/sanitizer_mac_test.cpp | 18 +- flang/lib/Semantics/check-directive-structure.h | 15 +- flang/lib/Semantics/check-omp-structure.cpp | 9 +- flang/test/Semantics/omp-parallell01.f90 | 3 +- libc/benchmarks/LibcMemoryBenchmarkMain.cpp | 11 +- libc/config/linux/aarch64/entrypoints.txt | 2 + libc/config/linux/x86_64/entrypoints.txt | 2 + libc/spec/gnu_ext.td | 19 +- libc/spec/posix.td | 15 + libc/src/ctype/CMakeLists.txt | 16 + libc/src/ctype/isascii.cpp | 17 + libc/src/ctype/isascii.h | 18 + libc/src/ctype/toascii.cpp | 17 + libc/src/ctype/toascii.h | 18 + libc/test/src/ctype/CMakeLists.txt | 20 + libc/test/src/ctype/isascii_test.cpp | 23 + libc/test/src/ctype/toascii_test.cpp | 24 + libc/test/src/math/LdExpTest.h | 4 +- libcxx/docs/DesignDocs/VisibilityMacros.rst | 6 - libcxx/include/CMakeLists.txt | 1 + libcxx/include/__config | 17 +- libcxx/include/__locale | 2 + libcxx/include/algorithm | 7 +- libcxx/include/support/openbsd/xlocale.h | 19 + libcxx/src/chrono.cpp | 5 +- .../time/time.clock/time.clock.steady/now.pass.cpp | 2 + lld/COFF/Chunks.cpp | 113 +- lld/COFF/Chunks.h | 10 + lld/COFF/PDB.cpp | 643 ++++--- lld/ELF/OutputSections.h | 6 - lld/README.md | 2 +- lld/test/wasm/tls-no-shared.s | 2 +- lld/test/wasm/tls.s | 33 +- lld/wasm/Driver.cpp | 2 +- lld/wasm/InputFiles.cpp | 1 + lld/wasm/Writer.cpp | 2 +- llvm/CMakeLists.txt | 7 - llvm/docs/LangRef.rst | 3 +- llvm/include/llvm/ADT/StringExtras.h | 5 +- llvm/include/llvm/Analysis/InlineAdvisor.h | 19 + llvm/include/llvm/Analysis/ReplayInlineAdvisor.h | 3 +- .../GlobalISel/LegalizationArtifactCombiner.h | 4 +- .../llvm/CodeGen/GlobalISel/MIPatternMatch.h | 6 + .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 5 + llvm/include/llvm/CodeGen/ISDOpcodes.h | 9 +- llvm/include/llvm/CodeGen/MIRYamlMapping.h | 2 +- llvm/include/llvm/CodeGen/MachineLoopUtils.h | 4 - llvm/include/llvm/CodeGen/StackMaps.h | 9 + llvm/include/llvm/CodeGen/TargetFrameLowering.h | 2 +- llvm/include/llvm/DWARFLinker/DWARFLinker.h | 6 +- .../llvm/DWARFLinker/DWARFLinkerCompileUnit.h | 2 +- llvm/include/llvm/DWARFLinker/DWARFStreamer.h | 2 +- .../PDB/Native/DbiModuleDescriptorBuilder.h | 63 +- llvm/include/llvm/ExecutionEngine/Orc/Core.h | 3 + llvm/include/llvm/IR/Function.h | 4 + llvm/include/llvm/IR/IntrinsicsRISCV.td | 2 +- llvm/include/llvm/LTO/Config.h | 6 +- llvm/include/llvm/Object/ELF.h | 60 +- llvm/include/llvm/ObjectYAML/ELFYAML.h | 34 + llvm/include/llvm/Support/Allocator.h | 25 +- llvm/lib/Analysis/CallPrinter.cpp | 2 +- llvm/lib/Analysis/ConstraintSystem.cpp | 2 +- llvm/lib/Analysis/InlineAdvisor.cpp | 63 +- llvm/lib/Analysis/InstructionSimplify.cpp | 24 +- llvm/lib/Analysis/ReplayInlineAdvisor.cpp | 41 +- llvm/lib/Analysis/ValueTracking.cpp | 2 +- llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp | 2 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 9 +- llvm/lib/CodeGen/InlineSpiller.cpp | 27 +- llvm/lib/CodeGen/MachineLoopUtils.cpp | 11 - llvm/lib/CodeGen/MachineVerifier.cpp | 23 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 13 +- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 19 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 9 + .../CodeGen/SelectionDAG/StatepointLowering.cpp | 21 +- llvm/lib/CodeGen/StackMaps.cpp | 61 +- llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 2 +- llvm/lib/DWARFLinker/DWARFLinker.cpp | 45 +- llvm/lib/DWARFLinker/DWARFLinkerCompileUnit.cpp | 6 +- llvm/lib/DWARFLinker/DWARFStreamer.cpp | 50 +- .../PDB/Native/DbiModuleDescriptorBuilder.cpp | 81 +- llvm/lib/DebugInfo/PDB/Native/DbiStreamBuilder.cpp | 10 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 5 +- .../RuntimeDyld/RuntimeDyldChecker.cpp | 4 +- llvm/lib/LTO/LTOBackend.cpp | 31 +- llvm/lib/ObjectYAML/ELFEmitter.cpp | 46 +- llvm/lib/Passes/PassBuilder.cpp | 2 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 12 +- llvm/lib/Target/AArch64/AArch64FrameLowering.h | 4 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 39 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 20 +- llvm/lib/Target/AArch64/AArch64MCInstLower.cpp | 6 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 3 + .../AArch64/GISel/AArch64InstructionSelector.cpp | 17 +- .../Target/AArch64/GISel/AArch64LegalizerInfo.cpp | 4 +- llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp | 50 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 6 +- llvm/lib/Target/AMDGPU/AMDGPUInline.cpp | 23 - .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 60 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 18 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 18 +- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 34 +- llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 2 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 22 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 2 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 8 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 66 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 90 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 130 +- llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 6 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 8 +- llvm/lib/Target/AMDGPU/SISchedule.td | 2 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 6 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 533 +++--- llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 66 +- llvm/lib/Target/ARC/ARCTargetMachine.cpp | 4 +- llvm/lib/Target/ARM/ARM.h | 2 + llvm/lib/Target/ARM/ARMBlockPlacement.cpp | 227 +++ llvm/lib/Target/ARM/ARMISelLowering.cpp | 25 +- llvm/lib/Target/ARM/ARMTargetMachine.cpp | 3 + llvm/lib/Target/ARM/CMakeLists.txt | 1 + llvm/lib/Target/AVR/AVRTargetMachine.cpp | 2 +- llvm/lib/Target/BPF/BPFTargetMachine.cpp | 4 +- llvm/lib/Target/CSKY/CSKYTargetMachine.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 4 +- llvm/lib/Target/Lanai/LanaiTargetMachine.cpp | 4 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 11 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.h | 2 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 4 +- llvm/lib/Target/RISCV/RISCVInstrInfoB.td | 18 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 14 +- llvm/lib/Target/Sparc/SparcTargetMachine.cpp | 4 +- llvm/lib/Target/VE/VETargetMachine.cpp | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 75 +- llvm/lib/Target/XCore/XCoreTargetMachine.cpp | 4 +- llvm/lib/Transforms/Coroutines/CoroFrame.cpp | 16 +- llvm/lib/Transforms/IPO/Attributor.cpp | 2 +- llvm/lib/Transforms/IPO/FunctionAttrs.cpp | 18 + llvm/lib/Transforms/IPO/IROutliner.cpp | 19 +- llvm/lib/Transforms/IPO/SampleProfile.cpp | 2 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 8 + .../Transforms/InstCombine/InstCombineCalls.cpp | 4 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 18 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 6 +- .../Transforms/Scalar/LowerMatrixIntrinsics.cpp | 2 +- .../Transforms/Scalar/RewriteStatepointsForGC.cpp | 8 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 3 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 3 +- llvm/lib/Transforms/Utils/LoopVersioning.cpp | 2 +- .../Utils/UniqueInternalLinkageNames.cpp | 1 + .../Vectorize/LoopVectorizationLegality.cpp | 20 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 79 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 65 +- .../CodeGen/AArch64/GlobalISel/arm64-fallback.ll | 7 - .../GlobalISel/legalize-ext-csedebug-output.mir | 3 - .../GlobalISel/legalize-fp128-fconstant.mir | 22 + .../CodeGen/AArch64/aarch64-matrix-umull-smull.ll | 186 ++ llvm/test/CodeGen/AArch64/arm64-windows-calls.ll | 77 + llvm/test/CodeGen/AArch64/cfguard-checks.ll | 14 +- .../CodeGen/AArch64/debug-info-sve-dbg-declare.mir | 16 +- .../CodeGen/AArch64/debug-info-sve-dbg-value.mir | 8 +- llvm/test/CodeGen/AArch64/dllimport.ll | 12 +- .../AArch64/framelayout-sve-basepointer.mir | 2 +- .../AArch64/framelayout-sve-calleesaves-fix.mir | 2 +- .../AArch64/framelayout-sve-scavengingslot.mir | 2 +- llvm/test/CodeGen/AArch64/framelayout-sve.mir | 68 +- llvm/test/CodeGen/AArch64/live-debugvalues-sve.mir | 2 +- llvm/test/CodeGen/AArch64/mingw-refptr.ll | 14 +- llvm/test/CodeGen/AArch64/spillfill-sve.mir | 10 +- llvm/test/CodeGen/AArch64/split-vector-insert.ll | 12 +- .../test/CodeGen/AArch64/stack-protector-target.ll | 2 +- llvm/test/CodeGen/AArch64/sve-alloca-stackid.ll | 4 +- llvm/test/CodeGen/AArch64/sve-bit-counting-pred.ll | 141 ++ .../AArch64/sve-calling-convention-byref.ll | 12 +- llvm/test/CodeGen/AArch64/sve-gep.ll | 3 +- .../AArch64/sve-intrinsic-opts-reinterpret.ll | 56 + .../CodeGen/AArch64/sve-intrinsics-loads-nf.ll | 6 +- .../AArch64/sve-ld1-addressing-mode-reg-imm.ll | 6 +- llvm/test/CodeGen/AArch64/sve-localstackalloc.mir | 2 +- ...pred-contiguous-ldst-addressing-mode-reg-imm.ll | 6 +- ...ed-non-temporal-ldst-addressing-mode-reg-imm.ll | 6 +- .../AArch64/sve-st1-addressing-mode-reg-imm.ll | 6 +- llvm/test/CodeGen/AArch64/win-tls.ll | 6 +- llvm/test/CodeGen/AArch64/win_cst_pool.ll | 4 +- llvm/test/CodeGen/AArch64/windows-extern-weak.ll | 2 +- .../AMDGPU/GlobalISel/inst-select-add.s16.mir | 8 +- .../GlobalISel/inst-select-amdgcn.fmad.ftz.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.mir | 32 +- .../GlobalISel/inst-select-amdgcn.fmed3.s16.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir | 60 +- .../AMDGPU/GlobalISel/inst-select-ashr.s16.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-bswap.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fadd.s64.mir | 22 +- .../GlobalISel/inst-select-fcanonicalize.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-fma.s32.mir | 24 +- .../AMDGPU/GlobalISel/inst-select-fmad.s32.mir | 40 +- .../AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fmaxnum.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fminnum.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir | 6 +- .../AMDGPU/GlobalISel/inst-select-fract.f64.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir | 60 +- .../AMDGPU/GlobalISel/inst-select-lshr.s16.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-mul.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-pattern-add3.mir | 8 +- .../GlobalISel/inst-select-pattern-and-or.mir | 16 +- .../AMDGPU/GlobalISel/inst-select-pattern-or3.mir | 8 +- .../GlobalISel/inst-select-pattern-smed3.mir | 4 +- .../GlobalISel/inst-select-pattern-smed3.s16.mir | 4 +- .../GlobalISel/inst-select-pattern-umed3.mir | 4 +- .../GlobalISel/inst-select-pattern-umed3.s16.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-pattern-xor3.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-sext-inreg.mir | 20 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir | 8 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir | 60 +- .../AMDGPU/GlobalISel/inst-select-shl.s16.mir | 4 +- .../inst-select-shuffle-vector.v2s16.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-smulh.mir | 24 +- .../AMDGPU/GlobalISel/inst-select-umulh.mir | 24 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir | 4 +- .../GlobalISel/llvm.amdgcn.raw.buffer.load.ll | 4 +- .../GlobalISel/llvm.amdgcn.struct.buffer.load.ll | 8 +- llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir | 430 ++--- llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll | 4 +- .../CodeGen/AMDGPU/clamp-omod-special-case.mir | 12 +- ...coalescer-subranges-another-copymi-not-live.mir | 2 +- .../coalescer-subranges-another-prune-error.mir | 2 +- .../AMDGPU/coalescer-subregjoin-fullcopy.mir | 10 +- .../coalescer-with-subregs-bad-identical.mir | 16 +- .../CodeGen/AMDGPU/constant-fold-imm-immreg.mir | 10 +- .../CodeGen/AMDGPU/couldnt-join-subrange-3.mir | 16 +- .../CodeGen/AMDGPU/debug-value-scheduler-crash.mir | 12 +- llvm/test/CodeGen/AMDGPU/early-term.mir | 268 +++ llvm/test/CodeGen/AMDGPU/fdiv-nofpexcept.ll | 36 +- .../CodeGen/AMDGPU/fold-immediate-output-mods.mir | 16 +- llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir | 2 +- llvm/test/CodeGen/AMDGPU/fold_16bit_imm.mir | 2 +- llvm/test/CodeGen/AMDGPU/hazard-pass-ordering.mir | 2 +- llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir | 10 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll | 4 + llvm/test/CodeGen/AMDGPU/mai-hazards.mir | 166 +- .../AMDGPU/memory-legalizer-atomic-insert-end.mir | 2 +- llvm/test/CodeGen/AMDGPU/merge-load-store-vreg.mir | 4 +- .../AMDGPU/pei-build-spill-partial-agpr.mir | 176 +- llvm/test/CodeGen/AMDGPU/pei-build-spill.mir | 1848 ++++++++++---------- .../CodeGen/AMDGPU/power-sched-no-instr-sunit.mir | 4 +- .../AMDGPU/promote-constOffset-to-imm-gfx10.mir | 8 +- .../CodeGen/AMDGPU/promote-constOffset-to-imm.mir | 8 +- llvm/test/CodeGen/AMDGPU/regbank-reassign.mir | 8 +- .../CodeGen/AMDGPU/regcoal-subrange-join-seg.mir | 4 +- llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir | 2 +- ...coalescing-remove-partial-redundancy-assert.mir | 6 +- .../CodeGen/AMDGPU/rename-independent-subregs.mir | 2 +- .../CodeGen/AMDGPU/s_add_co_pseudo_lowering.mir | 14 +- .../sched-assert-onlydbg-value-empty-region.mir | 6 +- llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir | 34 +- ...d-handleMoveUp-subreg-def-across-subreg-def.mir | 12 +- llvm/test/CodeGen/AMDGPU/sched-prefer-non-mfma.mir | 4 +- llvm/test/CodeGen/AMDGPU/schedule-barrier.mir | 8 +- .../CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir | 24 +- llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir | 26 +- llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir | 2 +- llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir | 8 +- llvm/test/CodeGen/AMDGPU/setcc.ll | 16 +- llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir | 12 +- .../CodeGen/AMDGPU/smem-no-clause-coalesced.mir | 4 +- .../CodeGen/AMDGPU/spill-agpr-partially-undef.mir | 12 +- llvm/test/CodeGen/AMDGPU/spill-agpr.mir | 316 ++-- .../AMDGPU/stale-livevar-in-twoaddr-pass.mir | 2 +- .../CodeGen/AMDGPU/subreg-split-live-in-error.mir | 18 +- llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir | 2 +- llvm/test/CodeGen/AMDGPU/v_swap_b32.mir | 4 +- llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir | 24 +- llvm/test/CodeGen/AMDGPU/waitcnt.mir | 8 +- llvm/test/CodeGen/ARM/O3-pipeline.ll | 3 + llvm/test/CodeGen/PowerPC/spe.ll | 49 +- llvm/test/CodeGen/PowerPC/vsx.ll | 40 +- llvm/test/CodeGen/RISCV/double-br-fcmp.ll | 53 +- llvm/test/CodeGen/RISCV/double-fcmp.ll | 48 +- llvm/test/CodeGen/RISCV/double-select-fcmp.ll | 51 +- llvm/test/CodeGen/RISCV/float-br-fcmp.ll | 51 +- llvm/test/CodeGen/RISCV/float-fcmp.ll | 46 +- llvm/test/CodeGen/RISCV/float-select-fcmp.ll | 43 +- llvm/test/CodeGen/RISCV/half-br-fcmp.ll | 43 +- llvm/test/CodeGen/RISCV/half-fcmp.ll | 38 +- llvm/test/CodeGen/RISCV/half-select-fcmp.ll | 39 +- llvm/test/CodeGen/RISCV/rv32Zbb.ll | 137 +- llvm/test/CodeGen/RISCV/rv32Zbbp.ll | 138 +- llvm/test/CodeGen/RISCV/rv32Zbs.ll | 52 +- llvm/test/CodeGen/RISCV/rv32Zbt.ll | 480 ++--- llvm/test/CodeGen/RISCV/rv64Zbt.ll | 112 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll | 156 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll | 156 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll | 324 ++-- llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll | 296 ++-- llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll | 797 +++++++-- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll | 796 +++++++-- llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll | 372 +++- llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll | 210 +++ llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll | 796 +++++++-- llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll | 467 ++++- llvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll | 419 ++++- llvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll | 419 ++++- llvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll | 419 ++++- llvm/test/CodeGen/RISCV/rvv/vfredsum-rv32.ll | 419 ++++- llvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll | 424 ++++- llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll | 220 ++- llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll | 224 ++- llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll | 312 ++-- llvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll | 797 +++++++-- llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll | 388 +++- llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll | 388 +++- llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll | 519 ++++-- llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll | 388 +++- llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll | 1008 ++++++++--- llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll | 1008 ++++++++--- llvm/test/CodeGen/Thumb2/block-placement.mir | 345 ++++ llvm/test/CodeGen/Thumb2/mve-shuffleext.ll | 267 +++ llvm/test/CodeGen/Thumb2/mve-vcvt.ll | 51 + llvm/test/CodeGen/Thumb2/mve-vmovnstore.ll | 52 + llvm/test/CodeGen/Thumb2/mve-vqdmulh.ll | 81 +- llvm/test/CodeGen/WebAssembly/comparisons-f32.ll | 28 +- llvm/test/CodeGen/WebAssembly/comparisons-f64.ll | 28 +- llvm/test/CodeGen/WebAssembly/simd-comparisons.ll | 68 +- llvm/test/CodeGen/X86/call-rv-marker.ll | 175 ++ llvm/test/CodeGen/X86/haddsub-4.ll | 32 + llvm/test/CodeGen/X86/horizontal-sum.ll | 151 +- llvm/test/CodeGen/X86/non-value-mem-operand.mir | 6 +- llvm/test/CodeGen/X86/pr48727.ll | 51 + llvm/test/CodeGen/X86/select-prof-codegen.ll | 6 +- llvm/test/CodeGen/X86/statepoint-fixup-call.mir | 4 +- .../CodeGen/X86/statepoint-fixup-copy-prop-neg.mir | 6 +- llvm/test/CodeGen/X86/vector-pack-256.ll | 66 +- llvm/test/LTO/X86/objc-arc-contract.ll | 13 + llvm/test/MC/AMDGPU/add-sub-no-carry.s | 6 +- llvm/test/MC/AMDGPU/buf-fmt-d16-packed.s | 6 +- llvm/test/MC/AMDGPU/buf-fmt-d16-unpacked.s | 6 +- llvm/test/MC/AMDGPU/ds-gfx9.s | 4 +- llvm/test/MC/AMDGPU/ds.s | 12 +- llvm/test/MC/AMDGPU/flat-gfx10.s | 4 +- llvm/test/MC/AMDGPU/flat-global.s | 10 +- llvm/test/MC/AMDGPU/flat-scratch-instructions.s | 10 +- llvm/test/MC/AMDGPU/gfx10_asm_dpp16.s | 4 +- llvm/test/MC/AMDGPU/gfx10_asm_dpp8.s | 4 +- llvm/test/MC/AMDGPU/gfx10_asm_ds.s | 4 +- llvm/test/MC/AMDGPU/gfx10_asm_flat.s | 4 +- llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s | 4 +- llvm/test/MC/AMDGPU/gfx10_asm_smem.s | 4 +- llvm/test/MC/AMDGPU/gfx10_asm_sop.s | 4 +- llvm/test/MC/AMDGPU/gfx10_asm_vop1.s | 8 +- llvm/test/MC/AMDGPU/gfx10_asm_vop2.s | 4 +- llvm/test/MC/AMDGPU/gfx10_asm_vopc.s | 8 +- llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s | 8 +- llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s | 8 +- llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s | 4 +- llvm/test/MC/AMDGPU/hsa-metadata-kernel-args-v3.s | 6 +- llvm/test/MC/AMDGPU/hsa-metadata-kernel-args.s | 6 +- llvm/test/MC/AMDGPU/hsa-metadata-kernel-attrs-v3.s | 6 +- llvm/test/MC/AMDGPU/hsa-metadata-kernel-attrs.s | 6 +- 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26 + llvm/test/tools/dsymutil/X86/swift-ast-x86_64.test | 2 +- .../tools/dsymutil/X86/timestamp-mismatch.test | 10 + llvm/test/tools/dsymutil/debug-map-parsing.test | 2 +- llvm/test/tools/llvm-readobj/ELF/dyn-symbols.test | 4 +- llvm/test/tools/llvm-readobj/ELF/dynamic-tags.test | 1 + llvm/test/tools/llvm-readobj/ELF/mips-got.test | 4 +- llvm/test/tools/llvm-readobj/ELF/mips-plt.test | 4 +- .../tools/llvm-readobj/ELF/section-symbols.test | 2 +- llvm/test/tools/llvm-readobj/ELF/symbol-shndx.test | 8 +- llvm/test/tools/llvm-readobj/ELF/symtab-shndx.test | 331 ++++ .../obj2yaml/ELF/call-graph-profile-section.yaml | 76 +- llvm/test/tools/obj2yaml/ELF/mips-abi-flags.yaml | 24 +- llvm/test/tools/obj2yaml/ELF/sht-symtab-shndx.yaml | 46 +- llvm/test/tools/obj2yaml/ELF/versym-section.yaml | 15 +- .../test/tools/yaml2obj/ELF/arm-exidx-section.yaml | 2 +- llvm/test/tools/yaml2obj/ELF/sht-symtab-shndx.yaml | 2 +- llvm/tools/dsymutil/BinaryHolder.cpp | 22 +- llvm/tools/dsymutil/BinaryHolder.h | 2 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mlir/docs/Dialects/LLVM.md | 174 +- mlir/docs/Dialects/Linalg.md | 6 + mlir/lib/Bindings/Python/IRModules.cpp | 18 + mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 26 - mlir/test/Bindings/Python/ir_affine_map.py | 6 + .../mlir-linalg-ods-gen/test-linalg-ods-gen.tc | 49 +- .../mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp | 279 ++- openmp/CMakeLists.txt | 12 +- openmp/docs/ReleaseNotes.rst | 27 +- openmp/docs/design/Runtimes.rst | 91 + openmp/libomptarget/CMakeLists.txt | 4 +- .../libomptarget/deviceRTLs/nvptx/CMakeLists.txt | 5 +- openmp/libomptarget/plugins/amdgpu/CMakeLists.txt | 6 +- openmp/libomptarget/plugins/amdgpu/src/rtl.cpp | 2 +- .../plugins/common/MemoryManager/MemoryManager.h | 5 + openmp/libomptarget/src/CMakeLists.txt | 2 +- openmp/runtime/src/include/omp.h.var | 7 +- openmp/runtime/src/include/omp_lib.f90.var | 7 +- openmp/runtime/src/include/omp_lib.h.var | 10 +- openmp/runtime/src/kmp.h | 7 +- openmp/runtime/src/kmp_alloc.cpp | 51 +- openmp/runtime/src/kmp_barrier.cpp | 15 +- openmp/runtime/test/barrier/omp_barrier.c | 3 + 608 files changed, 37917 insertions(+), 9487 deletions(-) create mode 100644 clang/test/Driver/aix-pragma-pack.c create mode 100644 clang/test/Driver/fcs-profile-generate.c create mode 100644 clang/test/Layout/aix-power-natural-interaction.cpp create mode 100644 clang/test/PCH/aix-pragma-pack.c create mode 100644 clang/test/Sema/aix-pragma-pack-and-align.c rename clang/test/SemaOpenCL/{logical-ops.cl => operators.cl} (90%) create mode 100644 libc/src/ctype/isascii.cpp create mode 100644 libc/src/ctype/isascii.h create mode 100644 libc/src/ctype/toascii.cpp create mode 100644 libc/src/ctype/toascii.h create mode 100644 libc/test/src/ctype/isascii_test.cpp create mode 100644 libc/test/src/ctype/toascii_test.cpp create mode 100644 libcxx/include/support/openbsd/xlocale.h create mode 100644 llvm/lib/Target/ARM/ARMBlockPlacement.cpp create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp128-fconstant.mir create mode 100644 llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-bit-counting-pred.ll create mode 100644 llvm/test/CodeGen/AMDGPU/early-term.mir create mode 100644 llvm/test/CodeGen/Thumb2/block-placement.mir create mode 100644 llvm/test/CodeGen/X86/call-rv-marker.ll create mode 100644 llvm/test/CodeGen/X86/pr48727.ll create mode 100644 llvm/test/LTO/X86/objc-arc-contract.ll create mode 100644 llvm/test/MachineVerifier/verifier-statepoint.mir create mode 100644 llvm/test/Transforms/Coroutines/coro-spill-promise.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/willreturn.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-bitcasts.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-amx-load-store.ll create mode 100644 llvm/test/Transforms/LoopIdiom/memcpy.ll create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/pipeline.ll create mode 100644 llvm/test/tools/dsymutil/Inputs/private/tmp/dwarf5/dwarf5.o create mode 100755 llvm/test/tools/dsymutil/Inputs/private/tmp/dwarf5/dwarf5.out create mode 100644 llvm/test/tools/dsymutil/Inputs/private/tmp/eh_frame/eh_frame.o create mode 100755 llvm/test/tools/dsymutil/Inputs/private/tmp/eh_frame/eh_frame.out create mode 100644 llvm/test/tools/dsymutil/X86/dwarf5.test create mode 100644 llvm/test/tools/dsymutil/X86/eh_frame.test create mode 100644 llvm/test/tools/dsymutil/X86/timestamp-mismatch.test create mode 100644 llvm/test/tools/llvm-readobj/ELF/symtab-shndx.test -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (93b54b7c673 -> 0bbc6a6bb64)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig in repository toolchain/ci/llvm-project. from 93b54b7c673 [PowerPC][NFCI] PassSubtarget to ASMWriter adds 67a339e9683 [MLIR] Disallow `sym_visibility`, `sym_name` and `type` att [...] adds 85aaa3e310c [X86] Regenerate sdiv_fix_sat.ll + udiv_fix_sat.ll tests adds dd955771240 Fix typo in diagnostic message adds a4931d4fe38 [AMDGPU] Regenerate umax crash test adds 3d9c51d111d [SVE][NFC] Regenerate a few CodeGen tests adds 348471575d9 Add -ansi option to CompileOnly group adds b117d17d264 [doc] Place sha256 in lld/README.md into backticks adds ef3800e8216 Return false from __has_declspec_attribute() if not explici [...] adds 5aefc8dc4d1 [llvm] [cmake] Remove obsolete /usr/local hack for *BSD adds bb9ebf6baf7 [Tests] Add tests for new InstCombine OR transformation, NFC adds 0529946b5ba [instCombine] Add (A ^ B) | ~(A | B) -> ~(A & B) adds 6f4d4607620 [Flang][openmp][openacc] Extend CheckNoBranching to handle [...] adds 03c8d6a0c4b [LegalizeDAG][RISCV][PowerPC][AMDGPU][WebAssembly] Improve [...] adds 4718ec01669 [clangd] Avoid recursion in TargetFinder::add() adds f748e922955 [NewPM] Run non-trivial loop unswitching under -O2/3/s/z adds a14040bd4d9 [RISCV] Use vmerge.vim for llvm.riscv.vfmerge with a 0.0 sc [...] adds 08d4a50467e [FunctionAttrs] Precommit tests for willreturn inference. adds eef4bdbb34d [libc++] Add a missing `<_Compare>` template argument. adds 79f99ba65d9 [libcxx] Port to OpenBSD adds 7ecad2e4ced [InstSimplify] Don't fold gep p, -p to null adds bdd1ad5e5c5 [OpenMP] Fixed include directories for OpenMP when building [...] adds 33e2494bea6 [libomptarget][amdgpu][nfc] Fix build on centos adds e5f51fdd650 [clang][aarch64] Precondition isHomogeneousAggregate on isC [...] adds 6cd44b204c6 [FunctionAttrs] Derive willreturn for fns with readonly` & [...] adds e53bbd99516 [IR] move nomerge attribute from function declaration/defin [...] adds 922a5b89411 [clang-tidy] Add test for Transformer-based checks with dia [...] adds d49974f9c98 [InstCombine] Regenerate test checks (NFC) adds 9f61fbd75ae [LV] Relax assumption that LCSSA implies single entry adds f706486eaf0 Fix for crash in __builtin_return_address in template context. adds fb063c933f0 [InstCombine] Duplicate tests for logical and/or (NFC) adds caafdf07bbc [LV] Weaken spuriously strong assert in LoopVersioning adds 46507a96fc1 [SLP] reduce code duplication while matching reductions; NFC adds 554be30a428 [SLP] reduce code duplication in processing reductions; NFC adds 92fb5c49e8a [SLP] rename variable to improve readability; NFC adds 9e7895a8682 [SLP] reduce code duplication while processing reductions; NFC adds 7583ae48a3c [RISCV] Add double test cases to vfmerge-rv32.ll. NFC adds e15f3ddcae6 [InstCombine] Add tests for logical and/or poison implicati [...] adds 71ed4b6ce57 [RISCV] Legalize select when Zbt extension available adds 23390e7a131 [InstCombine] Handle logical and/or in assume optimization adds 7fd18508134 [mlir] Update LLVM dialect type documentation adds 2a49b7c64a3 [Inliner] Change inline remark format and update ReplayInli [...] adds 68ff52ffead [OpenMP] Fixed the link error that cannot find static data member adds d1fa7afc7ae [AArch64] [Windows] Properly add :lo12: reloc specifiers wh [...] adds 02f1d28ed6b [libcxx] Avoid overflows in the windows __libcpp_steady_clo [...] adds 01f1273fe2f [OpenMP] Fixed a typo in openmp/CMakeLists.txt adds 3d397091591 AMDGPU: Remove wrapper only call limitation adds cf45731f0ea [Driver] Fix assertion failure when -fprofile-generate -fcs [...] adds 55f2eeebc96 [NFC] Disallow unused prefixes in MC/AMDGPU adds a7130d85e4b [ADT][NFC] Use empty base optimisation in BumpPtrAllocatorImpl adds 1730b0f66ad [RISCV] Remove '.mask' from vcompress intrinsic name. NFC adds 6166b91e837 [ELF][NFCI] small cleanup to OutputSections.h adds 175288a1afe Add sample-profile-suffix-elision-policy attribute with -fu [...] adds ddcb0aae8b0 [MIPatternMatch] Add matcher for G_PTR_ADD adds 8f5ec459375 [Sanitizer][Darwin] Fix test for macOS 11+ point releases adds 585612355cd [NFC] Disallow unused prefixes under MC/AMDGPU adds 0d88d7d82bc Delete unused function (was breaking the -Werror build) adds 314e29ed2b7 [AMDGPU] Add _e64 suffix to VOP3 Insts adds 04edcc02638 [libc] add isascii and toascii implementations adds 0c8466c0015 [libc][NFC] Use more specific comparison macros in LdExpTest.h. adds 76643c48cdd [LangRef] State that a nocapture pointer cannot be returned adds 25eb7b08ba7 [DAGCombiner] Fold BRCOND(FREEZE(COND)) to BRCOND(COND) adds 82655c15145 [MSan] Tweak CopyOrigin adds 25b3921f2fc [gn build] (manually) port 79f99ba65d96 adds c0f3ea8a08c [mlir][Python] Add checking process before create an Affine [...] adds 055644cc459 [X86][AMX] Prohibit pointer cast on load. adds 5c7dcd7aead [Coroutine] Update promise object's final layout index adds 6529d7c5a45 [PDB] Defer relocating .debug$S until commit time and paral [...] adds 6f0f0220380 [OpenMP] Update allocator trait key/value definitions adds acea470c167 [gn build] Reorganize libcxx/include/BUILD.gn a bit adds 0066a09579c [libc++] Give extern templates default visibility on gcc adds bba3a82b56c [OpenMP] Use persistent memory for omp_large_cap_mem adds 914e2f5a02f [NFC] Use generic name for scalable vector stack ID. adds e5553b9a6ab [dsymutil] Warn on timestmap mismatch between object file a [...] adds cd8a80de960 [Orc] Add a unit test for asynchronous definition generation. adds f454c9f102a [InlineSpiller] Re-tie operands if folding failed adds 8a47d875b07 [dsymutil] Copy eh_frame content into the dSYM companion file. adds 84e0b14a0a4 [libomptarget][nvptx] Include omp_data.cu in bitcode deviceRTL adds ad735badb69 [dsymutil] s/dwarfdump/llvm-dwarfdump/ in test adds 35e4998f0c9 [dsymutil] Fix spurious space in REQUIRES: line adds 790c75c1637 [AMDGPU] Add SI_EARLY_TERMINATE_SCC0 for early terminating shader adds 157efd84abf [Statepoint Lowering] Add an option to allow use gc values [...] adds fba9805ba34 [Verifier] Extend statepoint verifier to cover more constants adds 12fc9ca3a40 [llvm] Remove redundant string initialization (NFC) adds 2c2d489b78c [CodeGen] Remove unused function isRegLiveInExitBlocks (NFC) adds 8a20e2b3d3e [llvm] Use Optional::getValueOr (NFC) adds f1d5cbbdee5 [dsymutil] Add preliminary support for DWARF 5. adds 0b99385e151 [MSan] Partially revert some changes from D94552 adds 8f8c207b8f2 [Verifier] Add tied-ness verification to statepoint intsruction adds 3aeb30d1a68 [ARM] Additional tests for different interleaving patterns. NFC adds 141906fa149 [llvm-readelf/obj] - Add support of multiple SHT_SYMTAB_SHN [...] adds c29ca8551af [ARM] Update isVMOVNOriginalMask to handle single input shu [...] adds 6d3098e7ff9 [obj2yaml,yaml2obj] - Refine how we set/dump the sh_entsize field. adds cbea6737d51 [clang][driver] Restore the original help text for `-I` adds f638c2eb4ee [LTO] Replace anonymous namespace with static functions (NFC). adds 4cd48535eca [NFC][InstructionCost] Use InstructionCost in Transforms/Sc [...] adds 3122c66aee7 [AArch64][SVE] Remove chains of unnecessary SVE reinterpret [...] adds 0f59d099571 [X86][AVX] combineVectorSignBitsTruncation - limit AVX512 t [...] adds ad85e396706 [SVE] Add ISel pattern for addvl adds 1854594b80b Hwasan InitPrctl check for error using internal_iserror adds ceb9379a90f [ADT] Fix join_impl using the wrong size when calculating t [...] adds ada96fa6217 [LTO] Add test to ensure objc-arc-contract is executed. adds af1bb4bc823 Fix build errors after ceb9379a9 adds c6e341c8995 Revert "[dsymutil] Warn on timestmap mismatch between objec [...] adds 2170e0ee60d [SVE][CodeGen] CTLZ, CTTZ & CTPOP operations (predicates) adds f8cece18630 [ValueTracking] Fix one s/dyn_cast/dyn_cast_or_null/ adds 704831fe1f1 Revert "Hwasan InitPrctl check for error using internal_iserror" adds d307d892ade [Tests] Added test for memcpy loop idiom recognization adds 0a0ee7f5a5a [X86] canonicalizeShuffleMaskWithHorizOp - minor refactor t [...] adds ab577807165 [libc] Refresh benchmark progress bar when needed. adds 7c77b536efd [OpenCL] Improve OpenCL operator tests adds b7b1e8c37a9 [X86] Add tests for rv_marker lowering. adds 3bc7555ffac [mlir][linalg] Use attributes in named ops' indexing maps adds 90164ba957a [clangd] Split out a base class for delegating GlobalCompil [...] adds dda60035e9f [AArch64] Attempt to sink mul operands adds d55d592a921 GlobalISel: Do not set observer of MachineIRBuilder in Lega [...] adds 350c0552c66 [NFC][RISCV] Add double type in RISC-V V CodeGen test cases [...] adds 4e8e888905a [AArch64][GlobalISel] Add support for FCONSTANT of FP128 type adds 07b6aeb5685 [lld][WebAssembly] Fix for TLS + --relocatable adds f0abe2aeaca [Frontend] Add pragma align natural and sort out pragma pac [...] adds a957634942a [OpenMP] Add documentation for error messages and release notes adds 4fe17ada55a [OpenMP] Fix hierarchical barrier adds 66d5994bd38 [clangd] Explicitly avoid background-indexing the same file twice. adds 466acd69486 [clangd] Avoid reallocating buffers for each message read: adds e433ca28ec9 [SLP] add reduction test for FMF; NFC adds 17863614da1 [InstCombine] Fold select -> and/or using impliesPoison adds a4f38668823 [clangd] Remove "decision-forest-base" experimental flag. adds 0bbc6a6bb64 [clangd] Remove some old CodeCompletion options that are ne [...] No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/CodeComplete.cpp | 9 +- clang-tools-extra/clangd/CodeComplete.h | 11 - clang-tools-extra/clangd/FindTarget.cpp | 10 + clang-tools-extra/clangd/FindTarget.h | 3 + .../clangd/GlobalCompilationDatabase.cpp | 52 +- .../clangd/GlobalCompilationDatabase.h | 26 +- clang-tools-extra/clangd/JSONTransport.cpp | 56 +- clang-tools-extra/clangd/QueryDriverDatabase.cpp | 21 +- clang-tools-extra/clangd/index/Background.cpp | 7 +- clang-tools-extra/clangd/index/Background.h | 4 + clang-tools-extra/clangd/index/BackgroundQueue.cpp | 26 +- clang-tools-extra/clangd/tool/ClangdMain.cpp | 9 - .../clangd/unittests/BackgroundIndexTests.cpp | 76 +- .../clangd/unittests/CodeCompleteTests.cpp | 12 +- .../clangd/unittests/FindTargetTests.cpp | 41 + .../clang-tidy/TransformerClangTidyCheckTest.cpp | 38 +- clang/docs/ClangCommandLineReference.rst | 7 +- clang/include/clang/Basic/Attr.td | 7 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 6 +- clang/include/clang/Basic/LangOptions.def | 2 + clang/include/clang/Driver/Options.td | 18 +- clang/include/clang/Sema/Sema.h | 116 +- clang/include/clang/Serialization/ASTReader.h | 10 +- clang/include/clang/Serialization/ASTWriter.h | 5 + clang/lib/AST/RecordLayoutBuilder.cpp | 21 +- clang/lib/CodeGen/CGCXXABI.h | 7 + clang/lib/CodeGen/CGCall.cpp | 16 +- clang/lib/CodeGen/CodeGenModule.cpp | 3 - clang/lib/CodeGen/MicrosoftCXXABI.cpp | 16 +- clang/lib/CodeGen/TargetInfo.cpp | 6 +- clang/lib/Driver/ToolChains/Clang.cpp | 8 +- clang/lib/Frontend/CompilerInvocation.cpp | 1 + clang/lib/Lex/PPMacroExpansion.cpp | 10 +- clang/lib/Parse/ParsePragma.cpp | 29 +- clang/lib/Sema/Sema.cpp | 3 +- clang/lib/Sema/SemaAttr.cpp | 151 +- clang/lib/Sema/SemaChecking.cpp | 3 +- clang/lib/Serialization/ASTReader.cpp | 11 +- clang/lib/Serialization/ASTWriter.cpp | 10 +- clang/test/CodeGen/attr-nomerge.cpp | 54 +- clang/test/CodeGenCXX/homogeneous-aggregates.cpp | 69 + clang/test/Driver/aix-pragma-pack.c | 4 + clang/test/Driver/fcs-profile-generate.c | 15 + .../optimization-remark-with-hotness-new-pm.c | 2 +- .../Frontend/optimization-remark-with-hotness.c | 2 +- clang/test/Layout/aix-double-struct-member.cpp | 9 +- .../test/Layout/aix-power-natural-interaction.cpp | 146 ++ clang/test/PCH/aix-pragma-pack.c | 119 ++ clang/test/Sema/aix-pragma-pack-and-align.c | 229 +++ clang/test/Sema/builtin-returnaddress.c | 12 + clang/test/SemaOpenCL/invalid-vector-literals.cl | 1 - .../SemaOpenCL/{logical-ops.cl => operators.cl} | 6 + clang/test/SemaOpenCL/vector_inc_dec_ops.cl | 9 +- compiler-rt/lib/msan/msan_poisoning.cpp | 2 +- .../sanitizer_common/tests/sanitizer_mac_test.cpp | 18 +- flang/lib/Semantics/check-directive-structure.h | 15 +- flang/lib/Semantics/check-omp-structure.cpp | 9 +- flang/test/Semantics/omp-parallell01.f90 | 3 +- libc/benchmarks/LibcMemoryBenchmarkMain.cpp | 11 +- libc/config/linux/aarch64/entrypoints.txt | 2 + libc/config/linux/x86_64/entrypoints.txt | 2 + libc/spec/gnu_ext.td | 19 +- libc/spec/posix.td | 15 + libc/src/ctype/CMakeLists.txt | 16 + libc/src/ctype/isascii.cpp | 17 + libc/src/ctype/isascii.h | 18 + libc/src/ctype/toascii.cpp | 17 + libc/src/ctype/toascii.h | 18 + libc/test/src/ctype/CMakeLists.txt | 20 + libc/test/src/ctype/isascii_test.cpp | 23 + libc/test/src/ctype/toascii_test.cpp | 24 + libc/test/src/math/LdExpTest.h | 4 +- libcxx/docs/DesignDocs/VisibilityMacros.rst | 6 - libcxx/include/CMakeLists.txt | 1 + libcxx/include/__config | 17 +- libcxx/include/__locale | 2 + libcxx/include/algorithm | 7 +- libcxx/include/support/openbsd/xlocale.h | 19 + libcxx/src/chrono.cpp | 5 +- .../time/time.clock/time.clock.steady/now.pass.cpp | 2 + lld/COFF/Chunks.cpp | 113 +- lld/COFF/Chunks.h | 10 + lld/COFF/PDB.cpp | 643 ++++--- lld/ELF/OutputSections.h | 6 - lld/README.md | 2 +- lld/test/wasm/tls-no-shared.s | 2 +- lld/test/wasm/tls.s | 33 +- lld/wasm/Driver.cpp | 2 +- lld/wasm/InputFiles.cpp | 1 + lld/wasm/Writer.cpp | 2 +- llvm/CMakeLists.txt | 7 - llvm/docs/LangRef.rst | 3 +- llvm/include/llvm/ADT/StringExtras.h | 5 +- llvm/include/llvm/Analysis/InlineAdvisor.h | 19 + llvm/include/llvm/Analysis/ReplayInlineAdvisor.h | 3 +- .../GlobalISel/LegalizationArtifactCombiner.h | 4 +- .../llvm/CodeGen/GlobalISel/MIPatternMatch.h | 6 + .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 5 + llvm/include/llvm/CodeGen/ISDOpcodes.h | 9 +- llvm/include/llvm/CodeGen/MIRYamlMapping.h | 2 +- llvm/include/llvm/CodeGen/MachineLoopUtils.h | 4 - llvm/include/llvm/CodeGen/StackMaps.h | 9 + llvm/include/llvm/CodeGen/TargetFrameLowering.h | 2 +- llvm/include/llvm/DWARFLinker/DWARFLinker.h | 6 +- .../llvm/DWARFLinker/DWARFLinkerCompileUnit.h | 2 +- llvm/include/llvm/DWARFLinker/DWARFStreamer.h | 2 +- .../PDB/Native/DbiModuleDescriptorBuilder.h | 63 +- llvm/include/llvm/ExecutionEngine/Orc/Core.h | 3 + llvm/include/llvm/IR/Function.h | 4 + llvm/include/llvm/IR/IntrinsicsRISCV.td | 2 +- llvm/include/llvm/LTO/Config.h | 6 +- llvm/include/llvm/Object/ELF.h | 60 +- llvm/include/llvm/ObjectYAML/ELFYAML.h | 34 + llvm/include/llvm/Support/Allocator.h | 25 +- llvm/lib/Analysis/CallPrinter.cpp | 2 +- llvm/lib/Analysis/ConstraintSystem.cpp | 2 +- llvm/lib/Analysis/InlineAdvisor.cpp | 63 +- llvm/lib/Analysis/InstructionSimplify.cpp | 24 +- llvm/lib/Analysis/ReplayInlineAdvisor.cpp | 41 +- llvm/lib/Analysis/ValueTracking.cpp | 2 +- llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp | 2 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 9 +- llvm/lib/CodeGen/InlineSpiller.cpp | 27 +- llvm/lib/CodeGen/MachineLoopUtils.cpp | 11 - llvm/lib/CodeGen/MachineVerifier.cpp | 23 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 7 + llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 19 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 9 + .../CodeGen/SelectionDAG/StatepointLowering.cpp | 21 +- llvm/lib/CodeGen/StackMaps.cpp | 61 +- llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 2 +- llvm/lib/DWARFLinker/DWARFLinker.cpp | 45 +- llvm/lib/DWARFLinker/DWARFLinkerCompileUnit.cpp | 6 +- llvm/lib/DWARFLinker/DWARFStreamer.cpp | 50 +- .../PDB/Native/DbiModuleDescriptorBuilder.cpp | 81 +- llvm/lib/DebugInfo/PDB/Native/DbiStreamBuilder.cpp | 10 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 5 +- .../RuntimeDyld/RuntimeDyldChecker.cpp | 4 +- llvm/lib/LTO/LTOBackend.cpp | 31 +- llvm/lib/ObjectYAML/ELFEmitter.cpp | 46 +- llvm/lib/Passes/PassBuilder.cpp | 2 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 12 +- llvm/lib/Target/AArch64/AArch64FrameLowering.h | 4 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 39 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 20 +- llvm/lib/Target/AArch64/AArch64MCInstLower.cpp | 6 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 3 + .../AArch64/GISel/AArch64InstructionSelector.cpp | 17 +- .../Target/AArch64/GISel/AArch64LegalizerInfo.cpp | 4 +- llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp | 50 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 6 +- llvm/lib/Target/AMDGPU/AMDGPUInline.cpp | 23 - .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 60 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 18 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 18 +- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 34 +- llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 2 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 22 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 2 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 8 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 66 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 90 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 130 +- llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 6 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 8 +- llvm/lib/Target/AMDGPU/SISchedule.td | 2 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 6 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 533 +++--- llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 66 +- llvm/lib/Target/ARC/ARCTargetMachine.cpp | 4 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 25 +- llvm/lib/Target/AVR/AVRTargetMachine.cpp | 2 +- llvm/lib/Target/BPF/BPFTargetMachine.cpp | 4 +- llvm/lib/Target/CSKY/CSKYTargetMachine.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 4 +- llvm/lib/Target/Lanai/LanaiTargetMachine.cpp | 4 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 11 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.h | 2 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 4 +- llvm/lib/Target/RISCV/RISCVInstrInfoB.td | 18 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 14 +- llvm/lib/Target/Sparc/SparcTargetMachine.cpp | 4 +- llvm/lib/Target/VE/VETargetMachine.cpp | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 43 +- llvm/lib/Target/XCore/XCoreTargetMachine.cpp | 4 +- llvm/lib/Transforms/Coroutines/CoroFrame.cpp | 16 +- llvm/lib/Transforms/IPO/Attributor.cpp | 2 +- llvm/lib/Transforms/IPO/FunctionAttrs.cpp | 18 + llvm/lib/Transforms/IPO/SampleProfile.cpp | 2 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 8 + .../Transforms/InstCombine/InstCombineCalls.cpp | 4 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 18 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 6 +- .../Transforms/Scalar/LowerMatrixIntrinsics.cpp | 2 +- .../Transforms/Scalar/RewriteStatepointsForGC.cpp | 8 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 3 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 3 +- llvm/lib/Transforms/Utils/LoopVersioning.cpp | 2 +- .../Utils/UniqueInternalLinkageNames.cpp | 1 + .../Vectorize/LoopVectorizationLegality.cpp | 20 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 79 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 65 +- .../CodeGen/AArch64/GlobalISel/arm64-fallback.ll | 7 - .../GlobalISel/legalize-ext-csedebug-output.mir | 3 - .../GlobalISel/legalize-fp128-fconstant.mir | 22 + .../CodeGen/AArch64/aarch64-matrix-umull-smull.ll | 186 ++ llvm/test/CodeGen/AArch64/arm64-windows-calls.ll | 77 + llvm/test/CodeGen/AArch64/cfguard-checks.ll | 14 +- .../CodeGen/AArch64/debug-info-sve-dbg-declare.mir | 16 +- .../CodeGen/AArch64/debug-info-sve-dbg-value.mir | 8 +- llvm/test/CodeGen/AArch64/dllimport.ll | 12 +- .../AArch64/framelayout-sve-basepointer.mir | 2 +- .../AArch64/framelayout-sve-calleesaves-fix.mir | 2 +- .../AArch64/framelayout-sve-scavengingslot.mir | 2 +- llvm/test/CodeGen/AArch64/framelayout-sve.mir | 68 +- llvm/test/CodeGen/AArch64/live-debugvalues-sve.mir | 2 +- llvm/test/CodeGen/AArch64/mingw-refptr.ll | 14 +- llvm/test/CodeGen/AArch64/spillfill-sve.mir | 10 +- llvm/test/CodeGen/AArch64/split-vector-insert.ll | 12 +- .../test/CodeGen/AArch64/stack-protector-target.ll | 2 +- llvm/test/CodeGen/AArch64/sve-alloca-stackid.ll | 4 +- llvm/test/CodeGen/AArch64/sve-bit-counting-pred.ll | 141 ++ .../AArch64/sve-calling-convention-byref.ll | 12 +- llvm/test/CodeGen/AArch64/sve-gep.ll | 3 +- .../AArch64/sve-intrinsic-opts-reinterpret.ll | 56 + .../CodeGen/AArch64/sve-intrinsics-loads-nf.ll | 227 ++- .../AArch64/sve-ld1-addressing-mode-reg-imm.ll | 6 +- llvm/test/CodeGen/AArch64/sve-localstackalloc.mir | 2 +- ...pred-contiguous-ldst-addressing-mode-reg-imm.ll | 225 ++- ...ed-non-temporal-ldst-addressing-mode-reg-imm.ll | 72 +- .../AArch64/sve-st1-addressing-mode-reg-imm.ll | 6 +- llvm/test/CodeGen/AArch64/win-tls.ll | 6 +- llvm/test/CodeGen/AArch64/win_cst_pool.ll | 4 +- llvm/test/CodeGen/AArch64/windows-extern-weak.ll | 2 +- .../AMDGPU/GlobalISel/inst-select-add.s16.mir | 8 +- .../GlobalISel/inst-select-amdgcn.fmad.ftz.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.mir | 32 +- .../GlobalISel/inst-select-amdgcn.fmed3.s16.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir | 60 +- .../AMDGPU/GlobalISel/inst-select-ashr.s16.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-bswap.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fadd.s64.mir | 22 +- .../GlobalISel/inst-select-fcanonicalize.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-fma.s32.mir | 24 +- .../AMDGPU/GlobalISel/inst-select-fmad.s32.mir | 40 +- .../AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fmaxnum.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fminnum.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir | 6 +- .../AMDGPU/GlobalISel/inst-select-fract.f64.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir | 60 +- .../AMDGPU/GlobalISel/inst-select-lshr.s16.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-mul.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-pattern-add3.mir | 8 +- .../GlobalISel/inst-select-pattern-and-or.mir | 16 +- .../AMDGPU/GlobalISel/inst-select-pattern-or3.mir | 8 +- .../GlobalISel/inst-select-pattern-smed3.mir | 4 +- .../GlobalISel/inst-select-pattern-smed3.s16.mir | 4 +- .../GlobalISel/inst-select-pattern-umed3.mir | 4 +- .../GlobalISel/inst-select-pattern-umed3.s16.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-pattern-xor3.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-sext-inreg.mir | 20 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir | 8 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir | 60 +- .../AMDGPU/GlobalISel/inst-select-shl.s16.mir | 4 +- .../inst-select-shuffle-vector.v2s16.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-smulh.mir | 24 +- .../AMDGPU/GlobalISel/inst-select-umulh.mir | 24 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir | 4 +- .../GlobalISel/llvm.amdgcn.raw.buffer.load.ll | 4 +- .../GlobalISel/llvm.amdgcn.struct.buffer.load.ll | 8 +- llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir | 430 ++--- llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll | 4 +- .../CodeGen/AMDGPU/clamp-omod-special-case.mir | 12 +- ...coalescer-subranges-another-copymi-not-live.mir | 2 +- .../coalescer-subranges-another-prune-error.mir | 2 +- .../AMDGPU/coalescer-subregjoin-fullcopy.mir | 10 +- .../coalescer-with-subregs-bad-identical.mir | 16 +- .../CodeGen/AMDGPU/constant-fold-imm-immreg.mir | 10 +- .../CodeGen/AMDGPU/couldnt-join-subrange-3.mir | 16 +- .../CodeGen/AMDGPU/debug-value-scheduler-crash.mir | 12 +- llvm/test/CodeGen/AMDGPU/early-term.mir | 268 +++ llvm/test/CodeGen/AMDGPU/fdiv-nofpexcept.ll | 36 +- .../CodeGen/AMDGPU/fold-immediate-output-mods.mir | 16 +- llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir | 2 +- llvm/test/CodeGen/AMDGPU/fold_16bit_imm.mir | 2 +- llvm/test/CodeGen/AMDGPU/hazard-pass-ordering.mir | 2 +- llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir | 10 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll | 4 + llvm/test/CodeGen/AMDGPU/mai-hazards.mir | 166 +- .../AMDGPU/memory-legalizer-atomic-insert-end.mir | 2 +- llvm/test/CodeGen/AMDGPU/merge-load-store-vreg.mir | 4 +- .../AMDGPU/pei-build-spill-partial-agpr.mir | 176 +- llvm/test/CodeGen/AMDGPU/pei-build-spill.mir | 1848 ++++++++++---------- .../CodeGen/AMDGPU/power-sched-no-instr-sunit.mir | 4 +- .../AMDGPU/promote-constOffset-to-imm-gfx10.mir | 8 +- .../CodeGen/AMDGPU/promote-constOffset-to-imm.mir | 8 +- llvm/test/CodeGen/AMDGPU/r600-legalize-umax-bug.ll | 23 +- llvm/test/CodeGen/AMDGPU/regbank-reassign.mir | 8 +- .../CodeGen/AMDGPU/regcoal-subrange-join-seg.mir | 4 +- llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir | 2 +- ...coalescing-remove-partial-redundancy-assert.mir | 6 +- .../CodeGen/AMDGPU/rename-independent-subregs.mir | 2 +- .../CodeGen/AMDGPU/s_add_co_pseudo_lowering.mir | 14 +- .../sched-assert-onlydbg-value-empty-region.mir | 6 +- llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir | 34 +- ...d-handleMoveUp-subreg-def-across-subreg-def.mir | 12 +- llvm/test/CodeGen/AMDGPU/sched-prefer-non-mfma.mir | 4 +- llvm/test/CodeGen/AMDGPU/schedule-barrier.mir | 8 +- .../CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir | 24 +- llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir | 26 +- llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir | 2 +- llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir | 8 +- llvm/test/CodeGen/AMDGPU/setcc.ll | 16 +- llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir | 12 +- .../CodeGen/AMDGPU/smem-no-clause-coalesced.mir | 4 +- .../CodeGen/AMDGPU/spill-agpr-partially-undef.mir | 12 +- llvm/test/CodeGen/AMDGPU/spill-agpr.mir | 316 ++-- .../AMDGPU/stale-livevar-in-twoaddr-pass.mir | 2 +- .../CodeGen/AMDGPU/subreg-split-live-in-error.mir | 18 +- llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir | 2 +- llvm/test/CodeGen/AMDGPU/v_swap_b32.mir | 4 +- llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir | 24 +- llvm/test/CodeGen/AMDGPU/waitcnt.mir | 8 +- llvm/test/CodeGen/PowerPC/spe.ll | 49 +- llvm/test/CodeGen/PowerPC/vsx.ll | 40 +- llvm/test/CodeGen/RISCV/double-br-fcmp.ll | 53 +- llvm/test/CodeGen/RISCV/double-fcmp.ll | 48 +- llvm/test/CodeGen/RISCV/double-select-fcmp.ll | 51 +- llvm/test/CodeGen/RISCV/float-br-fcmp.ll | 51 +- llvm/test/CodeGen/RISCV/float-fcmp.ll | 46 +- llvm/test/CodeGen/RISCV/float-select-fcmp.ll | 43 +- llvm/test/CodeGen/RISCV/half-br-fcmp.ll | 43 +- llvm/test/CodeGen/RISCV/half-fcmp.ll | 38 +- llvm/test/CodeGen/RISCV/half-select-fcmp.ll | 39 +- llvm/test/CodeGen/RISCV/rv32Zbb.ll | 137 +- llvm/test/CodeGen/RISCV/rv32Zbbp.ll | 138 +- llvm/test/CodeGen/RISCV/rv32Zbs.ll | 52 +- llvm/test/CodeGen/RISCV/rv32Zbt.ll | 480 ++--- llvm/test/CodeGen/RISCV/rv64Zbt.ll | 112 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll | 156 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll | 156 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll | 324 ++-- llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll | 296 ++-- llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll | 797 +++++++-- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll | 796 +++++++-- llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll | 372 +++- llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll | 210 +++ llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll | 796 +++++++-- llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll | 467 ++++- llvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll | 419 ++++- llvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll | 419 ++++- llvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll | 419 ++++- llvm/test/CodeGen/RISCV/rvv/vfredsum-rv32.ll | 419 ++++- llvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll | 424 ++++- llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll | 220 ++- llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll | 224 ++- llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll | 312 ++-- llvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll | 797 +++++++-- llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll | 388 +++- llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll | 388 +++- llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll | 519 ++++-- llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll | 388 +++- llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll | 1008 ++++++++--- llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll | 1008 ++++++++--- llvm/test/CodeGen/Thumb2/mve-shuffleext.ll | 267 +++ llvm/test/CodeGen/Thumb2/mve-vcvt.ll | 51 + llvm/test/CodeGen/Thumb2/mve-vmovnstore.ll | 52 + llvm/test/CodeGen/Thumb2/mve-vqdmulh.ll | 81 +- llvm/test/CodeGen/WebAssembly/comparisons-f32.ll | 28 +- llvm/test/CodeGen/WebAssembly/comparisons-f64.ll | 28 +- llvm/test/CodeGen/WebAssembly/simd-comparisons.ll | 68 +- llvm/test/CodeGen/X86/call-rv-marker.ll | 175 ++ llvm/test/CodeGen/X86/non-value-mem-operand.mir | 6 +- llvm/test/CodeGen/X86/pr48727.ll | 51 + llvm/test/CodeGen/X86/sdiv_fix_sat.ll | 20 +- llvm/test/CodeGen/X86/select-prof-codegen.ll | 6 +- llvm/test/CodeGen/X86/statepoint-fixup-call.mir | 4 +- .../CodeGen/X86/statepoint-fixup-copy-prop-neg.mir | 6 +- llvm/test/CodeGen/X86/udiv_fix_sat.ll | 2 +- llvm/test/CodeGen/X86/vector-pack-256.ll | 66 +- llvm/test/LTO/X86/objc-arc-contract.ll | 13 + llvm/test/MC/AMDGPU/add-sub-no-carry.s | 6 +- llvm/test/MC/AMDGPU/buf-fmt-d16-packed.s | 6 +- llvm/test/MC/AMDGPU/buf-fmt-d16-unpacked.s | 6 +- llvm/test/MC/AMDGPU/ds-gfx9.s | 4 +- llvm/test/MC/AMDGPU/ds.s | 12 +- llvm/test/MC/AMDGPU/flat-gfx10.s | 4 +- llvm/test/MC/AMDGPU/flat-global.s | 10 +- llvm/test/MC/AMDGPU/flat-scratch-instructions.s | 10 +- llvm/test/MC/AMDGPU/gfx10_asm_dpp16.s | 4 +- llvm/test/MC/AMDGPU/gfx10_asm_dpp8.s | 4 +- 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llvm/test/MC/AMDGPU/sopp.s | 4 +- llvm/test/MC/AMDGPU/vintrp-err.s | 4 +- llvm/test/MC/AMDGPU/vintrp.s | 4 +- llvm/test/MC/AMDGPU/vop1.s | 12 +- llvm/test/MC/AMDGPU/vop3-convert.s | 8 +- llvm/test/MC/AMDGPU/vop3-gfx9.s | 12 +- llvm/test/MC/AMDGPU/vop_dpp.s | 10 +- llvm/test/MC/AMDGPU/vop_dpp_expr.s | 4 +- llvm/test/MC/AMDGPU/vop_sdwa.s | 12 +- llvm/test/MC/AMDGPU/xdl-insts-err.s | 4 +- llvm/test/MachineVerifier/verifier-statepoint.mir | 30 + llvm/test/Object/invalid.test | 2 +- llvm/test/Object/obj2yaml.test | 1 + .../Transforms/Coroutines/coro-spill-promise.ll | 57 + llvm/test/Transforms/FunctionAttrs/willreturn.ll | 68 + .../Inline/optimization-remarks-passed-yaml.ll | 5 +- .../InstCombine/2006-12-15-Range-Test.ll | 82 +- .../InstCombine/2007-03-13-CompareMerge.ll | 27 +- .../Transforms/InstCombine/2007-05-10-icmp-or.ll | 27 +- .../InstCombine/2007-11-15-CompareMiscomp.ll | 27 +- .../Transforms/InstCombine/2008-01-13-AndCmpCmp.ll | 31 +- .../InstCombine/2008-02-28-OrFCmpCrash.ll | 52 +- .../InstCombine/2008-06-21-CompareMiscomp.ll | 27 +- llvm/test/Transforms/InstCombine/2008-08-05-And.ll | 78 +- .../test/Transforms/InstCombine/2012-02-28-ICmp.ll | 34 +- .../InstCombine/2012-03-10-InstCombine.ll | 74 +- .../InstCombine/X86/x86-amx-load-store.ll | 38 + llvm/test/Transforms/InstCombine/and-fcmp.ll | 1523 +++++++++++++++- .../Transforms/InstCombine/and-or-icmp-min-max.ll | 1024 ++++++++++- .../Transforms/InstCombine/and-or-icmp-nullptr.ll | 334 ++++ llvm/test/Transforms/InstCombine/and-or-icmps.ll | 448 +++++ llvm/test/Transforms/InstCombine/and.ll | 157 ++ llvm/test/Transforms/InstCombine/and2.ll | 35 + llvm/test/Transforms/InstCombine/assume.ll | 106 +- llvm/test/Transforms/InstCombine/bit-checks.ll | 843 +++++++-- ...mp-with-select-of-constant-threshold-pattern.ll | 80 +- llvm/test/Transforms/InstCombine/demorgan.ll | 16 + .../Transforms/InstCombine/dont-distribute-phi.ll | 54 +- .../Transforms/InstCombine/fold-bin-operand.ll | 8 + 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llvm/test/Transforms/InstCombine/select-and-or.ll | 93 + .../InstCombine/select-crash-noverify.ll | 16 + .../Transforms/InstCombine/select-ctlz-to-cttz.ll | 57 +- .../Transforms/InstCombine/select-imm-canon.ll | 35 +- llvm/test/Transforms/InstCombine/select.ll | 29 +- llvm/test/Transforms/InstCombine/set.ll | 85 +- .../Transforms/InstCombine/sign-test-and-or.ll | 243 ++- .../InstCombine/signed-truncation-check.ll | 416 +++++ .../test/Transforms/InstCombine/umul-sign-check.ll | 169 ++ .../usub-overflow-known-by-implied-cond.ll | 138 +- .../Transforms/InstCombine/widenable-conditions.ll | 143 ++ llvm/test/Transforms/InstCombine/zext-or-icmp.ll | 50 + llvm/test/Transforms/InstSimplify/gep.ll | 37 +- llvm/test/Transforms/LoopIdiom/memcpy.ll | 106 ++ llvm/test/Transforms/LoopUnroll/opt-levels.ll | 8 +- .../first-order-recurrence-complex.ll | 114 +- llvm/test/Transforms/LoopVectorize/loop-form.ll | 149 +- .../SLPVectorizer/X86/horizontal-list.ll | 52 + .../SampleProfile/Inputs/inline-replay.txt | 4 +- .../test/Transforms/SampleProfile/inline-replay.ll | 2 +- .../Transforms/SampleProfile/remarks-hotness.ll | 3 +- llvm/test/Transforms/SampleProfile/remarks.ll | 12 +- .../test/Transforms/SimpleLoopUnswitch/pipeline.ll | 39 + .../unique-internal-linkage-names.ll | 3 +- .../dsymutil/Inputs/private/tmp/dwarf5/dwarf5.o | Bin 0 -> 1976 bytes .../dsymutil/Inputs/private/tmp/dwarf5/dwarf5.out | Bin 0 -> 16912 bytes .../Inputs/private/tmp/eh_frame/eh_frame.o | Bin 0 -> 2352 bytes .../Inputs/private/tmp/eh_frame/eh_frame.out | Bin 0 -> 16840 bytes llvm/test/tools/dsymutil/X86/dwarf5.test | 59 + llvm/test/tools/dsymutil/X86/eh_frame.test | 26 + llvm/test/tools/llvm-readobj/ELF/dyn-symbols.test | 4 +- llvm/test/tools/llvm-readobj/ELF/dynamic-tags.test | 1 + llvm/test/tools/llvm-readobj/ELF/mips-got.test | 4 +- llvm/test/tools/llvm-readobj/ELF/mips-plt.test | 4 +- .../tools/llvm-readobj/ELF/section-symbols.test | 2 +- llvm/test/tools/llvm-readobj/ELF/symbol-shndx.test | 8 +- llvm/test/tools/llvm-readobj/ELF/symtab-shndx.test | 331 ++++ .../obj2yaml/ELF/call-graph-profile-section.yaml | 76 +- llvm/test/tools/obj2yaml/ELF/mips-abi-flags.yaml | 24 +- llvm/test/tools/obj2yaml/ELF/sht-symtab-shndx.yaml | 46 +- llvm/test/tools/obj2yaml/ELF/versym-section.yaml | 15 +- .../test/tools/yaml2obj/ELF/arm-exidx-section.yaml | 2 +- llvm/test/tools/yaml2obj/ELF/sht-symtab-shndx.yaml | 2 +- llvm/tools/dsymutil/DwarfLinkerForBinary.cpp | 117 +- llvm/tools/dsymutil/DwarfLinkerForBinary.h | 39 +- llvm/tools/dsymutil/MachOUtils.cpp | 80 +- llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp | 4 +- llvm/tools/llvm-ifs/llvm-ifs.cpp | 2 +- llvm/tools/llvm-objdump/MachODump.cpp | 4 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 236 ++- llvm/tools/obj2yaml/elf2yaml.cpp | 26 +- llvm/unittests/Analysis/ValueTrackingTest.cpp | 7 +- .../CodeGen/GlobalISel/PatternMatchTest.cpp | 8 + .../unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp | 49 +- llvm/unittests/MI/LiveIntervalTest.cpp | 8 +- llvm/unittests/Object/ELFTest.cpp | 33 + llvm/utils/TableGen/CodeGenDAGPatterns.cpp | 2 +- llvm/utils/TableGen/CodeGenInstruction.cpp | 2 +- llvm/utils/TableGen/CodeGenMapTable.cpp | 2 +- llvm/utils/TableGen/GlobalISelEmitter.cpp | 11 +- llvm/utils/TableGen/RISCVCompressInstEmitter.cpp | 6 +- llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 104 +- mlir/docs/Dialects/LLVM.md | 174 +- mlir/docs/Dialects/Linalg.md | 6 + mlir/lib/Bindings/Python/IRModules.cpp | 18 + mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 26 - mlir/lib/IR/FunctionImplementation.cpp | 19 +- mlir/test/Bindings/Python/ir_affine_map.py | 6 + mlir/test/Dialect/Tosa/inlining.mlir | 8 +- mlir/test/IR/core-ops.mlir | 3 - mlir/test/IR/invalid-func-op.mlir | 16 + .../mlir-linalg-ods-gen/test-linalg-ods-gen.tc | 49 +- .../mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp | 279 ++- openmp/CMakeLists.txt | 12 +- openmp/docs/ReleaseNotes.rst | 27 +- openmp/docs/design/Runtimes.rst | 91 + openmp/libomptarget/CMakeLists.txt | 4 +- .../libomptarget/deviceRTLs/nvptx/CMakeLists.txt | 5 +- openmp/libomptarget/plugins/amdgpu/CMakeLists.txt | 6 +- openmp/libomptarget/plugins/amdgpu/src/rtl.cpp | 2 +- .../plugins/common/MemoryManager/MemoryManager.h | 5 + openmp/libomptarget/src/CMakeLists.txt | 2 +- openmp/runtime/src/include/omp.h.var | 7 +- openmp/runtime/src/include/omp_lib.f90.var | 7 +- openmp/runtime/src/include/omp_lib.h.var | 10 +- openmp/runtime/src/kmp.h | 7 +- openmp/runtime/src/kmp_alloc.cpp | 51 +- openmp/runtime/src/kmp_barrier.cpp | 15 +- openmp/runtime/test/barrier/omp_barrier.c | 3 + 598 files changed, 37438 insertions(+), 9591 deletions(-) create mode 100644 clang/test/Driver/aix-pragma-pack.c create mode 100644 clang/test/Driver/fcs-profile-generate.c create mode 100644 clang/test/Layout/aix-power-natural-interaction.cpp create mode 100644 clang/test/PCH/aix-pragma-pack.c create mode 100644 clang/test/Sema/aix-pragma-pack-and-align.c rename clang/test/SemaOpenCL/{logical-ops.cl => operators.cl} (90%) create mode 100644 libc/src/ctype/isascii.cpp create mode 100644 libc/src/ctype/isascii.h create mode 100644 libc/src/ctype/toascii.cpp create mode 100644 libc/src/ctype/toascii.h create mode 100644 libc/test/src/ctype/isascii_test.cpp create mode 100644 libc/test/src/ctype/toascii_test.cpp create mode 100644 libcxx/include/support/openbsd/xlocale.h create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp128-fconstant.mir create mode 100644 llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-bit-counting-pred.ll create mode 100644 llvm/test/CodeGen/AMDGPU/early-term.mir create mode 100644 llvm/test/CodeGen/X86/call-rv-marker.ll create mode 100644 llvm/test/CodeGen/X86/pr48727.ll create mode 100644 llvm/test/LTO/X86/objc-arc-contract.ll create mode 100644 llvm/test/MachineVerifier/verifier-statepoint.mir create mode 100644 llvm/test/Transforms/Coroutines/coro-spill-promise.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/willreturn.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-amx-load-store.ll create mode 100644 llvm/test/Transforms/LoopIdiom/memcpy.ll create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/pipeline.ll create mode 100644 llvm/test/tools/dsymutil/Inputs/private/tmp/dwarf5/dwarf5.o create mode 100755 llvm/test/tools/dsymutil/Inputs/private/tmp/dwarf5/dwarf5.out create mode 100644 llvm/test/tools/dsymutil/Inputs/private/tmp/eh_frame/eh_frame.o create mode 100755 llvm/test/tools/dsymutil/Inputs/private/tmp/eh_frame/eh_frame.out create mode 100644 llvm/test/tools/dsymutil/X86/dwarf5.test create mode 100644 llvm/test/tools/dsymutil/X86/eh_frame.test create mode 100644 llvm/test/tools/llvm-readobj/ELF/symtab-shndx.test -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allnoconfig updated (64d586ad -> 574d2bd3)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allnoconfig in repository toolchain/ci/base-artifacts. discards 64d586ad 0: update: llvm-linux-qemu: boot new 574d2bd3 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (64d586ad) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 174 +- 02-prepare_abe/console.log | 444 +- 03-build_llvm/console.log | 13823 ++++++++++++------------ 04-build_linux/console.log | 654 +- 05-build_abe-qemu/console.log | 6830 ++++++------ 06-boot_linux/console.log | 8 +- 07-check_regression/console.log | 32 +- 08-update_baseline/console.log | 18 +- console.log | 21983 +++++++++++++++++++------------------- jenkins/manifest.sh | 18 +- 10 files changed, 21993 insertions(+), 21991 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (f102b470 -> fc1a9e5a)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig in repository toolchain/ci/base-artifacts. discards f102b470 0: update: llvm-linux-qemu: all new fc1a9e5a 0: update: llvm-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (f102b470) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 154 +- 02-prepare_abe/console.log | 438 +- 03-build_llvm/console.log | 13704 ++++++++++++------------ 04-build_linux/console.log | 900 +- 05-build_abe-qemu/console.log | 6671 ++++++------ 06-boot_linux/console.log | 6 +- 07-check_regression/console.log | 14 +- 08-update_baseline/console.log | 18 +- console.log | 21905 +++++++++++++++++++------------------- jenkins/manifest.sh | 18 +- 10 files changed, 21917 insertions(+), 21911 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (b3f846c59d -> 45240eed4f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/qemu. from b3f846c59d Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull- [...] adds c36c65ea3c target/arm: ARMv8.4-TTST extension adds 078e9fe3cb target/arm: enable Small Translation tables in max CPU adds 9a286bcdfd target/arm: fix typo in cpu.h ID_AA64PFR1 field name adds f6450bcb6b target/arm: make ARMCPU.clidr 64-bit adds a5fd319ae7 target/arm: make ARMCPU.ctr 64-bit adds 2a14526a6f target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_E [...] adds 00a92832f4 target/arm: add aarch64 ID register fields to cpu.h adds bd78b6be24 target/arm: add aarch32 ID register fields to cpu.h adds 8d6fda8c10 ui/cocoa: Update path to docs in build tree adds fa56cf7e86 docs: Add qemu-storage-daemon(1) manpage to meson.build adds e4d51ac692 target/arm: Don't decode insns in the XScale/iWMMXt space as [...] adds e7e29fdbbe hw/net/lan9118: Fix RX Status FIFO PEEK value adds 5cab6d5a5a hw/net/lan9118: Add symbolic constants for register offsets adds bcda710f6c hw/misc: Add clock converter in NPCM7XX CLK module adds 0be12dc76a hw/timer: Refactor NPCM7XX Timer to use CLK clock adds 77c05b0b74 hw/adc: Add an ADC module for NPCM7XX adds 1e943c586a hw/misc: Add a PWM module for NPCM7XX adds 73314f1384 hw/misc: Add QTest for NPCM7XX PWM Module adds 828d651c58 hw/*: Use type casting for SysBusDevice in NPCM7XX adds 1ff5a063d6 ui/cocoa: Fix openFile: deprecation on Big Sur adds f8e1d8852e Merge remote-tracking branch 'remotes/pmaydell/tags/pull-tar [...] adds 2c9dce0196 meson: do not use CONFIG_VIRTFS adds 9102c96821 whpx: rename whp-dispatch to whpx-internal.h adds 84f4ef17ae whpx: move internal definitions to whpx-internal.h adds dc83539872 cirrus/msys2: Exit powershell with $LastExitCode adds 29c7ac489f cirrus/msys2: Cache msys2 mingw in a better way. adds daee8de314 maintainers: Add me as Windows Hosted Continuous Integration [...] adds 9a46d044d8 whpx: move whpx_lapic_state from header to c file adds cb7abd8319 meson: fix Cocoa option in summary adds 4cbf8efc5b scripts/gdb: fix 'qemu coroutine' when users selects a non t [...] adds b9a0de3773 scripts/gdb: implement 'qemu bt' adds d533d6359b Docs/RCU: Correct sample code of qatomic_rcu_set adds 3eacf70bb5 meson: Propagate gnutls dependency adds eb8cb3d9dc virtio-scsi: trace events adds a23a6789c0 cocoa: do not enable coreaudio automatically adds 5cb69566da gtk: remove CONFIG_GTK_GL adds 9d71037f4b configure: move X11 detection to Meson adds 1b6954713f configure: move GTK+ detection to Meson adds c1ec49415c configure: move Cocoa incompatibility checks to Meson adds 835af8990c configure: quote command line arguments in config.status adds c117e5b11a target/i386: Use X86Seg enum for segment registers adds 6b63d12612 Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/fo [...] adds 50186051f4 Introduce yank feature adds fee091cdff block/nbd.c: Add yank feature adds 8ee4480692 chardev/char-socket.c: Add yank feature adds b5eea99ec2 migration: Add yank feature adds e4d2bfb170 io/channel-tls.c: make qio_channel_tls_shutdown thread-safe adds 8659f317d3 io: Document qmp oob suitability of qio_channel_shutdown and [...] adds 91d48e520a tests/test-char.c: Wait for the chardev to connect in char_s [...] adds 45240eed4f Merge remote-tracking branch 'remotes/armbru/tags/pull-yank- [...] No new revisions were added by this update. Summary of changes: .cirrus.yml | 119 +-- MAINTAINERS | 13 + block/meson.build | 2 +- block/nbd.c | 153 ++-- chardev/char-socket.c | 34 + configure | 93 +-- docs/devel/rcu.txt | 2 +- docs/meson.build | 1 + docs/system/arm/nuvoton.rst | 4 +- fsdev/meson.build | 2 +- hw/adc/meson.build | 1 + hw/adc/npcm7xx_adc.c | 301 ++++++++ hw/adc/trace-events | 5 + hw/adc/trace.h | 1 + hw/arm/npcm7xx.c | 55 +- hw/arm/npcm7xx_boards.c | 2 +- hw/mem/npcm7xx_mc.c | 2 +- hw/misc/meson.build | 1 + hw/misc/npcm7xx_clk.c | 797 ++++++++++++++++++++- hw/misc/npcm7xx_gcr.c | 2 +- hw/misc/npcm7xx_pwm.c | 550 ++++++++++++++ hw/misc/npcm7xx_rng.c | 2 +- hw/misc/trace-events | 6 + hw/net/lan9118.c | 26 +- hw/nvram/npcm7xx_otp.c | 2 +- hw/scsi/trace-events | 9 + hw/scsi/virtio-scsi.c | 30 +- hw/ssi/npcm7xx_fiu.c | 2 +- hw/timer/npcm7xx_timer.c | 39 +- include/hw/adc/npcm7xx_adc.h | 69 ++ include/hw/arm/npcm7xx.h | 4 + include/hw/misc/npcm7xx_clk.h | 146 +++- include/hw/misc/npcm7xx_pwm.h | 105 +++ include/hw/timer/npcm7xx_timer.h | 1 + include/io/channel.h | 5 +- include/qemu/yank.h | 97 +++ include/sysemu/whpx.h | 22 +- io/channel-tls.c | 6 +- io/meson.build | 2 +- meson.build | 58 +- meson_options.txt | 2 + migration/channel.c | 13 + migration/migration.c | 22 + migration/multifd.c | 10 + migration/qemu-file-channel.c | 7 + migration/savevm.c | 5 + qapi/meson.build | 1 + qapi/qapi-schema.json | 1 + qapi/yank.json | 119 +++ scripts/qemu-gdb.py | 1 + scripts/qemugdb/coroutine.py | 35 +- storage-daemon/meson.build | 2 +- target/arm/cpu.h | 85 ++- target/arm/cpu64.c | 1 + target/arm/helper.c | 15 +- target/arm/translate.c | 7 + target/i386/cpu.h | 4 +- target/i386/gdbstub.c | 2 +- target/i386/tcg/seg_helper.c | 8 +- target/i386/tcg/translate.c | 6 +- target/i386/whpx/whpx-all.c | 9 +- target/i386/whpx/whpx-apic.c | 9 +- target/i386/whpx/whpx-cpus.c | 4 +- .../i386/whpx/{whp-dispatch.h => whpx-internal.h} | 17 +- tests/meson.build | 6 +- tests/qtest/meson.build | 8 +- tests/qtest/npcm7xx_adc-test.c | 377 ++++++++++ tests/qtest/npcm7xx_pwm-test.c | 490 +++++++++++++ tests/test-char.c | 1 + ui/cocoa.m | 7 +- ui/gtk.c | 16 +- ui/meson.build | 11 +- util/meson.build | 1 + util/yank.c | 207 ++++++ 74 files changed, 3935 insertions(+), 345 deletions(-) create mode 100644 hw/adc/npcm7xx_adc.c create mode 100644 hw/adc/trace-events create mode 100644 hw/adc/trace.h create mode 100644 hw/misc/npcm7xx_pwm.c create mode 100644 include/hw/adc/npcm7xx_adc.h create mode 100644 include/hw/misc/npcm7xx_pwm.h create mode 100644 include/qemu/yank.h create mode 100644 qapi/yank.json rename target/i386/whpx/{whp-dispatch.h => whpx-internal.h} (93%) create mode 100644 tests/qtest/npcm7xx_adc-test.c create mode 100644 tests/qtest/npcm7xx_pwm-test.c create mode 100644 util/yank.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (a0d54b4f5b21 -> e609571b5ffa)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/linux. from a0d54b4f5b21 Merge tag 'trace-v5.11-rc2' of git://git.kernel.org/pub/sc [...] adds 2896c93811e3 scsi: target: Fix XCOPY NAA identifier lookup adds ea49c88f4071 Merge tag 'mkp-scsi-fixes' of git://git.kernel.org/pub/scm [...] adds 3d1a90ab0ed9 NFS4: Fix use-after-free in trace_event_raw_event_nfs4_set_lock adds c98e9daa59a6 NFS: Adjust fs_context error logging adds 86b53fbf08f4 net: sunrpc: interpret the return value of kstrtou32 correctly adds 67bbceedc9bb pNFS: Mark layout for return if return-on-close was not sent adds 078000d02d57 pNFS: We want return-on-close to complete when evicting the inode adds c18d1e17ba2f pNFS: Clean up pnfs_layoutreturn_free_lsegs() adds 2c8d5fc37fe2 pNFS: Stricter ordering of layoutget and layoutreturn adds 1757655d780d NFS/pNFS: Don't call pnfs_free_bucket_lseg() before removi [...] adds 46c9ea1d4fee NFS/pNFS: Don't leak DS commits in pnfs_generic_retry_commit() adds cb2856c59717 NFS/pNFS: Fix a leak of the layout 'plh_outstanding' counter adds 113aac6d567b NFS: nfs_delegation_find_inode_server must first reference [...] adds 896567ee7f17 NFS: nfs_igrab_and_active must first reference the superblock adds e609571b5ffa Merge tag 'nfs-for-5.11-2' of git://git.linux-nfs.org/proj [...] No new revisions were added by this update. Summary of changes: drivers/target/target_core_xcopy.c | 119 ++++++++++++++++++++++--------------- drivers/target/target_core_xcopy.h | 1 + fs/nfs/delegation.c | 12 ++-- fs/nfs/internal.h | 38 +++++++++--- fs/nfs/nfs4proc.c | 28 ++++----- fs/nfs/nfs4super.c | 4 +- fs/nfs/pnfs.c | 67 +++++++++++---------- fs/nfs/pnfs.h | 8 +-- fs/nfs/pnfs_nfs.c | 22 ++++--- net/sunrpc/addr.c | 2 +- 10 files changed, 170 insertions(+), 131 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (85aaa3e310c -> 14f322f074b)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/llvm-project. from 85aaa3e310c [X86] Regenerate sdiv_fix_sat.ll + udiv_fix_sat.ll tests adds dd955771240 Fix typo in diagnostic message adds a4931d4fe38 [AMDGPU] Regenerate umax crash test adds 3d9c51d111d [SVE][NFC] Regenerate a few CodeGen tests adds 348471575d9 Add -ansi option to CompileOnly group adds b117d17d264 [doc] Place sha256 in lld/README.md into backticks adds ef3800e8216 Return false from __has_declspec_attribute() if not explici [...] adds 5aefc8dc4d1 [llvm] [cmake] Remove obsolete /usr/local hack for *BSD adds bb9ebf6baf7 [Tests] Add tests for new InstCombine OR transformation, NFC adds 0529946b5ba [instCombine] Add (A ^ B) | ~(A | B) -> ~(A & B) adds 6f4d4607620 [Flang][openmp][openacc] Extend CheckNoBranching to handle [...] adds 03c8d6a0c4b [LegalizeDAG][RISCV][PowerPC][AMDGPU][WebAssembly] Improve [...] adds 4718ec01669 [clangd] Avoid recursion in TargetFinder::add() adds f748e922955 [NewPM] Run non-trivial loop unswitching under -O2/3/s/z adds a14040bd4d9 [RISCV] Use vmerge.vim for llvm.riscv.vfmerge with a 0.0 sc [...] adds 08d4a50467e [FunctionAttrs] Precommit tests for willreturn inference. adds eef4bdbb34d [libc++] Add a missing `<_Compare>` template argument. adds 79f99ba65d9 [libcxx] Port to OpenBSD adds 7ecad2e4ced [InstSimplify] Don't fold gep p, -p to null adds bdd1ad5e5c5 [OpenMP] Fixed include directories for OpenMP when building [...] adds 33e2494bea6 [libomptarget][amdgpu][nfc] Fix build on centos adds e5f51fdd650 [clang][aarch64] Precondition isHomogeneousAggregate on isC [...] adds 6cd44b204c6 [FunctionAttrs] Derive willreturn for fns with readonly` & [...] adds e53bbd99516 [IR] move nomerge attribute from function declaration/defin [...] adds 922a5b89411 [clang-tidy] Add test for Transformer-based checks with dia [...] adds d49974f9c98 [InstCombine] Regenerate test checks (NFC) adds 9f61fbd75ae [LV] Relax assumption that LCSSA implies single entry adds f706486eaf0 Fix for crash in __builtin_return_address in template context. adds fb063c933f0 [InstCombine] Duplicate tests for logical and/or (NFC) adds caafdf07bbc [LV] Weaken spuriously strong assert in LoopVersioning adds 46507a96fc1 [SLP] reduce code duplication while matching reductions; NFC adds 554be30a428 [SLP] reduce code duplication in processing reductions; NFC adds 92fb5c49e8a [SLP] rename variable to improve readability; NFC adds 9e7895a8682 [SLP] reduce code duplication while processing reductions; NFC adds 7583ae48a3c [RISCV] Add double test cases to vfmerge-rv32.ll. NFC adds e15f3ddcae6 [InstCombine] Add tests for logical and/or poison implicati [...] adds 71ed4b6ce57 [RISCV] Legalize select when Zbt extension available adds 23390e7a131 [InstCombine] Handle logical and/or in assume optimization adds 7fd18508134 [mlir] Update LLVM dialect type documentation adds 2a49b7c64a3 [Inliner] Change inline remark format and update ReplayInli [...] adds 68ff52ffead [OpenMP] Fixed the link error that cannot find static data member adds d1fa7afc7ae [AArch64] [Windows] Properly add :lo12: reloc specifiers wh [...] adds 02f1d28ed6b [libcxx] Avoid overflows in the windows __libcpp_steady_clo [...] adds 01f1273fe2f [OpenMP] Fixed a typo in openmp/CMakeLists.txt adds 3d397091591 AMDGPU: Remove wrapper only call limitation adds cf45731f0ea [Driver] Fix assertion failure when -fprofile-generate -fcs [...] adds 55f2eeebc96 [NFC] Disallow unused prefixes in MC/AMDGPU adds a7130d85e4b [ADT][NFC] Use empty base optimisation in BumpPtrAllocatorImpl adds 1730b0f66ad [RISCV] Remove '.mask' from vcompress intrinsic name. NFC adds 6166b91e837 [ELF][NFCI] small cleanup to OutputSections.h adds 175288a1afe Add sample-profile-suffix-elision-policy attribute with -fu [...] adds ddcb0aae8b0 [MIPatternMatch] Add matcher for G_PTR_ADD adds 8f5ec459375 [Sanitizer][Darwin] Fix test for macOS 11+ point releases adds 585612355cd [NFC] Disallow unused prefixes under MC/AMDGPU adds 0d88d7d82bc Delete unused function (was breaking the -Werror build) adds 314e29ed2b7 [AMDGPU] Add _e64 suffix to VOP3 Insts adds 04edcc02638 [libc] add isascii and toascii implementations adds 0c8466c0015 [libc][NFC] Use more specific comparison macros in LdExpTest.h. adds 76643c48cdd [LangRef] State that a nocapture pointer cannot be returned adds 25eb7b08ba7 [DAGCombiner] Fold BRCOND(FREEZE(COND)) to BRCOND(COND) adds 82655c15145 [MSan] Tweak CopyOrigin adds 25b3921f2fc [gn build] (manually) port 79f99ba65d96 adds c0f3ea8a08c [mlir][Python] Add checking process before create an Affine [...] adds 055644cc459 [X86][AMX] Prohibit pointer cast on load. adds 5c7dcd7aead [Coroutine] Update promise object's final layout index adds 6529d7c5a45 [PDB] Defer relocating .debug$S until commit time and paral [...] adds 6f0f0220380 [OpenMP] Update allocator trait key/value definitions adds acea470c167 [gn build] Reorganize libcxx/include/BUILD.gn a bit adds 0066a09579c [libc++] Give extern templates default visibility on gcc adds bba3a82b56c [OpenMP] Use persistent memory for omp_large_cap_mem adds 914e2f5a02f [NFC] Use generic name for scalable vector stack ID. adds e5553b9a6ab [dsymutil] Warn on timestmap mismatch between object file a [...] adds cd8a80de960 [Orc] Add a unit test for asynchronous definition generation. adds f454c9f102a [InlineSpiller] Re-tie operands if folding failed adds 8a47d875b07 [dsymutil] Copy eh_frame content into the dSYM companion file. adds 84e0b14a0a4 [libomptarget][nvptx] Include omp_data.cu in bitcode deviceRTL adds ad735badb69 [dsymutil] s/dwarfdump/llvm-dwarfdump/ in test adds 35e4998f0c9 [dsymutil] Fix spurious space in REQUIRES: line adds 790c75c1637 [AMDGPU] Add SI_EARLY_TERMINATE_SCC0 for early terminating shader adds 157efd84abf [Statepoint Lowering] Add an option to allow use gc values [...] adds fba9805ba34 [Verifier] Extend statepoint verifier to cover more constants adds 12fc9ca3a40 [llvm] Remove redundant string initialization (NFC) adds 2c2d489b78c [CodeGen] Remove unused function isRegLiveInExitBlocks (NFC) adds 8a20e2b3d3e [llvm] Use Optional::getValueOr (NFC) adds f1d5cbbdee5 [dsymutil] Add preliminary support for DWARF 5. adds 0b99385e151 [MSan] Partially revert some changes from D94552 adds 8f8c207b8f2 [Verifier] Add tied-ness verification to statepoint intsruction adds 3aeb30d1a68 [ARM] Additional tests for different interleaving patterns. NFC adds 141906fa149 [llvm-readelf/obj] - Add support of multiple SHT_SYMTAB_SHN [...] adds c29ca8551af [ARM] Update isVMOVNOriginalMask to handle single input shu [...] adds 6d3098e7ff9 [obj2yaml,yaml2obj] - Refine how we set/dump the sh_entsize field. adds cbea6737d51 [clang][driver] Restore the original help text for `-I` adds f638c2eb4ee [LTO] Replace anonymous namespace with static functions (NFC). adds 4cd48535eca [NFC][InstructionCost] Use InstructionCost in Transforms/Sc [...] adds 3122c66aee7 [AArch64][SVE] Remove chains of unnecessary SVE reinterpret [...] adds 0f59d099571 [X86][AVX] combineVectorSignBitsTruncation - limit AVX512 t [...] adds ad85e396706 [SVE] Add ISel pattern for addvl adds 1854594b80b Hwasan InitPrctl check for error using internal_iserror adds ceb9379a90f [ADT] Fix join_impl using the wrong size when calculating t [...] adds ada96fa6217 [LTO] Add test to ensure objc-arc-contract is executed. adds af1bb4bc823 Fix build errors after ceb9379a9 adds c6e341c8995 Revert "[dsymutil] Warn on timestmap mismatch between objec [...] adds 2170e0ee60d [SVE][CodeGen] CTLZ, CTTZ & CTPOP operations (predicates) adds f8cece18630 [ValueTracking] Fix one s/dyn_cast/dyn_cast_or_null/ adds 704831fe1f1 Revert "Hwasan InitPrctl check for error using internal_iserror" adds d307d892ade [Tests] Added test for memcpy loop idiom recognization adds 0a0ee7f5a5a [X86] canonicalizeShuffleMaskWithHorizOp - minor refactor t [...] adds ab577807165 [libc] Refresh benchmark progress bar when needed. adds 7c77b536efd [OpenCL] Improve OpenCL operator tests adds b7b1e8c37a9 [X86] Add tests for rv_marker lowering. adds 3bc7555ffac [mlir][linalg] Use attributes in named ops' indexing maps adds 90164ba957a [clangd] Split out a base class for delegating GlobalCompil [...] adds dda60035e9f [AArch64] Attempt to sink mul operands adds d55d592a921 GlobalISel: Do not set observer of MachineIRBuilder in Lega [...] adds 350c0552c66 [NFC][RISCV] Add double type in RISC-V V CodeGen test cases [...] adds 4e8e888905a [AArch64][GlobalISel] Add support for FCONSTANT of FP128 type adds 07b6aeb5685 [lld][WebAssembly] Fix for TLS + --relocatable adds f0abe2aeaca [Frontend] Add pragma align natural and sort out pragma pac [...] new a957634942a [OpenMP] Add documentation for error messages and release notes new 4fe17ada55a [OpenMP] Fix hierarchical barrier new 66d5994bd38 [clangd] Explicitly avoid background-indexing the same file twice. new 466acd69486 [clangd] Avoid reallocating buffers for each message read: new e433ca28ec9 [SLP] add reduction test for FMF; NFC new 17863614da1 [InstCombine] Fold select -> and/or using impliesPoison new a4f38668823 [clangd] Remove "decision-forest-base" experimental flag. new 0bbc6a6bb64 [clangd] Remove some old CodeCompletion options that are ne [...] new 05b1a15f703 [IROutliner] Adapting to hoisted bitcasts in CodeExtractor new 48d2068fb73 [dsymutil] Warn on timestmap mismatch between object file a [...] new cbbfc825861 [X86][SSE] canonicalizeShuffleMaskWithHorizOp - simplify sh [...] new efb6e45d2be [X86][AVX] Add test for another 'reverse HADD' pattern ment [...] new 993c488ed2b [DAG] visitVECTOR_SHUFFLE - use all_of to check for all-und [...] new 60fda8ebb6d [ARM] Add a pass that re-arranges blocks when there is a ba [...] new 14f322f074b [gn build] Port 60fda8ebb6d The 15 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/CodeComplete.cpp | 9 +- clang-tools-extra/clangd/CodeComplete.h | 11 - clang-tools-extra/clangd/FindTarget.cpp | 10 + clang-tools-extra/clangd/FindTarget.h | 3 + .../clangd/GlobalCompilationDatabase.cpp | 52 +- .../clangd/GlobalCompilationDatabase.h | 26 +- clang-tools-extra/clangd/JSONTransport.cpp | 56 +- clang-tools-extra/clangd/QueryDriverDatabase.cpp | 21 +- clang-tools-extra/clangd/index/Background.cpp | 7 +- clang-tools-extra/clangd/index/Background.h | 4 + clang-tools-extra/clangd/index/BackgroundQueue.cpp | 26 +- clang-tools-extra/clangd/tool/ClangdMain.cpp | 9 - .../clangd/unittests/BackgroundIndexTests.cpp | 76 +- .../clangd/unittests/CodeCompleteTests.cpp | 12 +- .../clangd/unittests/FindTargetTests.cpp | 41 + .../clang-tidy/TransformerClangTidyCheckTest.cpp | 38 +- clang/docs/ClangCommandLineReference.rst | 7 +- clang/include/clang/Basic/Attr.td | 7 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 6 +- clang/include/clang/Basic/LangOptions.def | 2 + clang/include/clang/Driver/Options.td | 18 +- clang/include/clang/Sema/Sema.h | 116 +- clang/include/clang/Serialization/ASTReader.h | 10 +- clang/include/clang/Serialization/ASTWriter.h | 5 + clang/lib/AST/RecordLayoutBuilder.cpp | 21 +- clang/lib/CodeGen/CGCXXABI.h | 7 + clang/lib/CodeGen/CGCall.cpp | 16 +- clang/lib/CodeGen/CodeGenModule.cpp | 3 - clang/lib/CodeGen/MicrosoftCXXABI.cpp | 16 +- clang/lib/CodeGen/TargetInfo.cpp | 6 +- clang/lib/Driver/ToolChains/Clang.cpp | 8 +- clang/lib/Frontend/CompilerInvocation.cpp | 1 + clang/lib/Lex/PPMacroExpansion.cpp | 10 +- clang/lib/Parse/ParsePragma.cpp | 29 +- clang/lib/Sema/Sema.cpp | 3 +- clang/lib/Sema/SemaAttr.cpp | 151 +- clang/lib/Sema/SemaChecking.cpp | 3 +- clang/lib/Serialization/ASTReader.cpp | 11 +- clang/lib/Serialization/ASTWriter.cpp | 10 +- clang/test/CodeGen/attr-nomerge.cpp | 54 +- clang/test/CodeGenCXX/homogeneous-aggregates.cpp | 69 + clang/test/Driver/aix-pragma-pack.c | 4 + clang/test/Driver/fcs-profile-generate.c | 15 + .../optimization-remark-with-hotness-new-pm.c | 2 +- .../Frontend/optimization-remark-with-hotness.c | 2 +- clang/test/Layout/aix-double-struct-member.cpp | 9 +- .../test/Layout/aix-power-natural-interaction.cpp | 146 ++ clang/test/PCH/aix-pragma-pack.c | 119 ++ clang/test/Sema/aix-pragma-pack-and-align.c | 229 +++ clang/test/Sema/builtin-returnaddress.c | 12 + clang/test/SemaOpenCL/invalid-vector-literals.cl | 1 - .../SemaOpenCL/{logical-ops.cl => operators.cl} | 6 + clang/test/SemaOpenCL/vector_inc_dec_ops.cl | 9 +- compiler-rt/lib/msan/msan_poisoning.cpp | 2 +- .../sanitizer_common/tests/sanitizer_mac_test.cpp | 18 +- flang/lib/Semantics/check-directive-structure.h | 15 +- flang/lib/Semantics/check-omp-structure.cpp | 9 +- flang/test/Semantics/omp-parallell01.f90 | 3 +- libc/benchmarks/LibcMemoryBenchmarkMain.cpp | 11 +- libc/config/linux/aarch64/entrypoints.txt | 2 + libc/config/linux/x86_64/entrypoints.txt | 2 + libc/spec/gnu_ext.td | 19 +- libc/spec/posix.td | 15 + libc/src/ctype/CMakeLists.txt | 16 + libc/src/ctype/isascii.cpp | 17 + libc/src/ctype/isascii.h | 18 + libc/src/ctype/toascii.cpp | 17 + libc/src/ctype/toascii.h | 18 + libc/test/src/ctype/CMakeLists.txt | 20 + libc/test/src/ctype/isascii_test.cpp | 23 + libc/test/src/ctype/toascii_test.cpp | 24 + libc/test/src/math/LdExpTest.h | 4 +- libcxx/docs/DesignDocs/VisibilityMacros.rst | 6 - libcxx/include/CMakeLists.txt | 1 + libcxx/include/__config | 17 +- libcxx/include/__locale | 2 + libcxx/include/algorithm | 7 +- libcxx/include/support/openbsd/xlocale.h | 19 + libcxx/src/chrono.cpp | 5 +- .../time/time.clock/time.clock.steady/now.pass.cpp | 2 + lld/COFF/Chunks.cpp | 113 +- lld/COFF/Chunks.h | 10 + lld/COFF/PDB.cpp | 643 ++++--- lld/ELF/OutputSections.h | 6 - lld/README.md | 2 +- lld/test/wasm/tls-no-shared.s | 2 +- lld/test/wasm/tls.s | 33 +- lld/wasm/Driver.cpp | 2 +- lld/wasm/InputFiles.cpp | 1 + lld/wasm/Writer.cpp | 2 +- llvm/CMakeLists.txt | 7 - llvm/docs/LangRef.rst | 3 +- llvm/include/llvm/ADT/StringExtras.h | 5 +- llvm/include/llvm/Analysis/InlineAdvisor.h | 19 + llvm/include/llvm/Analysis/ReplayInlineAdvisor.h | 3 +- .../GlobalISel/LegalizationArtifactCombiner.h | 4 +- .../llvm/CodeGen/GlobalISel/MIPatternMatch.h | 6 + .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 5 + llvm/include/llvm/CodeGen/ISDOpcodes.h | 9 +- llvm/include/llvm/CodeGen/MIRYamlMapping.h | 2 +- llvm/include/llvm/CodeGen/MachineLoopUtils.h | 4 - llvm/include/llvm/CodeGen/StackMaps.h | 9 + llvm/include/llvm/CodeGen/TargetFrameLowering.h | 2 +- llvm/include/llvm/DWARFLinker/DWARFLinker.h | 6 +- .../llvm/DWARFLinker/DWARFLinkerCompileUnit.h | 2 +- llvm/include/llvm/DWARFLinker/DWARFStreamer.h | 2 +- .../PDB/Native/DbiModuleDescriptorBuilder.h | 63 +- llvm/include/llvm/ExecutionEngine/Orc/Core.h | 3 + llvm/include/llvm/IR/Function.h | 4 + llvm/include/llvm/IR/IntrinsicsRISCV.td | 2 +- llvm/include/llvm/LTO/Config.h | 6 +- llvm/include/llvm/Object/ELF.h | 60 +- llvm/include/llvm/ObjectYAML/ELFYAML.h | 34 + llvm/include/llvm/Support/Allocator.h | 25 +- llvm/lib/Analysis/CallPrinter.cpp | 2 +- llvm/lib/Analysis/ConstraintSystem.cpp | 2 +- llvm/lib/Analysis/InlineAdvisor.cpp | 63 +- llvm/lib/Analysis/InstructionSimplify.cpp | 24 +- llvm/lib/Analysis/ReplayInlineAdvisor.cpp | 41 +- llvm/lib/Analysis/ValueTracking.cpp | 2 +- llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp | 2 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 9 +- llvm/lib/CodeGen/InlineSpiller.cpp | 27 +- llvm/lib/CodeGen/MachineLoopUtils.cpp | 11 - llvm/lib/CodeGen/MachineVerifier.cpp | 23 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 13 +- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 19 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 9 + .../CodeGen/SelectionDAG/StatepointLowering.cpp | 21 +- llvm/lib/CodeGen/StackMaps.cpp | 61 +- llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 2 +- llvm/lib/DWARFLinker/DWARFLinker.cpp | 45 +- llvm/lib/DWARFLinker/DWARFLinkerCompileUnit.cpp | 6 +- llvm/lib/DWARFLinker/DWARFStreamer.cpp | 50 +- .../PDB/Native/DbiModuleDescriptorBuilder.cpp | 81 +- llvm/lib/DebugInfo/PDB/Native/DbiStreamBuilder.cpp | 10 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 5 +- .../RuntimeDyld/RuntimeDyldChecker.cpp | 4 +- llvm/lib/LTO/LTOBackend.cpp | 31 +- llvm/lib/ObjectYAML/ELFEmitter.cpp | 46 +- llvm/lib/Passes/PassBuilder.cpp | 2 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 12 +- llvm/lib/Target/AArch64/AArch64FrameLowering.h | 4 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 39 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 20 +- llvm/lib/Target/AArch64/AArch64MCInstLower.cpp | 6 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 3 + .../AArch64/GISel/AArch64InstructionSelector.cpp | 17 +- .../Target/AArch64/GISel/AArch64LegalizerInfo.cpp | 4 +- llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp | 50 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 6 +- llvm/lib/Target/AMDGPU/AMDGPUInline.cpp | 23 - .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 60 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 18 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 18 +- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 34 +- llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 2 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 22 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 2 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 8 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 66 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 90 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 130 +- llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 6 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 8 +- llvm/lib/Target/AMDGPU/SISchedule.td | 2 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 6 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 533 +++--- llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 66 +- llvm/lib/Target/ARC/ARCTargetMachine.cpp | 4 +- llvm/lib/Target/ARM/ARM.h | 2 + llvm/lib/Target/ARM/ARMBlockPlacement.cpp | 227 +++ llvm/lib/Target/ARM/ARMISelLowering.cpp | 25 +- llvm/lib/Target/ARM/ARMTargetMachine.cpp | 3 + llvm/lib/Target/ARM/CMakeLists.txt | 1 + llvm/lib/Target/AVR/AVRTargetMachine.cpp | 2 +- llvm/lib/Target/BPF/BPFTargetMachine.cpp | 4 +- llvm/lib/Target/CSKY/CSKYTargetMachine.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 4 +- llvm/lib/Target/Lanai/LanaiTargetMachine.cpp | 4 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 11 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.h | 2 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 4 +- llvm/lib/Target/RISCV/RISCVInstrInfoB.td | 18 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 14 +- llvm/lib/Target/Sparc/SparcTargetMachine.cpp | 4 +- llvm/lib/Target/VE/VETargetMachine.cpp | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 75 +- llvm/lib/Target/XCore/XCoreTargetMachine.cpp | 4 +- llvm/lib/Transforms/Coroutines/CoroFrame.cpp | 16 +- llvm/lib/Transforms/IPO/Attributor.cpp | 2 +- llvm/lib/Transforms/IPO/FunctionAttrs.cpp | 18 + llvm/lib/Transforms/IPO/IROutliner.cpp | 19 +- llvm/lib/Transforms/IPO/SampleProfile.cpp | 2 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 8 + .../Transforms/InstCombine/InstCombineCalls.cpp | 4 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 18 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 6 +- .../Transforms/Scalar/LowerMatrixIntrinsics.cpp | 2 +- .../Transforms/Scalar/RewriteStatepointsForGC.cpp | 8 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 3 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 3 +- llvm/lib/Transforms/Utils/LoopVersioning.cpp | 2 +- .../Utils/UniqueInternalLinkageNames.cpp | 1 + .../Vectorize/LoopVectorizationLegality.cpp | 20 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 79 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 65 +- .../CodeGen/AArch64/GlobalISel/arm64-fallback.ll | 7 - .../GlobalISel/legalize-ext-csedebug-output.mir | 3 - .../GlobalISel/legalize-fp128-fconstant.mir | 22 + .../CodeGen/AArch64/aarch64-matrix-umull-smull.ll | 186 ++ llvm/test/CodeGen/AArch64/arm64-windows-calls.ll | 77 + llvm/test/CodeGen/AArch64/cfguard-checks.ll | 14 +- .../CodeGen/AArch64/debug-info-sve-dbg-declare.mir | 16 +- .../CodeGen/AArch64/debug-info-sve-dbg-value.mir | 8 +- llvm/test/CodeGen/AArch64/dllimport.ll | 12 +- .../AArch64/framelayout-sve-basepointer.mir | 2 +- .../AArch64/framelayout-sve-calleesaves-fix.mir | 2 +- .../AArch64/framelayout-sve-scavengingslot.mir | 2 +- llvm/test/CodeGen/AArch64/framelayout-sve.mir | 68 +- llvm/test/CodeGen/AArch64/live-debugvalues-sve.mir | 2 +- llvm/test/CodeGen/AArch64/mingw-refptr.ll | 14 +- llvm/test/CodeGen/AArch64/spillfill-sve.mir | 10 +- llvm/test/CodeGen/AArch64/split-vector-insert.ll | 12 +- .../test/CodeGen/AArch64/stack-protector-target.ll | 2 +- llvm/test/CodeGen/AArch64/sve-alloca-stackid.ll | 4 +- llvm/test/CodeGen/AArch64/sve-bit-counting-pred.ll | 141 ++ .../AArch64/sve-calling-convention-byref.ll | 12 +- llvm/test/CodeGen/AArch64/sve-gep.ll | 3 +- .../AArch64/sve-intrinsic-opts-reinterpret.ll | 56 + .../CodeGen/AArch64/sve-intrinsics-loads-nf.ll | 227 ++- .../AArch64/sve-ld1-addressing-mode-reg-imm.ll | 6 +- llvm/test/CodeGen/AArch64/sve-localstackalloc.mir | 2 +- ...pred-contiguous-ldst-addressing-mode-reg-imm.ll | 225 ++- ...ed-non-temporal-ldst-addressing-mode-reg-imm.ll | 72 +- .../AArch64/sve-st1-addressing-mode-reg-imm.ll | 6 +- llvm/test/CodeGen/AArch64/win-tls.ll | 6 +- llvm/test/CodeGen/AArch64/win_cst_pool.ll | 4 +- llvm/test/CodeGen/AArch64/windows-extern-weak.ll | 2 +- .../AMDGPU/GlobalISel/inst-select-add.s16.mir | 8 +- .../GlobalISel/inst-select-amdgcn.fmad.ftz.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.mir | 32 +- .../GlobalISel/inst-select-amdgcn.fmed3.s16.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir | 60 +- .../AMDGPU/GlobalISel/inst-select-ashr.s16.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-bswap.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fadd.s64.mir | 22 +- .../GlobalISel/inst-select-fcanonicalize.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-fma.s32.mir | 24 +- .../AMDGPU/GlobalISel/inst-select-fmad.s32.mir | 40 +- .../AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fmaxnum.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fminnum.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir | 6 +- .../AMDGPU/GlobalISel/inst-select-fract.f64.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir | 60 +- .../AMDGPU/GlobalISel/inst-select-lshr.s16.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-mul.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-pattern-add3.mir | 8 +- .../GlobalISel/inst-select-pattern-and-or.mir | 16 +- .../AMDGPU/GlobalISel/inst-select-pattern-or3.mir | 8 +- .../GlobalISel/inst-select-pattern-smed3.mir | 4 +- .../GlobalISel/inst-select-pattern-smed3.s16.mir | 4 +- .../GlobalISel/inst-select-pattern-umed3.mir | 4 +- .../GlobalISel/inst-select-pattern-umed3.s16.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-pattern-xor3.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-sext-inreg.mir | 20 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir | 8 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir | 60 +- .../AMDGPU/GlobalISel/inst-select-shl.s16.mir | 4 +- .../inst-select-shuffle-vector.v2s16.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-smulh.mir | 24 +- .../AMDGPU/GlobalISel/inst-select-umulh.mir | 24 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir | 4 +- .../GlobalISel/llvm.amdgcn.raw.buffer.load.ll | 4 +- .../GlobalISel/llvm.amdgcn.struct.buffer.load.ll | 8 +- llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir | 430 ++--- llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll | 4 +- .../CodeGen/AMDGPU/clamp-omod-special-case.mir | 12 +- ...coalescer-subranges-another-copymi-not-live.mir | 2 +- .../coalescer-subranges-another-prune-error.mir | 2 +- .../AMDGPU/coalescer-subregjoin-fullcopy.mir | 10 +- .../coalescer-with-subregs-bad-identical.mir | 16 +- .../CodeGen/AMDGPU/constant-fold-imm-immreg.mir | 10 +- .../CodeGen/AMDGPU/couldnt-join-subrange-3.mir | 16 +- .../CodeGen/AMDGPU/debug-value-scheduler-crash.mir | 12 +- llvm/test/CodeGen/AMDGPU/early-term.mir | 268 +++ llvm/test/CodeGen/AMDGPU/fdiv-nofpexcept.ll | 36 +- .../CodeGen/AMDGPU/fold-immediate-output-mods.mir | 16 +- llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir | 2 +- llvm/test/CodeGen/AMDGPU/fold_16bit_imm.mir | 2 +- llvm/test/CodeGen/AMDGPU/hazard-pass-ordering.mir | 2 +- llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir | 10 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll | 4 + llvm/test/CodeGen/AMDGPU/mai-hazards.mir | 166 +- .../AMDGPU/memory-legalizer-atomic-insert-end.mir | 2 +- llvm/test/CodeGen/AMDGPU/merge-load-store-vreg.mir | 4 +- .../AMDGPU/pei-build-spill-partial-agpr.mir | 176 +- llvm/test/CodeGen/AMDGPU/pei-build-spill.mir | 1848 ++++++++++---------- .../CodeGen/AMDGPU/power-sched-no-instr-sunit.mir | 4 +- .../AMDGPU/promote-constOffset-to-imm-gfx10.mir | 8 +- .../CodeGen/AMDGPU/promote-constOffset-to-imm.mir | 8 +- llvm/test/CodeGen/AMDGPU/r600-legalize-umax-bug.ll | 23 +- llvm/test/CodeGen/AMDGPU/regbank-reassign.mir | 8 +- .../CodeGen/AMDGPU/regcoal-subrange-join-seg.mir | 4 +- llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir | 2 +- ...coalescing-remove-partial-redundancy-assert.mir | 6 +- .../CodeGen/AMDGPU/rename-independent-subregs.mir | 2 +- .../CodeGen/AMDGPU/s_add_co_pseudo_lowering.mir | 14 +- .../sched-assert-onlydbg-value-empty-region.mir | 6 +- llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir | 34 +- ...d-handleMoveUp-subreg-def-across-subreg-def.mir | 12 +- llvm/test/CodeGen/AMDGPU/sched-prefer-non-mfma.mir | 4 +- llvm/test/CodeGen/AMDGPU/schedule-barrier.mir | 8 +- .../CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir | 24 +- llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir | 26 +- llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir | 2 +- llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir | 8 +- llvm/test/CodeGen/AMDGPU/setcc.ll | 16 +- llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir | 12 +- .../CodeGen/AMDGPU/smem-no-clause-coalesced.mir | 4 +- .../CodeGen/AMDGPU/spill-agpr-partially-undef.mir | 12 +- llvm/test/CodeGen/AMDGPU/spill-agpr.mir | 316 ++-- .../AMDGPU/stale-livevar-in-twoaddr-pass.mir | 2 +- .../CodeGen/AMDGPU/subreg-split-live-in-error.mir | 18 +- llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir | 2 +- llvm/test/CodeGen/AMDGPU/v_swap_b32.mir | 4 +- llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir | 24 +- llvm/test/CodeGen/AMDGPU/waitcnt.mir | 8 +- llvm/test/CodeGen/ARM/O3-pipeline.ll | 3 + llvm/test/CodeGen/PowerPC/spe.ll | 49 +- llvm/test/CodeGen/PowerPC/vsx.ll | 40 +- llvm/test/CodeGen/RISCV/double-br-fcmp.ll | 53 +- llvm/test/CodeGen/RISCV/double-fcmp.ll | 48 +- llvm/test/CodeGen/RISCV/double-select-fcmp.ll | 51 +- llvm/test/CodeGen/RISCV/float-br-fcmp.ll | 51 +- llvm/test/CodeGen/RISCV/float-fcmp.ll | 46 +- llvm/test/CodeGen/RISCV/float-select-fcmp.ll | 43 +- llvm/test/CodeGen/RISCV/half-br-fcmp.ll | 43 +- llvm/test/CodeGen/RISCV/half-fcmp.ll | 38 +- llvm/test/CodeGen/RISCV/half-select-fcmp.ll | 39 +- llvm/test/CodeGen/RISCV/rv32Zbb.ll | 137 +- llvm/test/CodeGen/RISCV/rv32Zbbp.ll | 138 +- llvm/test/CodeGen/RISCV/rv32Zbs.ll | 52 +- llvm/test/CodeGen/RISCV/rv32Zbt.ll | 480 ++--- llvm/test/CodeGen/RISCV/rv64Zbt.ll | 112 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll | 156 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll | 156 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll | 324 ++-- llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll | 296 ++-- llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll | 797 +++++++-- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll | 796 +++++++-- llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll | 372 +++- llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll | 210 +++ llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll | 796 +++++++-- llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll | 467 ++++- llvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll | 419 ++++- llvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll | 419 ++++- llvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll | 419 ++++- llvm/test/CodeGen/RISCV/rvv/vfredsum-rv32.ll | 419 ++++- llvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll | 424 ++++- llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll | 220 ++- llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll | 224 ++- llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll | 312 ++-- llvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll | 797 +++++++-- llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll | 388 +++- llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll | 388 +++- llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll | 519 ++++-- llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll | 388 +++- llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll | 1008 ++++++++--- llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll | 1008 ++++++++--- llvm/test/CodeGen/Thumb2/block-placement.mir | 345 ++++ llvm/test/CodeGen/Thumb2/mve-shuffleext.ll | 267 +++ llvm/test/CodeGen/Thumb2/mve-vcvt.ll | 51 + llvm/test/CodeGen/Thumb2/mve-vmovnstore.ll | 52 + llvm/test/CodeGen/Thumb2/mve-vqdmulh.ll | 81 +- llvm/test/CodeGen/WebAssembly/comparisons-f32.ll | 28 +- llvm/test/CodeGen/WebAssembly/comparisons-f64.ll | 28 +- llvm/test/CodeGen/WebAssembly/simd-comparisons.ll | 68 +- llvm/test/CodeGen/X86/call-rv-marker.ll | 175 ++ llvm/test/CodeGen/X86/haddsub-4.ll | 32 + llvm/test/CodeGen/X86/horizontal-sum.ll | 151 +- llvm/test/CodeGen/X86/non-value-mem-operand.mir | 6 +- llvm/test/CodeGen/X86/pr48727.ll | 51 + llvm/test/CodeGen/X86/select-prof-codegen.ll | 6 +- llvm/test/CodeGen/X86/statepoint-fixup-call.mir | 4 +- .../CodeGen/X86/statepoint-fixup-copy-prop-neg.mir | 6 +- llvm/test/CodeGen/X86/vector-pack-256.ll | 66 +- llvm/test/LTO/X86/objc-arc-contract.ll | 13 + llvm/test/MC/AMDGPU/add-sub-no-carry.s | 6 +- llvm/test/MC/AMDGPU/buf-fmt-d16-packed.s | 6 +- llvm/test/MC/AMDGPU/buf-fmt-d16-unpacked.s | 6 +- llvm/test/MC/AMDGPU/ds-gfx9.s | 4 +- llvm/test/MC/AMDGPU/ds.s | 12 +- llvm/test/MC/AMDGPU/flat-gfx10.s | 4 +- llvm/test/MC/AMDGPU/flat-global.s | 10 +- llvm/test/MC/AMDGPU/flat-scratch-instructions.s | 10 +- llvm/test/MC/AMDGPU/gfx10_asm_dpp16.s | 4 +- llvm/test/MC/AMDGPU/gfx10_asm_dpp8.s | 4 +- llvm/test/MC/AMDGPU/gfx10_asm_ds.s | 4 +- llvm/test/MC/AMDGPU/gfx10_asm_flat.s | 4 +- llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s | 4 +- llvm/test/MC/AMDGPU/gfx10_asm_smem.s | 4 +- llvm/test/MC/AMDGPU/gfx10_asm_sop.s | 4 +- llvm/test/MC/AMDGPU/gfx10_asm_vop1.s | 8 +- llvm/test/MC/AMDGPU/gfx10_asm_vop2.s | 4 +- llvm/test/MC/AMDGPU/gfx10_asm_vopc.s | 8 +- llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s | 8 +- llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s | 8 +- llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s | 4 +- llvm/test/MC/AMDGPU/hsa-metadata-kernel-args-v3.s | 6 +- llvm/test/MC/AMDGPU/hsa-metadata-kernel-args.s | 6 +- llvm/test/MC/AMDGPU/hsa-metadata-kernel-attrs-v3.s | 6 +- llvm/test/MC/AMDGPU/hsa-metadata-kernel-attrs.s | 6 +- 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llvm/test/MC/AMDGPU/sop1-err.s | 4 +- llvm/test/MC/AMDGPU/sop1.s | 16 +- llvm/test/MC/AMDGPU/sop2.s | 16 +- llvm/test/MC/AMDGPU/sopc.s | 4 +- llvm/test/MC/AMDGPU/sopk-err.s | 6 +- llvm/test/MC/AMDGPU/sopk.s | 14 +- llvm/test/MC/AMDGPU/sopp-err.s | 8 +- llvm/test/MC/AMDGPU/sopp.s | 4 +- llvm/test/MC/AMDGPU/vintrp-err.s | 4 +- llvm/test/MC/AMDGPU/vintrp.s | 4 +- llvm/test/MC/AMDGPU/vop1.s | 12 +- llvm/test/MC/AMDGPU/vop3-convert.s | 8 +- llvm/test/MC/AMDGPU/vop3-gfx9.s | 12 +- llvm/test/MC/AMDGPU/vop_dpp.s | 10 +- llvm/test/MC/AMDGPU/vop_dpp_expr.s | 4 +- llvm/test/MC/AMDGPU/vop_sdwa.s | 12 +- llvm/test/MC/AMDGPU/xdl-insts-err.s | 4 +- llvm/test/MachineVerifier/verifier-statepoint.mir | 30 + llvm/test/Object/invalid.test | 2 +- llvm/test/Object/obj2yaml.test | 1 + .../Transforms/Coroutines/coro-spill-promise.ll | 57 + llvm/test/Transforms/FunctionAttrs/willreturn.ll | 68 + .../Transforms/IROutliner/outlining-bitcasts.ll | 105 ++ .../Inline/optimization-remarks-passed-yaml.ll | 5 +- .../InstCombine/2006-12-15-Range-Test.ll | 82 +- .../InstCombine/2007-03-13-CompareMerge.ll | 27 +- .../Transforms/InstCombine/2007-05-10-icmp-or.ll | 27 +- .../InstCombine/2007-11-15-CompareMiscomp.ll | 27 +- .../Transforms/InstCombine/2008-01-13-AndCmpCmp.ll | 31 +- .../InstCombine/2008-02-28-OrFCmpCrash.ll | 52 +- .../InstCombine/2008-06-21-CompareMiscomp.ll | 27 +- llvm/test/Transforms/InstCombine/2008-08-05-And.ll | 78 +- .../test/Transforms/InstCombine/2012-02-28-ICmp.ll | 34 +- .../InstCombine/2012-03-10-InstCombine.ll | 74 +- .../InstCombine/X86/x86-amx-load-store.ll | 38 + llvm/test/Transforms/InstCombine/and-fcmp.ll | 1523 +++++++++++++++- .../Transforms/InstCombine/and-or-icmp-min-max.ll | 1024 ++++++++++- .../Transforms/InstCombine/and-or-icmp-nullptr.ll | 334 ++++ llvm/test/Transforms/InstCombine/and-or-icmps.ll | 448 +++++ llvm/test/Transforms/InstCombine/and.ll | 157 ++ llvm/test/Transforms/InstCombine/and2.ll | 35 + llvm/test/Transforms/InstCombine/assume.ll | 106 +- llvm/test/Transforms/InstCombine/bit-checks.ll | 843 +++++++-- ...mp-with-select-of-constant-threshold-pattern.ll | 80 +- llvm/test/Transforms/InstCombine/demorgan.ll | 16 + .../Transforms/InstCombine/dont-distribute-phi.ll | 54 +- .../Transforms/InstCombine/fold-bin-operand.ll | 8 + llvm/test/Transforms/InstCombine/freeze.ll | 12 + llvm/test/Transforms/InstCombine/icmp-custom-dl.ll | 18 + llvm/test/Transforms/InstCombine/icmp-logical.ll | 809 ++++++++- llvm/test/Transforms/InstCombine/icmp.ll | 92 + llvm/test/Transforms/InstCombine/ispow2.ll | 288 ++- .../InstCombine/logical-select-inseltpoison.ll | 42 + llvm/test/Transforms/InstCombine/logical-select.ll | 42 + llvm/test/Transforms/InstCombine/merge-icmp.ll | 49 +- .../Transforms/InstCombine/objsize-noverify.ll | 35 + llvm/test/Transforms/InstCombine/onehot_merge.ll | 472 +++++ llvm/test/Transforms/InstCombine/or-fcmp.ll | 1522 +++++++++++++++- llvm/test/Transforms/InstCombine/or.ll | 370 ++++ .../Transforms/InstCombine/prevent-cmp-merge.ll | 57 +- llvm/test/Transforms/InstCombine/range-check.ll | 301 +++- ...add-of-negative-is-non-zero-and-no-underflow.ll | 238 +++ ...egative-or-zero-is-non-zero-and-no-underflow.ll | 155 ++ .../result-of-usub-is-non-zero-and-no-overflow.ll | 411 +++++ llvm/test/Transforms/InstCombine/select-and-or.ll | 93 + .../InstCombine/select-crash-noverify.ll | 16 + .../Transforms/InstCombine/select-ctlz-to-cttz.ll | 57 +- .../Transforms/InstCombine/select-imm-canon.ll | 35 +- llvm/test/Transforms/InstCombine/select.ll | 29 +- llvm/test/Transforms/InstCombine/set.ll | 85 +- .../Transforms/InstCombine/sign-test-and-or.ll | 243 ++- .../InstCombine/signed-truncation-check.ll | 416 +++++ .../test/Transforms/InstCombine/umul-sign-check.ll | 169 ++ .../usub-overflow-known-by-implied-cond.ll | 138 +- .../Transforms/InstCombine/widenable-conditions.ll | 143 ++ llvm/test/Transforms/InstCombine/zext-or-icmp.ll | 50 + llvm/test/Transforms/InstSimplify/gep.ll | 37 +- llvm/test/Transforms/LoopIdiom/memcpy.ll | 106 ++ llvm/test/Transforms/LoopUnroll/opt-levels.ll | 8 +- .../first-order-recurrence-complex.ll | 114 +- llvm/test/Transforms/LoopVectorize/loop-form.ll | 149 +- .../SLPVectorizer/X86/horizontal-list.ll | 52 + .../SampleProfile/Inputs/inline-replay.txt | 4 +- .../test/Transforms/SampleProfile/inline-replay.ll | 2 +- .../Transforms/SampleProfile/remarks-hotness.ll | 3 +- llvm/test/Transforms/SampleProfile/remarks.ll | 12 +- .../test/Transforms/SimpleLoopUnswitch/pipeline.ll | 39 + .../unique-internal-linkage-names.ll | 3 +- llvm/test/tools/dsymutil/ARM/extern-alias.test | 4 +- .../dsymutil/Inputs/private/tmp/dwarf5/dwarf5.o | Bin 0 -> 1976 bytes .../dsymutil/Inputs/private/tmp/dwarf5/dwarf5.out | Bin 0 -> 16912 bytes .../Inputs/private/tmp/eh_frame/eh_frame.o | Bin 0 -> 2352 bytes .../Inputs/private/tmp/eh_frame/eh_frame.out | Bin 0 -> 16840 bytes llvm/test/tools/dsymutil/X86/dwarf5.test | 59 + llvm/test/tools/dsymutil/X86/eh_frame.test | 26 + llvm/test/tools/dsymutil/X86/swift-ast-x86_64.test | 2 +- .../tools/dsymutil/X86/timestamp-mismatch.test | 10 + llvm/test/tools/dsymutil/debug-map-parsing.test | 2 +- llvm/test/tools/llvm-readobj/ELF/dyn-symbols.test | 4 +- llvm/test/tools/llvm-readobj/ELF/dynamic-tags.test | 1 + llvm/test/tools/llvm-readobj/ELF/mips-got.test | 4 +- llvm/test/tools/llvm-readobj/ELF/mips-plt.test | 4 +- .../tools/llvm-readobj/ELF/section-symbols.test | 2 +- llvm/test/tools/llvm-readobj/ELF/symbol-shndx.test | 8 +- llvm/test/tools/llvm-readobj/ELF/symtab-shndx.test | 331 ++++ .../obj2yaml/ELF/call-graph-profile-section.yaml | 76 +- llvm/test/tools/obj2yaml/ELF/mips-abi-flags.yaml | 24 +- llvm/test/tools/obj2yaml/ELF/sht-symtab-shndx.yaml | 46 +- llvm/test/tools/obj2yaml/ELF/versym-section.yaml | 15 +- .../test/tools/yaml2obj/ELF/arm-exidx-section.yaml | 2 +- llvm/test/tools/yaml2obj/ELF/sht-symtab-shndx.yaml | 2 +- llvm/tools/dsymutil/BinaryHolder.cpp | 22 +- llvm/tools/dsymutil/BinaryHolder.h | 2 +- llvm/tools/dsymutil/DwarfLinkerForBinary.cpp | 124 +- llvm/tools/dsymutil/DwarfLinkerForBinary.h | 39 +- llvm/tools/dsymutil/MachOUtils.cpp | 80 +- llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp | 4 +- llvm/tools/llvm-ifs/llvm-ifs.cpp | 2 +- llvm/tools/llvm-objdump/MachODump.cpp | 4 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 236 ++- llvm/tools/obj2yaml/elf2yaml.cpp | 26 +- llvm/unittests/Analysis/ValueTrackingTest.cpp | 7 +- .../CodeGen/GlobalISel/PatternMatchTest.cpp | 8 + .../unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp | 49 +- llvm/unittests/MI/LiveIntervalTest.cpp | 8 +- llvm/unittests/Object/ELFTest.cpp | 33 + llvm/utils/TableGen/CodeGenDAGPatterns.cpp | 2 +- llvm/utils/TableGen/CodeGenInstruction.cpp | 2 +- llvm/utils/TableGen/CodeGenMapTable.cpp | 2 +- llvm/utils/TableGen/GlobalISelEmitter.cpp | 11 +- llvm/utils/TableGen/RISCVCompressInstEmitter.cpp | 6 +- llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 104 +- .../gn/secondary/llvm/lib/Target/ARM/BUILD.gn | 1 + mlir/docs/Dialects/LLVM.md | 174 +- mlir/docs/Dialects/Linalg.md | 6 + mlir/lib/Bindings/Python/IRModules.cpp | 18 + mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 26 - mlir/test/Bindings/Python/ir_affine_map.py | 6 + .../mlir-linalg-ods-gen/test-linalg-ods-gen.tc | 49 +- .../mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp | 279 ++- openmp/CMakeLists.txt | 12 +- openmp/docs/ReleaseNotes.rst | 27 +- openmp/docs/design/Runtimes.rst | 91 + openmp/libomptarget/CMakeLists.txt | 4 +- .../libomptarget/deviceRTLs/nvptx/CMakeLists.txt | 5 +- openmp/libomptarget/plugins/amdgpu/CMakeLists.txt | 6 +- openmp/libomptarget/plugins/amdgpu/src/rtl.cpp | 2 +- .../plugins/common/MemoryManager/MemoryManager.h | 5 + openmp/libomptarget/src/CMakeLists.txt | 2 +- openmp/runtime/src/include/omp.h.var | 7 +- openmp/runtime/src/include/omp_lib.f90.var | 7 +- openmp/runtime/src/include/omp_lib.h.var | 10 +- openmp/runtime/src/kmp.h | 7 +- openmp/runtime/src/kmp_alloc.cpp | 51 +- openmp/runtime/src/kmp_barrier.cpp | 15 +- openmp/runtime/test/barrier/omp_barrier.c | 3 + 609 files changed, 38239 insertions(+), 9698 deletions(-) create mode 100644 clang/test/Driver/aix-pragma-pack.c create mode 100644 clang/test/Driver/fcs-profile-generate.c create mode 100644 clang/test/Layout/aix-power-natural-interaction.cpp create mode 100644 clang/test/PCH/aix-pragma-pack.c create mode 100644 clang/test/Sema/aix-pragma-pack-and-align.c rename clang/test/SemaOpenCL/{logical-ops.cl => operators.cl} (90%) create mode 100644 libc/src/ctype/isascii.cpp create mode 100644 libc/src/ctype/isascii.h create mode 100644 libc/src/ctype/toascii.cpp create mode 100644 libc/src/ctype/toascii.h create mode 100644 libc/test/src/ctype/isascii_test.cpp create mode 100644 libc/test/src/ctype/toascii_test.cpp create mode 100644 libcxx/include/support/openbsd/xlocale.h create mode 100644 llvm/lib/Target/ARM/ARMBlockPlacement.cpp create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp128-fconstant.mir create mode 100644 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100755 llvm/test/tools/dsymutil/Inputs/private/tmp/dwarf5/dwarf5.out create mode 100644 llvm/test/tools/dsymutil/Inputs/private/tmp/eh_frame/eh_frame.o create mode 100755 llvm/test/tools/dsymutil/Inputs/private/tmp/eh_frame/eh_frame.out create mode 100644 llvm/test/tools/dsymutil/X86/dwarf5.test create mode 100644 llvm/test/tools/dsymutil/X86/eh_frame.test create mode 100644 llvm/test/tools/dsymutil/X86/timestamp-mismatch.test create mode 100644 llvm/test/tools/llvm-readobj/ELF/symtab-shndx.test -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (9bfbdd0c -> dd2d943d)

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