Tcwg-commits January 2021

tcwg-commits@lists.linaro.org

5 participants
9360 discussions

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_cross/gnu-master-arm-build_cross updated (87d583c6e8 -> 7137d682eb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_cross/gnu-master-arm-build_cross in repository toolchain/ci/glibc. from 87d583c6e8 install: Replace scripts/output-format.sed with objdump -f [ [...] adds 0400f92833 Makerules: Do not require startup files for format.lds probe object adds f430293d84 posix: consume less entropy on tempname new 2ef23b5205 x86: Set header.feature_1 in TCB for always-on CET [BZ #27177] new 86a4d3fa7d elf: work around a gcc bug in elf_get_dynamic_info new efbbd9c33a ldconfig/x86: Store ISA level in cache and aux cache new cf12900645 Use the right argument code in unnormal tests new 7137d682eb ifuncmain6pie: Remove the circular IFUNC dependency [BZ #20019] The 5 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: Makerules | 5 +- elf/Makefile | 2 + elf/cache.c | 39 ++++++-- elf/dl-cache.c | 4 + elf/get-dynamic-info.h | 41 ++++----- elf/ifuncmain6pie.c | 14 +-- elf/ifuncmod6.c | 8 +- elf/ldconfig.c | 18 ++-- elf/readelflib.c | 81 ++++++++++++++++- elf/readlib.c | 7 +- ...c-hwcaps-cache.c => tst-glibc-hwcaps-2-cache.c} | 22 ++--- .../etc/ld.so.conf | 0 .../postclean.req | 0 elf/tst-glibc-hwcaps-2-cache.script | 8 ++ math/libm-test-driver.c | 12 +-- math/libm-test-fpclassify.inc | 14 +-- math/libm-test-isinf.inc | 14 +-- math/libm-test-isnan.inc | 14 +-- math/libm-test-issignaling.inc | 14 +-- sysdeps/generic/dl-cache.h | 16 +++- .../xfchmod.c => sysdeps/generic/dl-isa-level.h | 15 ++-- .../xfchmod.c => sysdeps/generic/elf-read-prop.h | 22 +++-- sysdeps/generic/ldconfig.h | 22 +++-- sysdeps/posix/tempname.c | 17 +++- sysdeps/unix/sysv/linux/arm/readelflib.c | 22 ++--- sysdeps/unix/sysv/linux/ia64/readelflib.c | 22 ++--- sysdeps/unix/sysv/linux/mips/readelflib.c | 22 ++--- sysdeps/unix/sysv/linux/powerpc/readelflib.c | 22 ++--- sysdeps/unix/sysv/linux/riscv/readelflib.c | 22 ++--- sysdeps/unix/sysv/linux/s390/readelflib.c | 22 ++--- sysdeps/unix/sysv/linux/sparc/readelflib.c | 22 ++--- sysdeps/unix/sysv/linux/x86/elf-read-prop.h | 60 +++++++++++++ sysdeps/unix/sysv/linux/x86/readelflib.c | 23 ++--- sysdeps/unix/sysv/linux/x86_64/Makefile | 51 +++++++++++ .../sysv/linux/x86_64/tst-glibc-hwcaps-2.c} | 100 +++++++++------------ .../sysv/linux/x86_64/x86-64-isa-level-VALUE.c | 4 + sysdeps/x86/Makefile | 6 ++ sysdeps/x86/dl-cet.c | 5 +- support/xfchmod.c => sysdeps/x86/dl-isa-level.h | 19 ++-- sysdeps/x86/tst-setjmp-cet.c | 1 + 40 files changed, 548 insertions(+), 284 deletions(-) copy elf/{tst-glibc-hwcaps-cache.c => tst-glibc-hwcaps-2-cache.c} (67%) copy elf/{tst-glibc-hwcaps-cache.root => tst-glibc-hwcaps-2-cache.root}/etc/ld.so. [...] copy elf/{tst-glibc-hwcaps-cache.root => tst-glibc-hwcaps-2-cache.root}/postclean. [...] create mode 100644 elf/tst-glibc-hwcaps-2-cache.script copy support/xfchmod.c => sysdeps/generic/dl-isa-level.h (74%) copy support/xfchmod.c => sysdeps/generic/elf-read-prop.h (62%) create mode 100644 sysdeps/unix/sysv/linux/x86/elf-read-prop.h copy sysdeps/{x86/tst-isa-level-1.c => unix/sysv/linux/x86_64/tst-glibc-hwcaps-2.c} (52%) create mode 100644 sysdeps/unix/sysv/linux/x86_64/x86-64-isa-level-VALUE.c copy support/xfchmod.c => sysdeps/x86/dl-isa-level.h (61%) create mode 100644 sysdeps/x86/tst-setjmp-cet.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_cross/gnu-master-arm-build_cross updated (a958b2fc6da -> 796ead19f85)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_cross/gnu-master-arm-build_cross in repository toolchain/ci/gcc. from a958b2fc6da aarch64: Add support for unpacked SVE ASRD adds 67fbb7f0fda Daily bump. adds ab88f360723 analyzer: fix ICE merging dereferencing unknown ptrs [PR98628] adds 640296c367f make FOR_EACH_IMM_USE_STMT safe for early exits adds 240f0a490da Delete dead code in ix86_expand_sse_comi. adds 814299a9d49 c++: -Wmissing-field-initializers in unevaluated ctx [PR98620] adds ab96073df00 MAINTAINERS: Add myself for write after approval adds ff99d05f40f configure, make: Fix up --enable-link-serialization adds 13d47c37a2c reassoc: Optimize in reassoc x < 0 && y < 0 to (x | y) < 0 [...] adds 24ea113f75c widening_mul: Fix up ICE caused by my signed multiplication [...] adds b2230210f17 gcov: add more debugging facility adds e91910d3576 options: properly compare string arguments adds 52a170b1a18 tree-optimization/98550 - fix BB vect unrolling check adds e0bec6ceac4 c++: Fix ICE with CTAD in concept [PR98611] adds cf2ac1c30af [PR97969] LRA: Transform pattern `plus (plus (hard reg, con [...] adds 25bef68902f arm: Add movmisalign patterns for MVE (PR target/97875) adds 1aff68d54c3 Fix typo in function-abi.h adds 248feb2fa2c gcov: fix printf format for 32-bit hosts adds e2aa8a5f982 libcody: Simplify configure [PR 98414, 98509] adds 728fee7a798 MAINTAINERS: Fix spacing adds 5a9cfad2de9 Avoid a couple more ICEs in print_mem_ref (PR c/98597). adds cfaaa6a1ca7 syscall: ensure openat uses variadic libc wrapper adds 6851dda2e79 Daily bump. adds abb3993e49c amdgcn: Fix subdf3 pattern adds c8812bac8ee amdgcn: Improve FP division accuracy adds 3df6fac0080 amdgcn: Fix exec register live-on-entry to BB in md-reorg adds 7993fe1877a amdgcn: Remove dead code for fixed v0 register adds b668a06e37f i386: Optimize _mm_unpacklo_epi8 of 0 vector as second argu [...] adds 3f325179b32 [PATCH v2] aarch64: Add cpu cost tables for A64FX adds 6b70fa678b1 ipa: remove a dead code adds 5d057bfeff7 i386: Add define_insn_and_split patterns for btrl [PR96938] adds ffd28c265e6 tree-optimization/98640 - fix bogus sign-extension with VN adds 4c598b038df doc: Fix typos in C++ Modules documentation adds 0db5f488486 libstdc++: Remove <debug/array> from Doxygen config adds 7875e8dc831 if-to-switch: fix also virtual phis adds b1d1e2b54c6 i386, expand: Optimize also 256-bit and 512-bit permutatati [...] adds 2b356e689c3 hurd: libgcc unwinding over signal trampolines with SIGINFO adds c23aea6edc9 gcc-changelog: Allow modifications to old ChangeLogs without entry adds f04e7e540e2 libstdc++: Fix typo in ChangeLog-2020 adds e9cb89b936f Hurd: Enable ifunc by default adds 40b371a7c2f sh: Remove match_scratch operand test adds 6d75168146f rtl-ssa: Fix reversed comparisons in accesses.h comment adds 5ab67cdee61 aarch64: Tighten condition on sve/sel* tests adds 3ddc18251a8 tree-optimization/92645 - improve SLP with existing vectors adds cf7a3353061 aarch64: Add support for unpacked SVE MLA and MAD adds 264a1269b44 aarch64: Add support for unpacked SVE MLS and MSB adds 11cbea852b0 c++: Fix cp_build_function_call_vec [PR 98626] adds a2d04f3d2c9 mklog: support define_insn_and_split format adds 285fa338b06 tree-optimization/92645 - avoid harmful early BIT_FIELD_REF [...] adds 7d7ef413ef1 gcc-changelog: Support multiline parentheses wrapping adds 8fc183ccd06 match.pd: Fold (~X | C) ^ D into (X | C) ^ (~D ^ C) if (~D [...] new 796ead19f85 c++: Failure to lookup using-decl name [PR98231] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 8 + MAINTAINERS | 7 +- contrib/ChangeLog | 5 + contrib/gcc-changelog/git_commit.py | 44 +- contrib/gcc-changelog/test_email.py | 12 + contrib/gcc-changelog/test_patches.txt | 82 + contrib/mklog.py | 12 +- contrib/test_mklog.py | 42 + gcc/ChangeLog | 284 +++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 6 + gcc/analyzer/store.cc | 7 +- gcc/c-family/ChangeLog | 8 + gcc/c-family/c-pretty-print.c | 10 +- gcc/cgraphunit.c | 2 - gcc/config.gcc | 4 +- gcc/config/aarch64/aarch64-cost-tables.h | 103 + gcc/config/aarch64/aarch64-sve.md | 176 +- gcc/config/aarch64/aarch64.c | 79 +- gcc/config/arm/arm.c | 9 + gcc/config/arm/arm.h | 40 + gcc/config/arm/mve.md | 23 + gcc/config/arm/neon.md | 25 - gcc/config/arm/vec-common.md | 23 + gcc/config/gcn/gcn-valu.md | 62 +- gcc/config/gcn/gcn.c | 28 +- gcc/config/gcn/gcn.md | 3 +- gcc/config/i386/i386-builtins.h | 4 - gcc/config/i386/i386-expand.c | 31 +- gcc/config/i386/i386.md | 65 + gcc/config/i386/predicates.md | 32 + gcc/config/i386/sse.md | 186 ++ gcc/config/ia64/ia64.c | 9 + gcc/config/mips/mips.c | 9 + gcc/config/rs6000/rs6000.c | 10 + gcc/config/sh/sh.md | 3 +- gcc/config/sparc/sparc.c | 6 + gcc/configure | 7 +- gcc/configure.ac | 7 +- gcc/cp/ChangeLog | 22 + gcc/cp/module.cc | 4 +- gcc/cp/name-lookup.c | 10 + gcc/cp/name-lookup.h | 1 + gcc/cp/pt.c | 3 + gcc/cp/tree.c | 5 +- gcc/cp/typeck2.c | 2 + gcc/d/ChangeLog | 10 + gcc/doc/invoke.texi | 4 +- gcc/doc/tree-ssa.texi | 16 +- gcc/function-abi.h | 2 +- gcc/gcov.c | 43 +- gcc/gimple-if-to-switch.cc | 11 +- gcc/gimple-ssa-strength-reduction.c | 2 +- gcc/go/gofrontend/MERGE | 2 +- gcc/graphite-scop-detection.c | 4 +- gcc/ipa-modref.c | 4 +- gcc/ipa-pure-const.c | 8 +- gcc/ipa-sra.c | 22 +- gcc/lra-eliminations.c | 28 +- gcc/match.pd | 14 +- gcc/optabs.c | 8 +- gcc/optc-save-gen.awk | 6 +- gcc/profile.c | 5 + gcc/rtl-ssa/accesses.h | 8 +- gcc/ssa-iterators.h | 39 +- gcc/testsuite/ChangeLog | 148 ++ gcc/testsuite/g++.dg/cpp2a/concepts-ctad1.C | 16 + gcc/testsuite/g++.dg/cpp2a/concepts-ctad2.C | 13 + gcc/testsuite/g++.dg/lookup/using63.C | 17 + gcc/testsuite/g++.dg/opt/pr98550.C | 96 + .../g++.dg/warn/Wmissing-field-initializers-2.C | 44 + gcc/testsuite/g++.dg/warn/Wuninitialized-13.C | 28 + gcc/testsuite/g++.target/aarch64/sve/cond_mla_1.C | 33 + gcc/testsuite/g++.target/aarch64/sve/cond_mla_2.C | 33 + gcc/testsuite/g++.target/aarch64/sve/cond_mla_3.C | 33 + gcc/testsuite/g++.target/aarch64/sve/cond_mla_4.C | 36 + gcc/testsuite/g++.target/aarch64/sve/cond_mla_5.C | 33 + gcc/testsuite/g++.target/aarch64/sve/cond_mls_1.C | 33 + gcc/testsuite/g++.target/aarch64/sve/cond_mls_2.C | 33 + gcc/testsuite/g++.target/aarch64/sve/cond_mls_3.C | 33 + gcc/testsuite/g++.target/aarch64/sve/cond_mls_4.C | 36 + gcc/testsuite/g++.target/aarch64/sve/cond_mls_5.C | 33 + gcc/testsuite/gcc.c-torture/compile/pr98629.c | 11 + gcc/testsuite/gcc.c-torture/execute/pr95731.c | 40 + gcc/testsuite/gcc.dg/analyzer/pr98628.c | 19 + gcc/testsuite/gcc.dg/pr69047.c | 4 +- gcc/testsuite/gcc.dg/torture/pr98640.c | 22 + gcc/testsuite/gcc.dg/tree-ssa/pr95731.c | 22 + gcc/testsuite/gcc.dg/tree-ssa/pr96691.c | 21 + gcc/testsuite/gcc.dg/tree-ssa/pr98455.c | 19 + gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-54.c | 6 +- gcc/testsuite/gcc.dg/uninit-39.c | 47 + gcc/testsuite/gcc.target/aarch64/sve/mla_2.c | 34 + gcc/testsuite/gcc.target/aarch64/sve/mls_2.c | 34 + gcc/testsuite/gcc.target/aarch64/sve/sel_1.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/sel_2.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/sel_3.c | 2 +- gcc/testsuite/gcc.target/arm/pr97969.c | 54 + gcc/testsuite/gcc.target/arm/simd/mve-vneg.c | 3 + gcc/testsuite/gcc.target/gcn/fpdiv.c | 38 + gcc/testsuite/gcc.target/i386/pr92645-6.c | 34 + gcc/testsuite/gcc.target/i386/pr92645-7.c | 24 + gcc/testsuite/gcc.target/i386/pr95905-1.c | 26 + gcc/testsuite/gcc.target/i386/pr95905-2.c | 82 + gcc/testsuite/gcc.target/i386/pr95905-3.c | 82 + gcc/testsuite/gcc.target/i386/pr95905-4.c | 82 + gcc/testsuite/gcc.target/i386/pr96938.c | 66 + gcc/tree-predcom.c | 2 +- gcc/tree-ssa-ccp.c | 2 +- gcc/tree-ssa-dce.c | 2 +- gcc/tree-ssa-dse.c | 8 +- gcc/tree-ssa-loop-ivopts.c | 2 +- gcc/tree-ssa-math-opts.c | 37 +- gcc/tree-ssa-phiprop.c | 2 +- gcc/tree-ssa-reassoc.c | 62 +- gcc/tree-ssa-sccvn.c | 15 +- gcc/tree-ssa.c | 2 +- gcc/tree-vect-slp.c | 75 +- libcody/ChangeLog | 17 + libcody/Makefile.in | 121 +- libcody/Makesub.in | 49 - libcody/build-aux/config.guess | 1476 ------------ libcody/build-aux/config.sub | 1833 --------------- libcody/build-aux/install-sh | 518 ---- libcody/config.h.in | 5 +- libcody/config.m4 | 182 -- libcody/configure | 209 +- libcody/configure.ac | 15 +- libcody/dox.cfg.in | 2478 -------------------- libcody/fatal.cc | 22 - libcody/gdbinit.in | 11 - libcody/internal.hh | 3 - libgcc/config/i386/gnu-unwind.h | 60 +- libgo/go/syscall/exec_linux.go | 2 +- libstdc++-v3/ChangeLog-2020 | 2 +- libstdc++-v3/doc/doxygen/user.cfg.in | 1 - 136 files changed, 3230 insertions(+), 7215 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-ctad1.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-ctad2.C create mode 100644 gcc/testsuite/g++.dg/lookup/using63.C create mode 100644 gcc/testsuite/g++.dg/opt/pr98550.C create mode 100644 gcc/testsuite/g++.dg/warn/Wmissing-field-initializers-2.C create mode 100644 gcc/testsuite/g++.dg/warn/Wuninitialized-13.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/cond_mla_1.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/cond_mla_2.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/cond_mla_3.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/cond_mla_4.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/cond_mla_5.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/cond_mls_1.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/cond_mls_2.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/cond_mls_3.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/cond_mls_4.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/cond_mls_5.C create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr98629.c create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr95731.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr98628.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr98640.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr95731.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr96691.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr98455.c create mode 100644 gcc/testsuite/gcc.dg/uninit-39.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/mla_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/mls_2.c create mode 100644 gcc/testsuite/gcc.target/arm/pr97969.c create mode 100644 gcc/testsuite/gcc.target/gcn/fpdiv.c create mode 100644 gcc/testsuite/gcc.target/i386/pr92645-6.c create mode 100644 gcc/testsuite/gcc.target/i386/pr92645-7.c create mode 100644 gcc/testsuite/gcc.target/i386/pr95905-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr95905-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr95905-3.c create mode 100644 gcc/testsuite/gcc.target/i386/pr95905-4.c create mode 100644 gcc/testsuite/gcc.target/i386/pr96938.c delete mode 100644 libcody/Makesub.in delete mode 100755 libcody/build-aux/config.guess delete mode 100755 libcody/build-aux/config.sub delete mode 100755 libcody/build-aux/install-sh delete mode 100644 libcody/dox.cfg.in delete mode 100644 libcody/gdbinit.in -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_cross/gnu-master-arm-build_cross updated (c6185dce03 -> 4120e4885b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_cross/gnu-master-arm-build_cross in repository toolchain/ci/binutils-gdb. from c6185dce03 gdb: convert aarch64 to new-style debug macros adds 254c3783fe sim: tests: get common tests working again adds eabdd87b2e Automatic date update in version.in adds 03c02f3116 GCC: Check if AR works with --plugin and rc adds 83b33c6cb9 Binutils: Check if AR works with --plugin and rc adds 44124a4683 binuitils: Check if AR is usable for LTO build adds f631b79abe sim: or1k: delete redundant SIM_AC_OPTION_INLINE call adds f220ef633c sim: common: use #error properly adds 68895f7d7e sim: README-HACKING: clean up stale run references adds 5e9e2f41eb sim: or1k: clean up stale build entries adds e998918e98 sim: or1k: fix mixing of code & decl warning adds 7c654b719d gdb/fortran: add symbol base comparison operators adds ce38f5edf1 gdb: fix debug dump of OP_BOOL expressions adds 6d104cac0a Updated translations for some subdirectories adds c2e9a4a3ed elf/x86-64: Adjust R_AMD64_DIR64/R_AMD64_DIR32 for PE/x86-64 inputs adds 18bfb5057f [gdb/testsuite] Require is_amd64_regs_target in gdb.base/dis [...] adds d546b61084 Implement a workaround for GNU mak jobserver adds 5291fe3cd1 aarch64: Add support for bfloat16 in gdb. adds b2f2ae0d6f gdb: remove pre_init_ui_hook from top.c adds 3f94e58859 [gdb/testsuite] Add have_mpx in lib/gdb.exp adds 16e9019ef7 gdb: move baud_rate and serial_parity declarations to serial.h adds fe7a351a8e gdb: move read{now,never}_symbol_files declarations to symfile.h adds 24a7f1b548 gdb: fix indentation in infrun.c adds 3034143dc6 src-release: fix indentation adds 4180301e81 Automatic date update in version.in adds 62fe7512a7 sim: watch: fix pc watchpoints on little endian host systems adds c54f3efdc2 sim: watch: fix range expression processing adds 2ce40d1a51 Add SEH support to code generated by dlltool. adds 8c4645b488 Remove sflag_info param from wild callback functions adds b209b5a6b8 SHF_LINK_ORDER fixup_link_order in ld adds 5347ed60c5 Regen Makefile.in for jobserver.m4 aclocal.m4 dependency adds 844bf810cf x86: Don't generate GOT_symbol for PLT relocations adds b634d11d61 ld: Check for ELF input before accessing ELF section data adds 54ca900277 gdb: convert jit to new-style debug macros adds 5e12f48ffb gdb: bool-ify file_is_auto_load_safe adds db972fce46 gdb: bool-ify ext_lang_auto_load_enabled and friends adds 5bf7e91b2b gdb: bool-ify users of file_is_auto_load_safe adds 506195754c gdb: bool-ify maybe_add_script_{text,file} adds fb0f5031bb gdb: turn arc_debug into a bool adds d8d1feb424 gdb: convert arc to new-style debug macros new 4120e4885b Re: SHF_LINK_ORDER fixup_link_order in ld The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 17 + bfd/ChangeLog | 32 + bfd/Makefile.in | 1 + bfd/aclocal.m4 | 1 + bfd/bfd-in2.h | 7 +- bfd/configure | 32 +- bfd/configure.ac | 2 + bfd/doc/Makefile.in | 1 + bfd/elflink.c | 194 - bfd/reloc.c | 7 + bfd/section.c | 7 +- bfd/version.h | 2 +- binutils/ChangeLog | 30 + binutils/Makefile.in | 1 + binutils/aclocal.m4 | 1 + binutils/configure | 32 +- binutils/configure.ac | 2 + binutils/dlltool.c | 50 +- binutils/doc/Makefile.in | 1 + binutils/po/fr.po | 3826 ++++++------ config/ChangeLog | 11 + config/gcc-plugin.m4 | 12 + config/jobserver.m4 | 24 + configure | 107 + configure.ac | 4 + gas/ChangeLog | 32 + gas/Makefile.in | 1 + gas/aclocal.m4 | 1 + gas/config/tc-i386.c | 39 +- gas/configure | 32 +- gas/configure.ac | 2 + gas/doc/Makefile.in | 1 + gas/po/fr.po | 7239 ++++++++++++----------- gas/testsuite/gas/i386/i386.exp | 4 + gas/testsuite/gas/i386/no-got.d | 17 + gas/testsuite/gas/i386/no-got.s | 5 + gas/testsuite/gas/i386/x86-64-no-got.d | 17 + gas/testsuite/gas/i386/x86-64-no-got.s | 5 + gdb/ChangeLog | 95 + gdb/aarch64-tdep.c | 5 + gdb/arc-linux-nat.c | 16 +- gdb/arc-linux-tdep.c | 43 +- gdb/arc-newlib-tdep.c | 11 +- gdb/arc-tdep.c | 151 +- gdb/arc-tdep.h | 7 +- gdb/auto-load.c | 82 +- gdb/auto-load.h | 16 +- gdb/expprint.c | 9 +- gdb/extension-priv.h | 2 +- gdb/extension.c | 7 +- gdb/extension.h | 5 +- gdb/f-exp.y | 36 +- gdb/features/aarch64-fpu.c | 5 + gdb/features/aarch64-fpu.xml | 2 + gdb/guile/guile-internal.h | 5 +- gdb/guile/scm-auto-load.c | 5 +- gdb/infrun.c | 2 +- gdb/jit.c | 64 +- gdb/main.c | 1 + gdb/python/py-auto-load.c | 5 +- gdb/python/python-internal.h | 5 +- gdb/serial.c | 7 +- gdb/serial.h | 8 + gdb/symfile.c | 10 +- gdb/symfile.h | 8 + gdb/target.h | 6 - gdb/testsuite/ChangeLog | 35 + gdb/testsuite/gdb.arch/aarch64-fp.exp | 25 + gdb/testsuite/gdb.arch/i386-mpx-call.c | 78 +- gdb/testsuite/gdb.arch/i386-mpx-call.exp | 17 +- gdb/testsuite/gdb.arch/i386-mpx-map.c | 45 +- gdb/testsuite/gdb.arch/i386-mpx-map.exp | 23 +- gdb/testsuite/gdb.arch/i386-mpx-sigsegv.c | 80 +- gdb/testsuite/gdb.arch/i386-mpx-sigsegv.exp | 15 +- gdb/testsuite/gdb.arch/i386-mpx-simple_segv.c | 40 +- gdb/testsuite/gdb.arch/i386-mpx-simple_segv.exp | 15 +- gdb/testsuite/gdb.arch/i386-mpx.c | 98 +- gdb/testsuite/gdb.arch/i386-mpx.exp | 22 +- gdb/testsuite/gdb.base/disasm-optim.exp | 2 +- gdb/testsuite/gdb.fortran/debug-expr.exp | 8 + gdb/testsuite/gdb.fortran/dot-ops.exp | 30 + gdb/testsuite/lib/gdb.exp | 52 + gdb/top.c | 5 - gdb/top.h | 4 - gprof/ChangeLog | 16 + gprof/Makefile.in | 1 + gprof/aclocal.m4 | 1 + gprof/configure | 32 +- gprof/configure.ac | 2 + ld/ChangeLog | 87 + ld/Makefile.in | 1 + ld/aclocal.m4 | 1 + ld/configure | 32 +- ld/configure.ac | 2 + ld/emultempl/aarch64elf.em | 2 +- ld/emultempl/armelf.em | 2 +- ld/emultempl/beos.em | 2 +- ld/emultempl/cskyelf.em | 2 +- ld/emultempl/hppaelf.em | 2 +- ld/emultempl/m68hc1xelf.em | 2 +- ld/emultempl/metagelf.em | 2 +- ld/emultempl/mipself.em | 2 +- ld/emultempl/mmo.em | 2 +- ld/emultempl/msp430.em | 5 +- ld/emultempl/nios2elf.em | 2 +- ld/emultempl/pe.em | 4 +- ld/emultempl/pep.em | 4 +- ld/emultempl/ppc64elf.em | 2 +- ld/emultempl/spuelf.em | 4 +- ld/emultempl/vms.em | 2 +- ld/ldelf.c | 8 +- ld/ldelfgen.c | 252 +- ld/ldlang.c | 46 +- ld/ldlang.h | 11 +- ld/testsuite/ld-elf/pr26256-2a.d | 1 - ld/testsuite/ld-elf/pr26256-2b.d | 3 +- ld/testsuite/ld-elf/pr26256-3b.d | 1 - ld/testsuite/ld-x86-64/pe-x86-64-5.obj.bz2 | Bin 0 -> 685 bytes ld/testsuite/ld-x86-64/pe-x86-64-5.od | 34 + ld/testsuite/ld-x86-64/pe-x86-64-5.rd | 19 + ld/testsuite/ld-x86-64/pe-x86-64.exp | 10 + libctf/ChangeLog | 16 + libctf/Makefile.in | 1 + libctf/aclocal.m4 | 1 + libctf/configure | 32 +- libctf/configure.ac | 2 + libiberty/ChangeLog | 5 + libiberty/configure | 103 + libtool.m4 | 9 +- opcodes/ChangeLog | 20 + opcodes/Makefile.in | 1 + opcodes/aclocal.m4 | 1 + opcodes/configure | 32 +- opcodes/configure.ac | 2 + opcodes/po/sr.po | 515 +- sim/ChangeLog | 4 + sim/README-HACKING | 2 - sim/common/ChangeLog | 17 + sim/common/sim-events.c | 4 +- sim/common/sim-events.h | 4 +- sim/common/sim-profile.h | 2 +- sim/common/sim-watch.c | 4 +- sim/or1k/ChangeLog | 17 + sim/or1k/Makefile.in | 12 +- sim/or1k/configure | 44 +- sim/or1k/configure.ac | 1 - sim/or1k/traps.c | 8 +- sim/testsuite/ChangeLog | 16 +- sim/testsuite/common/alu-tst.c | 7 +- sim/testsuite/common/bits-gen.c | 25 +- sim/testsuite/common/bits-tst.c | 39 +- src-release.sh | 68 +- zlib/ChangeLog.bin-gdb | 5 + zlib/configure | 14 +- 154 files changed, 7982 insertions(+), 6663 deletions(-) create mode 100644 config/jobserver.m4 create mode 100644 gas/testsuite/gas/i386/no-got.d create mode 100644 gas/testsuite/gas/i386/no-got.s create mode 100644 gas/testsuite/gas/i386/x86-64-no-got.d create mode 100644 gas/testsuite/gas/i386/x86-64-no-got.s create mode 100644 ld/testsuite/ld-x86-64/pe-x86-64-5.obj.bz2 create mode 100644 ld/testsuite/ld-x86-64/pe-x86-64-5.od create mode 100644 ld/testsuite/ld-x86-64/pe-x86-64-5.rd -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_cross/gnu-master-arm-build_cross updated (aba38bed -> 53b33caf)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_cross/gnu-master-arm-build_cross in repository toolchain/ci/base-artifacts. discards aba38bed 2: update: binutils-gcc-glibc-qemu: 0 discards a0071fd2 1: reset: binutils-50ad1254d5030d0804cbf89c758359ae202e8d55: 0 discards 0386296d 0: update: qemu-7b09f127738ae3d0e71716cea086fc8f847a5686: 6 new 53b33caf 0: update: binutils-gcc-glibc-qemu: 6 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (aba38bed) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_cross/gnu-master-arm-bui [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 113 +- 02-prepare_abe/console.log | 152 +- 04-build_abe-binutils/console.log | 7100 +++- 05-build_abe-stage1/console.log | 10520 +++++ 06-build_abe-linux/console.log | 1044 + 07-build_abe-glibc/console.log | 20209 ++++++++++ 08-build_abe-stage2/console.log | 21488 +++++++++++ 09-build_abe-qemu/console.log | 3475 ++ 10-check_regression/console.log | 24 +- 11-update_baseline/console.log | 145 +- 11-update_baseline/results.regressions | 4 - console.log | 64270 ++++++++++++++++++++++++++++++- jenkins/manifest.sh | 20 +- results | 12 + 14 files changed, 125844 insertions(+), 2732 deletions(-) create mode 100644 05-build_abe-stage1/console.log create mode 100644 06-build_abe-linux/console.log create mode 100644 07-build_abe-glibc/console.log create mode 100644 08-build_abe-stage2/console.log create mode 100644 09-build_abe-qemu/console.log delete mode 100644 11-update_baseline/results.regressions -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[gcc] branch devel/omp/gcc-10 updated (8f8ba463960 -> b50819e4f63)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch devel/omp/gcc-10 in repository gcc. from 8f8ba463960 amdgcn: Remove dead code for fixed v0 register new 32baff589db [og10] openacc: Adjust loop lowering for AMD GCN new b50819e4f63 [og10] vect: Add target hook to prefer gather/scatter instructions The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/config/gcn/gcn.c | 2 + gcc/doc/tm.texi | 5 + gcc/doc/tm.texi.in | 2 + gcc/omp-offload.c | 160 ++++++++++++++++----- gcc/target.def | 8 ++ gcc/tree-vect-stmts.c | 9 +- .../libgomp.oacc-c-c++-common/loop-gwv-1.c | 15 +- .../libgomp.oacc-c-c++-common/loop-red-gwv-1.c | 17 ++- .../libgomp.oacc-c-c++-common/loop-red-wv-1.c | 16 +++ .../libgomp.oacc-c-c++-common/loop-wv-1.c | 16 +++ .../libgomp.oacc-c-c++-common/routine-gwv-1.c | 17 ++- .../libgomp.oacc-c-c++-common/routine-wv-1.c | 16 +++ 12 files changed, 238 insertions(+), 45 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig updated (b3f846c59d -> 45240eed4f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/qemu. from b3f846c59d Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull- [...] adds c36c65ea3c target/arm: ARMv8.4-TTST extension adds 078e9fe3cb target/arm: enable Small Translation tables in max CPU adds 9a286bcdfd target/arm: fix typo in cpu.h ID_AA64PFR1 field name adds f6450bcb6b target/arm: make ARMCPU.clidr 64-bit adds a5fd319ae7 target/arm: make ARMCPU.ctr 64-bit adds 2a14526a6f target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_E [...] adds 00a92832f4 target/arm: add aarch64 ID register fields to cpu.h adds bd78b6be24 target/arm: add aarch32 ID register fields to cpu.h adds 8d6fda8c10 ui/cocoa: Update path to docs in build tree adds fa56cf7e86 docs: Add qemu-storage-daemon(1) manpage to meson.build adds e4d51ac692 target/arm: Don't decode insns in the XScale/iWMMXt space as [...] adds e7e29fdbbe hw/net/lan9118: Fix RX Status FIFO PEEK value adds 5cab6d5a5a hw/net/lan9118: Add symbolic constants for register offsets adds bcda710f6c hw/misc: Add clock converter in NPCM7XX CLK module adds 0be12dc76a hw/timer: Refactor NPCM7XX Timer to use CLK clock adds 77c05b0b74 hw/adc: Add an ADC module for NPCM7XX adds 1e943c586a hw/misc: Add a PWM module for NPCM7XX adds 73314f1384 hw/misc: Add QTest for NPCM7XX PWM Module adds 828d651c58 hw/*: Use type casting for SysBusDevice in NPCM7XX adds 1ff5a063d6 ui/cocoa: Fix openFile: deprecation on Big Sur adds f8e1d8852e Merge remote-tracking branch 'remotes/pmaydell/tags/pull-tar [...] adds 2c9dce0196 meson: do not use CONFIG_VIRTFS adds 9102c96821 whpx: rename whp-dispatch to whpx-internal.h adds 84f4ef17ae whpx: move internal definitions to whpx-internal.h adds dc83539872 cirrus/msys2: Exit powershell with $LastExitCode adds 29c7ac489f cirrus/msys2: Cache msys2 mingw in a better way. adds daee8de314 maintainers: Add me as Windows Hosted Continuous Integration [...] adds 9a46d044d8 whpx: move whpx_lapic_state from header to c file adds cb7abd8319 meson: fix Cocoa option in summary adds 4cbf8efc5b scripts/gdb: fix 'qemu coroutine' when users selects a non t [...] adds b9a0de3773 scripts/gdb: implement 'qemu bt' adds d533d6359b Docs/RCU: Correct sample code of qatomic_rcu_set adds 3eacf70bb5 meson: Propagate gnutls dependency adds eb8cb3d9dc virtio-scsi: trace events adds a23a6789c0 cocoa: do not enable coreaudio automatically adds 5cb69566da gtk: remove CONFIG_GTK_GL adds 9d71037f4b configure: move X11 detection to Meson adds 1b6954713f configure: move GTK+ detection to Meson adds c1ec49415c configure: move Cocoa incompatibility checks to Meson adds 835af8990c configure: quote command line arguments in config.status adds c117e5b11a target/i386: Use X86Seg enum for segment registers adds 6b63d12612 Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/fo [...] adds 50186051f4 Introduce yank feature adds fee091cdff block/nbd.c: Add yank feature adds 8ee4480692 chardev/char-socket.c: Add yank feature adds b5eea99ec2 migration: Add yank feature adds e4d2bfb170 io/channel-tls.c: make qio_channel_tls_shutdown thread-safe adds 8659f317d3 io: Document qmp oob suitability of qio_channel_shutdown and [...] adds 91d48e520a tests/test-char.c: Wait for the chardev to connect in char_s [...] adds 45240eed4f Merge remote-tracking branch 'remotes/armbru/tags/pull-yank- [...] No new revisions were added by this update. Summary of changes: .cirrus.yml | 119 +-- MAINTAINERS | 13 + block/meson.build | 2 +- block/nbd.c | 153 ++-- chardev/char-socket.c | 34 + configure | 93 +-- docs/devel/rcu.txt | 2 +- docs/meson.build | 1 + docs/system/arm/nuvoton.rst | 4 +- fsdev/meson.build | 2 +- hw/adc/meson.build | 1 + hw/adc/npcm7xx_adc.c | 301 ++++++++ hw/adc/trace-events | 5 + hw/adc/trace.h | 1 + hw/arm/npcm7xx.c | 55 +- hw/arm/npcm7xx_boards.c | 2 +- hw/mem/npcm7xx_mc.c | 2 +- hw/misc/meson.build | 1 + hw/misc/npcm7xx_clk.c | 797 ++++++++++++++++++++- hw/misc/npcm7xx_gcr.c | 2 +- hw/misc/npcm7xx_pwm.c | 550 ++++++++++++++ hw/misc/npcm7xx_rng.c | 2 +- hw/misc/trace-events | 6 + hw/net/lan9118.c | 26 +- hw/nvram/npcm7xx_otp.c | 2 +- hw/scsi/trace-events | 9 + hw/scsi/virtio-scsi.c | 30 +- hw/ssi/npcm7xx_fiu.c | 2 +- hw/timer/npcm7xx_timer.c | 39 +- include/hw/adc/npcm7xx_adc.h | 69 ++ include/hw/arm/npcm7xx.h | 4 + include/hw/misc/npcm7xx_clk.h | 146 +++- include/hw/misc/npcm7xx_pwm.h | 105 +++ include/hw/timer/npcm7xx_timer.h | 1 + include/io/channel.h | 5 +- include/qemu/yank.h | 97 +++ include/sysemu/whpx.h | 22 +- io/channel-tls.c | 6 +- io/meson.build | 2 +- meson.build | 58 +- meson_options.txt | 2 + migration/channel.c | 13 + migration/migration.c | 22 + migration/multifd.c | 10 + migration/qemu-file-channel.c | 7 + migration/savevm.c | 5 + qapi/meson.build | 1 + qapi/qapi-schema.json | 1 + qapi/yank.json | 119 +++ scripts/qemu-gdb.py | 1 + scripts/qemugdb/coroutine.py | 35 +- storage-daemon/meson.build | 2 +- target/arm/cpu.h | 85 ++- target/arm/cpu64.c | 1 + target/arm/helper.c | 15 +- target/arm/translate.c | 7 + target/i386/cpu.h | 4 +- target/i386/gdbstub.c | 2 +- target/i386/tcg/seg_helper.c | 8 +- target/i386/tcg/translate.c | 6 +- target/i386/whpx/whpx-all.c | 9 +- target/i386/whpx/whpx-apic.c | 9 +- target/i386/whpx/whpx-cpus.c | 4 +- .../i386/whpx/{whp-dispatch.h => whpx-internal.h} | 17 +- tests/meson.build | 6 +- tests/qtest/meson.build | 8 +- tests/qtest/npcm7xx_adc-test.c | 377 ++++++++++ tests/qtest/npcm7xx_pwm-test.c | 490 +++++++++++++ tests/test-char.c | 1 + ui/cocoa.m | 7 +- ui/gtk.c | 16 +- ui/meson.build | 11 +- util/meson.build | 1 + util/yank.c | 207 ++++++ 74 files changed, 3935 insertions(+), 345 deletions(-) create mode 100644 hw/adc/npcm7xx_adc.c create mode 100644 hw/adc/trace-events create mode 100644 hw/adc/trace.h create mode 100644 hw/misc/npcm7xx_pwm.c create mode 100644 include/hw/adc/npcm7xx_adc.h create mode 100644 include/hw/misc/npcm7xx_pwm.h create mode 100644 include/qemu/yank.h create mode 100644 qapi/yank.json rename target/i386/whpx/{whp-dispatch.h => whpx-internal.h} (93%) create mode 100644 tests/qtest/npcm7xx_adc-test.c create mode 100644 tests/qtest/npcm7xx_pwm-test.c create mode 100644 util/yank.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[glibc] branch release/2.28/master updated (4a68828e37 -> 44fd8887d0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch release/2.28/master in repository glibc. from 4a68828e37 x86: Set header.feature_1 in TCB for always-on CET [BZ #27177] new 44fd8887d0 x86: Check IFUNC definition in unrelocated executable [BZ #20019] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: NEWS | 1 + elf/Makefile | 2 ++ elf/ifuncmain6pie.c | 14 +++----------- elf/ifuncmod6.c | 8 ++++---- sysdeps/i386/dl-machine.h | 16 +++++++++++----- sysdeps/x86_64/dl-machine.h | 16 +++++++++++----- 6 files changed, 32 insertions(+), 25 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig updated (a7130d85e4b -> 82c4153e66f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/llvm-project. from a7130d85e4b [ADT][NFC] Use empty base optimisation in BumpPtrAllocatorImpl adds 1730b0f66ad [RISCV] Remove '.mask' from vcompress intrinsic name. NFC adds 6166b91e837 [ELF][NFCI] small cleanup to OutputSections.h adds 175288a1afe Add sample-profile-suffix-elision-policy attribute with -fu [...] adds ddcb0aae8b0 [MIPatternMatch] Add matcher for G_PTR_ADD adds 8f5ec459375 [Sanitizer][Darwin] Fix test for macOS 11+ point releases adds 585612355cd [NFC] Disallow unused prefixes under MC/AMDGPU adds 0d88d7d82bc Delete unused function (was breaking the -Werror build) adds 314e29ed2b7 [AMDGPU] Add _e64 suffix to VOP3 Insts adds 04edcc02638 [libc] add isascii and toascii implementations adds 0c8466c0015 [libc][NFC] Use more specific comparison macros in LdExpTest.h. adds 76643c48cdd [LangRef] State that a nocapture pointer cannot be returned adds 25eb7b08ba7 [DAGCombiner] Fold BRCOND(FREEZE(COND)) to BRCOND(COND) adds 82655c15145 [MSan] Tweak CopyOrigin adds 25b3921f2fc [gn build] (manually) port 79f99ba65d96 adds c0f3ea8a08c [mlir][Python] Add checking process before create an Affine [...] adds 055644cc459 [X86][AMX] Prohibit pointer cast on load. adds 5c7dcd7aead [Coroutine] Update promise object's final layout index adds 6529d7c5a45 [PDB] Defer relocating .debug$S until commit time and paral [...] adds 6f0f0220380 [OpenMP] Update allocator trait key/value definitions adds acea470c167 [gn build] Reorganize libcxx/include/BUILD.gn a bit adds 0066a09579c [libc++] Give extern templates default visibility on gcc adds bba3a82b56c [OpenMP] Use persistent memory for omp_large_cap_mem adds 914e2f5a02f [NFC] Use generic name for scalable vector stack ID. adds e5553b9a6ab [dsymutil] Warn on timestmap mismatch between object file a [...] adds cd8a80de960 [Orc] Add a unit test for asynchronous definition generation. adds f454c9f102a [InlineSpiller] Re-tie operands if folding failed adds 8a47d875b07 [dsymutil] Copy eh_frame content into the dSYM companion file. adds 84e0b14a0a4 [libomptarget][nvptx] Include omp_data.cu in bitcode deviceRTL adds ad735badb69 [dsymutil] s/dwarfdump/llvm-dwarfdump/ in test adds 35e4998f0c9 [dsymutil] Fix spurious space in REQUIRES: line adds 790c75c1637 [AMDGPU] Add SI_EARLY_TERMINATE_SCC0 for early terminating shader adds 157efd84abf [Statepoint Lowering] Add an option to allow use gc values [...] adds fba9805ba34 [Verifier] Extend statepoint verifier to cover more constants adds 12fc9ca3a40 [llvm] Remove redundant string initialization (NFC) adds 2c2d489b78c [CodeGen] Remove unused function isRegLiveInExitBlocks (NFC) adds 8a20e2b3d3e [llvm] Use Optional::getValueOr (NFC) adds f1d5cbbdee5 [dsymutil] Add preliminary support for DWARF 5. adds 0b99385e151 [MSan] Partially revert some changes from D94552 adds 8f8c207b8f2 [Verifier] Add tied-ness verification to statepoint intsruction adds 3aeb30d1a68 [ARM] Additional tests for different interleaving patterns. NFC adds 141906fa149 [llvm-readelf/obj] - Add support of multiple SHT_SYMTAB_SHN [...] adds c29ca8551af [ARM] Update isVMOVNOriginalMask to handle single input shu [...] adds 6d3098e7ff9 [obj2yaml,yaml2obj] - Refine how we set/dump the sh_entsize field. adds cbea6737d51 [clang][driver] Restore the original help text for `-I` adds f638c2eb4ee [LTO] Replace anonymous namespace with static functions (NFC). adds 4cd48535eca [NFC][InstructionCost] Use InstructionCost in Transforms/Sc [...] adds 3122c66aee7 [AArch64][SVE] Remove chains of unnecessary SVE reinterpret [...] adds 0f59d099571 [X86][AVX] combineVectorSignBitsTruncation - limit AVX512 t [...] adds ad85e396706 [SVE] Add ISel pattern for addvl adds 1854594b80b Hwasan InitPrctl check for error using internal_iserror adds ceb9379a90f [ADT] Fix join_impl using the wrong size when calculating t [...] adds ada96fa6217 [LTO] Add test to ensure objc-arc-contract is executed. adds af1bb4bc823 Fix build errors after ceb9379a9 adds c6e341c8995 Revert "[dsymutil] Warn on timestmap mismatch between objec [...] adds 2170e0ee60d [SVE][CodeGen] CTLZ, CTTZ & CTPOP operations (predicates) adds f8cece18630 [ValueTracking] Fix one s/dyn_cast/dyn_cast_or_null/ adds 704831fe1f1 Revert "Hwasan InitPrctl check for error using internal_iserror" adds d307d892ade [Tests] Added test for memcpy loop idiom recognization adds 0a0ee7f5a5a [X86] canonicalizeShuffleMaskWithHorizOp - minor refactor t [...] adds ab577807165 [libc] Refresh benchmark progress bar when needed. adds 7c77b536efd [OpenCL] Improve OpenCL operator tests adds b7b1e8c37a9 [X86] Add tests for rv_marker lowering. adds 3bc7555ffac [mlir][linalg] Use attributes in named ops' indexing maps adds 90164ba957a [clangd] Split out a base class for delegating GlobalCompil [...] adds dda60035e9f [AArch64] Attempt to sink mul operands adds d55d592a921 GlobalISel: Do not set observer of MachineIRBuilder in Lega [...] adds 350c0552c66 [NFC][RISCV] Add double type in RISC-V V CodeGen test cases [...] adds 4e8e888905a [AArch64][GlobalISel] Add support for FCONSTANT of FP128 type adds 07b6aeb5685 [lld][WebAssembly] Fix for TLS + --relocatable adds f0abe2aeaca [Frontend] Add pragma align natural and sort out pragma pac [...] adds a957634942a [OpenMP] Add documentation for error messages and release notes adds 4fe17ada55a [OpenMP] Fix hierarchical barrier adds 66d5994bd38 [clangd] Explicitly avoid background-indexing the same file twice. adds 466acd69486 [clangd] Avoid reallocating buffers for each message read: adds e433ca28ec9 [SLP] add reduction test for FMF; NFC adds 17863614da1 [InstCombine] Fold select -> and/or using impliesPoison adds a4f38668823 [clangd] Remove "decision-forest-base" experimental flag. adds 0bbc6a6bb64 [clangd] Remove some old CodeCompletion options that are ne [...] adds 05b1a15f703 [IROutliner] Adapting to hoisted bitcasts in CodeExtractor adds 48d2068fb73 [dsymutil] Warn on timestmap mismatch between object file a [...] adds cbbfc825861 [X86][SSE] canonicalizeShuffleMaskWithHorizOp - simplify sh [...] adds efb6e45d2be [X86][AVX] Add test for another 'reverse HADD' pattern ment [...] adds 993c488ed2b [DAG] visitVECTOR_SHUFFLE - use all_of to check for all-und [...] adds 60fda8ebb6d [ARM] Add a pass that re-arranges blocks when there is a ba [...] adds 14f322f074b [gn build] Port 60fda8ebb6d adds a50bb84ec0c [flang] Fix classification of shape inquiries in specificat [...] adds a2e6506c47b [Hexagon] Improve legalizing of ISD::SETCC result adds 123674a8167 [SLP] simplify type check for reductions adds 166e5c335cb [flang] Do not create HostAssoc symbols in derived type scopes adds b3154d11bc6 [CSSPGO][llvm-profgen] Pseudo probe decoding and disassembling adds 414930b91bf [CSSPGO][llvm-profgen] Refactor to unify hashable interface [...] adds c681400b25a [CSSPGO][llvm-profgen] Virtual unwinding with pseudo probe adds 33a8466531e [NFC] fix missing SectionName declaration adds 3bd620d4504 [mlir] Correct 2 places that result in corrupted conversion [...] adds e7a371f9fd0 [LLD][COFF] Avoid std::vector resizes during type merging adds bb72adcaee7 [NFC] Use correct ssa.copy spelling when referring to the i [...] adds f4f158b2f89 [mlir][sparse] add vectorization strategies to sparse compiler adds 01c3135850d [LTO] Add test for freestanding LTO option. adds 18278ff1aac [flang] Fix accessibility of USEd name in .mod file adds 4cfccd51335 [libc][NFC] add macro for fuchsia to switch test backend to zxtest adds fb98a1be436 Fix the warnings on unused variables (NFC) adds f711cb9a8ad [FuncAttrs] Add additional willreturn tests (NFC) adds 6077d55381a [DSE] Add tests with stores of existing values. adds ea8034ec35a [libc][NFC] change isblank and iscntrl from implicit casting new 74a42aedfe1 [test] Add Clang side tests for -fdebug-info-for-profiling new 35debdfcaca [NFC] Fix build break by a initializer list converting error new 82c4153e66f Revert "[AsmParser] make .ascii support spaces as separators" The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/AST.cpp | 1 + clang-tools-extra/clangd/CodeComplete.cpp | 9 +- clang-tools-extra/clangd/CodeComplete.h | 11 - .../clangd/GlobalCompilationDatabase.cpp | 52 +- .../clangd/GlobalCompilationDatabase.h | 26 +- clang-tools-extra/clangd/JSONTransport.cpp | 56 +- clang-tools-extra/clangd/QueryDriverDatabase.cpp | 21 +- clang-tools-extra/clangd/index/Background.cpp | 7 +- clang-tools-extra/clangd/index/Background.h | 4 + clang-tools-extra/clangd/index/BackgroundQueue.cpp | 26 +- clang-tools-extra/clangd/tool/ClangdMain.cpp | 9 - .../clangd/unittests/BackgroundIndexTests.cpp | 76 +- .../clangd/unittests/CodeCompleteTests.cpp | 12 +- clang/docs/ClangCommandLineReference.rst | 7 +- clang/include/clang/Basic/Attr.td | 7 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 4 + clang/include/clang/Basic/LangOptions.def | 2 + clang/include/clang/Driver/Options.td | 16 +- clang/include/clang/Sema/Sema.h | 116 +- clang/include/clang/Serialization/ASTReader.h | 10 +- clang/include/clang/Serialization/ASTWriter.h | 5 + clang/lib/AST/RecordLayoutBuilder.cpp | 21 +- clang/lib/Driver/ToolChains/Clang.cpp | 4 + clang/lib/Frontend/CompilerInvocation.cpp | 1 + clang/lib/Parse/ParsePragma.cpp | 29 +- clang/lib/Sema/Sema.cpp | 3 +- clang/lib/Sema/SemaAttr.cpp | 151 +- clang/lib/Serialization/ASTReader.cpp | 11 +- clang/lib/Serialization/ASTWriter.cpp | 10 +- .../test/CodeGenCXX/fdebug-info-for-profiling.cpp | 21 + clang/test/Driver/aix-pragma-pack.c | 4 + clang/test/Layout/aix-double-struct-member.cpp | 9 +- .../test/Layout/aix-power-natural-interaction.cpp | 146 ++ clang/test/PCH/aix-pragma-pack.c | 119 ++ clang/test/Sema/aix-pragma-pack-and-align.c | 229 +++ clang/test/SemaOpenCL/invalid-vector-literals.cl | 1 - .../SemaOpenCL/{logical-ops.cl => operators.cl} | 6 + clang/test/SemaOpenCL/vector_inc_dec_ops.cl | 9 +- compiler-rt/lib/msan/msan_poisoning.cpp | 2 +- .../sanitizer_common/tests/sanitizer_mac_test.cpp | 18 +- flang/include/flang/Evaluate/characteristics.h | 23 +- flang/include/flang/Evaluate/fold.h | 24 +- flang/include/flang/Evaluate/shape.h | 86 +- flang/include/flang/Evaluate/tools.h | 27 +- flang/include/flang/Evaluate/type.h | 7 +- flang/include/flang/Semantics/tools.h | 7 + flang/lib/Evaluate/characteristics.cpp | 58 +- flang/lib/Evaluate/check-expression.cpp | 79 +- flang/lib/Evaluate/fold.cpp | 7 + flang/lib/Evaluate/intrinsics.cpp | 7 +- flang/lib/Evaluate/shape.cpp | 254 +-- flang/lib/Evaluate/tools.cpp | 153 +- flang/lib/Semantics/check-call.cpp | 4 +- flang/lib/Semantics/check-declarations.cpp | 2 +- flang/lib/Semantics/check-do-forall.cpp | 45 +- flang/lib/Semantics/mod-file.cpp | 1 + flang/lib/Semantics/resolve-names.cpp | 26 +- flang/lib/Semantics/semantics.cpp | 26 +- flang/lib/Semantics/tools.cpp | 103 +- flang/test/Semantics/data04.f90 | 1 - flang/test/Semantics/modfile03.f90 | 18 + flang/test/Semantics/resolve44.f90 | 2 - flang/test/Semantics/shape.f90 | 8 + libc/benchmarks/LibcMemoryBenchmarkMain.cpp | 11 +- libc/config/linux/aarch64/entrypoints.txt | 2 + libc/config/linux/x86_64/entrypoints.txt | 2 + libc/spec/gnu_ext.td | 19 +- libc/spec/posix.td | 15 + libc/src/ctype/CMakeLists.txt | 16 + libc/src/ctype/{iscntrl.cpp => isascii.cpp} | 11 +- libc/src/ctype/isascii.h | 18 + libc/src/ctype/isblank.cpp | 2 +- libc/src/ctype/iscntrl.cpp | 2 +- libc/src/ctype/{iscntrl.cpp => toascii.cpp} | 11 +- libc/src/ctype/toascii.h | 18 + libc/test/src/ctype/CMakeLists.txt | 20 + libc/test/src/ctype/isascii_test.cpp | 23 + libc/test/src/ctype/toascii_test.cpp | 24 + libc/test/src/math/LdExpTest.h | 4 +- libc/utils/UnitTest/CMakeLists.txt | 3 +- libc/utils/UnitTest/FuchsiaTest.h | 20 + libc/utils/UnitTest/{Test.cpp => LibcTest.cpp} | 2 +- libc/utils/UnitTest/{Test.h => LibcTest.h} | 6 +- libc/utils/UnitTest/Test.h | 260 +-- libcxx/docs/DesignDocs/VisibilityMacros.rst | 6 - libcxx/include/__config | 2 +- lld/COFF/Chunks.cpp | 113 +- lld/COFF/Chunks.h | 10 + lld/COFF/DebugTypes.cpp | 20 + lld/COFF/PDB.cpp | 643 ++++--- lld/ELF/OutputSections.h | 6 - lld/MachO/InputSection.cpp | 2 +- lld/test/wasm/tls-no-shared.s | 2 +- lld/test/wasm/tls.s | 33 +- lld/wasm/Driver.cpp | 2 +- lld/wasm/InputFiles.cpp | 1 + lld/wasm/Writer.cpp | 2 +- llvm/docs/LangRef.rst | 9 +- llvm/include/llvm/ADT/StringExtras.h | 5 +- .../GlobalISel/LegalizationArtifactCombiner.h | 4 +- .../llvm/CodeGen/GlobalISel/MIPatternMatch.h | 6 + .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 5 + llvm/include/llvm/CodeGen/ISDOpcodes.h | 9 +- llvm/include/llvm/CodeGen/MIRYamlMapping.h | 2 +- llvm/include/llvm/CodeGen/MachineLoopUtils.h | 4 - llvm/include/llvm/CodeGen/StackMaps.h | 9 + llvm/include/llvm/CodeGen/TargetFrameLowering.h | 2 +- llvm/include/llvm/DWARFLinker/DWARFLinker.h | 6 +- .../llvm/DWARFLinker/DWARFLinkerCompileUnit.h | 2 +- llvm/include/llvm/DWARFLinker/DWARFStreamer.h | 2 +- .../PDB/Native/DbiModuleDescriptorBuilder.h | 63 +- llvm/include/llvm/ExecutionEngine/Orc/Core.h | 3 + llvm/include/llvm/IR/IntrinsicsRISCV.td | 2 +- llvm/include/llvm/LTO/Config.h | 6 +- llvm/include/llvm/Object/ELF.h | 60 +- llvm/include/llvm/ObjectYAML/ELFYAML.h | 34 + llvm/lib/Analysis/CallPrinter.cpp | 2 +- llvm/lib/Analysis/ConstraintSystem.cpp | 2 +- llvm/lib/Analysis/InlineAdvisor.cpp | 3 +- llvm/lib/Analysis/ValueTracking.cpp | 2 +- llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp | 2 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 9 +- llvm/lib/CodeGen/InlineSpiller.cpp | 27 +- llvm/lib/CodeGen/MachineLoopUtils.cpp | 11 - llvm/lib/CodeGen/MachineVerifier.cpp | 23 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 13 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 9 + .../CodeGen/SelectionDAG/StatepointLowering.cpp | 21 +- llvm/lib/CodeGen/StackMaps.cpp | 61 +- llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 2 +- llvm/lib/DWARFLinker/DWARFLinker.cpp | 45 +- llvm/lib/DWARFLinker/DWARFLinkerCompileUnit.cpp | 6 +- llvm/lib/DWARFLinker/DWARFStreamer.cpp | 50 +- .../PDB/Native/DbiModuleDescriptorBuilder.cpp | 81 +- llvm/lib/DebugInfo/PDB/Native/DbiStreamBuilder.cpp | 10 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 5 +- .../RuntimeDyld/RuntimeDyldChecker.cpp | 4 +- llvm/lib/LTO/LTOBackend.cpp | 31 +- llvm/lib/MC/MCParser/AsmParser.cpp | 13 +- llvm/lib/ObjectYAML/ELFEmitter.cpp | 46 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 12 +- llvm/lib/Target/AArch64/AArch64FrameLowering.h | 4 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 39 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 20 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 3 + .../AArch64/GISel/AArch64InstructionSelector.cpp | 17 +- .../Target/AArch64/GISel/AArch64LegalizerInfo.cpp | 4 +- llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp | 50 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 6 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 60 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 18 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 18 +- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 34 +- llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 2 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 22 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 2 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 8 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 66 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 90 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 130 +- llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 6 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 8 +- llvm/lib/Target/AMDGPU/SISchedule.td | 2 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 6 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 533 +++--- llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 66 +- llvm/lib/Target/ARC/ARCTargetMachine.cpp | 4 +- llvm/lib/Target/ARM/ARM.h | 2 + llvm/lib/Target/ARM/ARMBlockPlacement.cpp | 227 +++ llvm/lib/Target/ARM/ARMISelLowering.cpp | 25 +- llvm/lib/Target/ARM/ARMTargetMachine.cpp | 3 + llvm/lib/Target/ARM/CMakeLists.txt | 1 + llvm/lib/Target/AVR/AVRTargetMachine.cpp | 2 +- llvm/lib/Target/BPF/BPFTargetMachine.cpp | 4 +- llvm/lib/Target/CSKY/CSKYTargetMachine.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 42 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 4 +- llvm/lib/Target/Lanai/LanaiTargetMachine.cpp | 4 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 11 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.h | 2 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 6 +- llvm/lib/Target/Sparc/SparcTargetMachine.cpp | 4 +- llvm/lib/Target/VE/VETargetMachine.cpp | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 75 +- llvm/lib/Target/XCore/XCoreTargetMachine.cpp | 4 +- llvm/lib/Transforms/Coroutines/CoroFrame.cpp | 17 +- llvm/lib/Transforms/IPO/Attributor.cpp | 2 +- llvm/lib/Transforms/IPO/IROutliner.cpp | 19 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 18 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 6 +- .../Transforms/Scalar/LowerMatrixIntrinsics.cpp | 2 +- .../Transforms/Scalar/RewriteStatepointsForGC.cpp | 8 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 3 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 3 +- .../Utils/UniqueInternalLinkageNames.cpp | 1 + llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 6 +- .../CodeGen/AArch64/GlobalISel/arm64-fallback.ll | 7 - .../GlobalISel/legalize-ext-csedebug-output.mir | 3 - .../GlobalISel/legalize-fp128-fconstant.mir | 22 + .../CodeGen/AArch64/aarch64-matrix-umull-smull.ll | 186 ++ .../CodeGen/AArch64/debug-info-sve-dbg-declare.mir | 16 +- .../CodeGen/AArch64/debug-info-sve-dbg-value.mir | 8 +- .../AArch64/framelayout-sve-basepointer.mir | 2 +- .../AArch64/framelayout-sve-calleesaves-fix.mir | 2 +- .../AArch64/framelayout-sve-scavengingslot.mir | 2 +- llvm/test/CodeGen/AArch64/framelayout-sve.mir | 68 +- llvm/test/CodeGen/AArch64/live-debugvalues-sve.mir | 2 +- llvm/test/CodeGen/AArch64/spillfill-sve.mir | 10 +- llvm/test/CodeGen/AArch64/split-vector-insert.ll | 12 +- llvm/test/CodeGen/AArch64/sve-alloca-stackid.ll | 4 +- llvm/test/CodeGen/AArch64/sve-bit-counting-pred.ll | 141 ++ .../AArch64/sve-calling-convention-byref.ll | 12 +- llvm/test/CodeGen/AArch64/sve-gep.ll | 3 +- .../AArch64/sve-intrinsic-opts-reinterpret.ll | 56 + .../CodeGen/AArch64/sve-intrinsics-loads-nf.ll | 6 +- .../AArch64/sve-ld1-addressing-mode-reg-imm.ll | 6 +- llvm/test/CodeGen/AArch64/sve-localstackalloc.mir | 2 +- ...pred-contiguous-ldst-addressing-mode-reg-imm.ll | 6 +- ...ed-non-temporal-ldst-addressing-mode-reg-imm.ll | 6 +- .../AArch64/sve-st1-addressing-mode-reg-imm.ll | 6 +- .../AMDGPU/GlobalISel/inst-select-add.s16.mir | 8 +- .../GlobalISel/inst-select-amdgcn.fmad.ftz.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.mir | 32 +- .../GlobalISel/inst-select-amdgcn.fmed3.s16.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir | 60 +- .../AMDGPU/GlobalISel/inst-select-ashr.s16.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-bswap.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fadd.s64.mir | 22 +- .../GlobalISel/inst-select-fcanonicalize.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-fma.s32.mir | 24 +- .../AMDGPU/GlobalISel/inst-select-fmad.s32.mir | 40 +- .../AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fmaxnum.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fminnum.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir | 6 +- .../AMDGPU/GlobalISel/inst-select-fract.f64.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir | 60 +- .../AMDGPU/GlobalISel/inst-select-lshr.s16.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-mul.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-pattern-add3.mir | 8 +- .../GlobalISel/inst-select-pattern-and-or.mir | 16 +- .../AMDGPU/GlobalISel/inst-select-pattern-or3.mir | 8 +- .../GlobalISel/inst-select-pattern-smed3.mir | 4 +- .../GlobalISel/inst-select-pattern-smed3.s16.mir | 4 +- .../GlobalISel/inst-select-pattern-umed3.mir | 4 +- .../GlobalISel/inst-select-pattern-umed3.s16.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-pattern-xor3.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-sext-inreg.mir | 20 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir | 8 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir | 60 +- .../AMDGPU/GlobalISel/inst-select-shl.s16.mir | 4 +- .../inst-select-shuffle-vector.v2s16.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-smulh.mir | 24 +- .../AMDGPU/GlobalISel/inst-select-umulh.mir | 24 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir | 4 +- .../GlobalISel/llvm.amdgcn.raw.buffer.load.ll | 4 +- .../GlobalISel/llvm.amdgcn.struct.buffer.load.ll | 8 +- llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir | 430 ++--- .../CodeGen/AMDGPU/clamp-omod-special-case.mir | 12 +- ...coalescer-subranges-another-copymi-not-live.mir | 2 +- .../coalescer-subranges-another-prune-error.mir | 2 +- .../AMDGPU/coalescer-subregjoin-fullcopy.mir | 10 +- .../coalescer-with-subregs-bad-identical.mir | 16 +- .../CodeGen/AMDGPU/constant-fold-imm-immreg.mir | 10 +- .../CodeGen/AMDGPU/couldnt-join-subrange-3.mir | 16 +- .../CodeGen/AMDGPU/debug-value-scheduler-crash.mir | 12 +- llvm/test/CodeGen/AMDGPU/early-term.mir | 268 +++ llvm/test/CodeGen/AMDGPU/fdiv-nofpexcept.ll | 36 +- .../CodeGen/AMDGPU/fold-immediate-output-mods.mir | 16 +- llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir | 2 +- llvm/test/CodeGen/AMDGPU/fold_16bit_imm.mir | 2 +- llvm/test/CodeGen/AMDGPU/hazard-pass-ordering.mir | 2 +- llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir | 10 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll | 4 + llvm/test/CodeGen/AMDGPU/mai-hazards.mir | 166 +- .../AMDGPU/memory-legalizer-atomic-insert-end.mir | 2 +- llvm/test/CodeGen/AMDGPU/merge-load-store-vreg.mir | 4 +- .../AMDGPU/pei-build-spill-partial-agpr.mir | 176 +- llvm/test/CodeGen/AMDGPU/pei-build-spill.mir | 1848 ++++++++++---------- .../CodeGen/AMDGPU/power-sched-no-instr-sunit.mir | 4 +- .../AMDGPU/promote-constOffset-to-imm-gfx10.mir | 8 +- .../CodeGen/AMDGPU/promote-constOffset-to-imm.mir | 8 +- llvm/test/CodeGen/AMDGPU/regbank-reassign.mir | 8 +- .../CodeGen/AMDGPU/regcoal-subrange-join-seg.mir | 4 +- llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir | 2 +- ...coalescing-remove-partial-redundancy-assert.mir | 6 +- .../CodeGen/AMDGPU/rename-independent-subregs.mir | 2 +- .../CodeGen/AMDGPU/s_add_co_pseudo_lowering.mir | 14 +- .../sched-assert-onlydbg-value-empty-region.mir | 6 +- llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir | 34 +- ...d-handleMoveUp-subreg-def-across-subreg-def.mir | 12 +- llvm/test/CodeGen/AMDGPU/sched-prefer-non-mfma.mir | 4 +- llvm/test/CodeGen/AMDGPU/schedule-barrier.mir | 8 +- .../CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir | 24 +- llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir | 26 +- llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir | 2 +- llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir | 8 +- llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir | 12 +- .../CodeGen/AMDGPU/smem-no-clause-coalesced.mir | 4 +- .../CodeGen/AMDGPU/spill-agpr-partially-undef.mir | 12 +- llvm/test/CodeGen/AMDGPU/spill-agpr.mir | 316 ++-- .../AMDGPU/stale-livevar-in-twoaddr-pass.mir | 2 +- .../CodeGen/AMDGPU/subreg-split-live-in-error.mir | 18 +- llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir | 2 +- llvm/test/CodeGen/AMDGPU/v_swap_b32.mir | 4 +- llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir | 24 +- llvm/test/CodeGen/AMDGPU/waitcnt.mir | 8 +- llvm/test/CodeGen/ARM/O3-pipeline.ll | 3 + llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll | 324 ++-- llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll | 296 ++-- llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll | 797 +++++++-- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll | 796 +++++++-- llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll | 796 +++++++-- llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll | 312 +++- llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll | 467 ++++- llvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll | 419 ++++- llvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll | 419 ++++- llvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll | 419 ++++- llvm/test/CodeGen/RISCV/rvv/vfredsum-rv32.ll | 419 ++++- llvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll | 424 ++++- llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll | 972 +++++++--- llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll | 220 ++- llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll | 224 ++- llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll | 312 ++-- llvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll | 797 +++++++-- llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll | 388 +++- llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll | 388 +++- llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll | 519 ++++-- llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll | 388 +++- llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll | 1008 ++++++++--- llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll | 1008 ++++++++--- llvm/test/CodeGen/Thumb2/block-placement.mir | 345 ++++ llvm/test/CodeGen/Thumb2/mve-shuffleext.ll | 267 +++ llvm/test/CodeGen/Thumb2/mve-vcvt.ll | 51 + llvm/test/CodeGen/Thumb2/mve-vmovnstore.ll | 52 + llvm/test/CodeGen/Thumb2/mve-vqdmulh.ll | 81 +- llvm/test/CodeGen/X86/call-rv-marker.ll | 175 ++ llvm/test/CodeGen/X86/haddsub-4.ll | 32 + llvm/test/CodeGen/X86/horizontal-sum.ll | 151 +- llvm/test/CodeGen/X86/non-value-mem-operand.mir | 6 +- llvm/test/CodeGen/X86/pr48727.ll | 51 + llvm/test/CodeGen/X86/select-prof-codegen.ll | 6 +- llvm/test/CodeGen/X86/statepoint-fixup-call.mir | 4 +- .../CodeGen/X86/statepoint-fixup-copy-prop-neg.mir | 6 +- llvm/test/CodeGen/X86/vector-pack-256.ll | 66 +- llvm/test/LTO/X86/objc-arc-contract.ll | 13 + llvm/test/LTO/X86/tli-nobuiltin.ll | 31 + llvm/test/MC/AMDGPU/isa-version-hsa.s | 14 +- llvm/test/MC/AMDGPU/isa-version-pal.s | 14 +- llvm/test/MC/AMDGPU/isa-version-unk.s | 14 +- llvm/test/MC/AMDGPU/lit.local.cfg | 8 + llvm/test/MC/AMDGPU/literal16.s | 2 +- llvm/test/MC/AMDGPU/literals.s | 22 +- llvm/test/MC/AMDGPU/mtbuf-gfx10.s | 2 +- llvm/test/MC/AMDGPU/mtbuf.s | 6 +- llvm/test/MC/AMDGPU/mubuf-gfx9.s | 4 +- llvm/test/MC/AMDGPU/mubuf.s | 12 +- llvm/test/MC/AMDGPU/out-of-range-registers.s | 4 +- llvm/test/MC/AMDGPU/reg-syntax-extra.s | 16 +- llvm/test/MC/AMDGPU/smem.s | 28 +- llvm/test/MC/AMDGPU/smrd.s | 6 +- llvm/test/MC/AMDGPU/sop1-err.s | 4 +- llvm/test/MC/AMDGPU/sop1.s | 16 +- llvm/test/MC/AMDGPU/sop2.s | 16 +- llvm/test/MC/AMDGPU/sopc.s | 4 +- llvm/test/MC/AMDGPU/sopk-err.s | 6 +- llvm/test/MC/AMDGPU/sopk.s | 14 +- llvm/test/MC/AMDGPU/sopp-err.s | 8 +- llvm/test/MC/AMDGPU/sopp.s | 4 +- llvm/test/MC/AMDGPU/vintrp-err.s | 4 +- llvm/test/MC/AMDGPU/vintrp.s | 4 +- llvm/test/MC/AMDGPU/vop1.s | 12 +- llvm/test/MC/AMDGPU/vop3-convert.s | 8 +- llvm/test/MC/AMDGPU/vop3-gfx9.s | 12 +- llvm/test/MC/AMDGPU/vop_dpp.s | 10 +- llvm/test/MC/AMDGPU/vop_dpp_expr.s | 4 +- llvm/test/MC/AMDGPU/vop_sdwa.s | 12 +- llvm/test/MC/AMDGPU/xdl-insts-err.s | 4 +- llvm/test/MC/AsmParser/directive_ascii.s | 8 - llvm/test/MachineVerifier/verifier-statepoint.mir | 30 + llvm/test/Object/invalid.test | 2 +- llvm/test/Object/obj2yaml.test | 1 + .../Transforms/Coroutines/coro-spill-promise.ll | 57 + .../DeadStoreElimination/MSSA/multiblock-loops.ll | 4 +- .../MSSA/multiblock-memoryphis.ll | 4 +- .../DeadStoreElimination/MSSA/multiblock-simple.ll | 12 +- .../MSSA/stores-of-existing-values.ll | 284 +++ llvm/test/Transforms/FunctionAttrs/willreturn.ll | 65 +- .../Transforms/IROutliner/outlining-bitcasts.ll | 105 ++ .../InstCombine/X86/x86-amx-load-store.ll | 38 + llvm/test/Transforms/InstCombine/select-and-or.ll | 15 +- llvm/test/Transforms/LoopIdiom/memcpy.ll | 106 ++ .../SLPVectorizer/X86/horizontal-list.ll | 52 + .../unique-internal-linkage-names.ll | 3 +- llvm/test/tools/dsymutil/ARM/extern-alias.test | 4 +- .../dsymutil/Inputs/private/tmp/dwarf5/dwarf5.o | Bin 0 -> 1976 bytes .../dsymutil/Inputs/private/tmp/dwarf5/dwarf5.out | Bin 0 -> 16912 bytes .../Inputs/private/tmp/eh_frame/eh_frame.o | Bin 0 -> 2352 bytes .../Inputs/private/tmp/eh_frame/eh_frame.out | Bin 0 -> 16840 bytes llvm/test/tools/dsymutil/X86/dwarf5.test | 59 + llvm/test/tools/dsymutil/X86/eh_frame.test | 26 + llvm/test/tools/dsymutil/X86/swift-ast-x86_64.test | 2 +- .../tools/dsymutil/X86/timestamp-mismatch.test | 10 + llvm/test/tools/dsymutil/debug-map-parsing.test | 2 +- .../Inputs/inline-cs-noprobe.perfscript | 1 - .../Inputs/inline-cs-pseudoprobe.perfbin | Bin 0 -> 13432 bytes .../Inputs/inline-cs-pseudoprobe.perfscript | 5 + .../Inputs/noinline-cs-noprobe.perfscript | 1 - .../Inputs/noinline-cs-pseudoprobe.perfbin | Bin 0 -> 12896 bytes .../Inputs/noinline-cs-pseudoprobe.perfscript | 19 + .../tools/llvm-profgen/inline-cs-pseudoprobe.test | 37 + .../llvm-profgen/noinline-cs-pseudoprobe.test | 41 + .../tools/llvm-profgen/pseudoprobe-decoding.test | 121 ++ llvm/test/tools/llvm-readobj/ELF/dyn-symbols.test | 4 +- llvm/test/tools/llvm-readobj/ELF/dynamic-tags.test | 1 + llvm/test/tools/llvm-readobj/ELF/mips-got.test | 4 +- llvm/test/tools/llvm-readobj/ELF/mips-plt.test | 4 +- .../tools/llvm-readobj/ELF/section-symbols.test | 2 +- llvm/test/tools/llvm-readobj/ELF/symbol-shndx.test | 8 +- llvm/test/tools/llvm-readobj/ELF/symtab-shndx.test | 331 ++++ .../obj2yaml/ELF/call-graph-profile-section.yaml | 76 +- llvm/test/tools/obj2yaml/ELF/mips-abi-flags.yaml | 24 +- llvm/test/tools/obj2yaml/ELF/sht-symtab-shndx.yaml | 46 +- llvm/test/tools/obj2yaml/ELF/versym-section.yaml | 15 +- .../test/tools/yaml2obj/ELF/arm-exidx-section.yaml | 2 +- llvm/test/tools/yaml2obj/ELF/sht-symtab-shndx.yaml | 2 +- llvm/tools/dsymutil/BinaryHolder.cpp | 22 +- llvm/tools/dsymutil/BinaryHolder.h | 2 +- llvm/tools/dsymutil/DwarfLinkerForBinary.cpp | 124 +- llvm/tools/dsymutil/DwarfLinkerForBinary.h | 39 +- llvm/tools/dsymutil/MachOUtils.cpp | 80 +- llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp | 4 +- llvm/tools/llvm-ifs/llvm-ifs.cpp | 2 +- llvm/tools/llvm-objdump/MachODump.cpp | 4 +- llvm/tools/llvm-profgen/CMakeLists.txt | 1 + llvm/tools/llvm-profgen/PerfReader.cpp | 161 +- llvm/tools/llvm-profgen/PerfReader.h | 240 ++- llvm/tools/llvm-profgen/ProfileGenerator.cpp | 163 +- llvm/tools/llvm-profgen/ProfileGenerator.h | 44 +- llvm/tools/llvm-profgen/ProfiledBinary.cpp | 36 +- llvm/tools/llvm-profgen/ProfiledBinary.h | 21 + llvm/tools/llvm-profgen/PseudoProbe.cpp | 334 ++++ llvm/tools/llvm-profgen/PseudoProbe.h | 222 +++ llvm/tools/llvm-readobj/ELFDumper.cpp | 236 ++- llvm/tools/obj2yaml/elf2yaml.cpp | 26 +- llvm/unittests/Analysis/ValueTrackingTest.cpp | 7 +- .../CodeGen/GlobalISel/PatternMatchTest.cpp | 8 + .../unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp | 49 +- llvm/unittests/MI/LiveIntervalTest.cpp | 8 +- llvm/unittests/Object/ELFTest.cpp | 33 + llvm/utils/TableGen/CodeGenDAGPatterns.cpp | 2 +- llvm/utils/TableGen/CodeGenInstruction.cpp | 2 +- llvm/utils/TableGen/CodeGenMapTable.cpp | 2 +- llvm/utils/TableGen/GlobalISelEmitter.cpp | 11 +- llvm/utils/TableGen/RISCVCompressInstEmitter.cpp | 6 +- llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 104 +- .../gn/secondary/llvm/lib/Target/ARM/BUILD.gn | 1 + mlir/docs/Dialects/Linalg.md | 6 + .../mlir/Dialect/Linalg/Transforms/Transforms.h | 8 +- mlir/lib/Bindings/Python/IRModules.cpp | 18 + mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 2 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 26 - .../Dialect/Linalg/Transforms/Sparsification.cpp | 210 ++- mlir/lib/Transforms/Utils/DialectConversion.cpp | 1 + mlir/test/Bindings/Python/ir_affine_map.py | 6 + mlir/test/Dialect/Linalg/sparse_vector.mlir | 310 ++++ mlir/test/lib/Transforms/TestSparsification.cpp | 2 + .../mlir-linalg-ods-gen/test-linalg-ods-gen.tc | 49 +- .../mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp | 279 ++- openmp/docs/ReleaseNotes.rst | 27 +- openmp/docs/design/Runtimes.rst | 91 + .../libomptarget/deviceRTLs/nvptx/CMakeLists.txt | 5 +- openmp/runtime/src/include/omp.h.var | 7 +- openmp/runtime/src/include/omp_lib.f90.var | 7 +- openmp/runtime/src/include/omp_lib.h.var | 10 +- openmp/runtime/src/kmp.h | 7 +- openmp/runtime/src/kmp_alloc.cpp | 51 +- openmp/runtime/src/kmp_barrier.cpp | 15 +- openmp/runtime/test/barrier/omp_barrier.c | 3 + 494 files changed, 27065 insertions(+), 8344 deletions(-) create mode 100644 clang/test/CodeGenCXX/fdebug-info-for-profiling.cpp create mode 100644 clang/test/Driver/aix-pragma-pack.c create mode 100644 clang/test/Layout/aix-power-natural-interaction.cpp create mode 100644 clang/test/PCH/aix-pragma-pack.c create mode 100644 clang/test/Sema/aix-pragma-pack-and-align.c rename clang/test/SemaOpenCL/{logical-ops.cl => operators.cl} (90%) copy libc/src/ctype/{iscntrl.cpp => isascii.cpp} (56%) create mode 100644 libc/src/ctype/isascii.h copy libc/src/ctype/{iscntrl.cpp => toascii.cpp} (56%) create mode 100644 libc/src/ctype/toascii.h create mode 100644 libc/test/src/ctype/isascii_test.cpp create mode 100644 libc/test/src/ctype/toascii_test.cpp create mode 100644 libc/utils/UnitTest/FuchsiaTest.h rename libc/utils/UnitTest/{Test.cpp => LibcTest.cpp} (99%) copy libc/utils/UnitTest/{Test.h => LibcTest.h} (98%) create mode 100644 llvm/lib/Target/ARM/ARMBlockPlacement.cpp create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp128-fconstant.mir create mode 100644 llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-bit-counting-pred.ll create mode 100644 llvm/test/CodeGen/AMDGPU/early-term.mir create mode 100644 llvm/test/CodeGen/Thumb2/block-placement.mir create mode 100644 llvm/test/CodeGen/X86/call-rv-marker.ll create mode 100644 llvm/test/CodeGen/X86/pr48727.ll create mode 100644 llvm/test/LTO/X86/objc-arc-contract.ll create mode 100644 llvm/test/LTO/X86/tli-nobuiltin.ll create mode 100644 llvm/test/MachineVerifier/verifier-statepoint.mir create mode 100644 llvm/test/Transforms/Coroutines/coro-spill-promise.ll create mode 100644 llvm/test/Transforms/DeadStoreElimination/MSSA/stores-of-existi [...] create mode 100644 llvm/test/Transforms/IROutliner/outlining-bitcasts.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-amx-load-store.ll create mode 100644 llvm/test/Transforms/LoopIdiom/memcpy.ll create mode 100644 llvm/test/tools/dsymutil/Inputs/private/tmp/dwarf5/dwarf5.o create mode 100755 llvm/test/tools/dsymutil/Inputs/private/tmp/dwarf5/dwarf5.out create mode 100644 llvm/test/tools/dsymutil/Inputs/private/tmp/eh_frame/eh_frame.o create mode 100755 llvm/test/tools/dsymutil/Inputs/private/tmp/eh_frame/eh_frame.out create mode 100644 llvm/test/tools/dsymutil/X86/dwarf5.test create mode 100644 llvm/test/tools/dsymutil/X86/eh_frame.test create mode 100644 llvm/test/tools/dsymutil/X86/timestamp-mismatch.test create mode 100755 llvm/test/tools/llvm-profgen/Inputs/inline-cs-pseudoprobe.perfbin create mode 100644 llvm/test/tools/llvm-profgen/Inputs/inline-cs-pseudoprobe.perfscript create mode 100755 llvm/test/tools/llvm-profgen/Inputs/noinline-cs-pseudoprobe.perfbin create mode 100644 llvm/test/tools/llvm-profgen/Inputs/noinline-cs-pseudoprobe.perfscript create mode 100644 llvm/test/tools/llvm-profgen/inline-cs-pseudoprobe.test create mode 100644 llvm/test/tools/llvm-profgen/noinline-cs-pseudoprobe.test create mode 100644 llvm/test/tools/llvm-profgen/pseudoprobe-decoding.test create mode 100644 llvm/test/tools/llvm-readobj/ELF/symtab-shndx.test create mode 100644 llvm/tools/llvm-profgen/PseudoProbe.cpp create mode 100644 llvm/tools/llvm-profgen/PseudoProbe.h create mode 100644 mlir/test/Dialect/Linalg/sparse_vector.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig updated (459f8423 -> c1d8ee07)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/base-artifacts. discards 459f8423 0: update: llvm-linux-qemu: boot new c1d8ee07 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (459f8423) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 172 +- 02-prepare_abe/console.log | 328 +- 03-build_llvm/console.log | 13394 +++++++++++------------ 04-build_linux/console.log | 758 +- 05-build_abe-qemu/console.log | 6664 ++++++------ 06-boot_linux/console.log | 492 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 21812 +++++++++++++++++++------------------- jenkins/manifest.sh | 14 +- 10 files changed, 21821 insertions(+), 21817 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig updated (71878c08e96 -> 8d3636923a3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig in repository toolchain/ci/gcc. from 71878c08e96 tree-optimization/98513 - fix bug in range intersection code adds c03f9f304db Daily bump. adds 2c4d3e6db85 hurd: libgcc unwinding over signal trampolines with SIGINFO adds 92b131491c2 Hurd: Enable ifunc by default adds 8d3636923a3 libstdc++: Fix clang analyzer suppression [PR 98605] No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 108 ++++++++++++++++++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/config.gcc | 4 +- gcc/testsuite/ChangeLog | 66 ++++++++++++++++++++++++ libgcc/config/i386/gnu-unwind.h | 60 +++++++++++++++++----- libstdc++-v3/include/std/mutex | 8 +-- 6 files changed, 226 insertions(+), 22 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits January 2021