Tcwg-commits January 2021

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allnoconfig updated (271bea6acd -> bb3eddb5bd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allnoconfig in repository toolchain/ci/binutils-gdb. from 271bea6acd ld: tests: add -msim when testing bfin targets adds 7e0d77ef5f Fix an illegal memory access parsing a win32pstatus note wit [...] adds 116d0cf103 [gdb/testsuite] Fix gdb.base/style.exp with -m32 adds 5fae2a2c66 [gdb/breakpoint] Handle .plt.sec in in_plt_section adds 5a10699ff3 Updated translations for some subdirectories adds 8ca9c7eb67 bfin: Skip non SEC_ALLOC section for R_BFIN_FUNCDESC adds 58eadc4b69 Fix building gdb with gcc-4.x adds c14dee84dd Update my email address (long overdue!) adds 17e8913732 Add myself to gdb/MAINTAINERS adds 5aa06b1b14 Automatic date update in version.in adds 5fda40b28f gas: make [248]byte directives available everywhere adds 3624a6c15c PR26539, memory leak in inflate.c adds 37a9c3a53e sim: testsuite: allow tests to declare expected exit status adds 7cf91a2481 sim: m32r: clean up redundant test coverage adds 89bfc2a429 sim: frv: clean up redundant test coverage adds 137d6efd8a sim: mips: delete empty stub test dir adds 29fd199ed8 sim: d10v: relocate tests & clean up test harness adds bb3eddb5bd sim: testsuite: delete configure script No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 10 + bfd/elf.c | 5 +- bfd/elf32-bfin.c | 235 +- bfd/version.h | 2 +- binutils/ChangeLog | 13 + binutils/MAINTAINERS | 6 +- binutils/po/sv.po | 3804 +++++++++++--------- binutils/readelf.c | 6 +- gas/ChangeLog | 7 + gas/config/obj-elf.c | 4 - gas/doc/as.texi | 7 - gas/read.c | 3 + gdb/ChangeLog | 15 + gdb/MAINTAINERS | 1 + gdb/objfiles.h | 3 +- gdb/testsuite/ChangeLog | 5 + gdb/testsuite/gdb.base/style.exp | 49 +- gdb/trad-frame.c | 5 +- gold/ChangeLog | 4 + gold/po/fr.po | 730 ++-- ld/ChangeLog | 4 + ld/po/fr.po | 3699 ++++++++++--------- sim/ChangeLog | 7 + sim/configure | 16 +- sim/configure.ac | 16 +- sim/testsuite/ChangeLog | 36 + sim/testsuite/Makefile.in | 8 +- sim/testsuite/configure | 3264 ----------------- sim/testsuite/configure.ac | 32 - sim/testsuite/d10v-elf/Makefile.in | 180 - sim/testsuite/d10v-elf/configure | 2984 --------------- sim/testsuite/d10v-elf/configure.ac | 18 - sim/testsuite/d10v-elf/exit47.s | 4 - sim/testsuite/d10v-elf/loop.s | 6 - sim/testsuite/frv-elf/ChangeLog | 48 - sim/testsuite/frv-elf/Makefile.in | 158 - sim/testsuite/frv-elf/configure | 2984 --------------- sim/testsuite/frv-elf/configure.ac | 18 - sim/testsuite/frv-elf/loop.s | 2 - sim/testsuite/lib/sim-defs.exp | 23 +- sim/testsuite/m32r-elf/ChangeLog | 18 - sim/testsuite/m32r-elf/Makefile.in | 156 - sim/testsuite/m32r-elf/configure | 2984 --------------- sim/testsuite/m32r-elf/configure.ac | 18 - sim/testsuite/m32r-elf/hello.s | 17 - sim/testsuite/m32r-elf/loop.s | 2 - sim/testsuite/mips64el-elf/ChangeLog | 19 - sim/testsuite/mips64el-elf/Makefile.in | 170 - sim/testsuite/mips64el-elf/configure | 2984 --------------- sim/testsuite/mips64el-elf/configure.ac | 18 - sim/testsuite/sim/cris/ChangeLog | 7 + sim/testsuite/sim/cris/c/c.exp | 7 +- sim/testsuite/sim/cris/hw/rv-n-cris/rvc.exp | 2 +- sim/testsuite/{d10v-elf => sim/d10v}/ChangeLog | 5 + sim/testsuite/sim/d10v/allinsn.exp | 17 + .../{d10v-elf/t-trap.s => sim/d10v/exit47.s} | 5 +- sim/testsuite/{d10v-elf => sim/d10v}/hello.s | 3 + sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-d.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-i.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-id.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-im.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-ip.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld2w-d.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld2w-i.s | 6 +- .../{d10v-elf => sim/d10v}/t-ae-ld2w-id.s | 6 +- .../{d10v-elf => sim/d10v}/t-ae-ld2w-im.s | 6 +- .../{d10v-elf => sim/d10v}/t-ae-ld2w-ip.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-d.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-i.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-id.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-im.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-ip.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-is.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st2w-d.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st2w-i.s | 6 +- .../{d10v-elf => sim/d10v}/t-ae-st2w-id.s | 6 +- .../{d10v-elf => sim/d10v}/t-ae-st2w-im.s | 6 +- .../{d10v-elf => sim/d10v}/t-ae-st2w-ip.s | 6 +- .../{d10v-elf => sim/d10v}/t-ae-st2w-is.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-dbt.s | 7 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ld-st.s | 4 + sim/testsuite/{d10v-elf => sim/d10v}/t-mac.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-macros.i | 12 +- .../{d10v-elf => sim/d10v}/t-mod-ld-pre.s | 56 +- sim/testsuite/{d10v-elf => sim/d10v}/t-msbu.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-mulxu.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-mvtac.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-mvtc.s | 9 +- sim/testsuite/{d10v-elf => sim/d10v}/t-rac.s | 4 + sim/testsuite/{d10v-elf => sim/d10v}/t-rachi.s | 4 + sim/testsuite/{d10v-elf => sim/d10v}/t-rdt.s | 7 +- sim/testsuite/{d10v-elf => sim/d10v}/t-rep.s | 8 +- sim/testsuite/{d10v-elf => sim/d10v}/t-rie-xx.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-rte.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-sac.s | 4 + sim/testsuite/{d10v-elf => sim/d10v}/t-sachi.s | 4 + sim/testsuite/{d10v-elf => sim/d10v}/t-sadd.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-slae.s | 4 + sim/testsuite/{d10v-elf => sim/d10v}/t-sp.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-sub.s | 4 + sim/testsuite/{d10v-elf => sim/d10v}/t-sub2w.s | 16 +- sim/testsuite/{d10v-elf => sim/d10v}/t-subi.s | 4 + sim/testsuite/sim/d10v/t-trap.s | 10 + sim/testsuite/sim/frv/ChangeLog | 6 + .../{frv-elf/cache.s => sim/frv/cache.ms} | 6 +- .../{frv-elf/exit47.s => sim/frv/exit47.ms} | 6 + .../{frv-elf/grloop.s => sim/frv/grloop.ms} | 3 + .../{frv-elf/hello.s => sim/frv/hello.ms} | 3 + sim/testsuite/sim/frv/misc.exp | 19 + sim/testsuite/sim/m32r/ChangeLog | 4 + .../{m32r-elf/exit47.s => sim/m32r/exit47.ms} | 4 + 111 files changed, 5055 insertions(+), 20186 deletions(-) delete mode 100755 sim/testsuite/configure delete mode 100644 sim/testsuite/configure.ac delete mode 100644 sim/testsuite/d10v-elf/Makefile.in delete mode 100755 sim/testsuite/d10v-elf/configure delete mode 100644 sim/testsuite/d10v-elf/configure.ac delete mode 100644 sim/testsuite/d10v-elf/exit47.s delete mode 100644 sim/testsuite/d10v-elf/loop.s delete mode 100644 sim/testsuite/frv-elf/ChangeLog delete mode 100644 sim/testsuite/frv-elf/Makefile.in delete mode 100755 sim/testsuite/frv-elf/configure delete mode 100644 sim/testsuite/frv-elf/configure.ac delete mode 100644 sim/testsuite/frv-elf/loop.s delete mode 100644 sim/testsuite/m32r-elf/ChangeLog delete mode 100644 sim/testsuite/m32r-elf/Makefile.in delete mode 100755 sim/testsuite/m32r-elf/configure delete mode 100644 sim/testsuite/m32r-elf/configure.ac delete mode 100644 sim/testsuite/m32r-elf/hello.s delete mode 100644 sim/testsuite/m32r-elf/loop.s delete mode 100644 sim/testsuite/mips64el-elf/ChangeLog delete mode 100644 sim/testsuite/mips64el-elf/Makefile.in delete mode 100755 sim/testsuite/mips64el-elf/configure delete mode 100644 sim/testsuite/mips64el-elf/configure.ac rename sim/testsuite/{d10v-elf => sim/d10v}/ChangeLog (96%) create mode 100644 sim/testsuite/sim/d10v/allinsn.exp rename sim/testsuite/{d10v-elf/t-trap.s => sim/d10v/exit47.s} (52%) rename sim/testsuite/{d10v-elf => sim/d10v}/hello.s (54%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-d.s (76%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-i.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-id.s (78%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-im.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-ip.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld2w-d.s (77%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld2w-i.s (80%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld2w-id.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld2w-im.s (80%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld2w-ip.s (80%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-d.s (76%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-i.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-id.s (78%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-im.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-ip.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-is.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st2w-d.s (77%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st2w-i.s (80%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st2w-id.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st2w-im.s (80%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st2w-ip.s (80%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st2w-is.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-dbt.s (88%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ld-st.s (88%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-mac.s (95%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-macros.i (97%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-mod-ld-pre.s (90%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-msbu.s (87%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-mulxu.s (87%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-mvtac.s (84%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-mvtc.s (95%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-rac.s (82%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-rachi.s (87%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-rdt.s (75%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-rep.s (90%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-rie-xx.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-rte.s (78%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-sac.s (85%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-sachi.s (83%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-sadd.s (92%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-slae.s (92%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-sp.s (78%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-sub.s (92%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-sub2w.s (93%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-subi.s (92%) create mode 100644 sim/testsuite/sim/d10v/t-trap.s rename sim/testsuite/{frv-elf/cache.s => sim/frv/cache.ms} (95%) rename sim/testsuite/{frv-elf/exit47.s => sim/frv/exit47.ms} (50%) rename sim/testsuite/{frv-elf/grloop.s => sim/frv/grloop.ms} (86%) rename sim/testsuite/{frv-elf/hello.s => sim/frv/hello.ms} (86%) create mode 100644 sim/testsuite/sim/frv/misc.exp rename sim/testsuite/{m32r-elf/exit47.s => sim/m32r/exit47.ms} (66%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allnoconfig updated (1ec34610 -> ed324553)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards 1ec34610 0: update: binutils-gcc-linux-qemu: boot new ed324553 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1ec34610) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 152 +- 02-prepare_abe/console.log | 410 +- 03-build_abe-binutils/console.log | 10679 +++++---- 04-build_abe-stage1/console.log | 16167 +++++++------- 05-build_linux/console.log | 772 +- 06-build_abe-qemu/console.log | 6598 +++--- 07-boot_linux/console.log | 4 +- 08-check_regression/console.log | 8 +- 08-check_regression/results.regressions | 3 +- 09-update_baseline/console.log | 2 +- 09-update_baseline/results.regressions | 3 +- console.log | 34802 +++++++++++++++--------------- jenkins/manifest.sh | 18 +- 13 files changed, 34776 insertions(+), 34842 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig updated (ab96073df00 -> b0ccd3922f5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig in repository toolchain/ci/gcc. from ab96073df00 MAINTAINERS: Add myself for write after approval adds ff99d05f40f configure, make: Fix up --enable-link-serialization adds 13d47c37a2c reassoc: Optimize in reassoc x < 0 && y < 0 to (x | y) < 0 [...] adds 24ea113f75c widening_mul: Fix up ICE caused by my signed multiplication [...] adds b2230210f17 gcov: add more debugging facility adds e91910d3576 options: properly compare string arguments adds 52a170b1a18 tree-optimization/98550 - fix BB vect unrolling check adds e0bec6ceac4 c++: Fix ICE with CTAD in concept [PR98611] adds cf2ac1c30af [PR97969] LRA: Transform pattern `plus (plus (hard reg, con [...] adds 25bef68902f arm: Add movmisalign patterns for MVE (PR target/97875) adds 1aff68d54c3 Fix typo in function-abi.h adds 248feb2fa2c gcov: fix printf format for 32-bit hosts adds e2aa8a5f982 libcody: Simplify configure [PR 98414, 98509] adds 728fee7a798 MAINTAINERS: Fix spacing adds 5a9cfad2de9 Avoid a couple more ICEs in print_mem_ref (PR c/98597). adds cfaaa6a1ca7 syscall: ensure openat uses variadic libc wrapper adds 6851dda2e79 Daily bump. adds abb3993e49c amdgcn: Fix subdf3 pattern adds c8812bac8ee amdgcn: Improve FP division accuracy adds 3df6fac0080 amdgcn: Fix exec register live-on-entry to BB in md-reorg adds 7993fe1877a amdgcn: Remove dead code for fixed v0 register adds b668a06e37f i386: Optimize _mm_unpacklo_epi8 of 0 vector as second argu [...] adds 3f325179b32 [PATCH v2] aarch64: Add cpu cost tables for A64FX adds 6b70fa678b1 ipa: remove a dead code adds 5d057bfeff7 i386: Add define_insn_and_split patterns for btrl [PR96938] adds ffd28c265e6 tree-optimization/98640 - fix bogus sign-extension with VN adds 4c598b038df doc: Fix typos in C++ Modules documentation adds 0db5f488486 libstdc++: Remove <debug/array> from Doxygen config adds 7875e8dc831 if-to-switch: fix also virtual phis adds b1d1e2b54c6 i386, expand: Optimize also 256-bit and 512-bit permutatati [...] adds 2b356e689c3 hurd: libgcc unwinding over signal trampolines with SIGINFO adds c23aea6edc9 gcc-changelog: Allow modifications to old ChangeLogs without entry adds f04e7e540e2 libstdc++: Fix typo in ChangeLog-2020 adds e9cb89b936f Hurd: Enable ifunc by default adds 40b371a7c2f sh: Remove match_scratch operand test adds 6d75168146f rtl-ssa: Fix reversed comparisons in accesses.h comment adds 5ab67cdee61 aarch64: Tighten condition on sve/sel* tests adds 3ddc18251a8 tree-optimization/92645 - improve SLP with existing vectors adds cf7a3353061 aarch64: Add support for unpacked SVE MLA and MAD adds 264a1269b44 aarch64: Add support for unpacked SVE MLS and MSB adds 11cbea852b0 c++: Fix cp_build_function_call_vec [PR 98626] adds a2d04f3d2c9 mklog: support define_insn_and_split format adds 285fa338b06 tree-optimization/92645 - avoid harmful early BIT_FIELD_REF [...] adds 7d7ef413ef1 gcc-changelog: Support multiline parentheses wrapping adds 8fc183ccd06 match.pd: Fold (~X | C) ^ D into (X | C) ^ (~D ^ C) if (~D [...] adds 796ead19f85 c++: Failure to lookup using-decl name [PR98231] adds 8cba7cb3202 or1k: Implement profile hook calling _mcount adds e1171c32502 or1k: Add builtin define to detect hard float adds b77f6d2fa84 or1k: Support for softfloat to emulate hw exceptions adds 6ed637c585b or1k: Add note to indicate execstack adds e40fdcc4f42 or1k: Fixup exception header data encodings adds be0851b8e93 Daily bump. adds c7f1ff01a23 aarch64: Reimplement vmovn_high_* intrinsics using builtins adds 52cd1cd1b67 aarch64: reimplement vqmovn_high* intrinsics using builtins adds 48f8d1d48f2 aarch64: Reimplememnt vmovn/vmovl intrinsics with builtins instead adds e45c41988bf vect: Account for unused IFN_LOAD_LANES results adds 8f8762a2e86 match.pd: Optimize ~(X >> Y) to ~X >> Y if ~X can be simpli [...] adds 0efdc7b31c2 i386: Fix the pmovzx SSE4.1 define_insn_and_split patterns [...] adds 08a4adcf2b6 i386: Remove reduntand assignment in i386-options.c [PR98671] adds d61d2a5f3ce c++: Fix erroneous parm comparison logic [PR 98372] adds 194a9d67be4 libstdc++: Update copyright dates on new files adds a802a2ef5f1 arm: Replace calls to __builtin_vcge* by <=,>= in arm_neon. [...] adds a512079ef40 i386: Update PR target/95021 tests adds 2182274f510 tree-optimization/98674 - improve dependence analysis adds 5ebdd53534d i386: Resolve variable shadowing in i386-options.c [PR98671] adds 77d372abec0 x86: Error on -fcf-protection with incompatible target adds 236d6a33ca6 mklog: skip unsupported files adds 7624c58c6b7 gcov: add one more pytest adds aa3d33dccb5 RTEMS: Fix Ada build for riscv adds 57a4f5e4eac libstdc++: Define function to throw filesystem_error [PR 98471] adds 6106dfb9f73 [nvptx libgomp plugin] Build only in supported configurations adds 9ac3e2feb3d libgo: update hurd support adds d0d2becf2df PR fortran/98661 - valgrind issues with error recovery adds c1a2cf88059 Revert "PR fortran/98661 - valgrind issues with error recovery" adds 9e1e6e63104 PR fortran/98661 - valgrind issues with error recovery adds 05a30af3f23 libstdc++: Implement N3644 for _GLIBCXX_DEBUG iterators adds 505caa7295b [gcn offloading] Only supported in 64-bit configurations adds 088e46b8d4d declare getpass in analyzer/sensitive-1.c test adds 6541fcadc86 use sigjmp_buf for analyzer sigsetjmp tests adds 3651c1b5c9c calibrate intervals to avoid zero in futures poll test adds bdd1b1f5552 PR fortran/93340 - fix missed substring simplifications adds f6ffd449e0c c++: Tweak g++.dg/template/pr98372.C. adds 8a18261afd9 analyzer: const fixes [PR98679] adds dea4a32b24f analyzer: fixes to -fdump-analyzer-json adds fe701195313 slp: elide intermediate nodes for complex add and avoid truncate adds 500600c7840 slp: Support optimizing load distribution adds e09173d84da slp: support complex multiply and complex multiply conjugate adds 31fac31800b slp: support complex FMA and complex FMA conjugate adds 478e571a3ee slp: support complex FMS and complex FMS conjugate adds b50df1e749b slp: Add complex operations class to share first match amon [...] adds 59832db9a71 slp: Add Tests for complex mul, mls and mla" adds f1096055854 Add GCC_EXTRA_DIAGNOSTIC_OUTPUT environment variable for fi [...] adds 02e7af1122c libstdc++: Implement N3644 for _GLIBCXX_DEBUG iterators adds 387f6c15d30 Handle fancy_abort before diagnostic initialization [PR98586] adds f1fc27b6c51 c++: Minor refactoring in process_init_constructor_record adds b95d97f1a5f jit: remove "Alpha" warning from docs adds 5fff80fd79c Daily bump. adds b0ccd3922f5 compiler: add support for reading embedcfg files No new revisions were added by this update. Summary of changes: ChangeLog | 8 + MAINTAINERS | 8 +- contrib/ChangeLog | 25 + contrib/gcc-changelog/git_commit.py | 44 +- contrib/gcc-changelog/test_email.py | 12 + contrib/gcc-changelog/test_patches.txt | 82 + contrib/mklog.py | 15 +- contrib/test_mklog.py | 42 + gcc/ChangeLog | 486 ++++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 6 + gcc/ada/Makefile.rtl | 5 + gcc/analyzer/ChangeLog | 28 + gcc/analyzer/analyzer.h | 2 +- gcc/analyzer/engine.cc | 29 +- gcc/analyzer/exploded-graph.h | 4 + gcc/analyzer/pending-diagnostic.h | 2 +- gcc/analyzer/store.cc | 2 +- gcc/analyzer/store.h | 4 +- gcc/analyzer/supergraph.cc | 29 +- gcc/c-family/ChangeLog | 8 + gcc/c-family/c-pretty-print.c | 10 +- gcc/cgraphunit.c | 2 - gcc/common/config/i386/i386-common.c | 2 +- gcc/config.gcc | 4 +- gcc/config/aarch64/aarch64-cost-tables.h | 103 + gcc/config/aarch64/aarch64-simd-builtins.def | 15 + gcc/config/aarch64/aarch64-simd.md | 89 + gcc/config/aarch64/aarch64-sve.md | 176 +- gcc/config/aarch64/aarch64.c | 79 +- gcc/config/aarch64/arm_neon.h | 111 +- gcc/config/aarch64/iterators.md | 6 +- gcc/config/arm/arm.c | 9 + gcc/config/arm/arm.h | 40 + gcc/config/arm/arm_neon.h | 56 +- gcc/config/arm/arm_neon_builtins.def | 2 - gcc/config/arm/mve.md | 23 + gcc/config/arm/neon.md | 25 - gcc/config/arm/vec-common.md | 23 + gcc/config/gcn/gcn-valu.md | 62 +- gcc/config/gcn/gcn.c | 28 +- gcc/config/gcn/gcn.md | 3 +- gcc/config/gcn/mkoffload.c | 260 +- gcc/config/i386/i386-builtins.c | 2 +- gcc/config/i386/i386-expand.c | 26 + gcc/config/i386/i386-options.c | 25 +- gcc/config/i386/i386-options.h | 2 +- gcc/config/i386/i386.c | 2 +- gcc/config/i386/i386.h | 6 +- gcc/config/i386/i386.md | 65 + gcc/config/i386/predicates.md | 32 + gcc/config/i386/sse.md | 189 ++ gcc/config/ia64/ia64.c | 9 + gcc/config/mips/mips.c | 9 + gcc/config/or1k/linux.h | 2 + gcc/config/or1k/or1k.h | 21 +- gcc/config/rs6000/rs6000.c | 10 + gcc/config/sh/sh.md | 3 +- gcc/config/sparc/sparc.c | 6 + gcc/configure | 7 +- gcc/configure.ac | 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gcc/testsuite/g++.dg/cpp0x/constexpr-52830.C | 1 + gcc/testsuite/g++.dg/cpp2a/concepts-ctad1.C | 16 + gcc/testsuite/g++.dg/cpp2a/concepts-ctad2.C | 13 + gcc/testsuite/g++.dg/gcov/gcov-17.C | 40 + gcc/testsuite/g++.dg/gcov/test-gcov-17.py | 37 + gcc/testsuite/g++.dg/lookup/using63.C | 17 + gcc/testsuite/g++.dg/opt/pr98550.C | 96 + gcc/testsuite/g++.dg/template/pr98372.C | 28 + gcc/testsuite/g++.dg/warn/Wuninitialized-13.C | 28 + gcc/testsuite/g++.target/aarch64/sve/cond_mla_1.C | 33 + gcc/testsuite/g++.target/aarch64/sve/cond_mla_2.C | 33 + gcc/testsuite/g++.target/aarch64/sve/cond_mla_3.C | 33 + gcc/testsuite/g++.target/aarch64/sve/cond_mla_4.C | 36 + gcc/testsuite/g++.target/aarch64/sve/cond_mla_5.C | 33 + gcc/testsuite/g++.target/aarch64/sve/cond_mls_1.C | 33 + gcc/testsuite/g++.target/aarch64/sve/cond_mls_2.C | 33 + gcc/testsuite/g++.target/aarch64/sve/cond_mls_3.C | 33 + gcc/testsuite/g++.target/aarch64/sve/cond_mls_4.C | 36 + gcc/testsuite/g++.target/aarch64/sve/cond_mls_5.C | 33 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gcc/testsuite/gcc.dg/vect/pr98674.c | 16 + .../gcc.target/aarch64/narrow_high-intrinsics.c | 6 +- .../gcc.target/aarch64/sve/cost_model_11.c | 12 + .../gcc.target/aarch64/sve/mask_struct_load_5.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/mla_2.c | 34 + gcc/testsuite/gcc.target/aarch64/sve/mls_2.c | 34 + gcc/testsuite/gcc.target/aarch64/sve/sel_1.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/sel_2.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/sel_3.c | 2 +- gcc/testsuite/gcc.target/arm/pr97969.c | 54 + gcc/testsuite/gcc.target/arm/simd/mve-vneg.c | 3 + gcc/testsuite/gcc.target/gcn/fpdiv.c | 38 + gcc/testsuite/gcc.target/i386/pr66821.c | 2 +- gcc/testsuite/gcc.target/i386/pr92645-6.c | 34 + gcc/testsuite/gcc.target/i386/pr92645-7.c | 24 + gcc/testsuite/gcc.target/i386/pr95021-1.c | 2 +- gcc/testsuite/gcc.target/i386/pr95021-3.c | 2 +- gcc/testsuite/gcc.target/i386/pr95905-1.c | 26 + gcc/testsuite/gcc.target/i386/pr95905-2.c | 82 + gcc/testsuite/gcc.target/i386/pr95905-3.c | 82 + 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libstdc++-v3/include/debug/safe_local_iterator.h | 4 +- libstdc++-v3/include/std/barrier | 4 +- libstdc++-v3/include/std/version | 4 +- libstdc++-v3/src/c++11/debug.cc | 5 +- .../2.cc => 23_containers/deque/debug/98466.cc} | 32 +- .../unordered_map/debug/98466.cc} | 36 +- libstdc++-v3/testsuite/30_threads/barrier/1.cc | 2 +- libstdc++-v3/testsuite/30_threads/barrier/2.cc | 2 +- .../testsuite/30_threads/barrier/arrive.cc | 2 +- .../30_threads/barrier/arrive_and_drop.cc | 2 +- .../30_threads/barrier/arrive_and_wait.cc | 2 +- .../testsuite/30_threads/barrier/completion.cc | 2 +- .../testsuite/30_threads/future/members/poll.cc | 33 +- 240 files changed, 7202 insertions(+), 7686 deletions(-) create mode 100644 gcc/go/gofrontend/embed.cc create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-ctad1.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-ctad2.C create mode 100644 gcc/testsuite/g++.dg/gcov/gcov-17.C create mode 100644 gcc/testsuite/g++.dg/gcov/test-gcov-17.py create mode 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gcc/testsuite/gcc.target/i386/pr95905-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr95905-3.c create mode 100644 gcc/testsuite/gcc.target/i386/pr95905-4.c create mode 100644 gcc/testsuite/gcc.target/i386/pr96938.c create mode 100644 gcc/testsuite/gcc.target/i386/pr98667-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr98667-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr98667-3.c create mode 100644 gcc/testsuite/gcc.target/i386/pr98670.c create mode 100644 gcc/testsuite/gfortran.dg/pr98661.f90 create mode 100644 gcc/testsuite/substr_10.f90 create mode 100644 gcc/testsuite/substr_9.f90 delete mode 100644 libcody/Makesub.in delete mode 100755 libcody/build-aux/config.guess delete mode 100755 libcody/build-aux/config.sub delete mode 100755 libcody/build-aux/install-sh delete mode 100644 libcody/dox.cfg.in delete mode 100644 libcody/gdbinit.in copy libstdc++-v3/testsuite/{30_threads/barrier/2.cc => 23_containers/deque/debug/ [...] copy libstdc++-v3/testsuite/{30_threads/barrier/1.cc => 23_containers/unordered_ma [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig updated (c14dee84dd -> bb3eddb5bd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig in repository toolchain/ci/binutils-gdb. from c14dee84dd Update my email address (long overdue!) adds 17e8913732 Add myself to gdb/MAINTAINERS adds 5aa06b1b14 Automatic date update in version.in adds 5fda40b28f gas: make [248]byte directives available everywhere adds 3624a6c15c PR26539, memory leak in inflate.c adds 37a9c3a53e sim: testsuite: allow tests to declare expected exit status adds 7cf91a2481 sim: m32r: clean up redundant test coverage adds 89bfc2a429 sim: frv: clean up redundant test coverage adds 137d6efd8a sim: mips: delete empty stub test dir adds 29fd199ed8 sim: d10v: relocate tests & clean up test harness adds bb3eddb5bd sim: testsuite: delete configure script No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- binutils/ChangeLog | 5 + binutils/readelf.c | 6 +- gas/ChangeLog | 7 + gas/config/obj-elf.c | 4 - gas/doc/as.texi | 7 - gas/read.c | 3 + gdb/ChangeLog | 4 + gdb/MAINTAINERS | 1 + sim/ChangeLog | 7 + sim/configure | 16 +- sim/configure.ac | 16 +- sim/testsuite/ChangeLog | 36 + sim/testsuite/Makefile.in | 8 +- sim/testsuite/configure | 3264 -------------------- sim/testsuite/configure.ac | 32 - sim/testsuite/d10v-elf/Makefile.in | 180 -- sim/testsuite/d10v-elf/configure | 2984 ------------------ sim/testsuite/d10v-elf/configure.ac | 18 - sim/testsuite/d10v-elf/exit47.s | 4 - sim/testsuite/d10v-elf/loop.s | 6 - sim/testsuite/frv-elf/ChangeLog | 48 - sim/testsuite/frv-elf/Makefile.in | 158 - sim/testsuite/frv-elf/configure | 2984 ------------------ sim/testsuite/frv-elf/configure.ac | 18 - sim/testsuite/frv-elf/loop.s | 2 - sim/testsuite/lib/sim-defs.exp | 23 +- sim/testsuite/m32r-elf/ChangeLog | 18 - sim/testsuite/m32r-elf/Makefile.in | 156 - sim/testsuite/m32r-elf/configure | 2984 ------------------ sim/testsuite/m32r-elf/configure.ac | 18 - sim/testsuite/m32r-elf/hello.s | 17 - sim/testsuite/m32r-elf/loop.s | 2 - sim/testsuite/mips64el-elf/ChangeLog | 19 - sim/testsuite/mips64el-elf/Makefile.in | 170 - sim/testsuite/mips64el-elf/configure | 2984 ------------------ sim/testsuite/mips64el-elf/configure.ac | 18 - sim/testsuite/sim/cris/ChangeLog | 7 + sim/testsuite/sim/cris/c/c.exp | 7 +- sim/testsuite/sim/cris/hw/rv-n-cris/rvc.exp | 2 +- sim/testsuite/{d10v-elf => sim/d10v}/ChangeLog | 5 + sim/testsuite/sim/d10v/allinsn.exp | 17 + .../{d10v-elf/t-trap.s => sim/d10v/exit47.s} | 5 +- sim/testsuite/{d10v-elf => sim/d10v}/hello.s | 3 + sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-d.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-i.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-id.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-im.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-ip.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld2w-d.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld2w-i.s | 6 +- .../{d10v-elf => sim/d10v}/t-ae-ld2w-id.s | 6 +- .../{d10v-elf => sim/d10v}/t-ae-ld2w-im.s | 6 +- .../{d10v-elf => sim/d10v}/t-ae-ld2w-ip.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-d.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-i.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-id.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-im.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-ip.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-is.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st2w-d.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st2w-i.s | 6 +- .../{d10v-elf => sim/d10v}/t-ae-st2w-id.s | 6 +- .../{d10v-elf => sim/d10v}/t-ae-st2w-im.s | 6 +- .../{d10v-elf => sim/d10v}/t-ae-st2w-ip.s | 6 +- .../{d10v-elf => sim/d10v}/t-ae-st2w-is.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-dbt.s | 7 +- sim/testsuite/{d10v-elf => sim/d10v}/t-ld-st.s | 4 + sim/testsuite/{d10v-elf => sim/d10v}/t-mac.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-macros.i | 12 +- .../{d10v-elf => sim/d10v}/t-mod-ld-pre.s | 56 +- sim/testsuite/{d10v-elf => sim/d10v}/t-msbu.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-mulxu.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-mvtac.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-mvtc.s | 9 +- sim/testsuite/{d10v-elf => sim/d10v}/t-rac.s | 4 + sim/testsuite/{d10v-elf => sim/d10v}/t-rachi.s | 4 + sim/testsuite/{d10v-elf => sim/d10v}/t-rdt.s | 7 +- sim/testsuite/{d10v-elf => sim/d10v}/t-rep.s | 8 +- sim/testsuite/{d10v-elf => sim/d10v}/t-rie-xx.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-rte.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-sac.s | 4 + sim/testsuite/{d10v-elf => sim/d10v}/t-sachi.s | 4 + sim/testsuite/{d10v-elf => sim/d10v}/t-sadd.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-slae.s | 4 + sim/testsuite/{d10v-elf => sim/d10v}/t-sp.s | 6 +- sim/testsuite/{d10v-elf => sim/d10v}/t-sub.s | 4 + sim/testsuite/{d10v-elf => sim/d10v}/t-sub2w.s | 16 +- sim/testsuite/{d10v-elf => sim/d10v}/t-subi.s | 4 + sim/testsuite/sim/d10v/t-trap.s | 10 + sim/testsuite/sim/frv/ChangeLog | 6 + .../{frv-elf/cache.s => sim/frv/cache.ms} | 6 +- .../{frv-elf/exit47.s => sim/frv/exit47.ms} | 6 + .../{frv-elf/grloop.s => sim/frv/grloop.ms} | 3 + .../{frv-elf/hello.s => sim/frv/hello.ms} | 3 + sim/testsuite/sim/frv/misc.exp | 19 + sim/testsuite/sim/m32r/ChangeLog | 4 + .../{m32r-elf/exit47.s => sim/m32r/exit47.ms} | 4 + 98 files changed, 449 insertions(+), 16214 deletions(-) delete mode 100755 sim/testsuite/configure delete mode 100644 sim/testsuite/configure.ac delete mode 100644 sim/testsuite/d10v-elf/Makefile.in delete mode 100755 sim/testsuite/d10v-elf/configure delete mode 100644 sim/testsuite/d10v-elf/configure.ac delete mode 100644 sim/testsuite/d10v-elf/exit47.s delete mode 100644 sim/testsuite/d10v-elf/loop.s delete mode 100644 sim/testsuite/frv-elf/ChangeLog delete mode 100644 sim/testsuite/frv-elf/Makefile.in delete mode 100755 sim/testsuite/frv-elf/configure delete mode 100644 sim/testsuite/frv-elf/configure.ac delete mode 100644 sim/testsuite/frv-elf/loop.s delete mode 100644 sim/testsuite/m32r-elf/ChangeLog delete mode 100644 sim/testsuite/m32r-elf/Makefile.in delete mode 100755 sim/testsuite/m32r-elf/configure delete mode 100644 sim/testsuite/m32r-elf/configure.ac delete mode 100644 sim/testsuite/m32r-elf/hello.s delete mode 100644 sim/testsuite/m32r-elf/loop.s delete mode 100644 sim/testsuite/mips64el-elf/ChangeLog delete mode 100644 sim/testsuite/mips64el-elf/Makefile.in delete mode 100755 sim/testsuite/mips64el-elf/configure delete mode 100644 sim/testsuite/mips64el-elf/configure.ac rename sim/testsuite/{d10v-elf => sim/d10v}/ChangeLog (96%) create mode 100644 sim/testsuite/sim/d10v/allinsn.exp rename sim/testsuite/{d10v-elf/t-trap.s => sim/d10v/exit47.s} (52%) rename sim/testsuite/{d10v-elf => sim/d10v}/hello.s (54%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-d.s (76%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-i.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-id.s (78%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-im.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld-ip.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld2w-d.s (77%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld2w-i.s (80%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld2w-id.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld2w-im.s (80%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-ld2w-ip.s (80%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-d.s (76%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-i.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-id.s (78%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-im.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-ip.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st-is.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st2w-d.s (77%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st2w-i.s (80%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st2w-id.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st2w-im.s (80%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st2w-ip.s (80%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ae-st2w-is.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-dbt.s (88%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-ld-st.s (88%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-mac.s (95%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-macros.i (97%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-mod-ld-pre.s (90%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-msbu.s (87%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-mulxu.s (87%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-mvtac.s (84%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-mvtc.s (95%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-rac.s (82%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-rachi.s (87%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-rdt.s (75%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-rep.s (90%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-rie-xx.s (79%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-rte.s (78%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-sac.s (85%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-sachi.s (83%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-sadd.s (92%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-slae.s (92%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-sp.s (78%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-sub.s (92%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-sub2w.s (93%) rename sim/testsuite/{d10v-elf => sim/d10v}/t-subi.s (92%) create mode 100644 sim/testsuite/sim/d10v/t-trap.s rename sim/testsuite/{frv-elf/cache.s => sim/frv/cache.ms} (95%) rename sim/testsuite/{frv-elf/exit47.s => sim/frv/exit47.ms} (50%) rename sim/testsuite/{frv-elf/grloop.s => sim/frv/grloop.ms} (86%) rename sim/testsuite/{frv-elf/hello.s => sim/frv/hello.ms} (86%) create mode 100644 sim/testsuite/sim/frv/misc.exp rename sim/testsuite/{m32r-elf/exit47.s => sim/m32r/exit47.ms} (66%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig updated (4168b085 -> 6e194911)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards 4168b085 4: update: gcc-ab96073df00159aa02860b4d128e54909cb75068: 19144 discards 6c86b84a 3: reset: gcc-9febe9e4be7812519258ea3ed4f38bbc1a61624b: 19144 discards 9be88dfb 2: update: binutils-gcc-linux-qemu: 19158 new 6e194911 2: update: binutils-gcc-linux-qemu: 19158 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4168b085) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-lt [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 138 +- 02-prepare_abe/console.log | 438 +- 03-build_abe-binutils/console.log | 11155 ++++---- 04-build_abe-stage1/console.log | 20799 +++++++-------- 05-build_linux/console.log | 9950 ++++--- 08-check_regression/console.log | 12 +- 08-check_regression/results.regressions | 20 +- 09-update_baseline/console.log | 180 +- 09-update_baseline/results.regressions | 20 +- console.log | 42698 +++++++++++++++--------------- jenkins/manifest.sh | 18 +- results | 2 +- 12 files changed, 43050 insertions(+), 42380 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allmodconfig updated (1e151fb4352 -> ed0aa6151e7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allmodconfig in repository toolchain/ci/gcc. from 1e151fb4352 Daily bump. adds 3e08dcab3aa Objective-C++ : Fix ICE in potential_constant_expression_1. adds 1e56a7c9a66 [nvptx libgomp plugin] Build only in supported configurations adds d697bf91a54 [gcn offloading] Only supported in 64-bit configurations adds ed0aa6151e7 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 8 +++ gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 8 +++ gcc/c-family/c-objc.h | 1 + gcc/c-family/stub-objc.c | 6 ++ gcc/config/gcn/mkoffload.c | 142 ++++++++++++++++++++++-------------------- gcc/cp/ChangeLog | 8 +++ gcc/cp/constexpr.c | 2 +- gcc/objc/ChangeLog | 7 +++ gcc/objc/objc-act.c | 16 ++++- libgomp/ChangeLog | 12 ++++ libgomp/configure | 85 +++++++++++++++---------- libgomp/plugin/configfrag.ac | 91 ++++++++++++++++----------- libgomp/plugin/plugin-nvptx.c | 9 --- 14 files changed, 246 insertions(+), 151 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allmodconfig updated (c89da396 -> ecc11c14)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards c89da396 0: update: binutils-gcc-linux-qemu: boot new ecc11c14 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (c89da396) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 191 +- 02-prepare_abe/console.log | 438 +- 03-build_abe-binutils/console.log | 11538 +++++------ 04-build_abe-stage1/console.log | 14012 +++++++------ 05-build_linux/console.log | 808 +- 06-build_abe-qemu/console.log | 4660 ++--- 07-boot_linux/console.log | 8 +- 08-check_regression/console.log | 12 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 12 +- 09-update_baseline/results.regressions | 2 +- console.log | 31679 +++++++++++++++--------------- jenkins/manifest.sh | 10 +- 13 files changed, 31693 insertions(+), 31679 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig updated (1e151fb4352 -> ed0aa6151e7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig in repository toolchain/ci/gcc. from 1e151fb4352 Daily bump. adds 3e08dcab3aa Objective-C++ : Fix ICE in potential_constant_expression_1. adds 1e56a7c9a66 [nvptx libgomp plugin] Build only in supported configurations adds d697bf91a54 [gcn offloading] Only supported in 64-bit configurations adds ed0aa6151e7 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 8 +++ gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 8 +++ gcc/c-family/c-objc.h | 1 + gcc/c-family/stub-objc.c | 6 ++ gcc/config/gcn/mkoffload.c | 142 ++++++++++++++++++++++-------------------- gcc/cp/ChangeLog | 8 +++ gcc/cp/constexpr.c | 2 +- gcc/objc/ChangeLog | 7 +++ gcc/objc/objc-act.c | 16 ++++- libgomp/ChangeLog | 12 ++++ libgomp/configure | 85 +++++++++++++++---------- libgomp/plugin/configfrag.ac | 91 ++++++++++++++++----------- libgomp/plugin/plugin-nvptx.c | 9 --- 14 files changed, 246 insertions(+), 151 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig updated (50a4d261 -> b2a1f83b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards 50a4d261 0: update: binutils-gcc-linux-qemu: boot new b2a1f83b 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (50a4d261) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 181 +- 02-prepare_abe/console.log | 440 +- 03-build_abe-binutils/console.log | 11912 +++++------ 04-build_abe-stage1/console.log | 13928 +++++++------ 05-build_linux/console.log | 806 +- 06-build_abe-qemu/console.log | 4647 ++--- 07-boot_linux/console.log | 4 +- 08-check_regression/console.log | 8 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 12 +- 09-update_baseline/results.regressions | 2 +- console.log | 31690 +++++++++++++++--------------- jenkins/manifest.sh | 10 +- 13 files changed, 31827 insertions(+), 31815 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig updated (9febe9e4be7 -> 3dd0d3ee1d2)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig in repository toolchain/ci/gcc. from 9febe9e4be7 widening_mul: Pattern recognize also signed multiplication [...] adds 9a6c37e6ae5 reassoc: Reassociate integral multiplies [PR95867] adds 39666d2b885 slp: fix is_linear_load_p to prevent multiple answers adds bd4298e1927 slp: handle externals correctly in linear_loads_p adds 0c18faac3fb slp: upgrade complex add to new format and fix memory leaks adds 300a3ce5c56 tree-optimization/98221 - fix wrong unpack operation used f [...] adds 928e96bbe98 d: Remove visibility and lookup deprecation adds 04bff1bbfc1 tree-optimization/98526 - fix vectorizer reduction cost adds 6ebf79fcd4c testsuite: Fix test failures from outputs.exp [PR98225] adds 84684e0f78c tree-optimization/91403 - avoid excessive code-generation adds 3b25e83536b Port update-copyright.py to Python3 adds 8c09b788a96 Make the serialized link target more verbose adds 3dd0d3ee1d2 c++, abi: Fix abi_tag attribute handling [PR98481] No new revisions were added by this update. Summary of changes: contrib/update-copyright.py | 25 +++++-- gcc/Makefile.in | 2 +- gcc/cp/class.c | 8 +++ gcc/cp/decl2.c | 7 +- gcc/cp/tree.c | 22 +++++-- gcc/d/d-lang.cc | 8 --- gcc/d/dmd/MERGE | 2 +- gcc/d/dmd/access.c | 21 ++---- gcc/d/dmd/dscope.c | 75 ++------------------- gcc/d/dmd/dsymbol.c | 23 ++----- gcc/d/dmd/expression.c | 35 +--------- gcc/d/dmd/expression.h | 2 +- gcc/d/dmd/expressionsem.c | 47 +++++++++---- gcc/d/dmd/globals.h | 2 - gcc/d/dmd/mtype.c | 69 +++---------------- gcc/d/dmd/parse.c | 1 - gcc/d/dmd/scope.h | 1 - gcc/d/dmd/traits.c | 2 +- gcc/d/gdc.texi | 10 --- gcc/d/lang.opt | 8 --- gcc/testsuite/g++.dg/abi/abi-tag24.C | 17 +++++ gcc/testsuite/gcc.dg/tree-ssa/pr95867.c | 14 ++++ gcc/testsuite/gcc.dg/vect/pr91403.c | 11 ++++ gcc/testsuite/gcc.misc-tests/outputs.exp | 23 +++++-- gcc/testsuite/gdc.test/compilable/checkimports3.d | 12 ++++ gcc/testsuite/gdc.test/compilable/ddoc14633.d | 6 -- gcc/testsuite/gdc.test/compilable/deprecate14283.d | 6 -- gcc/testsuite/gdc.test/compilable/diag11066.d | 6 -- .../{fail_compilation => compilable}/diag12598.d | 7 +- gcc/testsuite/gdc.test/compilable/diag3243.d | 6 -- gcc/testsuite/gdc.test/compilable/dip22d.d | 10 +++ .../imports/checkimports3a.d | 0 .../imports/checkimports3b.d | 0 .../imports/checkimports3c.d | 0 .../imports/diag12598a.d | 0 .../imports/dip22d.d | 0 .../imports/dip22e.d | 0 gcc/testsuite/gdc.test/compilable/test12567a.d | 5 -- gcc/testsuite/gdc.test/compilable/test12567b.d | 5 -- gcc/testsuite/gdc.test/compilable/test12567d.d | 5 -- gcc/testsuite/gdc.test/compilable/test12567e.d | 5 -- gcc/testsuite/gdc.test/compilable/test13053.d | 6 -- gcc/testsuite/gdc.test/compilable/test14375.d | 6 +- gcc/testsuite/gdc.test/compilable/test15785.d | 5 -- gcc/testsuite/gdc.test/compilable/test15856.d | 2 +- gcc/testsuite/gdc.test/compilable/test15925.d | 18 ----- gcc/testsuite/gdc.test/compilable/test17791.d | 7 +- gcc/testsuite/gdc.test/compilable/test7815.d | 6 -- .../gdc.test/compilable/testcheckimports.d | 8 +-- gcc/testsuite/gdc.test/compilable/warn3882.d | 6 -- .../gdc.test/fail_compilation/checkimports1a.d | 20 ------ .../gdc.test/fail_compilation/checkimports1b.d | 20 ------ .../gdc.test/fail_compilation/checkimports1c.d | 20 ------ .../gdc.test/fail_compilation/checkimports2a.d | 15 ++--- .../gdc.test/fail_compilation/checkimports2b.d | 13 +--- .../gdc.test/fail_compilation/checkimports2c.d | 14 +--- .../gdc.test/fail_compilation/checkimports3.d | 15 ----- .../gdc.test/fail_compilation/diag10169.d | 3 +- gcc/testsuite/gdc.test/fail_compilation/diag5385.d | 24 +++---- gcc/testsuite/gdc.test/fail_compilation/dip22a.d | 17 ++--- gcc/testsuite/gdc.test/fail_compilation/dip22b.d | 4 +- gcc/testsuite/gdc.test/fail_compilation/dip22d.d | 12 ---- gcc/testsuite/gdc.test/fail_compilation/dip22e.d | 6 +- .../gdc.test/fail_compilation/fail10528.d | 20 +++--- gcc/testsuite/gdc.test/fail_compilation/fail262.d | 2 +- gcc/testsuite/gdc.test/fail_compilation/fail313.d | 8 +-- .../imports/imp15925.d | 0 .../gdc.test/fail_compilation/imports/imp21353.d | 7 ++ .../gdc.test/fail_compilation/imports/test15117a.d | 9 +++ gcc/testsuite/gdc.test/fail_compilation/lookup.d | 4 +- gcc/testsuite/gdc.test/fail_compilation/test143.d | 2 +- .../gdc.test/fail_compilation/test15117.d | 30 +++++++++ .../gdc.test/fail_compilation/test15785.d | 7 +- .../gdc.test/fail_compilation/test15785b.d | 8 +-- .../gdc.test/fail_compilation/test15897.d | 2 +- .../gdc.test/fail_compilation/test15925.d | 19 ++++++ .../gdc.test/fail_compilation/test21353.d | 26 ++++++++ gcc/testsuite/gdc.test/fail_compilation/test314.d | 10 +-- gcc/tree-ssa-forwprop.c | 21 +++--- gcc/tree-ssa-math-opts.c | 7 +- gcc/tree-ssa-math-opts.h | 26 ++++++++ gcc/tree-ssa-reassoc.c | 77 ++++++++++++++++------ gcc/tree-vect-data-refs.c | 6 +- gcc/tree-vect-loop.c | 17 +++-- gcc/tree-vect-slp-patterns.c | 47 ++++++++----- 85 files changed, 494 insertions(+), 616 deletions(-) create mode 100644 gcc/testsuite/g++.dg/abi/abi-tag24.C create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr95867.c create mode 100644 gcc/testsuite/gcc.dg/vect/pr91403.c create mode 100644 gcc/testsuite/gdc.test/compilable/checkimports3.d rename gcc/testsuite/gdc.test/{fail_compilation => compilable}/diag12598.d (50%) create mode 100644 gcc/testsuite/gdc.test/compilable/dip22d.d rename gcc/testsuite/gdc.test/{fail_compilation => compilable}/imports/checkimport [...] rename gcc/testsuite/gdc.test/{fail_compilation => compilable}/imports/checkimport [...] rename gcc/testsuite/gdc.test/{fail_compilation => compilable}/imports/checkimport [...] rename gcc/testsuite/gdc.test/{fail_compilation => compilable}/imports/diag12598a. [...] copy gcc/testsuite/gdc.test/{fail_compilation => compilable}/imports/dip22d.d (100%) copy gcc/testsuite/gdc.test/{fail_compilation => compilable}/imports/dip22e.d (100%) delete mode 100644 gcc/testsuite/gdc.test/compilable/test15925.d delete mode 100644 gcc/testsuite/gdc.test/fail_compilation/checkimports1a.d delete mode 100644 gcc/testsuite/gdc.test/fail_compilation/checkimports1b.d delete mode 100644 gcc/testsuite/gdc.test/fail_compilation/checkimports1c.d delete mode 100644 gcc/testsuite/gdc.test/fail_compilation/checkimports3.d delete mode 100644 gcc/testsuite/gdc.test/fail_compilation/dip22d.d rename gcc/testsuite/gdc.test/{compilable => fail_compilation}/imports/imp15925.d (100%) create mode 100644 gcc/testsuite/gdc.test/fail_compilation/imports/imp21353.d create mode 100644 gcc/testsuite/gdc.test/fail_compilation/imports/test15117a.d create mode 100644 gcc/testsuite/gdc.test/fail_compilation/test15117.d create mode 100644 gcc/testsuite/gdc.test/fail_compilation/test15925.d create mode 100644 gcc/testsuite/gdc.test/fail_compilation/test21353.d create mode 100644 gcc/tree-ssa-math-opts.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits January 2021