Tcwg-commits January 2021

tcwg-commits@lists.linaro.org

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9360 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_cross/gnu-release-aarch64-build_cross updated (0b355770 -> 48a12406)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_cross/gnu-release-aarch64-build_cross in repository toolchain/ci/base-artifacts. discards 0b355770 0: update: binutils-gcc-glibc-qemu: 6 new 48a12406 0: update: binutils-gcc-glibc-qemu: 6 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (0b355770) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_cross/gnu-release-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 173 +- 02-prepare_abe/console.log | 432 +- 04-build_abe-binutils/console.log | 11591 ++-- 05-build_abe-stage1/console.log | 13951 +++-- 06-build_abe-linux/console.log | 1974 +- 07-build_abe-glibc/console.log | 37044 +++++++------ 08-build_abe-stage2/console.log | 35269 ++++++------ 09-build_abe-qemu/console.log | 4476 +- 10-check_regression/console.log | 2 +- 11-update_baseline/console.log | 2 +- console.log | 104916 +++++++++++++++++------------------ jenkins/manifest.sh | 10 +- 12 files changed, 104884 insertions(+), 104956 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig updated (7cb6b97300 -> 825a215c00)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig in repository toolchain/ci/qemu. from 7cb6b97300 Merge remote-tracking branch 'remotes/kraxel/tags/ui-2021011 [...] adds ef26632e3a sdlaudio: remove leftover SDL1.2 code adds ff69c481a2 audio: fix bit-rotted code adds 5a0926c23f sdlaudio: add -audiodev sdl,out.buffer-count option adds 14cefe14bb sdlaudio: don't start playback in init routine adds bcce2ea5f6 sdlaudio: always clear the sample buffer adds e02d178f78 sdlaudio: fill remaining sample buffer with silence adds ce31f099fb sdlaudio: replace legacy functions with modern ones adds a2893c8303 audio: split pcm_ops function get_buffer_in adds c2031dea89 sdlaudio: add recording functions adds 1d8549ad5e audio: break generic buffer dependency on mixing-engine adds bd37ede4eb sdlaudio: enable (in|out).mixing-engine=off adds 6fb0cd5054 audio: remove remaining unused plive code adds bea29e9f2e paaudio: avoid to clip samples multiple times adds e270c54826 paaudio: wait for PA_STREAM_READY in qpa_write() adds 7007cd3fc8 paaudio: wait until the playback stream is ready adds 521ce71425 paaudio: remove unneeded code adds cffd2fdf2c paaudio: comment bugs in functions qpa_init_* adds 00413ed9c2 paaudio: limit minreq to 75% of audio timer_rate adds d9a8b27a7e paaudio: send recorded data in smaller chunks adds 401dcf0540 dsoundaudio: replace GetForegroundWindow() adds 3c18e43179 dsoundaudio: rename dsound_open() adds 1157506161 dsoundaudio: enable f32 audio sample format adds 2d96a00587 dsoundaudio: fix log message adds 6c6886bd01 audio: Add braces for statements/fix braces' position adds 3c8de96c07 audio: Add spaces around operator/delete redundant spaces adds dcf10e4095 audio: foo* bar" should be "foo *bar". adds c60840c758 audio: Fix lines over 90 characters adds dea7d84fcf audio: Don't use '%#' in format strings adds 289db3c5a2 audio: Suspect code indent for conditional statements adds 8abf3feb4d audio: space prohibited between function name and parenthesis'(' adds 825a215c00 Merge remote-tracking branch 'remotes/kraxel/tags/audio-2021 [...] No new revisions were added by this update. Summary of changes: audio/alsaaudio.c | 18 ++- audio/audio.c | 74 +++++------- audio/audio_int.h | 2 + audio/audio_legacy.c | 3 +- audio/audio_template.h | 26 ++--- audio/audio_win_int.c | 73 ++++++++---- audio/coreaudio.c | 17 ++- audio/dsound_template.h | 2 +- audio/dsoundaudio.c | 56 +++++---- audio/jackaudio.c | 3 +- audio/noaudio.c | 1 + audio/ossaudio.c | 13 +-- audio/paaudio.c | 73 +++++++++--- audio/sdlaudio.c | 305 ++++++++++++++++++++++++++++++++++-------------- audio/spiceaudio.c | 1 + qapi/audio.json | 33 +++++- qemu-options.hx | 8 +- 17 files changed, 472 insertions(+), 236 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig updated (9beb6d88eff -> a6d22fb21c6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig in repository toolchain/ci/gcc. from 9beb6d88eff c++: Fix qualified array-type construction [PR 98538] adds b90e4a97419 fortran: Fixes a bug in ISO_Fortran_binding.c. adds c029fcb5680 Reset force_source_line in final.c adds f1ad419ebfd rs6000, vector integer multiply/divide/modulo instructions adds 2f7f0d32e74 Daily bump. adds 2c356f221bb libstdc++-v3: Add -fcf-protection=none to -march=i486 adds b673e7547fb cd_dce: Return TODO_update_address_taken from last cd_dce [ [...] adds e2559c3945a match.pd: Optimize ((cst << x) & 1) [PR96669] adds 7e02426ba0c nios2: Remove custom instruction warnings adds 42f4e239924 nios2: Add -mcustom-fpu-cfg=fph2 adds 5e5d56919dd RTEMS: Add -mcustom-fpu-cfg=fph2 multilib new a6d22fb21c6 openmp: Add support for the OpenMP 5.0 task detach clause The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 170 +++++++++ gcc/DATESTAMP | 2 +- gcc/builtin-types.def | 8 +- gcc/c-family/ChangeLog | 12 + gcc/c-family/c-pragma.h | 3 +- gcc/c/ChangeLog | 6 + gcc/c/c-parser.c | 57 ++- gcc/c/c-typeck.c | 58 ++- gcc/config/nios2/nios2.c | 51 ++- gcc/config/nios2/t-rtems | 146 +------- gcc/config/rs6000/altivec.h | 4 + gcc/config/rs6000/altivec.md | 2 - gcc/config/rs6000/rs6000-builtin.def | 21 ++ gcc/config/rs6000/rs6000-call.c | 53 +++ gcc/config/rs6000/rs6000.md | 5 +- gcc/config/rs6000/vsx.md | 211 ++++++++--- gcc/cp/ChangeLog | 35 ++ gcc/cp/parser.c | 53 ++- gcc/cp/pt.c | 1 + gcc/cp/semantics.c | 61 +++- gcc/doc/extend.texi | 120 +++++++ gcc/doc/invoke.texi | 28 ++ gcc/final.c | 1 + gcc/fortran/dump-parse-tree.c | 6 + gcc/fortran/frontend-passes.c | 1 + gcc/fortran/gfortran.h | 2 + gcc/fortran/openmp.c | 60 +++- gcc/fortran/trans-openmp.c | 16 + gcc/fortran/trans-types.c | 3 + gcc/fortran/types.def | 8 +- gcc/gimplify.c | 14 + gcc/go/ChangeLog | 4 + gcc/match.pd | 7 + gcc/omp-builtins.def | 2 +- gcc/omp-expand.c | 19 +- gcc/omp-low.c | 47 +++ gcc/passes.def | 8 +- gcc/testsuite/ChangeLog | 156 ++++++++ gcc/testsuite/c-c++-common/gomp/task-detach-1.c | 37 ++ gcc/testsuite/g++.dg/gomp/task-detach-1.C | 29 ++ gcc/testsuite/gcc.dg/gomp/task-detach-1.c | 20 ++ gcc/testsuite/gcc.dg/tree-ssa/pr96669-1.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/pr96669-2.c | 30 ++ gcc/testsuite/gcc.target/i386/pr96271.c | 11 + .../gcc.target/powerpc/builtins-1-p10-runnable.c | 398 +++++++++++++++++++++ gcc/testsuite/gfortran.dg/gomp/task-detach-1.f90 | 29 ++ .../iso_fortran_binding_uint8_array.f90 | 11 + .../iso_fortran_binding_uint8_array_driver.c | 25 ++ gcc/tree-core.h | 29 +- gcc/tree-nested.c | 2 + gcc/tree-pretty-print.c | 6 + gcc/tree-ssa-dce.c | 15 +- gcc/tree.c | 15 +- include/gomp-constants.h | 1 + libatomic/ChangeLog | 9 + libcpp/ChangeLog | 5 + libgfortran/ChangeLog | 6 + libgfortran/runtime/ISO_Fortran_binding.c | 3 +- libgomp/ChangeLog | 7 + libgomp/fortran.c | 6 + libgomp/libgomp.h | 7 + libgomp/libgomp.map | 2 + libgomp/libgomp_g.h | 2 +- libgomp/omp.h.in | 7 + libgomp/omp_lib.f90.in | 9 + libgomp/omp_lib.h.in | 4 + libgomp/priority_queue.c | 57 +++ libgomp/priority_queue.h | 5 + libgomp/task.c | 132 +++++-- libgomp/team.c | 4 + .../testsuite/libgomp.c-c++-common/task-detach-1.c | 36 ++ .../testsuite/libgomp.c-c++-common/task-detach-2.c | 37 ++ .../testsuite/libgomp.c-c++-common/task-detach-3.c | 33 ++ .../testsuite/libgomp.c-c++-common/task-detach-4.c | 24 ++ .../testsuite/libgomp.c-c++-common/task-detach-5.c | 42 +++ .../testsuite/libgomp.c-c++-common/task-detach-6.c | 46 +++ .../testsuite/libgomp.fortran/task-detach-1.f90 | 33 ++ .../testsuite/libgomp.fortran/task-detach-2.f90 | 34 ++ .../testsuite/libgomp.fortran/task-detach-3.f90 | 33 ++ .../testsuite/libgomp.fortran/task-detach-4.f90 | 22 ++ .../testsuite/libgomp.fortran/task-detach-5.f90 | 39 ++ .../testsuite/libgomp.fortran/task-detach-6.f90 | 44 +++ libitm/ChangeLog | 7 + .../atomic_flag/test_and_set/explicit-hle.cc | 2 +- 84 files changed, 2535 insertions(+), 283 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/gomp/task-detach-1.c create mode 100644 gcc/testsuite/g++.dg/gomp/task-detach-1.C create mode 100644 gcc/testsuite/gcc.dg/gomp/task-detach-1.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr96669-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr96271.c create mode 100644 gcc/testsuite/gcc.target/powerpc/builtins-1-p10-runnable.c create mode 100644 gcc/testsuite/gfortran.dg/gomp/task-detach-1.f90 create mode 100644 gcc/testsuite/gfortran.dg/iso_fortran_binding_uint8_array.f90 create mode 100644 gcc/testsuite/gfortran.dg/iso_fortran_binding_uint8_array_driver.c create mode 100644 libgomp/testsuite/libgomp.c-c++-common/task-detach-1.c create mode 100644 libgomp/testsuite/libgomp.c-c++-common/task-detach-2.c create mode 100644 libgomp/testsuite/libgomp.c-c++-common/task-detach-3.c create mode 100644 libgomp/testsuite/libgomp.c-c++-common/task-detach-4.c create mode 100644 libgomp/testsuite/libgomp.c-c++-common/task-detach-5.c create mode 100644 libgomp/testsuite/libgomp.c-c++-common/task-detach-6.c create mode 100644 libgomp/testsuite/libgomp.fortran/task-detach-1.f90 create mode 100644 libgomp/testsuite/libgomp.fortran/task-detach-2.f90 create mode 100644 libgomp/testsuite/libgomp.fortran/task-detach-3.f90 create mode 100644 libgomp/testsuite/libgomp.fortran/task-detach-4.f90 create mode 100644 libgomp/testsuite/libgomp.fortran/task-detach-5.f90 create mode 100644 libgomp/testsuite/libgomp.fortran/task-detach-6.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig updated (5a11fff005 -> 75a933f399)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig in repository toolchain/ci/binutils-gdb. from 5a11fff005 gdb/tui: compare pointer to nullptr, not 0 adds e403a898b5 Automatic date update in version.in adds 1368b914e9 sim: testsuite: flatten tree adds eb6e6af8c1 PR26002 undefined symbol VER_NDX_GLOBAL vs. VER_NDX_LOCAL adds ad92f33d38 Tidy inflateEnd calls adds 68b007788a ld/x86: Add -z report-relative-reloc adds 75a933f399 ld/elf/x86: Don't compare IFUNC address in the shared object No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 31 ++++++++++++++ bfd/compress.c | 3 +- bfd/elf-linker-x86.h | 3 ++ bfd/elf32-i386.c | 36 ++++++++++++++++ bfd/elf64-x86-64.c | 33 ++++++++++++++ bfd/elflink.c | 2 +- bfd/elfxx-x86.c | 50 +++++++++++++++++++++- bfd/elfxx-x86.h | 4 ++ bfd/version.h | 2 +- binutils/ChangeLog | 4 ++ binutils/readelf.c | 4 +- ld/ChangeLog | 34 +++++++++++++++ ld/NEWS | 3 ++ ld/emulparams/elf32_x86_64.sh | 1 + ld/emulparams/elf_i386.sh | 1 + ld/emulparams/elf_x86_64.sh | 1 + ld/emulparams/x86-report-relative.sh | 11 +++++ ld/ld.texi | 4 ++ ld/testsuite/ld-elfvers/vers16.dsym | 2 +- ld/testsuite/ld-elfvers/vers6.dsym | 2 +- ld/testsuite/ld-i386/i386.exp | 1 + ld/testsuite/ld-i386/report-reloc-1.d | 10 +++++ ld/testsuite/ld-i386/report-reloc-1.l | 2 + ld/testsuite/ld-i386/report-reloc-1.s | 12 ++++++ ld/testsuite/ld-ifunc/ifunc.exp | 22 +--------- ld/testsuite/ld-ifunc/pr23169a.c | 2 +- ld/testsuite/ld-x86-64/report-reloc-1-x32.d | 10 +++++ ld/testsuite/ld-x86-64/report-reloc-1.d | 10 +++++ ld/testsuite/ld-x86-64/report-reloc-1.l | 2 + ld/testsuite/ld-x86-64/report-reloc-1.s | 12 ++++++ ld/testsuite/ld-x86-64/x86-64.exp | 2 + sim/testsuite/ChangeLog | 5 +++ sim/testsuite/Makefile.in | 1 - sim/testsuite/{sim => }/aarch64/ChangeLog | 0 sim/testsuite/{sim => }/aarch64/adds.s | 0 sim/testsuite/{sim => }/aarch64/addv.s | 0 sim/testsuite/{sim => }/aarch64/allinsn.exp | 0 sim/testsuite/{sim => }/aarch64/bit.s | 0 sim/testsuite/{sim => }/aarch64/cmtst.s | 0 sim/testsuite/{sim => }/aarch64/cnt.s | 0 sim/testsuite/{sim => }/aarch64/fcmXX.s | 0 sim/testsuite/{sim => }/aarch64/fcmp.s | 0 sim/testsuite/{sim => }/aarch64/fcsel.s | 0 sim/testsuite/{sim => }/aarch64/fcvtl.s | 0 sim/testsuite/{sim => }/aarch64/fcvtz.s | 0 sim/testsuite/{sim => }/aarch64/fminnm.s | 0 sim/testsuite/{sim => }/aarch64/fstur.s | 0 sim/testsuite/{sim => }/aarch64/ldn_multiple.s | 0 sim/testsuite/{sim => }/aarch64/ldn_single.s | 0 sim/testsuite/{sim => }/aarch64/ldnr.s | 0 sim/testsuite/{sim => }/aarch64/mla.s | 0 sim/testsuite/{sim => }/aarch64/mls.s | 0 sim/testsuite/{sim => }/aarch64/mul.s | 0 sim/testsuite/{sim => }/aarch64/pass.s | 0 sim/testsuite/{sim => }/aarch64/stn_multiple.s | 0 sim/testsuite/{sim => }/aarch64/stn_single.s | 0 sim/testsuite/{sim => }/aarch64/sumov.s | 0 sim/testsuite/{sim => }/aarch64/sumulh.s | 0 sim/testsuite/{sim => }/aarch64/tbnz.s | 0 sim/testsuite/{sim => }/aarch64/testutils.inc | 0 sim/testsuite/{sim => }/aarch64/uzp.s | 0 sim/testsuite/{sim => }/aarch64/xtl.s | 0 sim/testsuite/{sim => }/aarch64/xtn.s | 0 sim/testsuite/{sim => }/arm/ChangeLog | 0 sim/testsuite/{sim => }/arm/adc.cgs | 0 sim/testsuite/{sim => }/arm/add.cgs | 0 sim/testsuite/{sim => }/arm/allinsn.exp | 0 sim/testsuite/{sim => }/arm/and.cgs | 0 sim/testsuite/{sim => }/arm/b.cgs | 0 sim/testsuite/{sim => }/arm/bic.cgs | 0 sim/testsuite/{sim => }/arm/bl.cgs | 0 sim/testsuite/{sim => }/arm/bx.cgs | 0 sim/testsuite/{sim => }/arm/cmn.cgs | 0 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}/arm/iwmmxt/wcmpgt.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wmac.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wmadd.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wmax.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wmin.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wmov.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wmul.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wor.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wpack.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wror.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wsad.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wshufh.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wsll.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wsra.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wsrl.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wsub.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wunpckeh.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wunpckel.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wunpckih.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wunpckil.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wxor.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wzero.cgs | 0 sim/testsuite/{sim => }/arm/ldm.cgs | 0 sim/testsuite/{sim => }/arm/ldr.cgs | 0 sim/testsuite/{sim => }/arm/ldrb.cgs | 0 sim/testsuite/{sim => }/arm/ldrh.cgs | 0 sim/testsuite/{sim => }/arm/ldrsb.cgs | 0 sim/testsuite/{sim => }/arm/ldrsh.cgs | 0 sim/testsuite/{sim => }/arm/misaligned1.ms | 0 sim/testsuite/{sim => }/arm/misaligned2.ms | 0 sim/testsuite/{sim => }/arm/misaligned3.ms | 0 sim/testsuite/{sim => }/arm/misc.exp | 0 sim/testsuite/{sim => }/arm/mla.cgs | 0 sim/testsuite/{sim => }/arm/mov.cgs | 0 sim/testsuite/{sim => }/arm/movw-movt.ms | 0 sim/testsuite/{sim => }/arm/mrs.cgs | 0 sim/testsuite/{sim => }/arm/msr.cgs | 0 sim/testsuite/{sim => }/arm/mul.cgs | 0 sim/testsuite/{sim => }/arm/mvn.cgs | 0 sim/testsuite/{sim => }/arm/orr.cgs | 0 sim/testsuite/{sim => }/arm/rsb.cgs | 0 sim/testsuite/{sim => }/arm/rsc.cgs | 0 sim/testsuite/{sim => }/arm/sbc.cgs | 0 sim/testsuite/{sim => }/arm/smlal.cgs | 0 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rename sim/testsuite/{sim => }/bfin/c_alu2op_divs.s (100%) rename sim/testsuite/{sim => }/bfin/c_alu2op_log_l_sft.s (100%) rename sim/testsuite/{sim => }/bfin/c_alu2op_log_r_sft.s (100%) rename sim/testsuite/{sim => }/bfin/c_alu2op_shadd_1.s (100%) rename sim/testsuite/{sim => }/bfin/c_alu2op_shadd_2.s (100%) rename sim/testsuite/{sim => }/bfin/c_br_preg_killed_ac.s (100%) rename sim/testsuite/{sim => }/bfin/c_br_preg_killed_ex1.s (100%) rename sim/testsuite/{sim => }/bfin/c_br_preg_stall_ac.s (100%) rename sim/testsuite/{sim => }/bfin/c_br_preg_stall_ex1.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_bp1.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_bp2.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_bp3.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_bp4.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_brf_bp.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_brf_brt_bp.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_brf_brt_nbp.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_brf_fbkwd.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_brf_nbp.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_brt_bp.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_brt_nbp.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_kills_dhits.s (100%) rename sim/testsuite/{sim => }/bfin/c_brcc_kills_dmiss.s (100%) rename sim/testsuite/{sim => }/bfin/c_cactrl_iflush_pr.s (100%) rename sim/testsuite/{sim => }/bfin/c_cactrl_iflush_pr_pp.s (100%) rename sim/testsuite/{sim => }/bfin/c_calla_ljump.s (100%) rename sim/testsuite/{sim => }/bfin/c_calla_subr.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc2dreg.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc2stat_cc_ac.S (100%) rename sim/testsuite/{sim => }/bfin/c_cc2stat_cc_an.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc2stat_cc_aq.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc2stat_cc_av0.S (100%) rename sim/testsuite/{sim => }/bfin/c_cc2stat_cc_av1.S (100%) rename sim/testsuite/{sim => }/bfin/c_cc2stat_cc_az.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc_flag_ccmv_depend.S (100%) rename sim/testsuite/{sim => }/bfin/c_cc_flagdreg_mvbrsft.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc_flagdreg_mvbrsft_s1.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc_flagdreg_mvbrsft_sn.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc_regmvlogi_mvbrsft.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc_regmvlogi_mvbrsft_s1.s (100%) rename sim/testsuite/{sim => }/bfin/c_cc_regmvlogi_mvbrsft_sn.S (100%) rename sim/testsuite/{sim => }/bfin/c_ccflag_a0a1.S (100%) rename sim/testsuite/{sim => }/bfin/c_ccflag_dr_dr.s (100%) rename sim/testsuite/{sim => }/bfin/c_ccflag_dr_dr_uu.s (100%) rename sim/testsuite/{sim => }/bfin/c_ccflag_dr_imm3.s (100%) rename sim/testsuite/{sim => }/bfin/c_ccflag_dr_imm3_uu.s (100%) rename sim/testsuite/{sim => }/bfin/c_ccflag_pr_imm3.s (100%) rename sim/testsuite/{sim => }/bfin/c_ccflag_pr_imm3_uu.s (100%) rename sim/testsuite/{sim => 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sim/testsuite/{sim => }/bfin/c_compi2opd_dr_add_i7_n.s (100%) rename sim/testsuite/{sim => }/bfin/c_compi2opd_dr_add_i7_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_compi2opd_dr_eq_i7_n.s (100%) rename sim/testsuite/{sim => }/bfin/c_compi2opd_dr_eq_i7_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_compi2opd_flags.S (100%) rename sim/testsuite/{sim => }/bfin/c_compi2opd_flags_2.S (100%) rename sim/testsuite/{sim => }/bfin/c_compi2opp_pr_add_i7_n.s (100%) rename sim/testsuite/{sim => }/bfin/c_compi2opp_pr_add_i7_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_compi2opp_pr_eq_i7_n.s (100%) rename sim/testsuite/{sim => }/bfin/c_compi2opp_pr_eq_i7_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_dagmodik_lnz_imgebl.s (100%) rename sim/testsuite/{sim => }/bfin/c_dagmodik_lnz_imltbl.s (100%) rename sim/testsuite/{sim => }/bfin/c_dagmodik_lz_inc_dec.s (100%) rename sim/testsuite/{sim => }/bfin/c_dagmodim_lnz_imgebl.s (100%) rename sim/testsuite/{sim => }/bfin/c_dagmodim_lnz_imltbl.s (100%) rename sim/testsuite/{sim => }/bfin/c_dagmodim_lz_inc_dec.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_a0_pm_a1.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_a0a1s.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_a_abs_a.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_a_neg_a.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_aa_absabs.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_aa_negneg.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_abs.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_absabs.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_alhwx.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_awx.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_byteop1ew.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_byteop2.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_byteop3.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_bytepack.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_byteunpack.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_disalnexcpt.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_max.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_maxmax.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_min.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_minmin.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_mix.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_r_lh_a0pa1.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_r_negneg.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rh_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rh_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rh_rnd12_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rh_rnd12_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rh_rnd20_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rh_rnd20_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rl_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rl_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rl_rnd12_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rl_rnd12_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rl_rnd20_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rl_rnd20_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rlh_rnd.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rm.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rmm.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rmp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rpm.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rpp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rr_lph_a1a0.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rrpm.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rrpm_aa.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rrpmmp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rrpmmp_sft.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rrpmmp_sft_x.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rrppmm.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rrppmm_sft.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_rrppmm_sft_x.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_saa.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_sat_aa.S (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_search.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32alu_sgn.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_a1a0.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_a1a0_iuw32.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_a1a0_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a0.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a0_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a0_ih.s (100%) rename sim/testsuite/{sim => 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sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_a1_s.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_a1_u.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_a1a0.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_a1a0_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_a1a0_is.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_a1a0_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_a1a0_s.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_a1a0_u.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_mix.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_ih.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_is.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_iu.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_m_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_m_iutsh.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_m_s.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_m_t.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_m_u.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_mix.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_s.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_t.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_tu.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_u.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_pair.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_pair_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_pair_is.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_pair_m.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_pair_m_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32mult_pair_m_is.s (100%) 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sim/testsuite/{sim => }/bfin/c_dsp32shift_ahh.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_ahh_s.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_align16.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_align24.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_align8.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_amix.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_bitmux.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_bxor.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_expadj_h.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_expadj_l.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_expadj_r.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_expexp_r.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_fdepx.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_fextx.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_lf.s (100%) rename sim/testsuite/{sim => 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sim/testsuite/{sim => }/bfin/c_dsp32shiftim_lhalf_ln.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_lhalf_lp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_lhalf_rn.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_lhalf_rp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_lhh.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_lmix.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_rot.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_ld_dr_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_ld_dr_ipp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_ld_dr_ippm.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_ld_drhi_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_ld_drhi_ipp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_ld_drlo_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_ld_drlo_ipp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_st_dr_i.s (100%) rename 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sim/testsuite/{sim => }/bfin/c_logi2op_nbittst.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_nested.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_nested_bot.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_nested_prelc.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_nested_top.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_overlap.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_preg_div2_lc0.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_preg_div2_lc1.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_preg_lc0.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_preg_lc1.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_preg_stld.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_prelc.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_topbotcntr.s (100%) rename sim/testsuite/{sim => }/bfin/c_mmr_interr_ctl.s (100%) rename sim/testsuite/{sim => }/bfin/c_mmr_loop.S (100%) rename sim/testsuite/{sim => }/bfin/c_mmr_loop_user_except.S (100%) rename sim/testsuite/{sim => }/bfin/c_mmr_ppop_illegal_adr.S (100%) rename sim/testsuite/{sim => }/bfin/c_mmr_ppopm_illegal_adr.S (100%) rename sim/testsuite/{sim => }/bfin/c_mmr_timer.S (100%) rename sim/testsuite/{sim => }/bfin/c_mode_supervisor.S (100%) rename sim/testsuite/{sim => }/bfin/c_mode_user.S (100%) rename sim/testsuite/{sim => }/bfin/c_mode_user_superivsor.S (100%) rename sim/testsuite/{sim => }/bfin/c_multi_issue_dsp_ld_ld.s (100%) rename sim/testsuite/{sim => }/bfin/c_multi_issue_dsp_ldst_1.s (100%) rename sim/testsuite/{sim => }/bfin/c_multi_issue_dsp_ldst_2.s (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_call_pcpr.s (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_call_pr.s (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_clisti_interr.S (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_csync_mmr.S (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_except_rtx.S (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_excpt.S (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_jump_pcpr.s (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_jump_pr.s (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_nop.s (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_raise_rt_i_n.S (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_rts.s (100%) rename sim/testsuite/{sim => }/bfin/c_ptr2op_pr_neg_pr.s (100%) rename sim/testsuite/{sim => }/bfin/c_ptr2op_pr_sft_2_1.s (100%) rename sim/testsuite/{sim => }/bfin/c_ptr2op_pr_shadd_1_2.s (100%) rename sim/testsuite/{sim => }/bfin/c_pushpopmultiple_dp.s (100%) rename sim/testsuite/{sim => }/bfin/c_pushpopmultiple_dp_pair.s (100%) rename sim/testsuite/{sim => }/bfin/c_pushpopmultiple_dreg.s (100%) rename sim/testsuite/{sim => }/bfin/c_pushpopmultiple_preg.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_acc_acc.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_dag_lz_dep.s (100%) rename sim/testsuite/{sim => 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sim/testsuite/{sim => }/bfin/c_seq_ac_raise_mv_ppop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ac_regmv_pushpop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_dec_raise_pushpop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex1_brcc_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex1_call_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex1_j_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex1_raise_brcc_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex1_raise_call_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex1_raise_j_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex2_brcc_mp_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex2_mmr_mvpop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex2_mmrj_mvpop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex2_raise_mmr_mvpop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex2_raise_mmrj_mvpop.S (100%) rename sim/testsuite/{sim => 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3 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig updated (45061ef1 -> 8466b470)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig in repository toolchain/ci/base-artifacts. discards 45061ef1 0: update: binutils-gcc-linux-qemu: boot new 8466b470 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (45061ef1) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-lt [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 424 +- 03-build_abe-binutils/console.log | 11633 ++++----- 04-build_abe-stage1/console.log | 19336 +++++++-------- 05-build_linux/console.log | 822 +- 06-build_abe-qemu/console.log | 6728 ++--- 07-boot_linux/console.log | 492 +- 08-check_regression/console.log | 8 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 10 +- 09-update_baseline/results.regressions | 2 +- console.log | 39581 +++++++++++++++--------------- jenkins/manifest.sh | 16 +- 13 files changed, 39738 insertions(+), 39444 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig updated (7cb6b97300 -> 825a215c00)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig in repository toolchain/ci/qemu. from 7cb6b97300 Merge remote-tracking branch 'remotes/kraxel/tags/ui-2021011 [...] adds ef26632e3a sdlaudio: remove leftover SDL1.2 code adds ff69c481a2 audio: fix bit-rotted code adds 5a0926c23f sdlaudio: add -audiodev sdl,out.buffer-count option adds 14cefe14bb sdlaudio: don't start playback in init routine adds bcce2ea5f6 sdlaudio: always clear the sample buffer adds e02d178f78 sdlaudio: fill remaining sample buffer with silence adds ce31f099fb sdlaudio: replace legacy functions with modern ones adds a2893c8303 audio: split pcm_ops function get_buffer_in adds c2031dea89 sdlaudio: add recording functions adds 1d8549ad5e audio: break generic buffer dependency on mixing-engine adds bd37ede4eb sdlaudio: enable (in|out).mixing-engine=off adds 6fb0cd5054 audio: remove remaining unused plive code adds bea29e9f2e paaudio: avoid to clip samples multiple times adds e270c54826 paaudio: wait for PA_STREAM_READY in qpa_write() adds 7007cd3fc8 paaudio: wait until the playback stream is ready adds 521ce71425 paaudio: remove unneeded code adds cffd2fdf2c paaudio: comment bugs in functions qpa_init_* adds 00413ed9c2 paaudio: limit minreq to 75% of audio timer_rate adds d9a8b27a7e paaudio: send recorded data in smaller chunks adds 401dcf0540 dsoundaudio: replace GetForegroundWindow() adds 3c18e43179 dsoundaudio: rename dsound_open() adds 1157506161 dsoundaudio: enable f32 audio sample format adds 2d96a00587 dsoundaudio: fix log message adds 6c6886bd01 audio: Add braces for statements/fix braces' position adds 3c8de96c07 audio: Add spaces around operator/delete redundant spaces adds dcf10e4095 audio: foo* bar" should be "foo *bar". adds c60840c758 audio: Fix lines over 90 characters adds dea7d84fcf audio: Don't use '%#' in format strings adds 289db3c5a2 audio: Suspect code indent for conditional statements adds 8abf3feb4d audio: space prohibited between function name and parenthesis'(' adds 825a215c00 Merge remote-tracking branch 'remotes/kraxel/tags/audio-2021 [...] No new revisions were added by this update. Summary of changes: audio/alsaaudio.c | 18 ++- audio/audio.c | 74 +++++------- audio/audio_int.h | 2 + audio/audio_legacy.c | 3 +- audio/audio_template.h | 26 ++--- audio/audio_win_int.c | 73 ++++++++---- audio/coreaudio.c | 17 ++- audio/dsound_template.h | 2 +- audio/dsoundaudio.c | 56 +++++---- audio/jackaudio.c | 3 +- audio/noaudio.c | 1 + audio/ossaudio.c | 13 +-- audio/paaudio.c | 73 +++++++++--- audio/sdlaudio.c | 305 ++++++++++++++++++++++++++++++++++-------------- audio/spiceaudio.c | 1 + qapi/audio.json | 33 +++++- qemu-options.hx | 8 +- 17 files changed, 472 insertions(+), 236 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig updated (10ac9b29a4c -> bfd75bdf3fd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig in repository toolchain/ci/llvm-project. from 10ac9b29a4c Skip 'g' packet tests when running on darwin; debugserver d [...] adds ceb3cdccd0f [SLP] remove dead code in reduction matching; NFC adds ceaf0110ff5 Revert "Revert "ADT: Fix reference invalidation in SmallVec [...] adds aa8a2d8a3da [AArch64][GlobalISel] Select immediate fcmp if the zero is [...] adds 76f5c5a7b05 [ADT][Support] Fix C4146 error from MSVC adds a1500105ee6 [SimplifyCFG] Optimize CFG when null is passed to a functio [...] adds e65b9b04cde Revert "[WebAssembly] MC layer writes table symbols to obje [...] adds 187d771d27e Revert "[WebAssembly] Add support for table linking to wasm-ld" adds d302398ff05 hwasan: Update register-dump-read.c test to reserve x23 ins [...] adds aa3d4d99395 [NFC] Disallow unused prefixes under MC/RISCV adds 1bd083b5d6d [flang] Create names to allow access to inaccessible specifics adds 3afbfb4145b [mlir][NFC] Move helper substWithMin into Affine utils adds 2a27a9819a1 [mlir][AsmPrinter] Properly escape strings when printing locations adds fd2083d73c2 [mlir] Fixing potential build break in my previous commit adds 999f5da6b30 [debugserver] Fix inverted if block that resulted in us usi [...] adds e8049dc3c8a [NewPM][Inliner] Move the 'always inliner' case in the same [...] adds 029c2257c21 [Inline] Fix a missing character in inline_stats.ll adds a396e2e088e [utils] Use llvm::sort (NFC) adds 4707b21298a [AMDGPU] Use llvm::is_contained (NFC) adds 8fd8ff1f67e [StringExtras] Rename SubsequentDelim to ListSeparator adds be68c9222b8 [NFC] Add -std=c11 to attr-availability.c adds a61e42efbb7 [NPM][Inliner] Temporarily remove inline_stats test case fo [...] adds 8456c3a7892 AArch64: fix regression introduced by fcmp immediate selection. adds 668827b6485 Introduce llvm.noalias.decl intrinsic adds b664bef2ad9 [InstCombine] Add a test file that contains safe select tra [...] adds e0a979ccadd [InstCombine] Add more tests to select-safe-transforms.ll (NFC) adds f0a0ec2d085 [InstCombine] Add more tests for select operand replacement (NFC) adds a7101450a42 [ASTMatchers] Add mapAnyOf matcher adds dbe056c2e37 [ASTMatchers] Make cxxOperatorCallExpr matchers API-compati [...] adds 4f155567317 [LegalizeDAG] Handle NeedInvert when expanding BR_CC adds e810e95e4bb [ASTMatchers] Add binaryOperation matcher adds b765eaf9a61 [ASTMatchers] Add support for CXXRewrittenBinaryOperator adds 25c1578a46f Fix llvm::Optional build breaks in MSVC using std::is_trivi [...] adds 9fc814ed596 [Tests] Added tests for new instcombine or simplification; NFC adds a4e2a5145a2 [InstSimplify] Add (~A & B) | ~(A | B) --> ~A adds 098dbf190a5 [RISCV] Correct alignment settings for vector registers. adds bdd4dda58b0 [InstSimplify] Update comments, remove redundant tests adds bca16e2fbb4 [LTO] Remove options to disable inlining, vectorization & G [...] adds ba0fc7e1f8d [StringExtras] Fix comment typos (NFC) adds 19aacdb715a [llvm] Construct SmallVector with iterator ranges (NFC) adds 2082b10d100 [llvm] Use *::empty (NFC) adds 416854d0f7c [InstSimplify] Precommit new testcases; NFC adds c1ab698dce8 [ARM] Remove LLC tests from transform/hardware loop tests. adds 372eb2bbb6f [ARM] Add low overhead loops terminators to AnalyzeBranch new 63bedc80da3 [InstSimplify] Handle commutativity for 'and' and 'outer or [...] new 48dbac5b6b0 [SLP] remove unnecessary use of 'OperationData' new fcfcc3cc6b1 [SLP] fix typos; NFC new 49b96cd9ef2 [SLP] remove opcode field from reduction data class new ed939f853da [OpenMP] Added the support for hidden helper task in RTL new d8fc27301d1 [mlir][sparse] improved sparse runtime support library new bfd75bdf3fd [NFC] Removed extra text in comments The 7 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang/docs/LibASTMatchersReference.html | 316 +++++++++- clang/docs/tools/dump_ast_matchers.py | 19 +- clang/include/clang/AST/ASTNodeTraverser.h | 12 +- clang/include/clang/AST/ExprCXX.h | 10 + clang/include/clang/ASTMatchers/ASTMatchers.h | 214 ++++++- .../clang/ASTMatchers/ASTMatchersInternal.h | 275 ++++++++- clang/lib/ASTMatchers/ASTMatchFinder.cpp | 25 + clang/lib/ASTMatchers/ASTMatchersInternal.cpp | 5 + clang/lib/ASTMatchers/Dynamic/Marshallers.h | 52 ++ clang/lib/ASTMatchers/Dynamic/Registry.cpp | 2 + clang/test/CodeGen/thinlto-distributed-newpm.ll | 9 - .../Frontend/optimization-remark-line-directive.c | 2 +- clang/test/Frontend/optimization-remark-new-pm.c | 4 +- .../optimization-remark-with-hotness-new-pm.c | 24 +- clang/test/Frontend/optimization-remark.c | 26 +- clang/test/Parser/attr-availability.c | 2 +- clang/unittests/AST/ASTTraverserTest.cpp | 60 ++ .../ASTMatchers/ASTMatchersNarrowingTest.cpp | 389 ++++++++++++ .../ASTMatchers/ASTMatchersTraversalTest.cpp | 654 +++++++++++++++++++++ .../test/hwasan/TestCases/register-dump-read.c | 12 +- flang/include/flang/Semantics/expression.h | 2 + flang/include/flang/Semantics/semantics.h | 4 +- flang/include/flang/Semantics/tools.h | 1 + flang/lib/Evaluate/check-expression.cpp | 11 +- flang/lib/Semantics/expression.cpp | 44 +- flang/lib/Semantics/resolve-names.cpp | 6 +- flang/lib/Semantics/semantics.cpp | 16 +- flang/lib/Semantics/tools.cpp | 12 +- flang/test/Semantics/modfile39.f90 | 48 ++ lld/test/wasm/alias.s | 8 + lld/test/wasm/init-fini.ll | 18 +- lld/test/wasm/local-symbols.ll | 8 + lld/test/wasm/locals-duplicate.test | 55 +- lld/test/wasm/pie.ll | 16 +- lld/test/wasm/section-symbol-relocs.yaml | 4 +- lld/test/wasm/shared.ll | 16 +- lld/test/wasm/signature-mismatch.ll | 9 +- lld/test/wasm/stack-pointer.ll | 8 + lld/test/wasm/weak-alias.ll | 5 - lld/wasm/Driver.cpp | 59 -- lld/wasm/InputFiles.cpp | 75 --- lld/wasm/InputFiles.h | 1 - lld/wasm/MarkLive.cpp | 3 - lld/wasm/SymbolTable.cpp | 12 - lld/wasm/SymbolTable.h | 3 - lld/wasm/Symbols.cpp | 1 - lld/wasm/Symbols.h | 5 - lld/wasm/SyntheticSections.cpp | 39 +- lld/wasm/SyntheticSections.h | 13 +- lld/wasm/Writer.cpp | 18 - lldb/tools/debugserver/source/CMakeLists.txt | 4 +- llvm/docs/LangRef.rst | 76 +++ llvm/include/llvm/ADT/Optional.h | 25 +- llvm/include/llvm/ADT/SmallVector.h | 168 ++++-- llvm/include/llvm/ADT/StringExtras.h | 22 +- llvm/include/llvm/Analysis/InlineAdvisor.h | 39 +- llvm/include/llvm/Analysis/MLInlineAdvisor.h | 10 +- llvm/include/llvm/Analysis/ReplayInlineAdvisor.h | 2 +- llvm/include/llvm/IR/IRBuilder.h | 7 + llvm/include/llvm/IR/Intrinsics.h | 3 + llvm/include/llvm/IR/Intrinsics.td | 10 + llvm/include/llvm/LTO/legacy/LTOCodeGenerator.h | 11 +- llvm/include/llvm/Passes/PassBuilder.h | 3 +- llvm/include/llvm/Support/GenericDomTree.h | 4 +- llvm/include/llvm/Support/MathExtras.h | 2 +- llvm/include/llvm/Transforms/IPO/Inliner.h | 9 +- llvm/lib/Analysis/CGSCCPassManager.cpp | 2 +- llvm/lib/Analysis/DevelopmentModeInlineAdvisor.cpp | 12 +- llvm/lib/Analysis/InlineAdvisor.cpp | 39 +- llvm/lib/Analysis/InstructionSimplify.cpp | 22 +- llvm/lib/Analysis/MLInlineAdvisor.cpp | 30 +- llvm/lib/Analysis/ReplayInlineAdvisor.cpp | 2 +- llvm/lib/Analysis/ScalarEvolution.cpp | 3 +- llvm/lib/CodeGen/BranchFolding.cpp | 2 +- llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp | 2 +- llvm/lib/CodeGen/IntrinsicLowering.cpp | 1 + llvm/lib/CodeGen/MachineBasicBlock.cpp | 16 +- llvm/lib/CodeGen/PHIElimination.cpp | 3 +- llvm/lib/CodeGen/RegisterScavenging.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 2 + llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 8 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 5 +- llvm/lib/IR/IRBuilder.cpp | 7 + llvm/lib/IR/LLVMContextImpl.cpp | 2 +- llvm/lib/IR/Verifier.cpp | 86 +++ llvm/lib/LTO/LTOCodeGenerator.cpp | 27 +- llvm/lib/MC/WasmObjectWriter.cpp | 11 +- llvm/lib/Object/SymbolSize.cpp | 2 +- llvm/lib/Passes/PassBuilder.cpp | 22 +- llvm/lib/Passes/PassRegistry.def | 7 +- .../AArch64/GISel/AArch64InstructionSelector.cpp | 31 +- llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp | 2 +- .../lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp | 7 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 3 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 5 + llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 3 +- llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp | 2 +- llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp | 4 +- llvm/lib/Target/RISCV/RISCVRegisterInfo.td | 5 +- .../Target/WebAssembly/WebAssemblyRegStackify.cpp | 11 +- llvm/lib/Target/X86/X86CmovConversion.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 3 +- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 3 +- llvm/lib/Transforms/IPO/Inliner.cpp | 8 +- .../Transforms/Scalar/RewriteStatepointsForGC.cpp | 4 +- llvm/lib/Transforms/Scalar/SROA.cpp | 3 +- llvm/lib/Transforms/Utils/CallPromotionUtils.cpp | 4 +- llvm/lib/Transforms/Utils/Debugify.cpp | 4 +- llvm/lib/Transforms/Utils/LCSSA.cpp | 5 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 46 +- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 4 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 120 ++-- llvm/lib/Transforms/Vectorize/VPlan.cpp | 5 +- .../CodeGen/AArch64/GlobalISel/select-fcmp.mir | 53 ++ llvm/test/CodeGen/PowerPC/legalize-invert-br_cc.ll | 33 ++ .../Thumb2/LowOverheadLoops/fast-fp-loops.ll | 111 ++-- .../Thumb2/LowOverheadLoops/mve-float-loops.ll | 6 +- .../Thumb2/LowOverheadLoops/sibling-loops.ll | 48 +- .../LowOverheadLoops/varying-outer-2d-reduction.ll | 122 ++-- .../LowOverheadLoops/vcmp-vpst-combination.ll | 3 +- .../CodeGen/Thumb2/LowOverheadLoops/while-loops.ll | 46 +- llvm/test/CodeGen/Thumb2/mve-float16regloops.ll | 64 +- llvm/test/CodeGen/Thumb2/mve-float32regloops.ll | 90 +-- llvm/test/CodeGen/Thumb2/mve-gather-increment.ll | 146 ++--- .../Thumb2/mve-gather-scatter-optimisation.ll | 156 ++--- llvm/test/CodeGen/Thumb2/mve-gather-tailpred.ll | 28 +- llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll | 6 +- llvm/test/CodeGen/Thumb2/mve-scatter-increment.ll | 28 +- llvm/test/CodeGen/Thumb2/mve-vecreduce-loops.ll | 114 ++-- llvm/test/CodeGen/Thumb2/mve-vldshuffle.ll | 3 +- llvm/test/MC/RISCV/lit.local.cfg | 8 + llvm/test/MC/RISCV/rv32c-only-valid.s | 10 +- llvm/test/MC/RISCV/rv32zfh-valid.s | 4 +- llvm/test/MC/RISCV/rv64zfh-valid.s | 2 +- llvm/test/MC/WebAssembly/debug-info.ll | 24 +- llvm/test/MC/WebAssembly/debug-info64.ll | 24 +- llvm/test/MC/WebAssembly/function-alias.ll | 10 - llvm/test/MC/WebAssembly/global-ctor-dtor.ll | 5 - llvm/test/MC/WebAssembly/reloc-pic.s | 5 - llvm/test/MC/WebAssembly/type-index.s | 5 - llvm/test/MC/WebAssembly/weak-alias.s | 5 - llvm/test/Other/new-pm-defaults.ll | 16 +- llvm/test/Other/new-pm-lto-defaults.ll | 5 - llvm/test/Other/new-pm-module-inliner-wrapper.ll | 7 - llvm/test/Other/new-pm-pgo-preinline.ll | 1 + llvm/test/Other/new-pm-thinlto-defaults.ll | 16 +- .../Other/new-pm-thinlto-postlink-pgo-defaults.ll | 14 +- .../new-pm-thinlto-postlink-samplepgo-defaults.ll | 12 +- .../Other/new-pm-thinlto-prelink-pgo-defaults.ll | 15 +- .../new-pm-thinlto-prelink-samplepgo-defaults.ll | 12 +- .../test/Transforms/HardwareLoops/ARM/structure.ll | 25 - llvm/test/Transforms/Inline/inline_stats.ll | 17 +- .../Inline/optimization-remarks-with-hotness.ll | 2 +- .../test/Transforms/Inline/optimization-remarks.ll | 4 +- llvm/test/Transforms/Inline/pr46945.ll | 8 +- llvm/test/Transforms/InstCombine/or.ll | 1 - .../Transforms/InstCombine/select-binop-cmp.ll | 100 ++++ .../InstCombine/select-safe-transforms.ll | 102 ++++ llvm/test/Transforms/InstSimplify/or.ll | 146 +++++ .../Transforms/SimplifyCFG/UnreachableEliminate.ll | 298 +++++++++- llvm/test/Verifier/noalias_scope_decl.ll | 61 ++ llvm/tools/llvm-exegesis/lib/Target.cpp | 3 +- llvm/tools/llvm-lto/llvm-lto.cpp | 17 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 2 +- llvm/tools/lto/lto.cpp | 23 +- llvm/unittests/ADT/OptionalTest.cpp | 138 +++++ llvm/unittests/ADT/SmallVectorTest.cpp | 152 ++++- llvm/unittests/ADT/StringExtrasTest.cpp | 14 +- llvm/utils/FileCheck/FileCheck.cpp | 96 +-- llvm/utils/TableGen/GlobalISel/GIMatchDag.cpp | 2 +- llvm/utils/TableGen/GlobalISel/GIMatchDagInstr.cpp | 2 +- mlir/include/mlir/Dialect/Affine/Utils.h | 10 + mlir/include/mlir/ExecutionEngine/CRunnerUtils.h | 16 +- mlir/integration_test/CMakeLists.txt | 1 + .../Sparse/CPU/frostt-example.mlir | 149 +++++ .../Sparse/CPU/matrix-market-example.mlir | 129 ++-- mlir/integration_test/data/test.tns | 25 + mlir/lib/Dialect/Affine/Utils/Utils.cpp | 27 + mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt | 1 + mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp | 33 +- mlir/lib/ExecutionEngine/SparseUtils.cpp | 262 ++++++--- mlir/lib/IR/AsmPrinter.cpp | 15 +- mlir/test/IR/locations.mlir | 14 + openmp/runtime/src/kmp.h | 61 +- openmp/runtime/src/kmp_global.cpp | 3 + openmp/runtime/src/kmp_runtime.cpp | 153 ++++- openmp/runtime/src/kmp_settings.cpp | 37 ++ openmp/runtime/src/kmp_taskdeps.h | 20 +- openmp/runtime/src/kmp_tasking.cpp | 129 +++- openmp/runtime/src/kmp_wait_release.h | 20 + openmp/runtime/src/z_Linux_util.cpp | 164 +++++- .../test/tasking/hidden_helper_task/common.h | 59 ++ .../test/tasking/hidden_helper_task/depend.cpp | 131 +++++ .../test/tasking/hidden_helper_task/gtid.cpp | 132 +++++ .../test/tasking/hidden_helper_task/taskgroup.cpp | 78 +++ .../test/worksharing/for/kmp_sch_simd_guided.c | 17 + 197 files changed, 6056 insertions(+), 1731 deletions(-) create mode 100644 flang/test/Semantics/modfile39.f90 create mode 100644 llvm/test/CodeGen/PowerPC/legalize-invert-br_cc.ll delete mode 100644 llvm/test/Other/new-pm-module-inliner-wrapper.ll create mode 100644 llvm/test/Transforms/InstCombine/select-safe-transforms.ll create mode 100644 llvm/test/Verifier/noalias_scope_decl.ll create mode 100644 mlir/integration_test/Sparse/CPU/frostt-example.mlir create mode 100644 mlir/integration_test/data/test.tns create mode 100644 openmp/runtime/test/tasking/hidden_helper_task/common.h create mode 100644 openmp/runtime/test/tasking/hidden_helper_task/depend.cpp create mode 100644 openmp/runtime/test/tasking/hidden_helper_task/gtid.cpp create mode 100644 openmp/runtime/test/tasking/hidden_helper_task/taskgroup.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig updated (02c7ff18 -> 9bb85d48)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig in repository toolchain/ci/base-artifacts. discards 02c7ff18 4: update: llvm-linux-qemu: 22 new 9bb85d48 4: update: llvm-linux-qemu: 22 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (02c7ff18) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 181 +- 02-prepare_abe/console.log | 276 +- 03-build_llvm/console.log | 13764 +++++++++++++-------------- 04-build_linux/console.log | 670 +- 07-check_regression/console.log | 14 +- 07-check_regression/results.regressions | 6 +- 08-update_baseline/console.log | 12 +- 08-update_baseline/results.regressions | 6 +- console.log | 14917 +++++++++++++++--------------- jenkins/manifest.sh | 10 +- 10 files changed, 14935 insertions(+), 14921 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[gcc] branch master updated (a6d22fb21c6 -> a2960a04d51)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from a6d22fb21c6 openmp: Add support for the OpenMP 5.0 task detach clause new a2960a04d51 testsuite: Fix up a testcase to find the right ISO_Fortran_ [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/gfortran.dg/iso_fortran_binding_uint8_array_driver.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[gcc] branch master updated (5e5d56919dd -> a6d22fb21c6)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 5e5d56919dd RTEMS: Add -mcustom-fpu-cfg=fph2 multilib new a6d22fb21c6 openmp: Add support for the OpenMP 5.0 task detach clause The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/builtin-types.def | 8 +- gcc/c-family/c-pragma.h | 3 +- gcc/c/c-parser.c | 57 ++++++++- gcc/c/c-typeck.c | 58 ++++++++- gcc/cp/parser.c | 53 ++++++++- gcc/cp/pt.c | 1 + gcc/cp/semantics.c | 61 +++++++++- gcc/fortran/dump-parse-tree.c | 6 + gcc/fortran/frontend-passes.c | 1 + gcc/fortran/gfortran.h | 2 + gcc/fortran/openmp.c | 60 +++++++++- gcc/fortran/trans-openmp.c | 16 +++ gcc/fortran/trans-types.c | 3 + gcc/fortran/types.def | 8 +- gcc/gimplify.c | 14 +++ gcc/omp-builtins.def | 2 +- gcc/omp-expand.c | 19 ++- gcc/omp-low.c | 47 ++++++++ gcc/testsuite/c-c++-common/gomp/task-detach-1.c | 37 ++++++ gcc/testsuite/g++.dg/gomp/task-detach-1.C | 29 +++++ gcc/testsuite/gcc.dg/gomp/task-detach-1.c | 20 ++++ gcc/testsuite/gfortran.dg/gomp/task-detach-1.f90 | 29 +++++ gcc/tree-core.h | 29 +++-- gcc/tree-nested.c | 2 + gcc/tree-pretty-print.c | 6 + gcc/tree.c | 15 ++- include/gomp-constants.h | 1 + libgomp/fortran.c | 6 + libgomp/libgomp.h | 7 ++ libgomp/libgomp.map | 2 + libgomp/libgomp_g.h | 2 +- libgomp/omp.h.in | 7 ++ libgomp/omp_lib.f90.in | 9 ++ libgomp/omp_lib.h.in | 4 + libgomp/priority_queue.c | 57 +++++++++ libgomp/priority_queue.h | 5 + libgomp/task.c | 132 +++++++++++++++++---- libgomp/team.c | 4 + .../testsuite/libgomp.c-c++-common/task-detach-1.c | 36 ++++++ .../testsuite/libgomp.c-c++-common/task-detach-2.c | 37 ++++++ .../testsuite/libgomp.c-c++-common/task-detach-3.c | 33 ++++++ .../testsuite/libgomp.c-c++-common/task-detach-4.c | 24 ++++ .../testsuite/libgomp.c-c++-common/task-detach-5.c | 42 +++++++ .../testsuite/libgomp.c-c++-common/task-detach-6.c | 46 +++++++ .../testsuite/libgomp.fortran/task-detach-1.f90 | 33 ++++++ .../testsuite/libgomp.fortran/task-detach-2.f90 | 34 ++++++ .../testsuite/libgomp.fortran/task-detach-3.f90 | 33 ++++++ .../testsuite/libgomp.fortran/task-detach-4.f90 | 22 ++++ .../testsuite/libgomp.fortran/task-detach-5.f90 | 39 ++++++ .../testsuite/libgomp.fortran/task-detach-6.f90 | 44 +++++++ 50 files changed, 1183 insertions(+), 62 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/gomp/task-detach-1.c create mode 100644 gcc/testsuite/g++.dg/gomp/task-detach-1.C create mode 100644 gcc/testsuite/gcc.dg/gomp/task-detach-1.c create mode 100644 gcc/testsuite/gfortran.dg/gomp/task-detach-1.f90 create mode 100644 libgomp/testsuite/libgomp.c-c++-common/task-detach-1.c create mode 100644 libgomp/testsuite/libgomp.c-c++-common/task-detach-2.c create mode 100644 libgomp/testsuite/libgomp.c-c++-common/task-detach-3.c create mode 100644 libgomp/testsuite/libgomp.c-c++-common/task-detach-4.c create mode 100644 libgomp/testsuite/libgomp.c-c++-common/task-detach-5.c create mode 100644 libgomp/testsuite/libgomp.c-c++-common/task-detach-6.c create mode 100644 libgomp/testsuite/libgomp.fortran/task-detach-1.f90 create mode 100644 libgomp/testsuite/libgomp.fortran/task-detach-2.f90 create mode 100644 libgomp/testsuite/libgomp.fortran/task-detach-3.f90 create mode 100644 libgomp/testsuite/libgomp.fortran/task-detach-4.f90 create mode 100644 libgomp/testsuite/libgomp.fortran/task-detach-5.f90 create mode 100644 libgomp/testsuite/libgomp.fortran/task-detach-6.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

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