Tcwg-commits September 2020

tcwg-commits@lists.linaro.org

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig updated (38695718 -> 3615d658)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig in repository toolchain/ci/base-artifacts. discards 38695718 0: update: llvm-linux: boot new 3615d658 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (38695718) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-n [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 222 +- 02-build_llvm/console.log | 13298 +++++++++++++++--------------- 03-build_linux/console.log | 2652 +++--- 04-boot_linux/console.log | 494 +- 05-check_regression/console.log | 18 +- 06-update_baseline/console.log | 32 +- console.log | 16716 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 16718 insertions(+), 16722 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[linux] branch master updated (729e3d091984 -> ef2e9a563b0c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository linux. from 729e3d091984 Merge tag 'ceph-for-5.9-rc5' of git://github.com/ceph/ceph-client new 01ec372cef1e cifs: fix DFS mount with cifsacl/modefromsid new 5a3c558a9f05 Merge tag '5.9-rc4-smb3-fix' of git://git.samba.org/sfrenc [...] new fccc0007b8dc btrfs: fix lockdep splat in add_missing_dev new ea57788eb76d btrfs: require only sector size alignment for parent eb bytenr new 9e3aa8054453 btrfs: free data reloc tree on failed mount new 2d892ccdc163 btrfs: fix NULL pointer dereference after failure to creat [...] new edf6b0e1e4dd Merge tag 'for-5.9-rc4-tag' of git://git.kernel.org/pub/sc [...] new 6180bb446ab6 dax: fix detection of dax support for non-persistent memor [...] new 4f8b0a5b3f7e Merge tag 'libnvdimm-fix-v5.9-rc5' of git://git.kernel.org [...] new a566a9012acd seccomp: don't leak memory when filter install races new 19d1d49f2a8c mailmap, MAINTAINERS: move to tycho.pizza new e839317900e9 seccomp: don't leave dangling ->notif if file allocation fails new ef2e9a563b0c Merge tag 'seccomp-v5.9-rc5' of git://git.kernel.org/pub/s [...] The 13 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .mailmap | 1 + MAINTAINERS | 2 +- drivers/dax/super.c | 2 +- fs/btrfs/disk-io.c | 2 ++ fs/btrfs/extent-tree.c | 19 +++++++++---------- fs/btrfs/print-tree.c | 12 +++++++----- fs/btrfs/transaction.c | 1 + fs/btrfs/volumes.c | 10 ++++++++++ fs/cifs/inode.c | 4 ++++ kernel/seccomp.c | 24 ++++++++++++++++++------ 10 files changed, 54 insertions(+), 23 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-defconfig updated (e8878ab82545 -> 729e3d091984)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-defconfig in repository toolchain/ci/linux. from e8878ab82545 Merge tag 'spi-fix-v5.9-rc4' of git://git.kernel.org/pub/s [...] adds 88ce2a530cc9 block: restore a specific error code in bdev_del_partition adds e8a8a185051a block: only call sched requeue_request() for scheduled requests adds 2cd896a5e86f block: Set same_page to false in __bio_try_merge_page if r [...] adds b63de8400a6e nvme: Revert: Fix controller creation races with teardown flow adds e126e8210e95 nvme-fc: cancel async events before freeing event struct adds 925dd04c1f98 nvme-rdma: cancel async events before freeing event struct adds ceb1e0874dba nvme-tcp: cancel async events before freeing event struct adds 73a5379937ec nvme-fabrics: allow to queue requests for live queues adds fd04358e0196 Merge tag 'nvme-5.9-2020-09-10' of git://git.infradead.org [...] adds 7b8731d9589d Merge tag 'block-5.9-2020-09-11' of git://git.kernel.dk/li [...] adds 95035eac7632 PM: <linux/device.h>: fix @em_pd kernel-doc warning adds 57a2fb068a95 powercap/intel_rapl: add support for TigerLake Desktop adds 64e5f367155f powercap/intel_rapl: add support for RocketLake adds ba92a4201167 powercap/intel_rapl: add support for AlderLake adds cc88b78c0870 powercap: make documentation reflect code adds d64e6906d188 Merge branch 'powercap' adds 566e24eeb498 Merge tag 'pm-5.9-rc5' of git://git.kernel.org/pub/scm/lin [...] adds 06be67266a0c i2c: npcm7xx: Fix timeout calculation adds 45df80d7605c misc: eeprom: at24: register nvmem only after eeprom is re [...] adds 0065ec0054be Merge tag 'at24-fixes-for-v5.9-rc5' of git://git.kernel.or [...] adds 0a355aeb2408 i2c: algo: pca: Reapply i2c bus settings after reset adds e9287bd24816 Merge branch 'i2c/for-current' of git://git.kernel.org/pub [...] adds f44d04e696fe rbd: require global CAP_SYS_ADMIN for mapping and unmapping adds 729e3d091984 Merge tag 'ceph-for-5.9-rc5' of git://github.com/ceph/ceph-client No new revisions were added by this update. Summary of changes: block/bfq-iosched.c | 12 ------------ block/bio.c | 4 +++- block/blk-mq-sched.h | 2 +- block/partitions/core.c | 2 +- drivers/block/rbd.c | 12 ++++++++++++ drivers/i2c/algos/i2c-algo-pca.c | 35 +++++++++++++++++++++++------------ drivers/i2c/busses/i2c-npcm7xx.c | 8 ++++++-- drivers/misc/eeprom/at24.c | 11 +++++++---- drivers/nvme/host/core.c | 5 ----- drivers/nvme/host/fabrics.c | 12 ++++++++---- drivers/nvme/host/fc.c | 1 + drivers/nvme/host/nvme.h | 1 - drivers/nvme/host/rdma.c | 1 + drivers/nvme/host/tcp.c | 1 + drivers/powercap/intel_rapl_common.c | 3 +++ include/linux/device.h | 1 + include/linux/i2c-algo-pca.h | 15 +++++++++++++++ include/linux/powercap.h | 11 +++++------ 18 files changed, 88 insertions(+), 49 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-defconfig updated (497b794d -> e0a99dcd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-defconfig in repository toolchain/ci/base-artifacts. discards 497b794d 0: update: llvm-linux: boot new e0a99dcd 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (497b794d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-build_llvm/console.log | 12584 +++++++++++++++++----------------- 03-build_linux/console.log | 658 +- 04-boot_linux/console.log | 428 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 10 +- console.log | 13810 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 13814 insertions(+), 13814 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_tk1/llvm-master-arm-spec2k6-O2_LTO updated (ff218cbc84f -> bb7d3af1139)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/llvm-master-arm-spec2k6-O2_LTO in repository toolchain/ci/llvm-project. from ff218cbc84f [InstSimplify] Fold degenerate abs of abs form adds 4d0312c8e05 Add proper move ctor/move assign to APValue. NFCI. adds d866dc37498 [ARM] Regenerate tests. NFC adds 667e800bb3a [ARM] Remove -O3 from mve intrinsic tests. NFC adds ecac5c28089 [X86][AVX] lowerShuffleWithPERMV - adjust binary shuffle ma [...] adds 8c386c94749 [SmallVector] Move error handling out of line adds cc6713a2c35 Thread safety analysis: Test and document release_generic_c [...] adds bbb3baf6205 Thread safety analysis: Improve documentation for scoped ca [...] adds 54d432aa6b8 [mlir] Add Shaped Type, Tensor Type and MemRef Type to pyth [...] adds 16bb71fd4f8 [DSE,MemorySSA] Add a few additional debug messages. adds 8542dab909f [compiler-rt] Implement __clear_cache() on OpenBSD/arm adds b536cbaac5f [ValueTracking] Avoid known bits fallback for non-zero get [...] adds ab68517e6b7 [asan_symbolize] Pass --demangle/--no-demangle instead of - [...] adds efa57f9a7ad [PowerPC] Implement Vector Expand Mask builtins in LLVM/Clang adds caee15a0ed5 [WebAssembly] Fix incorrect assumption of simple value types adds d5c45041f14 [machinesink] add testcase for more sinking - NFC adds 69f2c79f2ad [ELF] Add a new e_machine value EM_CSKY and add some CSKY r [...] adds 9bee13f8908 Move targetHasSVE function to lldbtest.py adds 1fd7dc40748 When dumping results of StackLifetime, it will print the fo [...] adds 76953321666 Move NativeRegisterContextLinux/RegisterContextPOSIX*_arm t [...] adds 7403e3ee324 Extend PyConcreteType to support intermediate base classes. adds 70523ecfaca [Sparc] Select the UltraSPARC instruction set with the exte [...] adds b3205e2ace4 [scan-view] Explicitly use utf-8 in send_string adds 80186e4efc9 [CMake][TableGen] Simplify code by using list(TRANSFORM) adds 098130fa403 [CMake][Polly] Remove dead CMake code adds 21c0e74c9e7 [CMake][OpenMP] Remove old dead CMake code adds f4835b94f2c [CMake][TableGen] Remove dead CMake version checks adds 04ea680a8cc [cmake] Fix build of attribute plugin example on Windows adds 5350e1b5096 [KnownBits] Implement accurate unsigned and signed max and min adds a98b126696e Add BinaryFormat/ELFRelocs/CSKY.def to LLVM modulemap adds 40f4131fce7 [DWARFYAML] Make the debug_addr section optional. adds 0af4147804a [ARM][CostModel] CodeSize costs for i1 arith ops adds 713c2ad60c1 [GlobalISel] Extend not_cmp_fold to work on conditional exp [...] adds 65f78e73ad5 [SimplifyCFG] Consider cost of combining predicates. adds e7bd058c7e2 [clang-format] Allow configuring list of macros that map to [...] adds 8aa3b8da5db [clang-format] Handle typename macros inside cast expressions adds cd01eec14bc [clang-format] Check that */& after typename macros are poi [...] adds 56fa7d1dc6a [clang-format] Fix formatting of _Atomic() qualifier adds 9a22eba1509 [clang-format] Parse __underlying_type(T) as a type adds 05147d33091 [clang-format] Correctly parse function declarations with T [...] adds 7634c64b612 [OpenMP][AMDGPU] Use DS_Max_Warp_Number instead of WARPSIZE adds 8d64df9f139 [mlir][Vector] Revisit VectorToSCF. adds 81aa66f65f5 Extract infrastructure to ignore intermediate expressions i [...] adds 1a7a2cd7474 [Ignore Expressions][NFC] Refactor to better use `IgnoreExp [...] adds 0dbe2504af8 [X86] Use Register instead of unsigned. NFCI. adds 22fa6b20d92 [X86] Use Register instead of unsigned. NFCI. adds ee68b66d94b [NFC][PowerPC] Add tests for `mul` with big constants. adds 9ad261540da [X86] Use Register instead of unsigned. NFCI. adds aa3fcb96711 [X86][AVX] Add extra vperm2f128+vpermilvar combine coverage adds 71dfdbe2c73 [X86] getFauxShuffleMask - handle insert_subvector(zero, sub, C) adds 7ba0f81934c [X86] Unbreak the build after 22fa6b20d92e adds 56d1f3138b5 [gn build] Port 81aa66f65f5 adds 0478720157f [clang] Prevent that Decl::dump on a CXXRecordDecl deserial [...] adds 9764eb9212c [gn build] Port 0478720157f adds 928c4b4b498 [SCEV] Refactor isHighCostExpansionHelper adds 136eb79a884 [MLIR][Standard] Add `dynamic_tensor_from_elements` operation adds 3097427f93d [obj2yaml] Add support for dumping the .debug_str section. adds 9b645ebfff1 [X86][AVX] Use lowerShuffleWithPERMV in shuffle combining t [...] adds 5bb27e735d3 X86AvoidStoreForwardingBlocks.cpp - use unsigned for Opcode [...] adds 3a86eb03d54 [llvm-readobj/elf] - Introduce Relocation<ELFT> helper. adds e57cbcbdc18 LegalizeTypes.h - remove orphan SplitVSETCC declaration. NFCI. adds 15acdd75439 [MLIR][Shape] Merge `shape` to `std`/`scf` lowerings. adds 1c849ec40a5 [MLIR] Fix Win test due to partial order of CHECK directives adds 3ca8b9a560a [InstCombine] give a name to an intermediate value for easi [...] adds 28aa60aae25 [InstCombine] add test with more unreachable insts; NFC adds 79ea83e104e [SelectionDAG] memcpy expansion of const volatile struct ig [...] adds a8a91533dd6 [X86] Replace EmitX86AddSubSatExpr with EmitX86BinaryIntrin [...] adds 6670f5d1e66 MachineStableHash.h - remove MachineInstr.h include. NFC. adds dbb81881955 [llvm-readobj/elf] - Generalize the code for printing dynam [...] adds 973800dc7cb Revert "[MLIR][Shape] Merge `shape` to `std`/`scf` lowerings." adds 23f700c785a Revert "[clang] Prevent that Decl::dump on a CXXRecordDecl [...] adds bb73fcfd070 [gn build] Port 23f700c785a adds 2853ae3c1b8 [X86] Update SSE/AVX ABS intrinsics to emit llvm.abs.* (PR46851) adds f6db681a789 [X86][SSE] Move llvm.x86.ssse3.pabs.*.128 intrinsics to sss [...] adds 6b954f1b796 [KillTheDoctor/CMake] Add missing keyword PRIVATE in target [...] adds 4368739941e [llvm-readobj] - Remove code duplication when printing dyna [...] adds a5046f7acec [NFC][PowerPC] Add tests in constants-i64.ll. adds 1e1a4a48198 [mlir] Take ValueRange instead of ArrayRef<Value> in Struct [...] adds 4b530f75199 [X86][SSE] Use llvm.abs.* vector intrinsics instead of old [...] adds 96e0f34be79 [X86] Auto upgrade SSE/AVX PABS intrinsics to generic Intri [...] adds 288c582fc93 Follow up of rG5f1cad4d296a, slightly reduced test case. NFC. adds a70f2eb3e39 [MLIR][Shape] Merge `shape` to `std`/`scf` lowerings. adds b22910daab9 [InstCombine] erase instructions leading up to unreachable adds 60162626a5c [X86] Replace UpgradeX86AddSubSatIntrinsics with UpgradeX86 [...] adds 7993431dad0 [X86][SSE] Add test cases for PR47448 adds 9de0a3da6a7 [X86][SSE] Don't use LowerVSETCCWithSUBUS for unsigned comp [...] adds c4056f84282 [Sparc] Add reduced funnel shift test case for PR47303 adds 783d7116dc8 AntiDepBreaker.h - remove unnecessary ScheduleDAG.h include. NFCI. adds 2e1827271cb [flang] Fix link to old repo location in doxygen mainpage. NFC. adds d01280587d9 [analyzer][StdLibraryFunctionsChecker] Add POSIX pthread ha [...] adds 7e5dab5fca4 [flang] Spelling and format edits to README.txt. NFC. adds 8248c2af949 [analyzer][StdLibraryFunctionsChecker] Have proper weak dep [...] adds eb482afaf5b Reduce the number of memory allocations when displaying a w [...] adds 2480a31e5d6 [AMDGPU] SILowerControlFlow::optimizeEndCF should remove em [...] adds 11d8eedfa5b [InstCombine] move/add tests for icmp with mul operands; NFC adds 7a6d6f0f704 [InstCombine] improve folds for icmp with multiply operands [...] adds 1c34ac03a2d LeonPasses.h - remove orphan function declarations. NFCI. adds dfc333050b5 LeonPasses.h - remove unnecessary includes. NFCI. adds 95ca3aacf0f BTFDebug.h - reduce MachineInstr.h include to forward decla [...] adds 4e89a0ab021 MipsISelLowering.h - remove CCState/CCValAssign forward dec [...] adds 5ea9e655efd VPlan.h - remove unnecessary forward declarations. NFCI. adds e52e7ad54de [ms] [llvm-ml] Add support for bitwise named operators (AND [...] adds 2feb6e9b841 [ms] [llvm-ml] Fix STRUCT field alignment adds a3ec4a3158f [ms] [llvm-ml] Allow use of locally-defined variables in ex [...] adds 7a06b166b1a [DAGCombiner] allow more store merging for non-i8 truncated ops adds f3a6f6ccfdd [X86] Pre-commit new test case for D87214. NFC adds 01b3e167575 [X86] Use the same sequence for i128 ISD::ABS on 64-bit tar [...] adds 70207816e35 [InstCombine] add ptr difference tests; NFC adds 8b300679192 [InstCombine] improve fold of pointer differences adds da79b1eecc6 [SelectionDAG][X86][ARM] Teach ExpandIntRes_ABS to use sra+ [...] adds 9fb46a452d4 [SCCP] Compute ranges for supported intrinsics adds ddab4cd83ea [KnownBits] Avoid some copies (NFC) adds bb7d3af1139 Reland [SimplifyCFG][LoopRotate] SimplifyCFG: disable commo [...] No new revisions were added by this update. Summary of changes: .../clang-tidy/modernize/UseAutoCheck.cpp | 2 +- .../readability/SimplifyBooleanExprCheck.cpp | 2 +- clang/docs/ClangFormatStyleOptions.rst | 17 + clang/docs/ThreadSafetyAnalysis.rst | 94 ++++- clang/examples/Attribute/CMakeLists.txt | 2 +- clang/include/clang/AST/APValue.h | 11 +- clang/include/clang/AST/Expr.h | 12 +- clang/include/clang/AST/IgnoreExpr.h | 61 ++++ clang/include/clang/Basic/BuiltinsPPC.def | 7 + clang/include/clang/Format/Format.h | 19 + .../clang/StaticAnalyzer/Checkers/Checkers.td | 3 +- clang/lib/AST/APValue.cpp | 24 +- clang/lib/AST/CMakeLists.txt | 1 + clang/lib/AST/Expr.cpp | 233 +++--------- clang/lib/AST/IgnoreExpr.cpp | 129 +++++++ clang/lib/CodeGen/CGBuiltin.cpp | 35 +- clang/lib/CodeGen/CGExprCXX.cpp | 2 +- clang/lib/Driver/ToolChains/Arch/Sparc.cpp | 9 +- clang/lib/Format/Format.cpp | 2 + clang/lib/Format/FormatToken.cpp | 1 + clang/lib/Format/FormatToken.h | 7 +- clang/lib/Format/FormatTokenLexer.cpp | 2 + clang/lib/Format/TokenAnnotator.cpp | 70 ++-- clang/lib/Headers/altivec.h | 27 ++ clang/lib/Sema/SemaExpr.cpp | 2 +- .../Checkers/StdLibraryFunctionsChecker.cpp | 95 +++++ clang/lib/StaticAnalyzer/Core/CallEvent.cpp | 2 +- clang/test/Analysis/analyzer-enabled-checkers.c | 2 +- .../test/Analysis/std-c-library-functions-POSIX.c | 42 +++ ...std-c-library-functions-arg-enabled-checkers.c} | 15 +- .../std-c-library-functions-arg-weakdeps.c | 64 ++++ clang/test/CodeGen/arm-mve-intrinsics/vmaxaq.c | 28 +- clang/test/CodeGen/arm-mve-intrinsics/vmaxnmaq.c | 24 +- clang/test/CodeGen/arm-mve-intrinsics/vmaxnmq.c | 24 +- clang/test/CodeGen/arm-mve-intrinsics/vmaxq.c | 40 +-- clang/test/CodeGen/arm-mve-intrinsics/vminaq.c | 28 +- clang/test/CodeGen/arm-mve-intrinsics/vminnmaq.c | 24 +- clang/test/CodeGen/arm-mve-intrinsics/vminnmq.c | 24 +- clang/test/CodeGen/arm-mve-intrinsics/vminq.c | 40 +-- clang/test/CodeGen/avx2-builtins.c | 12 +- clang/test/CodeGen/avx512bw-builtins.c | 32 +- clang/test/CodeGen/avx512f-builtins.c | 32 +- clang/test/CodeGen/avx512vl-builtins.c | 74 ++-- clang/test/CodeGen/avx512vlbw-builtins.c | 80 ++--- clang/test/CodeGen/builtins-ppc-p10vector.c | 30 ++ clang/test/CodeGen/ssse3-builtins.c | 12 +- clang/test/Driver/freebsd.c | 2 +- clang/test/Driver/linux-as.c | 4 +- clang/test/Driver/openbsd.c | 2 +- clang/test/SemaCXX/thread-safety-annotations.h | 3 +- clang/tools/scan-view/share/ScanView.py | 2 +- clang/unittests/Format/FormatTest.cpp | 191 +++++++++- compiler-rt/lib/asan/scripts/asan_symbolize.py | 2 +- compiler-rt/lib/builtins/clear_cache.c | 4 +- flang/README.md | 11 +- flang/docs/doxygen-mainpage.dox | 2 +- lldb/packages/Python/lldbsuite/test/lldbtest.py | 23 ++ .../Plugins/Process/FreeBSD/FreeBSDThread.cpp | 5 +- .../RegisterContextPOSIXProcessMonitor_arm.cpp | 6 +- .../RegisterContextPOSIXProcessMonitor_arm.h | 4 +- .../Linux/NativeRegisterContextLinux_arm.cpp | 94 +---- .../Process/Linux/NativeRegisterContextLinux_arm.h | 34 +- .../Process/Utility/RegisterContextPOSIX_arm.cpp | 131 ++----- .../Process/Utility/RegisterContextPOSIX_arm.h | 51 +-- .../Process/Utility/RegisterInfoPOSIX_arm.cpp | 104 +++++- .../Process/Utility/RegisterInfoPOSIX_arm.h | 15 +- .../elf-core/RegisterContextPOSIXCore_arm.cpp | 4 +- .../elf-core/RegisterContextPOSIXCore_arm.h | 2 +- .../Plugins/Process/elf-core/ThreadElfCore.cpp | 14 +- .../rw_access_static_config/TestSVERegisters.py | 27 +- llvm/cmake/modules/TableGen.cmake | 20 +- llvm/include/llvm/ADT/SmallVector.h | 36 +- llvm/include/llvm/BinaryFormat/ELF.h | 7 + llvm/include/llvm/BinaryFormat/ELFRelocs/CSKY.def | 74 ++++ llvm/include/llvm/CodeGen/AntiDepBreaker.h | 1 - .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 4 +- llvm/include/llvm/CodeGen/MachineStableHash.h | 4 +- llvm/include/llvm/IR/IntrinsicsPowerPC.td | 12 + llvm/include/llvm/Object/ELFObjectFile.h | 4 + llvm/include/llvm/ObjectYAML/DWARFYAML.h | 2 +- llvm/include/llvm/Support/KnownBits.h | 16 + llvm/include/llvm/Target/GlobalISel/Combine.td | 2 +- llvm/include/llvm/Transforms/Utils/Local.h | 1 + .../Transforms/Utils/ScalarEvolutionExpander.h | 33 +- .../llvm/Transforms/Utils/SimplifyCFGOptions.h | 2 +- llvm/include/llvm/module.modulemap | 1 + llvm/lib/Analysis/StackLifetime.cpp | 2 +- llvm/lib/Analysis/ValueTracking.cpp | 73 ++-- .../lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp | 35 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 93 +++-- llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 36 +- llvm/lib/CodeGen/MachineStableHash.cpp | 1 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 18 +- .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 28 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 2 - llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 30 +- llvm/lib/IR/AutoUpgrade.cpp | 38 +- llvm/lib/MC/MCParser/MasmParser.cpp | 88 +++-- llvm/lib/Object/ELF.cpp | 9 + llvm/lib/ObjectYAML/DWARFEmitter.cpp | 2 +- llvm/lib/ObjectYAML/DWARFYAML.cpp | 2 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 4 + llvm/lib/Passes/PassBuilder.cpp | 13 +- llvm/lib/Support/KnownBits.cpp | 62 ++++ llvm/lib/Support/SmallVector.cpp | 51 +-- llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 1 + llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 47 ++- llvm/lib/Target/ARM/ARMTargetMachine.cpp | 3 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 17 +- llvm/lib/Target/BPF/BTFDebug.h | 8 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 1 + llvm/lib/Target/Mips/MipsISelLowering.h | 2 - llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 15 +- llvm/lib/Target/Sparc/LeonPasses.cpp | 7 +- llvm/lib/Target/Sparc/LeonPasses.h | 9 +- .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 4 +- llvm/lib/Target/X86/X86AsmPrinter.cpp | 2 +- .../Target/X86/X86AvoidStoreForwardingBlocks.cpp | 4 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 8 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 159 ++++----- llvm/lib/Target/X86/X86InstrInfo.cpp | 10 +- llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 3 + .../Transforms/InstCombine/InstCombineAddSub.cpp | 36 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 17 +- .../Transforms/InstCombine/InstCombineInternal.h | 1 + .../InstCombine/InstructionCombining.cpp | 13 + .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 23 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 19 + llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp | 4 +- .../Transforms/Utils/ScalarEvolutionExpander.cpp | 289 ++++++++------- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 28 +- llvm/lib/Transforms/Vectorize/VPlan.h | 2 - llvm/test/Analysis/CostModel/ARM/arith.ll | 6 +- .../GlobalISel/prelegalizercombiner-invert-cmp.mir | 118 +++++++ llvm/test/CodeGen/AArch64/merge-trunc-store.ll | 49 ++- llvm/test/CodeGen/AMDGPU/collapse-endcf.mir | 32 +- llvm/test/CodeGen/ARM/memcpy-const-vol-struct.ll | 18 + llvm/test/CodeGen/ARM/pr45824.ll | 57 ++- llvm/test/CodeGen/PowerPC/constants-i64.ll | 45 ++- llvm/test/CodeGen/PowerPC/mulli.ll | 70 ++++ llvm/test/CodeGen/PowerPC/p10-vector-mask-ops.ll | 56 +++ .../CodeGen/PowerPC/sink-down-more-instructions.ll | 97 +++++ llvm/test/CodeGen/SPARC/fshl.ll | 48 +++ llvm/test/CodeGen/Thumb2/mve-abs.ll | 35 +- .../CodeGen/Thumb2/mve-gather-scatter-tailpred.ll | 13 +- llvm/test/CodeGen/Thumb2/mve-pred-vctpvpsel.ll | 11 +- llvm/test/CodeGen/WebAssembly/pr47375.ll | 36 ++ llvm/test/CodeGen/X86/abs.ll | 51 ++- llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll | 24 +- llvm/test/CodeGen/X86/combine-abs.ll | 160 +++++++-- llvm/test/CodeGen/X86/iabs.ll | 47 +++ llvm/test/CodeGen/X86/insertelement-ones.ll | 10 +- .../CodeGen/X86/shuffle-strided-with-offset-256.ll | 52 ++- .../CodeGen/X86/shuffle-strided-with-offset-512.ll | 43 ++- llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll | 18 +- .../test/CodeGen/X86/ssse3-intrinsics-fast-isel.ll | 24 +- .../CodeGen/X86/ssse3-intrinsics-x86-upgrade.ll | 69 ++++ llvm/test/CodeGen/X86/ssse3-intrinsics-x86.ll | 63 ---- llvm/test/CodeGen/X86/stores-merging.ll | 22 +- llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll | 9 +- llvm/test/CodeGen/X86/vector-shuffle-avx512.ll | 35 +- .../CodeGen/X86/vector-shuffle-combining-avx.ll | 35 +- .../CodeGen/X86/vector-shuffle-combining-avx2.ll | 29 +- llvm/test/CodeGen/X86/vector-unsigned-cmp.ll | 95 ++++- llvm/test/CodeGen/X86/vector-zext.ll | 19 +- llvm/test/Transforms/InstCombine/assume.ll | 45 ++- llvm/test/Transforms/InstCombine/icmp-mul.ll | 303 ++++++++++++++++ llvm/test/Transforms/InstCombine/icmp.ll | 52 --- .../InstCombine/pr33689_same_bitwidth.ll | 2 - llvm/test/Transforms/InstCombine/sub-gep.ll | 58 ++- llvm/test/Transforms/InstCombine/sub.ll | 35 +- llvm/test/Transforms/PGOProfile/chr.ll | 7 + .../loop-rotation-vs-common-code-hoisting.ll | 29 +- llvm/test/Transforms/SCCP/intrinsics.ll | 18 +- .../SimplifyCFG/ARM/branch-fold-threshold.ll | 162 ++++++--- .../Transforms/SimplifyCFG/common-code-hoisting.ll | 2 +- .../tools/llvm-ml/named_bitwise_operators.test | 20 ++ llvm/test/tools/llvm-ml/struct.test | 32 +- llvm/test/tools/llvm-ml/variable.test | 13 + llvm/test/tools/obj2yaml/ELF/DWARF/debug-str.yaml | 101 ++++++ llvm/test/tools/yaml2obj/ELF/DWARF/debug-addr.yaml | 15 + llvm/tools/llvm-readobj/ELFDumper.cpp | 296 ++++++---------- llvm/tools/obj2yaml/elf2yaml.cpp | 33 +- .../unittests/CodeGen/GlobalISel/KnownBitsTest.cpp | 4 +- llvm/unittests/Object/ELFObjectFileTest.cpp | 15 + llvm/unittests/Support/KnownBitsTest.cpp | 44 ++- llvm/utils/KillTheDoctor/CMakeLists.txt | 1 + llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn | 1 + mlir/include/mlir-c/StandardTypes.h | 28 ++ mlir/include/mlir/Conversion/Passes.h | 1 - mlir/include/mlir/Conversion/Passes.td | 12 +- .../mlir/Conversion/ShapeToSCF/ShapeToSCF.h | 27 -- mlir/include/mlir/Dialect/SCF/SCFOps.td | 8 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 49 +++ mlir/include/mlir/Dialect/Vector/EDSC/Intrinsics.h | 17 +- mlir/include/mlir/Dialect/Vector/VectorOps.td | 29 +- mlir/include/mlir/EDSC/Builders.h | 4 +- .../Dialect/Vector/CPU/test-transfer-to-loops.mlir | 81 +++++ mlir/lib/Bindings/Python/IRModules.cpp | 296 ++++++++++++++-- mlir/lib/CAPI/IR/StandardTypes.cpp | 36 ++ mlir/lib/Conversion/CMakeLists.txt | 1 - mlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp | 3 +- .../lib/Conversion/SCFToStandard/SCFToStandard.cpp | 4 +- mlir/lib/Conversion/ShapeToSCF/CMakeLists.txt | 19 - mlir/lib/Conversion/ShapeToSCF/ShapeToSCF.cpp | 337 ------------------ .../Conversion/ShapeToStandard/ShapeToStandard.cpp | 391 +++++++++++++++++---- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 14 +- mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp | 35 +- mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 7 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 2 +- mlir/lib/Dialect/Linalg/Transforms/Loops.cpp | 2 +- .../Dialect/Linalg/Transforms/Vectorization.cpp | 16 +- mlir/lib/Dialect/SCF/SCF.cpp | 8 +- mlir/lib/Dialect/Shape/IR/Shape.cpp | 2 +- .../Shape/Transforms/ShapeToShapeLowering.cpp | 2 +- mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 62 +++- mlir/lib/Dialect/Vector/VectorOps.cpp | 24 ++ mlir/test/Bindings/Python/ir_types.py | 183 +++++++++- mlir/test/Conversion/ShapeToSCF/shape-to-scf.mlir | 132 ------- .../ShapeToStandard/shape-to-standard.mlir | 211 ++++++++--- .../StandardToLLVM/convert-static-memref-ops.mlir | 6 +- .../Conversion/VectorToSCF/vector-to-loops.mlir | 33 +- mlir/test/Dialect/Standard/invalid.mlir | 66 ++++ mlir/test/Dialect/Standard/ops.mlir | 14 +- mlir/test/EDSC/builder-api-test.cpp | 2 +- openmp/cmake/OpenMPTesting.cmake | 9 +- openmp/libomptarget/deviceRTLs/common/omptarget.h | 2 +- .../deviceRTLs/common/src/data_sharing.cu | 2 +- openmp/runtime/cmake/LibompCheckFortranFlag.cmake | 47 +-- polly/cmake/polly_macros.cmake | 15 - polly/lib/External/CMakeLists.txt | 3 +- 231 files changed, 5749 insertions(+), 3050 deletions(-) create mode 100644 clang/include/clang/AST/IgnoreExpr.h create mode 100644 clang/lib/AST/IgnoreExpr.cpp copy clang/test/Analysis/{analyzer-enabled-checkers.c => std-c-library-functions-a [...] create mode 100644 clang/test/Analysis/std-c-library-functions-arg-weakdeps.c create mode 100644 llvm/include/llvm/BinaryFormat/ELFRelocs/CSKY.def create mode 100644 llvm/test/CodeGen/ARM/memcpy-const-vol-struct.ll create mode 100644 llvm/test/CodeGen/PowerPC/mulli.ll create mode 100644 llvm/test/CodeGen/PowerPC/sink-down-more-instructions.ll create mode 100644 llvm/test/CodeGen/SPARC/fshl.ll create mode 100644 llvm/test/CodeGen/WebAssembly/pr47375.ll create mode 100644 llvm/test/CodeGen/X86/ssse3-intrinsics-x86-upgrade.ll create mode 100644 llvm/test/tools/llvm-ml/named_bitwise_operators.test create mode 100644 llvm/test/tools/llvm-ml/variable.test create mode 100644 llvm/test/tools/obj2yaml/ELF/DWARF/debug-str.yaml delete mode 100644 mlir/include/mlir/Conversion/ShapeToSCF/ShapeToSCF.h create mode 100644 mlir/integration_test/Dialect/Vector/CPU/test-transfer-to-loops.mlir delete mode 100644 mlir/lib/Conversion/ShapeToSCF/CMakeLists.txt delete mode 100644 mlir/lib/Conversion/ShapeToSCF/ShapeToSCF.cpp delete mode 100644 mlir/test/Conversion/ShapeToSCF/shape-to-scf.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_tk1/llvm-master-arm-spec2k6-O2_LTO updated (98984ece -> ea606b22)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/llvm-master-arm-spec2k6-O2_LTO in repository toolchain/ci/base-artifacts. from 98984ece 0: update: binutils-gcc-glibc: 1 new ea606b22 1: reset: llvm-bb7d3af1139c36270bc9948605e06f40e4c51541: 1 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 132 +- 02-prepare_abe/console.log | 312 +- 03-build_abe-binutils/console.log | 11408 +- 04-build_abe-stage1/console.log | 20612 ++-- 05-build_abe-linux/console.log | 292 +- 06-build_abe-glibc/console.log | 39208 ++++--- 07-build_abe-stage2/console.log | 45726 ++++---- 08-build_llvm-true/console.log | 13196 +-- 10-benchmark--O2_LTO_marm/benchmark-start.log | 2 +- 10-benchmark--O2_LTO_marm/benchmark.log | 4 +- 10-benchmark--O2_LTO_marm/console.log | 154 +- 11-check_regression/console.log | 832 +- 11-check_regression/extra-bisect-params | 2 +- 11-check_regression/results-0.csv | 114 +- 11-check_regression/results-1.csv | 112 +- 11-check_regression/results-brief.csv | 38 +- 11-check_regression/results-compare.csv | 2 +- 11-check_regression/results-full.csv | 122 +- 11-check_regression/results.csv | 48 +- 11-check_regression/results.log | 2636 +- 11-check_regression/results.regressions | 1 + 11-check_regression/trigger-bisect | 4 + 12-update_baseline/console.log | 157 +- 12-update_baseline/extra-bisect-params | 2 +- 12-update_baseline/results-0.csv | 114 +- 12-update_baseline/results-1.csv | 112 +- 12-update_baseline/results-brief.csv | 38 +- 12-update_baseline/results-compare.csv | 2 +- 12-update_baseline/results-full.csv | 122 +- 12-update_baseline/results.csv | 48 +- 12-update_baseline/results.log | 2636 +- 12-update_baseline/results.regressions | 1 + console.log | 132029 +++++++++++------------ jenkins/manifest.sh | 20 +- reset-baseline | 0 results | 1 + results_id | 2 +- 37 files changed, 134219 insertions(+), 136022 deletions(-) create mode 100644 11-check_regression/results.regressions create mode 100644 11-check_regression/trigger-bisect create mode 100644 12-update_baseline/results.regressions create mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_O3 updated (3bad57d476f -> d8eb8abfb8c)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_O3 in repository toolchain/ci/gcc. from 3bad57d476f Fix uninitialized variable with nested variant record types adds 10f5c90ea56 Daily bump. adds 0679082b1db Adjust email address adds b3a51b99dbb Fix crash on array component with nonstandard index type adds 6d06c17e9f4 libstdc++: Fix is_trivially_constructible (PR 94033) adds 1102a2c1fd2 tree-optimization/95717 - fix SSA update for vectorizer epilogue adds 5024ea60b74 tree-optimization/95133 - avoid abnormal edges in path splitting adds 0c7ae564f42 tree-optimization/95049 - fix not terminating RPO VN iteration adds 95a8572ce7b middle-end/94964 - avoid EH loop entry with CP_SIMPLE_PREHEADERS adds 0bcf016768f ipa/94947 - fix test for externally visible variables for IPA PTA adds 7cfb86a2a18 ipa/94947 - avoid using externally_visible_p () adds d8eb8abfb8c Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 58 ++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 14 +++++- gcc/ada/gcc-interface/decl.c | 12 ++--- gcc/cfgloopmanip.c | 5 +- gcc/gimple-ssa-split-paths.c | 10 +++- gcc/testsuite/ChangeLog | 43 ++++++++++++++++ gcc/testsuite/g++.dg/torture/pr95717.C | 12 +++++ gcc/testsuite/gcc.dg/pr95133.c | 14 ++++++ gcc/testsuite/gcc.dg/torture/pr94947-1.c | 23 +++++++++ gcc/testsuite/gcc.dg/torture/pr94947-2.c | 7 +++ gcc/testsuite/gcc.dg/torture/pr95049.c | 7 +++ gcc/testsuite/gnat.dg/specs/discr7.ads | 14 ++++++ gcc/tree-ssa-sccvn.c | 27 ++++++++-- gcc/tree-ssa-structalias.c | 14 ++++-- gcc/tree-vect-loop-manip.c | 8 +-- libstdc++-v3/ChangeLog | 19 +++++++ libstdc++-v3/include/std/type_traits | 57 ++++++++++----------- .../20_util/is_nothrow_constructible/94003.cc | 46 +++++++++++++++++ .../is_nothrow_default_constructible/96999.cc | 54 ++++++++++++++++++++ 20 files changed, 388 insertions(+), 58 deletions(-) create mode 100644 gcc/testsuite/g++.dg/torture/pr95717.C create mode 100644 gcc/testsuite/gcc.dg/pr95133.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr94947-1.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr94947-2.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr95049.c create mode 100644 gcc/testsuite/gnat.dg/specs/discr7.ads create mode 100644 libstdc++-v3/testsuite/20_util/is_nothrow_constructible/94003.cc create mode 100644 libstdc++-v3/testsuite/20_util/is_nothrow_default_constructible [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_O3 updated (1eb7ba1f -> d94cdf41)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_O3 in repository toolchain/ci/base-artifacts. discards 1eb7ba1f 0: update: gcc-3bad57d476f7a96dc7a73081196eb53d6f516481: 1 new d94cdf41 0: update: gcc-d8eb8abfb8c929b67ef5da35f367b544f583d479: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1eb7ba1f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-release-aarch64- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 150 +- 02-prepare_abe/console.log | 14 +- 04-build_abe-bootstrap_O3/console.log | 55038 ++++++++++++++++--------------- 05-check_regression/console.log | 4 +- 06-update_baseline/console.log | 2 +- console.log | 55238 ++++++++++++++++---------------- jenkins/manifest.sh | 10 +- 7 files changed, 55237 insertions(+), 55219 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig updated (67957f12548c -> a87f96283793)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig in repository toolchain/ci/linux. from 67957f12548c Linux 4.19.144 adds 9244e838ac0d ALSA; firewire-tascam: exclude Tascam FE-8 from detection adds 732fd460bb72 block: ensure bdi->io_pages is always initialized adds a3a5cb677674 netlabel: fix problems with mapping removal adds d2ece46d1004 net: usb: dm9601: Add USB ID of Keenetic Plus DSL adds 84cfc87866b7 sctp: not disable bh in the whole sctp_get_port_local() adds 553d1bb7f4d1 tipc: fix shutdown() of connectionless socket adds 9f313bcb3b3d net: disable netpoll on fresh napis adds 044be307e550 net/mlx5e: Don't support phys switch id if not in switchdev mode adds a87f96283793 Linux 4.19.145 No new revisions were added by this update. Summary of changes: Makefile | 2 +- block/blk-core.c | 2 + drivers/net/ethernet/mellanox/mlx5/core/en_rep.c | 2 +- drivers/net/usb/dm9601.c | 4 ++ net/core/dev.c | 3 +- net/core/netpoll.c | 2 +- net/netlabel/netlabel_domainhash.c | 59 ++++++++++++------------ net/sctp/socket.c | 16 +++---- net/tipc/socket.c | 9 ++-- sound/firewire/tascam/tascam.c | 30 +++++++++++- 10 files changed, 82 insertions(+), 47 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig updated (59fc8677903 -> 412c9c0bf2a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig in repository toolchain/ci/llvm-project. from 59fc8677903 Re-split integral & pointer overloads. Add tests. adds 9a2bab5ea2f [ThinLTO] Make -lto-embed-bitcode an enum adds df477db5f9e [Coroutine][Sema] Tighten the lifetime of symmetric transfe [...] adds 7c37b82f5ba [SyntaxTree][Synthesis] Add support for Tree. adds 7dcd0042e8b Re-apply "[ORC] Make MaterializationResponsibility immovabl [...] adds ccb4124a417 Fix -gz=zlib options for linker adds f5ab5b20fb2 Sema: add support for `__attribute__((__swift_error__))` adds e3e3d6eecfa [lld][WebAssembly] Convert a objyaml-using test to assembly adds ee13ae030e2 Fix test hip-gz-options.hip adds e21bb31eb6c CodeGen: Require SSA to run PeepholeOptimizer adds 382b2b1b518 RegAllocFast: Fix typo in comment adds 43e6c59f1c1 docs: add a newline to appease Sphinx adds 45d0343900d [MC] Allow .org directives in SHT_NOBITS sections adds 658475897b1 [NFC][Asan] Early return from GetBlockBegin adds e10df779f09 Fix clang Wrange-loop-analysis in BuildTree.cpp adds 76e3a27c16d [lldb] Add test for CFMutableDictionaryRef adds 83286a1a8f0 [MS ABI] Add mangled type for auto template parameter whose [...] adds 12292c8b27a [NFC][Asan] Add another lsan test adds 31ecf8d29d8 [NewPM][CodeGen] Introduce CodeGenPassBuilder to help build [...] adds 37f2776d1af [ConstantFold] Fold binary arithmetic on scalable vector splats. adds a8503b87f73 [NFC] Remove unused static function adds 3fdaa8602a0 Fix a typo in 31ecf8d29d81d196374a562c6d2bd2c25a62861e adds c931dc0bf59 [gn build] Port 31ecf8d29d8 adds d751f86189a [ConstantFold] Make areGlobalsPotentiallyEqual less aggressive. adds 33eb6470429 [lldb] Use GetNonKVOClassDescriptor to get the NSDictionary [...] adds 928d419797e Fix a couple of tests that relied on the clang binary havin [...] adds 12a281d368e [gn] Remove unneeded MC dep from llvm-tblgen adds ad99e34c59b Revert "[NewPM][CodeGen] Introduce CodeGenPassBuilder to he [...] adds 0e0d93e2f09 [gn build] Port ad99e34c59b adds 528554c39b0 [PowerPC] Set the mayRaiseFPException for FCMPUS/FCMPUD adds 0680a3d56d8 [Power10] Enable the heuristic for Power10 and switch the s [...] adds 6c8041aa0ff [AST][FPEnv] Keep FP options in trailing storage of CastExpr adds 0ece51c60c5 Add raw_fd_stream that supports reading/seeking/writing adds 19531a81f1d Add raw_fd_stream_test.cpp into CMakeLists.txt adds 9c651c231f3 Missing change from previous commit adds b3f364e8561 Add a header file to support ssize_t for windows adds de044f75628 Revert "[AST][FPEnv] Keep FP options in trailing storage of [...] adds 4ede83c0683 [gn build] Port 19531a81f1d adds 35dc91aee20 [X86][SSE] lowerShuffleAsDecomposedShuffleBlend - support d [...] adds 36e2e2e12ef [InstCombine] Fix incorrect SimplifyWithOpReplaced transfor [...] adds c437446d90b [ARM] Recognize "double extend" reduction patterns adds 50ee0b99ec2 [InstCombine][X86] getNegativeIsTrueBoolVec - use ConstantE [...] adds 3a8ea8609b8 [Intrinsics] define semantics for experimental fmax/fmin ve [...] adds 6cfd38d03d5 [ARM] Fixup single source mla reductions. adds d030aad7893 [InstCombine][X86] Add tests for masked load/stores with co [...] adds 78de7297abe Reland [AssumeBundles] Use operand bundles to encode alignm [...] adds 2e61cd1295e [MachineScheduler] Fix operand scheduling for pre/post-incr [...] adds a874d633440 [Clang] Add option to allow marking pass-by-value args as noalias. adds 3170d548426 [InstCombine][X86] Covert masked load/stores with (sign ext [...] adds 8ce75e2778d TableGen: change a couple of member names to clarify their use. adds 74760bb00fb [LV][ARM] Add preferInloopReduction target hook. new 3de9e3e493b [DSE] Precommit test case with loop carried dependence. new e082dee2b58 [DSE] Bail out on MemoryPhis when deleting stores at end of [...] new d85ac6d577a [DSE] Adjust coroutines test after e082dee2b588. new ad3d6f993d9 [SelectionDAG][X86][ARM][AArch64] Add ISD opcode for __buil [...] new cc76965b190 [MinGW] Use lib prefix for libraries new bb613044b68 [MinGW][clang-shlib] Build by default on MinGW new 7da94193990 [MinGW][libclang] Allow simultaneous shared and static lib new c34a99fe589 [InstCombine] Add extra use tests for abs canonicalization (NFC) new c55c14837e1 [gcov] Clean up by getting llvm.dbg.cu earlier new 412c9c0bf2a [gcov] emitProfileArcs: iterate over GCOVFunction's instead [...] The 10 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang/include/clang/Basic/Attr.td | 11 + clang/include/clang/Basic/AttrDocs.td | 48 + clang/include/clang/Basic/CodeGenOptions.def | 4 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 7 + clang/include/clang/Basic/LangOptions.h | 1 + clang/include/clang/Driver/Options.td | 3 + clang/include/clang/Tooling/Syntax/BuildTree.h | 6 + clang/lib/AST/MicrosoftMangle.cpp | 61 +- clang/lib/CodeGen/CGCall.cpp | 7 + clang/lib/CodeGen/CodeGenFunction.cpp | 36 +- clang/lib/Driver/ToolChains/AMDGPU.cpp | 1 + clang/lib/Driver/ToolChains/CommonArgs.cpp | 18 + clang/lib/Driver/ToolChains/CommonArgs.h | 4 + clang/lib/Driver/ToolChains/Gnu.cpp | 1 + clang/lib/Driver/ToolChains/HIP.cpp | 2 + clang/lib/Frontend/CompilerInvocation.cpp | 2 + clang/lib/Sema/SemaCoroutine.cpp | 4 + clang/lib/Sema/SemaDeclAttr.cpp | 101 + clang/lib/StaticAnalyzer/Core/PlistDiagnostics.cpp | 5 - clang/lib/Tooling/Syntax/BuildTree.cpp | 2 +- clang/lib/Tooling/Syntax/Synthesis.cpp | 14 + clang/test/CodeGen/align_value.cpp | 30 +- clang/test/CodeGen/alloc-align-attr.c | 44 +- .../assume-aligned-and-alloc-align-attributes.c | 8 +- clang/test/CodeGen/builtin-align-array.c | 32 +- clang/test/CodeGen/builtin-align.c | 24 +- clang/test/CodeGen/builtin-assume-aligned.c | 32 +- ...-assumption-attribute-align_value-on-lvalue.cpp | 8 +- ...ssumption-attribute-align_value-on-paramvar.cpp | 2 +- ...-attribute-alloc_align-on-function-variable.cpp | 10 +- ...ssumption-attribute-alloc_align-on-function.cpp | 2 +- ...ibute-assume_aligned-on-function-two-params.cpp | 10 +- ...mption-attribute-assume_aligned-on-function.cpp | 2 +- ...uiltin_assume_aligned-three-params-variable.cpp | 10 +- ...umption-builtin_assume_aligned-three-params.cpp | 10 +- ...ssumption-builtin_assume_aligned-two-params.cpp | 8 +- .../CodeGen/catch-alignment-assumption-openmp.cpp | 8 +- .../CodeGen/non-power-of-2-alignment-assumptions.c | 13 +- clang/test/CodeGen/pass-by-value-noalias.c | 16 + clang/test/CodeGenCXX/mangle-ms-auto-templates.cpp | 47 + clang/test/CodeGenCXX/pass-by-value-noalias.cpp | 73 + clang/test/CodeGenCoroutines/Inputs/coroutine.h | 2 +- .../CodeGenCoroutines/coro-semmetric-transfer.cpp | 53 + clang/test/CodeGenObjC/pass-by-value-noalias.m | 22 + clang/test/Driver/amdgcn-gz-options.cl | 16 + clang/test/Driver/compress.c | 16 +- clang/test/Driver/hip-gz-options.hip | 14 + ...pragma-attribute-supported-attributes-list.test | 1 + clang/test/OpenMP/simd_codegen.cpp | 16 - clang/test/OpenMP/simd_metadata.c | 117 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 5 +- clang/test/SemaObjC/attr-swift-error.m | 93 + clang/tools/CMakeLists.txt | 2 +- clang/tools/libclang/CMakeLists.txt | 4 +- clang/unittests/Tooling/Syntax/SynthesisTest.cpp | 57 + .../sanitizer_allocator_primary64.h | 2 +- compiler-rt/test/asan/TestCases/leaks.cpp | 29 + lld/test/wasm/Inputs/undefined-globals.s | 11 + lld/test/wasm/Inputs/undefined-globals.yaml | 53 - lld/test/wasm/gc-imports.ll | 91 - lld/test/wasm/gc-imports.s | 87 + lldb/source/API/CMakeLists.txt | 4 +- lldb/source/Plugins/Language/ObjC/NSDictionary.cpp | 2 +- .../TestDataFormatterObjCNSContainer.py | 4 +- .../data-formatter/data-formatter-objc/main.m | 2 + llvm/cmake/modules/AddLLVM.cmake | 2 +- llvm/docs/LangRef.rst | 14 +- llvm/examples/SpeculativeJIT/SpeculativeJIT.cpp | 15 +- .../ThinLtoJIT/ThinLtoInstrumentationLayer.cpp | 4 +- .../ThinLtoJIT/ThinLtoInstrumentationLayer.h | 3 +- llvm/examples/ThinLtoJIT/ThinLtoJIT.cpp | 11 +- llvm/include/llvm/Analysis/InstructionSimplify.h | 6 + llvm/include/llvm/Analysis/TargetTransformInfo.h | 10 + .../llvm/Analysis/TargetTransformInfoImpl.h | 5 + llvm/include/llvm/CodeGen/BasicTTIImpl.h | 4 - llvm/include/llvm/CodeGen/ISDOpcodes.h | 1 + .../ExecutionEngine/Orc/CompileOnDemandLayer.h | 6 +- llvm/include/llvm/ExecutionEngine/Orc/Core.h | 37 +- .../llvm/ExecutionEngine/Orc/IRCompileLayer.h | 3 +- .../llvm/ExecutionEngine/Orc/IRTransformLayer.h | 3 +- llvm/include/llvm/ExecutionEngine/Orc/Layer.h | 11 +- .../llvm/ExecutionEngine/Orc/LazyReexports.h | 2 +- .../llvm/ExecutionEngine/Orc/ObjectLinkingLayer.h | 2 +- .../ExecutionEngine/Orc/ObjectTransformLayer.h | 2 +- .../ExecutionEngine/Orc/RTDyldObjectLinkingLayer.h | 2 +- .../include/llvm/ExecutionEngine/Orc/Speculation.h | 3 +- llvm/include/llvm/IR/IRBuilder.h | 28 +- llvm/include/llvm/Support/raw_ostream.h | 64 +- llvm/include/llvm/TableGen/Record.h | 21 +- .../Transforms/Scalar/AlignmentFromAssumptions.h | 6 +- llvm/lib/Analysis/AssumeBundleQueries.cpp | 13 +- llvm/lib/Analysis/InstructionSimplify.cpp | 50 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 5 + llvm/lib/CodeGen/ExpandReductions.cpp | 16 +- llvm/lib/CodeGen/PeepholeOptimizer.cpp | 5 + llvm/lib/CodeGen/RegAllocFast.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 19 + llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 26 + .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 21 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 3 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 22 +- .../CodeGen/SelectionDAG/SelectionDAGDumper.cpp | 1 + llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 9 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 1 + .../ExecutionEngine/Orc/CompileOnDemandLayer.cpp | 42 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 50 +- llvm/lib/ExecutionEngine/Orc/IRCompileLayer.cpp | 6 +- llvm/lib/ExecutionEngine/Orc/IRTransformLayer.cpp | 6 +- llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp | 6 +- llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 20 +- llvm/lib/ExecutionEngine/Orc/Layer.cpp | 8 +- llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp | 16 +- .../lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp | 59 +- .../ExecutionEngine/Orc/ObjectTransformLayer.cpp | 7 +- .../Orc/RTDyldObjectLinkingLayer.cpp | 25 +- llvm/lib/ExecutionEngine/Orc/Speculation.cpp | 4 +- llvm/lib/IR/ConstantFold.cpp | 37 +- llvm/lib/IR/IRBuilder.cpp | 77 +- llvm/lib/IR/Verifier.cpp | 23 +- llvm/lib/LTO/LTOBackend.cpp | 29 +- llvm/lib/MC/MCAssembler.cpp | 2 + llvm/lib/Support/raw_ostream.cpp | 36 +- llvm/lib/TableGen/Record.cpp | 4 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 2 - llvm/lib/Target/AArch64/AArch64InstrFormats.td | 8 +- .../Target/AArch64/AArch64TargetTransformInfo.h | 5 - llvm/lib/Target/ARM/ARMISelLowering.cpp | 51 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 14 + llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 9 +- llvm/lib/Target/PowerPC/PPC.td | 8 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 240 +-- llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp | 108 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 15 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 55 +- .../Transforms/Instrumentation/GCOVProfiling.cpp | 52 +- .../Transforms/Scalar/AlignmentFromAssumptions.cpp | 121 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 10 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 10 +- llvm/test/Assembler/ConstantExprNoFold.ll | 6 + llvm/test/CodeGen/AArch64/parity.ll | 161 ++ .../AArch64/vecreduce-fmax-legalization-nan.ll | 20 +- .../CodeGen/AArch64/vecreduce-fmax-legalization.ll | 2 +- llvm/test/CodeGen/AMDGPU/fold_16bit_imm.mir | 180 -- llvm/test/CodeGen/ARM/parity.ll | 162 ++ .../Generic/expand-experimental-reductions.ll | 40 +- llvm/test/CodeGen/PowerPC/nofpexcept.ll | 23 + .../CodeGen/PowerPC/pcrel-call-linkage-leaf.ll | 24 +- .../PowerPC/pcrel-call-linkage-with-calls.ll | 4 +- llvm/test/CodeGen/PowerPC/pcrel-tail-calls.ll | 4 +- llvm/test/CodeGen/Thumb2/mve-vecreduce-fminmax.ll | 1307 +++--------- llvm/test/CodeGen/Thumb2/mve-vecreduce-loops.ll | 30 +- llvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll | 1100 +--------- llvm/test/CodeGen/Thumb2/mve-vecreduce-mlapred.ll | 2244 ++------------------ llvm/test/CodeGen/X86/parity.ll | 189 +- llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll | 348 ++- llvm/test/CodeGen/X86/vector-reduce-fmax.ll | 1088 ++++++++-- llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll | 358 +++- llvm/test/CodeGen/X86/vector-reduce-fmin.ll | 1078 ++++++++-- llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll | 12 +- llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll | 32 +- llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll | 114 +- llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll | 37 +- llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll | 10 +- llvm/test/LTO/X86/embed-bitcode.ll | 4 +- llvm/test/MC/ELF/org.s | 24 +- .../Transforms/AlignmentFromAssumptions/simple.ll | 75 +- .../AlignmentFromAssumptions/simple32.ll | 114 +- llvm/test/Transforms/Coroutines/ArgAddr.ll | 9 +- .../MSSA/multiblock-loop-carried-dependence.ll | 143 ++ .../MSSA/multiblock-malloc-free.ll | 1 + .../MSSA/multiblock-memintrinsics.ll | 18 + llvm/test/Transforms/Inline/align.ll | 15 +- llvm/test/Transforms/Inline/byref-align.ll | 9 +- .../Transforms/InstCombine/2010-03-03-ExtElim.ll | 4 +- .../InstCombine/X86/x86-masked-memops.ll | 107 +- llvm/test/Transforms/InstCombine/abs-1.ll | 103 +- llvm/test/Transforms/InstCombine/assume.ll | 1 + llvm/test/Transforms/InstCombine/select.ll | 7 +- .../Transforms/InstSimplify/ConstProp/vscale.ll | 16 + .../LoopVectorize/ARM/mve-reduction-types.ll | 42 +- .../Transforms/LoopVectorize/ARM/mve-reductions.ll | 168 +- .../inlining-alignment-assumptions.ll | 27 +- llvm/test/Verifier/assume-bundles.ll | 16 +- llvm/test/tools/llvm-mca/AArch64/Exynos/load.s | 10 +- llvm/tools/llvm-config/llvm-config.cpp | 1 + .../unittests/Analysis/AssumeBundleQueriesTest.cpp | 38 + .../unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp | 242 ++- .../Orc/LazyCallThroughAndReexportsTest.cpp | 6 +- llvm/unittests/ExecutionEngine/Orc/OrcTestCommon.h | 5 +- llvm/unittests/Support/CMakeLists.txt | 1 + llvm/unittests/Support/raw_fd_stream_test.cpp | 67 + llvm/utils/TableGen/LLVMBuild.txt | 2 +- .../gn/secondary/llvm/unittests/Support/BUILD.gn | 1 + .../gn/secondary/llvm/utils/TableGen/BUILD.gn | 1 - 195 files changed, 6289 insertions(+), 6618 deletions(-) create mode 100644 clang/test/CodeGen/pass-by-value-noalias.c create mode 100644 clang/test/CodeGenCXX/mangle-ms-auto-templates.cpp create mode 100644 clang/test/CodeGenCXX/pass-by-value-noalias.cpp create mode 100644 clang/test/CodeGenCoroutines/coro-semmetric-transfer.cpp create mode 100644 clang/test/CodeGenObjC/pass-by-value-noalias.m create mode 100644 clang/test/Driver/amdgcn-gz-options.cl create mode 100644 clang/test/Driver/hip-gz-options.hip create mode 100644 clang/test/SemaObjC/attr-swift-error.m create mode 100644 compiler-rt/test/asan/TestCases/leaks.cpp create mode 100644 lld/test/wasm/Inputs/undefined-globals.s delete mode 100644 lld/test/wasm/Inputs/undefined-globals.yaml delete mode 100644 lld/test/wasm/gc-imports.ll create mode 100644 lld/test/wasm/gc-imports.s create mode 100644 llvm/test/CodeGen/AArch64/parity.ll create mode 100644 llvm/test/CodeGen/ARM/parity.ll create mode 100644 llvm/test/CodeGen/PowerPC/nofpexcept.ll create mode 100644 llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-loop- [...] create mode 100644 llvm/unittests/Support/raw_fd_stream_test.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits September 2020