Tcwg-commits September 2020

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[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig updated (0680a3d56d8 -> 758732a34ed)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig in repository toolchain/ci/llvm-project. from 0680a3d56d8 [Power10] Enable the heuristic for Power10 and switch the s [...] adds 6c8041aa0ff [AST][FPEnv] Keep FP options in trailing storage of CastExpr adds 0ece51c60c5 Add raw_fd_stream that supports reading/seeking/writing adds 19531a81f1d Add raw_fd_stream_test.cpp into CMakeLists.txt adds 9c651c231f3 Missing change from previous commit adds b3f364e8561 Add a header file to support ssize_t for windows adds de044f75628 Revert "[AST][FPEnv] Keep FP options in trailing storage of [...] adds 4ede83c0683 [gn build] Port 19531a81f1d adds 35dc91aee20 [X86][SSE] lowerShuffleAsDecomposedShuffleBlend - support d [...] adds 36e2e2e12ef [InstCombine] Fix incorrect SimplifyWithOpReplaced transfor [...] adds c437446d90b [ARM] Recognize "double extend" reduction patterns adds 50ee0b99ec2 [InstCombine][X86] getNegativeIsTrueBoolVec - use ConstantE [...] adds 3a8ea8609b8 [Intrinsics] define semantics for experimental fmax/fmin ve [...] adds 6cfd38d03d5 [ARM] Fixup single source mla reductions. adds d030aad7893 [InstCombine][X86] Add tests for masked load/stores with co [...] adds 78de7297abe Reland [AssumeBundles] Use operand bundles to encode alignm [...] adds 2e61cd1295e [MachineScheduler] Fix operand scheduling for pre/post-incr [...] adds a874d633440 [Clang] Add option to allow marking pass-by-value args as noalias. adds 3170d548426 [InstCombine][X86] Covert masked load/stores with (sign ext [...] adds 8ce75e2778d TableGen: change a couple of member names to clarify their use. adds 74760bb00fb [LV][ARM] Add preferInloopReduction target hook. adds 3de9e3e493b [DSE] Precommit test case with loop carried dependence. adds e082dee2b58 [DSE] Bail out on MemoryPhis when deleting stores at end of [...] adds d85ac6d577a [DSE] Adjust coroutines test after e082dee2b588. adds ad3d6f993d9 [SelectionDAG][X86][ARM][AArch64] Add ISD opcode for __buil [...] adds cc76965b190 [MinGW] Use lib prefix for libraries adds bb613044b68 [MinGW][clang-shlib] Build by default on MinGW adds 7da94193990 [MinGW][libclang] Allow simultaneous shared and static lib adds c34a99fe589 [InstCombine] Add extra use tests for abs canonicalization (NFC) adds c55c14837e1 [gcov] Clean up by getting llvm.dbg.cu earlier adds 412c9c0bf2a [gcov] emitProfileArcs: iterate over GCOVFunction's instead [...] adds 7d3825ed954 Revert "[gcov] emitProfileArcs: iterate over GCOVFunction's [...] adds e8e3693ceaa Change range operator from deprecated '-' to '...' adds 93b4f853826 Update TableGen test files to use the new '...' range punctuation. adds bdd1eba37b6 [ARM] Add additional vecreduce float legalization test (NFC) adds d6fadc49e3d [gcov] Process .gcda immediately after the accompanying .gc [...] adds 04febd30a8d [lld][WebAssembly] Error on import/export of mutable global [...] adds c2f8bc986fb [ARM] Add tests for fmin/max + inf folds (NFC) adds cc2da5554b5 [lld][WebAssembly] Add initial support for -Map/--print-map adds 70daa353e2a [gn build] Port cc2da5554b5 adds 9d300bc8d2f [Hexagon] Avoid widening vectors with non-HVX element types adds 758732a34ed [X86] Use ISD::PARITY directly instead of emitting CTPOP an [...] No new revisions were added by this update. Summary of changes: clang/include/clang/Basic/CodeGenOptions.def | 4 + clang/include/clang/Driver/Options.td | 3 + clang/lib/CodeGen/CGCall.cpp | 7 + clang/lib/CodeGen/CodeGenFunction.cpp | 36 +- clang/lib/Driver/ToolChains/WebAssembly.cpp | 21 + clang/lib/Frontend/CompilerInvocation.cpp | 2 + clang/test/CodeGen/align_value.cpp | 30 +- clang/test/CodeGen/alloc-align-attr.c | 44 +- .../assume-aligned-and-alloc-align-attributes.c | 8 +- clang/test/CodeGen/builtin-align-array.c | 32 +- clang/test/CodeGen/builtin-align.c | 24 +- clang/test/CodeGen/builtin-assume-aligned.c | 32 +- ...-assumption-attribute-align_value-on-lvalue.cpp | 8 +- ...ssumption-attribute-align_value-on-paramvar.cpp | 2 +- ...-attribute-alloc_align-on-function-variable.cpp | 10 +- ...ssumption-attribute-alloc_align-on-function.cpp | 2 +- ...ibute-assume_aligned-on-function-two-params.cpp | 10 +- ...mption-attribute-assume_aligned-on-function.cpp | 2 +- ...uiltin_assume_aligned-three-params-variable.cpp | 10 +- ...umption-builtin_assume_aligned-three-params.cpp | 10 +- ...ssumption-builtin_assume_aligned-two-params.cpp | 8 +- .../CodeGen/catch-alignment-assumption-openmp.cpp | 8 +- clang/test/CodeGen/code-coverage.c | 2 +- .../CodeGen/non-power-of-2-alignment-assumptions.c | 13 +- clang/test/CodeGen/pass-by-value-noalias.c | 16 + clang/test/CodeGenCXX/pass-by-value-noalias.cpp | 73 + clang/test/CodeGenObjC/pass-by-value-noalias.m | 22 + clang/test/Driver/wasm-toolchain.c | 11 + clang/test/OpenMP/simd_codegen.cpp | 16 - clang/test/OpenMP/simd_metadata.c | 117 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 5 +- clang/tools/CMakeLists.txt | 2 +- clang/tools/libclang/CMakeLists.txt | 4 +- lld/test/ELF/map-file.s | 2 +- lld/test/wasm/Inputs/undefined-globals.s | 4 +- lld/test/wasm/early-exit-for-bad-paths.s | 8 +- lld/test/wasm/emit-relocs-fpic.s | 4 +- lld/test/wasm/gc-imports.s | 6 +- lld/test/wasm/map-file.s | 47 + lld/test/wasm/mutable-globals.s | 13 + lld/test/wasm/pie.ll | 2 +- lld/test/wasm/shared.ll | 2 +- lld/wasm/CMakeLists.txt | 1 + lld/wasm/Config.h | 1 + lld/wasm/Driver.cpp | 7 +- lld/wasm/InputChunks.h | 4 +- lld/wasm/MapFile.cpp | 148 ++ lld/wasm/MapFile.h | 21 + lld/wasm/Options.td | 6 + lld/wasm/OutputSections.cpp | 7 +- lld/wasm/OutputSections.h | 20 +- lld/wasm/Symbols.h | 2 +- lld/wasm/Writer.cpp | 27 + lldb/source/API/CMakeLists.txt | 4 +- llvm/cmake/modules/AddLLVM.cmake | 2 +- llvm/docs/LangRef.rst | 14 +- llvm/include/llvm/Analysis/InstructionSimplify.h | 6 + llvm/include/llvm/Analysis/TargetTransformInfo.h | 10 + .../llvm/Analysis/TargetTransformInfoImpl.h | 5 + llvm/include/llvm/CodeGen/BasicTTIImpl.h | 4 - llvm/include/llvm/CodeGen/ISDOpcodes.h | 1 + llvm/include/llvm/IR/IRBuilder.h | 28 +- llvm/include/llvm/Support/raw_ostream.h | 64 +- llvm/include/llvm/TableGen/Record.h | 21 +- .../Transforms/Scalar/AlignmentFromAssumptions.h | 6 +- llvm/lib/Analysis/AssumeBundleQueries.cpp | 13 +- llvm/lib/Analysis/InstructionSimplify.cpp | 50 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 5 + llvm/lib/CodeGen/ExpandReductions.cpp | 16 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 19 + llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 26 + .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 21 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 3 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 22 +- .../CodeGen/SelectionDAG/SelectionDAGDumper.cpp | 1 + llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 9 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 1 + llvm/lib/IR/IRBuilder.cpp | 77 +- llvm/lib/IR/Verifier.cpp | 23 +- llvm/lib/Support/raw_ostream.cpp | 36 +- llvm/lib/TableGen/Record.cpp | 4 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 2 - llvm/lib/Target/AArch64/AArch64InstrFormats.td | 8 +- .../Target/AArch64/AArch64TargetTransformInfo.h | 5 - llvm/lib/Target/ARM/ARMISelLowering.cpp | 51 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 14 + llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 9 +- llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 28 +- llvm/lib/Target/Hexagon/HexagonSubtarget.h | 13 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 246 +-- llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp | 108 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 15 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 55 +- .../Transforms/Instrumentation/GCOVProfiling.cpp | 320 ++- .../Transforms/Scalar/AlignmentFromAssumptions.cpp | 121 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 10 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 10 +- llvm/test/CodeGen/AArch64/parity.ll | 161 ++ .../AArch64/vecreduce-fmax-legalization-nan.ll | 20 +- .../CodeGen/AArch64/vecreduce-fmax-legalization.ll | 2 +- llvm/test/CodeGen/ARM/fminmax-folds.ll | 256 +++ llvm/test/CodeGen/ARM/parity.ll | 162 ++ .../ARM/vecreduce-fadd-legalization-soft-float.ll | 39 + .../Generic/expand-experimental-reductions.ll | 40 +- .../autohvx/isel-widen-truncate-illegal-elem.ll | 34 + llvm/test/CodeGen/Thumb2/mve-vecreduce-fminmax.ll | 1307 +++--------- llvm/test/CodeGen/Thumb2/mve-vecreduce-loops.ll | 30 +- llvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll | 1100 +--------- llvm/test/CodeGen/Thumb2/mve-vecreduce-mlapred.ll | 2244 ++------------------ llvm/test/CodeGen/X86/parity.ll | 189 +- llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll | 348 ++- llvm/test/CodeGen/X86/vector-reduce-fmax.ll | 1088 ++++++++-- llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll | 358 +++- llvm/test/CodeGen/X86/vector-reduce-fmin.ll | 1078 ++++++++-- llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll | 12 +- llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll | 32 +- llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll | 114 +- llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll | 37 +- llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll | 10 +- llvm/test/TableGen/AllowDuplicateRegisterNames.td | 2 +- llvm/test/TableGen/BigEncoder.td | 12 +- llvm/test/TableGen/BitOffsetDecoder.td | 16 +- llvm/test/TableGen/BitsInit.td | 6 +- llvm/test/TableGen/DAGDefaultOps.td | 16 +- llvm/test/TableGen/ForeachLoop.td | 4 +- llvm/test/TableGen/HwModeEncodeDecode.td | 14 +- llvm/test/TableGen/JSON.td | 4 +- llvm/test/TableGen/ListSlices.td | 4 +- llvm/test/TableGen/UnsetBitInit.td | 4 +- llvm/test/TableGen/cond-let.td | 14 +- llvm/test/TableGen/dag-isel-regclass-emit-enum.td | 2 +- llvm/test/TableGen/defset.td | 2 +- llvm/test/TableGen/foreach-variable-range.td | 32 +- llvm/test/TableGen/if.td | 12 +- llvm/test/TableGen/ifstmt.td | 6 +- llvm/test/TableGen/list-element-bitref.td | 4 +- llvm/test/TableGen/range-lists.td | 3 +- llvm/test/TableGen/simplify-patfrag.td | 2 +- llvm/test/TableGen/trydecode-emission3.td | 4 +- .../Transforms/AlignmentFromAssumptions/simple.ll | 75 +- .../AlignmentFromAssumptions/simple32.ll | 114 +- llvm/test/Transforms/Coroutines/ArgAddr.ll | 9 +- .../MSSA/multiblock-loop-carried-dependence.ll | 143 ++ .../MSSA/multiblock-malloc-free.ll | 1 + .../MSSA/multiblock-memintrinsics.ll | 18 + llvm/test/Transforms/Inline/align.ll | 15 +- llvm/test/Transforms/Inline/byref-align.ll | 9 +- .../InstCombine/X86/x86-masked-memops.ll | 107 +- llvm/test/Transforms/InstCombine/abs-1.ll | 103 +- llvm/test/Transforms/InstCombine/assume.ll | 1 + llvm/test/Transforms/InstCombine/select.ll | 7 +- .../LoopVectorize/ARM/mve-reduction-types.ll | 42 +- .../Transforms/LoopVectorize/ARM/mve-reductions.ll | 168 +- .../inlining-alignment-assumptions.ll | 27 +- llvm/test/Verifier/assume-bundles.ll | 16 +- llvm/test/tools/llvm-mca/AArch64/Exynos/load.s | 10 +- llvm/tools/llvm-config/llvm-config.cpp | 1 + .../unittests/Analysis/AssumeBundleQueriesTest.cpp | 38 + llvm/unittests/Support/CMakeLists.txt | 1 + llvm/unittests/Support/raw_fd_stream_test.cpp | 67 + llvm/utils/gn/secondary/lld/wasm/BUILD.gn | 1 + .../gn/secondary/llvm/unittests/Support/BUILD.gn | 1 + 162 files changed, 6076 insertions(+), 6154 deletions(-) create mode 100644 clang/test/CodeGen/pass-by-value-noalias.c create mode 100644 clang/test/CodeGenCXX/pass-by-value-noalias.cpp create mode 100644 clang/test/CodeGenObjC/pass-by-value-noalias.m create mode 100644 lld/test/wasm/map-file.s create mode 100644 lld/test/wasm/mutable-globals.s create mode 100644 lld/wasm/MapFile.cpp create mode 100644 lld/wasm/MapFile.h create mode 100644 llvm/test/CodeGen/AArch64/parity.ll create mode 100644 llvm/test/CodeGen/ARM/parity.ll create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/isel-widen-truncate-illegal-elem.ll create mode 100644 llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-loop- [...] create mode 100644 llvm/unittests/Support/raw_fd_stream_test.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig updated (4dd5cda9 -> 378fc2ba)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig in repository toolchain/ci/base-artifacts. discards 4dd5cda9 0: update: llvm-linux: 19028 new 378fc2ba 0: update: llvm-linux: 19028 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4dd5cda9) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 13365 +++++++++++++------------- 03-build_linux/console.log | 1646 ++-- 05-check_regression/console.log | 14 +- 05-check_regression/results.regressions | 12 +- 06-update_baseline/console.log | 20 +- 06-update_baseline/results.regressions | 12 +- console.log | 15265 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- 9 files changed, 15284 insertions(+), 15282 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu/gnu-release-arm-bootstrap_debug updated (10f5c90ea56 -> f71ca5cab1b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-arm-bootstrap_debug in repository toolchain/ci/gcc. from 10f5c90ea56 Daily bump. adds 0679082b1db Adjust email address adds b3a51b99dbb Fix crash on array component with nonstandard index type adds 6d06c17e9f4 libstdc++: Fix is_trivially_constructible (PR 94033) adds 1102a2c1fd2 tree-optimization/95717 - fix SSA update for vectorizer epilogue adds 5024ea60b74 tree-optimization/95133 - avoid abnormal edges in path splitting adds 0c7ae564f42 tree-optimization/95049 - fix not terminating RPO VN iteration adds 95a8572ce7b middle-end/94964 - avoid EH loop entry with CP_SIMPLE_PREHEADERS adds 0bcf016768f ipa/94947 - fix test for externally visible variables for IPA PTA adds 7cfb86a2a18 ipa/94947 - avoid using externally_visible_p () adds d8eb8abfb8c Daily bump. adds f71ca5cab1b Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 58 ++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 10 +++- gcc/ada/gcc-interface/decl.c | 12 ++--- gcc/cfgloopmanip.c | 5 +- gcc/gimple-ssa-split-paths.c | 10 +++- gcc/testsuite/ChangeLog | 39 ++++++++++++++- gcc/testsuite/g++.dg/torture/pr95717.C | 12 +++++ gcc/testsuite/gcc.dg/pr95133.c | 14 ++++++ gcc/testsuite/gcc.dg/torture/pr94947-1.c | 23 +++++++++ gcc/testsuite/gcc.dg/torture/pr94947-2.c | 7 +++ gcc/testsuite/gcc.dg/torture/pr95049.c | 7 +++ gcc/testsuite/gnat.dg/specs/discr7.ads | 14 ++++++ gcc/tree-ssa-sccvn.c | 27 ++++++++-- gcc/tree-ssa-structalias.c | 14 ++++-- gcc/tree-vect-loop-manip.c | 8 +-- libstdc++-v3/ChangeLog | 19 +++++++ libstdc++-v3/include/std/type_traits | 57 ++++++++++----------- .../20_util/is_nothrow_constructible/94003.cc | 46 +++++++++++++++++ .../is_nothrow_default_constructible/96999.cc | 54 ++++++++++++++++++++ 20 files changed, 378 insertions(+), 60 deletions(-) create mode 100644 gcc/testsuite/g++.dg/torture/pr95717.C create mode 100644 gcc/testsuite/gcc.dg/pr95133.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr94947-1.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr94947-2.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr95049.c create mode 100644 gcc/testsuite/gnat.dg/specs/discr7.ads create mode 100644 libstdc++-v3/testsuite/20_util/is_nothrow_constructible/94003.cc create mode 100644 libstdc++-v3/testsuite/20_util/is_nothrow_default_constructible [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-release-arm-bootstrap_debug updated (08b6eefb -> 1821cb2e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-arm-bootstrap_debug in repository toolchain/ci/base-artifacts. discards 08b6eefb 0: update: gcc-10f5c90ea5640dc6a51cae2f178e119fff7d6d51: 1 new 1821cb2e 0: update: gcc-f71ca5cab1b7acb0f671f33211c2258343cca53d: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (08b6eefb) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-release-arm-boot [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 408 +- 04-build_abe-bootstrap_debug/console.log | 87682 ++++++++++++++-------------- 05-check_regression/console.log | 6 +- 06-update_baseline/console.log | 4 +- console.log | 88216 ++++++++++++++--------------- jenkins/manifest.sh | 10 +- 7 files changed, 88215 insertions(+), 88239 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allnoconfig updated (67957f12548c -> a87f96283793)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allnoconfig in repository toolchain/ci/linux. from 67957f12548c Linux 4.19.144 adds 9244e838ac0d ALSA; firewire-tascam: exclude Tascam FE-8 from detection adds 732fd460bb72 block: ensure bdi->io_pages is always initialized adds a3a5cb677674 netlabel: fix problems with mapping removal adds d2ece46d1004 net: usb: dm9601: Add USB ID of Keenetic Plus DSL adds 84cfc87866b7 sctp: not disable bh in the whole sctp_get_port_local() adds 553d1bb7f4d1 tipc: fix shutdown() of connectionless socket adds 9f313bcb3b3d net: disable netpoll on fresh napis adds 044be307e550 net/mlx5e: Don't support phys switch id if not in switchdev mode adds a87f96283793 Linux 4.19.145 No new revisions were added by this update. Summary of changes: Makefile | 2 +- block/blk-core.c | 2 + drivers/net/ethernet/mellanox/mlx5/core/en_rep.c | 2 +- drivers/net/usb/dm9601.c | 4 ++ net/core/dev.c | 3 +- net/core/netpoll.c | 2 +- net/netlabel/netlabel_domainhash.c | 59 ++++++++++++------------ net/sctp/socket.c | 16 +++---- net/tipc/socket.c | 9 ++-- sound/firewire/tascam/tascam.c | 30 +++++++++++- 10 files changed, 82 insertions(+), 47 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allnoconfig updated (0390b7f1 -> e940f1a7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 0390b7f1 0: update: llvm-linux: boot new e940f1a7 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (0390b7f1) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 162 +- 02-build_llvm/console.log | 12640 +++++++++++++++++------------------ 03-build_linux/console.log | 878 +-- 05-check_regression/console.log | 12 +- 06-update_baseline/console.log | 18 +- console.log | 13710 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 7 files changed, 13716 insertions(+), 13712 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allyesconfig updated (67957f12548c -> a87f96283793)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allyesconfig in repository toolchain/ci/linux. from 67957f12548c Linux 4.19.144 adds 9244e838ac0d ALSA; firewire-tascam: exclude Tascam FE-8 from detection adds 732fd460bb72 block: ensure bdi->io_pages is always initialized adds a3a5cb677674 netlabel: fix problems with mapping removal adds d2ece46d1004 net: usb: dm9601: Add USB ID of Keenetic Plus DSL adds 84cfc87866b7 sctp: not disable bh in the whole sctp_get_port_local() adds 553d1bb7f4d1 tipc: fix shutdown() of connectionless socket adds 9f313bcb3b3d net: disable netpoll on fresh napis adds 044be307e550 net/mlx5e: Don't support phys switch id if not in switchdev mode adds a87f96283793 Linux 4.19.145 No new revisions were added by this update. Summary of changes: Makefile | 2 +- block/blk-core.c | 2 + drivers/net/ethernet/mellanox/mlx5/core/en_rep.c | 2 +- drivers/net/usb/dm9601.c | 4 ++ net/core/dev.c | 3 +- net/core/netpoll.c | 2 +- net/netlabel/netlabel_domainhash.c | 59 ++++++++++++------------ net/sctp/socket.c | 16 +++---- net/tipc/socket.c | 9 ++-- sound/firewire/tascam/tascam.c | 30 +++++++++++- 10 files changed, 82 insertions(+), 47 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig updated (6ffabce36fc8 -> 6c3d34dea2fc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig in repository toolchain/ci/linux. from 6ffabce36fc8 Linux 5.4.64 adds 263e463358d3 ipv4: Silence suspicious RCU usage warning adds 3f73dbf94f8f ipv6: Fix sysctl max for fib_multipath_hash_policy adds 346fefa82325 netlabel: fix problems with mapping removal adds 8b61bb0b2d57 net: usb: dm9601: Add USB ID of Keenetic Plus DSL adds 20f8c874789a sctp: not disable bh in the whole sctp_get_port_local() adds b95eb482c288 taprio: Fix using wrong queues in gate mask adds 09c45065257b tipc: fix shutdown() of connectionless socket adds ddb279d64b72 net: disable netpoll on fresh napis adds 6c3d34dea2fc Linux 5.4.65 No new revisions were added by this update. Summary of changes: Makefile | 2 +- drivers/net/usb/dm9601.c | 4 +++ net/core/dev.c | 3 +- net/core/netpoll.c | 2 +- net/ipv4/fib_trie.c | 3 +- net/ipv6/sysctl_net_ipv6.c | 3 +- net/netlabel/netlabel_domainhash.c | 59 +++++++++++++++++++------------------- net/sched/sch_taprio.c | 30 +++++++++++++++---- net/sctp/socket.c | 16 ++++------- net/tipc/socket.c | 9 ++++-- 10 files changed, 78 insertions(+), 53 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig updated (0680a3d56d8 -> 758732a34ed)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig in repository toolchain/ci/llvm-project. from 0680a3d56d8 [Power10] Enable the heuristic for Power10 and switch the s [...] adds 6c8041aa0ff [AST][FPEnv] Keep FP options in trailing storage of CastExpr adds 0ece51c60c5 Add raw_fd_stream that supports reading/seeking/writing adds 19531a81f1d Add raw_fd_stream_test.cpp into CMakeLists.txt adds 9c651c231f3 Missing change from previous commit adds b3f364e8561 Add a header file to support ssize_t for windows adds de044f75628 Revert "[AST][FPEnv] Keep FP options in trailing storage of [...] adds 4ede83c0683 [gn build] Port 19531a81f1d adds 35dc91aee20 [X86][SSE] lowerShuffleAsDecomposedShuffleBlend - support d [...] adds 36e2e2e12ef [InstCombine] Fix incorrect SimplifyWithOpReplaced transfor [...] adds c437446d90b [ARM] Recognize "double extend" reduction patterns adds 50ee0b99ec2 [InstCombine][X86] getNegativeIsTrueBoolVec - use ConstantE [...] adds 3a8ea8609b8 [Intrinsics] define semantics for experimental fmax/fmin ve [...] adds 6cfd38d03d5 [ARM] Fixup single source mla reductions. adds d030aad7893 [InstCombine][X86] Add tests for masked load/stores with co [...] adds 78de7297abe Reland [AssumeBundles] Use operand bundles to encode alignm [...] adds 2e61cd1295e [MachineScheduler] Fix operand scheduling for pre/post-incr [...] adds a874d633440 [Clang] Add option to allow marking pass-by-value args as noalias. adds 3170d548426 [InstCombine][X86] Covert masked load/stores with (sign ext [...] adds 8ce75e2778d TableGen: change a couple of member names to clarify their use. adds 74760bb00fb [LV][ARM] Add preferInloopReduction target hook. adds 3de9e3e493b [DSE] Precommit test case with loop carried dependence. adds e082dee2b58 [DSE] Bail out on MemoryPhis when deleting stores at end of [...] adds d85ac6d577a [DSE] Adjust coroutines test after e082dee2b588. adds ad3d6f993d9 [SelectionDAG][X86][ARM][AArch64] Add ISD opcode for __buil [...] adds cc76965b190 [MinGW] Use lib prefix for libraries adds bb613044b68 [MinGW][clang-shlib] Build by default on MinGW adds 7da94193990 [MinGW][libclang] Allow simultaneous shared and static lib adds c34a99fe589 [InstCombine] Add extra use tests for abs canonicalization (NFC) adds c55c14837e1 [gcov] Clean up by getting llvm.dbg.cu earlier adds 412c9c0bf2a [gcov] emitProfileArcs: iterate over GCOVFunction's instead [...] adds 7d3825ed954 Revert "[gcov] emitProfileArcs: iterate over GCOVFunction's [...] adds e8e3693ceaa Change range operator from deprecated '-' to '...' adds 93b4f853826 Update TableGen test files to use the new '...' range punctuation. adds bdd1eba37b6 [ARM] Add additional vecreduce float legalization test (NFC) adds d6fadc49e3d [gcov] Process .gcda immediately after the accompanying .gc [...] adds 04febd30a8d [lld][WebAssembly] Error on import/export of mutable global [...] adds c2f8bc986fb [ARM] Add tests for fmin/max + inf folds (NFC) adds cc2da5554b5 [lld][WebAssembly] Add initial support for -Map/--print-map adds 70daa353e2a [gn build] Port cc2da5554b5 adds 9d300bc8d2f [Hexagon] Avoid widening vectors with non-HVX element types new 758732a34ed [X86] Use ISD::PARITY directly instead of emitting CTPOP an [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang/include/clang/Basic/CodeGenOptions.def | 4 + clang/include/clang/Driver/Options.td | 3 + clang/lib/CodeGen/CGCall.cpp | 7 + clang/lib/CodeGen/CodeGenFunction.cpp | 36 +- clang/lib/Driver/ToolChains/WebAssembly.cpp | 21 + clang/lib/Frontend/CompilerInvocation.cpp | 2 + clang/test/CodeGen/align_value.cpp | 30 +- clang/test/CodeGen/alloc-align-attr.c | 44 +- .../assume-aligned-and-alloc-align-attributes.c | 8 +- clang/test/CodeGen/builtin-align-array.c | 32 +- clang/test/CodeGen/builtin-align.c | 24 +- clang/test/CodeGen/builtin-assume-aligned.c | 32 +- ...-assumption-attribute-align_value-on-lvalue.cpp | 8 +- ...ssumption-attribute-align_value-on-paramvar.cpp | 2 +- ...-attribute-alloc_align-on-function-variable.cpp | 10 +- ...ssumption-attribute-alloc_align-on-function.cpp | 2 +- ...ibute-assume_aligned-on-function-two-params.cpp | 10 +- ...mption-attribute-assume_aligned-on-function.cpp | 2 +- ...uiltin_assume_aligned-three-params-variable.cpp | 10 +- ...umption-builtin_assume_aligned-three-params.cpp | 10 +- ...ssumption-builtin_assume_aligned-two-params.cpp | 8 +- .../CodeGen/catch-alignment-assumption-openmp.cpp | 8 +- clang/test/CodeGen/code-coverage.c | 2 +- .../CodeGen/non-power-of-2-alignment-assumptions.c | 13 +- clang/test/CodeGen/pass-by-value-noalias.c | 16 + clang/test/CodeGenCXX/pass-by-value-noalias.cpp | 73 + clang/test/CodeGenObjC/pass-by-value-noalias.m | 22 + clang/test/Driver/wasm-toolchain.c | 11 + clang/test/OpenMP/simd_codegen.cpp | 16 - clang/test/OpenMP/simd_metadata.c | 117 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 5 +- clang/tools/CMakeLists.txt | 2 +- clang/tools/libclang/CMakeLists.txt | 4 +- lld/test/ELF/map-file.s | 2 +- lld/test/wasm/Inputs/undefined-globals.s | 4 +- lld/test/wasm/early-exit-for-bad-paths.s | 8 +- lld/test/wasm/emit-relocs-fpic.s | 4 +- lld/test/wasm/gc-imports.s | 6 +- lld/test/wasm/map-file.s | 47 + lld/test/wasm/mutable-globals.s | 13 + lld/test/wasm/pie.ll | 2 +- lld/test/wasm/shared.ll | 2 +- lld/wasm/CMakeLists.txt | 1 + lld/wasm/Config.h | 1 + lld/wasm/Driver.cpp | 7 +- lld/wasm/InputChunks.h | 4 +- lld/wasm/MapFile.cpp | 148 ++ lld/wasm/MapFile.h | 21 + lld/wasm/Options.td | 6 + lld/wasm/OutputSections.cpp | 7 +- lld/wasm/OutputSections.h | 20 +- lld/wasm/Symbols.h | 2 +- lld/wasm/Writer.cpp | 27 + lldb/source/API/CMakeLists.txt | 4 +- llvm/cmake/modules/AddLLVM.cmake | 2 +- llvm/docs/LangRef.rst | 14 +- llvm/include/llvm/Analysis/InstructionSimplify.h | 6 + llvm/include/llvm/Analysis/TargetTransformInfo.h | 10 + .../llvm/Analysis/TargetTransformInfoImpl.h | 5 + llvm/include/llvm/CodeGen/BasicTTIImpl.h | 4 - llvm/include/llvm/CodeGen/ISDOpcodes.h | 1 + llvm/include/llvm/IR/IRBuilder.h | 28 +- llvm/include/llvm/Support/raw_ostream.h | 64 +- llvm/include/llvm/TableGen/Record.h | 21 +- .../Transforms/Scalar/AlignmentFromAssumptions.h | 6 +- llvm/lib/Analysis/AssumeBundleQueries.cpp | 13 +- llvm/lib/Analysis/InstructionSimplify.cpp | 50 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 5 + llvm/lib/CodeGen/ExpandReductions.cpp | 16 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 19 + llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 26 + .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 21 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 3 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 22 +- .../CodeGen/SelectionDAG/SelectionDAGDumper.cpp | 1 + llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 9 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 1 + llvm/lib/IR/IRBuilder.cpp | 77 +- llvm/lib/IR/Verifier.cpp | 23 +- llvm/lib/Support/raw_ostream.cpp | 36 +- llvm/lib/TableGen/Record.cpp | 4 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 2 - llvm/lib/Target/AArch64/AArch64InstrFormats.td | 8 +- .../Target/AArch64/AArch64TargetTransformInfo.h | 5 - llvm/lib/Target/ARM/ARMISelLowering.cpp | 51 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 14 + llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 9 +- llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 28 +- llvm/lib/Target/Hexagon/HexagonSubtarget.h | 13 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 246 +-- llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp | 108 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 15 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 55 +- .../Transforms/Instrumentation/GCOVProfiling.cpp | 320 ++- .../Transforms/Scalar/AlignmentFromAssumptions.cpp | 121 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 10 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 10 +- llvm/test/CodeGen/AArch64/parity.ll | 161 ++ .../AArch64/vecreduce-fmax-legalization-nan.ll | 20 +- .../CodeGen/AArch64/vecreduce-fmax-legalization.ll | 2 +- llvm/test/CodeGen/ARM/fminmax-folds.ll | 256 +++ llvm/test/CodeGen/ARM/parity.ll | 162 ++ .../ARM/vecreduce-fadd-legalization-soft-float.ll | 39 + .../Generic/expand-experimental-reductions.ll | 40 +- .../autohvx/isel-widen-truncate-illegal-elem.ll | 34 + llvm/test/CodeGen/Thumb2/mve-vecreduce-fminmax.ll | 1307 +++--------- llvm/test/CodeGen/Thumb2/mve-vecreduce-loops.ll | 30 +- llvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll | 1100 +--------- llvm/test/CodeGen/Thumb2/mve-vecreduce-mlapred.ll | 2244 ++------------------ llvm/test/CodeGen/X86/parity.ll | 189 +- llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll | 348 ++- llvm/test/CodeGen/X86/vector-reduce-fmax.ll | 1088 ++++++++-- llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll | 358 +++- llvm/test/CodeGen/X86/vector-reduce-fmin.ll | 1078 ++++++++-- llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll | 12 +- llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll | 32 +- llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll | 114 +- llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll | 37 +- llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll | 10 +- llvm/test/TableGen/AllowDuplicateRegisterNames.td | 2 +- llvm/test/TableGen/BigEncoder.td | 12 +- llvm/test/TableGen/BitOffsetDecoder.td | 16 +- llvm/test/TableGen/BitsInit.td | 6 +- llvm/test/TableGen/DAGDefaultOps.td | 16 +- llvm/test/TableGen/ForeachLoop.td | 4 +- llvm/test/TableGen/HwModeEncodeDecode.td | 14 +- llvm/test/TableGen/JSON.td | 4 +- llvm/test/TableGen/ListSlices.td | 4 +- llvm/test/TableGen/UnsetBitInit.td | 4 +- llvm/test/TableGen/cond-let.td | 14 +- llvm/test/TableGen/dag-isel-regclass-emit-enum.td | 2 +- llvm/test/TableGen/defset.td | 2 +- llvm/test/TableGen/foreach-variable-range.td | 32 +- llvm/test/TableGen/if.td | 12 +- llvm/test/TableGen/ifstmt.td | 6 +- llvm/test/TableGen/list-element-bitref.td | 4 +- llvm/test/TableGen/range-lists.td | 3 +- llvm/test/TableGen/simplify-patfrag.td | 2 +- llvm/test/TableGen/trydecode-emission3.td | 4 +- .../Transforms/AlignmentFromAssumptions/simple.ll | 75 +- .../AlignmentFromAssumptions/simple32.ll | 114 +- llvm/test/Transforms/Coroutines/ArgAddr.ll | 9 +- .../MSSA/multiblock-loop-carried-dependence.ll | 143 ++ .../MSSA/multiblock-malloc-free.ll | 1 + .../MSSA/multiblock-memintrinsics.ll | 18 + llvm/test/Transforms/Inline/align.ll | 15 +- llvm/test/Transforms/Inline/byref-align.ll | 9 +- .../InstCombine/X86/x86-masked-memops.ll | 107 +- llvm/test/Transforms/InstCombine/abs-1.ll | 103 +- llvm/test/Transforms/InstCombine/assume.ll | 1 + llvm/test/Transforms/InstCombine/select.ll | 7 +- .../LoopVectorize/ARM/mve-reduction-types.ll | 42 +- .../Transforms/LoopVectorize/ARM/mve-reductions.ll | 168 +- .../inlining-alignment-assumptions.ll | 27 +- llvm/test/Verifier/assume-bundles.ll | 16 +- llvm/test/tools/llvm-mca/AArch64/Exynos/load.s | 10 +- llvm/tools/llvm-config/llvm-config.cpp | 1 + .../unittests/Analysis/AssumeBundleQueriesTest.cpp | 38 + llvm/unittests/Support/CMakeLists.txt | 1 + llvm/unittests/Support/raw_fd_stream_test.cpp | 67 + llvm/utils/gn/secondary/lld/wasm/BUILD.gn | 1 + .../gn/secondary/llvm/unittests/Support/BUILD.gn | 1 + 162 files changed, 6076 insertions(+), 6154 deletions(-) create mode 100644 clang/test/CodeGen/pass-by-value-noalias.c create mode 100644 clang/test/CodeGenCXX/pass-by-value-noalias.cpp create mode 100644 clang/test/CodeGenObjC/pass-by-value-noalias.m create mode 100644 lld/test/wasm/map-file.s create mode 100644 lld/test/wasm/mutable-globals.s create mode 100644 lld/wasm/MapFile.cpp create mode 100644 lld/wasm/MapFile.h create mode 100644 llvm/test/CodeGen/AArch64/parity.ll create mode 100644 llvm/test/CodeGen/ARM/parity.ll create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/isel-widen-truncate-illegal-elem.ll create mode 100644 llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-loop- [...] create mode 100644 llvm/unittests/Support/raw_fd_stream_test.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig updated (0b76c558 -> 9d85be2b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards 0b76c558 0: update: llvm-linux: 18073 new 9d85be2b 0: update: llvm-linux: 18073 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (0b76c558) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 66 +- 02-build_llvm/console.log | 13297 +++++++++++++------------- 03-build_linux/console.log | 1776 ++-- 05-check_regression/console.log | 10 +- 05-check_regression/results.regressions | 12 +- 06-update_baseline/console.log | 6 +- 06-update_baseline/results.regressions | 12 +- console.log | 15190 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- 9 files changed, 15173 insertions(+), 15208 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

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