Tcwg-commits September 2020

tcwg-commits@lists.linaro.org

5 participants
8166 discussions

[binutils-gdb] branch binutils-2_35-branch updated (23f268a0235 -> 104bfd990c4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch binutils-2_35-branch in repository binutils-gdb. from 23f268a0235 Add support to the assembler for a ".nop" directive which i [...] new 104bfd990c4 Automatic date update in version.in The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-defconfig updated (856deb866d16 -> fc4f28bb3daf)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-defconfig in repository toolchain/ci/linux. from 856deb866d16 Linux 5.9-rc5 adds 50145474f6ef fbcon: remove soft scrollback code adds 06a0df4d1b8b fbcon: remove now unusued 'softback_lines' cursor() argument adds 973c096f6a85 vgacon: remove software scrollback support adds 1c78544eaa46 btrfs: fix wrong address when faulting in pages in the sea [...] adds fc4f28bb3daf Merge tag 'for-5.9-rc5-tag' of git://git.kernel.org/pub/sc [...] No new revisions were added by this update. Summary of changes: arch/powerpc/configs/pasemi_defconfig | 1 - arch/powerpc/configs/ppc6xx_defconfig | 1 - arch/x86/configs/i386_defconfig | 1 - arch/x86/configs/x86_64_defconfig | 1 - drivers/video/console/Kconfig | 46 ----- drivers/video/console/vgacon.c | 221 +--------------------- drivers/video/fbdev/core/bitblit.c | 11 +- drivers/video/fbdev/core/fbcon.c | 334 +--------------------------------- drivers/video/fbdev/core/fbcon.h | 2 +- drivers/video/fbdev/core/fbcon_ccw.c | 11 +- drivers/video/fbdev/core/fbcon_cw.c | 11 +- drivers/video/fbdev/core/fbcon_ud.c | 11 +- drivers/video/fbdev/core/tileblit.c | 2 +- fs/btrfs/ioctl.c | 3 +- 14 files changed, 13 insertions(+), 643 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-defconfig updated (016c657d -> b02be901)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-defconfig in repository toolchain/ci/base-artifacts. discards 016c657d 0: update: llvm-linux: boot new b02be901 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (016c657d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 28 +- 02-build_llvm/console.log | 12676 +++++++++++++++++----------------- 03-build_linux/console.log | 650 +- 04-boot_linux/console.log | 494 +- 05-check_regression/console.log | 16 +- 06-update_baseline/console.log | 12 +- console.log | 13876 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 13880 insertions(+), 13880 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allyesconfig updated (3c035affb6f -> 04a9b796436)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allyesconfig in repository toolchain/ci/gcc. from 3c035affb6f Daily bump. adds ce74ad2f0f2 Daily bump. adds d0a094ce39f i386: Fix up vector mul and div with broadcasts in -masm=in [...] adds 04a9b796436 [PATCH, rs6000] Fix vector long long subtype (PR96139) No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- gcc/config/i386/sse.md | 4 ++-- gcc/config/rs6000/rs6000.c | 4 ++-- gcc/testsuite/gcc.target/i386/avx512f-pr97028.c | 18 ++++++++++++++ gcc/testsuite/gcc.target/powerpc/pr96139-a.c | 32 +++++++++++++++++++++++++ gcc/testsuite/gcc.target/powerpc/pr96139-b.c | 32 +++++++++++++++++++++++++ gcc/testsuite/gcc.target/powerpc/pr96139-c.c | 26 ++++++++++++++++++++ 7 files changed, 113 insertions(+), 5 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-pr97028.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr96139-a.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr96139-b.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr96139-c.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allyesconfig updated (fea13863 -> 4858db1b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards fea13863 0: update: binutils-gcc-linux: all new 4858db1b 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (fea13863) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 436 +- 03-build_abe-binutils/console.log | 11404 +++++------ 04-build_abe-stage1/console.log | 18091 ++++++++--------- 05-build_linux/console.log | 866 +- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 6 +- 07-check_regression/results.regressions | 2 +- 08-update_baseline/console.log | 6 +- 08-update_baseline/results.regressions | 2 +- console.log | 30939 +++++++++++++++--------------- jenkins/manifest.sh | 8 +- 12 files changed, 30974 insertions(+), 30916 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allmodconfig updated (368edddb -> f3f229a0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allmodconfig in repository toolchain/ci/base-artifacts. discards 368edddb 4: update: binutils-gcc: 19871 new f3f229a0 4: update: linux-6c3d34dea2fc9b02c4419af4e368e8b73f566c88: 19871 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (368edddb) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-st [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 129 +- 02-prepare_abe/console.log | 440 +- 03-build_abe-binutils/console.log | 11533 +++++----- 04-build_abe-stage1/console.log | 20607 +++++++++--------- 05-build_linux/console.log | 1328 +- 07-check_regression/console.log | 34 +- 07-check_regression/results.regressions | 8 +- 08-update_baseline/console.log | 132 +- 08-update_baseline/results.regressions | 8 +- console.log | 34203 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- 11 files changed, 33837 insertions(+), 34597 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_O1 updated (2fd157813c4 -> 1b9bdd52037)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_O1 in repository toolchain/ci/gcc. from 2fd157813c4 Improve costs for DImode shifts of interger constants. adds 919858077f4 Daily bump. adds 4ac7b669580 [libgomp, nvptx] Add __sync_compare_and_swap_16 adds ba948b37768 options: Save and restore opts_set for Optimization and Tar [...] adds 02321f62f8d libgccjit: Regenerate documentation for new entry point. adds d106029c2aa arm: Fix up gcc.target/arm/lto/pr96939_* FAIL adds 863e8d53eb2 Rename mffgpr/mftgpr insn types and remove Power6 references. adds a7d8dcdf2f3 Fix dangling references in thunks at -O0 adds 35e3f0829d8 analyzer: fix ICE on setjmp with non-pointer-type [PR97029] adds 00adddd6568 analyzer: add regression test for leak false positive adds 799dd4e1004 analyzer: fix constraint explosion on many-cased switch [PR96653] adds 05ab8befe12 analyzer: add -param=analyzer-max-constraints= adds e9fdb9a7324 c++: local externs in templates do not get template head adds 0a3e6e975ab Darwin, X86, testsuite: Fix pr87767 tests for Darwin. adds 5bcc0fa05ef bpf: use the expected instruction for NOPs adds cd6743e9c41 c++: Use VAR_OR_FUNCTION_DECL_P. adds 05f40bc4c11 libbacktrace: support MiniDebugInfo adds 0620f4d79e2 doc: fix spelling of -fprofile-reproducibility adds 50a71cd0182 Daily bump. adds f9d2def0164 tree-optimization/94234 - Fold plusminus_mult expr with mul [...] adds 972da557463 OpenMP/Fortran: Fix (re)mapping of allocatable/pointer arra [...] adds 0f079e104a8 i386: Fix up vector mul and div with broadcasts in -masm=in [...] adds ecc3135a4a2 Retune mask <->integer cost for non-AVX512 micro-architecture. adds 80297f89775 arm: Fix testisms introduced with fix for pr target/95646 adds c9de716a59c Allow more BB vectorization adds bab58138168 bb-reorder: Fix for ICEs caused by 69ca5f3a9882 adds 9e89fa0e2d7 gcc.target/i386/pr78904-4a.c: Compile with -mtune=generic adds 8f0d743c2de tree-optimization/94234 - add plusminus-with-convert pattern adds 3304888c252 c++: Partially revert: local externs in templates do not ge [...] adds d876184c095 make swap argument of vect_get_and_check_slp_defs readonly adds d1a31689a73 rtlanal: fix subreg handling in set_noop_p () adds 1b9bdd52037 libgomp/target.c: Silence -Wuninitialized warning No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 173 ++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 5 + gcc/ada/gcc-interface/trans.c | 3 +- gcc/analyzer/ChangeLog | 22 + gcc/analyzer/analyzer.cc | 4 +- gcc/analyzer/analyzer.opt | 4 + gcc/analyzer/constraint-manager.cc | 36 +- gcc/analyzer/region-model.cc | 2 + gcc/bb-reorder.c | 4 + gcc/c-family/ChangeLog | 12 + gcc/c-family/c-attribs.c | 9 +- gcc/c-family/c-pragma.c | 13 +- gcc/cgraphunit.c | 6 +- gcc/config/aarch64/aarch64-c.c | 4 +- gcc/config/aarch64/aarch64.c | 36 +- gcc/config/arm/arm-c.c | 4 +- gcc/config/arm/arm.c | 53 +- gcc/config/arm/arm.opt | 15 +- gcc/config/bpf/bpf.md | 7 +- gcc/config/csky/csky.c | 4 +- gcc/config/gcn/gcn.c | 10 +- gcc/config/i386/i386-builtins.c | 6 +- gcc/config/i386/i386-c.c | 7 +- gcc/config/i386/i386-options.c | 30 +- gcc/config/i386/i386-options.h | 4 +- gcc/config/i386/sse.md | 4 +- gcc/config/i386/x86-tune-costs.h | 88 +- gcc/config/nios2/nios2.c | 27 +- gcc/config/pru/pru.c | 6 +- gcc/config/rs6000/power10.md | 8 +- gcc/config/rs6000/power6.md | 21 - gcc/config/rs6000/power8.md | 8 +- gcc/config/rs6000/power9.md | 8 +- gcc/config/rs6000/rs6000.c | 49 +- gcc/config/rs6000/rs6000.md | 42 +- gcc/config/rs6000/vsx.md | 8 +- gcc/config/s390/s390-c.c | 7 +- gcc/config/s390/s390.c | 26 +- gcc/cp/ChangeLog | 12 + gcc/cp/cp-gimplify.c | 2 +- gcc/cp/cp-tree.h | 2 +- gcc/cp/pt.c | 50 +- gcc/cp/semantics.c | 4 +- gcc/doc/invoke.texi | 9 +- gcc/doc/tm.texi | 4 +- gcc/fortran/trans-openmp.c | 31 +- gcc/fortran/trans.h | 2 +- gcc/function.c | 15 +- gcc/genmatch.c | 10 +- gcc/gimplify.c | 25 +- gcc/go/ChangeLog | 6 + gcc/go/go-gcc.cc | 8 +- gcc/ipa-inline-transform.c | 10 +- gcc/jit/ChangeLog | 4 + gcc/jit/docs/_build/texinfo/libgccjit.texi | 1080 +++++++------ gcc/langhooks-def.h | 2 +- gcc/langhooks.c | 2 +- gcc/langhooks.h | 2 +- gcc/match.pd | 37 +- gcc/omp-low.c | 1 + gcc/opt-read.awk | 1 + gcc/optc-save-gen.awk | 370 ++++- gcc/opth-gen.awk | 19 +- gcc/rtlanal.c | 4 + gcc/target-globals.c | 4 +- gcc/target.def | 6 +- gcc/testsuite/ChangeLog | 37 + gcc/testsuite/gcc.dg/analyzer/pr96653.c | 1105 +++++++++++++ gcc/testsuite/gcc.dg/analyzer/pr97029.c | 7 + gcc/testsuite/gcc.dg/analyzer/rhbz1878600.c | 34 + gcc/testsuite/gcc.dg/pr94234-2.c | 39 + gcc/testsuite/gcc.dg/pr94234-3.c | 42 + gcc/testsuite/gcc.dg/vect/bb-slp-48.c | 55 + gcc/testsuite/gcc.dg/vect/bb-slp-7.c | 3 +- gcc/testsuite/gcc.target/arm/pr95646.c | 11 +- gcc/testsuite/gcc.target/bpf/nop-1.c | 14 + .../gcc.target/i386/avx512f-broadcast-pr87767-1.c | 1 + .../gcc.target/i386/avx512f-broadcast-pr87767-3.c | 1 + .../gcc.target/i386/avx512f-broadcast-pr87767-5.c | 1 + .../gcc.target/i386/avx512f-broadcast-pr87767-6.c | 2 +- .../gcc.target/i386/avx512f-broadcast-pr87767-7.c | 1 + gcc/testsuite/gcc.target/i386/avx512f-pr97028.c | 18 + .../gcc.target/i386/avx512vl-broadcast-pr87767-1.c | 1 + .../gcc.target/i386/avx512vl-broadcast-pr87767-3.c | 1 + .../gcc.target/i386/avx512vl-broadcast-pr87767-5.c | 1 + gcc/testsuite/gcc.target/i386/pr78904-4a.c | 2 +- gcc/testsuite/gnat.dg/thunk1.adb | 9 + gcc/testsuite/gnat.dg/thunk1_pkg1.ads | 7 + gcc/testsuite/gnat.dg/thunk1_pkg2.adb | 10 + gcc/testsuite/gnat.dg/thunk1_pkg2.ads | 14 + gcc/toplev.c | 7 +- gcc/tree-streamer-in.c | 9 +- gcc/tree-vect-slp.c | 80 +- gcc/tree.c | 14 +- gcc/tree.h | 12 +- include/gomp-constants.h | 3 + libbacktrace/ChangeLog | 93 ++ libbacktrace/Makefile.am | 55 +- libbacktrace/Makefile.in | 163 +- libbacktrace/config.h.in | 3 + libbacktrace/configure | 224 ++- libbacktrace/configure.ac | 15 + libbacktrace/elf.c | 1701 ++++++++++++++++++-- libbacktrace/internal.h | 9 + libbacktrace/mtest.c | 401 +++++ libbacktrace/xztest.c | 508 ++++++ libgomp/ChangeLog | 7 + libgomp/config/nvptx/atomic.c | 18 + libgomp/libgomp.h | 3 + libgomp/target.c | 184 ++- .../testsuite/libgomp.c-c++-common/reduction-16.c | 1 + .../testsuite/libgomp.fortran/map-alloc-ptr-1.f90 | 114 ++ .../testsuite/libgomp.fortran/map-alloc-ptr-2.f90 | 86 + 114 files changed, 6463 insertions(+), 1162 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr96653.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr97029.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/rhbz1878600.c create mode 100644 gcc/testsuite/gcc.dg/pr94234-2.c create mode 100644 gcc/testsuite/gcc.dg/pr94234-3.c create mode 100644 gcc/testsuite/gcc.dg/vect/bb-slp-48.c create mode 100644 gcc/testsuite/gcc.target/bpf/nop-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-pr97028.c create mode 100644 gcc/testsuite/gnat.dg/thunk1.adb create mode 100644 gcc/testsuite/gnat.dg/thunk1_pkg1.ads create mode 100644 gcc/testsuite/gnat.dg/thunk1_pkg2.adb create mode 100644 gcc/testsuite/gnat.dg/thunk1_pkg2.ads create mode 100644 libbacktrace/mtest.c create mode 100644 libbacktrace/xztest.c create mode 100644 libgomp/config/nvptx/atomic.c create mode 100644 libgomp/testsuite/libgomp.fortran/map-alloc-ptr-1.f90 create mode 100644 libgomp/testsuite/libgomp.fortran/map-alloc-ptr-2.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_O1 updated (4df252aa -> 1f2c9c41)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_O1 in repository toolchain/ci/base-artifacts. discards 4df252aa 0: update: gcc-2fd157813c4964033e156ccb7df8889cd2afee99: 1 new 1f2c9c41 0: update: gcc-1b9bdd52037061d7a5bd77d177b060c93c528a5d: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4df252aa) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-master-arm-boots [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 189 +- 02-prepare_abe/console.log | 436 +- 04-build_abe-bootstrap_O1/console.log | 94213 ++++++++++++++++--------------- 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 63 +- console.log | 94911 ++++++++++++++++---------------- jenkins/manifest.sh | 10 +- 7 files changed, 94817 insertions(+), 95015 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_tk1/llvm-master-arm-spec2k6-Os updated (0680a3d56d8 -> 7d26d6a1b06)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/llvm-master-arm-spec2k6-Os in repository toolchain/ci/llvm-project. from 0680a3d56d8 [Power10] Enable the heuristic for Power10 and switch the s [...] adds 6c8041aa0ff [AST][FPEnv] Keep FP options in trailing storage of CastExpr adds 0ece51c60c5 Add raw_fd_stream that supports reading/seeking/writing adds 19531a81f1d Add raw_fd_stream_test.cpp into CMakeLists.txt adds 9c651c231f3 Missing change from previous commit adds b3f364e8561 Add a header file to support ssize_t for windows adds de044f75628 Revert "[AST][FPEnv] Keep FP options in trailing storage of [...] adds 4ede83c0683 [gn build] Port 19531a81f1d adds 35dc91aee20 [X86][SSE] lowerShuffleAsDecomposedShuffleBlend - support d [...] adds 36e2e2e12ef [InstCombine] Fix incorrect SimplifyWithOpReplaced transfor [...] adds c437446d90b [ARM] Recognize "double extend" reduction patterns adds 50ee0b99ec2 [InstCombine][X86] getNegativeIsTrueBoolVec - use ConstantE [...] adds 3a8ea8609b8 [Intrinsics] define semantics for experimental fmax/fmin ve [...] adds 6cfd38d03d5 [ARM] Fixup single source mla reductions. adds d030aad7893 [InstCombine][X86] Add tests for masked load/stores with co [...] adds 78de7297abe Reland [AssumeBundles] Use operand bundles to encode alignm [...] adds 2e61cd1295e [MachineScheduler] Fix operand scheduling for pre/post-incr [...] adds a874d633440 [Clang] Add option to allow marking pass-by-value args as noalias. adds 3170d548426 [InstCombine][X86] Covert masked load/stores with (sign ext [...] adds 8ce75e2778d TableGen: change a couple of member names to clarify their use. adds 74760bb00fb [LV][ARM] Add preferInloopReduction target hook. adds 3de9e3e493b [DSE] Precommit test case with loop carried dependence. adds e082dee2b58 [DSE] Bail out on MemoryPhis when deleting stores at end of [...] adds d85ac6d577a [DSE] Adjust coroutines test after e082dee2b588. adds ad3d6f993d9 [SelectionDAG][X86][ARM][AArch64] Add ISD opcode for __buil [...] adds cc76965b190 [MinGW] Use lib prefix for libraries adds bb613044b68 [MinGW][clang-shlib] Build by default on MinGW adds 7da94193990 [MinGW][libclang] Allow simultaneous shared and static lib adds c34a99fe589 [InstCombine] Add extra use tests for abs canonicalization (NFC) adds c55c14837e1 [gcov] Clean up by getting llvm.dbg.cu earlier adds 412c9c0bf2a [gcov] emitProfileArcs: iterate over GCOVFunction's instead [...] adds 7d3825ed954 Revert "[gcov] emitProfileArcs: iterate over GCOVFunction's [...] adds e8e3693ceaa Change range operator from deprecated '-' to '...' adds 93b4f853826 Update TableGen test files to use the new '...' range punctuation. adds bdd1eba37b6 [ARM] Add additional vecreduce float legalization test (NFC) adds d6fadc49e3d [gcov] Process .gcda immediately after the accompanying .gc [...] adds 04febd30a8d [lld][WebAssembly] Error on import/export of mutable global [...] adds c2f8bc986fb [ARM] Add tests for fmin/max + inf folds (NFC) adds cc2da5554b5 [lld][WebAssembly] Add initial support for -Map/--print-map adds 70daa353e2a [gn build] Port cc2da5554b5 adds 9d300bc8d2f [Hexagon] Avoid widening vectors with non-HVX element types adds 758732a34ed [X86] Use ISD::PARITY directly instead of emitting CTPOP an [...] adds 61d29e0dff0 [LegalizeTypes] Remove a few cases from SplitVectorOperand [...] adds 0fb2203cd6c [Docs] Fix --print-supported-cpus option rendering adds 8cf1ac97cec [llvm-cov gcov] Improve accuracy when some edges are not measured adds f086e85eea9 [gcov] Assign names to some types and loaded values used in [...] adds 63182c2ac0b [gcov] Add spanning tree optimization adds 5f4e9bf6416 [gcov] Fix memory leak due to BranchProbabilityInfoWrapperPass adds bec81dc67d9 Reland "[PowerPC] Implement instruction clustering for stores" adds e2dee9af8db [X86] Add test cases for PR11210 adds 2c85f5e642f [ARM] Add tests for fmin/max with largest/smallest float (NFC) adds 9237fde4813 [CGP] Prevent optimizePhiType from iterating forever adds a4c53519864 [DAGCombiner] Propagate FMF flags in FMA folding adds c0bcd11068f [ASTImporter] Add basic support for comparing Stmts and com [...] adds 8889faaed0b [SelectionDAG] Remove default for 'unsigned' Alignment for [...] adds 6e06f1cd081 GCOVProfiling: Avoid use-after-move adds 7940af02baa Correct end-of-namespace comment to be clang-tidy/LLVM styl [...] adds ce89eeee16d PPCInstrInfo: Fix readability-inconsistent-declaration-para [...] adds cb3e1dd6c31 [ARM] Add some fmin/fmax tests with commuted operands (NFC) adds b2c32c90bab [llvm-cov gcov] Add -r (--relative-only) && -s (--source-prefix) adds 44664a54483 [llvm-cov gcov][test] Unsupport Windows adds 783ba64a895 [JITLink] Improve formatting for Edge, Block and Symbol deb [...] adds 56b33391d3a [SelectionDAG] Move ISD:PARITY formation from DAGCombine to [...] adds 6e42cadf106 [docs] Document LLVM_EXTERNALIZE_DEBUGINFO CMake option adds 88690a96589 [CodeGenPrepare] Fix zapping dead operands of assume adds f1cd6593da3 [AST][FPEnv] Keep FP options in trailing storage of CastExpr adds 4d7b1945439 [llvm-cov gcov] Refactor counting and reporting adds 163863604f9 [analyzer] Evaluate PredefinedExpressions adds d7ae9696e31 [analyzer][docs][NFC] Document the ento namespace in the ll [...] adds cdacffe4acc [analyzer][z3] Use more elaborate Z3 variable names adds 15bff4dec43 [CodeGen] Fix bug in IncrementPointer adds 4946802c5f4 [ARM] Fix so immediates and pc relative checks adds 9a4476072e1 [UnifyLoopExits] Fix non-deterministic iteration order adds 0008fb34370 [compiler-rt] [netbsd] Use internal_ptrace() instead of ptrace() adds bfcb824ba52 [JumpThreading] Fix an incorrect Modified status adds 09b8871f8d8 AMDGPU/GlobalISel/Emitter Support for predicate code that u [...] adds 30667c967d3 [clangd] Add error() function for creating formatv-style ll [...] adds 119e57be762 [gn build] Port 30667c967d3 adds d3af441dfeb [DebugInstrRef][1/9] Add fields for instr-ref variable locations adds 574dd605471 [clangd] Track tweaks that fail the apply stage adds 4232bccfb46 [CodeGen][X86] Regenerate minmax reduction sequence tests t [...] adds 687e1d71216 [clangd] makeStringError,make_error<StringError> -> error() adds 00e5676cf64 [LegalizeDAG] Fix MSVC "result of 32-bit shift implicitly c [...] adds 0c8f4cd6573 AMDGPU/GlobalISel Add test for non-leaf complex patterns adds 416346d1ca5 AMDGPU/GlobalISel/Emitter Recognize additional 'same operan [...] adds 6e2a86ed5ab AMDGPU/GlobalISel Check for NoNaNsFPMath in isKnownNeverSNaN adds 816663adb5f [SVE] In LoopIdiomRecognize::isLegalStore bail out for scal [...] adds 676febc044e [ARM][MVE] Tail-predication: check get.active.lane.mask's TC value adds 12232dc181c [SyntaxTree][List] Fix: `ParameterDeclarationList` is the ` [...] adds 0f4cc64fd74 [SyntaxTree] Provide `List::classof` adds ceb0128509c [SyntaxTree][List] `assertInvariants` for `List`s adds dd519bf0b07 [ARM] Selects SSAT/USAT from correct LLVM IR adds eef30334d1d [DSE] Precommit test case for invalid elimination of store [...] adds f715d81c9df [DSE] Only eliminate candidates that always store the same loc. adds 06fb4e90649 [CGP] Limit converting phi types to simple loads and stores adds 5cac85c931d [mlir] Check for type conversion success in std->llvm funct [...] adds 0b2e0e80d96 [pstl] Support Threading Building Blocks 2020 (oneTBB) for [...] adds f4eb94e1db8 [llvm-readobj/elf][test] - Test all core note types properly. adds e9c314611bc [llvm-readelf/obj] - Refine and generalize the code that is [...] adds 412b417bfa7 [NFC] Add missing `const` statements in SCEV adds 14e191a0e7c [llvm-readobj] - Cleanup implementation LLVMStyle<ELFT>::pr [...] adds 7448e64a790 [llvm-readobj/elf] - Don't use unwrapOrError when reporting [...] adds 7109fc9e42e Don't dereference from a dyn_cast<>. NFCI. adds 98eaacd73d4 Assert we've found both vector types. NFCI. adds c799f873cb9 [AMDGPU] Don't cluster stores adds 7bb9a2f996a [InstSimplify] fix miscompiles with maximum/minimum intrinsics adds 08baa979235 [ARM] Enable tail predication for reduction tests. NFC adds 9868ea764f3 [XCOFF][AIX] Handle TOC entries that could not be reached b [...] adds 5df9cb5bc71 [InstSimplify] fix test comments; NFC adds dae68fdf9ec [InstSimplify] add/move tests for fmin/fmax; NFC adds 22c583c3d03 [InstSimplify] reduce code duplication for fmin/fmax folds; NFC adds ef7a255c037 Add support for casting elements in vectors for certain Std [...] adds 71a16e40f78 [libcxx] ostream{,buf}_iterator::difference_type changes in C++20 adds 3b7708e2deb Assert we've found the size of each (non-overlapping) struc [...] adds f07f3c72375 [MemorySSA] Precommit test case for PR47498. adds c4f1b314418 [MemorySSA] Make sure PerformedPhiTrans is updated for each [...] adds 75263761648 [InstSimplify] allow folds for fmin/fmax with 'ninf' adds 916b4340358 Sema: add support for `__attribute__((__swift_objc_members__))` adds 55d371abd7f [InstSimplify] add folds for fmin/fmax with 'nnan' adds ed0abc8ad3f [flang] Correctly detect overlapping integer cases adds c92d1aa44b1 [libc] Decouple string functions. adds 94921e9f8ad [ELF] Define a reportRangeError() overload for thunks and t [...] adds ce6dd973ac5 [flang] Fix analyzed form of type-bound assignment adds 7841e21c984 Let -basic-block-sections=labels emit basicblock metadata i [...] adds 4ff4708d39b collectBitParts - use const references. NFCI. adds 132e57bc597 Retry of D84974 adds 7235326fb23 [libc++] Upgrade the Clang on build bots adds a3bc0401d43 Fix 132e57bc597bd3f50174b7d286c43f76b47f11c1 adds 8e69c3cde8e [DAGCombiner] Fold fmin/fmax with INF / FLT_MAX adds cfff88c03cf [InstCombine] Simplify select operand based on equality condition adds da17e0d5c1d [ms] [llvm-ml] Add missing built-in type aliases adds 7c44ee8e193 [ms] [llvm-ml] Fix struct padding logic adds 20201dc76aa [ms] [llvm-ml] Add support for size queries in MASM adds 23a2b03221c [ms] [llvm-ml] Add basic support for SEH, including PROC FRAME adds c0e3996bc70 [ARM] Add more tests for vecreduce soft float legalization (NFC) adds 53f36f06afb [Legalize][ARM][X86] Add float legalization for VECREDUCE adds abf1c82dcc5 [libc] Extend MPFRMatcher to handle 2-input-1-output and su [...] adds f06090243d8 [libc++] Use LLVM 11 instead of trunk on build bots adds cc947207283 [AArch64] Add additional vecreduce fmax/fmin legalization t [...] adds c0f199e5667 [PowerPC] Implement Thread Local Storage Support for Local Exec adds f6f34024e9a [ELF] Add documentation for --warn-backrefs: a GNU ld compa [...] adds 4208ea3e19f [FastISel] Bail out of selectGetElementPtr for vector GEPs. adds becf1552758 [libc++] Add comment in atomic test to explain why part of [...] adds 226d80ebe20 [MemProf] Rename HeapProfiler to MemProfiler for consistency adds 2ad38f7a46b [gn build] Port 226d80ebe20 adds c2590de30df [docs][NewPM] Add docs for writing NPM passes adds 9d01612db48 [Asan] Fix false leak report adds 7d1ed69c8aa Make namespace handling uniform across dialect backends. adds db94df04fbf Update PowerPC backend ownership in CODE_OWNERS.TXT adds f859c30ecbb [AMDGPU] Add XDL resource to scheduling model adds c193a689b47 [SelectionDAG] Use Align/MaybeAlign in calls to getLoad/get [...] adds 1ec02efee9b [libc++] Make rotate a constexpr. adds b552a30283c [libc++] Finish implementing P0202R3 adds 1dac073bdd9 Fix MLIR standalone example to properly handle namespace adds b3445c839fa [libc++][test] Portability fix of std::strstreambuf constru [...] adds 44da6c2369d [docs] Update OrcV1 removal timeline. adds f3d83448544 [PruneEH][NFC] Use CallGraphUpdater in PruneEH adds 5881bf00503 [flang] More clean-up of CookedSource API adds ed653184ac6 Revert "[libc++] Make rotate a constexpr." adds 3ed89b51da3 [Take 2] [libc++] Make rotate a constexpr. adds cdbfb47998c [flang] Fix bug for forward referenced type adds 670c276232e [GlobalISel] Add G_UNMERGE_VALUES(G_MERGE_VALUES) combine adds 39ec36415df Revert "[docs][NewPM] Add docs for writing NPM passes" adds 46f9137e43f [GISel]: Add combine for G_FABS to G_FABS adds 10b12d4035d Reland [docs][NewPM] Add docs for writing NPM passes adds 6352381039c [Hexagon] Some HVX DAG combines adds bb877d1af2e [Hexagon] Widen loads and handle any-/sign-/zero-extensions adds f35617ad809 [Hexagon] Add more detailed testcase for widening truncates adds da55e9ba127 [Sema] Address-space sensitive index check for unbounded arrays adds 32515938901 [X86] Place new constant node in topological order in X86DA [...] adds a36278c2f8b [GlobalISel] Add G_UNMERGE(Cst) -> Cst1, Cst2, ... combine adds 1d70984fa22 [Asan] Accept __lsan_ignore_object for redzone pointer adds e6bc7037d38 [AArch64] Statepoint support for AArch64. adds 4706880f06f [flang] Allow Fortran comments after #include path adds da1aaa0b708 Revert "[X86] Place new constant node in topological order [...] adds 46673763fe5 [X86] Place new constant node in topological order in X86DA [...] adds b2cf572b562 [flang] Respect BZ mode in exponent parts, too adds 8bd0dc5bfe2 [libc++abi] Do not declare __cxa_finalize and __cxa_atexit [...] adds d2321129bda [GlobalISel] Add `X,Y<dead> = G_UNMERGE Z` -> X = G_TRUNC Z adds b3afad04630 [GlobalISel] Add a `X, Y = G_UNMERGE(G_ZEXT Z)` -> X = G_ZE [...] adds 1f837265eb0 [Coroutines] Fix a typo in documentation adds 042c2350686 [DebugInfo] Remove dots from getFilenameByIndex return value adds 2c12b056bec [lld][WebAssembly] Allow globals imports via import_name/im [...] adds 380e746bcca [DebugInfo] Fix methods of AsmPrinter to emit values corres [...] adds a8058c6f8d1 [DebugInfo] Fix DIE value emitters to be compatible with DW [...] adds c3c501f5d79 [DebugInfo] Add new emitting methods for values which depen [...] adds 982b31fad29 [DebugInfo] Add the -dwarf64 switch to llc and other intern [...] adds 5dd1c591889 [DebugInfo] Fix emitting DWARF64 compilation units (5/19). adds cae7c1eb781 [DebugInfo] Use a common method to determine a suitable for [...] adds 26f1f188313 [DebugInfo] Fix emitting the DW_AT_location attribute for 6 [...] adds 383d34c077a [DebugInfo] Fix emitting DWARF64 .debug_str_offsets section [...] adds 924dc580769 [DebugInfo] Fix emitting DWARF64 DWO compilation units and [...] adds 18f23b3ecc6 [DebugInfo] Fix emitting DWARF64 type units (10/19). adds b118030f3fa [DebugInfo] Fix emitting DWARF64 .debug_aranges sections (11/19). adds 03b09c6b68b [DebugInfo] Fix emitting pre-v5 name lookup tables in the D [...] adds f9b242fe24f [DebugInfo] Fix emitting DWARF64 .debug_rnglists sections (13/19). adds 3158d3dd4b7 [DebugInfo] Fix emitting DWARF64 .debug_loclists sections (14/19). adds 00ce54689d3 [DebugInfo] Fix emitting DWARF64 .debug_addr sections (15/19). adds a93dd26d8ce [DebugInfo] Fix emitting DWARF64 .debug_names sections (16/19). adds 7e1e4e81cbc [DebugInfo] Fix emitting DWARF64 .debug_macro[.dwo] section [...] adds 8c19ac23bde [DebugInfo] Make the offset of string pool entries 64-bit (18/19). adds a845ebd6333 [DebugInfo] Make offsets of dwarf units 64-bit (19/19). adds 26c293c23d3 [BinaryFormat/MachO] Add a missing constant. adds 7b416c5e368 [llvm-readobj] [ARMWinEH] Print ARM64 packed unwind info adds 61e0b2b4c5f [LLD] Allow configuring default ld.lld backend adds e71cda21d71 [Windows][Polly] Disable LLVMPolly module for all compilers [...] adds 3023f057d83 [NFC][lsan][fuzzer] Relax fuzzer-leak.test adds c6aadd2b72c [X86] Pre-commit test cases for D87593 adds d74e1f3a511 [NFC][Asan] Don't use MetaData for size adds cad961bb24d [NFC][Asan] Remove from_memalign and rz_log adds c8ddf27ddbb Revert "[Sema] Address-space sensitive index check for unbo [...] adds a61bb7f0980 [NFC][Asan] Reorder bitfields adds 08507d83be1 [Asan] Cleanup kAllocBegMagic setup adds 4540d3baad0 [NFC][Asan] Return uptr as before D87646 adds 86ccf4f728c [NFC] Test commit adds 943b0c8bffc [NFC][Asan] Remove chunk pointer from metadata adds 69cccb3189d [SVE] Fix isLoadInvariantInLoop for scalable vectors adds e15996b5c6e [doc] Fix broken link adds c1f2fb5184c [DebugInfo] Support both forward and backward slashes in tests adds 7b58eb50d96 [Support] Make building with snmalloc work adds 487412988ce [MVE] Rename of tests making them consistent with tail-pred [...] adds 9b4fa854343 GlobalISel/IRTranslator resetTargetOptions based on functio [...] adds 4845531fa88 [lib/Object] - Refine interface of ELFFile<ELFT>. NFCI. adds 58938b544b7 [NFC][DebugInfo] Use consistent regex group spelling adds bccd2ec3e21 [llvm-readobj/elf] - Simplify and refine the implementation [...] adds fc446935d72 [X86] detectAVGPattern - accept non-pow2 vectors by padding. adds b4b1b84106a [MVE] fix typo in llvm debug message. NFC. adds 5f13d6c1eef [Transforms][Coroutines] Add missing header path to CMakeLists.txt adds 2508ef014e8 [SelectionDAG] Remove unused FP constant in getNegatedExpression adds 1119bf95be9 [ARM] Corrected condition in isSaturatingConditional adds 9eab73fa17f [X86] Update SSE/AVX integer MINMAX intrinsics to emit llvm [...] adds b768546fe0c Revert "[InstCombine] Simplify select operand based on equa [...] adds c20852300a3 [mlir][integration_test] Linalg Conv folder renamed to CPU adds 967c7b6936a [mlir] check for failures when packing function sigunatures [...] adds cd4edf94cd4 Recommit "[ConstraintSystem] Add helpers to deal with linea [...] adds bee79cdcc6a SelectionDAGBuilder.h - remove unnecessary includes. NFCI. adds 1abb4461ea0 StatepointLowering.cpp - remove unnecessary includes. NFCI. adds 6c1f2a34fbc SpillPlacement.cpp - remove unnecessary includes. NFCI. adds a21387c6547 Revert "RegAllocFast: Record internal state based on regist [...] adds 0a2213c6eb2 [lldb/cmake] Fix testing support library dependencies adds af3789a1881 [lldb] Improve qemu interop for aarch64 adds aa8be5aeead [Scalarizer] Avoid changing name of non-instructions adds 635b87511ec [ARM][MVE] Tail-predication: use unsigned SCEV ranges for t [...] adds 6d40f35c9fa AliasSetTracker.cpp - remove unnecessary includes. NFCI. adds 796c8052692 ProvenanceAnalysis.h - remove unnecessary AliasAnalysis.h i [...] adds 50d2a5d4c74 LoopCacheAnalysis.h - remove unnecessary includes. NFCI. adds da104444faf [libc++] Allow building without threads in standalone builds adds 98e07b5596c Restrict UnnecessaryCopyInitialization check to variables i [...] adds db22e70d010 [ConstraintSolver] Add isConditionImplied helper. adds fe395aecd9e [Flang] Add GettingInvolved documentation page and sidebar. adds 3f411e97739 [lld][WebAssembly] Fix --export-all when __stack_pointer is [...] adds 57752b14494 [gn build] (semi-manually) port 380e746bcca adds 802d21cdf08 [ConstraintElimination] Add initial tests. adds 2744c2e2957 [libcxx] Disable failing test for no-exceptions build adds eb66b04cbec [InstCombine] improve test names; NFC adds 7ffc9aa538d [InstCombine] add RUN to show miscompile of pow expansion; NFC adds aa57c1c9670 [InstCombine] fix bug in pow expansion adds 46dc41e1ef9 [gn build] Port a8058c6f8d1 adds c0809f8d790 [gn build] Port cd4edf94cd4 adds c897a7fb3e2 [mlir][Standard] Add canonicalizer for dynamic_tensor_from_ [...] adds 2d8f0c05dbe [mlir][openacc] Add missing print of vector_length in parallel op adds 65c6ae3b6ac [Utils] isLegalToPromote - Fix missing null check before wr [...] adds 97a23ab28ad AMDGPUPrintfRuntimeBinding.cpp - drop unnecessary casts/dyn [...] adds e1669843f2a Revert "[SelectionDAG] Remove unused FP constant in getNega [...] adds 65f6810d3a4 [LLD][PowerPC] Add support for R_PPC64_TPREL34 used in TLS [...] adds 85763e0758f [libc] Fix typo in platform_defs.h.inc adds 00d6e7116c2 [libc] Add missing LibcFPTestHelpers library adds e328456a9e6 [libc] Add missing TableGen dependency adds a012bc4c42e [analyzer][StdLibraryFunctionsChecker] Elaborate the summar [...] adds 7df873f9c67 [llvm-readobj/elf] - Don't crash when the size of s dynamic [...] adds 7c6f5b7fbf5 [analyzer] Add documentation for alpha.fuchsia.Lock and alp [...] adds 8985755762a [InstSimplify] add limit folds for fmin/fmax adds 39c87951417 [libc++] Use allocator_traits to consistently allocate/deal [...] adds 2b42d53e5ea SLPVectorizer.h - remove unnecessary AliasAnalysis.h includ [...] adds 01f5fcd8290 [mlir][openacc] Add loop op verifier adds dd1d5488e47 [analyzer][Liveness][NFC] Get rid of statement liveness, be [...] adds ec2b0a51977 [XCOFF] Run resource intense test only on platforms where i [...] adds 74a9c6d7e1c [libc++] Add a benchmark for std::map operations adds 243ffd0cade [MachineBasicBlock] Fix a typo in function copySuccessor adds 4ddd985ca94 NFC: Add whitespace change to .git-blame-ignore-revs adds a43e68b58b0 [X86][AVX] lowerShuffleWithSHUFPS - handle missed canonical [...] adds 127faae7529 [lldb] Add -l/--language option to script command adds 4452cc4086a [VectorCombine] Don't vectorize scalar load under asan/hwas [...] adds 9c73e555104 Revert "[DebugInfo] Remove dots from getFilenameByIndex ret [...] adds 3a59628f3cc Revert "[DSE] Switch to MemorySSA-backed DSE by default." adds 03f1516d607 [MemoryBuffer] Revert unintended MemoryBuffer change from D86996 adds 3bc3983f229 Fix bot failure after ccb4124a4172 adds 738bab743b5 [OPENMP]Add support for allocate vars in untied tasks. adds 54e1bf11542 [LoopAccessAnalysis][NewPM] Fix tests to work under NPM adds 6f66ad13c50 [DependenceAnalysis][NewPM] Fix tests to work under NPM adds e0c7641de65 [RegionInfo][NewPM] Fix RegionInfo tests to work under NPM adds 3f69b2140f5 [NewPM][opt] Fix -globals-aa not being recognized as alias [...] adds 9853e84b54d [PostDominators][NewPM] Fix tests to work under NPM adds d9c9a74d0dc [libc++] Add missing friend keyword adds 05134877e64 [X86] Use Align in reduceMaskedLoadToScalarLoad/reduceMaske [...] adds ca76d6e94a3 [Bugpoint][NewPM] Pin bugpoint to legacy PM adds 3d42d549554 [ConstraintElimination] Add constraint elimination pass. adds 32a61531b81 [gn build] Port 3d42d549554 adds 79f22b1f99f Fix .debug_aranges parsing. adds d158e786ccd [DemandedBits][NewPM] Pin some tests to legacy PM adds 558e5c31b66 [Dominators][NewPM] Pin tests with -analyze to legacy PM adds 583c8ce30c1 [libc++] Fix broken test for std::any and allocators adds 69f98311ca4 [ASTMatchers] extract public matchers from const-analysis i [...] adds f975ae4867d [CodeGen][typeid] Emit typeinfo directly if type is known a [...] adds 05aa997d511 [PowerPC] Implement __int128 vector divide operations adds d417488ef5a [AArch64][SVE] Add lowering for llvm fsqrt adds f1a3ab90443 [clang] Add a command line flag for the Machine Function Splitter. adds 7d6ca2ec570 InferAddressSpaces: Fix assert with unreachable code adds 38ecd616199 [TableGen] Fix invalid comparison function `SizeOrder` in ` [...] adds 516a01b5f36 Implement __isOSVersionAtLeast for Android adds 00ba1a3de7f [libc] remove useless headers adds 3b7f5166bd1 [SLPVectorizer][SVE] Skip scalable-vector instructions befo [...] adds c19fda9aa07 [libc] use stddef instead of string header adds 7d26d6a1b06 Sema: add support for `__attribute__((__swift_bridged_typedef__))` No new revisions were added by this update. Summary of changes: .git-blame-ignore-revs | 3 + .../performance/UnnecessaryCopyInitialization.cpp | 10 +- clang-tools-extra/clangd/ClangdLSPServer.cpp | 28 +- clang-tools-extra/clangd/ClangdServer.cpp | 10 +- clang-tools-extra/clangd/CodeComplete.cpp | 3 +- clang-tools-extra/clangd/DraftStore.cpp | 23 +- clang-tools-extra/clangd/FindSymbols.cpp | 9 +- clang-tools-extra/clangd/IncludeFixer.cpp | 3 +- clang-tools-extra/clangd/JSONTransport.cpp | 14 +- clang-tools-extra/clangd/PathMapping.cpp | 8 +- clang-tools-extra/clangd/Preamble.cpp | 9 +- clang-tools-extra/clangd/RIFF.cpp | 19 +- clang-tools-extra/clangd/SourceCode.cpp | 22 +- clang-tools-extra/clangd/TUScheduler.cpp | 3 +- clang-tools-extra/clangd/URI.cpp | 21 +- clang-tools-extra/clangd/index/Background.cpp | 9 +- clang-tools-extra/clangd/index/Serialization.cpp | 33 +- clang-tools-extra/clangd/index/SymbolID.cpp | 7 +- .../clangd/index/YAMLSerialization.cpp | 9 +- .../index/remote/marshalling/Marshalling.cpp | 27 +- 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4 + .../Target/AArch64/AArch64TargetTransformInfo.h | 5 - llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 6 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 1 + .../Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp | 40 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 4 - .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 2 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 10 +- llvm/lib/Target/AMDGPU/SISchedule.td | 13 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 20 +- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 28 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 177 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 14 + llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 16 +- llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp | 1 + llvm/lib/Target/ARM/MVETailPredication.cpp | 94 +- llvm/lib/Target/AVR/AVRISelLowering.cpp | 8 +- llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp | 4 +- llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 4 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 24 + llvm/lib/Target/Hexagon/HexagonISelLowering.h | 5 + llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 183 +- llvm/lib/Target/Hexagon/HexagonPatternsHVX.td | 22 +- llvm/lib/Target/Hexagon/HexagonSubtarget.h | 13 +- llvm/lib/Target/Mips/MipsISelLowering.cpp | 8 +- llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 4 +- .../PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp | 8 +- llvm/lib/Target/PowerPC/PPC.td | 11 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 52 +- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 2 + llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 13 + llvm/lib/Target/PowerPC/PPCISelLowering.h | 5 + llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 109 +- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 14 + llvm/lib/Target/PowerPC/PPCInstrInfo.td | 2 + llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 10 +- llvm/lib/Target/PowerPC/PPCMCInstLower.cpp | 2 + llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 1 + llvm/lib/Target/PowerPC/PPCSubtarget.h | 2 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.../Transforms/Instrumentation/GCOVProfiling.cpp | 612 +++-- .../Transforms/Instrumentation/Instrumentation.cpp | 4 +- .../{HeapProfiler.cpp => MemProfiler.cpp} | 238 +- llvm/lib/Transforms/LLVMBuild.txt | 2 +- llvm/lib/Transforms/ObjCARC/ProvenanceAnalysis.h | 8 +- .../Transforms/Scalar/AlignmentFromAssumptions.cpp | 121 +- llvm/lib/Transforms/Scalar/CMakeLists.txt | 1 + .../Transforms/Scalar/ConstraintElimination.cpp | 310 +++ .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 49 +- llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp | 6 + llvm/lib/Transforms/Scalar/JumpThreading.cpp | 6 +- llvm/lib/Transforms/Scalar/LICM.cpp | 24 +- llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 7 +- llvm/lib/Transforms/Scalar/Scalar.cpp | 1 + llvm/lib/Transforms/Scalar/Scalarizer.cpp | 3 +- llvm/lib/Transforms/Utils/CallPromotionUtils.cpp | 5 +- llvm/lib/Transforms/Utils/Local.cpp | 20 +- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 2 + llvm/lib/Transforms/Utils/UnifyLoopExits.cpp | 3 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 10 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 18 +- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 7 +- llvm/test/Analysis/BasicAA/modref.ll | 1 - llvm/test/Analysis/DemandedBits/add.ll | 2 +- llvm/test/Analysis/DemandedBits/basic.ll | 2 +- llvm/test/Analysis/DemandedBits/intrinsics.ll | 2 +- llvm/test/Analysis/DemandedBits/vectors.ll | 2 +- llvm/test/Analysis/DependenceAnalysis/AA.ll | 2 +- llvm/test/Analysis/DependenceAnalysis/Banerjee.ll | 4 +- .../test/Analysis/DependenceAnalysis/BasePtrBug.ll | 2 +- .../Analysis/DependenceAnalysis/Constraints.ll | 2 +- llvm/test/Analysis/DependenceAnalysis/Coupled.ll | 2 +- llvm/test/Analysis/DependenceAnalysis/DADelin.ll | 2 +- llvm/test/Analysis/DependenceAnalysis/ExactRDIV.ll | 2 +- llvm/test/Analysis/DependenceAnalysis/ExactSIV.ll | 2 +- llvm/test/Analysis/DependenceAnalysis/GCD.ll | 2 +- llvm/test/Analysis/DependenceAnalysis/Invariant.ll | 2 +- .../Analysis/DependenceAnalysis/MIVCheckConst.ll | 2 +- .../Analysis/DependenceAnalysis/NonAffineExpr.ll | 2 +- .../NonCanonicalizedSubscript.ll | 2 +- llvm/test/Analysis/DependenceAnalysis/PR21585.ll | 2 +- .../Analysis/DependenceAnalysis/Preliminary.ll | 2 +- .../Analysis/DependenceAnalysis/Propagating.ll | 2 +- .../Analysis/DependenceAnalysis/Separability.ll | 2 +- .../DependenceAnalysis/SimpleSIVNoValidityCheck.ll | 2 +- .../SimpleSIVNoValidityCheckFixedSize.ll | 2 +- llvm/test/Analysis/DependenceAnalysis/StrongSIV.ll | 2 +- .../Analysis/DependenceAnalysis/SymbolicRDIV.ll | 2 +- .../Analysis/DependenceAnalysis/SymbolicSIV.ll | 2 +- llvm/test/Analysis/DependenceAnalysis/UsefulGEP.ll | 2 +- .../Analysis/DependenceAnalysis/WeakCrossingSIV.ll | 2 +- .../Analysis/DependenceAnalysis/WeakZeroDstSIV.ll | 2 +- .../Analysis/DependenceAnalysis/WeakZeroSrcSIV.ll | 2 +- llvm/test/Analysis/DependenceAnalysis/ZIV.ll | 2 +- .../Dominators/2006-10-02-BreakCritEdges.ll | 2 +- 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.../test/Analysis/RegionInfo/bad_node_traversal.ll | 3 +- llvm/test/Analysis/RegionInfo/block_sort.ll | 11 +- llvm/test/Analysis/RegionInfo/cond_loop.ll | 9 +- .../Analysis/RegionInfo/condition_complicated.ll | 9 +- .../Analysis/RegionInfo/condition_complicated_2.ll | 9 +- .../Analysis/RegionInfo/condition_forward_edge.ll | 9 +- .../Analysis/RegionInfo/condition_same_exit.ll | 9 +- llvm/test/Analysis/RegionInfo/condition_simple.ll | 9 +- llvm/test/Analysis/RegionInfo/exit_in_condition.ll | 9 +- llvm/test/Analysis/RegionInfo/infinite_loop.ll | 3 +- llvm/test/Analysis/RegionInfo/infinite_loop_2.ll | 10 +- llvm/test/Analysis/RegionInfo/infinite_loop_3.ll | 11 +- llvm/test/Analysis/RegionInfo/infinite_loop_4.ll | 11 +- llvm/test/Analysis/RegionInfo/infinite_loop_5_a.ll | 3 +- llvm/test/Analysis/RegionInfo/infinite_loop_5_b.ll | 3 +- llvm/test/Analysis/RegionInfo/infinite_loop_5_c.ll | 3 +- .../Analysis/RegionInfo/loop_with_condition.ll | 9 +- llvm/test/Analysis/RegionInfo/loops_1.ll | 9 +- llvm/test/Analysis/RegionInfo/loops_2.ll | 9 +- llvm/test/Analysis/RegionInfo/mix_1.ll | 9 +- .../Analysis/RegionInfo/multiple_exiting_edge.ll | 6 +- llvm/test/Analysis/RegionInfo/nested_loops.ll | 9 +- llvm/test/Analysis/RegionInfo/next.ll | 9 +- llvm/test/Analysis/RegionInfo/outgoing_edge.ll | 2 +- llvm/test/Analysis/RegionInfo/outgoing_edge_1.ll | 2 +- llvm/test/Analysis/RegionInfo/paper.ll | 9 +- .../Analysis/RegionInfo/two_loops_same_header.ll | 9 +- llvm/test/Analysis/RegionInfo/unreachable_bb.ll | 2 +- llvm/test/BugPoint/unsymbolized.ll | 2 +- .../CodeGen/AArch64/GlobalISel/combine-fabs.mir | 32 + .../CodeGen/AArch64/GlobalISel/combine-unmerge.mir | 478 ++++ .../AArch64/arm64-fast-isel-conversion-fallback.ll | 8 +- .../CodeGen/AArch64/arm64-fast-isel-conversion.ll | 8 +- llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll | 8 +- llvm/test/CodeGen/AArch64/convertphitype.ll | 401 ++- llvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll | 3 +- llvm/test/CodeGen/AArch64/parity.ll | 161 ++ llvm/test/CodeGen/AArch64/popcount.ll | 37 +- llvm/test/CodeGen/AArch64/sadd_sat_vec.ll | 4 +- llvm/test/CodeGen/AArch64/ssub_sat_vec.ll | 4 +- .../CodeGen/AArch64/statepoint-call-lowering.ll | 218 ++ llvm/test/CodeGen/AArch64/sve-fp.ll | 69 + llvm/test/CodeGen/AArch64/uadd_sat_vec.ll | 4 +- llvm/test/CodeGen/AArch64/usub_sat_vec.ll | 4 +- .../AArch64/vecreduce-fmax-legalization-nan.ll | 20 +- .../CodeGen/AArch64/vecreduce-fmax-legalization.ll | 14 +- ...alization.ll => vecreduce-fmin-legalization.ll} | 54 +- llvm/test/CodeGen/AMDGPU/GlobalISel/add_shl.ll | 149 ++ .../AMDGPU/GlobalISel/combine-shl-narrow.mir | 16 +- .../GlobalISel/extractelement-stack-lower.ll | 959 ++++--- llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3.ll | 658 +++++ llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll | 127 +- .../AMDGPU/GlobalISel/insertelement-stack-lower.ll | 634 ++--- .../CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll | 135 +- .../AMDGPU/GlobalISel/insertelement.large.ll | 42 +- .../AMDGPU/GlobalISel/inst-select-fract.f64.mir | 103 + .../legalize-llvm.amdgcn.image.store.2d.d16.ll | 39 +- .../AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll | 123 +- .../CodeGen/AMDGPU/GlobalISel/load-unaligned.ll | 38 +- .../GlobalISel/postlegalizercombiner-select.mir | 5 +- .../regbankselect-amdgcn.s.buffer.load.ll | 1374 +++++++++- llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll | 182 +- llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll | 155 +- llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll | 160 +- .../CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll | 4 +- llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll | 159 +- llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll | 168 +- llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll | 182 +- .../CodeGen/AMDGPU/GlobalISel/store-local.128.ll | 192 +- .../CodeGen/AMDGPU/GlobalISel/store-local.96.ll | 144 +- llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll | 157 +- llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll | 100 +- llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll | 157 +- llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll | 104 +- .../CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll | 24 +- llvm/test/CodeGen/AMDGPU/call-argument-types.ll | 48 +- llvm/test/CodeGen/AMDGPU/cluster_stores.ll | 13 +- llvm/test/CodeGen/AMDGPU/elf-notes.ll | 6 +- .../AMDGPU/fast-unaligned-load-store.global.ll | 26 +- .../AMDGPU/fast-unaligned-load-store.private.ll | 14 +- llvm/test/CodeGen/AMDGPU/fshr.ll | 14 +- llvm/test/CodeGen/AMDGPU/half.ll | 2 +- .../CodeGen/AMDGPU/indirect-addressing-term.ll | 12 +- llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 15 +- llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll | 2 +- llvm/test/CodeGen/AMDGPU/memory_clause.ll | 8 +- llvm/test/CodeGen/AMDGPU/merge-stores.ll | 2 +- llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll | 28 +- llvm/test/CodeGen/AMDGPU/opt-pipeline.ll | 14 +- .../CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll | 1260 +++++---- llvm/test/CodeGen/AMDGPU/private-element-size.ll | 10 +- llvm/test/CodeGen/AMDGPU/schedule-xdl-resource.ll | 44 + .../CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll | 12 +- llvm/test/CodeGen/AMDGPU/spill-m0.ll | 95 - llvm/test/CodeGen/AMDGPU/store-local.128.ll | 282 +- llvm/test/CodeGen/AMDGPU/store-local.96.ll | 208 +- llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll | 254 +- .../AMDGPU/token-factor-inline-limit-test.ll | 28 +- llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll | 13 +- llvm/test/CodeGen/AMDGPU/wwm-reserved.ll | 8 +- .../CodeGen/ARM/constant-island-SOImm-limit16.mir | 62 + llvm/test/CodeGen/ARM/fminmax-folds.ll | 555 ++++ llvm/test/CodeGen/ARM/legalize-bitcast.ll | 6 +- llvm/test/CodeGen/ARM/parity.ll | 162 ++ llvm/test/CodeGen/ARM/ssat.ll | 80 +- llvm/test/CodeGen/ARM/usat.ll | 92 +- .../ARM/vecreduce-fadd-legalization-soft-float.ll | 52 +- .../ARM/vecreduce-fmax-legalization-soft-float.ll | 95 + .../ARM/vecreduce-fmin-legalization-soft-float.ll | 95 + .../ARM/vecreduce-fmul-legalization-soft-float.ll | 95 + .../Generic/expand-experimental-reductions.ll | 40 +- .../autohvx/isel-widen-truncate-illegal-elem.ll | 34 + llvm/test/CodeGen/Hexagon/autohvx/widen-ext.ll | 99 + llvm/test/CodeGen/Hexagon/autohvx/widen-trunc.ll | 106 + .../Mips/GlobalISel/llvm-ir/fptosi_and_fptoui.ll | 72 +- llvm/test/CodeGen/Mips/atomic-min-max.ll | 960 +++---- llvm/test/CodeGen/Mips/atomic.ll | 282 +- llvm/test/CodeGen/Mips/implicit-sret.ll | 14 +- llvm/test/CodeGen/PowerPC/addegluecrash.ll | 10 +- llvm/test/CodeGen/PowerPC/aix-cc-abi.ll | 46 +- llvm/test/CodeGen/PowerPC/aix-overflow-toc.py | 68 + llvm/test/CodeGen/PowerPC/fma-combine.ll | 59 +- llvm/test/CodeGen/PowerPC/fusion-load-store.ll | 268 ++ llvm/test/CodeGen/PowerPC/lit.local.cfg | 2 + llvm/test/CodeGen/PowerPC/p10-vector-divide.ll | 18 + .../CodeGen/PowerPC/pcrel-call-linkage-leaf.ll | 4 +- llvm/test/CodeGen/PowerPC/pcrel-tls-local-exec.ll | 74 + llvm/test/CodeGen/PowerPC/popcount.ll | 14 +- llvm/test/CodeGen/PowerPC/vsx.ll | 54 +- llvm/test/CodeGen/SPARC/fp16-promote.ll | 10 +- .../{basic-tail-pred.ll => tail-pred-basic.ll} | 190 +- .../Thumb2/LowOverheadLoops/tail-pred-const.ll | 62 +- .../{tail-reduce.ll => tail-pred-reduce.ll} | 5 +- llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll | 12 +- llvm/test/CodeGen/Thumb2/mve-vecreduce-fminmax.ll | 1307 +++------- llvm/test/CodeGen/Thumb2/mve-vecreduce-loops.ll | 30 +- llvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll | 1100 +------- llvm/test/CodeGen/Thumb2/mve-vecreduce-mlapred.ll | 2244 +--------------- llvm/test/CodeGen/X86/2009-04-14-IllegalRegs.ll | 29 +- llvm/test/CodeGen/X86/atomic-unordered.ll | 58 +- llvm/test/CodeGen/X86/atomic32.ll | 122 +- llvm/test/CodeGen/X86/atomic64.ll | 40 +- llvm/test/CodeGen/X86/avg.ll | 689 +---- llvm/test/CodeGen/X86/avx-load-store.ll | 22 +- llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll | 48 +- llvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll | 22 +- ...sic-block-sections-labels-functions-sections.ll | 35 + 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mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp | 6 - mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp | 5 - mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 6 - mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp | 49 +- mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp | 4 - mlir/lib/Dialect/PDL/IR/PDL.cpp | 6 - mlir/lib/Dialect/SCF/SCF.cpp | 4 - mlir/lib/Dialect/SPIRV/SPIRVAttributes.cpp | 3 +- mlir/lib/Dialect/SPIRV/SPIRVOps.cpp | 4 + mlir/lib/Dialect/Shape/IR/Shape.cpp | 6 - mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 150 +- mlir/lib/Dialect/Vector/VectorOps.cpp | 6 - mlir/lib/TableGen/Operator.cpp | 18 +- .../StandardToLLVM/convert-to-llvmir.mlir | 71 + mlir/test/Conversion/StandardToLLVM/invalid.mlir | 9 + mlir/test/Dialect/OpenACC/invalid.mlir | 70 + mlir/test/Dialect/OpenACC/ops.mlir | 52 +- mlir/test/Transforms/canonicalize.mlir | 76 + mlir/test/lib/Dialect/Test/TestDialect.h | 3 +- mlir/test/lib/Dialect/Test/TestOps.td | 2 +- mlir/test/mlir-tblgen/op-attribute.td | 16 + mlir/test/mlir-tblgen/op-decl.td | 4 +- mlir/tools/mlir-tblgen/DialectGen.cpp | 13 + mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 65 +- mlir/tools/mlir-tblgen/OpFormatGen.cpp | 174 +- mlir/tools/mlir-tblgen/RewriterGen.cpp | 5 +- polly/cmake/CMakeLists.txt | 2 +- polly/lib/CMakeLists.txt | 2 +- pstl/include/pstl/internal/parallel_backend_tbb.h | 448 +++- 1109 files changed, 35417 insertions(+), 20737 deletions(-) create mode 100644 clang-tools-extra/clangd/unittests/LoggerTests.cpp create mode 100644 clang/test/AST/attr-swift_bridged_typedef.m create mode 100644 clang/test/AST/attr-swift_bridged_typedef.mm create mode 100644 clang/test/Analysis/eval-predefined-exprs.cpp create mode 100644 clang/test/Analysis/std-c-library-functions-vs-stream-checker.c create mode 100644 clang/test/Analysis/z3/pretty-dump.c create mode 100644 clang/test/CodeGen/pass-by-value-noalias.c create mode 100644 clang/test/CodeGenCXX/pass-by-value-noalias.cpp create mode 100644 clang/test/CodeGenObjC/pass-by-value-noalias.m create mode 100644 clang/test/Driver/fsplit-machine-functions.c create mode 100644 clang/test/SemaObjC/attr-swift_bridged_typedef.m create mode 100644 clang/test/SemaObjC/attr-swift_objc_members.m create mode 100644 compiler-rt/test/asan/TestCases/redzone_noleak.cpp create mode 100644 flang/docs/GettingInvolved.md create mode 100644 flang/docs/_templates/indexsidebar.html create mode 100644 flang/docs/_templates/layout.html copy {clang/test/CXX/cpp/cpp.module/Inputs => flang/test/Preprocessing}/empty.h (100%) create mode 100644 flang/test/Preprocessing/include-comment.F90 create mode 100644 flang/test/Semantics/defined-ops.f90 rename libc/config/linux/{platfrom_defs.h.inc => platform_defs.h.inc} (100%) create mode 100644 libcxx/benchmarks/map.bench.cpp create mode 100644 libcxx/test/libcxx/utilities/any/allocator.pass.cpp create mode 100644 lld/docs/ELF/warn_backrefs.rst create mode 100644 lld/test/ELF/ppc64-tls-pcrel-le.s create mode 100644 lld/test/wasm/export-all.s create mode 100644 lld/test/wasm/map-file.s create mode 100644 lld/test/wasm/mutable-globals.s create mode 100644 lld/wasm/MapFile.cpp create mode 100644 lld/wasm/MapFile.h create mode 100644 lldb/test/API/functionalities/gdb_remote_client/TestQemuAArch64 [...] create mode 100644 lldb/test/API/functionalities/gdb_remote_client/basic_eh_frame- [...] copy lldb/test/API/{commands/expression/dollar-in-variable => tools/lldb-vscode/ru [...] create mode 100644 lldb/test/API/tools/lldb-vscode/runInTerminal/TestVSCode_runInT [...] create mode 100644 lldb/test/API/tools/lldb-vscode/runInTerminal/main.c create mode 100644 lldb/test/Shell/ScriptInterpreter/Lua/lua-python.test create mode 100644 lldb/test/Shell/ScriptInterpreter/Python/python.test create mode 100644 llvm/docs/WritingAnLLVMNewPMPass.rst create mode 100644 llvm/include/llvm/Analysis/ConstraintSystem.h create mode 100644 llvm/include/llvm/Transforms/HelloNew/HelloWorld.h delete mode 100644 llvm/include/llvm/Transforms/Instrumentation/HeapProfiler.h create mode 100644 llvm/include/llvm/Transforms/Instrumentation/MemProfiler.h create mode 100644 llvm/lib/Analysis/ConstraintSystem.cpp create mode 100644 llvm/lib/Transforms/HelloNew/CMakeLists.txt create mode 100644 llvm/lib/Transforms/HelloNew/HelloWorld.cpp copy llvm/lib/Transforms/{ => HelloNew}/LLVMBuild.txt (70%) rename llvm/lib/Transforms/Instrumentation/{HeapProfiler.cpp => MemProfiler.cpp} (68%) create mode 100644 llvm/lib/Transforms/Scalar/ConstraintElimination.cpp create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/combine-fabs.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge.mir create mode 100644 llvm/test/CodeGen/AArch64/parity.ll create mode 100644 llvm/test/CodeGen/AArch64/statepoint-call-lowering.ll copy llvm/test/CodeGen/AArch64/{vecreduce-fmax-legalization.ll => vecreduce-fmin-l [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/add_shl.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fract.f64.mir create mode 100644 llvm/test/CodeGen/AMDGPU/schedule-xdl-resource.ll create mode 100644 llvm/test/CodeGen/ARM/constant-island-SOImm-limit16.mir create mode 100644 llvm/test/CodeGen/ARM/parity.ll create mode 100644 llvm/test/CodeGen/ARM/vecreduce-fmax-legalization-soft-float.ll create mode 100644 llvm/test/CodeGen/ARM/vecreduce-fmin-legalization-soft-float.ll create mode 100644 llvm/test/CodeGen/ARM/vecreduce-fmul-legalization-soft-float.ll create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/isel-widen-truncate-illegal-elem.ll create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/widen-ext.ll create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/widen-trunc.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-overflow-toc.py create mode 100644 llvm/test/CodeGen/PowerPC/fusion-load-store.ll create mode 100644 llvm/test/CodeGen/PowerPC/pcrel-tls-local-exec.ll rename llvm/test/CodeGen/Thumb2/LowOverheadLoops/{basic-tail-pred.ll => tail-pred- [...] rename llvm/test/CodeGen/Thumb2/LowOverheadLoops/{tail-reduce.ll => tail-pred-redu [...] create mode 100644 llvm/test/CodeGen/X86/basic-block-sections-labels-functions-sec [...] create mode 100644 llvm/test/CodeGen/X86/pr47482.ll create mode 100644 llvm/test/DebugInfo/X86/debug-addr-dwarf64.ll create mode 100644 llvm/test/DebugInfo/X86/debug-aranges-dwarf64.ll create mode 100644 llvm/test/DebugInfo/X86/debug-frame-dwarf64.ll create mode 100644 llvm/test/DebugInfo/X86/debug-info-dwarf64.ll create mode 100644 llvm/test/DebugInfo/X86/debug-info-dwo-dwarf64.ll create mode 100644 llvm/test/DebugInfo/X86/debug-line-dwarf64.ll create mode 100644 llvm/test/DebugInfo/X86/debug-macro-dwarf64.ll create mode 100644 llvm/test/DebugInfo/X86/debug-names-dwarf64.ll create mode 100644 llvm/test/DebugInfo/X86/debug-pubtables-dwarf64.ll create mode 100644 llvm/test/DebugInfo/X86/debug-str-offsets-dwarf64.ll create mode 100644 llvm/test/DebugInfo/X86/debug-str-offsets-dwo-dwarf64.ll create mode 100644 llvm/test/DebugInfo/X86/debug-types-dwarf64.ll create mode 100644 llvm/test/DebugInfo/X86/dwarf64-support.ll create mode 100644 llvm/test/MC/PowerPC/pcrel-tls-local-exec-address-load-reloc.s create mode 100644 llvm/test/MC/PowerPC/pcrel-tls-local-exec-value-load-reloc.s create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/recursively-delete-dead [...] create mode 100644 llvm/test/Transforms/ConstraintElimination/dom.ll create mode 100644 llvm/test/Transforms/ConstraintElimination/geps.2d.ll create mode 100644 llvm/test/Transforms/ConstraintElimination/geps.ll create mode 100644 llvm/test/Transforms/ConstraintElimination/i128.ll create mode 100644 llvm/test/Transforms/ConstraintElimination/loops.ll create mode 100644 llvm/test/Transforms/ConstraintElimination/mixed.ll create mode 100644 llvm/test/Transforms/ConstraintElimination/uge.ll create mode 100644 llvm/test/Transforms/ConstraintElimination/ugt-ule.ll create mode 100644 llvm/test/Transforms/ConstraintElimination/ule.ll create mode 100644 llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-loop- [...] create mode 100644 llvm/test/Transforms/GCOVProfiling/split-indirectbr-critical-edges.ll create mode 100644 llvm/test/Transforms/HelloNew/helloworld.ll create mode 100644 llvm/test/Transforms/InferAddressSpaces/AMDGPU/self-phi.ll create mode 100644 llvm/test/Transforms/InferAddressSpaces/AMDGPU/unreachable-code [...] create mode 100644 llvm/test/Transforms/InstSimplify/fminmax-folds.ll create mode 100644 llvm/test/Transforms/JumpThreading/constant-fold-status.ll copy llvm/test/{Analysis/CostModel => Transforms/LICM}/AArch64/lit.local.cfg (100%) create mode 100644 llvm/test/Transforms/LICM/AArch64/sve-load-hoist.ll create mode 100644 llvm/test/Transforms/LoopIdiom/memcpy-vectors.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/X86/masked-memory-ops.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/AArch64/insertelement.ll create mode 100644 llvm/test/Transforms/Scalarizer/global-bug-2.ll create mode 100644 llvm/test/tools/llvm-cov/gcov/Inputs/abs-path.gcda create mode 100644 llvm/test/tools/llvm-cov/gcov/Inputs/abs-path.gcno create mode 100644 llvm/test/tools/llvm-cov/gcov/relative-only.test create mode 100644 llvm/test/tools/llvm-ml/builtin_types.test create mode 100644 llvm/test/tools/llvm-ml/proc.test create mode 100644 llvm/test/tools/llvm-ml/proc_frame.test create mode 100644 llvm/test/tools/llvm-ml/size_inference.test create mode 100644 llvm/test/tools/llvm-ml/struct_alignment.test create mode 100644 llvm/test/tools/llvm-ml/type_operators.test create mode 100644 llvm/test/tools/llvm-readobj/COFF/arm64-packed-unwind.s create mode 100644 llvm/unittests/Analysis/ConstraintSystemTest.cpp create mode 100644 llvm/unittests/CodeGen/AsmPrinterDwarfTest.cpp create mode 100644 llvm/unittests/CodeGen/DIETest.cpp create mode 100644 llvm/unittests/CodeGen/TestAsmPrinter.cpp create mode 100644 llvm/unittests/CodeGen/TestAsmPrinter.h create mode 100644 llvm/unittests/Support/raw_fd_stream_test.cpp create mode 100755 llvm/utils/convert-constraint-log-to-z3.py create mode 100644 llvm/utils/gn/secondary/llvm/lib/Transforms/HelloNew/BUILD.gn rename mlir/integration_test/Dialect/Linalg/{Conv => CPU}/test-conv-1d-call.mlir (100%) rename mlir/integration_test/Dialect/Linalg/{Conv => CPU}/test-conv-1d-ncw-call.ml [...] rename mlir/integration_test/Dialect/Linalg/{Conv => CPU}/test-conv-1d-nwc-call.ml [...] rename mlir/integration_test/Dialect/Linalg/{Conv => CPU}/test-conv-2d-call.mlir (100%) rename mlir/integration_test/Dialect/Linalg/{Conv => CPU}/test-conv-2d-nchw-call.m [...] rename mlir/integration_test/Dialect/Linalg/{Conv => CPU}/test-conv-2d-nhwc-call.m [...] rename mlir/integration_test/Dialect/Linalg/{Conv => CPU}/test-conv-3d-call.mlir (100%) rename mlir/integration_test/Dialect/Linalg/{Conv => CPU}/test-conv-3d-ncdhw-call. [...] rename mlir/integration_test/Dialect/Linalg/{Conv => CPU}/test-conv-3d-ndhwc-call. [...] create mode 100644 mlir/test/Dialect/OpenACC/invalid.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk_tk1/llvm-master-arm-spec2k6-Os updated (9620398097 -> 4b564f347f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/llvm-master-arm-spec2k6-Os in repository toolchain/ci/glibc. from 9620398097 x86: Install <sys/platform/x86.h> [BZ #26124] adds 13cd625885 hurd: Add __x86_get_cpu_features to ld.abilist adds b8d3e8fbaa y2038: nptl: Convert sem_{clock|timed}wait to support 64 bit time new 4b564f347f pselect.c: Pass a pointer to SYSCALL_CANCEL [BZ #26606] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: nptl/sem_clockwait.c | 20 +++++++++++++++++--- nptl/sem_timedwait.c | 20 +++++++++++++++++--- nptl/sem_wait.c | 5 +++-- nptl/sem_waitcommon.c | 12 ++++++------ nptl/semaphoreP.h | 13 +++++++++++++ sysdeps/mach/hurd/i386/ld.abilist | 1 + sysdeps/unix/sysv/linux/pselect.c | 9 ++++++--- 7 files changed, 63 insertions(+), 17 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

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