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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allnoconfig
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discards e8b745de6 2: update: binutils-gcc-linux: 449
new 4af035cf6 2: update: binutils-gcc-linux: 449
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01-reset_artifacts/console.log | 181 +-
02-prepare_abe/console.log | 436 +-
03-build_abe-binutils/console.log | 12034 ++++++------
04-build_abe-stage1/console.log | 16027 ++++++++--------
05-build_linux/console.log | 840 +-
07-check_regression/console.log | 2 +-
07-check_regression/results.regressions | 12 +-
08-update_baseline/console.log | 6 +-
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unknown user pushed a change to branch master
in repository binutils-gdb.
from 6eee0315f67 arm: Add support for Neoverse V1 CPU
new 99bb393f1d1 Handle 64bit breakpoints of WOW64 processes as SIGINT
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gdb/ChangeLog | 7 +++++++
gdb/nat/windows-nat.c | 15 +++++++++++++++
gdb/nat/windows-nat.h | 2 ++
gdb/windows-nat.c | 1 -
gdbserver/ChangeLog | 5 +++++
gdbserver/win32-low.cc | 4 ----
gdbserver/win32-low.h | 2 --
7 files changed, 29 insertions(+), 7 deletions(-)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-next-defconfig
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discards edcdede5d 2: update: llvm-linux: 6296
new 10fc9e00e 2: update: llvm-linux: 6299
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01-reset_artifacts/console.log | 174 +-
02-build_llvm/console.log | 12726 +++++++++++++--------------
03-build_linux/console.log | 722 +-
05-check_regression/console.log | 28 +-
05-check_regression/results.regressions | 8 +-
06-update_baseline/console.log | 102 +-
06-update_baseline/results.regressions | 8 +-
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results | 2 +-
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unknown user pushed a change to branch releases/gcc-9
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from 6ca87f2ae83 aarch64: Add support for Neoverse V1 CPU
new 6f06be1769d Add support for __jcvt intrinsic
new 3bec35d813c rtl_data: Add sp_is_clobbered_by_asm
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gcc/cfgexpand.c | 14 +++++++----
gcc/config/aarch64/aarch64-builtins.c | 18 ++++++++++++++
gcc/config/aarch64/aarch64-c.c | 1 +
gcc/config/aarch64/aarch64.h | 3 +++
gcc/config/aarch64/aarch64.md | 11 +++++++++
gcc/config/aarch64/arm_acle.h | 14 +++++++++++
gcc/config/i386/i386.c | 6 +++--
gcc/doc/sourcebuild.texi | 3 +++
gcc/emit-rtl.h | 3 +++
gcc/testsuite/gcc.target/aarch64/acle/jcvt_1.c | 15 ++++++++++++
gcc/testsuite/gcc.target/aarch64/acle/jcvt_2.c | 33 ++++++++++++++++++++++++++
gcc/testsuite/gcc.target/i386/pr97032.c | 23 ++++++++++++++++++
gcc/testsuite/lib/target-supports.exp | 21 ++++++++++++++++
13 files changed, 158 insertions(+), 7 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/aarch64/acle/jcvt_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/acle/jcvt_2.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr97032.c
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unknown user pushed a change to branch releases/gcc-8
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from 7409639ab56 AArch64: Update Armv8.4-a's FP16 FML intrinsics
new a8ec9cc2241 Add support for __jcvt intrinsic
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gcc/config/aarch64/aarch64-builtins.c | 18 ++++++++++++++
gcc/config/aarch64/aarch64-c.c | 1 +
gcc/config/aarch64/aarch64.h | 3 +++
gcc/config/aarch64/aarch64.md | 11 +++++++++
gcc/config/aarch64/arm_acle.h | 10 ++++++++
gcc/doc/sourcebuild.texi | 3 +++
gcc/testsuite/gcc.target/aarch64/acle/jcvt_1.c | 15 ++++++++++++
gcc/testsuite/gcc.target/aarch64/acle/jcvt_2.c | 33 ++++++++++++++++++++++++++
gcc/testsuite/lib/target-supports.exp | 21 ++++++++++++++++
9 files changed, 115 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/aarch64/acle/jcvt_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/acle/jcvt_2.c
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unknown user pushed a change to branch releases/gcc-10
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from 71c83e108de [RS6000] Power10 libffi fixes
new f0baed1fb6c rtl_data: Add sp_is_clobbered_by_asm
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gcc/cfgexpand.c | 14 +++++++++-----
gcc/config/i386/i386.c | 6 ++++--
gcc/emit-rtl.h | 3 +++
gcc/testsuite/gcc.target/i386/pr97032.c | 23 +++++++++++++++++++++++
4 files changed, 39 insertions(+), 7 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr97032.c
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unknown user pushed a change to branch master
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from 4b9d61f79c0 add move CTOR to auto_vec, use auto_vec for get_loop_exit_edges
new 50d9db203bc aarch64: Add support for Neoverse N2 CPU
new 637ad78cdf4 arm: Add support for Neoverse N2 CPU
new 61f7995398a libstdc++: Fix misnamed configure option in manual
new 42907ca9a49 libstdc++: Specialize ranges::__detail::__box for semiregul [...]
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gcc/config/aarch64/aarch64-cores.def | 3 +
gcc/config/aarch64/aarch64-tune.md | 2 +-
gcc/config/arm/arm-cpus.in | 11 ++++
gcc/config/arm/arm-tables.opt | 3 +
gcc/config/arm/arm-tune.md | 7 ++-
gcc/doc/invoke.texi | 10 +--
libstdc++-v3/doc/html/manual/configure.html | 3 +-
libstdc++-v3/doc/html/manual/status.html | 4 +-
libstdc++-v3/doc/xml/manual/configure.xml | 3 +-
libstdc++-v3/include/std/ranges | 68 ++++++++++++++++++--
.../std/ranges/adaptors/detail/semiregular_box.cc | 73 ++++++++++++++++++++++
11 files changed, 168 insertions(+), 19 deletions(-)
create mode 100644 libstdc++-v3/testsuite/std/ranges/adaptors/detail/semiregular_box.cc
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