Tcwg-commits June 2020

tcwg-commits@lists.linaro.org

5 participants
3532 discussions

[glibc] branch master updated (d2ba3677da -> 3ee1e0ec5c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository glibc. from d2ba3677da powerpc: Add support for POWER10 new 3ee1e0ec5c Update kernel version to 5.7 in tst-mman-consts.py. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: sysdeps/unix/sysv/linux/tst-mman-consts.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[binutils-gdb] branch master updated (a57f74bb7cc -> 8c190ce0383)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from a57f74bb7cc tic6x: Call _bfd_elf_add_dynamic_tags new 8c190ce0383 x86: Support VEX base opcode length > 1 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gas/ChangeLog | 5 +++++ gas/config/tc-i386.c | 8 ++------ 2 files changed, 7 insertions(+), 6 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_tk1/llvm-release-arm-spec2k6-O2_LTO updated (8f299fd2cff -> 77d76b71d7d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/llvm-release-arm-spec2k6-O2_LTO in repository toolchain/ci/llvm-project. from 8f299fd2cff Fixed false ThinLTO cache misses problem (PR 45819). adds 177a9ac3c6b [PowerPC] Unaligned FP default should apply to scalars only adds c69ed62ea19 [BPF] fix a bug for BTF pointee type pruning adds 97065683c6a [clangd] Fix DocumentOutline for concepts adds 0777c907268 Make LLVM_APPEND_VC_REV=OFF affect clang, lld, and lldb as well. adds f5bad9cac5d [BPF] fix incorrect type in BPFISelDAGToDAG readonly load o [...] adds 1f3be0e9b7b [PowerPC] Do not assume operand of ADDI is an immediate adds caa755f90e3 [BasicAA] Make BasicAA a cfg pass. adds 5ccc104c206 [compiler-rt] Reduce the number of threads in gcov test to [...] adds 28a6713e107 [ManagedStatic] Fix build errors with clang-tblgen in Debug [...] adds be4501f6e48 [InstCombine] prevent infinite loop with sub/abs of constan [...] adds 1a25347f574 [Driver] Support -fsanitize=shadow-call-stack on aarch64_be adds f9da0a7f36f [Driver] Support -fsanitize=shadow-call-stack and cfi-icall [...] adds 34f7e00333a Move RDF from Hexagon to Codegen adds fe73b9416de [X86][NFC] Generalize the naming of "Retpoline Thunks" and [...] adds a09ebfdafb9 [X86] Refactor X86IndirectThunks.cpp to Accommodate Mitigat [...] adds 071acfdd469 [X86] Add Indirect Thunk Support to X86 to mitigate Load Va [...] adds 6a4589599d7 [X86] Add RET-hardening Support to mitigate Load Value Inje [...] adds e3ba468fc3c [X86] Add a Pass that builds a Condensed CFG for Load Value [...] adds 2530f4e0ce4 [X86] Add Support for Load Hardening to Mitigate Load Value [...] adds 5bc4d476f34 Revert "[X86] Add Support for Load Hardening to Mitigate Lo [...] adds d758416a915 Revert "[X86] Add a Pass that builds a Condensed CFG for Lo [...] adds ac40e7a02ef [X86] Fix to X86LoadValueInjectionRetHardeningPass for poss [...] adds 1d8639336d9 [X86] Add tests to clang Driver to ensure that SLH/Retpolin [...] adds 363720c2b0f [X86] Add a Pass that builds a Condensed CFG for Load Value [...] adds 8aa8abae349 [X86] Add Support for Load Hardening to Mitigate Load Value [...] adds 72bff7855d8 [X86] Add an Unoptimized Load Value Injection (LVI) Load Ha [...] adds d24d5c8e308 fixed broken test after cherry pick adds 9bf7ca2c92a [RISCV] Fix sysroot tests without GCC on RISC-V hosts with GCC adds f8e49af4f1a [LegalizeTypes][RISCV] Correctly sign-extend comparison for [...] adds 71c14cd5aee [RISCV] Fix passing two floating-point values in complex se [...] adds 249fef00d92 [RISCV64] Emit correct lib call for fp(float/double) to ui/si adds 5fa1f1e9f44 [RISCV-V] Provide muldi3 builtin assembly implementation adds 43ca67c05d2 [RISCV] Fix incorrect FP base CFI offset for variable argum [...] adds 04b0a4e22e3 Provide anchor for compiler extensions adds 69fb858731e [AArch64] Fix mismatch in prologue and epilogue for funclet [...] adds a110c3fc8cd [AArch64] Change AArch64 Windows EH UnwindHelp object to be [...] adds b294e611271 [PPCAsmPrinter] support 'L' output template for memory operands adds 76ceebb0d96 [DAGCombine] Check the uses of negated floating constant an [...] adds 77d76b71d7d [libc++] Fix recursive instantiation in std::array. No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/FindSymbols.cpp | 7 +- .../clangd/unittests/FindSymbolsTests.cpp | 9 + clang/docs/ClangCommandLineReference.rst | 4 + clang/include/clang/Driver/Options.td | 8 + clang/lib/Basic/CMakeLists.txt | 4 +- clang/lib/CodeGen/TargetInfo.cpp | 3 +- clang/lib/Driver/SanitizerArgs.cpp | 3 +- clang/lib/Driver/ToolChain.cpp | 9 +- clang/lib/Driver/ToolChains/Arch/X86.cpp | 23 + clang/test/CodeGen/riscv64-lp64-abi.c | 21 + clang/test/CodeGen/riscv64-lp64f-lp64d-abi.c | 29 + clang/test/Driver/fsanitize.c | 5 + clang/test/Driver/riscv32-toolchain-extra.c | 1 + clang/test/Driver/riscv64-toolchain-extra.c | 1 + clang/test/Driver/x86-target-features.c | 24 + .../builtins/riscv/{mulsi3.S => int_mul_impl.inc} | 14 +- compiler-rt/lib/builtins/riscv/muldi3.S | 11 + compiler-rt/lib/builtins/riscv/mulsi3.S | 23 +- .../Inputs/instrprof-gcov-multithread_fork.cpp | 20 +- libcxx/include/array | 2 +- lld/Common/CMakeLists.txt | 4 +- lldb/source/CMakeLists.txt | 4 +- llvm/cmake/modules/LLVMConfig.cmake.in | 2 + llvm/docs/CMake.rst | 2 +- .../Hexagon => include/llvm/CodeGen}/RDFGraph.h | 0 .../Hexagon => include/llvm/CodeGen}/RDFLiveness.h | 0 .../llvm/CodeGen}/RDFRegisters.h | 0 llvm/include/llvm/Support/ManagedStatic.h | 4 +- llvm/lib/Analysis/BasicAliasAnalysis.cpp | 5 +- llvm/lib/CodeGen/CMakeLists.txt | 3 + llvm/lib/{Target/Hexagon => CodeGen}/RDFGraph.cpp | 10 +- .../{Target/Hexagon => CodeGen}/RDFLiveness.cpp | 6 +- .../{Target/Hexagon => CodeGen}/RDFRegisters.cpp | 2 +- .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 14 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 26 +- llvm/lib/Extensions/Extensions.cpp | 15 + llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 101 ++- llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp | 2 +- llvm/lib/Target/BPF/BTFDebug.cpp | 32 + llvm/lib/Target/Hexagon/CMakeLists.txt | 3 - llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp | 6 +- llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp | 6 +- llvm/lib/Target/Hexagon/RDFCopy.cpp | 6 +- llvm/lib/Target/Hexagon/RDFCopy.h | 6 +- llvm/lib/Target/Hexagon/RDFDeadCode.cpp | 4 +- llvm/lib/Target/Hexagon/RDFDeadCode.h | 4 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 7 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 3 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 4 + llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 4 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 34 + llvm/lib/Target/X86/CMakeLists.txt | 4 +- llvm/lib/Target/X86/ImmutableGraph.h | 446 ++++++++++ llvm/lib/Target/X86/X86.h | 8 +- llvm/lib/Target/X86/X86.td | 16 + llvm/lib/Target/X86/X86FastISel.cpp | 4 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 10 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 81 +- llvm/lib/Target/X86/X86ISelLowering.h | 4 +- llvm/lib/Target/X86/X86IndirectThunks.cpp | 364 +++++++++ llvm/lib/Target/X86/X86InstrCompiler.td | 16 +- llvm/lib/Target/X86/X86InstrControl.td | 22 +- llvm/lib/Target/X86/X86InstrInfo.td | 4 +- .../X86/X86LoadValueInjectionLoadHardening.cpp | 900 +++++++++++++++++++++ .../X86/X86LoadValueInjectionRetHardening.cpp | 143 ++++ llvm/lib/Target/X86/X86MCInstLower.cpp | 8 +- llvm/lib/Target/X86/X86RetpolineThunks.cpp | 286 ------- llvm/lib/Target/X86/X86Subtarget.h | 27 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 9 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 2 +- llvm/test/Analysis/BasicAA/phi-values-usage.ll | 6 +- .../CodeGen/AArch64/funclet-match-add-sub-stack.ll | 62 ++ llvm/test/CodeGen/AArch64/seh-finally.ll | 24 +- llvm/test/CodeGen/AArch64/wineh-try-catch-cbz.ll | 7 +- .../CodeGen/AArch64/wineh-try-catch-realign.ll | 2 +- llvm/test/CodeGen/AArch64/wineh-try-catch.ll | 14 +- .../CodeGen/AArch64/wineh-unwindhelp-via-fp.ll | 69 ++ llvm/test/CodeGen/BPF/BTF/pruning-const.ll | 120 +++ llvm/test/CodeGen/BPF/BTF/pruning-typedef.ll | 128 +++ llvm/test/CodeGen/BPF/rodata_5.ll | 50 ++ llvm/test/CodeGen/PowerPC/fma-combine.ll | 101 +++ .../CodeGen/PowerPC/inlineasm-output-template.ll | 13 +- llvm/test/CodeGen/PowerPC/pr45186.ll | 132 +++ llvm/test/CodeGen/PowerPC/pr45432.ll | 52 ++ llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll | 10 + llvm/test/CodeGen/RISCV/rv64i-single-softfloat.ll | 124 ++- llvm/test/CodeGen/RISCV/vararg.ll | 8 +- llvm/test/CodeGen/X86/O0-pipeline.ll | 5 +- llvm/test/CodeGen/X86/O3-pipeline.ll | 8 +- .../test/CodeGen/X86/lvi-hardening-gadget-graph.ll | 129 +++ llvm/test/CodeGen/X86/lvi-hardening-indirectbr.ll | 281 +++++++ llvm/test/CodeGen/X86/lvi-hardening-loads.ll | 144 ++++ llvm/test/CodeGen/X86/lvi-hardening-ret.ll | 72 ++ llvm/test/Other/opt-O2-pipeline.ll | 4 - llvm/test/Other/opt-O3-pipeline.ll | 4 - llvm/test/Other/opt-Os-pipeline.ll | 4 - llvm/test/Transforms/InstCombine/abs-1.ll | 18 + 98 files changed, 3925 insertions(+), 562 deletions(-) copy compiler-rt/lib/builtins/riscv/{mulsi3.S => int_mul_impl.inc} (61%) create mode 100644 compiler-rt/lib/builtins/riscv/muldi3.S rename llvm/{lib/Target/Hexagon => include/llvm/CodeGen}/RDFGraph.h (100%) rename llvm/{lib/Target/Hexagon => include/llvm/CodeGen}/RDFLiveness.h (100%) rename llvm/{lib/Target/Hexagon => include/llvm/CodeGen}/RDFRegisters.h (100%) rename llvm/lib/{Target/Hexagon => CodeGen}/RDFGraph.cpp (99%) rename llvm/lib/{Target/Hexagon => CodeGen}/RDFLiveness.cpp (99%) rename llvm/lib/{Target/Hexagon => CodeGen}/RDFRegisters.cpp (99%) create mode 100644 llvm/lib/Target/X86/ImmutableGraph.h create mode 100644 llvm/lib/Target/X86/X86IndirectThunks.cpp create mode 100644 llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp create mode 100644 llvm/lib/Target/X86/X86LoadValueInjectionRetHardening.cpp delete mode 100644 llvm/lib/Target/X86/X86RetpolineThunks.cpp create mode 100644 llvm/test/CodeGen/AArch64/funclet-match-add-sub-stack.ll create mode 100644 llvm/test/CodeGen/AArch64/wineh-unwindhelp-via-fp.ll create mode 100644 llvm/test/CodeGen/BPF/BTF/pruning-const.ll create mode 100644 llvm/test/CodeGen/BPF/BTF/pruning-typedef.ll create mode 100644 llvm/test/CodeGen/BPF/rodata_5.ll create mode 100644 llvm/test/CodeGen/PowerPC/pr45186.ll create mode 100644 llvm/test/CodeGen/PowerPC/pr45432.ll create mode 100644 llvm/test/CodeGen/X86/lvi-hardening-gadget-graph.ll create mode 100644 llvm/test/CodeGen/X86/lvi-hardening-indirectbr.ll create mode 100644 llvm/test/CodeGen/X86/lvi-hardening-loads.ll create mode 100644 llvm/test/CodeGen/X86/lvi-hardening-ret.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk_tk1/llvm-release-arm-spec2k6-O2_LTO updated (eb9a24a6b6b -> d8d451ec344)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/llvm-release-arm-spec2k6-O2_LTO in repository toolchain/ci/gcc. from eb9a24a6b6b Fortran : ICE in resolve_fl_procedure PR95708 adds f541655e8b9 Fix memory corruption with vector and variant record adds 449246af10b PR fortran/95587 - ICE in gfc_target_encode_expr, at fortra [...] adds 84323d9fa75 PR fortran/95689 - ICE in check_sym_interfaces, at fortran/ [...] adds ea3f1f23478 Daily bump. adds ce2da7f82f4 libstdc++: Fix std::from_chars to ignore leading zeros in base 2 adds e3d976ae009 Revert "PR fortran/95689 - ICE in check_sym_interfaces, at [...] adds c66d68d1e1e Daily bump. adds 12cdfdd5b14 x96: Remove PTA_CLWB from PTA_ICELAKE_CLIENT adds 597b99c3221 Daily bump. adds 53bc489468c d: Fix ICE in uda_attribute_p when looking up unknown attribute adds 57096f5c52b d: Fix ICE during error recovery in semantic pass adds de6a3297416 Daily bump. adds cb797c730dd PR fortran/95881 - ICE in resolve_symbol, at fortran/resolv [...] adds d8f8749e9c8 Daily bump. adds d8d451ec344 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 9 +++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 5 ++ gcc/ada/gcc-interface/trans.c | 18 ++++-- gcc/config/i386/i386.h | 4 +- gcc/d/ChangeLog | 18 ++++++ gcc/d/d-attribs.cc | 9 ++- gcc/d/dmd/expressionsem.c | 1 + gcc/fortran/ChangeLog | 46 +++++++++++++++ gcc/fortran/match.c | 5 ++ gcc/fortran/resolve.c | 1 + gcc/testsuite/ChangeLog | 54 ++++++++++++++++++ gcc/testsuite/gdc.dg/pr95173.d | 10 ++++ gcc/testsuite/gdc.dg/pr95250.d | 18 ++++++ gcc/testsuite/gfortran.dg/pr95587.f90 | 13 +++++ gcc/testsuite/gfortran.dg/pr95881.f90 | 11 ++++ libstdc++-v3/ChangeLog | 10 ++++ libstdc++-v3/include/std/charconv | 8 ++- libstdc++-v3/testsuite/20_util/from_chars/1.cc | 19 +++++-- libstdc++-v3/testsuite/20_util/from_chars/3.cc | 79 ++++++++++++++++++++++++++ 20 files changed, 321 insertions(+), 19 deletions(-) create mode 100644 gcc/testsuite/gdc.dg/pr95173.d create mode 100644 gcc/testsuite/gdc.dg/pr95250.d create mode 100644 gcc/testsuite/gfortran.dg/pr95587.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr95881.f90 create mode 100644 libstdc++-v3/testsuite/20_util/from_chars/3.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_tk1/llvm-release-arm-spec2k6-O2_LTO updated (4e319fdc -> c1f89a73)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/llvm-release-arm-spec2k6-O2_LTO in repository toolchain/ci/base-artifacts. discards 4e319fdc 0: update: binutils-gcc-glibc-llvm: 1 new c1f89a73 0: update: binutils-gcc-glibc-llvm: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4e319fdc) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk_tk1/llvm-release-arm [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 172 +- 02-prepare_abe/console.log | 420 +- 03-build_abe-binutils/console.log | 11204 +- 04-build_abe-stage1/console.log | 18194 ++-- 05-build_abe-linux/console.log | 292 +- 06-build_abe-glibc/console.log | 38485 +++---- 07-build_abe-stage2/console.log | 42339 ++++---- 08-build_llvm-true/console.log | 12669 +-- 10-benchmark--O2_LTO_marm/benchmark-start.log | 2 +- 10-benchmark--O2_LTO_marm/benchmark.log | 6 +- 10-benchmark--O2_LTO_marm/console.log | 154 +- 11-check_regression/console.log | 760 +- 11-check_regression/results-0.csv | 121 +- 11-check_regression/results-1.csv | 117 +- 11-check_regression/results-brief.csv | 38 +- 11-check_regression/results-full.csv | 125 +- 11-check_regression/results.csv | 48 +- 11-check_regression/results.log | 2690 +- 12-update_baseline/console.log | 774 +- 12-update_baseline/results-0.csv | 121 +- 12-update_baseline/results-1.csv | 117 +- 12-update_baseline/results-brief.csv | 38 +- 12-update_baseline/results-full.csv | 125 +- 12-update_baseline/results.csv | 48 +- 12-update_baseline/results.log | 2718 +- console.log | 125497 +++++++++++------------ jenkins/manifest.sh | 14 +- results_id | 2 +- 28 files changed, 128599 insertions(+), 128691 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[glibc] branch master updated (81b1c8cbb5 -> d2ba3677da)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository glibc. from 81b1c8cbb5 hurd: Simplify usleep timeout computation new d2ba3677da powerpc: Add support for POWER10 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: sysdeps/powerpc/dl-procinfo.h | 11 ++++++++++- sysdeps/powerpc/powerpc32/power10/Implies | 2 ++ sysdeps/powerpc/powerpc32/power10/fpu/multiarch/Implies | 1 + sysdeps/powerpc/powerpc32/power10/multiarch/Implies | 1 + sysdeps/powerpc/powerpc64/be/power10/Implies | 2 ++ sysdeps/powerpc/powerpc64/be/power10/fpu/Implies | 1 + sysdeps/powerpc/powerpc64/be/power10/fpu/multiarch/Implies | 1 + sysdeps/powerpc/powerpc64/be/power10/multiarch/Implies | 1 + sysdeps/powerpc/powerpc64/le/power10/Implies | 2 ++ sysdeps/powerpc/powerpc64/le/power10/fpu/Implies | 1 + sysdeps/powerpc/powerpc64/le/power10/fpu/multiarch/Implies | 1 + sysdeps/powerpc/powerpc64/le/power10/multiarch/Implies | 1 + sysdeps/powerpc/preconfigure | 2 +- sysdeps/powerpc/preconfigure.ac | 2 +- 14 files changed, 26 insertions(+), 3 deletions(-) create mode 100644 sysdeps/powerpc/powerpc32/power10/Implies create mode 100644 sysdeps/powerpc/powerpc32/power10/fpu/multiarch/Implies create mode 100644 sysdeps/powerpc/powerpc32/power10/multiarch/Implies create mode 100644 sysdeps/powerpc/powerpc64/be/power10/Implies create mode 100644 sysdeps/powerpc/powerpc64/be/power10/fpu/Implies create mode 100644 sysdeps/powerpc/powerpc64/be/power10/fpu/multiarch/Implies create mode 100644 sysdeps/powerpc/powerpc64/be/power10/multiarch/Implies create mode 100644 sysdeps/powerpc/powerpc64/le/power10/Implies create mode 100644 sysdeps/powerpc/powerpc64/le/power10/fpu/Implies create mode 100644 sysdeps/powerpc/powerpc64/le/power10/fpu/multiarch/Implies create mode 100644 sysdeps/powerpc/powerpc64/le/power10/multiarch/Implies -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[gcc] branch master updated (95d7d7f9292 -> e6cc67f6616)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 95d7d7f9292 testsuite: Fix coding style. new e6cc67f6616 PR fortran/71706 - ICE on using sync images with -fcheck=bounds The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/fortran/trans-stmt.c | 6 +++--- gcc/testsuite/gfortran.dg/pr71706.f90 | 10 ++++++++++ 2 files changed, 13 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gfortran.dg/pr71706.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[binutils-gdb] branch master updated (a3ca48cdda7 -> a57f74bb7cc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from a3ca48cdda7 [gdb/testsuite] Emit unresolved for unknown proc new a57f74bb7cc tic6x: Call _bfd_elf_add_dynamic_tags The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/ChangeLog | 5 +++++ bfd/elf32-tic6x.c | 35 ++------------------------------- ld/ChangeLog | 17 ++++++++++++++++ ld/testsuite/ld-tic6x/shlib-1.rd | 6 +++--- ld/testsuite/ld-tic6x/shlib-1b.rd | 6 +++--- ld/testsuite/ld-tic6x/shlib-1r.rd | 6 +++--- ld/testsuite/ld-tic6x/shlib-1rb.rd | 6 +++--- ld/testsuite/ld-tic6x/shlib-app-1.rd | 6 +++--- ld/testsuite/ld-tic6x/shlib-app-1b.rd | 6 +++--- ld/testsuite/ld-tic6x/shlib-app-1r.rd | 6 +++--- ld/testsuite/ld-tic6x/shlib-app-1rb.rd | 6 +++--- ld/testsuite/ld-tic6x/shlib-noindex.rd | 6 +++--- ld/testsuite/ld-tic6x/static-app-1.rd | 6 +++--- ld/testsuite/ld-tic6x/static-app-1b.rd | 6 +++--- ld/testsuite/ld-tic6x/static-app-1r.rd | 6 +++--- ld/testsuite/ld-tic6x/static-app-1rb.rd | 6 +++--- 16 files changed, 63 insertions(+), 72 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[gcc] branch master updated (baa4578911d -> 95d7d7f9292)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from baa4578911d testsuite: Adjust testcase for recent -Wnonnull changes new 008842d741e do not include <utility> from tree-vectorizer.h new 9a4a52e359b tree-optimization/95916 - treat scalar ops explicitely new 95d7d7f9292 testsuite: Fix coding style. The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/c-c++-common/builtin-arith-overflow-1.c | 4 ++-- gcc/testsuite/gcc.dg/vect/pr95916.c | 13 +++++++++++++ gcc/tree-vect-slp.c | 15 +++++++++++++++ gcc/tree-vectorizer.h | 2 +- 4 files changed, 31 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/vect/pr95916.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[gcc] branch master updated (fe7c43a7bc7 -> baa4578911d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from fe7c43a7bc7 testsuite: Adjust testcase for recent -Wnonnull changes new baa4578911d testsuite: Adjust testcase for recent -Wnonnull changes The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/c-c++-common/builtin-arith-overflow-1.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits June 2020