Tcwg-commits May 2020

tcwg-commits@lists.linaro.org

6 participants
13142 discussions

[gcc] branch master updated (deea3defc98 -> 15c55b96a72)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from deea3defc98 Allow only ignored files in ChangeLog entries. new 15c55b96a72 Fix incorrect handling of Component_Size The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ada/ChangeLog | 6 ++++++ gcc/ada/gcc-interface/decl.c | 21 ++++++++++++++++++--- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gnat.dg/array40.adb | 21 +++++++++++++++++++++ gcc/testsuite/gnat.dg/array40_pkg.ads | 12 ++++++++++++ 5 files changed, 62 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gnat.dg/array40.adb create mode 100644 gcc/testsuite/gnat.dg/array40_pkg.ads -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (caffb99b6929 -> 9cb1fd0efd19)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/linux. from caffb99b6929 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net adds b34cb07dde7c sched/fair: Fix enqueue_task_fair() warning some more adds ad32bb41fca6 sched/debug: Fix requested task uclamp values shown in procfs adds 39f23ce07b93 sched/fair: Fix unthrottle_cfs_rq() for leaf_cfs_rq list adds 9e61d12bac20 Merge tag 'sched-urgent-2020-05-24' of git://git.kernel.or [...] adds d7110a26e590 x86/mmiotrace: Use cpumask_available() for cpumask_var_t v [...] adds 187b96db5ca7 x86/unwind/orc: Fix unwind_get_return_address_ptr() for in [...] adds 667b6249b71c Merge tag 'x86-urgent-2020-05-24' of git://git.kernel.org/ [...] adds 081d5150845b efi/libstub: Avoid returning uninitialized data from setup [...] adds 8f592ada59b3 efi/earlycon: Fix early printk for wider fonts adds fd6261959806 efi/libstub/x86: Avoid EFI map buffer alloc in allocate_e820() adds 3d8c11efd528 efi: cper: Add support for printing Firmware Error Record [...] adds e78d334a5470 x86/boot: Mark global variables as static adds e8da08a08823 efi: Pull up arch-specific prototype efi_systab_show_arch() adds b4f1874c6216 tpm: check event log version before reading final events adds 9bb4cbf4862d Merge tag 'efi-fixes-for-v5.7-rc6' of git://git.kernel.org [...] adds 98790bbac4db Merge tag 'efi-urgent-2020-05-24' of git://git.kernel.org/ [...] adds 9cb1fd0efd19 Linux 5.7-rc7 No new revisions were added by this update. Summary of changes: Makefile | 2 +- arch/x86/boot/tools/build.c | 16 ++++----- arch/x86/kernel/unwind_orc.c | 7 ++++ arch/x86/mm/mmio-mod.c | 4 +-- drivers/firmware/efi/cper.c | 62 +++++++++++++++++++++++++++++++++ drivers/firmware/efi/earlycon.c | 14 ++++---- drivers/firmware/efi/efi.c | 5 +-- drivers/firmware/efi/libstub/arm-stub.c | 6 +++- drivers/firmware/efi/libstub/efistub.h | 13 +++++++ drivers/firmware/efi/libstub/mem.c | 2 -- drivers/firmware/efi/libstub/tpm.c | 5 +-- drivers/firmware/efi/libstub/x86-stub.c | 24 +++++-------- drivers/firmware/efi/tpm.c | 5 ++- include/linux/cper.h | 9 +++++ include/linux/efi.h | 2 ++ kernel/sched/debug.c | 4 +-- kernel/sched/fair.c | 49 +++++++++++++++++++------- 17 files changed, 173 insertions(+), 56 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (2bb822bc902 -> 760f45eacad)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/llvm-project. from 2bb822bc902 [X86] Add family/model for Intel Comet Lake CPUs for -march [...] adds 8310c9b7410 [X86][AVX] Call SimplifyDemandedBits on MaskedLoadSDNode wi [...] adds f794808bb9e [LLD/MinGW]: Expose --thinlto-cache-dir adds 04d32d7ac18 X86TargetMachine.h - remove unnecessary X86Subtarget forwar [...] adds ffb367217d6 [X86] Move CONCAT_VECTORS/INSERT_SUBVECTOR actions inside l [...] adds 72210ce7f57 Fix Wdocumentation warnings after argument renaming. NFC. adds 16031067252 [TargetLowering] Improve expandFunnelShift shift amount masking adds 478f2ce5d3c [X86] Pull out repeated DemandedBits signmask variable. NFC. adds d0f2a8a0492 X86Subtarget.h - remove unnecessary TargetMachine.h include. NFC. adds 5e9392deaf5 Add explicit traversal mode to matchers for implicit constructors adds 04ed532ef0c Fix skip-invisible with overloaded method calls adds 3ed8ebc2f6b Fix return values of some matcher functions adds 510b0f42371 LoopSimplify.h - reduce unnecessary includes to forward dec [...] adds a6502560628 AMDGPULibFunc - fix include order. NFC. adds 725b3463c53 AMDGPUTargetObjectFile.h - remove unnecessary includes. NFC. adds 15224408f0d [VPlan] Use VPUser for VPWidenSelectRecipe operands (NFC). adds b05b69e056a AMDGPUInstPrinter.cpp - add CommandLine.h include. NFC. adds 7eed772a279 [PatternMatch] abbreviate vector inst matchers; NFC adds c048a02b5b2 [InstCombine] fold FP trunc into exact itofp adds 4c5818dd8cd [clang-tidy] Fix potential assert in use-noexcept check adds 86e3abc9e63 [PowerPC] Add some InstAlias definitions adds 71bed8206b3 AMDGPU.h - reduce TargetMachine.h include. NFC. adds 1e7865d9464 [X86] SimplifyMultipleUseDemandedBitsForTargetNode - add in [...] adds d43fac052e1 [PhaseOrdering] adjust test to use default alias analysis w [...] adds 0deab8a54fd [LV] Either get invariant condition OR vector condition. adds 57bb4787d72 [Pass Manager] remove EarlyCSE as clean-up for VectorCombine adds e508d643cfd [X86][AVX] Fold extract_subvector(broadcast(x),c) -> extrac [...] adds 8a5aea7b504 [X86][AVX] Fold extract_subvector(subv_broadcast(x),c) -> (x) adds 2be92b7f7e4 Fix ignore-traversal to call correct method adds e60de8c825d Add missing test adds 51dec88c5df [X86] Remove isCommutable flag from MULX instructions. adds d0da5d2bbe8 Change default traversal in AST Matchers to ignore invisible nodes adds 52b03aaa22f [clang-format][PR46043] Parse git config w/ implicit values adds 838d12207b0 [TargetLoweringObjectFileImpl] Use llvm::transform adds 4b8632e174d [mlir] Expand operand adapter to take attributes adds 20e9fc55feb [MCDwarf] Delete unneeded DW_AT_prototyped for DW_TAG_label adds 1b79509f97b [MCDwarf] Delete unneeded DW_AT_unspecified_parameters new 760f45eacad [CMake] Properly handle the LTO cache arguments for MinGW The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../clang-tidy/bugprone/StringConstructorCheck.cpp | 3 +- .../bugprone/StringLiteralWithEmbeddedNulCheck.cpp | 4 +- .../clang-tidy/modernize/UseNoexceptCheck.cpp | 25 ++- .../clang-tidy/modernize/UseNoexceptCheck.h | 2 +- .../readability/RedundantStringInitCheck.cpp | 5 +- .../readability/UppercaseLiteralSuffixCheck.cpp | 4 +- .../checkers/modernize-use-noexcept-error.cpp | 6 + clang/docs/ReleaseNotes.rst | 9 +- clang/include/clang/AST/ParentMapContext.h | 2 +- clang/include/clang/ASTMatchers/ASTMatchers.h | 4 +- clang/lib/AST/Expr.cpp | 9 +- .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 18 +- clang/tools/clang-format/git-clang-format | 7 +- clang/unittests/AST/ASTTraverserTest.cpp | 81 ++++++++ .../unittests/ASTMatchers/ASTMatchersNodeTest.cpp | 6 +- .../ASTMatchers/ASTMatchersTraversalTest.cpp | 20 ++ lld/MinGW/Driver.cpp | 2 + lld/MinGW/Options.td | 2 + lld/test/ELF/ppc32-call-stub-pic.s | 2 +- lld/test/MinGW/driver.test | 3 + llvm/cmake/modules/HandleLLVMOptions.cmake | 6 +- llvm/include/llvm/IR/PatternMatch.h | 8 +- llvm/include/llvm/Transforms/Utils/LoopSimplify.h | 8 +- llvm/lib/Analysis/InstructionSimplify.cpp | 6 +- llvm/lib/Analysis/VectorUtils.cpp | 6 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 5 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 6 +- llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 2 +- llvm/lib/MC/MCDwarf.cpp | 18 +- llvm/lib/Passes/PassBuilder.cpp | 1 - llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 3 +- .../Target/AMDGPU/AMDGPUFixFunctionBitcasts.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h | 1 + llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 1 + llvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp | 10 +- llvm/lib/Target/AMDGPU/AMDGPULibFunc.h | 1 + llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPUTargetObjectFile.h | 2 - .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 1 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 4 +- llvm/lib/Target/ARM/MVETailPredication.cpp | 8 +- llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 18 ++ llvm/lib/Target/PowerPC/PPCInstrHTM.td | 5 + llvm/lib/Target/PowerPC/PPCInstrInfo.td | 31 +++ llvm/lib/Target/X86/X86ISelLowering.cpp | 57 +++++- llvm/lib/Target/X86/X86IndirectThunks.cpp | 1 + llvm/lib/Target/X86/X86InstrArithmetic.td | 1 - llvm/lib/Target/X86/X86MCInstLower.cpp | 1 + .../lib/Target/X86/X86SpeculativeLoadHardening.cpp | 1 + llvm/lib/Target/X86/X86Subtarget.cpp | 4 + llvm/lib/Target/X86/X86Subtarget.h | 4 +- llvm/lib/Target/X86/X86TargetMachine.h | 1 - llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 8 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 91 ++++----- .../Transforms/InstCombine/InstCombineCompares.cpp | 6 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 2 +- .../InstCombine/InstCombineVectorOps.cpp | 28 +-- .../InstCombine/InstructionCombining.cpp | 26 ++- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 26 +-- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 4 +- llvm/lib/Transforms/Vectorize/VPlan.h | 12 +- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 24 +-- llvm/test/CodeGen/AMDGPU/opt-pipeline.ll | 3 - .../PowerPC/2007-04-30-InlineAsmEarlyClobber.ll | 2 +- llvm/test/CodeGen/PowerPC/2009-09-18-carrybit.ll | 4 +- llvm/test/CodeGen/PowerPC/2010-02-12-saveCR.ll | 2 +- .../PowerPC/CompareEliminationSpillIssue.ll | 2 +- llvm/test/CodeGen/PowerPC/atomics-regression.ll | 60 +++--- llvm/test/CodeGen/PowerPC/crbits.ll | 6 +- llvm/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll | 2 +- .../test/CodeGen/PowerPC/expand-contiguous-isel.ll | 4 +- llvm/test/CodeGen/PowerPC/expand-isel.ll | 2 +- llvm/test/CodeGen/PowerPC/f128-compare.ll | 12 +- llvm/test/CodeGen/PowerPC/fast-isel-binary.ll | 6 +- llvm/test/CodeGen/PowerPC/fold-remove-li.ll | 2 +- llvm/test/CodeGen/PowerPC/fold-zero.ll | 6 +- llvm/test/CodeGen/PowerPC/funnel-shift.ll | 8 +- .../CodeGen/PowerPC/handle-f16-storage-type.ll | 2 +- llvm/test/CodeGen/PowerPC/htm.ll | 10 +- llvm/test/CodeGen/PowerPC/i1-ext-fold.ll | 8 +- llvm/test/CodeGen/PowerPC/i64_fp_round.ll | 2 +- llvm/test/CodeGen/PowerPC/ifcvt.ll | 4 +- llvm/test/CodeGen/PowerPC/inc-of-add.ll | 12 +- .../CodeGen/PowerPC/loop-instr-form-prepare.ll | 2 +- llvm/test/CodeGen/PowerPC/machine-pre.ll | 2 +- llvm/test/CodeGen/PowerPC/memcmp.ll | 8 +- llvm/test/CodeGen/PowerPC/mul-const.ll | 6 +- llvm/test/CodeGen/PowerPC/noPermuteFormasking.ll | 6 +- llvm/test/CodeGen/PowerPC/optcmp.ll | 20 +- llvm/test/CodeGen/PowerPC/optimize-andiso.ll | 2 +- .../CodeGen/PowerPC/pcrel-call-linkage-leaf.ll | 8 +- llvm/test/CodeGen/PowerPC/popcnt-zext.ll | 16 +- llvm/test/CodeGen/PowerPC/ppc-crbits-onoff.ll | 4 +- llvm/test/CodeGen/PowerPC/ppc64-P9-mod.ll | 4 +- llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll | 4 +- llvm/test/CodeGen/PowerPC/pr44183.ll | 2 +- .../CodeGen/PowerPC/remove-redundant-load-imm.ll | 2 +- llvm/test/CodeGen/PowerPC/sat-add.ll | 60 +++--- llvm/test/CodeGen/PowerPC/select_const.ll | 56 +++--- llvm/test/CodeGen/PowerPC/setcc-logic.ll | 6 +- llvm/test/CodeGen/PowerPC/shift128.ll | 2 +- llvm/test/CodeGen/PowerPC/signbit-shift.ll | 12 +- llvm/test/CodeGen/PowerPC/sms-cpy-1.ll | 6 +- llvm/test/CodeGen/PowerPC/sms-phi-2.ll | 14 +- llvm/test/CodeGen/PowerPC/spe.ll | 18 +- llvm/test/CodeGen/PowerPC/srem-lkk.ll | 12 +- llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll | 184 +++++++++--------- llvm/test/CodeGen/PowerPC/stack-guard-reassign.ll | 2 +- llvm/test/CodeGen/PowerPC/stack-realign.ll | 12 +- llvm/test/CodeGen/PowerPC/store-combine.ll | 4 +- llvm/test/CodeGen/PowerPC/sub-of-not.ll | 12 +- llvm/test/CodeGen/PowerPC/subc.ll | 2 +- llvm/test/CodeGen/PowerPC/subreg-postra.ll | 2 +- .../PowerPC/umulo-128-legalisation-lowering.ll | 4 +- llvm/test/CodeGen/PowerPC/urem-lkk.ll | 10 +- llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll | 208 ++++++++++----------- .../PowerPC/use-cr-result-of-dom-icmp-st.ll | 40 ++-- llvm/test/CodeGen/PowerPC/vec-min-max.ll | 8 +- llvm/test/CodeGen/PowerPC/vsx.ll | 12 +- llvm/test/CodeGen/X86/avx2-masked-gather.ll | 2 - llvm/test/CodeGen/X86/avx512-vbroadcasti256.ll | 12 +- llvm/test/CodeGen/X86/fshl.ll | 41 ++-- llvm/test/CodeGen/X86/fshr.ll | 55 +++--- llvm/test/CodeGen/X86/masked_load.ll | 9 - llvm/test/CodeGen/X86/movmsk-cmp.ll | 4 - llvm/test/CodeGen/X86/oddshuffles.ll | 20 +- llvm/test/CodeGen/X86/pr18014.ll | 9 +- llvm/test/CodeGen/X86/pr45443.ll | 16 +- llvm/test/CodeGen/X86/pr45563-2.ll | 22 --- llvm/test/CodeGen/X86/vector-fshl-rot-256.ll | 20 +- llvm/test/CodeGen/X86/vector-fshl-rot-512.ll | 200 +++++++++----------- llvm/test/CodeGen/X86/vector-fshr-rot-512.ll | 188 ++++++++----------- llvm/test/CodeGen/X86/vector-rotate-256.ll | 20 +- llvm/test/CodeGen/X86/vector-shift-ashr-256.ll | 12 +- llvm/test/CodeGen/X86/vector-shift-lshr-256.ll | 12 +- llvm/test/CodeGen/X86/vector-shift-shl-256.ll | 5 +- llvm/test/MC/ARM/dwarf-asm-multiple-sections.s | 4 +- .../MC/Disassembler/PowerPC/ppc64-encoding-ext.txt | 16 +- .../Disassembler/PowerPC/ppc64-encoding-p8htm.txt | 8 +- .../MC/Disassembler/PowerPC/ppc64-encoding.txt | 12 +- .../MC/Disassembler/PowerPC/ppc64le-encoding.txt | 12 +- llvm/test/MC/MachO/gen-dwarf.s | 20 +- llvm/test/MC/PowerPC/htm.s | 16 +- llvm/test/MC/PowerPC/ppc64-encoding.s | 20 +- llvm/test/MC/PowerPC/ppc64-operands.s | 24 +-- llvm/test/Other/new-pm-defaults.ll | 1 - llvm/test/Other/new-pm-thinlto-defaults.ll | 1 - .../Other/new-pm-thinlto-postlink-pgo-defaults.ll | 1 - .../new-pm-thinlto-postlink-samplepgo-defaults.ll | 1 - llvm/test/Other/opt-O2-pipeline.ll | 1 - llvm/test/Other/opt-O3-pipeline.ll | 1 - llvm/test/Other/opt-Os-pipeline.ll | 1 - llvm/test/Transforms/InstCombine/fptrunc.ll | 5 +- llvm/test/Transforms/LoopVectorize/X86/optsize.ll | 60 +++--- .../LoopVectorize/float-minmax-instruction-flag.ll | 21 +-- llvm/test/Transforms/PhaseOrdering/X86/addsub.ll | 35 +--- llvm/unittests/IR/PatternMatch.cpp | 51 +++-- mlir/include/mlir/TableGen/OpClass.h | 5 - mlir/lib/TableGen/OpClass.cpp | 10 +- mlir/test/mlir-tblgen/op-decl.td | 30 ++- mlir/test/mlir-tblgen/op-operand.td | 2 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 103 +++++++--- 163 files changed, 1410 insertions(+), 1301 deletions(-) create mode 100644 clang-tools-extra/test/clang-tidy/checkers/modernize-use-noexce [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (440cf7a24 -> 9bf43242d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards 440cf7a24 0: update: llvm-linux: boot new 9bf43242d 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (440cf7a24) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 181 +- 02-build_llvm/console.log | 12974 +++++++++++++++++------------------ 03-build_linux/console.log | 660 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 2 +- console.log | 13855 +++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- 7 files changed, 13871 insertions(+), 13815 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[gcc] branch master updated (a27aceb98a1 -> deea3defc98)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from a27aceb98a1 Change description of fat pointertype with -fgnat-encoding [...] new deea3defc98 Allow only ignored files in ChangeLog entries. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: contrib/ChangeLog | 9 +++++++ contrib/gcc-changelog/git_commit.py | 5 ++-- contrib/gcc-changelog/test_email.py | 4 ++++ contrib/gcc-changelog/test_patches.txt | 43 ++++++++++++++++++++++++++++++++++ 4 files changed, 59 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[gcc] branch master updated (49d6f7243ae -> a27aceb98a1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 49d6f7243ae Add missing ChangeLog entries in previous commit new a27aceb98a1 Change description of fat pointertype with -fgnat-encoding [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ada/ChangeLog | 14 +++++++ gcc/ada/gcc-interface/decl.c | 96 +++++++++++++++++++++++++------------------ gcc/ada/gcc-interface/misc.c | 54 +++++------------------- gcc/ada/gcc-interface/utils.c | 11 ++--- 4 files changed, 84 insertions(+), 91 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[gcc] branch master updated (5dce843f32e -> 49d6f7243ae)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 5dce843f32e Fix wrong assignment to mutable Out parameter of task entry new 49d6f7243ae Add missing ChangeLog entries in previous commit The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ada/ChangeLog | 8 ++++++++ gcc/testsuite/ChangeLog | 6 ++++++ 2 files changed, 14 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[gcc] branch master updated (94c0409717b -> 5dce843f32e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 94c0409717b Add missing expander for vector float_extend and float_truncate. new 5dce843f32e Fix wrong assignment to mutable Out parameter of task entry The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ada/gcc-interface/gigi.h | 8 +++++++ gcc/ada/gcc-interface/trans.c | 11 +++++---- gcc/ada/gcc-interface/utils2.c | 44 ++++++++++++++--------------------- gcc/testsuite/gnat.dg/array39.adb | 13 +++++++++++ gcc/testsuite/gnat.dg/array39_pkg.adb | 20 ++++++++++++++++ gcc/testsuite/gnat.dg/array39_pkg.ads | 25 ++++++++++++++++++++ 6 files changed, 90 insertions(+), 31 deletions(-) create mode 100644 gcc/testsuite/gnat.dg/array39.adb create mode 100644 gcc/testsuite/gnat.dg/array39_pkg.adb create mode 100644 gcc/testsuite/gnat.dg/array39_pkg.ads -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (99660217e93 -> 1b79509f97b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/llvm-project. from 99660217e93 [AArch64][GlobalISel] When generating SUBS for compares, do [...] adds cc65a7a5ea8 [X86] Improve i8 + 'slow' i16 funnel shift codegen adds 79401230840 [X86] Fix typo in comment. NFC adds 2bb822bc902 [X86] Add family/model for Intel Comet Lake CPUs for -march [...] adds 8310c9b7410 [X86][AVX] Call SimplifyDemandedBits on MaskedLoadSDNode wi [...] adds f794808bb9e [LLD/MinGW]: Expose --thinlto-cache-dir adds 04d32d7ac18 X86TargetMachine.h - remove unnecessary X86Subtarget forwar [...] adds ffb367217d6 [X86] Move CONCAT_VECTORS/INSERT_SUBVECTOR actions inside l [...] adds 72210ce7f57 Fix Wdocumentation warnings after argument renaming. NFC. adds 16031067252 [TargetLowering] Improve expandFunnelShift shift amount masking adds 478f2ce5d3c [X86] Pull out repeated DemandedBits signmask variable. NFC. adds d0f2a8a0492 X86Subtarget.h - remove unnecessary TargetMachine.h include. NFC. adds 5e9392deaf5 Add explicit traversal mode to matchers for implicit constructors adds 04ed532ef0c Fix skip-invisible with overloaded method calls adds 3ed8ebc2f6b Fix return values of some matcher functions adds 510b0f42371 LoopSimplify.h - reduce unnecessary includes to forward dec [...] adds a6502560628 AMDGPULibFunc - fix include order. NFC. adds 725b3463c53 AMDGPUTargetObjectFile.h - remove unnecessary includes. NFC. adds 15224408f0d [VPlan] Use VPUser for VPWidenSelectRecipe operands (NFC). adds b05b69e056a AMDGPUInstPrinter.cpp - add CommandLine.h include. NFC. adds 7eed772a279 [PatternMatch] abbreviate vector inst matchers; NFC adds c048a02b5b2 [InstCombine] fold FP trunc into exact itofp adds 4c5818dd8cd [clang-tidy] Fix potential assert in use-noexcept check adds 86e3abc9e63 [PowerPC] Add some InstAlias definitions adds 71bed8206b3 AMDGPU.h - reduce TargetMachine.h include. NFC. adds 1e7865d9464 [X86] SimplifyMultipleUseDemandedBitsForTargetNode - add in [...] adds d43fac052e1 [PhaseOrdering] adjust test to use default alias analysis w [...] adds 0deab8a54fd [LV] Either get invariant condition OR vector condition. adds 57bb4787d72 [Pass Manager] remove EarlyCSE as clean-up for VectorCombine adds e508d643cfd [X86][AVX] Fold extract_subvector(broadcast(x),c) -> extrac [...] adds 8a5aea7b504 [X86][AVX] Fold extract_subvector(subv_broadcast(x),c) -> (x) adds 2be92b7f7e4 Fix ignore-traversal to call correct method adds e60de8c825d Add missing test adds 51dec88c5df [X86] Remove isCommutable flag from MULX instructions. adds d0da5d2bbe8 Change default traversal in AST Matchers to ignore invisible nodes adds 52b03aaa22f [clang-format][PR46043] Parse git config w/ implicit values adds 838d12207b0 [TargetLoweringObjectFileImpl] Use llvm::transform adds 4b8632e174d [mlir] Expand operand adapter to take attributes new 20e9fc55feb [MCDwarf] Delete unneeded DW_AT_prototyped for DW_TAG_label new 1b79509f97b [MCDwarf] Delete unneeded DW_AT_unspecified_parameters The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../clang-tidy/bugprone/StringConstructorCheck.cpp | 3 +- .../bugprone/StringLiteralWithEmbeddedNulCheck.cpp | 4 +- .../clang-tidy/modernize/UseNoexceptCheck.cpp | 25 ++- .../clang-tidy/modernize/UseNoexceptCheck.h | 2 +- .../readability/RedundantStringInitCheck.cpp | 5 +- .../readability/UppercaseLiteralSuffixCheck.cpp | 4 +- .../checkers/modernize-use-noexcept-error.cpp | 6 + clang/docs/ReleaseNotes.rst | 9 +- clang/include/clang/AST/ParentMapContext.h | 2 +- clang/include/clang/ASTMatchers/ASTMatchers.h | 4 +- clang/lib/AST/Expr.cpp | 9 +- .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 18 +- clang/tools/clang-format/git-clang-format | 7 +- clang/unittests/AST/ASTTraverserTest.cpp | 81 ++++++++ .../unittests/ASTMatchers/ASTMatchersNodeTest.cpp | 6 +- .../ASTMatchers/ASTMatchersTraversalTest.cpp | 20 ++ compiler-rt/lib/builtins/cpu_model.c | 2 + lld/MinGW/Driver.cpp | 2 + lld/MinGW/Options.td | 2 + lld/test/ELF/ppc32-call-stub-pic.s | 2 +- lld/test/MinGW/driver.test | 3 + llvm/include/llvm/IR/PatternMatch.h | 8 +- llvm/include/llvm/Transforms/Utils/LoopSimplify.h | 8 +- llvm/lib/Analysis/InstructionSimplify.cpp | 6 +- llvm/lib/Analysis/VectorUtils.cpp | 6 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 5 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 6 +- llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 2 +- llvm/lib/MC/MCDwarf.cpp | 18 +- llvm/lib/Passes/PassBuilder.cpp | 1 - llvm/lib/Support/Host.cpp | 2 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 3 +- .../Target/AMDGPU/AMDGPUFixFunctionBitcasts.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h | 1 + llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 1 + llvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp | 10 +- llvm/lib/Target/AMDGPU/AMDGPULibFunc.h | 1 + llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPUTargetObjectFile.h | 2 - .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 1 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 4 +- llvm/lib/Target/ARM/MVETailPredication.cpp | 8 +- llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 18 ++ llvm/lib/Target/PowerPC/PPCInstrHTM.td | 5 + llvm/lib/Target/PowerPC/PPCInstrInfo.td | 31 +++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 89 +++++++-- llvm/lib/Target/X86/X86IndirectThunks.cpp | 1 + llvm/lib/Target/X86/X86InstrArithmetic.td | 1 - llvm/lib/Target/X86/X86MCInstLower.cpp | 1 + .../lib/Target/X86/X86SpeculativeLoadHardening.cpp | 1 + llvm/lib/Target/X86/X86Subtarget.cpp | 4 + llvm/lib/Target/X86/X86Subtarget.h | 4 +- llvm/lib/Target/X86/X86TargetMachine.h | 1 - llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 8 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 91 ++++----- .../Transforms/InstCombine/InstCombineCompares.cpp | 6 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 2 +- .../InstCombine/InstCombineVectorOps.cpp | 28 +-- .../InstCombine/InstructionCombining.cpp | 26 ++- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 26 +-- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 4 +- llvm/lib/Transforms/Vectorize/VPlan.h | 12 +- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 24 +-- llvm/test/CodeGen/AMDGPU/opt-pipeline.ll | 3 - .../PowerPC/2007-04-30-InlineAsmEarlyClobber.ll | 2 +- llvm/test/CodeGen/PowerPC/2009-09-18-carrybit.ll | 4 +- llvm/test/CodeGen/PowerPC/2010-02-12-saveCR.ll | 2 +- .../PowerPC/CompareEliminationSpillIssue.ll | 2 +- llvm/test/CodeGen/PowerPC/atomics-regression.ll | 60 +++--- llvm/test/CodeGen/PowerPC/crbits.ll | 6 +- llvm/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll | 2 +- .../test/CodeGen/PowerPC/expand-contiguous-isel.ll | 4 +- llvm/test/CodeGen/PowerPC/expand-isel.ll | 2 +- llvm/test/CodeGen/PowerPC/f128-compare.ll | 12 +- llvm/test/CodeGen/PowerPC/fast-isel-binary.ll | 6 +- llvm/test/CodeGen/PowerPC/fold-remove-li.ll | 2 +- llvm/test/CodeGen/PowerPC/fold-zero.ll | 6 +- llvm/test/CodeGen/PowerPC/funnel-shift.ll | 8 +- .../CodeGen/PowerPC/handle-f16-storage-type.ll | 2 +- llvm/test/CodeGen/PowerPC/htm.ll | 10 +- llvm/test/CodeGen/PowerPC/i1-ext-fold.ll | 8 +- llvm/test/CodeGen/PowerPC/i64_fp_round.ll | 2 +- llvm/test/CodeGen/PowerPC/ifcvt.ll | 4 +- llvm/test/CodeGen/PowerPC/inc-of-add.ll | 12 +- .../CodeGen/PowerPC/loop-instr-form-prepare.ll | 2 +- llvm/test/CodeGen/PowerPC/machine-pre.ll | 2 +- llvm/test/CodeGen/PowerPC/memcmp.ll | 8 +- llvm/test/CodeGen/PowerPC/mul-const.ll | 6 +- llvm/test/CodeGen/PowerPC/noPermuteFormasking.ll | 6 +- llvm/test/CodeGen/PowerPC/optcmp.ll | 20 +- llvm/test/CodeGen/PowerPC/optimize-andiso.ll | 2 +- .../CodeGen/PowerPC/pcrel-call-linkage-leaf.ll | 8 +- llvm/test/CodeGen/PowerPC/popcnt-zext.ll | 16 +- llvm/test/CodeGen/PowerPC/ppc-crbits-onoff.ll | 4 +- llvm/test/CodeGen/PowerPC/ppc64-P9-mod.ll | 4 +- llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll | 4 +- llvm/test/CodeGen/PowerPC/pr44183.ll | 2 +- .../CodeGen/PowerPC/remove-redundant-load-imm.ll | 2 +- llvm/test/CodeGen/PowerPC/sat-add.ll | 60 +++--- llvm/test/CodeGen/PowerPC/select_const.ll | 56 +++--- llvm/test/CodeGen/PowerPC/setcc-logic.ll | 6 +- llvm/test/CodeGen/PowerPC/shift128.ll | 2 +- llvm/test/CodeGen/PowerPC/signbit-shift.ll | 12 +- llvm/test/CodeGen/PowerPC/sms-cpy-1.ll | 6 +- llvm/test/CodeGen/PowerPC/sms-phi-2.ll | 14 +- llvm/test/CodeGen/PowerPC/spe.ll | 18 +- llvm/test/CodeGen/PowerPC/srem-lkk.ll | 12 +- llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll | 184 +++++++++--------- llvm/test/CodeGen/PowerPC/stack-guard-reassign.ll | 2 +- llvm/test/CodeGen/PowerPC/stack-realign.ll | 12 +- llvm/test/CodeGen/PowerPC/store-combine.ll | 4 +- llvm/test/CodeGen/PowerPC/sub-of-not.ll | 12 +- llvm/test/CodeGen/PowerPC/subc.ll | 2 +- llvm/test/CodeGen/PowerPC/subreg-postra.ll | 2 +- .../PowerPC/umulo-128-legalisation-lowering.ll | 4 +- llvm/test/CodeGen/PowerPC/urem-lkk.ll | 10 +- llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll | 208 ++++++++++----------- .../PowerPC/use-cr-result-of-dom-icmp-st.ll | 40 ++-- llvm/test/CodeGen/PowerPC/vec-min-max.ll | 8 +- llvm/test/CodeGen/PowerPC/vsx.ll | 12 +- llvm/test/CodeGen/X86/avx2-masked-gather.ll | 2 - llvm/test/CodeGen/X86/avx512-vbroadcasti256.ll | 12 +- llvm/test/CodeGen/X86/fshl.ll | 102 +++++----- llvm/test/CodeGen/X86/fshr.ll | 118 +++++------- llvm/test/CodeGen/X86/masked_load.ll | 9 - llvm/test/CodeGen/X86/movmsk-cmp.ll | 4 - llvm/test/CodeGen/X86/oddshuffles.ll | 20 +- llvm/test/CodeGen/X86/pr18014.ll | 9 +- llvm/test/CodeGen/X86/pr45443.ll | 16 +- llvm/test/CodeGen/X86/pr45563-2.ll | 22 --- llvm/test/CodeGen/X86/rotate-extract.ll | 28 +-- llvm/test/CodeGen/X86/vector-fshl-rot-256.ll | 20 +- llvm/test/CodeGen/X86/vector-fshl-rot-512.ll | 200 +++++++++----------- llvm/test/CodeGen/X86/vector-fshr-rot-512.ll | 188 ++++++++----------- llvm/test/CodeGen/X86/vector-rotate-256.ll | 20 +- llvm/test/CodeGen/X86/vector-shift-ashr-256.ll | 12 +- llvm/test/CodeGen/X86/vector-shift-lshr-256.ll | 12 +- llvm/test/CodeGen/X86/vector-shift-shl-256.ll | 5 +- llvm/test/MC/ARM/dwarf-asm-multiple-sections.s | 4 +- .../MC/Disassembler/PowerPC/ppc64-encoding-ext.txt | 16 +- .../Disassembler/PowerPC/ppc64-encoding-p8htm.txt | 8 +- .../MC/Disassembler/PowerPC/ppc64-encoding.txt | 12 +- .../MC/Disassembler/PowerPC/ppc64le-encoding.txt | 12 +- llvm/test/MC/MachO/gen-dwarf.s | 20 +- llvm/test/MC/PowerPC/htm.s | 16 +- llvm/test/MC/PowerPC/ppc64-encoding.s | 20 +- llvm/test/MC/PowerPC/ppc64-operands.s | 24 +-- llvm/test/Other/new-pm-defaults.ll | 1 - llvm/test/Other/new-pm-thinlto-defaults.ll | 1 - .../Other/new-pm-thinlto-postlink-pgo-defaults.ll | 1 - .../new-pm-thinlto-postlink-samplepgo-defaults.ll | 1 - llvm/test/Other/opt-O2-pipeline.ll | 1 - llvm/test/Other/opt-O3-pipeline.ll | 1 - llvm/test/Other/opt-Os-pipeline.ll | 1 - llvm/test/Transforms/InstCombine/fptrunc.ll | 5 +- llvm/test/Transforms/LoopVectorize/X86/optsize.ll | 60 +++--- .../LoopVectorize/float-minmax-instruction-flag.ll | 21 +-- llvm/test/Transforms/PhaseOrdering/X86/addsub.ll | 35 +--- llvm/unittests/IR/PatternMatch.cpp | 51 +++-- mlir/include/mlir/TableGen/OpClass.h | 5 - mlir/lib/TableGen/OpClass.cpp | 10 +- mlir/test/mlir-tblgen/op-decl.td | 30 ++- mlir/test/mlir-tblgen/op-operand.td | 2 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 103 +++++++--- 166 files changed, 1501 insertions(+), 1394 deletions(-) create mode 100644 clang-tools-extra/test/clang-tidy/checkers/modernize-use-noexce [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (06e699697 -> aa2e28673)

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