Tcwg-commits April 2020

tcwg-commits@lists.linaro.org

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10681 discussions

[gcc] branch master updated (75efe9cb1f8 -> b90061c6ec0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 75efe9cb1f8 c/94392 - only enable -ffinite-loops for C++ new b90061c6ec0 Prevent IPA-SRA from creating calls to local comdats (PR 92676) The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 13 +++++++++++++ gcc/ipa-sra.c | 38 ++++++++++++++++++++++++++++++++++++-- 2 files changed, 49 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allmodconfig updated (54b4fa6d3955 -> dda0e2920330)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allmodconfig in repository toolchain/ci/linux. from 54b4fa6d3955 Linux 4.19.113 adds 4f32b45c9a2c mmc: core: Allow host controllers to require R1B for CMD6 adds 5fc615c1e3eb mmc: core: Respect MMC_CAP_NEED_RSP_BUSY for erase/trim/discard adds d091259b8d7a mmc: core: Respect MMC_CAP_NEED_RSP_BUSY for eMMC sleep command adds 23161bed631a mmc: sdhci-omap: Fix busy detection by enabling MMC_CAP_NE [...] adds ff6471fec204 mmc: sdhci-tegra: Fix busy detection by enabling MMC_CAP_N [...] adds 013b14652972 Revert "drm/dp_mst: Skip validating ports during destructi [...] adds 2c1a05e91fc6 geneve: move debug check after netdev unregister adds b1ab6a51895d hsr: fix general protection fault in hsr_addr_is_self() adds 1e62437e33fd macsec: restrict to ethernet devices adds b371fdcd2667 mlxsw: spectrum_mr: Fix list iteration in error path adds c94fbe2892d5 net: cbs: Fix software cbs to consider packet sending time adds e90e9226bea3 net: dsa: Fix duplicate frames flooded by learning adds b411ce503d98 net: mvneta: Fix the case where the last poll did not proc [...] adds 6fb0e4385928 net/packet: tpacket_rcv: avoid a producer race condition adds efec582aa025 net: qmi_wwan: add support for ASKEY WWHC050 adds ea3d6652c240 net_sched: cls_route: remove the right filter from hashtable adds 557d015ffb27 net_sched: keep alloc_hash updated after hash allocation adds 47e36be14674 net: stmmac: dwmac-rk: fix error path in rk_gmac_probe adds b9ac81058b6c NFC: fdp: Fix a signedness bug in fdp_nci_send_patch() adds 297e87cfbc43 slcan: not call free_netdev before rtnl_unlock in slcan_open adds 867c079ef0c2 bnxt_en: fix memory leaks in bnxt_dcbnl_ieee_getets() adds 2cbbedac94fc bnxt_en: Reset rings if ring reservation fails during open() adds 54266b269468 net: ip_gre: Separate ERSPAN newlink / changelink callbacks adds f5ebb2dd8677 net: ip_gre: Accept IFLA_INFO_DATA-less configuration adds 579efdbbb290 net: dsa: mt7530: Change the LINK bit to reflect the link status adds 39c6f2beb1b7 net: phy: mdio-mux-bcm-iproc: check clk_prepare_enable() r [...] adds 87559662c7b0 r8169: re-enable MSI on RTL8168c adds 58b501cc08cc tcp: repair: fix TCP_QUEUE_SEQ implementation adds facf9c7ecc2f vxlan: check return value of gro_cells_init() adds d45f603e14ef hsr: use rcu_read_lock() in hsr_get_node_{list/status}() adds 0884e7872abb hsr: add restart routine into hsr_get_node_list() adds 85eaea5f8e2d hsr: set .netnsok flag adds 967e97461ea3 cgroup-v1: cgroup_pidlist_next should update position index adds 968d4ec0c9eb nfs: add minor version to nfs_server_key for fscache adds 87639a608eb3 cpupower: avoid multiple definition with gcc -fno-common adds 1bea23309424 drivers/of/of_mdio.c:fix of_mdiobus_register() adds 5a8a69435d33 cgroup1: don't call release_agent when it is "" adds fbc835b0b4c9 dt-bindings: net: FMan erratum A050385 adds 6359254038b6 arm64: dts: ls1043a: FMan erratum A050385 adds 7deaf533087d fsl/fman: detect FMan erratum A050385 adds 547d6d43fc93 s390/qeth: handle error when backing RX buffer adds 29aacd438cc0 scsi: ipr: Fix softlockup when rescanning devices in petitboot adds 6deb51c700fc mac80211: Do not send mesh HWMP PREQ if HWMP is disabled adds ec8111fca9e6 dpaa_eth: Remove unnecessary boolean expression in dpaa_ge [...] adds 28866e0921f9 sxgbe: Fix off by one in samsung driver strncpy size arg adds cde88c24f91d ftrace/x86: Anotate text_mutex split between ftrace_arch_c [...] adds a2c056316430 i2c: hix5hd2: add missed clk_disable_unprepare in remove adds 83f64c118c44 Input: raydium_i2c_ts - fix error codes in raydium_i2c_boo [...] adds 894a3be3214b Input: synaptics - enable RMI on HP Envy 13-ad105ng adds 74d0c209f93b Input: avoid BIT() macro usage in the serio.h UAPI header adds 1e2d0c50980c ceph: check POOL_FLAG_FULL/NEARFULL in addition to OSDMAP_ [...] adds aa9e1a3bded8 ARM: dts: dra7: Add bus_dma_limit for L3 bus adds 8da3ffaafeb6 ARM: dts: omap5: Add bus_dma_limit for L3 bus adds 72057ab2923f perf probe: Do not depend on dwfl_module_addrsym() adds 55831a04b548 tools: Let O= makes handle a relative path with -C option adds 621f2ded6015 scripts/dtc: Remove redundant YYLOC global declaration adds d500b060316a scsi: sd: Fix optimal I/O size for devices that change rep [...] adds b9135475c375 nl80211: fix NL80211_ATTR_CHANNEL_WIDTH attribute type adds d34dce8d3dbf mac80211: mark station unauthorized before key removal adds 930f7ea27438 gpiolib: acpi: Correct comment for HP x2 10 honor_wakeup quirk adds c3c85c561c2b gpiolib: acpi: Rework honor_wakeup option into an ignore_w [...] adds e3aaea29e241 gpiolib: acpi: Add quirk to ignore EC wakeups on HP x2 10 [...] adds 05a93efc961c RDMA/core: Ensure security pkey modify is not lost adds 277db1b634fc genirq: Fix reference leaks on irq affinity notifiers adds cb2775c906ee xfrm: handle NETDEV_UNREGISTER for xfrm device adds f8ee708284e1 vti[6]: fix packet tx through bpf_redirect() in XinY cases adds 2eb46d004484 RDMA/mlx5: Block delay drop to unprivileged users adds cf265c64c919 xfrm: fix uctx len check in verify_sec_ctx_len adds 0a7b397c0133 xfrm: add the missing verify_sec_ctx_len check in xfrm_add [...] adds 7ad217a824f7 xfrm: policy: Fix doulbe free in xfrm_policy_timer adds ef21d2431f32 afs: Fix some tracing details adds 113df2c58a72 netfilter: flowtable: reload ip{v6}h in nf_flow_tuple_ip{v6} adds 24c290b81194 netfilter: nft_fwd_netdev: validate family and chain type adds fb957d1003ad bpf/btf: Fix BTF verification of enum members in struct/union adds 7df44c928549 vti6: Fix memory leak of skb if input policy check fails adds e8113b2f90c5 Revert "r8169: check that Realtek PHY driver module is loaded" adds 86d79d346c4f mac80211: add option for setting control flags adds 73b9f68ae99f mac80211: set IEEE80211_TX_CTRL_PORT_CTRL_PROTO for nl80211 TX adds 583965eaec37 USB: serial: option: add support for ASKEY WWHC050 adds ac53ddd4e09d USB: serial: option: add BroadMobi BM806U adds 9f76f37c7bbf USB: serial: option: add Wistron Neweb D19Q1 adds 7b27dd6fbfa5 USB: cdc-acm: restore capability check order adds a0dbf1583327 USB: serial: io_edgeport: fix slab-out-of-bounds read in e [...] adds 83f75226a7f2 usb: musb: fix crash with highmen PIO and usbmon adds d9bc386f3171 media: flexcop-usb: fix endpoint sanity check adds f035bfa4d5ce media: usbtv: fix control-message timeouts adds 7d0a6f03bbff staging: rtl8188eu: Add ASUS USB-N10 Nano B1 to device table adds 0caed6a57c35 staging: wlan-ng: fix ODEBUG bug in prism2sta_disconnect_usb adds b2f60325a350 staging: wlan-ng: fix use-after-free Read in hfa384x_usbin [...] adds eed7257a5cbf ahci: Add Intel Comet Lake H RAID PCI ID adds bf204158a8a6 libfs: fix infoleak in simple_attr_read() adds 747a7431661a media: ov519: add missing endpoint sanity checks adds 21d52891d1da media: dib0700: fix rc endpoint lookup adds 70764334b2bc media: stv06xx: add missing descriptor sanity checks adds 5d064d7f0327 media: xirlink_cit: add missing descriptor sanity checks adds a4f68ecf7336 mac80211: Check port authorization in the ieee80211_tx_deq [...] adds 605c89616911 mac80211: fix authentication with iwlwifi/mvm adds 7062646a82be vt: selection, introduce vc_is_sel adds 7de934f4099b vt: ioctl, switch VT_IS_IN_USE and VT_BUSY to inlines adds d277cae877ad vt: switch vt_dont_switch to bool adds 9fbd55e4f951 vt: vt_ioctl: remove unnecessary console allocation checks adds 54584f79579b vt: vt_ioctl: fix VT_DISALLOCATE freeing in-use virtual console adds 2ff2b207f355 vt: vt_ioctl: fix use-after-free in vt_in_use() adds b4026dacf428 platform/x86: pmc_atom: Add Lex 2I385SW to critclk_systems [...] adds aca6a9b0985b bpf: Explicitly memset the bpf_attr structure adds 638d8c748e9d bpf: Explicitly memset some bpf info structures declared o [...] adds e29629d20112 gpiolib: acpi: Add quirk to ignore EC wakeups on HP x2 10 [...] adds 9b3503810c73 net: ks8851-ml: Fix IO operations, again adds 49275ad17f1a arm64: alternative: fix build with clang integrated assembler adds 71fc11978c9e perf map: Fix off by one in strncpy() size argument adds c99fc06b7a87 ARM: dts: oxnas: Fix clear-mask property adds baa4b61553e0 ARM: bcm2835-rpi-zero-w: Add missing pinctrl name adds 5513fac57dbd ARM: dts: imx6: phycore-som: fix arm and soc minimum voltage adds 31d2ac32acdb ARM: dts: N900: fix onenand timings adds 66d4ef50b0ce arm64: dts: ls1043a-rdb: correct RGMII delay mode to rgmii-id adds 6ae3ac43abf5 arm64: dts: ls1046ardb: set RGMII interfaces to RGMII_ID mode adds dda0e2920330 Linux 4.19.114 No new revisions were added by this update. Summary of changes: Documentation/devicetree/bindings/net/fsl-fman.txt | 7 ++ Makefile | 2 +- arch/arm/boot/dts/bcm2835-rpi-zero-w.dts | 1 + arch/arm/boot/dts/dra7.dtsi | 1 + arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi | 4 +- arch/arm/boot/dts/omap3-n900.dts | 44 ++++--- arch/arm/boot/dts/omap5.dtsi | 1 + arch/arm/boot/dts/ox810se.dtsi | 4 +- arch/arm/boot/dts/ox820.dtsi | 4 +- arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi | 2 + arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 4 +- arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 4 +- arch/arm64/include/asm/alternative.h | 2 +- arch/x86/kernel/ftrace.c | 2 + drivers/ata/ahci.c | 1 + drivers/gpio/gpiolib-acpi.c | 140 +++++++++++++++++---- drivers/gpu/drm/drm_dp_mst_topology.c | 15 +-- drivers/i2c/busses/i2c-hix5hd2.c | 1 + drivers/infiniband/core/security.c | 11 +- drivers/infiniband/hw/mlx5/qp.c | 4 + drivers/input/mouse/synaptics.c | 1 + drivers/input/touchscreen/raydium_i2c_ts.c | 8 +- drivers/media/usb/b2c2/flexcop-usb.c | 6 +- drivers/media/usb/dvb-usb/dib0700_core.c | 4 +- drivers/media/usb/gspca/ov519.c | 10 ++ drivers/media/usb/gspca/stv06xx/stv06xx.c | 19 ++- drivers/media/usb/gspca/stv06xx/stv06xx_pb0100.c | 4 + drivers/media/usb/gspca/xirlink_cit.c | 18 ++- drivers/media/usb/usbtv/usbtv-core.c | 2 +- drivers/media/usb/usbtv/usbtv-video.c | 5 +- drivers/mmc/core/core.c | 5 +- drivers/mmc/core/mmc.c | 7 +- drivers/mmc/core/mmc_ops.c | 8 +- drivers/mmc/host/sdhci-omap.c | 3 + drivers/mmc/host/sdhci-tegra.c | 3 + drivers/net/can/slcan.c | 3 + drivers/net/dsa/mt7530.c | 2 +- drivers/net/ethernet/broadcom/bnxt/bnxt.c | 4 + drivers/net/ethernet/broadcom/bnxt/bnxt_dcb.c | 15 ++- drivers/net/ethernet/freescale/dpaa/dpaa_eth.c | 4 +- drivers/net/ethernet/freescale/fman/Kconfig | 28 +++++ drivers/net/ethernet/freescale/fman/fman.c | 18 +++ drivers/net/ethernet/freescale/fman/fman.h | 5 + drivers/net/ethernet/marvell/mvneta.c | 3 +- drivers/net/ethernet/mellanox/mlxsw/spectrum_mr.c | 8 +- drivers/net/ethernet/micrel/ks8851_mll.c | 56 ++++++++- drivers/net/ethernet/realtek/r8169.c | 11 +- drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c | 2 +- drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 2 +- drivers/net/geneve.c | 8 +- drivers/net/macsec.c | 3 + drivers/net/phy/mdio-mux-bcm-iproc.c | 7 +- drivers/net/usb/qmi_wwan.c | 1 + drivers/net/vxlan.c | 11 +- drivers/nfc/fdp/fdp.c | 5 +- drivers/of/of_mdio.c | 1 + drivers/platform/x86/pmc_atom.c | 8 ++ drivers/s390/net/qeth_core_main.c | 13 +- drivers/scsi/ipr.c | 3 +- drivers/scsi/ipr.h | 1 + drivers/scsi/sd.c | 4 +- drivers/staging/rtl8188eu/os_dep/usb_intf.c | 1 + drivers/staging/wlan-ng/hfa384x_usb.c | 2 + drivers/staging/wlan-ng/prism2usb.c | 1 + drivers/tty/vt/selection.c | 5 + drivers/tty/vt/vt.c | 30 ++++- drivers/tty/vt/vt_ioctl.c | 80 ++++++------ drivers/usb/class/cdc-acm.c | 18 +-- drivers/usb/musb/musb_host.c | 17 +-- drivers/usb/serial/io_edgeport.c | 2 +- drivers/usb/serial/option.c | 6 + fs/afs/rxrpc.c | 4 +- fs/ceph/file.c | 14 ++- fs/libfs.c | 8 +- fs/nfs/client.c | 1 + fs/nfs/fscache.c | 2 + fs/nfs/nfs4client.c | 1 - include/linux/ceph/osdmap.h | 4 + include/linux/ceph/rados.h | 6 +- include/linux/mmc/host.h | 1 + include/linux/selection.h | 4 +- include/linux/vt_kern.h | 2 +- include/trace/events/afs.h | 2 +- include/uapi/linux/serio.h | 10 +- kernel/bpf/btf.c | 5 +- kernel/bpf/syscall.c | 9 +- kernel/cgroup/cgroup-v1.c | 3 +- kernel/irq/manage.c | 11 +- net/ceph/osdmap.c | 9 ++ net/dsa/tag_brcm.c | 2 + net/hsr/hsr_framereg.c | 10 +- net/hsr/hsr_netlink.c | 74 ++++++----- net/hsr/hsr_slave.c | 8 +- net/ipv4/Kconfig | 1 + net/ipv4/ip_gre.c | 105 +++++++++++++--- net/ipv4/ip_vti.c | 38 ++++-- net/ipv4/tcp.c | 4 +- net/ipv6/ip6_vti.c | 34 +++-- net/mac80211/ieee80211_i.h | 3 +- net/mac80211/mesh_hwmp.c | 3 +- net/mac80211/sta_info.c | 7 +- net/mac80211/tdls.c | 2 +- net/mac80211/tx.c | 44 +++++-- net/netfilter/nf_flow_table_ip.c | 2 + net/netfilter/nft_fwd_netdev.c | 9 ++ net/packet/af_packet.c | 21 ++++ net/packet/internal.h | 5 +- net/sched/cls_route.c | 4 +- net/sched/cls_tcindex.c | 1 + net/sched/sch_cbs.c | 12 +- net/wireless/nl80211.c | 2 +- net/xfrm/xfrm_device.c | 1 + net/xfrm/xfrm_policy.c | 2 + net/xfrm/xfrm_user.c | 6 +- scripts/dtc/dtc-lexer.l | 1 - tools/perf/Makefile | 2 +- tools/perf/util/map.c | 2 +- tools/perf/util/probe-finder.c | 11 +- .../cpupower/utils/idle_monitor/amd_fam14h_idle.c | 2 +- .../cpupower/utils/idle_monitor/cpuidle_sysfs.c | 2 +- .../cpupower/utils/idle_monitor/cpupower-monitor.c | 2 + .../cpupower/utils/idle_monitor/cpupower-monitor.h | 2 +- tools/scripts/Makefile.include | 4 +- 123 files changed, 928 insertions(+), 341 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allmodconfig updated (546113c7 -> edad68ac)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards 546113c7 10: update: llvm-linux: 17560 new edad68ac 10: update: llvm-linux: 17560 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (546113c7) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 191 +- 02-build_llvm/console.log | 12518 ++++++++++---------- 03-build_linux/console.log | 6300 +++++----- 05-check_regression/console.log | 12 +- 05-check_regression/results.regressions | 20 +- 06-update_baseline/console.log | 32 +- 06-update_baseline/results.regressions | 20 +- console.log | 19053 +++++++++++++++--------------- jenkins/manifest.sh | 8 +- 9 files changed, 19070 insertions(+), 19084 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-Os updated (c6b8484e855 -> 9dcac872977)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-Os in repository toolchain/ci/llvm-project. from c6b8484e855 [analyzer] StdLibraryFunctionsChecker refactor w/ inheritance adds 4ece6f051bd [Sema][SVE] Reject "delete" with sizeless types adds ac1d23ed7de Replace MCTargetOptionsCommandFlags.inc and CommandFlags.in [...] adds ad357c15230 [gn build] Port ac1d23ed7de adds f95541839cb [lldb] Tighten checks in TestStats.py adds 211ba00ce00 [OpenCL] Add pipe and kernel enqueuing builtins adds 0f0564bb9a3 [OPENMP50]Initial support for detach clause in task directive. adds 2aba9b6cf8a AMDGPU/GlobalISel: Legalize a16 images adds 83ffbf26181 AMDGPU/GlobalISel: Legalize non-a16 non-NSA images adds d9a012ed8a5 AMDGPU/GlobalISel: Adjust image load register type based on dmask adds d0fe13ecf9a AMDGPU/GlobalISel: Fully handle 0 dmask case during legalize adds acf6e4190f4 Purge unused diagnostics. NFC. adds 73b1da16051 [MIPS] Implement MIPS3D vector instructions adds 873ab73db47 [ValueLattice] Clarify that constant state can reached from undef. adds e119980f3f8 [mlir] LLVM dialect: move ensureDistinctSuccessors out of s [...] adds 48a9cf90439 [AMDGPU] Enable SEXT divergence driven selection. adds e8ac825f5b9 [AssumeBundles] Detection of Empty bundles adds a060a1782e2 [Alignment] Add alignTo with skew parameter adds 039c917b43b AMDGPU/GlobalISel: Fix asserting on gather4 intrinsics adds 60963fa6301 [HIP] Let clang recognize .hip extension adds f8dbe50e99b [docs] Remove outdated note about migration to Git adds 9cd8db1c80c [NFC][PowerPC] Add 2 test cases to early-ret.mir to test BL [...] adds 34b8a0d5998 [Verifier] Silence static analyzer null dereference warning [...] adds c9656a3b311 [DAGCombiner] matchRotateSub - handle shift amount truncation adds 704cd4d5d07 [clangd] Only minimally escape text when rendering to markdown. adds 08ab8c9af4d [NFC] Add UsedDeclVisitor adds 1f93b162fc6 Support repeated machine outlining adds 6e29846b29d [AMDGPU] Fix whole wavefront mode adds 76cf14035be [MLIR] Added llvm.fence adds b9f1b8be1cb Revert "Support repeated machine outlining" adds 5d90f886bc0 [clang][AArch64] readd support for 'p' inline asm constraint adds 585a3cc31bb Fix -Wdeprecated-copy-dtor and -Wdeprecated-dynamic-excepti [...] adds 9e2715aaaca [lldb] Remove template parameters from FunctionTemplateDecl names adds 98369178bc6 [SelectionDAGBuilder] Don't set MachinePointerInfo for gath [...] adds b6bcf728507 [OPENMP50]Mark expression in detach clause as firstprivate. adds 1bf0c993758 [ValueTracking][SVE] Fix isGEPKnownNonNull for scalable vector. adds 5267f5e6b4c [mlir] Add a hook to PatternRewriter to allow for patterns [...] adds 586565c514e [InstCombine] add tests for bool math; NFC adds be9e3d94165 [InstCombine] reduce demand-limited bool math to logic, part 2 adds 661c950630f [NFC][Attr TableGen] Emit Spelling Enum for Attr types if there >1 adds 768ead0a6ca [libc] Add a new rule `add_object`. adds 3d9e6c42f8c [libc++] Use env to set the tool's environment on Darwin adds 080dd10f7df Move RDF from Hexagon to Codegen adds 5555c04ba9f [gn build] Port 080dd10f7df adds 526c51e6fdc [DwarfDebug] Fix an assertion error when emitting call site [...] adds 51b78a3e06d [libc++] Bugfix to std::binomial_distribution<int> adds 2bd1ca28c1f [ELF][test] Delete unneeded --no-threads adds 17566573b29 [libc] Resolve race condition in sub-process test runner. adds a72ae99cf9d [SCCP] Split up callsite handling, only propagate result on [...] adds c48442c9f38 PR45207: Fix crash if constrained-type-specifier annotation [...] adds 36b8d02c8df [pstl] A hot fix for exclusive_scan (+ lost enable_if in de [...] adds 83989e69415 Don't call anyone lazy in the documentation. adds 1458bb92dff [lit] NFC: Fix typo in log statement adds c45eaeabb77 [Clang] Undef attribute for global variables adds 68224c19522 [TargetLowering] Only demand a rotation's modulo amount bits adds d177c36e5c4 Add some libc++ revisions to .git-blame-ignore-revs adds 7aa28995e87 [lldb/PlatformDarwin] Be more robust in computing the SDK p [...] adds 6a38e0e4f51 [MC] Recalculate fragment offsets after relaxation adds a4ef2a71d38 [libc++] Move some misplaced compile-time flags adds 9a65d683e02 [mlir] Add target for Shape dialect adds a2920c4ea99 [codegen] Fix one more case where `getGlobalDecl` should be [...] adds 31b7f0ed6a9 [clangd] Extend findTarget()'s dependent name heuristic to [...] adds 1d19b153955 Fix arm build broken by D74361 by dropping align from filec [...] adds 363dd3f394b [mlir][NFC] Rename QuantOps to Quant adds 4d60f47b082 [mlir][NFC] Renamed VectorOps to Vector adds 3829d85cc61 [lldb/PlatformDarwin] Return POSIX path from FindXcodeConte [...] adds cc691f3384c Disable loader-uninitialized tests on Windows adds 68f163df0ec [AMDGPU] Print DWARF register numbers in AMDGPUInstPrinter adds a11b3304188 [lldb/Bindings] Check that process isn't None before callin [...] adds c9b454a1b7e AMDGPU/GlobalISel: Fix verifier errors on image atomics adds f2f8bdc2b16 Fix `-Wunused-variable` warning. NFC. adds a9e05d5711a [libc] Add AOR testing dependencies for buildbot workers. adds 4e0fe038f43 Revert "Avoid emitting unreachable SP adjustments after `throw`" adds ab2dcff309f Support repeated machine outlining adds 7b166d51823 Revert "Support repeated machine outlining" adds 7ca473a27bd [MLIR] Add support for out of tree external projects using MLIR adds 2fae7878d55 [mlir][Vector] Mostly-NFC - Restructure options for lowerin [...] adds 3145427dd73 [mlir][NFC] Replace all usages of PatternMatchResult with L [...] adds bd0ca2627cf [mlir] Update DRR patterns to notify the rewriter why a pat [...] adds d577193c0f7 [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d adds e7a811b3193 PR45133: Don't crash if the active member of a union change [...] adds 34d0d6ba74f [mlir][DialectConversion] Print the operation being legaliz [...] adds 9bca8fc4cf5 Revert "AMDGPU/GlobalISel: Fully handle 0 dmask case during [...] adds 4d35055635a [libc] Add sigaction adds 974d649f8ea CET for Exception Handle adds c3df69faa03 [Alignment][NFC] Deprecate getTransientStackAlignment adds bd763e2cf7c [clang] Fix crash on visiting null nestedNameSpecifier. adds ef56b55e129 [NFC][ARM] Add thumb triple to test adds 5672ae8d868 [SCCP] Use constant ranges for select, if cond is overdefined. adds cda2b0769f5 [InstCombine][X86] Tests for variable but in-range per-elem [...] adds 8d019cda851 Fix ac1d23ed7de01fb3 interaction with gold plugin adds 28c5d97beec [ARM,MVE] Add intrinsics and isel for MVE integer VMLA. adds 928776de923 [ARM,MVE] Add intrinsics for the VQDMLAH family. adds c5b81466c2b Reland D75470 [SVE] Auto-generate builtins and header for svld1. adds f4e495a18e8 [InstCombine][X86] simplifyX86varShift - convert variable i [...] adds 0db7244295b [SCCP] Precommit some additional tests for integer ranges. adds a0a3a9c5a83 [DebugInfo] Fix multi-byte entry values in call site values adds 940ba1465b2 Fix possible assertion when using PBQP with debug info adds 4788ca450fe [AArch64][SVE] Change pointer type of nontemporal load/stor [...] adds 9bdcd9bf443 [llvm][SVE] Addressing mode for FF/NF loads. adds b09cce07c7e [OPENMP50]Codegen for detach clause. adds db31e2e1e6c [lldb/Target] Support more than 2 symbols in StackFrameRecognizer adds a8901a03544 [mlir] NFC: Fix trivial typos in documents adds 6739805e24c [ARM] Track epilogue instructions with FrameDestroy flag (NFC) adds 4cf01ed75e3 [hip] Revise `GlobalDecl` constructors. NFC. adds 2aaafaf5005 [NFC] Add missing REQUIRES clause to a test adds 96b70809d95 [NFC][PowerPC] Add a new MIR file to test if-converter pass adds d000655a8cd [Alignment][NFC] Deprecate getMaxAlignment adds 73cea83a6f5 [IPRA][ARM] Spill extra registers at -Oz adds 85334b030a6 [NFCI][SCEV] Avoid recursion in SCEVExpander::isHighCostExp [...] adds f3e297d90fc Fix build with gcc 7.5 by adding a "redundant move" adds 4d506da91c4 Fix `warning: extra ‘;’` (NFC) adds 24c2e61362a [InstCombine][X86] Add additional demandedelts style test f [...] adds 3481062bc68 [lldb] [testsuite] Enable forgotten -gsplit-dwarf for 2 testfiles adds c21866476e1 [PowerPC][AIX] Implement by-val caller arguments in a singl [...] adds ef64ba83119 [InstCombine] GEPOperator::accumulateConstantOffset does no [...] adds dd12826808f [Syntax] Build template declaration nodes adds 9f981e9adf9 Reland "[gn build] (manually) port 8b409eaba" adds 06150e8356c [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds f57290ec57d [gn build] add rebase changes that should have been in 9f98 [...] adds d1a7bfca743 [AMDGPU] Fix AMDGPUUnifyDivergentExitNodes adds ea4597eef10 Reapply "AMDGPU/GlobalISel: Fully handle 0 dmask case durin [...] adds 4ea1baf6a0e AMDGPU: Initial, crude support for indirect calls adds fc2a5ef9c87 [NFC][PowerPC] Update test adds 642a424bc49 [gn build] remove a workaround that is no longer needed adds 04a309dd0be [libc] Adding memcpy implementation for x86_64 adds 881f5b5a7b2 Revert "[Syntax] Build template declaration nodes" adds e13d153c1b5 [ARM,MVE] Add intrinsics for the VQDMLAD family. adds e6a74803d4e [VPlan] Use underlying value for printing, if available. adds 0d896278c81 Support repeated machine outlining adds 1cc09dcefcc Add missing module map entry. adds 1e4ee0bfc52 [Dominators] Fixup comments in GenericDominatorTreeConstruc [...] adds dc5f9826396 [GlobalISel] Port some basic undef combines from DAGCombiner.cpp adds 9c6458ecf8c [InstSimplify] Add bitreverse/bswap vector tests adds 746bd860c9c Replace get*Alignment() methods with get*Align() equivalents. adds e009fad342c [PowerPC] Remove UB from PPCInstrInfo when handling rotates [...] adds f8e8f0a6038 [TSan] Support pointer authentication in setjmp/longjmp int [...] adds 6f79f80e6e4 [HIP] Fix duplicate clang -cc1 options on MSVC toolchain adds 1010c44b4c0 [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds 2f8894a5b8b [OPENMP50]Add support for extended device clause in target [...] adds ebec984e14a [AliasAnalysis] Misc fixes for checking aliasing with scala [...] adds 4e8830830ee [libc] Add a missing deps to the linux syscalls target. adds e225e770f7e [TableGen][GlobalISel] Rework RegisterBankEmitter for easie [...] adds e9f22fd4293 [TableGen][GlobalISel] Account for HwMode in RegisterBank r [...] adds 4be504a97f9 [mlir] Add support for detecting single use callables in th [...] adds b40ee7ff1b1 [lldb/MemoryHistoryAsan] Fix address resolution for recorde [...] adds 1e431322099 [mlir][LLVM] Add masked reads and writes. adds 6bdb0efa42b [InstSimplify] Regenerate OR tests adds 47ce1406c8e [InstSimplify] Add missing vector OR test to show lack of D [...] adds 9d40292a642 [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds 64a5e57a61b [mlir] Disable notifyMatchFailure in NDEBUG adds 498b53890d8 [SelectionDAGBuilder][FPEnv] Take into account SelectionDAG [...] adds 22c66c1a28c [JumpThreading] add a miscompile test based on discussion i [...] adds c682a605eb4 [Fuchsia] Include llvm-gsymutil tool in the Fuchsia toolchain adds e24e95fe900 Remove CompositeType class. adds 49bdfd888d3 [InstSimplify] Add missing vector masked add tests to show [...] adds 30ccc2e8d24 [libc++] Add missing visibility annotation for __base adds faba1d034a0 [LangRef] add explanatory text for select poison semantics [...] adds acaf1442226 [LangRef] fix formatting tick; NFC adds 00c1cd19349 [VPlan] Record underlying value for VPValues created by add [...] adds 9bb5685b216 [clang-tidy] misc-unconventional-assign-operator suggest to [...] adds ae7bda5dac7 [mlir][Linalg] Remove initial value for conditions. adds fd2c15e6024 [VPlan] Do not print mapping for Value2VPValue. adds 85bd4369610 [Host] Remove some code that's not needed anymore. adds 7b5d4669daa [MLIR] Allow global with an external linkage to include ini [...] adds 99336bf95ab [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds f3c857fae29 [OPENMP50]Add basic codegen support for ancestor device modifier. adds f951b0f82df [lit] Add builtin support for flaky tests in lit adds 14970669dde [lldb/Test] Add unittest for FileSpec::operator bool() adds 5ffb30fd6c7 [lldb/PlatformDarwin] Expose current toolchain and CL tools [...] adds 1365ab4b63b [clang-tidy] RenamerClangTidy now correctly renames `using [...] adds 47622efc6f0 [clang/test] Add test for DIFlagAllCallsDescribed under -gg [...] adds f18233dad46 Fix -fsanitize=array-bound to treat T[0] union members as f [...] adds d8061456bcc [LangRef] fix typo in select poison explanation; NFC adds c69a4d6bef0 [SelectionDAG] When splitting gathers/scatters in type lega [...] adds 3b35f9d8b51 [mlir][spirv] Use memref memory space for storage class adds 67e8690e53c [mlir][spirv] Let SPIRVConversionTarget consider type availability adds 58df5e6d9ad [mlir][spirv] Plumbing target environment into type converter adds f741b8eabed [mlir][spirv] Move type checks from dialect class to type h [...] adds 9efb4b40232 [mlir][spirv] Make SPIRVTypeConverter target environment aware adds ffd4583c6ae [mlir][spirv] Change standard op patterns to consider type [...] adds 73431a492ba [mlir][spirv] Consolidate std.constant to spv.constant conversions adds 62201763c54 Fix crash in check-mlir due to 08ab8c9af4dd27cb306b449edc9a [...] adds f0ca0a25388 [AppleObjCRuntimeV2] Rewrite GetClassDescriptor, reducing i [...] adds b72e13c242d [MLIR] Deduplicate dialect registration by ClassID adds cd1212deffb [mlir] Introduced CallOp Dialect Conversion adds aacf022cd57 [PowerPC] add IR level isFMAFasterThanFMulAndFAdd - NFC And [...] adds 52b2bae777f [lldb/testsuite] Skip TestEmptyStdModule.py if using a remo [...] adds c182be211a4 [lldb/testsuite] Tweak TestBreakpointLocations.py to pass f [...] adds 127b9d9d774 [lldb/testsuite] Apply @skipIfDarwinEmbedded to part of Tes [...] adds 71db787c458 [lldb/testsuite] Rewrite TestThreadLocal.py adds acd641c19d6 [lldb/testsuite] Slightly rework TestHiddenIvars.py adds 59918d3793a [lldb/testsuite] Make TestObjCIvarStripped.py working with [...] adds 79a7ed92a9b CFGDiff: Simplify/common the begin/end implementations to u [...] adds 2ea5495759f [InstCombine][SVE] Fix InstCombiner::visitAllocaInst for sc [...] adds b58f6bb1207 Add a test for UsedDeclVisitor adds f528df8e269 Revert "Add a test for UsedDeclVisitor" adds 3f85134d710 [PowerPC] implement target hook isProfitableToHoist adds 2c1ba63edee [mlir] Change missed usage PatternMatchResult to LogicalResult adds e778db6d721 recommit b58f6bb1207521cdf6a856004525d7bffa5f2153 adds 5d881dd8a8b Update so debugserver can be built on macos again with xcodebuild. adds 4b0f1e12c24 [AST] Add a flag indicating if any subexpression had errors adds bc18624b403 [mlir] vector.type_cast: disallow memrefs with layout in verifier adds d8fcdcdf68c [Reassociate] add testcases for more than 1 pairs - NFC adds 8a36594a7ec [SCCP] Use constant ranges for binary operators. adds 981f0802b37 [SVE] Generate overloaded functions for ACLE intrinsics. adds bb7d2b17802 [LLD][ELF] - Disambiguate "=fillexp" with a primary express [...] adds 733b3199487 [VP,Integer,#1] Vector-predicated integer intrinsics adds 1d5560c3632 [gn build] Port 733b3199487 adds 6e0aaafbc78 [MLIR][NFC] fix RankedTensorType doc comment adds 5c296df0c0a [ValueTypes] Add EVT::isFixedLengthVector adds 4a7f2032a35 Revert "CFGDiff: Simplify/common the begin/end implementati [...] adds e26e9ba288c [obj2yaml] - Stop dumping an empty sh_info field for SHT_RE [...] adds 5ce38fcbac9 [ValueTypes] Add support for scalable EVTs adds 939ca455e72 [lldb] Fix string summary of an empty NSPathStore2 adds d259e31a172 [InstSimplify] Add missing vector MUL tests to show lack of [...] adds 7ce7f789630 [InstSimplify] Add missing vector ADD+SUB tests to show lac [...] adds 62ab15ffa3f [ARM] Setting missing isLaneQ attribute on Neon Intrisics d [...] adds 7bf23563f4d Revert "[ARM] Setting missing isLaneQ attribute on Neon Int [...] adds dade859b588 [ARM] Setting missing isLaneQ attribute on Neon Intrisics d [...] adds d42711625af [ARM] Creating 'call_mangled' for Neon intrinsics definitions adds f56550cf7f1 [ARM] Enabling range checks on Neon intrinsics' lane arguments adds d4ad386ee19 [ARM] Fixing range checks for Neon's vqdmulhq_lane and vqrd [...] adds 718d94187db Revert "[lldb] Fix string summary of an empty NSPathStore2" adds ff77397fcf6 [mlir] Added llvm.resume and personality functions in LLVM [...] adds 0b458d4dcad [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds b1c8a378f78 [llvm-dwp] Start error messages with a lowercase letter. adds 4a58996dd2d [SCCP] Use constant ranges for PHI nodes. adds 0ea4fb5bb77 [AArch64][SVE] Rename intrinsics for gather prefetch [NFC] adds dcbcec4822f [clang-format] Handle C# generic type constraints adds d9b96210094 Reland D73534: [DebugInfo] Enable the debug entry values fe [...] adds e6f6c551213 [Support] Improve Windows widenPath and add support for lon [...] adds fb11455038a [InstCombine][X86] Tests for variable but in-range vector-b [...] adds 4d8a7202770 [NFC] Simplify test adds accf06feb1d Test commit. adds 9c69cc109bc [obj2yaml] - SHT_REL*, SHT_DYNAMIC sections: add tests to d [...] adds 44361782e2c [lldb] fix typo in comment for lldbtest.py adds 55b92dcb35a [clangd] Fix elog message when preamble build fails. adds cf1f8f9bec2 [OPENMP][DOCS]Update list of constructs and status, NFC. adds a02b38698b4 [obj2yaml] - SHT_DYNAMIC and SHT_REL* sections: stop dumpin [...] adds fecce903db2 [obj2yaml][test] - Update test after output change. adds 5d67fb3eccc [AST][NFCi] Make CXXBasePaths::Origin const adds 06c810b1559 [PowerPC][AIX] Simplify the check prefixes in the ByVal lit [...] adds 6cff2e9f788 [Analyzer] Bugfix for CheckerRegistry adds 0dd0b1017c8 [Parser] Avoid spurious 'missing template' error in presenc [...] adds d0fb6879c37 [NFC][ARM] Add two tests adds e154cbb124a [lldb/testsuite] XFail TestBuiltinTrap.py not only on linux adds ecc6c426977 [lldb/testsuite] Fix TestInlineStepping on arm64 with newer [...] adds 8758d02074b [lldb/testsuite] Skip part of TestProcessCrashInfo.py on Da [...] adds 99a0cbb4232 [lldb/Test] Remove debug print in supports_hw_breakpoints. adds d4d62fcab66 [MLIR] Add test for multiple gpu.all_reduce in the same ker [...] adds 433897da4ab [InstCombine][X86] simplifyX86immShift - convert variable i [...] adds 27ef7c6bf08 [NFC][ARM] Fix for buildbots adds 76a5451a524 [lldb/testsuite] un-XFail TestInlineStepping.py on linux an [...] adds 5e6e545cbab [test] Re-enable accidentally disabled X86 tests adds c13aa36bb7d [X86] Attempt to more accurately model the cost of a bool r [...] adds 88bf9b3d26f [Syntax] Build template declaration nodes adds 5ade17e0ca8 [libc++] Use builtin type traits whenever possible adds 50f19853536 [lldb][NFC] Delete the original UserExpression before tryin [...] adds 74494d9992b [libc++] Don't use __is_fundamental in C++03 mode adds 7b2442584e4 Reland [lldb] Fix string summary of an empty NSPathStore2 adds 56da41393df [SDAG] reduce code duplication in getNegatedExpression(); NFCI adds cd34c0570b5 [ORC] Bail out early if a replacement MaterializationUnit i [...] adds a7b8393ffea [ORC] Don't waste time building empty replacement Materiali [...] adds eb918d8daf1 [ORC] Use finer-grained and session locking in MachOPlatfor [...] adds ad2da631bf3 [ORC] Fix indentation in debugging output. adds 54aec178dac [ORC] Don't use a platform mutex for LLJIT's GenericLLVMIRP [...] adds 018dde4ce57 [AArch64][SVE] Add support for DestructiveBinaryImm Destruc [...] adds 9e2207a00bd [libc++] fix non-builtin is_void implementation adds a11e5b32dfb [InstCombine][X86] simplifyX86immShift - handle variable ou [...] adds c31ee83abb0 Add Builder::get{I32,I64}TensorAttr. adds 90308a4da16 [debugserver] Implement hardware breakpoints for ARM64 adds a983562b234 Precommit test for clang::CallGraph declared functions. adds c2586cab89f [InstCombine][X86] Tests for variable but in-range vector-b [...] adds 0cc2d237516 [Matrix] Hoist load/store generation logic, add helpers for [...] adds 430c9a80c17 [Hexagon] Enable linux #defines adds 30bb113beb3 [AMDGPU][NFC] Refactor emitEntryFunctionPrologue adds db099f994b5 [AMDGPU][NFC] Refactor some uses of unsigned to Register adds 60b1967c393 [AMDGPU] Add Scratch Wave Offset to Scratch Buffer Descript [...] adds 0e9368cc8ca [AMDGPU] Move frame pointer from s34 to s33 adds b20ab412bf8 Teach TreeTransform to substitute into resolved TemplateArguments. adds e23d7865269 [JumpThreading] Fix infinite loop (PR44611) adds 796fb2e4749 [Matrix] Move multiply-add code generation into separate fu [...] adds c985b244ee1 [MSan] Simulate OOM in mmap_interceptor() adds 1db8b341a66 [Matrix] Fold single-use variable into assert adds b4f02d89e5d [AST] Make Expr::setDependence protected and remove add/rem [...] adds b89202e842a [clangd] Do not trigger go-to-def textual fallback inside s [...] adds f87563661d6 [MC][ARM] add implicit immediate form for ldrsbt/ldrht/ldrsht adds 95b6f62efb1 [InstSimplify] Add some vector shift tests to show lack of [...] adds 8a8778f25f1 [CMake] Enable the use of -ffile-prefix-map adds 98223f7931f [Fuchsia] Use -ffile-prefix-map adds d6fc61b7e8b [profile] Record the profile size as a property of the VMO adds 39253a50f0f [ORC] Re-apply 98f2bb44610, enable JITEventListeners in Orc [...] adds 6bc775a1fc1 [MLIR] Interfaces need to used add_mlir_library adds c999084619a [GlobalISel] Port some basic shufflevector undef combines f [...] adds 98ff6eb679c Cleanup the plumbing for DILineInfoSpecifier. [NFC] adds 678da7b109f AMDGPU/GlobalISel: Remove leftover #if 0 adds a3f974f3c33 [WebAssembly] SIMD bitmask intrinsics and builtin functions adds 6343526d640 Revert "Cleanup the plumbing for DILineInfoSpecifier. [NFC]" adds 34db3c3a184 [WebAssembly] SIMD integer abs instructions adds 08670d435bb [WebAssembly] Support swiftself and swifterror for WebAssem [...] adds 09ac859c136 [ELF][test] Make tests less address sensitive and delete re [...] adds 1c153774961 Recommit: CFGDiff: Simplify/common the begin/end implementa [...] adds f7d4bd81443 [MLIR] Fix for out-of-tree builds from install area. adds 4e6c778eca4 [XRay] Record the XRay data size as a property of the VMO adds 011b785505b [ELF] Create readonly PT_LOAD in the presence of a SECTIONS [...] adds 6ef1f3718f3 [sanitizer_coverage][Fuchsia] Set ZX_PROP_VMO_CONTENT_SIZE adds 0ddd04391d2 [MLIR] Fix op folding to not run pre-replace when not const [...] adds fc3752665f4 [RISCV] Passing small data limitation value to RISCV backend adds 032251e34d1 [Coroutines] Fix PR45130 adds a035726e5aa Revert "Generate Callee Saved Register (CSR) related cfi di [...] adds 728b878de68 [AMDGPU] Set the CostPerUse value for vgpr registers. adds 2cbb8c946a6 [AMDGPU] Reuse register during frame index elimination adds 3a8372ed02a [DSE] Support traversing MemoryPhis. adds be86bc76f0c [Matrix] Generalize ColumnMatrixTy to MatrixTy (NFC). adds e9630630ffa [Syntax] Split syntax tests adds 5c10967157d [InstCombine] Don't replace musttail result based on known bits adds 9cf920e64d1 [ARM] Extra MVE float loop tests. NFC adds 03727687766 [InstCombine] Simplify calls with "returned" attribute adds ebb04e9ca93 [NFC][RISCV] Test for 0.0 fp immediate adds 3c24aee7ee8 [RISCV] Select +0.0 immediate using fmv.{w,d}.x / fcvt.d.w adds b3499f572d3 [ARM] Change VDUP type to i32 for MVE adds baa6f6a7828 Revert "[TableGen][GlobalISel] Account for HwMode in Regist [...] adds 180581cfcf5 [clang] Add support for consteval constructors adds 467c4902a10 [lldb] Enable now passing part of TestDataFormatterStdString.py adds 63778bc653a [llvm-readobj][llvm-readelf][test] - Add a test to check ho [...] adds 089cfe113da Improve step over performance adds fd7300f717c [Syntax] Test both the default and windows target platforms [...] adds 86b093d1a18 [llvm-readobj] Allow syms from all sections to match stack [...] adds a09ff56b5b5 [Tests] Regenerate some test checks; NFC adds c1efdbcbe0d [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds 9967352a034 Revert "[Syntax] Test both the default and windows target p [...] adds ce6c95aacae [InstCombine] Move test to instcombine; NFC adds fcba7c3534f [OPENMP50]Initial support for scan directive. adds 7f764fa18f6 [ValueTracking] Add some initial isKnownNonZero DemandedElt [...] adds a4edea29be2 Fix `-Wunused-variable` warning. NFC. adds ece6cf0fa56 [DSE,MSSA] Precommit additional tests for D73763. adds 7a85e3585ec [ARM,CDE] Implement GPR CDE intrinsics adds d22e6617125 [ARM,CDE] Implement CDE S and D-register intrinsics adds 969034b8603 [ARM,CDE] Implement CDE unpredicated Q-register intrinsics adds 6ae3eff8baa [ARM,CDE] Implement CDE vreinterpret intrinsics adds 6e34e71869a [AMDGPU] Enable divergence driven ISel for ADD/SUB i64 adds f8352502a35 [scudo][standalone] Allow fallback to secondary if primary is full adds 53d6b156bbb AMDGPU: Add more tests for fshr adds a950e3beefd AMDGPU: Move towards deprecating alignbit intrinsic adds d168b777803 [DAGCombiner] Fix non-determinism problem related to argume [...] adds fc902cb6e2b [PowerPC][AIX][NFC] Add zero-sized by val params to cc test. adds 94061df6e5f [analyzer] StdLibraryFunctionsChecker: Add argument constraints adds eddede9d518 [Syntax] Test both the default and windows target platforms [...] adds 45a9945b9ea [ARM,MVE] Add ACLE intrinsics for the vminv/vmaxv family. adds 1adfa4c9916 [ARM,MVE] Add ACLE intrinsics for the vaddv/vaddlv family. adds 34659de5fdd [InstCombine][X86] simplifyX86immShift - convert variable i [...] adds ffcc076a2b2 [[Clang CallGraph]] CallGraph should still record calls to decls. adds ce5173c0e17 Use FinishThunk to finish musttail thunks adds 32fbea15485 [X86] Prevent (bitcast (broadcast_load)) combine from produ [...] adds 56122fcd641 [PowerPC][AIX][NFC] Extend the test coverage of ByVal args. adds edcfb47ff6d [DAGCombiner] Do not fold truncate(build_vector(..)) if it [...] adds ededa65d559 [analyzer] StdLibraryFunctionsChecker: Add NotNull Arg Constraint adds f59bb40e361 Attempt to fix failing build-bot with [-Werror,-Wcovered-sw [...] adds 942afe0cb2a [mlir/quant] fix a small typo in the quant utility adds 0b18b568e91 [lldb-vscode] Don't use SBLaunchInfo in request_attach adds 3205d1a8603 [InstCombine] Handle known shl nsw sign bit in SimplifyDemanded adds 5de4ba1770f Cleanup the plumbing for DILineInfoSpecifier. [NFC - Try 2] adds 18e8f27ad87 Add missing module map entry adds 462db62053f [mlir][AVX512] Start a primitive AVX512 dialect adds 636665331bb PR45181: Fix another invalid DIExpression combination adds fe5937cb33b [llc] Initialize TargetLoweringObjectFile for MIR input adds 7899fe9da8d [X86] Reland D71360 Clean up UseInitArray initialization fo [...] adds 06dea73307e [OPENMP50]Initial support for inclusive clause. adds 7efbd851adf [libc++] Add a new FILE_DEPENDENCIES parser adds 25294708f5e [libc] NFC - Move the round redirector from its own nested [...] adds 4716ebb823e [ADT] CoalescingBitVector: Avoid initial heap allocation, NFC adds a3fd1a1c744 [ADT] CoalescingBitVector: Add advanceToLowerBound iterator [...] adds a2459433551 [LiveDebugValues] Speed up collectIDsForRegs, NFC adds 7ec24448801 unittest: Work around build failure on MSVC builders adds 9b95929a26e [OPENMP50]Do not allow several scan directives in the same [...] adds 2b52e4e629e [InstCombine] Remove known bits constant folding adds be4e9db5799 [mlir][Linalg] NFC: Clean up for 0-D abstraction. adds 08a9147349e [mlir][LLVMIR] Fix fusion for rank-0 tensors adds fe5599eac6a [llvm-ar] Use target triple to deduce archive kind for bitc [...] adds 40fc80a0232 [mlir][AVX512] Hotfix - Fix CMake Doc generation dependence adds 6385c2ab8ff [AppleObjCRuntimeV2] Force lazily allocated class names to [...] adds 696ae6f7d8e [StopHook] Use wildcard matching. Pointed out by Jim Ingham. adds 417d69595f0 [InstSimplify] Reorder checks to be more efficient; NFC adds 079c6ddaf53 Correctly initialize the DW_AT_comp_dir attribute of Clang [...] adds 97f490d87b2 Don't set the isOptimized flag in module skeleton DICompileUnits. adds dc4259d5a38 [c++20] Further extend the set of comparisons broken by C++ [...] adds e708471395b [mlir][NFC] Cleanup AffineOps directory structure adds 576105c322b [lldb-vscode] stop read loop after termination adds 2dec82652e4 Create basic SBEnvironment class adds 1993f95f2b1 [ValueTracking][SVE] Fix getOffsetFromIndex for scalable vector. adds fc8a009bf39 Clean up and simplify after collision of c48442c and 19fccc [...] adds df4cc35efd0 [VE] Fix -Wunused-private-field after D72598 and -Wdeprecat [...] adds 43580a5c5af Allow remapping Clang module skeleton CU references with -f [...] adds f75f19c2374 [Clang][test] Add .i files for test discovery adds 0a42c9bfe4e Enable CUDA offloading on aarch64 host adds 479ee110615 [mlir] [VectorOps] Introduce vector.transpose adds e22fe98d059 [libc++] Make the %run substitution closer to how .pass.cpp [...] adds 6725c4836a5 Allow remapping the sysroot with -fdebug-prefix-map. adds 556b917fffc [clang-tidy] Merge common code between llvmlibc-restrict-sy [...] adds bde15de3cab Revert "Allow remapping the sysroot with -fdebug-prefix-map." adds ceae47143b1 Allow remapping the sysroot with -fdebug-prefix-map. adds 0feaf22c8a7 [libc++] Properly handle environment variables with '=' in them adds 6aef702ab63 [mlir][AVX512] Hotfix - Add cmake dependence on MLIRSideEffects adds aa1e0e01d89 [MLIR] Fix Xcode build due to incorrect library path adds 0e916bf9f5e Driver: Improve performance of getSDKName() adds 0a5fbf30937 Temporarily Revert "Create basic SBEnvironment class" adds 4f5af9d70dc [ValueTracking] Fix usage of DataLayout::getTypeStoreSize() adds 141e5890d81 [MLIR] Add an IfOp builder with results adds 298527587c7 [libomptarget][nfc] Disable amdgcn rtl build. The cmake log [...] adds 1ae737a7c6a [libc++] Temporarily disable an availability test that is broken adds fc7233d7744 Temporarily Revert "[X86] Reland D71360 Clean up UseInitArr [...] adds be10b7e43a3 Use values cached in ConstantExprs for expression evaluatio [...] adds d35a454170d [CodeGen] Emit destructor calls to destruct non-trivial C s [...] adds 09c8845adfd [lldb]/Tablegen] Use ElementType instead of DefaultValueUnsinged adds ced7617c385 PR45267: Don't reject pure-specifiers with escaped newlines [...] adds a299178ae77 [cmake] Fix -stripped for umbrella library install targets adds a8c22ba4162 [lldb-vscode] Add missing launchCommands entry in the package.json adds 4ec6ebabfc3 [lldb-vscode] Add inheritEnvironment option adds 34c0759f846 Create basic SBEnvironment class adds c85bf7cfa8b Revert "[lldb-vscode] Add inheritEnvironment option" adds e292cdfb338 Revert "[lldb-vscode] Add missing launchCommands entry in t [...] adds 7ece7c0faae Revert "Create basic SBEnvironment class" adds 85c30f3374d [X86] Reland D71360 Clean up UseInitArray initialization fo [...] adds de6cd3e836e [WebAssembly] Add SIMD integer abs builtins adds c6d799156a0 [clangd] Skip ClangdVFSTest.TestStackOverflow when address [...] adds c5fd9e3888d [DAG] Don't permit EXTLOAD when combining FSHL/FSHR consecu [...] adds 0f4c70dd3ec [clang-tidy] Add spuriously-wake-up-functions check adds b6d9bfd180c [gn build] Port 0f4c70dd3ec adds ff3aae69084 Fix Wdocumentation warning. NFCI. adds a6787244010 Fix Wdocumentation warning. NFCI. adds 770df904512 [clang-tidy] my work: fix sphinx docs adds f00a4b531a5 [InstCombine][X86] simplifyX86immShift - remove ConstantAgg [...] adds d5d8569df14 Fix static analysis warnings about classes with virtual met [...] adds f9a8650578d Revert rGd5d8569df14e95e2c53d167bd1b37995bcbec565 "Fix stat [...] adds d260a10d98d [clang] Fix crash during template sema checking adds 49ccb32fd41 Update ConversionToLLVMDialect.md adds f424d51c3e1 Revert rGe6a7e3b5e3e7 "[X86][SSE] matchShuffleWithSHUFPD - [...] adds 73cf8abbe69 [ADT] Implement the Waymarking as an independent utility adds 9ab0c9a6440 [gn build] Port 73cf8abbe69 adds 7a62ea3889b [ValueTracking] Short-circuit computeKnownBitsAddSub(); NFCI adds 4ceade04284 [X86] Combine concat(shufps,shufps) -> shufps(concat,concat) adds be41a98ac22 tsan: fix deadlock with pthread_atfork callbacks adds 05880fc9ae7 [libc++] fix some non-modular tests adds deb51033784 [libc++] Rework buildbot configuration for the greater good. adds c0e1135fb08 [libc++] Fix URL to llvm github adds 601d25cb736 [obj2yaml] - Simplify and reduce `ELFDumper<ELFT>::dumpSect [...] adds 684ee2057f5 [clang/docs] Fix various sphinx warnings/errors in docs. adds 7a3d994880c [X86][AVX] Add HADDPD test case for PR44694 adds 25eb9056d7f [X86] getTargetShuffleAndZeroables - add insert_subvector(u [...] adds 2d712fb7558 [InstCombine] Add ctpop -> cttz combine tests (PR43513) adds 920d90f9663 The generated code does not need to check for a null Decl; NFC. adds 90c74435d36 [libc++] tolerate missing diagnostic with modules enabled adds 34fd007aaf8 Revert "[ADT] Implement the Waymarking as an independent utility" adds d779ee152ce [gn build] Port 34fd007aaf8 adds d1739f1e2f2 [X86] Add test for v4i8 loop sad pattern. adds d477df59cf4 [MLIR][NFC] fix memref type doc comment on dynamic shape adds a1e02753c0e [X86] Add nonloop v64i8 test to sad.ll. adds 38a8760b99b [ORC] Move ostream operators for debugging output out of Core.h. adds b5eafda8d3e Revert "EHScopeStack::Cleanup has virtual functions so the [...] adds b4456436321 [X86] Delete unneeded X86ELFTargetObjectFile::Initialize. NFC adds 140d6245af2 Delete TargetLoweringObjectFile::Ctx adds 71f8b78d897 [AsmPrinter] Simplify AsmPrinter::emitXXStructorList after D61547 adds dbf78ae1287 [LVI] Use SmallDenseMap for getValueFromCondition(); NFC adds e9482ed1942 [mlir] Move several static cl::opts to be pass options instead. adds e74961eee26 [mlir][NFC] Remove Analysis/Passes.h adds e8f5c072f6d [mlir] Move the testing pass for GpuKernelToCubin to the te [...] adds c1bc56bf4f2 [NFC] [PowerPC] Update FMA association test adds a63eaa5449f [SLP] Avoid repeated visitation in getVectorElementSize(); NFC adds d077d678d34 [ValueTracking] Avoid blind cast from Operator to Instruction adds 0105e9cd92b [X86][SSE] Add some additional irregular AVG tests adds 996dc13dc4c [NFC] [PowerPC] Remove unsafe-fp-math in FMA test adds 763871053cc [DAGCombiner] Require nsz for aggressive fma fold adds 830cfda19f7 Utils: Mostly convert memcpy expansion to use Align adds dc81923659c [InstCombine] Remove ExpensiveCombines option adds b76bbcc60db Verifier: Check bswap is supported size adds 2655d1b4578 Remove a dead function. adds b89ae50795d [X86] Remove maximum vector width restriction from combineL [...] adds ca04d0c8fd2 [libc] Add signal adds 314deab9af9 Add Triple::isAMDGPU adds 78957bab551 [NFC] Refactor handling of Xarch option adds 0e1e9b9a811 [libc][NFC] Fix typo in milliseconds adds bb621cac3d4 [mlir] Change include image to be toplevel adds 0f15ace018b [mips] Rename target feature Mips3D => HasMips3D. NFC adds ecc92fd018c [mips] Add HasMips3D to the list of features unsupported by [...] adds 862f120fdb0 [mips] Remove instructions related to "wired paired single" [...] adds dca9e40c0cf [mips] Implement sle/sleu pseudo instructions adds 9bbddfbeaab [mips] Implement sne pseudo instruction adds 2dc4eb08cd9 [mips] Implement .cpadd directive adds 7cfd5de61b8 clang/release notes: s/Subversion/git/ adds f4c67dfa925 [X86] More accurately model the cost of horizontal reductions. adds ea4ec172080 update of the llvm doc: we moved to git adds 006244152d6 [SCCP] Add a few more tests for conditional propagation,XOR. adds 72fd1033ea5 Doc: Links should use https adds 986051749cb doc: use the right url to bugzilla adds e2cb1213745 [X86] Remove maximum vector length limit from combineBasicS [...] adds 5d4c1c00e6b Roll an expression into an assert to remove the need for a [...] adds 0d0b90105f9 Revert "[FIX] Do not copy an llvm::function_ref if it has t [...] adds 56e1c20bfdf [MLIR][NFC] rename ConvertStandardToLLVM, ConvertLoopToStan [...] adds b8737614964 [MLIR][NFC] Move some of the affine transforms / tests to d [...] adds 196b48a2244 [NFC] [PowerPC] Prepare test for FMA negate check adds 5792c2236d5 Add test cases that are addressed by D76010 adds 2ec59a0a40f Buildbot debugging of 0d0b90105f92f6cd9cc7004d565834f442918 [...] adds a1762f9ceb9 [libc] Don't configure test and fuzzer when -DLLVM_INCLUDE_ [...] adds 0cc124c186a [llvm-objdump][test] Improve PowerPC branch offset tests adds ccf49b9ef01 [GlobalISel] support widen unmerge if WideTy > SrcTy adds 8e45eaf1da5 [NFC][DAGCombine] Refactor post-inc logic adds 62fdb1f534b [DAGCombine] Skip PostInc combine with later users adds 7cdbf1ed4b9 Make use of APInt::countLeadingOnes. NFC. adds df5fa487397 [clang-tidy][NFC] Add missing check group docs and order entries adds 6a6a83c6e9b MergeFunctions.rst - multiply vs shift typo (PR44717) adds ea64ee0edb2 [Alignment][NFC] Deprecate ensureMaxAlignment adds b43ae21e608 Fix all-reduce int tests by host-registering memrefs. adds 6081ccf4a3b Apply function attributes through array declarators adds 72d1419bfba [InstCombine] Add CTPOP -> CTTZ simplifications (PR43513) adds b259ce998f5 [llvm-readobj] Derive dynamic symtab size from DT_HASH adds b8a2cf6b5b9 [SCCP] Extend test coverage in conditions-ranges.ll to fals [...] adds 16d2065cfc8 [InstCombine] Add ub-safe negation patterns (PR27817) adds 3ba550a05af [Alignment][NFC] Use TFL::getStackAlign() adds 32851f8d635 [Alignment][NFC] Deprecate VectorUtils::getAlignment adds 9adc7fc3cdf [SystemZ] Perform instruction shortening for fused fp ops. adds fa0320dd8d5 Add ParsedAttrInfo::handleDeclAttribute adds 5eeea337bec [VectorCombine] add more tests for extract-extract patterns; NFC adds 78e2a3c6784 [clang-format] Reflow long C# generic type constraints correctly adds 7693a9b9314 [clang-tidy] Fix RenamerClangTidy handling qualified TypeLocs adds 0eeee83d751 [VectorUtils] move x86's scaleShuffleMask to generic VectorUtils adds 33942d18b11 [SCCP] Precommit additional range propagation test. adds 24698e526f6 Implement wave32 DWARF register mapping adds 6a4905ae2d6 [lldb] Mark expressions that couldn't be parsed or executed [...] adds 60bad941a1c [Analyzer] Iterator Modeling - Model `std::advance()`, `std [...] adds 5e1a026c2d8 [clang-format] Do not indent C# array initialisers as conti [...] adds fdcb2710553 [InstCombine] Limit CTPOP -> CTTZ simplifications to one use adds f383fb40b17 Remove legacy CMake targets for libcxx and libcxxabi adds 9228a9efc6c [lldb/Target] Initialize new targets environment variables [...] adds cd7b45057ca [lldb/API] Make Launch(Simple) use args and env from target [...] adds b4a6e63ea12 [lldb/Target] Rework the way the inferior environment is created adds 04d48111bf9 Revert "Remove legacy CMake targets for libcxx and libcxxabi" adds db3f3f0240b AMDGPU/GlobalISel: Add some oversized G_IMPLICIT_DEF tests adds 0444d16a16c [GlobalISel] Add generic opcodes for saturating add/subtract adds a711a3a4603 [Syntax] Build mapping from AST to syntax tree nodes adds f3bf4b05c2a [Attributor][NFC] clang-format Attributor.{h,cpp} adds 0995001ce57 [Attributor][NFC] Predetermine the module before verification adds 54ec9b54f6b [Attributor] Unify handling of must-tail calls adds 68fed270674 [Attributor] Handle calls in AAValueConstantRange properly adds c57689bef26 [Attributor][NFC] Copy llvm::function_ref, don't use references adds ebf83c36e29 [Analysis] simplify code for scaleShuffleMask adds 5ff5ddd0adc [Win64] Insert int3 into trailing empty BBs adds 596da62d21e Add support for custom op parser/printer hooks to know abou [...] adds 278c00c4ff8 [libc++] [NFC] Test that correct value category is used in [...] adds b670ab7b6b3 recommit 1b978ddba05c [CUDA][HIP][OpenMP] Emit deferred dia [...] adds 57b8a407493 [analyzer][NFC] Tie CheckerRegistry to CheckerManager, allo [...] adds 0ca19efe7b5 Add AMDGPU MC unittests only when AMDGPU target is being built adds 7e10581e8c1 [lldb/testsuite] Skip part of TestSettings.py on windows adds 3c84aca9b35 [libc++] Bump Clang support for Clang 4 adds e10af89d991 [ARM] Extra VMOVN and VMULL tests. NFC adds c1f8595fe5b [Support] Silence warning in Path unittests when compiling [...] adds ccc0d351817 [Analyzer] IteratorRangeChecker verify `std::advance()`, `s [...] adds 0a076f2660b [ELF][test] Clean text-section-prefix.s adds ff2f5097ed4 [Attributor] Fold single-use variable into assert adds 3f51c5d9caa [OpenMPOpt][FIX] Resolve OpenMP runtime call type mismatches adds 9d38f98dc30 [OpenMPOpt] Validate declaration types against the expected types adds ae37e2285d2 [lldb/Reproducers] Mark reproducer test directory as unsupp [...] adds 552bd477f8e [gn build] Port 24698e526f619271705fe72bcaa928be9bc82484 adds ae044467ede [openmp][runtime] Fixed hang for explicit task inside a taskloop. adds 63828a35da6 [OPENMP50]Bassic support for exclusive clause. adds 04336ada175 [clang-format] No space inserted between commas in C# adds ff042de67d5 [gn build] Port 24698e526f619271705fe72bcaa928be9bc82484. F [...] adds 9607a119bd5 [gn build] Port 57b8a407493 adds 9e33c096476 [ELF] Keep orphan section names (.rodata.foo .text.foo) unc [...] adds a1fe6beb1ec [InstCombine] remove one-use check for ctpop -> cttz adds 42d8f48ccfc Fix a warning building on my machine, NFC. warning: unused [...] adds 1b9cd51d55b [CMake] Fix AMDGPUTests -DBUILD_SHARED_LIBS=on builds and t [...] adds a567d6809e1 [DataFormatters] Add formatter for libc++ std::unique_ptr adds 04f2b717d23 [mlir] Fix unsafe create operation in GreedyPatternRewriter adds 328b72dd820 [Support] Fix clang warning in widenPath NFC adds aa63eb6a461 GlobalISel: Add computeKnownBitsForTargetInstr adds 58f843a5b3d GlobalISel: Prepare to allow other target unit tests adds 2ad5fc1d915 AMDGPU/GlobalISel: Implement computeNumSignBitsForTargetInstr adds 56abcfad70e Revert "[analyzer][NFC] Tie CheckerRegistry to CheckerManag [...] adds 75add0b2ef1 [gn build] Port 56abcfad70e adds 896335bfb8e Don't export symbols from clang/opt/llc if plugins are disabled. adds 6b57d7f57d2 [OpenMP][NFC] Reduce instantiation time with different data [...] adds 55eca2853e4 [OpenMP][NFC] Minimize memory usage and copying of `OMPTraitInfo`s adds 43d98a0ecfe Allow replacing intrinsic operands with variables adds cfaa84e1a67 Fix "previously declared as a struct" warning adds 5f5fb56c68e [compiler-rt] Intercept the uname() function adds 67d67ebe8f2 Internal expressions shouldn't increment the result variabl [...] adds a650d555fc2 [Attributor][NFC] Refactorings and typos in doc adds f2f96eb605b [llvm-objcopy] Improve tool selection logic to recognize ll [...] adds 7bf871c39f7 [analyzer][NFC] Move the text output type to its own file, [...] adds b20a1d840f0 GVNSink: Allow handling addrspacecast adds 3f533006ba8 AMDGPU: Emit llvm.fshr for __builtin_amdgcn_alignbit adds 5896e2df45d [Clang] Fix HIP tests when running on Windows with the LLVM [...] adds 66073953a5c AMDGPU: Allow vectorization of round intrinsic adds 1a4421a5e86 [analyzer] ConstraintManager - use EXPENSIVE_CHECKS instead [...] adds defd96f1e36 [gn build] Port 7bf871c39f7 adds f3018068517 [lld] Enabling loading LLVM pass plugins adds b6ae8937e03 [lldb/PlatformDarwin] Always delete destination file first [...] adds a20862307ff Improve module.pcm lock file performance on machines with h [...] adds 502915c619a PR45142: 'template ~X<T>' is ill-formed; reject it rather t [...] adds f0990e104b0 [PowerPC]: e500 target can't use lwsync, use msync instead adds 1236eb6c31f [OPENMP50]Add 'default' modifier in reduction clauses. adds 564ece93b83 [MLIR] Insert loop.yield to IfOp regions only if it's void. adds de0758e5bd9 [MLIR] Fixes for BUILD_SHARED_LIBS=on adds c5c4109071c [examples] Fixes for BUILD_SHARED_LIBS=on adds bfa9ce1cb27 [PowerPC] Improve handling of some BUILD_VECTOR nodes adds 2b4027f2b8d [analyzer] Delete unneeded headers and using after D76509 f [...] adds 987f153929e [msan] Fix sigaltstack false positive. adds 5bd06118c2a Update documentation for __builtin_operator_new and __built [...] adds 2136d17d8de [compiler-rt] Add ConsumeRandomLengthString() version witho [...] adds edf6a19adf7 [clangd] Rename theia-derived semantic highlighting protocol. NFC adds 02187ed45a4 [GlobalISel] Combine G_SELECTs of the form (cond ? x : x) into x adds f09f4b26762 [OpenMPOpt] Initialize value to avoid use of uninitialized memory adds 4a219bf7ff6 Fix a bug in the .mlir lexer, where a \0 character in a fil [...] adds fd868f517d2 Create basic SBEnvironment class adds 318a0caf9ac Revert "Create basic SBEnvironment class" adds 8140f6bcde4 scudo: Create a public include directory. NFCI. adds 42df3e29856 [VirtualFileSystem] Add unit test for vfs::YAMLVFSWriter adds 8d46bfa8084 [mlir] [VectorOps] A "reference" lowering of vector.transpo [...] adds 78e61496bc4 [MLIR][NFC] loop tiling - improve comments / naming adds ca69be218c0 Create basic SBEnvironment class adds 98fa6150028 [MLIR] move loopUnrollJamBy*Factor to loop transforms utils adds 49e5a97ec36 Add an algorithm for performing "optimal" layout of a struct. adds 816ad48c820 [NFC][RUIP] Small debug output refine adds dab219eedd2 [libc] Enable llvmlibc clang-tidy checks adds 20d704a75ed [objc_direct] also go through implementations when looking [...] adds e79b1ab65b8 Make test more flexible for when the variable is renamed in [...] adds bec785ab704 [MLIR][NFC] flat affine constraints - refactor to share, renames adds b7cd291c154 [GlobalOpt] Treat null-check of loaded value as use of glob [...] adds d0f4af8f308 [Coroutines] Insert lifetime intrinsics even O0 is used adds a44de12ab21 [Coroutines] Also check lifetime intrinsic for local variab [...] adds 18e1a59eed5 Fix another instance where a variable was renamed in the ge [...] adds 9d07d91fb6c [PowerPC] fix a typo in commit 3f85134d710c adds e0279d720a6 [lldb-vscode] Add missing launchCommands entry in the package.json adds 733edf9750a [AST] Add RecoveryExpr to retain expressions on semantic errors adds 6f86e6bf404 [ARM][MVE] Add target flag for narrowing insts adds 94cacebccad [ARM][LowOverheadLoops] Add checks for narrowing adds 1232cfa385c [ARM] Don't split trunc stores that can be better handled as VMOVN adds 080d046c91d [ARM][CMSE] Implement CMSE attributes adds 180d211770a tsan: Adding releaseAcquire() to ThreadClock adds 8905617ee3a [UpdateTestChecks] Use common ir function name matcher and [...] adds ca21e60fdf3 [NFC][ARM] Add missing tests adds 68687e75e7c [lldb][NFC] Mark GetNextPersistentVariableName as overriden [...] adds b194e7d6313 [clangd] Change line break behaviour for hoverinfo adds f282b6ab23a [ReleaseNotes,ARM] MVE intrinsics are all implemented! adds 8fa322dd39a Increase DIAG_SIZE_DRIVER as we're close to hitting it adds 896fa30fc03 Fix unused variable warning adds b6732056a44 Make helpers static. NFC. adds a2aa9970e1f [AST] Use TypeDependence bitfield to calculate dependence o [...] adds 0b599821341 [CodeGen] Fix test attr-noreturn.c when run from my home directory adds 7caba33907a [ConstantRange] Add initial support for binaryXor. adds 58cdb8bff06 [mlir][StandardToSPIRV] Add support for lowering unary ops adds 865638f5eb5 [X86][SSE1] Add additional logic+movmsk patterns that scala [...] adds 177dd63c8d7 Data formatters: fix detection of C strings adds b91905a2637 [lld-link] Support /map option, matching link.exe 's /map o [...] adds 58ec867a3ba [InstSimplify] add more tests for freeze(constant); NFC adds 7802be4a3d8 [SelDag] Add FREEZE adds d381b6a8d3e [DWARF] Fix v5 debug_line parsing of prologues with many files adds 2ae25647d1a [CUDA][HIP] Add -Xarch_device and -Xarch_host options adds ce36c5ab643 [libc++] Fix installation of cxx_experimental adds 386f95e168b [Parser] Fix the assertion crash in ActOnStartOfSwitch stmt. adds 10bd8422d04 [ARM][CMSE] Fix clang/test/Driver/save-temps.c test. adds 714402147da [X86][SSE1] Add support for logic+movmsk patterns (PR42870) adds 4a6ebc03ba8 [MachinePipeliner] Fix a bug in Output Dependency chains adds 6c3c7a0dd64 [InstSimplify] add tests for freeze(constexpr); NFC adds f8c79b94af7 [ARM] Fold VMOVrh VLDR to LDRH adds 1f80e51546b [lldb/Reproducers] Collect files imported by command script import adds 5d29aebf878 [gn build] Port 49e5a97ec36 adds e3221086676 [gn build] (manually) port 8140f6bcde4 adds 9ca6334c336 [gn build] (manually) port 8140f6bcde4 better adds c3417592c84 Revert "Include static prof data when collecting loop BBs" adds 26d4b5514a9 [gn build] Port b91905a2637 adds b8dab9b3d5b [lldb] Remove some debugging printfs from ITSession code adds 88b493a8382 [ValueTracking] improve undef/poison analysis for constant vectors adds 26ebc51a34e AMDGPU/GlobalISel: Fix smrd loads of v4i64 adds 2ea46051055 AMDGPU/GlobalISel: Add some more tests for add3 folding adds bb3aa09b15a AMDGPU/GlobalISel: Add more tests for add3 folding adds 0c24adcc94b [X86][AVX] Add some v32i16 to v32i8 style truncation shuffle tests adds 0019c2f194a [SelectionDAG] Don't crash when freezing illegal float types adds 49f75132bcd [DivRemPairs] Freeze operands if they can be undef values adds 83346a4077b [lit] NFC: Document missing result codes adds 0813f41005f [libomptarget][nfc] Explicitly static function scope shared [...] adds c5f4b728353 NFC: Fix typos in TestingGuide documentation adds f7052da6db8 [DWARF] Emit DW_AT_call_pc for tail calls adds 6905394d153 [lldb/DWARF] Use DW_AT_call_pc to determine artificial fram [...] adds 8f64b02d336 [lit] Allow passing extra commands to executeShTest adds 597718aae01 Re-land "Avoid emitting unreachable SP adjustments after `throw`" adds 1a083f027f3 [mlir] Revamp operation documentation generation adds aef982e35ac [lldb] Don't dump the frame in SBTarget::EvaluateExpression [...] adds 6b6a779ca8c [lldb][NFC] Always update m_cache_{hits/misses} in FormatCache adds c84446f4e9a [VectorCombine] add tests for bitcast (shuffle); NFC adds 0a9b91c390b Revert "[lldb/DWARF] Use DW_AT_call_pc to determine artific [...] adds 0ccc4de42ea [lldb] Always log if acquiring packet sequence mutex fails adds 43a6d285bfe [libc++] NFC: Reuse the TEST_CONCAT macro instead of reimpl [...] adds de98cf92e30 [CodeGen] Add an alignment attribute to all sret parameters adds e8d67ada2df [X86] Disable autoupgrade support for avx512.mask.broadcast [...] adds 03e29e2c19a [lldb/DWARF] Reland: Use DW_AT_call_pc to determine artific [...] adds 57ce79f74d2 [mlir] Clarify constraint on derived attribute adds 3e11d84d9f7 [Darwin] Add another hint to find the kernel. NFC. adds 7339fca25fa Revert "Convert a reachable llvm_unreachable into an assert." adds 5699d08b79a [Attributor] Use knowledge retained in llvm.assume (operand [...] adds 472d282046d [AArch64][GlobalISel] Don't localize TLS G_GLOBAL_VALUEs on [...] adds 4f4e68799fd [test][clang][driver] Add required features. adds 3f1defa6e2d [clang codegen] Clean up handling of vectors with trivial-a [...] adds a4e8d89704d [GWP-ASan] Only pack frames that are stored. adds 1ac403bd145 [libc++] Build the dylib with C++17 to allow aligned new/delete adds 7311b274039 [libc++] Install a recent CMake in the Docker build bots adds ec184dd548f [LVI] Convert some checks to assertions; NFC adds b684c1a50f7 Add a `Symbolizer::GetEnvP()` method that allows symbolizer [...] adds 46bb6613a31 [mlir][GPU] Use StructAttr to drive lowering from loop.para [...] adds 39c55cef21b GlobalISel: Introduce bitcast legalize action adds ed8ad6ec156 Add an -object-path-prefix option to dsymutil adds dca920a904c Allow remapping Clang module include paths adds 01a337cfc92 AMDGPU/GlobalISel: Add missing tests for G_FRINT selection adds c9e0b448b8c AMDGPU/GlobalISel: Add load legalization tests adds bba8c92d541 AMDGPU/GlobalISel: Add select patterns for v_and_or_b32 adds c025235e962 Revert "Allow remapping Clang module include paths" adds d16ee1174a9 AMDGPU/GlobalISel: Add some end to end tests for fma selection adds d6fb02b196d [libc++] Update a bad documentation link adds 32bddad37bf [profile] Make atexit hook a no-op on Fuchsia adds baa78179fef AMDGPU/GlobalISel: Add a testcase for G_UNMERGE_VALUES lega [...] adds 2488ea428d6 [NFC][Test][PowerPC] Add one test to verify the behavior of [...] adds 64a9c944fc4 Revert "[libc++] Build the dylib with C++17 to allow aligne [...] adds ba1f4405c68 [profile] Move RuntimeCounterRelocation and ProfileDumped i [...] adds c2273883e23 [gn build] Port ba1f4405c68 adds 8786cdb3cdf [MLIR][NFC] std::is_same || -> llvm::is_one_of adds 2c080a3f23e [libc] Generate math.h instead of the static file it is currently. adds 70f9f4dd9d1 [PowerPC] Pre-commit reduced test case for PR45297. NFC. adds 2093fdd429d [X86] Split masked instruction tests to enable D60940. adds 1262db1b6a9 [compiler-rt] Refactor FuzzedDataProvider for better readability. adds 453eac3f779 Minor fixes to a comment in CodeGenPrepare adds 1e65209e045 [compiler-rt] FuzzedDataProvider: make linter happy. adds 0788acbccbe [AST] Build recovery expressions by default for C++. adds 28a42dd1b9e [VE] Change name of enum to CondCode adds e951a489962 Add freeze(and x, const) case to codegenprepare's freeze-cmp.ll adds 6538b4393dc [clang-apply-replacements] No longer deduplucates replaceme [...] adds 8f1651ccead [ARM,MVE] Add missing tests for vqdmlash intrinsics. adds 578fb2501a6 [Sema][SVE] Allow ?: to select between SVE types in C adds 856bdd01fd6 [Sema][SVE] Allow casting SVE types to themselves in C adds e87250202d1 [ARM][MVE] Add HorizontalReduction flag adds d82c1e8c567 Rename test name, add more tests for codegenprepare adds 05606329e23 [AArch64][SVE] Add SVE intrinsics for masked loads & stores adds eed57dd5915 [libcxx] Allow tests to link with static libc++abi/libc++ e [...] adds 7754b652b3b [lldb][NFC] lldb_assert->lldbassert in ClangExpressionParser adds b5a034e771d [SYCL] Implement __builtin_unique_stable_name. adds 72b51d6f93b OpenMP] Adding InaccessibleMemOnly and InaccessibleMemOrArg [...] adds bc3f171090f Don't normalise CXX11/C2X attribute names to start with :: adds 3f03c12a51b Add an attribute plugin example adds f631b9dc36b [VectorCombine] add shuffle tests; NFC Goes with DD76727. adds c278e8f8f91 Build fix: AttributeCommonInfo::AS_C2x adds 86e0a6c6062 Add MS Mangling for OpenCL Pipe types, add mangling test. adds 3282d875d6f [PowerPC][AIX] ByVal formal arguments in a single register. adds 5e7a42cf077 [llvm-objdump] Replace array_pod_sort with llvm::stable_sort adds f09b891d4a3 [SystemZ] Improve foldMemoryOperandImpl() adds 146df5581d9 [X86][AVX] Add common prefix to merge 32/64-bit AVX1 checks adds ce984129eaa [AMDGPU] Add SIPreEmitPeephole pass. adds 69def205423 [gn build] Port ce984129eaa adds 2b529a396d7 [mlir] Removed TanHOp lowering from ConvertStandardToLLVM s [...] adds bd069ad39c9 [ARM] Move ConstantIsland and LowOverheadLoops Passes. adds c72675394a8 [lldb] add lit.local.cfg for breakpad tests adds 5f149ef51fc compiler-rt: allow golang race detector to run on musl-c adds d8a0f76de7b tsan: fix leak of ThreadSignalContext for fibers adds a32b94c6c3a [libc++] Run the builders Docker containers 'as 'buildbot i [...] adds 7520cf03eeb [clang] Reformat cindex. NFC. adds b915aec6b59 Add method to TargetInfo to get CPU cache line size adds eaa7d00f366 [analyzer][NFC] Add missing LLVM header blurb (and license) adds 8f237f9b09a [clangd] Support multiple cursors in selectionRange. adds bb4da94e5b5 [ARM,CDE] Implement predicated Q-register CDE intrinsics adds f6ccb4fef24 [libc] Add a simple x86_64 linux loader. adds 717d7e3f446 [gn build] try removing a duplicate include dir adds d72c586aeba [NFC] Rename function to match Coding Convention and fix ty [...] adds 078c8633055 [LV] Replace stored value with a VPValue (NFCI) adds c6e5531f9b5 [X86][AVX] Combine shuffles to TRUNCATE/VTRUNC patterns adds d7888149aa8 Suppress a few -Wunreachable-code warnings. adds c46a0c07a63 [clang codegen] Address review comment on comment in constW [...] adds 95977a76348 [libc++] NFC: Remove unused include from test adds 13d267e302e revert parts of d7888149aa813f that several bots do not like adds 934d4feab1f [ThinLTO] Don't rely on debug output for thinlto_samplepgo_ [...] adds 044c51d8d43 Fix vector type scalar checking when the scalar operand is [...] adds f03ac381473 [libc++] Drop custom support for flaky tests from libc++ te [...] adds f93426c5b96 [WebAssembly] Move event section before global section adds d8981ce5b9f [mlir][Parser] Fix attribute parser errors for ui64 adds df48e3920a5 [Clang] Fix clang-tidy errors. adds 8e83d5ea3e0 [mlir] Remove old VectorOps directory adds fe5c719eaf5 Implement post-commit comments for D75685/rG86e0a6c60627 adds 3abcbf9903e [CFG/BasicBlock] Rename succ_const to const_succ. [NFC] adds b539f18c565 [CFG/BasicBlock] Rename pred_const to const_pred. [NFC] adds f1a9efabcb9 Ignore/Drop droppable uses for code-sinking in InstCombine adds ec74867c5e6 [mlir] Provide CustomOpAsmParser::parseOptionalOperand adds 9223b7f927e [libc++] Add a new %exec substitution adds 6d0488f75bb [compiler-rt] Mark FDP non-template methods inline to avoid [...] adds aec82f9256a [libc++] Require the use of clang-verify in .fail.cpp tests [...] adds b58902bc72c [libc++] Fix CMake configuration breakage when libc++ is bu [...] adds 081efa7dd08 [SCCP] Add a few constantexpr,undef tests for cond propagation adds 4b428e8f18c Convert old python3 cgi method into the new html one adds 911f2e7dc4a [libc] Add a GNU extensions spec containing sincosf from math.h. adds 6e00e3fcb08 [AMDGPU] Preserve original symbol during attribute propagation adds 2679d8dc7e2 [mlir][vulkan-runner] Add test to time a large vector add adds 43c63349f55 [clangd] Work around gcc bug after 8f237f9b0 adds c2d7a1f79ce [clangd] Add test for FindTarget+RecoveryExpr (which alread [...] adds 4e2679cd12e [libcxx] Fix .gitignore to not exclude test directories adds affed19fc38 Remove overly verbose debug from GenericDomTreeConstruction adds 93f7743851b Fixing a sanitizer lint problem that was breaking some builds. adds e06d707aa2a [AMDGPU] Fixed function traversal in attribute propagation adds 6430707196b Revert "tsan: fix leak of ThreadSignalContext for fibers" adds d622612e618 Relax newly added opcode checks to check only for a number [...] adds 31c5afb3f2e [X86] Split more masked instruction tests to enable D60940. adds 1ef7bf41214 [PowerPC] Improve the way legalize mul for v8i16 and add pa [...] adds 9514c048d89 Use optimal layout and preserve alloca alignment in corouti [...] adds d264f02c6f5 Fix `-Wreturn-type` warning. NFC. adds 4c52d51e784 [InstCombine] Fix a code-sinking bug after D73832/f1a9efabcb9b adds 281015de5d9 [X86] Update more intrinsic tests to prepare to extend D609 [...] adds 72ffc14e13b [ELF][test] Delete unneeded binding directive (.weak or .globl) adds 92744f62478 [MLIR] Add flat affine constraints method to round trip int [...] adds a3f4d17a1a5 [Analyzer] Use note tags to track container begin and and changes adds a9ab11d4083 [AST] Build recovery expressions for nonexistent member exprs. adds 27c201aa1d9 [MLIR] Add parallel loop collapsing. adds 1a27d63a889 [Analyzer] Only add container note tags to the operations o [...] adds 6324912592a [clangd] Simplify "preferred" vs "definition" logic a bit i [...] adds 159a9f7e763 [AST] Print a<b<c>> without extra spaces in C++11 or later. adds 7af74ee89a0 [MLIR] Delete extra declaration of createAffineDataCopyGene [...] adds 37b9cc8f29e [ARM] Sink splats to vector float instructions adds 6a946993d51 Do export symbols when LLVM_EXPORT_SYMBOLS_FOR_PLUGINS is on. adds 71ae267d1f4 [PATCH] [ARM] ARMv8.6-a command-line + BFloat16 Asm Support adds 703a856a100 [lldb] Fix TestVSCode_completions for clang 159a9f7 adds 4bd1d55884a [AST] Fix thinlto testcase missed in 159a9f7e76307734bcdcae [...] adds 9086db707d9 [AArch64][SVE] Implement structured store intrinsics adds 3110ac15c51 [NFC][llvm-readobj] Refactor unique warning handler adds 4673699a470 [PowerPC] Remove the repeated definition for some InstAlias [...] adds 297a9dac43f [CodeComplete] Don't replace the rest of line in #include c [...] adds daed98e5b5d Convert CommandObjectCommands functions to return StringRefs adds 7055cd42b5f Remove extra ';', NFC adds a945037e8fd Tools emit the bug report URL on crash adds 57be22fa179 [LLDB] Fix parsing of IPv6 host:port inside brackets adds aefec9ed77f [obj2yaml] - Refactor how we dump sections. NFCI. adds 8bf9e317e4c [SystemZ] Bugfix in tieOpsIfNeeded() adds 38798d03061 Revert "[AST] Fix thinlto testcase missed in 159a9f7e763077 [...] adds 13dc21e8416 [AST] Make thinlto testcase robust to 159a9f7e76307734bcdca [...] adds a5fa5f7cb86 [libc++] Do not force the use of -Werror in verify tests adds e30d29ebc12 [X86][SSE] getFauxShuffleMask - peek through TRUNCATE/AEXT/ [...] adds ccf1c30cde6 [lldb][testsuite] Add lldb-server category adds 2bfe2b878a6 [lldb][testsuite] Check that process is launched successful [...] adds 076773253eb Revert "[libc++] Run the builders Docker containers 'as 'bu [...] adds 4778e409de1 Clarify use of llvm_unreachable in the coding standard. adds db8a3c4206d [NFC] Create X86 subdirectory for indvar tests adds dc37287320c [asan] Fix read_binary_name_regtest.c test dying with SIGPIPE adds 2ca7fe37964 [compiler-rt] Use uname syscall in GetKernelAreaSize() adds e22f0dabcf9 [lldb/breakpad] Fix register resolution on arm adds 172456c7750 [Legalizer] Fix some flags miss in vector results adds 0cff81cff05 Add a release note for attribute plugins adds 0bd1276eedc [lit] NFC: Remove trailing whitespace adds 9fedb6900dd [GlobalISel] add helper function to create arbitrary libcalls adds 2aac0c47aed Reland "[analyzer][NFC] Tie CheckerRegistry to CheckerManag [...] adds b9943d68d3c [gn build] Port 2aac0c47aed adds 5fad05e80dd [MCInstPrinter] Pass `Address` parameter to MCOI::OPERAND_P [...] adds 1e303962232 [RISCV] Support negative constants in CompressInstEmitter adds 62dea6e9be3 Revert "[AST] Build recovery expressions by default for C++." adds 87de9a0786d [X86InstPrinter] Change printPCRelImm to print the target a [...] adds 3ff3c6986b1 [lld][ELF] Fix error message adds 3eef47407b7 [PPCInstPrinter] Change printBranchOperand(calltarget) to p [...] adds 9d1721ce392 [X86][SSE] Prefer PACKUS(AND(),AND()) to SHUFFLE(PSHUFB(),P [...] adds a92673fe9a0 [lldb-vscode] Convert launch_info and attach_info to local [...] adds 459e8e94886 [PowerPC]: Don't allow r0 as a target for LD_GOT_TPREL_L/32 adds 0766d1dca86 Make a windows buildbot happy adds 579a7a19384 [llvm-objdump] Fix typo. NFC adds 596bed3fd33 [AMDGPU] Remove unused methods. NFC. adds 0602c20b1bb [AMDGPU] Make use of divideCeil. NFC. adds 40076c14fef CUDA: Fix broken test run lines adds 4dc8472942c [analyzer] Add the Preprocessor to CheckerManager adds 17e4c38739a [lldb/CMake] Fix `install` for multi-configuration generators. adds 1216f4c0ea0 [GWP-ASan] Use functions in backtrace test, not line numbers. adds abcb9bb742c [libc++abi] Remove unused lit feature adds 987fbae0add [mlir] StandardToLLVM: make one-to-one convresion pattern p [...] adds 04ed07bc174 [mlir] StandardToLLVM: clean up conversion patterns for vec [...] adds 47e7bdb1073 Test that would have caught recovery-expr crashes in 0788ac [...] adds 3dceb6d2460 Allow IndexType inside tensors. adds 445b810fbd4 [ASan] Fix issue where system log buffer was not cleared af [...] adds 6946ca4b4cb [mlir] Rename CMake target MLIRQuantOps to MLIRQuant adds f033f201a7c [WebAssembly] Add test for event section order change adds fe025a34902 [docs][Phabricator] git migration related update adds 7a89a5d81bb [InstCombine] Fix Incorrect fold of ashr+xor -> lshr w/ vectors adds b727aabcb8c [Alignment][NFC] Use llvmTargetFrameLowering::getStackAlign adds 6c6fba8808e Correctly handle using foo = std::foo inside namespaces. adds 5237262febd [InstCombine] add shuffle-with-bitcast-operand tests; NFC adds 9002db05a2f Roll otherwise unused subexpressions into an assertion adds bd12ecb88f0 [AMDGPU] Fix PC register mapping in wave32 mode adds 6a9ad5f3f4a [cuda][hip] Add CUDA builtin surface/texture reference support. adds 8099e0fe82c [OPENMP50]Add basic support for inscan reduction modifier. adds 856c9954369 [libomptarget] Add missing elf_end call in elf_common.c adds fdfe411e7c9 [AIX] discard the label in the csect of function descriptio [...] adds ad1466f8cbc [sanitizer][RISCV] Implement SignalContext::GetWriteFlag fo [...] adds f9e71f4d9d3 Revert "[OPENMP50]Add basic support for inscan reduction mo [...] adds 39a52a19ed0 [X86] lowerV16I8Shuffle - create v8i16 mask for PACKUS(AND( [...] adds e110897e28c [WEbAssembly] Clear frame base vreg in explicit-locals when [...] adds bb9c4fd7eab [AMDGPU] Remove getMaxWavesPerCU in favour of getWavesPerWo [...] adds 0fe096c4e92 [AMDGPU] Rename overloaded getMaxWavesPerEU to getWavesPerE [...] adds ad36491ebb9 [X86] Prefer PACKUS(AND(),AND()) to SHUFFLE(PSHUFB(),PSHUFB [...] adds 0731372ee25 [clang] Allow -DDEFAULT_SYSROOT to be a relative path adds 9f7d4150b9e [X86] Move combineLoopMAddPattern and combineLoopSADPattern [...] adds 196286434d0 [gn build] Port 9f7d4150b9e adds aff75e1a1fa [lld][Wasm] Wasm-ld emits invalid .debug_ranges entries for [...] adds 2a43a1610db [OPENMP50]Fix the checks for the nesting of scan directives. adds 4c4b71843b6 [AMDGPU] Propagate amdgpu-waves-per-eu to callees adds b0da0949839 [Hexagon] Add support for Linux/Musl ABI (part 2) adds 5db37f3bca3 Make PS4 use -fno-use-init-array only as the ABI does not s [...] adds d865437d9c8 [WebAssembly] Fix the order of destructors in the LowerGlob [...] adds 66bfbedbdfb [WebAssembly] Support wasm exports with zero-length names. adds d26e0bcfba6 [llvm][TextAPI/MachO] silence clang-tidy warnings, NFC adds 5d929e66469 Move setBugReportMsg() out from under a conditional adds 1a6b7318ddd [NFC] Clang format for the ELF header and ARM build attributes. adds 64fe8418560 Fix typo, targetFeature should be lowercase. adds 324f5a14d7c Make llvm::function_ref's operator bool explicit adds 819e540208d Use llvm_unreachable after a fully covered/always-returning switch adds 1bcc500b48a [DAGCombine] Add basic optimizations for FREEZE in SelDag adds ad4b4acbb06 [MLIR][NFC] drop some unnecessary includes adds 351b1923155 [PowerPC] Enhance test for PR45297. NFC. adds 26b46b67d80 [PowerPC] Fix test for PR45297 to adapt build without asser [...] adds 1fb4f99a215 [X86][MC] Fix the bug for prefix padding support adds b3cc5dcef0f [MCInstPrinter] Add parameter `Address` to MCInstPrinter::p [...] adds 56d1553dd2c [OpenMP][NFC] Outline common functionality (skipUntilPragma [...] adds b29322435ab [OpenMP][NFC] Open `llvm` and `llvm::omp` namespace in Open [...] adds 095cecbe0de [OpenMP] `omp begin/end declare variant` - part 1, parsing adds befb4be3a89 [OpenMP] `omp begin/end declare variant` - part 2, sema ("+CG") adds 6728a9ae195 [MCInstPrinter] Add parameter `Address` to printCustomAlias [...] adds a98662f4c15 [Alignment][NFC] Update MachineMemOperand implementation to [...] adds 7d482e92135 Fix TBAA for unsigned fixed-point types adds eb85e90350e clang-format: Fix pointer alignment for overloaded operator [...] adds c16c07d4b9a [mlir] StandardToLLVM: use template aliases instead of dumm [...] adds 30c1f9a5584 [llvm-readobj] - Fix a crash when DT_STRTAB is broken. adds 8f4ab8c7d7f [mlir][vulkan-runner] Add support for 2D memref. adds 8689f98e9ba [ARM] Fix MVE VCMPr f16 pattern adds 35173dddd1f [SystemZ] Fix typos in comments. adds ac9d742bbe4 [MLIR][LLVM] Make index type bitwidth configurable. adds d6ddabd7ef4 Revert rG6ff1ea3244c543ad24fc99c7f4979db2f2078593 "Fix "use [...] adds e15ade47814 Revert rGa3c715e9788d829031989b0a5ea4eb43c7288be9 "Twine - [...] adds 30a8b77080b [analyzer][MallocChecker] Fix that kfree only takes a singl [...] adds e2ef6127d9f [Alignment] Fix overaligning bug adds 401a324c518 [LV] Refactor widenIntOrFpInduction. NFC. adds faf415a1dec [lit] Recursively expand substitutions adds 08d54269815 [lit] NFC: Move the flaky test logic to _runShTest adds bda3dd0d986 [analyzer][NFC] Change LangOptions to CheckerManager in the [...] adds 0e6aa08381f [ARM][MVE] Add DoubleWidthResult flag adds 86bbbb317bc [mlir] Extended Dominance analysis with a function to find [...] adds 3f2f7f895a8 [libc++] Remove unused lit substitutions adds 09158252f77 [ThinLTO] Allow usage of all hardware threads in the system adds 848112cca4e Simplify implementation of Type::isXXXType(); NFC adds 08776defa58 [libc++/libc++abi] Properly delimit lit substitutions adds 36ed0ceec7d [OPENMP50]Add basic support for inscan reduction modifier. adds ec3bb6c3e73 [InstCombine][X86] Regenerate SSE2 tests adds f4f4a8bfef0 [InstCombine][X86] Add repeated ops demanded elts tests for [...] adds cd7f9751c30 [libc++] NFC: Simplify substitutions by using lit recursive [...] adds 4bc8882b89c Fix build after 09158252f777c2e2f06a86b154c44abcbcf9bb74 adds ee27df5552d Revert "[OPENMP50]Add basic support for inscan reduction mo [...] adds d7084fa34ae [ARM][LowOverheadLoops] DoubleWidthResult instructions canG [...] adds e9a2caf34c0 [libc++] Use braces around %file_dependencies substitution adds a515fd01a4f [lldb-vscode] fix breakpoint result ordering adds 74eac9031af [Alignment][NFC] MachineMemOperand::getAlign/getBaseAlign adds bd722ef63f1 [ARM,CDE] Improve CDE intrinsics testing adds d60d7d69de9 [llvm-objdump][XCOFF][AIX] Implement -r option adds f8c25945e59 [gn build] Port d60d7d69de9 adds 667781592a4 [mlir] On Windows, silence warning on functions definition adds fe8063e1a0e Revert "[cuda][hip] Add CUDA builtin surface/texture refere [...] adds 950ea616537 [X86] Remove orphan LowerSTRICT_FSETCC declaration. NFCI. adds 9dcb20a7d00 [AST][SVE] Treat built-in SVE types as POD adds aa0be69e740 Export Segment.IsGapRegion to JSON adds 763c87309da [X86][SSE] Add some additional v8i16 'truncation' style shu [...] adds 35392660e6d [AST][SVE] Treat built-in SVE types as trivially copyable adds c6824883cc9 [AST][SVE] Treat built-in SVE types as trivial adds cdd1cd71208 [X86] Don't form masked instructions if the operation has a [...] adds 49764dc30c4 [OPENMP50]Add basic support for inscan reduction modifier. adds d38d06e6493 [ORC] Don't create MaterializingInfo entries unnecessarily. adds cb84e4827e4 [ORC] Introduce JITSymbolFlags::HasMaterializeSideEffectsOn [...] adds 89025da9f67 [Dexter] Add support for Windows to regression test suite. adds 853a1e6942c Only add `darwin_log_cmd` lit shell test feature when the l [...] adds 00c8120acba [LLDB] Fix handling of bit-fields when there is a base clas [...] adds 018ad3b05ec [AST] Fix typo on NoInitExpr dependence computation adds 34bdddf9a13 [ELF][test] Split basic.s adds 8896d123154 [lit] Avoid global imports in module declaration adds ee7510dc866 Fix a Diag call not to assume option spelling adds c389526171e [MC][ARM] Make .reloc support arbitrary relocation types adds 34d77516b82 [MC][AArch64] Make .reloc support arbitrary relocation types adds 457eb05db67 [lldb/PlatformMacOSX] Re-implement GetDeveloperDirectory adds c579a5b1d92 [COFF] Don't treat DWARF sections as GC roots adds 0ab5b5b8581 Fix denormal-fp-math flag and attribute interaction adds 470e82cd060 Revert "[Dexter] Add support for Windows to regression test [...] adds 348735b7230 AMDGPU: Stop setting attributes based on TargetOptions adds 9c20f09985d [AIX] Address comment https://reviews.llvm.org/D76162#inlin [...] adds 0fd8030be33 Fix line endings in test adds 236ac68fa5b [OpenMP] Add memory barrier to solve data race adds 152d14da64c [MC][X86] Make .reloc support arbitrary relocation types adds a6dfd827e58 [AMDGPU] Fix getEUsPerCU for gfx10 in CU mode adds a8cc9047de0 CodeGen: Add -denormal-fp-math-f32 flag adds c66d1f38f6f [llvm][Support] Add isZero method for TypeSize. [NFC] adds 5be9b8cbe2b [cuda][hip] Add CUDA builtin surface/texture reference support. adds 22d5bd0e3b3 Allow remapping Clang module include paths adds 974fbd9b814 Unbreak LLDB tests after 96023917e6f adds e72730ee3a5 [InstCombine] add tests for FP cast+bitcast signbit checks; NFC adds 0f56bbc1a5b [InstCombine] reduce FP-casted and bitcasted signbit check adds 6b3bedec999 Add BitWidth trait to BitmaskEnum, and use for clang Depend [...] adds 6eb345af5a1 [lld test] Tighten ELF/pre_init_fini_array.s test adds 8016d61e3cf [LLDB] CPlusPlusNameParser does not handles templated opera [...] adds 0fca766458d [OPENMP50]Fix PR45117: Orphaned task reduction should be allowed. adds 3ef33e69de0 [VirtualFileSystem] Support directory entries in the YAMLVFSWriter adds 9ce198d6ed3 [Darwin] Respect -fno-unroll-loops during LTO. adds 4b3d94051ca [llvm][Type] Return fixed size for scalar types. [NFC] adds d0af4381619 [mlir][spirv] Add return to function to please MSVC adds 48214113472 [DAGCombine] Fix splitting indexed loads in ForwardStoreVal [...] adds 94938d7d41c [Syntax] Prevent (accidentally) copying TokenBuffer adds d68c09ac879 [AST] Add a Dependence bitmask to use for calculations with [...] adds cbce88dd3a9 FunctionRef: Strip cv qualifiers in the converting constructor adds 569e4f9bc99 `shape` dialect: add some ops adds b3f6e3d6d64 Improve recovery from invalid template-ids. adds aabc24acf0d [RISCV] Support llvm.thread.pointer adds 8913769e353 [FileCollector] Add a method to add a whole directory and i [...] adds a67f057f697 [FileCollector] Devirtualize FileCollector (NFC) adds 823dbb4c748 [lldb/CMake] Only CMAKE_CFG_INTDIR if it's not '.' adds 98d05f88d55 [GlobalISel] Fix equality for copies from physregs in match [...] adds e5a8512655c [mlir] NFC: fix trivial typo in source files adds 43a95a543fb [MLIR] Introduce full/partial tile separation using if/else adds fec6c5ac5e5 [MLIR][NFC] Move TestDialect -> Dialect/Test adds 0c42539df3d Improve error recovery from missing '>' in template argument list. adds fad47d22256 [compiler-rt] Fall back to internal_uname() when called early adds 190df4a5bc2 Revert "[FileCollector] Add a method to add a whole directo [...] adds 66774771903 Verify number of result types in generated builder. adds 88c7ffaf947 Form invalid template-id annotations when parsing a constru [...] adds 9dd92a56972 Remove spurious duplicated header include (NFC) adds 499b2a8d63c PR45294: Fix handling of assumed template names looked up i [...] adds 369e26ca9e0 [AMDGPU] Add __builtin_amdgcn_workgroup_size_x/y/z adds f3987391529 [FEnv] Constfold some unary constrained operations adds f0a5af906b4 Merge in symbols from Mach-O dyld trie to the symbol table adds 255e634bf71 [libc][NFC] Ensure internal implementation is in __llvm_lib [...] adds 51b899c846e [libc] Extend add_object rule to handle helper object libraries. adds 06066c40035 [NFC] Attributor comment updates / cast cleanup adds 65b4695375c tsan: fix build bugs adds 37943e518c5 [docs] Added solutions to slow build under common problems. adds 8d85da5f5a2 [X86][SSE] Add combine tests for PTEST/TESTPS/TESTPD instructions adds d34d2ec28be [X86][SSE] Add original PR38522 test case adds 8c1dbd5c1e2 [X86][SSE] Add testnzc(~X,Y) -> testnzc(X,Y) test cases adds 8330dcadb84 [llvm-rc] Allow -1 for menu item IDs adds d2dd0fac483 Fix `-Wsign-compare` warning. NFC. adds cb6389360b0 Fix GCC warning on enum class bitfield. NFC. adds 14db82c929d [lldb][NFC] Fix typo in TestInvalidArgsLog adds 9619c2cc9a2 [clang][Syntax] Handle macro arguments in spelledForExpanded adds a44bf59c93b [SCCP] Remove unused toLatticeValue helper (NFC). adds 81f173ed0e2 [SCCP] Remove LatticeVal alias now that transition is done (NFC). adds 6a4f8423ae6 [libc] Only use __has_builtin on clang adds e6112a56dde [AsmPrinter] Emit .weak directive for weak linkage on COFF [...] adds 03bc311a16e [CorrelatedValuePropagation] Remove redundant if statement [...] adds fdc41aa22c6 [lld][ELF] Mark empty NOLOAD output sections SHT_NOBITS ins [...] adds 337b671b0d2 [InstCombine] Change limit-max-iterations test case; NFC adds 672e8bfbfcd [InstCombine] Fix worklist management in foldXorOfICmps() adds 3ab3f3c5d58 After 09158252f777c2e2f06a86b154c44abcbcf9bb74, fix build w [...] adds e8743c0f389 Const-initialize ParsedAttrInfos adds b1f78baeaa1 [InstCombine] Reduce code duplication in GEP of PHI transform; NFC adds 30d712103fa [InstCombine] Use replaceOperand() API in GEP transforms adds e5bf5037d86 [CodeGen] Fix sinking local values in lpads with phis adds 347e31c052d Remove constexpr that MSVC doesn't like adds 4065e92195b Upgrade some instances of std::sort to llvm::sort. NFC. adds ced0d1f42b3 [BPF] support 128bit int explicitly in layout spec adds 2d24d74b859 [AMDGPU] Stabilize sort order adds d3b6e1f1f93 [ADT] Automatically forward llvm::sort to array_pod_sort if safe adds 97cc1275c7d [InstCombine] Merge two functions; NFC adds 2215dcf1d75 [InstCombine] Remove unreachable blocks before DCE adds ba2e72c54ec [MDBuilder] Don't use stable sort for sorting integers. adds b578f130a72 [COFF] Stabilize sort adds dd030036f0a Put back initializers that were dropped in 0ab5b5b8581d9f29 [...] adds 9564f46766f AMDGPU: Make use of default operands adds 09d40218539 Fix compatibility for __builtin_stdarg_start adds fc93787d7e8 [MC][PowerPC] Make .reloc support arbitrary relocation types adds c0aa97b6327 [X86] Add cost model test cases for fmin/fmax reduction. adds 4bf015c035e [AlignmentFromAssumptions] Fix a SCEV assertion resulting f [...] adds 6dab8067123 [mlir] Add exp2 conversion to llvm.intr.exp2 adds a7115d51be0 [X86] X86CallFrameOptimization - generalize slow push code path adds 6ba63510720 [PostOrderIterator] Use SmallVector to store stack; NFC adds 49d00824bbb [VPlan] Use one VPWidenRecipe per original IR instruction. (NFC). adds b632bd88a63 [mlir] NFC: fix trivial typo in documents adds 10439f9e32e [X86][AVX] Add X86ISD::VALIGN target shuffle decode support adds da4c7db793a [X86] Rename matchShuffleAsByteRotate to matchShuffleAsElem [...] adds 7734e4b3a36 [X86][AVX] Combine 128-bit lane shuffles with a zeroable up [...] adds 1e363023b82 [InstCombine] Use replaceOperand() in a few more places adds 6f07a9e80ab [InstCombine] Erase original add when creating saddo adds 28f67bd5c56 [InstCombine] Fix worklist management in varargs transform adds 99913ef3d14 [OpenMP] set_bits iterator yields unsigned elements, no ref [...] adds 26fa33755f1 [InstCombine] Simplify select of cmpxchg transform adds b44f07045c5 Remove unnecessary empty comments from test check lines. NFC. adds 443dcc0e008 [X86][AVX] Add tests for 512-bit shuffle patterns that coul [...] adds febcb24f149 [InstCombine] make test independent of branch undef/UB; NFC adds fc3cc8a4b07 [VectorCombine] skip debug intrinsics first for efficiency adds 97bbe7ad2a9 AMDGPU: Fix typo adds 0b68ca51623 AMDGPU: Add some additional tests for v_cvt_ubyte* formation adds ab7a41069eb AMDGPU: Fix using wrong instruction for FP conversion adds d15723ef065 AMDGPU/GlobalISel: Remove redundant virtual adds cce3d96bcc6 GlobalISel: Add matcher for G_SHL adds c0955edfd6e Introduce support for lib function aligned_alloc in TLI / m [...] adds a9ddcd6411b [InstCombine] Erase old add when optimizing add overflow adds 0c871400658 [InstCombine] Use replaceOperand() in assoc cast simplification adds 4e4ea2cde44 [MLIR] Add missing asserts in interchangeLoops util, doc co [...] adds 53d209076aa [InstCombine] Use replaceOperand() in demanded elements sim [...] adds 8253a86b65c [InstCombine] Erase old mul when creating umulo adds 8206c50cdec [X86] Add isAnyZero shuffle mask helper adds fe0723dc9d4 Fix -Wdocumentation warning. NFC. adds 9c8ec99c80a [X86][AVX] Combine 128/256-bit lane shuffles with zeroable [...] adds 15f1fe1506f clang-format fixes in ClangTidyDiagnosticConsumer.cpp and D [...] adds b9d9968f63a [clangd] Handle clang-tidy suppression comments for diagnos [...] adds 854f268ca62 [MC] Move deprecation infos from MCTargetDesc to MCInstrInfo adds 6628c525cba [gn build] Port 854f268ca62 adds 7c1a6873aa5 [ARM] VMOV.64 immediate tests. NFC adds 00c76f34962 [ELF][test] Improve arm-exidx-output.s to test different ou [...] adds a5458bb0d6b Don't claim template names that name non-templates are undeclared. adds 6e0afb5f108 [ARMMVE] Create fewer temporary SmallVectors adds 2451e4c5978 [X86] Add sse4.2 command lines to min/max reduction tests. adds 24562c6588b [InstCombine] Add tests for trunc (extelt x); (NFC) Baselin [...] adds d74533a18b8 [X86] Add sse4.1 RUNs lines to the min/max reduction cost m [...] adds 12f6b024f9f Revert "[libc++] NFC: Simplify substitutions by using lit r [...] adds 42dc667db24 [LLD][ELF] Put back rounding which was lost in 8404aeb56a73 [...] adds a94fa2c0494 [Coroutines 1/2] Improve symmetric control transfer feature adds 31a1d85c535 [Coroutines 2/2] Improve symmetric control transfer feature adds 9a7eda1bece PR45350: Handle unsized array CXXConstructExprs in constant [...] adds 05f0e598ab2 [LangRef] Clarify the semantics of branch on undef adds 3d44f48edc2 [mlir][Diagnostics] Don't print note source line if it is t [...] adds f86104bb68d [mlir][NFC] Use the auto-generated op documentation in the [...] adds 16f27b70a50 [mlir][NFC] Update dialect/op documentation to be consistent adds 4e0d9925d6a [NFC] Remove obsolete checks followed by fix of isGuarantee [...] adds b4695351cb4 [TTI][X86] Fix the value passed to IsUnsigned for cost mode [...] adds c9eaed51492 [ARM] MVE VMOV.i64 adds afcb77cc88a [Analyzer] Fix for incorrect use of container and iterator [...] adds eb90692d8a6 [Analyzer] Rename test `iterator-modelling.cpp` to `iterato [...] adds b91535f6c7b [Alignment][NFC] Return Align for SelectionDAGNodes::getOri [...] adds 53e7c8fdfaa [lldb][NFC] Cleanup TestFixIts.py adds 064ab22fb29 [lldb] Run TestFixIts on non-Darwin platforms adds 65c70313709 [mlir] Fix typos in DeclarativeRewrites.md adds dcc04e09cf6 [Analyzer][MallocChecker] No warning for kfree of ZERO_SIZE_PTR. adds f757ecbf856 [AST] Fix a crash on invalid bitwidth exprs when preserving [...] adds 94b195ff123 [ARM][LowOverheadLoops] Add horizontal reduction support adds 767a97b2233 [lldb][NFC] Cleanup Fix-It code adds 9aa884ccc26 [NFC] [PowerPC] Update and add tests for ori adds 83c81c0a469 [lldb] Make Fix-Its also apply to top-level expressions adds 84c1fbab5d7 [CVP] Add additional icmp for ranges with undef to test. adds c3b03f3d0c3 [AMDGPU] Drop const for value that is copied (NFC). adds 9e81249d761 [Matrix] Rename emitChainedMatrixMultiply to emitMatrixMult [...] adds 0574030c016 [clang-format] only parse C# generic type constraints in C# adds e95d04f4f19 [X86][AVX] lowerV4X128Shuffle - attempt to widen to 2x256 t [...] adds 821439a45a2 [llvm-readobj][test] - Simplify hash-symbols test. adds 502a06fcdaf [lldb] Make TestExprDiagnostics.py pass again after enablin [...] adds 3b20970de8e Fix unused-variable error when assertions are disabled adds 11a5caee2ae [lldb][NFC] Refactor Fix-It filter for warnings adds 9c9d88d8b1b [SystemZ] Allow configuring default CLANG_SYSTEMZ_ARCH adds 4cbfb98eb36 [llvm-readobj] - Improve test of --elf-hash-histogram option. adds 6f428e09fbe [AST] Fix crashes on decltype(recovery-expr). adds 01ba2ad9ef0 [Alignment][NFC] Provide tightened up functions in Selectio [...] adds 7ac9efb0c32 [OPENMP50]Add basic support for array-shaping operation. adds bc60cdcc3f8 [InstCombine] add test for trunc-extelt; NFC adds e9271a494fc Remove legacy CMake targets for libcxx and libcxxabi adds 135709aa901 [DebugInfo] Ensure dead store elimination can mark an opera [...] adds 7b00eeb53de [lldb] Fix another crash in covariant type handling adds 703a1b8caf0 [analyzer][MallocChecker][NFC] Split checkPostCall up, depl [...] adds 908f78f3c19 [lldb] Fix TestSettings.test_pass_host_env_vars on windows adds 3806b38045c [LLDB] Initialize temporary token adds 7899a111ea1 Revert "[Darwin] Respect -fno-unroll-loops during LTO." adds f6b2c003f36 [DebugInfo] Ensure that a demanded bits optimisation in In [...] adds 90a36bbd7c2 AMDGPU/GlobalISel: Legalize 64-bit G_UDIV/G_UREM adds bb009498c29 AMDGPU/GlobalISel: Hack to fix i24 argument lowering adds 67ebe5de57d [libc++] Avoid duplicating logic in the libcxx-specific fil [...] adds cc3b5590d2a GlobalISel: Minor cleanups adds 37889786b04 Revert "[lldb] Fix TestSettings.test_pass_host_env_vars on [...] adds bdf77209b98 [Alignment][NFC] Use Align version of getMachineMemOperand adds 1a1bb876dba [analyzer] Add core.CallAndMessage to StdCLibraryFunctionAr [...] adds ece79f47083 [X86] make sure POP has implicit def/use of stack pointer w [...] adds 2d19270efcf [ELF][test] Improve linkerscript/linkorder.s adds 32c9efb4230 [libc++] Add support for a new keyword ADDITIONAL_COMPILE_FLAGS adds 094b11c3ab4 [libc++] Fix wrong default value for LIBCXX_ENABLE_ASSERTIO [...] adds 673e81eee4f [ELF] Allow SHF_LINK_ORDER and non-SHF_LINK_ORDER to be mixed adds dcc410b5cf2 [LoopVectorize] Fix crash on "getNoopOrZeroExtend cannot tr [...] adds 3cbbded68c2 Introduce unify-loop-exits pass. adds 81194bfeea7 [Hexagon] MaxAtomicPromoteWidth and MaxAtomicInlineWidth ar [...] adds 7842e7ebbf3 [OPENMP50]Add codegen support for array shaping expression [...] adds 77ce2e21a87 [AMDGPU] Add Relocation Constant Support adds f273e5c5074 [MLIR] Fix permuteLoops utility adds c506adcdf2c Move CLANG_SYSTEMZ_DEFAULT_ARCH to config.h. adds 8242509a49e [gn build] Port 3cbbded68c2 adds 3ea0774b13a [ConstantFold][NFC] Compile time optimization for large vectors adds 20eb719f99c lld: Reduce number of references to undefined printed from [...] adds 23da702d69b GlobalISel: Translate llvm.fshl/llvm.fshr adds a87ca9e4af5 GlobalISel: Add accessor to known bits to CombinerHelper adds 63aaecd5beb [lldb/CMake] Make check-lldb-* work for the standalone build. adds a235215415d fix a comment grammar-o adds 24485aec475 [clang analysis] Make mutex guard detection more reliable. adds fa496ce3c67 [Intrinsic] Give "is.constant" the "convergent" attribute adds 4919f2e1c52 AMDGPU/GlobalISel: Basic legalize rules for G_FSHR adds 0af6d27e2ee Add /bigobj for SPIRV dialect on MSVC. adds 3c371491a2d Setup clang-format as an Arcanist linter adds defd95ef451 [analyzer] Fix StdLibraryFunctionsChecker NotNull Constraint Check adds 01c857bc83c [mlir] Update all dialects docs to use 'dialect-namespace' [...] adds 6f9f4fdd5b0 CodeGen: Add missing MachineOperand setter adds ced99a1a636 Fix comment for CLANG_SYSTEMZ_DEFAULT_ARCH adds bab5bcf8fd6 Add a flag on the context to protect against creation of op [...] adds d16ba9b0bd7 [lit] Use Python's support for None in array slice indexing adds 9eb1b41811c [llvm-cov] Improve error message for missing profdata adds de77d231275 [ADT] Allow empty string in StringSet adds f2fbdf76d8d [InstCombine] do not exclude min/max from icmp with casted [...] adds 111c9328554 Fix test: add `-allow-unregistered-dialect` to Affine/loop- [...] adds 4243bd494d6 [InstCombine] Update assertions in InstCombine test; NFC adds 4151f2d04ad Re-land "[FileCollector] Add a method to add a whole direct [...] adds fe5cb1c25fd Revert "[lldb] Make Fix-Its also apply to top-level expressions" adds 273b0d77660 Revert "[InstCombine] Update assertions in InstCombine test; NFC" adds 10f633db86b [TypeSystemClang] Add missing case in a switch. NFC'ish. adds 55ed09d32e2 Revert "[lldb] Make TestExprDiagnostics.py pass again after [...] adds 42d56098098 AMDGPU/GlobalISel: Start handling _L to _LZ optimization adds 2641ba52a9c AMDGPU/GlobalISel: Round up image operations with 5, 6 or 7 [...] adds a4f74f377b7 [OPENMP50]Do not imply lvalue as base expression in array s [...] adds 50f7153ddb6 Revert "[lldb][NFC] Refactor Fix-It filter for warnings" adds 751d5332bd6 [llvm][IR][CastInst] Update `castIsValid` for scalable vectors. adds cee65d51fe0 AMDGPU: Implement getMemcpyLoopLoweringType adds 075b610403a Recommit "[lldb] Make TestExprDiagnostics.py pass again aft [...] adds 06bb7df81c0 Recommit "[lldb] Make Fix-Its also apply to top-level expre [...] adds 570a578e46c AMDGPU: Account for dmask when computing image mem size adds 48eda37282d AMDGPU/GlobalISel: Start selecting image intrinsics adds bcb643c8af0 AMDGPU/GlobalISel: Handle image atomics adds b27d255e1e4 AMDGPU/GlobalISel: Form CVT_F32_UBYTE0 adds 19aec8c9049 Enforce that libc++ and libc++abi are built in a monorepo layout adds db9f0d1ce58 AMDGPU: Form v_cvt_ubyte* with f16 results adds 5227fa0c72c Recommit "[InstCombine] Update assertions in InstCombine te [...] adds 05b04c685c9 Recommit "[libc++] NFC: Simplify substitutions by using lit [...] adds d0dd24a381a AMDGPU/GlobalISel: Fix crashing on weird G_INSERT sources adds 38ddb49e524 [lldb/Reproducers] Always collect the whole dSYM in the reproducer adds 51475e40236 [ELF][test] Add linkerscript/linkorder-linked-to.s adds f0869417652 [SelectionDAGISel] small cleanup to INLINEASM_BR selection. NFC adds b8fc192d42a Revert "[GISel]: Fix incorrect IRTranslation while translat [...] adds cf36f9855a7 [SVE][SelectionDAG] Fix dumping of EVTs to use correct API [...] adds 63d70ea6a07 [GlobalISel] Combine (x op 0) -> x for operations with a ri [...] adds 5074776de47 [WebAssembly] Import wasm_simd128.h from Emscripten adds 33087323007 Fix crash if base specifier parsing hits an invalid type an [...] adds 764f54bb857 Rename options --cuda-gpu-arch and --no-cuda-gpu-arch adds 519f5c37962 [LegalizeTypes] Add SoftenFloatRes_FREEZE adds d5ee72065b9 [GlobalISel] Implement identity transforms for x op x -> x adds c26a352f239 [gn build] (manually) ort 5074776de47 adds 4ce375a8f2e [gn build] minor tweaks to sync script adds 3f5a5dd295f [gn build] re-run "gn format" on all .gn and .gni files adds 4eeb56d0887 [PowerPC] Don't do the folding if the operand is R0/X0 adds 221fa96cd43 Fix linalg.generic access of hoisted constants adds 357a17e298c [lit] Send back whole lit.Test object from worker process adds f3c329986cf [lit] Remove single process mode adds 1e8900cc828 [lit] Fix test that relied on "single process" mode adds ebad678857a [SampleFDO] Port MD5 name table support to extbinary format. adds 339b34266c1 [AVR] Respect the 'interrupt' function attribute adds 2a07221cf30 [SelectionDAG] Add an assert that the input VT and output V [...] adds 7b808b105f6 [AVR] Generalize the previous interrupt bugfix to signal ha [...] adds af3c52d5580 [Alignment][NFC] Simplify IRTranslator::getMemOpAlignment adds d2d6c9f5919 [Alignment][NFC] GlobalIsel Utils inferAlignFromPtrInfo adds bcbd60aeb5f [Mips] Make MipsBranchExpansion aware of BBIT family of branch adds 80ef5c56406 Remove unused variable adds 159343cd196 Fix missing override adds cdce2fe561e [Syntax] Remove delayed folding from tree building. adds 0de874adfbb [Alignment][NFC] Transition to inferAlignFromPtrInfo adds 86b40760278 [NFC] Remove unuseful infrastructure adds 581ba35291a [RISCV] ELF attribute section for RISC-V. adds 0c9c58ada0a [SCCP] Use constant ranges for casts. adds 0b6f40da458 [gn build] Port 581ba35291a adds 5d3a69feca1 [AMDGPU] New llvm.amdgcn.ballot intrinsic adds c9d5c195976 [Alignment][NFC] Transitionning more getMachineMemOperand c [...] adds 47107dc3bda [Statepoint] Fix StatepointLoweringInfo::GCTransitionArgs i [...] adds 2c5f43f9ddb [ARM] Fix qdadd operand order adds d30e9ad3451 Correct the duplicate pragma marks in CommandObjectTarget.cpp adds b6d2212f527 [Dexter] Add support for Windows to regression test suite. adds 464b9aeafe2 [InstCombine] Transform extelt-trunc -> bitcast-extelt adds 7a4a98a9c4f [X86] Move canLowerByDroppingEvenElements earlier to be wit [...] adds 98357dee1c6 [X86] Combine concat(palignr,palignr) -> palignr(concat,concat) adds b9810988b23 [Alignment][NFC] Transitionning more getMachineMemOperand c [...] adds 06c58f11a99 [SCEV] Use backedge SCEV of PHI only if its input is loop i [...] adds 6aacdd6083d [docs] Document coding standard for error and warning messages adds 0aa9c5429b8 [lld][ELF][test] Improve deplib.s adds b4d0384a6cd [ELF][test] Add test for --gc-sections + many sections adds b37543750c7 [ValueLattice] Distinguish between constant ranges with/wit [...] adds 2539b4ae476 [LLD][ELF] Allow empty (.init|.preinit|.fini)_array to be RELRO adds 6120cb42f79 [VPlan] Move test strs to variables, silence spurious C4129 (NFC). adds 3807079d705 [clang-tidy] Fix crash in readability-redundant-string-cstr adds 229cda968cb [LoopTerminology] LCSSA form adds 05bc588abbc [libc++] Do not rely on the environment to run filesystem tests adds 71177ac1680 [clangd] Support new semanticTokens request from LSP 3.16. adds fa61b5059a3 [InstCombine] remove stray auto-generated test comment; NFC adds d3a729ab247 [libc++] Set filesystem test flags in a lit.local.cfg adds fb47ffc618e [libc++] Provide a method for adding compiler flags in lit. [...] adds b632fe5a363 [libc++] Quote the filesystem static env root in the source [...] adds efe59d6717d [X86][SSE] lowerShuffleWithPACK - extend to use chained PAC [...] adds a9c22739e67 [libc++] Remove incorrect assertion in the filesystem tests adds 154d517bc7d [ADT] Implement the Waymarking as an independent utility adds e267dfceebd [gn build] Port 154d517bc7d adds 38619fa7da3 Fix enumeral mismatch warning. NFCI. adds 7e0e5fa499c Revert rGefe59d6717dcdf7777acb9b7a734e1a520bdf22a "[X86][SS [...] adds b3f13bc1657 [obj2yaml] - Teach tool to dump program headers. adds f481d488937 [SystemZ] Improve foldMemoryOperandImpl(). adds 665bebb46f5 [SystemZ] Add isCommutable flag on VFA and VFM. adds e26eece1e2e [lldb/DWARF] Fix evaluator crash when accessing empty stack. adds 34756a1c709 [libc++] Execute tests using an external shell adds 31a346cc35c [MLIR][Vector] Add support for TupleGetOp folding through I [...] adds e4a778052e9 Revert "[lldb/DWARF] Fix evaluator crash when accessing emp [...] adds f3a7d790df3 [lldb/DWARF] Fix evaluator crash when accessing empty stack. adds eb4663d8c6a [lld][COFF][ELF][WebAssembly] Replace --[no-]threads /threa [...] adds 7093b92a136 [AssumeBundles] Preserve Information from Load/Store adds 4aeb7e1ef4c [AssumeBundles] Preserve information in EarlyCSE adds c3ca11771e1 [libc++abi] Remove the old testit script adds 998118c3d3b [Alignment][NFC] Deprecate MachineMemOperand::getMachineMem [...] adds b0cd7b2799e [SCCP] Limit use of range info for binops to integers for now. adds da7b6fe942f [mlir][Linalg] Allow tiling of batch dimension for convolut [...] adds 21d9d0855be New symbolizer option to print files relative to the compil [...] adds 41c135d6d28 Fix buildgo.sh script to fix linux build failure due to cha [...] adds a76e68c9704 [CodeComplete] Member completion for concept-constrained types. adds cba15d1b5c5 Add manually overriding of the darwin SDK version adds 8b925440d11 [X86][SSE] Simplify PTEST/TESTP tests for D76984 adds 30436a1ce7f [X86][SSE] Add additional PTEST/TESTP inversion tests adds 753a3245f72 Make FunctionDecl::isDefined non-virtual, NFC adds 4799a1745b3 [llvm-symbolizer] Delete unneeded option name comments. NFC adds 94d912296de [NFC] Do not run CGProfilePass when not using integrated assembler adds 7fca0e9797d [MLIR] Add simple runner utilities for timing adds 5c2bf577dcd [lldb/API] Add missing reproducer instrumentation to GetHos [...] adds cb0fa3234da Fix 7093b92a136b0696cf9cfc3f9822973ed886be5b accidently pus [...] adds dc817b2dea9 [InstCombine] Deduce attributes for aligned_alloc in InstCombine adds c726c920e04 [SystemZ] Allow %r0 in address context for AsmParser adds 75cfd382201 Revert "[lldb/Reproducers] Always collect the whole dSYM in [...] adds 89fe36d08a9 [libc++] Make sure substitutions are expanded inside FILE_D [...] adds 5f9bf3f6561 [MLIR][NFC] Move test/Transforms/lower-affine.mlir -> test/ [...] adds 7b06cb45230 Add an opque payload field to lldb::Type (NFC). adds 38aebe5c04a [libc++] Move a bunch of tests from .sh.cpp to .pass.cpp adds d1b412ae389 [clang-format] Correct line breaks in C# generic type constraints adds 128c0d037d3 [intel-pt] Fix existing support in LLDB adds 28518d9ae39 [InlineFunction] Handle return attributes on call within in [...] adds 08682dcc863 [AMDGPU] Define 16 bit VGPR subregs adds 6d20937c29a [CodeGenPrepare] Delete intrinsic call to llvm.assume to en [...] adds 03f43b3aca3 [lld] Initial commit for new Mach-O backend adds e8f13f4f62f Replace std::string::find == 0 with StringRef::startswith adds dacf8d3562b [AArch64][SVE] Add support for fcmp. adds 7f1ea924c69 Add a new -fglobal-isel option and make -fexperimental-isel [...] adds 45b6364e8d7 [gn build] Port 03f43b3aca36 adds d26435c1703 [mlir][spirv] Change op doc description autogen separator adds 11ccad6e879 [docs] Make llvm-addr2line documentation more explicit abou [...] adds 015c6cd4755 Re-land "[lldb/Reproducers] Always collect the whole dSYM i [...] adds 07e462526d0 [libc++] Allow running .sh.cpp tests with SSHExecutors adds f3d4166368b [InstCombine] Report change in non zero phi transform adds 87357808b80 [InstCombine] Use replaceOperand() in non zero phi transform adds 19df7fa892d [InstCombine] Erase old alloca in cast of alloca transform adds c538c57d6da [InstCombine] Use replaceOperand() in descaling adds 1ee6ec2bf37 Remove "mask" operand from shufflevector. adds b7fe795e5b3 [InstCombine] Use replaceOperand() in some select transforms adds 58a05675daf Revert "[InlineFunction] Handle return attributes on call w [...] adds 9a6a696817b [cmake] Link libc++ tests against static libc++/libc++abi i [...] adds 9dcb16bc9af Switch this function to the LLVM variable naming convention [...] adds cc3fddb411d [pch] Honour -fallow-pch-with-compiler-errors for overall c [...] adds e1fb9d53727 [MLIR][NFC] modernize affine.for unroll test pass adds 7e4e9f4a2fc Fixed windows failure after D74873 adds 2dee4d44297 [clangd] Don't build clangdserver for (most) completion tests. NFC adds 1c0dd57cd3e [libc++] Use 'export' instead of 'env' to run remote commands adds 9b3bf72a0d7 [OPENMP50]Allow use of array shaping expression in a list. adds 522b4c4b88a [AArch64] Fix mismatch in prologue and epilogue for funclet [...] adds 494abe139a9 [AArch64] Change AArch64 Windows EH UnwindHelp object to be [...] adds 478af4479ab [Object] Update ObjectFile::makeTriple for XCOFF adds 8f8c4950fea [FileCheck] Add missing %ProtectFileCheckOutput to FileCheck tests adds 00efcd6fffa Add a Type::Payload typedef. (NFC) adds ec11c5615a7 Replace uint32_t with typedef (NFC) adds c9d65a48af1 HIP: Ensure new denormal mode attributes are set adds 4af7560b375 [PPCInstPrinter] Print conditional branches as `bt 2, $targ [...] adds 175e42303bb AMDGPU: Make HIPToolChain a subclass of AMDGPUToolChain adds 0f44a09757f [ELF][test] Add 'REQUIRES: x86' to threads.s adds f9471b00108 Fix MSan false positive due to select folding. adds ee77607ca6c [mlir][spirv] Include SPIR-V op definitions in main SPIR-V doc adds 09834f97612 [libomptarget][nfc] Move non-freestanding headers out of common adds e094dd5adcb [OPENMP50]Fix size calculation for array shaping expression [...] adds 64799fbebdd [debugserver/ARM64] Make sure watchpoints hit are attribute [...] adds a3fab31acd6 [lit] Refine adoption of argparse --version action adds c2aa5432378 [OPENMP50]Codegen for array shaping expression in map clauses. adds 39ada468893 [OPENMP][DOCS]Mark array shaping as done, NFC. adds c322d328aa3 Forward WrapperFrontendAction::shouldEraseOutputFiles() adds ba4764c2cc1 Fix leak in GVNSink introduced in D72467. adds 7ea64ae3afe [analyzer] Use IgnoreImpCasts() instead of reimplementing it. adds a3eb3d3d92d [Support] Delete ioctl TIOCGWINSZ adds 43e576593e7 AMDGPU/GlobalISel: Fix insert point when lowering G_FMAD adds 855e738be25 [VectorOps] Implement a simple folder for identity vector.t [...] adds 4805901930f [Driver] Don't pass -fmessage-length=0 to CC1 adds f93aed66f22 Fix diagnostics where _Atomic can't be applied adds 3341dc73399 [Driver] Don't pass -fobjc-rumtime= for non-ObjC input adds 9180c14fe4d Fix simultaneous .gcda creation adds d0efd7bfcf6 [X86][MC] Disable Prefix padding after hardcode/prefix adds 8eb40e41f6e [PowerPC] Don't generate ST_VSR_SCAL_INT if power8-vector i [...] adds af0cd9073c3 [RISCV] Split RISCVISelDAGToDAG.cpp to RISCVISelDAGToDAG.h [...] adds bb3111cbaf7 [clang][xray] Add xray attributes to functions without decls too adds 69ddee1d2aa [mlir][Linalg] Introduce linalg.pooling_min/max/sum op. adds 6dd696ae4fa [mlir][Linalg] Extend fusion to support WAW atm on buffers. adds b5767010a8e [lld][WebAssembly] Early error if output file cannot be created. adds d0d076fed96 [Driver] Flip the CC1 default of -fdiagnostics-show-option adds 531b3aff309 [Frontend] Replace CC1 option -masm-verbose with -fno-verbose-asm adds 72439b6b955 [clangd] Add a flag to turn on recovery-expr. adds 3c9064ed963 [X86] Run XOP vector rotation tests with/without AVX2 adds f9f401dba17 [X86][AVX] Add additional 256/512-bit test cases for PACKSS [...] adds 15f34ff2d89 [lldb] Allow expect_expr without a running target adds f92563f9077 [VectorUtils][X86] De-templatize scaleShuffleMask and 2 X86 [...] adds 2641a19981e [TTI] Remove getCallCost adds 61bab7c31a1 [MLIR] Replace OpBuilder(Block) with atBlockBegin and atBlockEnd adds fa1b602ee6c [lldb][NFC] Modernize TestCallUserAnonTypedef adds 57fd86de879 [AVR] Fix function pointer address space adds 90b7bbffddc [MLIR] Rename collapsePLoops -> collapseParallelLoops adds edb0efca1e7 [lldb][NFC] Modernize call-function tests adds 48a5bdafba5 [lldb][NFC] Modernize TestXValuePrinting adds 862766e01e9 [Verifier] Verify matrix dimensions operands match vector size. adds 95bcab8272c [DAGCombiner] Require ninf for sqrt recip estimation adds e20cac36502 [Matrix] Add new test case with getelementptr constant exprs. adds e2d6023250b tsan: fix Go build on Windows adds 49af3809423 Add a method to build affine maps with zero or more results. adds 08a53dba933 [clang] Minor cleanup in CloneDetectionTest adds d307174e1d9 [ConstantRange] Use APInt::or/APInt::and for single elements. adds 038f03cb5ef [clangd] Force delayed-template-parsing off in code completion. adds 8155e41ac61 [mlir][Pass] Add a tablegen backend for defining Pass information adds e3d834a54af [mlir][Pass] Move the registration of dialect passes to tablegen adds 3dddd8969f4 [mlir][Pass] Move the registration of conversion passes to [...] adds 9a277af2d42 [mlir][Pass] Add support for generating pass utilities via [...] adds 9be4be3e532 [mlir][Pass] Add support for generating pass documention fr [...] adds 0ec88d031ad [lldb] Inherit host environment when running shell commands adds 93fc0ba145c [yaml2obj] - Add NBucket and NChain fields for the SHT_HASH [...] adds c7468c1696f [Alignment][NFC] Use Align in SelectionDAG::getMemIntrinsicNode adds aa786b881fc [lldb] [PECOFF] Only use PECallFrameInfo on the one support [...] adds ef49895da89 [X86] Do not assume types are legal in getFauxShuffleMask adds d8b51789fd6 [NFC] [PowerPC] Add test for frsp elimination adds dbf5e4f6c7f [LSR] add testcase for wrongly phi node elimination - NFC adds 8b8cd150a4a Revert "[LSR] add testcase for wrongly phi node elimination - NFC" adds 918ccb64b02 [X86][SSE] Handle basic inversion of PTEST/TESTP operands ( [...] adds 84aa6cf1a9f [Transforms][SROA] Promote allocas with mem2reg for scalable types adds 43aa04eb7a6 [clangd] Run semaCodeComplete only with a preamble adds f25a1b4f58d [LSR] re-add testcase for wrongly phi node elimination - NFC adds 66b9f5f7f0d [GVNSink] Simplify code. NFC. adds 9beba4245a7 [lldb][NFC] Modernize TestExprChar adds c9d15880542 Silent failing TestWatchpointCount.py aarch64/linux adds dad848280d3 [Target][ARM] Change VPTMaskValues to the correct encoding adds 2effe8f5e72 [Target][ARM] Improvements to the VPT Block Insertion Pass adds db3d64eebbe [clangd-vscode] NFC; Improve wording in documentation and u [...] adds bf573bea19e [Alignment][NFC] Convert MIR Yaml to MaybeAlign adds e344f8b9db4 Revert "[LSR] re-add testcase for wrongly phi node eliminat [...] adds a0c537834ae [ARM] Extra vmull loop tests. NFC adds 43eca880c6e Fix "control reaches end of non-void function" warning. NFCI. adds 481413d3940 [X86][SSE] matchShuffleWithPACK - generalize zero/signbits [...] adds 65e0079f21a [NFC] run clang format on the file llvm/include/llvm/MC/MCD [...] adds 3a78f44daf3 [Alignment][NFC] Convert SelectionDAG::InferPtrAlignment to [...] adds b605c56b0fa [ARM] Silence warning in Release builds adds 552e46ea1ef Fix unused variable warnings. NFCI. adds be7a233e937 Fix operator precedence warning. NFCI. adds 501522b5b2a [RISCV] Support RISC-V ELF attributes sections in llvm-readobj. adds 1dffa2550b5 [Alignment][NFC] Transition to MachineFrameInfo::getObjectAlign() adds fee0026fc7e [libc++abi] Fix remote execution of .sh.cpp tests adds eb8880562e6 [X86][SSE] combinePTESTCC - fold TESTZ(X,~Y) -> TESTC(Y,X) adds fc63c4d8ce6 [Alignment][NFC] Remove remaining uses of MachineFrameInfo: [...] adds c6c045cb7ae [Alignment][NFC] Mark IRTranslator::getMemOpAlignment deprecated adds 51d594d33c2 Replace output file name in test with %t adds a67cd71acdb [MLIR] Implement LoopLikeInterface for loop.parallel adds e3033c0ce55 [llvm][clang][IFS] Enhancing the llvm-ifs yaml format for s [...] adds 616289ed292 [LegalizeTypes][RISCV] Correctly sign-extend comparison for [...] adds 64acef386ec [libc++] Handle SSH errors more gracefully and make sure we [...] adds c6a65bb93f2 clagn-tidy/doc: Add a link to readability-static-accessed-t [...] adds f527e6f2e11 [llvm-readobj] - Do not crash when SHT_HASH table is broken. adds f2036a15d37 [ELF] Print symbols with non-default versions for better "u [...] adds c87b5e7e22b [WebAssembly] Fix subregion relationship in CFGSort adds 3500cc8d891 [analyzer] RetainCountChecker: Add a suppression for OSSymbols. adds bb4a36ea280 [ELF] Propagate LMA offset to sections with neither AT() nor AT> adds 0489d39ead2 [libc++] SSH: Properly handle test-executables that are not [...] adds 153dadf3a3c [clang] CodeGen: Make getOrEmitProtocol public for Swift adds 7c5fcb3591b [lld] NFC: fix trivial typos in comments adds 160b01c9ef6 [libc++] SSH: Use -p when scp'ing to preserve modes and mod [...] adds 9b31e595d71 [mlir] Modify GPU to SPIR-V conversion to respect spv.inter [...] adds 6593360ee76 AMDGPU: Fix consistently backwards logic for default denormal mode adds 4ea3650c212 HIP: Link correct denormal mode library adds 95fac2e46b7 [WebAssembly] Rename SIMD min/max/avgr intrinsics for consistency adds f08df464ae8 [OPENMP50]Add initial support for OpenMP 5.0 iterator. adds 5e4e8d03882 AMDGPU/GlobalISel: Change intrinsic ID for _L to _LZ opt adds 68e283940a3 AMDGPU/GlobalISel: Switch test to checking final ISA adds 3a7865df626 [llvm-locstats] Fix labels on x-axis of comparison chart adds 68316afb29c [MLIR][NFC] loop transforms/analyis utils cleanup / modernize adds 572890f1d39 [MLIR][NFC] clean up affine data copy test case adds 0dd21130efc Add LLVM_ATTRIBUTE_UNUSED to function used only in assert (NFC) adds b8c260c38d0 Remove linking all targets from `mlir-opt` (NFC) adds c4c20376f7e [mlir][Linalg][Doc] Minor doc fixes adds 3f465d0d362 AMDGPU: Fix broken check lines adds 4b35c816ef7 [InstCombine] Use replaceOperand() in div transforms adds d40368fdb5e [InstCombine] Erase old instruction when replacing extractelements adds c4499e33333 [Attributor] Make attributor aware of aligned_alloc for hea [...] adds 4cf70af94fb [GVN] Make GVN aware of aligned_alloc adds 6ee11c3b0f3 [NewGVN] Make NewGVN aware of aligned_alloc adds 2a77544ad59 [SimplifyLibCalls] Erase replaced instructions adds 50a3e8738a9 Revert "[InstCombine] Erase old instruction when replacing [...] adds 1148f004fa3 Fix PR45371: SeparateConstOffsetFromGEP clean up bookkeeping adds c028472fa1f Revert "[OPENMP50]Add initial support for OpenMP 5.0 iterator." adds 8431dbacd49 [InstCombine] add tests for negate with xor operand; NFC adds 3d900487911 [InstCombine] enhance freelyNegateValue() by handling xor adds 123a5328f91 [libc] Add sigfillset and sigdelset adds 53e23808810 [ORC] Add JITDylib name to debugging output when defining symbols. adds 8e5a8f620cc [ORC] Don't require a null-terminator on MemoryBuffers for [...] adds e65e677ee4e [globalisel][legalizer] Fix DebugLoc bugs caught by a proto [...] adds 30350c25410 [source maps] Ensure all valid source maps are added instea [...] adds f1242ec5430 [intel-pt] Implement a basic test case adds db92719c1d1 DebugInfo: Defaulted non-type template parameters of bool type adds 6e916b58609 Updating the documentation for the noescape attribute. adds 8ba8a4a14d4 Revert "[intel-pt] Implement a basic test case" adds 92e563bc05d [libc++] SSH: Create a tarball of dependencies and scp that [...] adds c911cc6c493 [intel-pt] Implement a basic test case adds 064c634ef3d Revert "[intel-pt] Implement a basic test case" adds 8bf1583b71d [mlir] Move LLVMPassIncGen to LLVMIR/Transforms/CMakeLists.txt adds 5e8093134af [MLIR] Add method to drop duplicate result exprs from AffineMap adds 7c771631c6f [MLIR][NFC] drop unnecessary matches in affine dma generate [...] adds f203100ebe2 Reapply: [Host.mm] Check for the right macro instead of inl [...] adds 296ccef7036 [WebAssembly] EmscriptenEHSjLj: Mark __invoke_ functions as [...] adds e6a39f00e8d [libcxx] Stop using builtin type traits for is_floating_poi [...] adds f4754ea0ed7 Remove const qualifier from Modules returned by ExternalAST [...] adds 4354dfbdf5c Preserve the owning module information from DWARF in the sy [...] adds 6cd673345cf [LangRef][AliasAnalysis] Clarify `noalias` affects only mod [...] adds 41f2a57d0bc [Attributor][NFC] Use a BumpPtrAllocator to allocate `Abstr [...] adds 32672b877dc Revert "Preserve the owning module information from DWARF i [...] adds 0071eaaf089 [ORC] Export __cxa_atexit from the main JITDylib in LLJIT. adds df88d80337d [libc++] Add missing FILE_DEPENDENCIES markup adds ff09135fc2b [libc++] Execute tests from the Lit execution root instead [...] adds 5767085c8de Fix infinite recursion in deferred diag emitter adds f7f93228435 [Attributor][NFC] Cleanup leftover check lines adds b1c788d0518 [Attributor][FIX] Prevent alignment breakage wrt. must-tail calls adds 5bac8d427d5 Revert "[ORC] Export __cxa_atexit from the main JITDylib in [...] adds 9e19693994d [Attributor] Derive better alignment for accessed pointers adds 54d6a608bf8 [Attributor][NFC] Predetermine the module adds a8b2fed0aef [Utils][FIX] Properly deal with occasionally deleted functions adds ac96c8fd853 [Attributor][FIX] Do not compute ranges for arguments of de [...] adds bcd8009369f [Attributor] Use the proper context instruction in genericV [...] adds 7f5fe30a150 [cmake] Only set deps for an ExternalProject if the type is [...] adds 2ede5dccffa [DOC] Remove too strong restriction for ‘llvm.experimental. [...] adds af1b7d06d9e Correct copy-pasteo in lua script language description adds b0b1f451ae6 [LLD][ELF] Follow the common pattern in a message about an [...] adds d1705c1196f [CUDA][NFC] Split math.h functions out of __clang_cuda_devi [...] adds c9ae3c5e107 [openmp] Disable tests flaky on Debian adds 410cfc478f3 [OpenMP][FIX] Add second include after header was split in [...] adds 85adce3d735 [PPCInstPrinter] Change B to print the target address in he [...] adds cbd3969e8cd [PPCInstPrinter] Delete an unneeded overload of printBranch [...] adds 61e89737c5d [libc++] Simplify the configuration of the C++ ABI library adds de22d7154b4 [llvm-exegesis] 'Min' repetition mode adds b0b5f0416be [OpenMP][FIX] Undo changes accidentally already introduced [...] adds c18d55998b3 [OpenMP][NFCI] Move OpenMP clause information to `lib/Front [...] adds 1858f4b50dd Revert "[OpenMP][NFCI] Move OpenMP clause information to `l [...] adds b4200659690 [clangd] Fix an assertion crash in ReferenceFinder. adds a157cde0ac0 [NFC][X86] Refine code in X86AsmBackend adds 9f92d4612fa Revert "[NFC][X86] Refine code in X86AsmBackend" adds d08fadd6628 [X86] Add SERIALIZE instruction. adds c3ef971d36b [lit] Improve handling of timeouts and max failures adds 7314aea5a42 [clang] Move branch-protection from CodeGenOptions to LangOptions adds deb902252ac Fix RUN line in AArch64/speculation-hardening.ll adds 29d253c4c68 [Object] Add the method for checking if a section is a debu [...] adds 550ab58bc10 [NFC] Fix performance issue in LiveDebugVariables adds 189d2e215f6 [Alignment][NFC] Use more Align versions of various functions adds a63b5c9e531 [CallSiteSplitting] Simplify isPredicateOnPHI & continue ch [...] adds fb4aa30f272 [ExpandMemCmp] Allow overlaping loads in the zero-relational case. adds 96cae168fa2 [NFC] Preparatory work for D77292 adds 8cc6f5beb81 [NFC][update_llc_test_checks] Remove the redundant SCRUB_LO [...] adds 62be83463a3 Recommit "[lldb] Fix TestSettings.test_pass_host_env_vars o [...] adds c697dd9ffdb [ARM] Make remaining MVE instruction predictable adds fbd53ffc3ad [ARM] MVE VMULL patterns adds ce8b85c0b8e [NFC][PowerPC] Add a new test case loop-comment.ll adds 07b6c0be4ab [gn build] remove NOSORT from clang/Headers/BUILD.gn adds 3d8950bf998 [gn build] Port d08fadd6628 adds 2a645abe938 [gn build] Port d1705c1196f adds 0fb8a535621 tsan: don't check libc dependency on FreeBSD adds 316e220cf43 [llvm-mca] Cleanup unnecessary includes from headers adds 0a2131b7e22 [mlir] LLVMFuncOp: provide a capability to pass attributes [...] adds 37ced5a5710 [clang][AARCH64] Add __ARM_FEATURE_{PAC, BTI}_DEFAULT defines adds e6cb4b659af [Clang][CodeGen] Fixing mismatch between memory layout and [...] adds b02c7a81523 Fix "result of 32-bit shift implicitly converted to 64 bits [...] adds 5e508b9bac0 [llvm-dwarfdump] Add the --show-sections-sizes option adds ab25d37354e [gn build] Port 5e508b9bac0 adds 8348e9d71b0 [LoopTerminology] Make term names bold adds ecb048c7aca [InstCombine] add tests for disguised vector trunc; NFC adds a19b27b90e5 [PhaseOrdering] add test for vector trunc; NFC See discussi [...] adds 9da6a40e099 [OpenCL] Add sub-group builtin functions adds af39151f3c5 Revert "[lld] Initial commit for new Mach-O backend" adds 13a1504ffb9 [OPENMP50]Add initial support for OpenMP 5.0 iterator. adds 451741a9d77 [lldb] Change Communication::SetConnection to take a unique_ptr adds 9dcac872977 [NFC][PowerPC] Using update_llc_test_checks.py to update at [...] No new revisions were added by this update. Summary of changes: .arclint | 12 + .git-blame-ignore-revs | 6 + .../lib/Tooling/ApplyReplacements.cpp | 22 +- clang-tools-extra/clang-doc/Representation.cpp | 6 +- clang-tools-extra/clang-tidy/ClangTidy.cpp | 2 +- .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 91 +- .../clang-tidy/ClangTidyDiagnosticConsumer.h | 11 +- .../clang-tidy/ClangTidyForceLinker.h | 66 +- .../clang-tidy/bugprone/BugproneTidyModule.cpp | 3 + .../clang-tidy/bugprone/CMakeLists.txt | 1 + .../bugprone/SpuriouslyWakeUpFunctionsCheck.cpp | 108 + .../bugprone/SpuriouslyWakeUpFunctionsCheck.h | 37 + .../clang-tidy/cert/CERTTidyModule.cpp | 7 + .../clang-tidy/llvmlibc/CMakeLists.txt | 1 + .../llvmlibc/RestrictSystemLibcHeadersCheck.cpp | 26 +- .../llvmlibc/RestrictSystemLibcHeadersCheck.h | 6 +- .../misc/UnconventionalAssignOperatorCheck.cpp | 5 +- .../portability/RestrictSystemIncludesCheck.cpp | 36 - .../portability/RestrictSystemIncludesCheck.h | 43 +- .../readability/RedundantStringCStrCheck.cpp | 59 +- .../clang-tidy/utils/RenamerClangTidyCheck.cpp | 14 +- clang-tools-extra/clangd/ClangdLSPServer.cpp | 81 +- clang-tools-extra/clangd/ClangdLSPServer.h | 4 +- clang-tools-extra/clangd/ClangdServer.cpp | 66 +- clang-tools-extra/clangd/ClangdServer.h | 17 +- clang-tools-extra/clangd/CodeComplete.cpp | 21 +- clang-tools-extra/clangd/CodeComplete.h | 2 +- clang-tools-extra/clangd/Compiler.h | 1 + clang-tools-extra/clangd/FindTarget.cpp | 6 + clang-tools-extra/clangd/FormattedString.cpp | 151 +- clang-tools-extra/clangd/FormattedString.h | 2 + clang-tools-extra/clangd/Hover.cpp | 84 +- clang-tools-extra/clangd/Hover.h | 4 + clang-tools-extra/clangd/ParsedAST.cpp | 13 +- clang-tools-extra/clangd/Preamble.cpp | 6 +- clang-tools-extra/clangd/Protocol.cpp | 34 +- clang-tools-extra/clangd/Protocol.h | 63 +- clang-tools-extra/clangd/SemanticHighlighting.cpp | 85 +- clang-tools-extra/clangd/SemanticHighlighting.h | 25 +- clang-tools-extra/clangd/SemanticSelection.cpp | 30 +- clang-tools-extra/clangd/SemanticSelection.h | 7 +- clang-tools-extra/clangd/XRefs.cpp | 36 +- .../clients/clangd-vscode/.vscode/launch.json | 2 +- .../clients/clangd-vscode/.vscode/tasks.json | 24 +- .../clangd/clients/clangd-vscode/DEVELOPING.md | 16 +- .../clangd/clients/clangd-vscode/src/extension.ts | 12 +- .../clangd/clients/clangd-vscode/tsconfig.json | 2 +- clang-tools-extra/clangd/index/Relation.cpp | 2 +- .../clangd/test/initialize-params.test | 10 + clang-tools-extra/clangd/test/semantic-tokens.test | 22 + clang-tools-extra/clangd/tool/ClangdMain.cpp | 10 + clang-tools-extra/clangd/unittests/ClangdTests.cpp | 8 +- .../clangd/unittests/CodeCompleteTests.cpp | 289 +- .../clangd/unittests/DiagnosticsTests.cpp | 31 +- .../clangd/unittests/FindTargetTests.cpp | 21 +- .../clangd/unittests/FormattedStringTests.cpp | 99 +- clang-tools-extra/clangd/unittests/HoverTests.cpp | 71 +- .../clangd/unittests/SemanticHighlightingTests.cpp | 43 +- .../clangd/unittests/SemanticSelectionTests.cpp | 26 +- clang-tools-extra/clangd/unittests/SyncAPI.cpp | 7 +- clang-tools-extra/clangd/unittests/SyncAPI.h | 5 +- clang-tools-extra/clangd/unittests/TestTU.cpp | 45 +- clang-tools-extra/clangd/unittests/TestTU.h | 4 +- clang-tools-extra/clangd/unittests/TweakTesting.h | 2 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 45 +- clang-tools-extra/docs/ReleaseNotes.rst | 18 + clang-tools-extra/docs/clang-rename.rst | 2 +- .../bugprone-spuriously-wake-up-functions.rst | 29 + .../docs/clang-tidy/checks/cert-con36-c.rst | 10 + .../docs/clang-tidy/checks/cert-con54-cpp.rst | 10 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 5 +- .../llvmlibc-restrict-system-libc-headers.rst | 15 + ...dability-convert-member-functions-to-static.rst | 2 +- clang-tools-extra/docs/clang-tidy/index.rst | 4 +- clang-tools-extra/modularize/CoverageChecker.cpp | 2 +- clang-tools-extra/modularize/Modularize.cpp | 2 +- .../Inputs/identical-in-TU/file1.yaml | 19 + .../Inputs/identical-in-TU/file2.yaml | 19 + .../Inputs/identical-in-TU/identical-in-TU.cpp | 2 + .../clang-apply-replacements/identical-in-TU.cpp | 11 + .../checkers/Inputs/llvmlibc/system/math.h | 0 .../checkers/Inputs/llvmlibc/transitive.h | 1 - .../bugprone-reserved-identifier-invert.cpp | 2 +- .../bugprone-spuriously-wake-up-functions.c | 164 + .../bugprone-spuriously-wake-up-functions.cpp | 191 + ...ibc-restrict-system-libc-headers-transitive.cpp | 8 - .../llvmlibc-restrict-system-libc-headers.cpp | 6 +- ...isc-unconventional-assign-operator-precxx11.cpp | 6 + .../clang-tidy/checkers/modernize-use-using.cpp | 6 +- .../checkers/readability-identifier-naming.cpp | 18 + .../checkers/readability-redundant-string-cstr.cpp | 24 + clang/CMakeLists.txt | 5 +- clang/cmake/caches/CrossWinToARMLinux.cmake | 2 + clang/cmake/caches/Fuchsia-stage2.cmake | 3 +- clang/docs/ClangCommandLineReference.rst | 8 +- clang/docs/ClangPlugins.rst | 50 + clang/docs/HowToSetupToolingForLLVM.rst | 2 +- clang/docs/InternalsManual.rst | 16 +- clang/docs/LanguageExtensions.rst | 53 +- clang/docs/LibASTImporter.rst | 2 +- clang/docs/OpenMPSupport.rst | 8 +- clang/docs/ReleaseNotes.rst | 10 +- clang/docs/analyzer/checkers.rst | 8 +- clang/docs/analyzer/developer-docs/DebugChecks.rst | 2 +- clang/examples/Attribute/Attribute.cpp | 81 + clang/examples/Attribute/CMakeLists.txt | 11 + clang/examples/CMakeLists.txt | 1 + clang/include/clang-c/Index.h | 1039 ++- clang/include/clang/AST/ASTContext.h | 11 +- clang/include/clang/AST/ASTDumperUtils.h | 2 + clang/include/clang/AST/BuiltinTypes.def | 8 +- clang/include/clang/AST/CXXInheritance.h | 6 +- clang/include/clang/AST/ComputeDependence.h | 10 + clang/include/clang/AST/Decl.h | 9 +- clang/include/clang/AST/DependenceFlags.h | 193 +- clang/include/clang/AST/Expr.h | 172 +- clang/include/clang/AST/ExprCXX.h | 4 +- clang/include/clang/AST/ExprOpenMP.h | 252 + clang/include/clang/AST/GlobalDecl.h | 22 +- clang/include/clang/AST/LocInfoType.h | 5 +- clang/include/clang/AST/Mangle.h | 10 +- clang/include/clang/AST/OpenMPClause.h | 315 +- clang/include/clang/AST/PrettyPrinter.h | 7 +- clang/include/clang/AST/RecursiveASTVisitor.h | 26 + clang/include/clang/AST/Stmt.h | 5 +- clang/include/clang/AST/StmtOpenMP.h | 57 + clang/include/clang/AST/TextNodeDumper.h | 1 + clang/include/clang/AST/Type.h | 337 +- clang/include/clang/AST/TypeProperties.td | 21 +- clang/include/clang/Analysis/CallGraph.h | 5 + clang/include/clang/Basic/Attr.td | 89 +- clang/include/clang/Basic/AttrDocs.td | 89 +- clang/include/clang/Basic/Builtins.def | 2 +- clang/include/clang/Basic/BuiltinsAArch64.def | 13 - clang/include/clang/Basic/BuiltinsAMDGPU.def | 4 + clang/include/clang/Basic/BuiltinsSVE.def | 20 + clang/include/clang/Basic/BuiltinsWebAssembly.def | 8 + clang/include/clang/Basic/BuiltinsX86.def | 3 + clang/include/clang/Basic/CMakeLists.txt | 10 +- clang/include/clang/Basic/CodeGenOptions.def | 10 +- clang/include/clang/Basic/CodeGenOptions.h | 8 - clang/include/clang/Basic/DiagnosticASTKinds.td | 3 + clang/include/clang/Basic/DiagnosticDriverKinds.td | 20 +- clang/include/clang/Basic/DiagnosticGroups.td | 6 +- clang/include/clang/Basic/DiagnosticIDs.h | 2 +- clang/include/clang/Basic/DiagnosticParseKinds.td | 29 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 146 +- clang/include/clang/Basic/IdentifierTable.h | 13 +- clang/include/clang/Basic/LangOptions.def | 8 + clang/include/clang/Basic/LangOptions.h | 31 + clang/include/clang/Basic/Module.h | 6 +- clang/include/clang/Basic/OpenMPKinds.def | 28 + clang/include/clang/Basic/OpenMPKinds.h | 14 + clang/include/clang/Basic/StmtNodes.td | 4 + clang/include/clang/Basic/TargetBuiltins.h | 49 + clang/include/clang/Basic/TargetInfo.h | 27 +- clang/include/clang/Basic/TokenKinds.def | 11 +- clang/include/clang/Basic/arm_cde.td | 193 +- clang/include/clang/Basic/arm_mve.td | 127 +- clang/include/clang/Basic/arm_neon.td | 260 +- clang/include/clang/Basic/arm_neon_incl.td | 16 +- clang/include/clang/Basic/arm_sve.td | 125 + clang/include/clang/CodeGen/CGFunctionInfo.h | 10 +- clang/include/clang/CodeGen/CodeGenABITypes.h | 19 +- clang/include/clang/Config/config.h.cmake | 3 + clang/include/clang/Driver/CC1Options.td | 13 +- clang/include/clang/Driver/Options.td | 39 +- clang/include/clang/Driver/ToolChain.h | 16 + clang/include/clang/Frontend/CompilerInvocation.h | 3 +- clang/include/clang/Frontend/FrontendAction.h | 1 + clang/include/clang/Frontend/FrontendActions.h | 12 +- clang/include/clang/Frontend/FrontendOptions.h | 2 +- clang/include/clang/Parse/Parser.h | 70 +- clang/include/clang/Sema/DeclSpec.h | 7 + clang/include/clang/Sema/ExternalSemaSource.h | 9 + .../clang/Sema/MultiplexExternalSemaSource.h | 9 + clang/include/clang/Sema/Overload.h | 8 + clang/include/clang/Sema/Ownership.h | 1 + clang/include/clang/Sema/ParsedAttr.h | 18 +- clang/include/clang/Sema/ParsedTemplate.h | 31 +- clang/include/clang/Sema/Scope.h | 4 +- clang/include/clang/Sema/Sema.h | 213 +- clang/include/clang/Serialization/ASTBitCodes.h | 17 +- clang/include/clang/Serialization/ASTReader.h | 9 + .../include/clang/Serialization/ASTRecordReader.h | 4 +- .../include/clang/Serialization/ASTRecordWriter.h | 2 +- .../Checkers/BuiltinCheckerRegistration.h | 2 +- .../clang/StaticAnalyzer/Checkers/Checkers.td | 7 + .../include/clang/StaticAnalyzer/Core/Analyses.def | 70 +- .../clang/StaticAnalyzer/Core/CheckerManager.h | 46 +- .../Core/PathSensitive/ConstraintManager.h | 6 +- .../StaticAnalyzer/Frontend/AnalysisConsumer.h | 2 +- .../StaticAnalyzer/Frontend/AnalyzerHelpFlags.h | 30 + .../StaticAnalyzer/Frontend/CheckerRegistration.h | 38 - .../StaticAnalyzer/Frontend/CheckerRegistry.h | 50 +- .../StaticAnalyzer/Frontend/FrontendActions.h | 20 +- clang/include/clang/Tooling/Syntax/Nodes.h | 33 + clang/include/clang/Tooling/Syntax/Tokens.h | 24 +- clang/include/clang/Tooling/Syntax/Tree.h | 7 +- clang/include/clang/module.modulemap | 1 + clang/lib/AST/ASTContext.cpp | 90 +- clang/lib/AST/AttrImpl.cpp | 2 +- clang/lib/AST/ComputeDependence.cpp | 100 +- clang/lib/AST/DeclBase.cpp | 5 +- clang/lib/AST/DeclarationName.cpp | 16 +- clang/lib/AST/Expr.cpp | 315 +- clang/lib/AST/ExprClassification.cpp | 3 + clang/lib/AST/ExprConcepts.cpp | 4 +- clang/lib/AST/ExprConstant.cpp | 70 +- clang/lib/AST/ItaniumMangle.cpp | 67 +- clang/lib/AST/Mangle.cpp | 2 +- clang/lib/AST/MicrosoftMangle.cpp | 16 +- clang/lib/AST/NSAPI.cpp | 2 + clang/lib/AST/OpenMPClause.cpp | 204 +- clang/lib/AST/PrintfFormatString.cpp | 3 +- clang/lib/AST/RecordLayoutBuilder.cpp | 3 +- clang/lib/AST/StmtOpenMP.cpp | 21 + clang/lib/AST/StmtPrinter.cpp | 47 + clang/lib/AST/StmtProfile.cpp | 27 + clang/lib/AST/TextNodeDumper.cpp | 22 + clang/lib/AST/Type.cpp | 288 +- clang/lib/AST/TypeLoc.cpp | 2 + clang/lib/AST/TypePrinter.cpp | 11 +- clang/lib/Analysis/CallGraph.cpp | 6 +- clang/lib/Analysis/RetainSummaryManager.cpp | 4 +- clang/lib/Analysis/ThreadSafety.cpp | 12 +- .../CheckerOptionHandling.cpp | 2 +- clang/lib/Basic/Attributes.cpp | 8 +- clang/lib/Basic/Module.cpp | 2 +- clang/lib/Basic/OpenMPKinds.cpp | 59 +- clang/lib/Basic/TargetInfo.cpp | 2 + clang/lib/Basic/Targets.cpp | 3 + clang/lib/Basic/Targets/AArch64.cpp | 57 +- clang/lib/Basic/Targets/AArch64.h | 4 +- clang/lib/Basic/Targets/ARM.cpp | 3 + clang/lib/Basic/Targets/BPF.h | 4 +- clang/lib/Basic/Targets/Hexagon.h | 3 + clang/lib/Basic/Targets/X86.cpp | 120 + clang/lib/Basic/Targets/X86.h | 3 + clang/lib/CodeGen/BackendUtil.cpp | 13 +- clang/lib/CodeGen/CGBuiltin.cpp | 235 +- clang/lib/CodeGen/CGCUDANV.cpp | 83 +- clang/lib/CodeGen/CGCUDARuntime.h | 33 +- clang/lib/CodeGen/CGCall.cpp | 13 + clang/lib/CodeGen/CGCall.h | 33 +- clang/lib/CodeGen/CGClass.cpp | 4 +- clang/lib/CodeGen/CGDebugInfo.cpp | 40 +- clang/lib/CodeGen/CGDecl.cpp | 23 +- clang/lib/CodeGen/CGDeclCXX.cpp | 14 +- clang/lib/CodeGen/CGExpr.cpp | 14 +- clang/lib/CodeGen/CGExprAgg.cpp | 34 +- clang/lib/CodeGen/CGExprConstant.cpp | 16 +- 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| 22 +- clang/lib/Driver/ToolChains/AMDGPU.h | 6 + clang/lib/Driver/ToolChains/Arch/AArch64.cpp | 3 +- clang/lib/Driver/ToolChains/Arch/SystemZ.cpp | 3 +- clang/lib/Driver/ToolChains/Clang.cpp | 97 +- clang/lib/Driver/ToolChains/Clang.h | 1 + clang/lib/Driver/ToolChains/CommonArgs.cpp | 18 +- clang/lib/Driver/ToolChains/CommonArgs.h | 3 +- clang/lib/Driver/ToolChains/Cuda.cpp | 30 - clang/lib/Driver/ToolChains/Darwin.cpp | 40 +- clang/lib/Driver/ToolChains/HIP.cpp | 50 +- clang/lib/Driver/ToolChains/HIP.h | 3 +- clang/lib/Driver/ToolChains/MSVC.cpp | 6 +- clang/lib/Driver/ToolChains/PS4CPU.cpp | 14 + clang/lib/Driver/ToolChains/PS4CPU.h | 5 + clang/lib/Format/ContinuationIndenter.cpp | 24 +- clang/lib/Format/ContinuationIndenter.h | 7 +- clang/lib/Format/FormatToken.h | 6 + clang/lib/Format/TokenAnnotator.cpp | 89 +- clang/lib/Format/UnwrappedLineFormatter.cpp | 2 + clang/lib/Format/UnwrappedLineParser.cpp | 37 +- clang/lib/Format/UnwrappedLineParser.h | 4 + clang/lib/Frontend/CompilerInvocation.cpp | 104 +- clang/lib/Frontend/FrontendAction.cpp | 3 + clang/lib/Frontend/FrontendOptions.cpp | 1 + .../Frontend/InterfaceStubFunctionsConsumer.cpp | 14 +- .../lib/FrontendTool/ExecuteCompilerInvocation.cpp | 24 +- clang/lib/Headers/CMakeLists.txt | 3 + clang/lib/Headers/__clang_cuda_device_functions.h | 323 +- clang/lib/Headers/__clang_cuda_math.h | 345 + clang/lib/Headers/__clang_cuda_runtime_wrapper.h | 11 +- clang/lib/Headers/cpuid.h | 1 + clang/lib/Headers/immintrin.h | 4 + .../openmp_wrappers/__clang_openmp_math_declares.h | 1 + clang/lib/Headers/serializeintrin.h | 30 + clang/lib/Headers/wasm_simd128.h | 1145 ++++ clang/lib/Lex/Lexer.cpp | 10 +- clang/lib/Parse/ParseCXXInlineMethods.cpp | 15 +- clang/lib/Parse/ParseDecl.cpp | 108 +- clang/lib/Parse/ParseDeclCXX.cpp | 110 +- clang/lib/Parse/ParseExpr.cpp | 216 +- clang/lib/Parse/ParseExprCXX.cpp | 279 +- clang/lib/Parse/ParseObjc.cpp | 14 +- clang/lib/Parse/ParseOpenMP.cpp | 491 +- clang/lib/Parse/ParseStmtAsm.cpp | 20 +- clang/lib/Parse/ParseTemplate.cpp | 159 +- clang/lib/Parse/ParseTentative.cpp | 33 +- clang/lib/Parse/Parser.cpp | 47 +- clang/lib/Sema/CodeCompleteConsumer.cpp | 43 +- clang/lib/Sema/DeclSpec.cpp | 6 + clang/lib/Sema/MultiplexExternalSemaSource.cpp | 6 + clang/lib/Sema/OpenCLBuiltins.td | 83 +- clang/lib/Sema/ParsedAttr.cpp | 5 +- clang/lib/Sema/Sema.cpp | 194 +- clang/lib/Sema/SemaCUDA.cpp | 19 - clang/lib/Sema/SemaCast.cpp | 7 + clang/lib/Sema/SemaChecking.cpp | 13 +- clang/lib/Sema/SemaCodeComplete.cpp | 421 +- clang/lib/Sema/SemaDecl.cpp | 102 +- clang/lib/Sema/SemaDeclAttr.cpp | 214 +- clang/lib/Sema/SemaDeclCXX.cpp | 139 +- clang/lib/Sema/SemaDeclObjC.cpp | 95 +- clang/lib/Sema/SemaExceptionSpec.cpp | 4 + clang/lib/Sema/SemaExpr.cpp | 445 +- clang/lib/Sema/SemaExprCXX.cpp | 6 +- clang/lib/Sema/SemaInit.cpp | 14 +- clang/lib/Sema/SemaOpenMP.cpp | 937 ++- clang/lib/Sema/SemaOverload.cpp | 113 +- clang/lib/Sema/SemaPseudoObject.cpp | 2 + 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clang/test/CodeGen/lanai-arguments.c | 4 +- clang/test/CodeGen/le32-arguments.c | 2 +- clang/test/CodeGen/mcu-struct-return.c | 4 +- clang/test/CodeGen/mingw-long-double.c | 8 +- clang/test/CodeGen/mips-zero-sized-struct.c | 2 +- clang/test/CodeGen/mips64-padding-arg.c | 6 +- clang/test/CodeGen/ms_abi.c | 4 +- clang/test/CodeGen/ppc64-align-struct.c | 12 +- clang/test/CodeGen/ppc64-elf-abi.c | 2 +- clang/test/CodeGen/ppc64-qpx-vector.c | 2 +- clang/test/CodeGen/ppc64-soft-float.c | 46 +- clang/test/CodeGen/ppc64-vector.c | 4 +- clang/test/CodeGen/ppc64le-aggregates.c | 12 +- clang/test/CodeGen/ppc64le-f128Aggregates.c | 4 +- clang/test/CodeGen/regparm-struct.c | 2 +- clang/test/CodeGen/renderscript.c | 18 +- clang/test/CodeGen/riscv-sdata-module-flag.c | 48 + clang/test/CodeGen/riscv32-ilp32-abi.c | 2 +- clang/test/CodeGen/riscv32-ilp32-ilp32f-abi.c | 2 +- .../test/CodeGen/riscv32-ilp32-ilp32f-ilp32d-abi.c | 6 +- clang/test/CodeGen/riscv32-ilp32d-abi.c | 8 +- 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clang/test/CodeGen/x86_64-arguments-nacl.c | 2 +- clang/test/CodeGen/x86_64-arguments-win32.c | 2 +- clang/test/CodeGen/x86_64-arguments.c | 6 +- clang/test/CodeGen/xray-global-init.cpp | 13 + clang/test/CodeGenCUDA/amdgpu-workgroup-size.cu | 25 + clang/test/CodeGenCUDA/hip-pinned-shadow.cu | 27 - clang/test/CodeGenCUDA/hip-pinned-shadow.hip | 27 + clang/test/CodeGenCUDA/surface.cu | 42 + clang/test/CodeGenCUDA/texture.cu | 55 + clang/test/CodeGenCXX/arm-cc.cpp | 2 +- .../test/CodeGenCXX/attr-loader-uninitialized.cpp | 30 + clang/test/CodeGenCXX/auto-var-init.cpp | 19 + clang/test/CodeGenCXX/bitfield-layout.cpp | 55 +- clang/test/CodeGenCXX/builtin-source-location.cpp | 20 +- clang/test/CodeGenCXX/call-with-static-chain.cpp | 4 +- clang/test/CodeGenCXX/conditional-gnu-ext.cpp | 8 +- clang/test/CodeGenCXX/cxx1z-copy-omission.cpp | 4 +- clang/test/CodeGenCXX/cxx1z-lambda-star-this.cpp | 4 +- .../CodeGenCXX/dbg-info-all-calls-described.cpp | 17 +- ...debug-info-template-explicit-specialization.cpp | 2 +- .../CodeGenCXX/debug-info-template-parameter.cpp | 10 +- clang/test/CodeGenCXX/exceptions.cpp | 6 +- clang/test/CodeGenCXX/homogeneous-aggregates.cpp | 14 +- clang/test/CodeGenCXX/lambda-expressions.cpp | 4 +- clang/test/CodeGenCXX/microsoft-abi-byval-sret.cpp | 4 +- .../test/CodeGenCXX/microsoft-abi-byval-thunks.cpp | 4 +- .../CodeGenCXX/microsoft-abi-cdecl-method-sret.cpp | 8 +- .../test/CodeGenCXX/microsoft-abi-eh-cleanups.cpp | 4 +- .../CodeGenCXX/microsoft-abi-sret-and-byval.cpp | 64 +- .../CodeGenCXX/microsoft-abi-vmemptr-conflicts.cpp | 2 +- clang/test/CodeGenCXX/ms-thunks-ehspec.cpp | 27 + clang/test/CodeGenCXX/regcall.cpp | 8 +- clang/test/CodeGenCXX/stack-reuse-miscompile.cpp | 2 +- clang/test/CodeGenCXX/stack-reuse.cpp | 2 +- clang/test/CodeGenCXX/temporaries.cpp | 12 +- clang/test/CodeGenCXX/thiscall-struct-return.cpp | 4 +- clang/test/CodeGenCXX/thunk-returning-memptr.cpp | 4 +- clang/test/CodeGenCXX/thunks-ehspec.cpp | 29 + clang/test/CodeGenCXX/thunks.cpp | 6 +- clang/test/CodeGenCXX/trivial_abi.cpp | 8 +- clang/test/CodeGenCXX/unknown-anytype.cpp | 2 +- clang/test/CodeGenCXX/used-decl-visitor.cpp | 18 + clang/test/CodeGenCXX/wasm-args-returns.cpp | 18 +- clang/test/CodeGenCXX/x86_32-arguments.cpp | 8 +- clang/test/CodeGenCXX/x86_64-arguments.cpp | 4 +- .../test/CodeGenCoroutines/coro-always-inline.cpp | 54 + clang/test/CodeGenCoroutines/coro-await.cpp | 10 +- clang/test/CodeGenCoroutines/coro-gro-nrvo.cpp | 10 +- clang/test/CodeGenObjC/arc.m | 15 +- .../test/CodeGenObjC/debug-info-class-extension.m | 2 +- .../test/CodeGenObjC/debug-info-class-extension2.m | 2 +- .../test/CodeGenObjC/debug-info-class-extension3.m | 2 +- clang/test/CodeGenObjC/debug-info-property.m | 2 +- clang/test/CodeGenObjC/debug-info-property2.m | 2 +- clang/test/CodeGenObjC/debug-info-property4.m | 2 +- clang/test/CodeGenObjC/debug-info-property5.m | 2 +- clang/test/CodeGenObjC/direct-method.m | 2 +- .../CodeGenObjC/nontrivial-c-struct-exception.m | 4 +- .../CodeGenObjC/objc-non-trivial-struct-nrvo.m | 6 +- clang/test/CodeGenObjC/property-dbg.m | 2 +- clang/test/CodeGenObjC/stret-1.m | 8 +- clang/test/CodeGenObjC/strong-in-c-struct.m | 79 + clang/test/CodeGenObjC/weak-in-c-struct.m | 2 +- clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm | 2 +- clang/test/CodeGenOpenCL/addr-space-struct-arg.cl | 6 +- .../test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl | 6 +- clang/test/CodeGenOpenCL/builtins-amdgcn.cl | 21 +- clang/test/CodeGenOpenCL/pipe_types_mangling.cl | 77 + clang/test/CodeGenOpenCLCXX/addrspace-of-this.cl | 4 +- clang/test/CodeGenSYCL/unique-stable-name.cpp | 77 + clang/test/Driver/aarch64-cpus.c | 33 + clang/test/Driver/arm-cortex-cpus.c | 20 + clang/test/Driver/clang-translation.c | 1 - clang/test/Driver/cuda-flush-denormals-to-zero.cu | 18 +- clang/test/Driver/darwin-objc-options.m | 7 + clang/test/Driver/fdiagnostics-show-option.c | 7 + clang/test/Driver/fmessage-length.c | 9 + clang/test/Driver/global-isel.c | 23 +- clang/test/Driver/hip-autolink.hip | 4 +- clang/test/Driver/hip-default-gpu-arch.hip | 2 +- clang/test/Driver/hip-device-compile.hip | 4 +- clang/test/Driver/hip-device-libs.hip | 82 +- clang/test/Driver/hip-host-cpu-features.hip | 6 +- clang/test/Driver/hip-no-device-libs.hip | 2 +- clang/test/Driver/hip-options.hip | 18 + clang/test/Driver/hip-output-file-name.hip | 2 +- clang/test/Driver/hip-printf.hip | 2 +- clang/test/Driver/hip-save-temps.hip | 8 +- clang/test/Driver/hip-syntax-only.hip | 2 +- clang/test/Driver/hip-toolchain-features.hip | 12 +- clang/test/Driver/hip-toolchain-mllvm.hip | 2 +- clang/test/Driver/hip-toolchain-no-rdc.hip | 8 +- clang/test/Driver/hip-toolchain-opt.hip | 16 +- clang/test/Driver/hip-toolchain-rdc.hip | 2 +- clang/test/Driver/integrated-as.c | 1 + clang/test/Driver/lto-jobs.c | 2 +- clang/test/Driver/ps4cpu.c | 17 + clang/test/Driver/rewrite-legacy-objc.m | 6 +- clang/test/Driver/rewrite-objc.m | 2 +- clang/test/Driver/riscv-sdata-warning.c | 8 + clang/test/Driver/ropi-rwpi.c | 13 + clang/test/Driver/save-temps.c | 11 + clang/test/Driver/show-option-names.c | 7 - clang/test/Driver/x86-target-features.c | 5 + clang/test/Frontend/diagnostics-option-names.c | 2 +- clang/test/Frontend/plugin-attribute.cpp | 25 + clang/test/Frontend/source-col-map.c | 2 +- clang/test/Headers/arm-cde-header.c | 6 +- clang/test/Index/getcursor-recovery.cpp | 16 + clang/test/Index/pch-with-errors.c | 3 + clang/test/InterfaceStubs/bad-format.cpp | 15 +- clang/test/InterfaceStubs/blocks.c | 4 +- .../class-template-partial-specialization.cpp | 4 +- clang/test/InterfaceStubs/conflict-type.ifs | 6 +- .../InterfaceStubs/constructor-using-shadow.cpp | 6 +- clang/test/InterfaceStubs/cxx-conversion.cpp | 4 +- clang/test/InterfaceStubs/cxxdeduction-guide.cpp | 4 +- clang/test/InterfaceStubs/driver-test3.c | 4 +- clang/test/InterfaceStubs/empty.c | 8 + clang/test/InterfaceStubs/func.ifs | 20 +- .../InterfaceStubs/hidden-class-inheritance.cpp | 2 +- clang/test/InterfaceStubs/indirect-field-decl.cpp | 4 +- clang/test/InterfaceStubs/inline.c | 4 +- clang/test/InterfaceStubs/lambda.cpp | 6 +- clang/test/InterfaceStubs/namespace-alias.cpp | 4 +- clang/test/InterfaceStubs/namespace.cpp | 4 +- .../InterfaceStubs/non-type-template-parm-decl.cpp | 4 +- clang/test/InterfaceStubs/object.c | 2 +- clang/test/InterfaceStubs/object.ifs | 12 +- clang/test/InterfaceStubs/ppc.cpp | 12 +- clang/test/InterfaceStubs/template-constexpr.cpp | 4 +- .../InterfaceStubs/template-namespace-function.cpp | 8 +- .../InterfaceStubs/template-template-parm-decl.cpp | 4 +- clang/test/InterfaceStubs/trycatch.cpp | 7 +- .../InterfaceStubs/unresolved-using-typename.cpp | 4 +- clang/test/InterfaceStubs/usings.cpp | 4 +- .../var-template-specialization-decl.cpp | 6 +- clang/test/InterfaceStubs/weak.cpp | 6 +- clang/test/InterfaceStubs/windows.cpp | 12 +- clang/test/Misc/diag-aka-types.cpp | 4 +- clang/test/Misc/diag-line-wrapping.cpp | 4 +- clang/test/Misc/message-length.c | 6 +- ...pragma-attribute-supported-attributes-list.test | 4 + clang/test/Misc/show-diag-options.c | 14 +- clang/test/Misc/unnecessary-elipses.cpp | 4 +- clang/test/Misc/unprintable.c | 2 +- clang/test/Misc/wrong-encoding2.c | 2 +- clang/test/Modules/ExtDebugInfo.cpp | 6 +- clang/test/Modules/ExtDebugInfo.m | 7 +- clang/test/Modules/ModuleDebugInfo.cpp | 6 +- clang/test/Modules/debug-info-moduleimport.m | 29 +- clang/test/Modules/templates.mm | 2 +- clang/test/OpenMP/barrier_codegen.cpp | 2 +- ...gin_declare_variant_elided_range_withouth_end.c | 31 + clang/test/OpenMP/begin_declare_variant_messages.c | 173 + ..._declare_variant_no_end_for_matching_selector.c | 33 + .../begin_declare_variant_range_withouth_end.c | 33 + .../begin_declare_variant_using_messages.cpp | 61 + clang/test/OpenMP/declare_target_messages.cpp | 12 +- clang/test/OpenMP/declare_variant_ast_print.cpp | 3 +- .../OpenMP/declare_variant_device_kind_codegen.cpp | 17 +- ...clare_variant_implementation_vendor_codegen.cpp | 98 +- clang/test/OpenMP/declare_variant_messages.c | 9 +- clang/test/OpenMP/declare_variant_messages.cpp | 14 +- clang/test/OpenMP/declare_variant_mixed_codegen.c | 14 +- .../test/OpenMP/declare_variant_mixed_codegen.cpp | 110 +- clang/test/OpenMP/depobj_ast_print.cpp | 9 +- clang/test/OpenMP/depobj_codegen.cpp | 27 +- clang/test/OpenMP/depobj_messages.cpp | 4 +- .../distribute_parallel_for_private_messages.cpp | 2 +- ...stribute_parallel_for_simd_private_messages.cpp | 2 +- .../OpenMP/distribute_simd_private_messages.cpp | 2 +- clang/test/OpenMP/for_private_messages.cpp | 2 +- clang/test/OpenMP/for_simd_private_messages.cpp | 2 +- .../master_taskloop_in_reduction_messages.cpp | 8 +- .../OpenMP/master_taskloop_private_messages.cpp | 2 +- .../master_taskloop_simd_in_reduction_messages.cpp | 8 +- .../master_taskloop_simd_private_messages.cpp | 2 +- clang/test/OpenMP/nesting_of_regions.cpp | 382 +- .../nvptx_declare_variant_device_kind_codegen.cpp | 98 +- ...clare_variant_implementation_vendor_codegen.cpp | 98 +- .../OpenMP/nvptx_target_exceptions_messages.cpp | 26 +- clang/test/OpenMP/parallel_ast_print.cpp | 24 +- .../test/OpenMP/parallel_for_private_messages.cpp | 2 +- .../OpenMP/parallel_for_reduction_messages.cpp | 36 +- .../OpenMP/parallel_for_simd_private_messages.cpp | 2 +- .../OpenMP/parallel_master_private_messages.cpp | 2 +- .../parallel_master_taskloop_private_messages.cpp | 2 +- ...allel_master_taskloop_simd_private_messages.cpp | 2 +- clang/test/OpenMP/parallel_reduction_codegen.cpp | 26 +- clang/test/OpenMP/parallel_reduction_messages.c | 19 +- .../OpenMP/parallel_sections_private_messages.cpp | 2 +- clang/test/OpenMP/scan_ast_print.cpp | 52 + clang/test/OpenMP/scan_messages.cpp | 176 + clang/test/OpenMP/sections_private_messages.cpp | 2 +- clang/test/OpenMP/simd_private_messages.cpp | 2 +- clang/test/OpenMP/single_private_messages.cpp | 2 +- clang/test/OpenMP/target_ast_print.cpp | 18 +- clang/test/OpenMP/target_data_ast_print.cpp | 14 +- clang/test/OpenMP/target_data_device_messages.cpp | 5 +- clang/test/OpenMP/target_device_codegen.cpp | 50 + clang/test/OpenMP/target_device_messages.cpp | 14 +- .../OpenMP/target_enter_data_device_messages.cpp | 5 +- .../OpenMP/target_exit_data_device_messages.cpp | 5 +- clang/test/OpenMP/target_firstprivate_messages.cpp | 2 +- clang/test/OpenMP/target_map_codegen.cpp | 76 + clang/test/OpenMP/target_map_messages.cpp | 190 +- .../target_parallel_for_private_messages.cpp | 2 +- .../target_parallel_for_simd_private_messages.cpp | 2 +- clang/test/OpenMP/target_private_messages.cpp | 2 +- clang/test/OpenMP/target_simd_private_messages.cpp | 2 +- clang/test/OpenMP/target_update_ast_print.cpp | 36 +- clang/test/OpenMP/target_update_codegen.cpp | 75 + .../test/OpenMP/target_update_device_messages.cpp | 5 +- clang/test/OpenMP/task_ast_print.cpp | 39 +- clang/test/OpenMP/task_codegen.c | 34 +- clang/test/OpenMP/task_depend_messages.cpp | 36 +- clang/test/OpenMP/task_in_reduction_codegen.cpp | 8 + clang/test/OpenMP/task_in_reduction_message.cpp | 8 +- clang/test/OpenMP/task_messages.cpp | 47 +- .../test/OpenMP/taskloop_in_reduction_messages.cpp | 8 +- clang/test/OpenMP/taskloop_private_messages.cpp | 2 +- .../OpenMP/taskloop_simd_in_reduction_messages.cpp | 8 +- .../test/OpenMP/taskloop_simd_private_messages.cpp | 2 +- clang/test/PCH/debug-info-pch-path.c | 4 +- clang/test/Parser/cxx-ambig-init-templ.cpp | 20 +- clang/test/Parser/cxx-class.cpp | 13 +- clang/test/Parser/cxx-decl.cpp | 3 +- clang/test/Parser/cxx-member-initializers.cpp | 6 +- clang/test/Parser/cxx-template-argument.cpp | 4 +- clang/test/Parser/cxx-template-decl.cpp | 14 +- clang/test/Parser/eof2.cpp | 3 +- .../Parser/objc-error-qualified-implementation.m | 8 +- clang/test/Parser/recovery.cpp | 5 +- clang/test/Parser/switch-typo-correction.cpp | 9 + clang/test/ParserSYCL/unique-stable-name.cpp | 33 + clang/test/Preprocessor/aarch64-target-features.c | 32 + clang/test/Preprocessor/arm-target-features.c | 5 + clang/test/Preprocessor/hexagon-predefines.c | 27 + clang/test/Preprocessor/x86_target_features.c | 8 + clang/test/Sema/arm-cde-immediates.c | 135 +- clang/test/Sema/arm-cmse.c | 30 + clang/test/Sema/arm-no-cmse.c | 7 + clang/test/Sema/attr-loader-uninitialized.c | 37 + clang/test/Sema/attr-loader-uninitialized.cpp | 60 + clang/test/Sema/attr-noreturn.c | 31 + clang/test/Sema/builtins-memcpy-inline.c | 32 - clang/test/Sema/builtins-memcpy-inline.cpp | 38 + clang/test/Sema/invalid-bitwidth-expr.mm | 13 + clang/test/Sema/invalid-member.cpp | 15 + clang/test/Sema/parentheses.c | 2 +- clang/test/Sema/sizeless-1.c | 7 + clang/test/SemaCUDA/attr-declspec.cu | 15 +- clang/test/SemaCUDA/attributes-on-non-cuda.cu | 15 +- clang/test/SemaCUDA/bad-attributes.cu | 24 + clang/test/SemaCUDA/bad-calls-on-same-line.cu | 4 +- clang/test/SemaCUDA/call-device-fn-from-host.cu | 4 +- clang/test/SemaCUDA/call-host-fn-from-device.cu | 4 +- clang/test/SemaCUDA/openmp-target.cu | 4 +- clang/test/SemaCUDA/trace-through-global.cu | 2 +- clang/test/SemaCXX/PR20705.cpp | 6 +- clang/test/SemaCXX/PR9459.cpp | 4 +- clang/test/SemaCXX/arm-cmse.cpp | 5 + clang/test/SemaCXX/atomic-type.cpp | 8 + clang/test/SemaCXX/builtins.cpp | 3 +- clang/test/SemaCXX/constant-expression-cxx2a.cpp | 55 + clang/test/SemaCXX/cxx2a-consteval.cpp | 144 +- clang/test/SemaCXX/decltype.cpp | 3 +- clang/test/SemaCXX/implicit-exception-spec.cpp | 2 +- clang/test/SemaCXX/injected-class-name-crash.cpp | 4 +- clang/test/SemaCXX/invalid-member-expr.cpp | 5 +- clang/test/SemaCXX/invalid-template-specifier.cpp | 3 +- clang/test/SemaCXX/literal-operators.cpp | 4 + clang/test/SemaCXX/pseudo-destructors.cpp | 69 +- clang/test/SemaCXX/sizeless-1.cpp | 21 +- clang/test/SemaCXX/vararg-non-pod.cpp | 7 + clang/test/SemaCXX/vector.cpp | 74 + clang/test/SemaCXX/warn-thread-safety-analysis.cpp | 16 + clang/test/SemaObjC/crash-on-type-args-protocols.m | 18 +- clang/test/SemaObjC/method-direct-one-definition.m | 11 + clang/test/SemaObjC/method-direct.m | 4 + .../test/SemaObjCXX/parameterized_classes_subst.mm | 1 - clang/test/SemaOpenCL/fdeclare-opencl-builtins.cl | 11 +- clang/test/SemaTemplate/dependent-base-classes.cpp | 8 +- .../test/SemaTemplate/dependent-typos-recovery.cpp | 10 + .../test/SemaTemplate/instantiate-member-expr.cpp | 2 +- .../ms-delayed-default-template-args.cpp | 4 +- .../SemaTemplate/nested-name-spec-template.cpp | 6 +- .../test/SemaTemplate/recovery-tree-transform.cpp | 4 + clang/test/SemaTemplate/subst-into-subst.cpp | 34 + clang/test/SemaTemplate/temp_arg.cpp | 2 +- clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp | 4 +- clang/test/SemaTemplate/undeclared-template.cpp | 9 + clang/test/lit.cfg.py | 2 +- .../tools/clang-fuzzer/handle-llvm/handle_llvm.cpp | 32 +- clang/tools/clang-scan-deps/ClangScanDeps.cpp | 30 +- clang/tools/driver/CMakeLists.txt | 2 +- clang/tools/driver/cc1_main.cpp | 2 +- clang/tools/driver/driver.cpp | 4 + clang/tools/libclang/CIndex.cpp | 2511 ++++--- clang/tools/libclang/CXCursor.cpp | 540 +- clang/tools/libclang/CXCursor.h | 40 +- clang/tools/libclang/CursorVisitor.h | 96 +- clang/unittests/AST/DeclPrinterTest.cpp | 4 +- clang/unittests/Analysis/CloneDetectionTest.cpp | 2 +- clang/unittests/CodeGen/CodeGenExternalTest.cpp | 2 +- clang/unittests/Format/FormatTest.cpp | 7 + clang/unittests/Format/FormatTestCSharp.cpp | 57 +- clang/unittests/Sema/CodeCompleteTest.cpp | 3 + .../StaticAnalyzer/RegisterCustomCheckersTest.cpp | 60 + clang/unittests/StaticAnalyzer/Reusables.h | 5 +- clang/unittests/Tooling/Syntax/TokensTest.cpp | 58 +- clang/unittests/Tooling/Syntax/TreeTest.cpp | 871 ++- clang/utils/TableGen/ClangAttrEmitter.cpp | 74 +- clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp | 2 +- clang/utils/TableGen/MveEmitter.cpp | 49 +- clang/utils/TableGen/NeonEmitter.cpp | 52 +- clang/utils/TableGen/SveEmitter.cpp | 727 ++- clang/utils/TableGen/TableGen.cpp | 18 + clang/utils/TableGen/TableGenBackends.h | 3 + .../cmake/Modules/CompilerRTDarwinUtils.cmake | 7 +- compiler-rt/include/fuzzer/FuzzedDataProvider.h | 572 +- compiler-rt/lib/asan/asan_report.cpp | 3 + .../fuzzer/tests/FuzzedDataProviderUnittest.cpp | 18 +- compiler-rt/lib/gwp_asan/common.cpp | 5 + compiler-rt/lib/gwp_asan/tests/backtrace.cpp | 67 +- compiler-rt/lib/msan/msan_interceptors.cpp | 42 +- compiler-rt/lib/profile/CMakeLists.txt | 1 + compiler-rt/lib/profile/GCDAProfiling.c | 33 +- compiler-rt/lib/profile/InstrProfiling.c | 14 +- compiler-rt/lib/profile/InstrProfiling.h | 3 + compiler-rt/lib/profile/InstrProfilingBuffer.c | 5 +- compiler-rt/lib/profile/InstrProfilingFile.c | 25 +- compiler-rt/lib/profile/InstrProfilingInternal.c | 33 + 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.../API/lang/cpp/bitfields/TestCppBitfields.py | 7 + lldb/test/API/lang/cpp/bitfields/main.cpp | 12 + .../TestCovariantReturnTypes.py | 2 + .../API/lang/cpp/covariant-return-types/main.cpp | 19 + .../cpp/template-function/TestTemplateFunctions.py | 40 +- lldb/test/API/lang/cpp/template-function/main.cpp | 62 +- .../API/lang/cpp/thread_local/TestThreadLocal.py | 51 +- lldb/test/API/lang/cpp/thread_local/main.cpp | 8 +- lldb/test/API/lang/objc/hidden-ivars/Makefile | 20 + .../API/lang/objc/hidden-ivars/TestHiddenIvars.py | 18 +- .../test/API/lang/objc/objc-ivar-stripped/Makefile | 7 +- .../test/API/linux/builtin_trap/TestBuiltinTrap.py | 2 +- lldb/test/API/macosx/dyld-trie-symbols/Makefile | 13 + .../dyld-trie-symbols/TestDyldTrieSymbols.py | 87 + lldb/test/API/macosx/dyld-trie-symbols/main.cpp | 29 + .../python_api/sbenvironment/TestSBEnvironment.py | 125 + .../API/python_api/sbplatform}/Makefile | 0 .../API/python_api/sbplatform/TestSBPlatform.py | 22 + lldb/test/API/python_api/sbplatform/main.cpp | 8 + .../breakpoint/TestVSCode_setBreakpoints.py | 8 +- .../completions/TestVSCode_completions.py | 6 +- .../tools/lldb-vscode/launch/TestVSCode_launch.py | 26 + lldb/test/CMakeLists.txt | 17 + .../test/Shell/ExecControl/StopHook/stop-hook.test | 4 +- .../Functionalities/TestDataFormatter.test | 2 +- .../Functionalities/TestExpressionEvaluation.test | 2 +- .../Reproducer/Functionalities/TestImageList.test | 2 +- .../Reproducer/Functionalities/TestStepping.test | 2 +- lldb/test/Shell/Reproducer/Inputs/foo.lua | 1 + lldb/test/Shell/Reproducer/Inputs/foo.py | 1 + .../Shell/Reproducer/TestCaptureEnvOverride.test | 1 - lldb/test/Shell/Reproducer/TestCrash.test | 1 - lldb/test/Shell/Reproducer/TestDSYM.test | 11 + lldb/test/Shell/Reproducer/TestDiscard.test | 1 - lldb/test/Shell/Reproducer/TestDump.test | 1 - lldb/test/Shell/Reproducer/TestGDBRemoteRepro.test | 2 +- lldb/test/Shell/Reproducer/TestLuaImport.test | 11 + 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+- llvm/CMakeLists.txt | 3 +- llvm/cmake/modules/AddLLVM.cmake | 7 + llvm/cmake/modules/HandleLLVMOptions.cmake | 22 +- llvm/cmake/modules/LLVMExternalProjectUtils.cmake | 13 +- llvm/docs/AMDGPUUsage.rst | 222 +- llvm/docs/AliasAnalysis.rst | 8 +- llvm/docs/CMake.rst | 10 +- llvm/docs/CodingStandards.rst | 47 + llvm/docs/CommandGuide/dsymutil.rst | 6 + llvm/docs/CommandGuide/lit.rst | 29 +- llvm/docs/CommandGuide/llvm-addr2line.rst | 16 +- llvm/docs/CommandGuide/llvm-dwarfdump.rst | 4 + llvm/docs/CommandGuide/llvm-exegesis.rst | 6 +- llvm/docs/CommandGuide/llvm-lipo.rst | 2 +- llvm/docs/CommandGuide/llvm-objcopy.rst | 2 +- llvm/docs/CommandGuide/llvm-objdump.rst | 2 +- llvm/docs/CommandGuide/llvm-size.rst | 2 +- llvm/docs/CommandGuide/llvm-strings.rst | 2 +- llvm/docs/CommandGuide/llvm-strip.rst | 2 +- llvm/docs/CommandGuide/llvm-symbolizer.rst | 30 +- llvm/docs/CompileCudaWithLLVM.rst | 14 +- llvm/docs/Docker.rst | 4 +- llvm/docs/FAQ.rst | 8 +- llvm/docs/Frontend/PerformanceTips.rst | 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llvm/docs/SphinxQuickstartTemplate.rst | 2 +- llvm/docs/Statepoints.rst | 7 +- llvm/docs/TableGen/index.rst | 2 +- llvm/docs/TestSuiteGuide.md | 8 +- llvm/docs/TestingGuide.rst | 6 +- llvm/docs/TypeMetadata.rst | 4 +- llvm/docs/UserGuides.rst | 4 +- llvm/docs/Vectorizers.rst | 4 +- llvm/docs/WritingAnLLVMPass.rst | 38 +- llvm/docs/index.rst | 8 +- llvm/docs/tutorial/BuildingAJIT1.rst | 2 +- .../MyFirstLanguageFrontend/LangImpl02.rst | 2 +- .../MyFirstLanguageFrontend/LangImpl03.rst | 6 +- .../MyFirstLanguageFrontend/LangImpl04.rst | 2 +- .../MyFirstLanguageFrontend/LangImpl05.rst | 2 +- .../MyFirstLanguageFrontend/LangImpl08.rst | 2 +- .../MyFirstLanguageFrontend/LangImpl09.rst | 4 +- llvm/docs/tutorial/OCamlLangImpl3.rst | 4 +- llvm/docs/tutorial/OCamlLangImpl5.rst | 2 +- llvm/docs/tutorial/index.rst | 2 +- llvm/examples/OrcV2Examples/CMakeLists.txt | 3 +- .../CMakeLists.txt | 17 + .../LLJITWithGDBRegistrationListener.cpp | 109 + .../LLJITWithLazyReexports.cpp | 2 +- llvm/examples/ThinLtoJIT/ThinLtoJIT.cpp | 2 +- llvm/examples/ThinLtoJIT/ThinLtoModuleIndex.cpp | 2 +- llvm/include/llvm/ADT/ArrayRef.h | 12 +- llvm/include/llvm/ADT/BitmaskEnum.h | 8 + llvm/include/llvm/ADT/CoalescingBitVector.h | 85 +- llvm/include/llvm/ADT/PostOrderIterator.h | 3 +- llvm/include/llvm/ADT/STLExtras.h | 32 +- llvm/include/llvm/ADT/StringSet.h | 1 - llvm/include/llvm/ADT/Triple.h | 5 + llvm/include/llvm/ADT/Twine.h | 4 +- llvm/include/llvm/ADT/Waymarking.h | 325 + llvm/include/llvm/Analysis/BranchProbabilityInfo.h | 2 +- llvm/include/llvm/Analysis/CFGPrinter.h | 4 +- llvm/include/llvm/Analysis/ConstantFolding.h | 7 +- llvm/include/llvm/Analysis/InstructionSimplify.h | 3 +- llvm/include/llvm/Analysis/LazyValueInfo.h | 4 +- llvm/include/llvm/Analysis/MemoryBuiltins.h | 8 + llvm/include/llvm/Analysis/MemoryLocation.h | 10 + .../llvm/Analysis/ScalarEvolutionExpander.h | 16 +- llvm/include/llvm/Analysis/TargetFolder.h | 2 +- llvm/include/llvm/Analysis/TargetLibraryInfo.def | 3 + llvm/include/llvm/Analysis/TargetTransformInfo.h | 57 +- .../llvm/Analysis/TargetTransformInfoImpl.h | 70 +- llvm/include/llvm/Analysis/ValueLattice.h | 112 +- llvm/include/llvm/Analysis/ValueTracking.h | 25 + llvm/include/llvm/Analysis/VectorUtils.h | 19 +- llvm/include/llvm/BinaryFormat/ELF.h | 93 +- llvm/include/llvm/BinaryFormat/Wasm.h | 2 +- llvm/include/llvm/BinaryFormat/XCOFF.h | 1 + llvm/include/llvm/CodeGen/BasicTTIImpl.h | 4 +- llvm/include/llvm/CodeGen/CallingConvLower.h | 2 +- llvm/include/llvm/CodeGen/CommandFlags.h | 151 + llvm/include/llvm/CodeGen/CommandFlags.inc | 496 -- llvm/include/llvm/CodeGen/DIE.h | 19 +- llvm/include/llvm/CodeGen/FastISel.h | 1 + .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 41 + .../llvm/CodeGen/GlobalISel/GISelKnownBits.h | 3 + .../include/llvm/CodeGen/GlobalISel/IRTranslator.h | 11 +- .../CodeGen/GlobalISel/InstructionSelectorImpl.h | 2 +- .../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 18 + .../llvm/CodeGen/GlobalISel/LegalizerInfo.h | 3 + .../llvm/CodeGen/GlobalISel/MIPatternMatch.h | 6 + llvm/include/llvm/CodeGen/GlobalISel/Utils.h | 4 +- llvm/include/llvm/CodeGen/ISDOpcodes.h | 5 + llvm/include/llvm/CodeGen/MIRYamlMapping.h | 33 +- llvm/include/llvm/CodeGen/MachineFrameInfo.h | 39 +- llvm/include/llvm/CodeGen/MachineFunction.h | 19 +- llvm/include/llvm/CodeGen/MachineLoopInfo.h | 4 - llvm/include/llvm/CodeGen/MachineMemOperand.h | 25 +- llvm/include/llvm/CodeGen/MachineOperand.h | 5 + llvm/include/llvm/CodeGen/MachineRegisterInfo.h | 13 +- .../Hexagon => include/llvm/CodeGen}/RDFGraph.h | 0 .../Hexagon => include/llvm/CodeGen}/RDFLiveness.h | 0 .../llvm/CodeGen}/RDFRegisters.h | 0 llvm/include/llvm/CodeGen/SelectionDAG.h | 154 +- llvm/include/llvm/CodeGen/SelectionDAGISel.h | 4 +- llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 23 +- llvm/include/llvm/CodeGen/TargetFrameLowering.h | 13 +- llvm/include/llvm/CodeGen/TargetLowering.h | 22 + .../llvm/CodeGen/TargetLoweringObjectFileImpl.h | 4 +- llvm/include/llvm/CodeGen/TargetRegisterInfo.h | 6 + llvm/include/llvm/CodeGen/ValueTypes.h | 47 +- llvm/include/llvm/DWARFLinker/DWARFLinker.h | 12 + llvm/include/llvm/DebugInfo/DIContext.h | 8 +- llvm/include/llvm/DebugInfo/Symbolize/DIPrinter.h | 8 +- .../llvm/DebugInfo/Symbolize/SymbolizableModule.h | 5 +- llvm/include/llvm/DebugInfo/Symbolize/Symbolize.h | 2 + llvm/include/llvm/ExecutionEngine/JITSymbol.h | 19 +- llvm/include/llvm/ExecutionEngine/Orc/Core.h | 125 +- llvm/include/llvm/ExecutionEngine/Orc/DebugUtils.h | 72 + .../llvm/ExecutionEngine/Orc/MachOPlatform.h | 5 +- .../ExecutionEngine/Orc/RTDyldObjectLinkingLayer.h | 19 +- .../include/llvm/ExecutionEngine/Orc/Speculation.h | 1 + llvm/include/llvm/ExecutionEngine/RuntimeDyld.h | 27 +- llvm/include/llvm/Frontend/OpenMP/OMPContext.h | 10 +- llvm/include/llvm/Frontend/OpenMP/OMPKinds.def | 70 +- llvm/include/llvm/IR/CFG.h | 36 +- llvm/include/llvm/IR/CFGDiff.h | 76 +- llvm/include/llvm/IR/CallSite.h | 7 + llvm/include/llvm/IR/ConstantFolder.h | 2 +- llvm/include/llvm/IR/ConstantRange.h | 4 + llvm/include/llvm/IR/Constants.h | 22 +- llvm/include/llvm/IR/DerivedTypes.h | 35 +- llvm/include/llvm/IR/FPEnv.h | 4 + llvm/include/llvm/IR/Function.h | 7 + llvm/include/llvm/IR/IRBuilder.h | 24 +- llvm/include/llvm/IR/IRBuilderFolder.h | 2 +- llvm/include/llvm/IR/Instructions.h | 101 +- llvm/include/llvm/IR/IntrinsicInst.h | 42 + llvm/include/llvm/IR/Intrinsics.td | 81 +- llvm/include/llvm/IR/IntrinsicsAArch64.td | 71 +- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 13 +- llvm/include/llvm/IR/IntrinsicsARM.td | 129 +- llvm/include/llvm/IR/IntrinsicsWebAssembly.td | 4 + llvm/include/llvm/IR/IntrinsicsX86.td | 8 + llvm/include/llvm/IR/KnowledgeRetention.h | 30 +- llvm/include/llvm/IR/NoFolder.h | 2 +- llvm/include/llvm/IR/Operator.h | 19 + llvm/include/llvm/IR/PatternMatch.h | 71 +- llvm/include/llvm/IR/VPIntrinsics.def | 84 + llvm/include/llvm/InitializePasses.h | 1 + llvm/include/llvm/LTO/LTO.h | 2 +- llvm/include/llvm/LinkAllPasses.h | 3 +- llvm/include/llvm/MC/LaneBitmask.h | 2 +- llvm/include/llvm/MC/MCAsmInfo.h | 7 +- llvm/include/llvm/MC/MCDirectives.h | 50 +- llvm/include/llvm/MC/MCFixup.h | 13 +- llvm/include/llvm/MC/MCFragment.h | 5 + llvm/include/llvm/MC/MCInstPrinter.h | 15 + llvm/include/llvm/MC/MCInstrDesc.h | 14 - llvm/include/llvm/MC/MCInstrInfo.h | 23 +- llvm/include/llvm/MC/MCObjectFileInfo.h | 1 + llvm/include/llvm/MC/MCObjectStreamer.h | 5 - llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h | 54 + .../llvm/MC/MCTargetOptionsCommandFlags.inc | 65 - llvm/include/llvm/MCA/CodeEmitter.h | 3 - llvm/include/llvm/MCA/HardwareUnits/LSUnit.h | 2 - llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h | 1 - .../llvm/MCA/HardwareUnits/ResourceManager.h | 1 - llvm/include/llvm/MCA/Pipeline.h | 2 - llvm/include/llvm/MCA/Stages/DispatchStage.h | 1 - llvm/include/llvm/Object/COFF.h | 1 + llvm/include/llvm/Object/ELFObjectFile.h | 18 +- llvm/include/llvm/Object/MachO.h | 1 + llvm/include/llvm/Object/ObjectFile.h | 8 + llvm/include/llvm/Object/Wasm.h | 6 +- llvm/include/llvm/Object/XCOFFObjectFile.h | 8 + llvm/include/llvm/ObjectYAML/ELFYAML.h | 8 + llvm/include/llvm/ObjectYAML/WasmYAML.h | 16 +- llvm/include/llvm/Passes/PassBuilder.h | 4 + llvm/include/llvm/ProfileData/SampleProf.h | 84 +- llvm/include/llvm/ProfileData/SampleProfReader.h | 35 +- llvm/include/llvm/ProfileData/SampleProfWriter.h | 26 +- llvm/include/llvm/Support/AArch64TargetParser.def | 9 + llvm/include/llvm/Support/AArch64TargetParser.h | 2 + llvm/include/llvm/Support/ARMAttributeParser.h | 37 +- llvm/include/llvm/Support/ARMBuildAttributes.h | 109 +- llvm/include/llvm/Support/ARMTargetParser.def | 6 + llvm/include/llvm/Support/ARMTargetParser.h | 17 +- llvm/include/llvm/Support/Alignment.h | 25 +- llvm/include/llvm/Support/ELFAttributeParser.h | 72 + llvm/include/llvm/Support/ELFAttributes.h | 37 + llvm/include/llvm/Support/FileCollector.h | 18 +- .../llvm/Support/GenericDomTreeConstruction.h | 42 +- llvm/include/llvm/Support/LockFileManager.h | 4 +- llvm/include/llvm/Support/OptimalLayout.h | 130 + llvm/include/llvm/Support/Parallel.h | 6 + llvm/include/llvm/Support/Path.h | 4 - llvm/include/llvm/Support/PrettyStackTrace.h | 4 + llvm/include/llvm/Support/RISCVAttributeParser.h | 38 + llvm/include/llvm/Support/RISCVAttributes.h | 44 + llvm/include/llvm/Support/TargetOpcodes.def | 18 + llvm/include/llvm/Support/Threading.h | 24 + llvm/include/llvm/Support/TypeSize.h | 8 +- llvm/include/llvm/Support/VirtualFileSystem.h | 9 +- llvm/include/llvm/Support/Windows/WindowsSupport.h | 6 + llvm/include/llvm/Target/GenericOpcodes.td | 52 + llvm/include/llvm/Target/GlobalISel/Combine.td | 80 +- .../llvm/Target/GlobalISel/SelectionDAGCompat.td | 2 + .../include/llvm/Target/TargetLoweringObjectFile.h | 7 +- llvm/include/llvm/Target/TargetMachine.h | 3 + llvm/include/llvm/Target/TargetOptions.h | 57 +- llvm/include/llvm/Testing/Support/Annotations.h | 2 + llvm/include/llvm/TextAPI/MachO/InterfaceFile.h | 5 - llvm/include/llvm/Transforms/IPO/Attributor.h | 105 +- .../llvm/Transforms/IPO/PassManagerBuilder.h | 1 - .../llvm/Transforms/InstCombine/InstCombine.h | 16 +- llvm/include/llvm/Transforms/Utils.h | 8 + .../llvm/Transforms/Utils/BasicBlockUtils.h | 76 + llvm/include/llvm/Transforms/Utils/Local.h | 7 + .../llvm/Transforms/Utils/LowerMemIntrinsics.h | 6 +- llvm/include/llvm/module.modulemap | 4 +- llvm/lib/Analysis/BasicAliasAnalysis.cpp | 2 +- llvm/lib/Analysis/BlockFrequencyInfo.cpp | 2 +- llvm/lib/Analysis/BranchProbabilityInfo.cpp | 14 +- llvm/lib/Analysis/CFG.cpp | 6 +- llvm/lib/Analysis/ConstantFolding.cpp | 134 +- .../lib/Analysis/InstructionPrecedenceTracking.cpp | 21 +- llvm/lib/Analysis/InstructionSimplify.cpp | 59 +- llvm/lib/Analysis/LazyValueInfo.cpp | 53 +- llvm/lib/Analysis/MemoryBuiltins.cpp | 30 +- llvm/lib/Analysis/ScalarEvolution.cpp | 7 +- llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 48 +- llvm/lib/Analysis/SyncDependenceAnalysis.cpp | 2 +- llvm/lib/Analysis/TargetLibraryInfo.cpp | 8 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 19 +- llvm/lib/Analysis/ValueLattice.cpp | 8 +- llvm/lib/Analysis/ValueTracking.cpp | 262 +- llvm/lib/Analysis/VectorUtils.cpp | 24 +- llvm/lib/AsmParser/LLParser.cpp | 5 +- llvm/lib/BinaryFormat/XCOFF.cpp | 33 + llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 52 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 5 +- llvm/lib/Bitcode/Writer/ValueEnumerator.cpp | 43 +- llvm/lib/CodeGen/Analysis.cpp | 37 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 21 +- llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 33 +- llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h | 8 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 94 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 9 + llvm/lib/CodeGen/CFIInstrInserter.cpp | 76 +- llvm/lib/CodeGen/CMakeLists.txt | 4 + llvm/lib/CodeGen/CalcSpillWeights.cpp | 9 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 14 +- llvm/lib/CodeGen/CommandFlags.cpp | 623 ++ llvm/lib/CodeGen/GlobalISel/CallLowering.cpp | 14 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 125 +- llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 43 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 145 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 114 +- llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp | 10 +- llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 6 +- llvm/lib/CodeGen/GlobalISel/Utils.cpp | 9 +- llvm/lib/CodeGen/LiveDebugValues.cpp | 87 +- llvm/lib/CodeGen/LiveDebugVariables.cpp | 47 +- llvm/lib/CodeGen/LocalStackSlotAllocation.cpp | 30 +- llvm/lib/CodeGen/MIRParser/MILexer.cpp | 1 + llvm/lib/CodeGen/MIRParser/MILexer.h | 1 + llvm/lib/CodeGen/MIRParser/MIParser.cpp | 10 +- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 22 +- llvm/lib/CodeGen/MIRPrinter.cpp | 15 +- llvm/lib/CodeGen/MIRVRegNamerUtils.cpp | 2 +- llvm/lib/CodeGen/MachineBlockPlacement.cpp | 11 +- llvm/lib/CodeGen/MachineFrameInfo.cpp | 19 +- llvm/lib/CodeGen/MachineFunction.cpp | 25 +- llvm/lib/CodeGen/MachineLoopInfo.cpp | 7 - llvm/lib/CodeGen/MachineOperand.cpp | 25 +- llvm/lib/CodeGen/MachineOutliner.cpp | 47 +- llvm/lib/CodeGen/MachinePipeliner.cpp | 4 +- llvm/lib/CodeGen/MachineRegisterInfo.cpp | 50 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 59 +- llvm/lib/CodeGen/RDFGraph.cpp | 1837 ++++++ llvm/lib/CodeGen/RDFLiveness.cpp | 1118 ++++ llvm/lib/CodeGen/RDFRegisters.cpp | 380 ++ llvm/lib/CodeGen/RegAllocFast.cpp | 4 +- llvm/lib/CodeGen/RegUsageInfoPropagate.cpp | 9 +- llvm/lib/CodeGen/RegisterScavenging.cpp | 6 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 364 +- llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 53 +- .../CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | 20 +- .../CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 8 + .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 29 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 3 + .../CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp | 9 + .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 132 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 69 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 466 +- .../CodeGen/SelectionDAG/SelectionDAGDumper.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 23 +- .../CodeGen/SelectionDAG/StatepointLowering.cpp | 22 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 141 +- llvm/lib/CodeGen/StackColoring.cpp | 4 +- llvm/lib/CodeGen/StackSlotColoring.cpp | 10 +- llvm/lib/CodeGen/TargetInstrInfo.cpp | 6 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 12 +- llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 9 +- llvm/lib/CodeGen/TargetOptionsImpl.cpp | 6 + llvm/lib/CodeGen/TargetRegisterInfo.cpp | 4 +- llvm/lib/CodeGen/ValueTypes.cpp | 34 +- llvm/lib/CodeGen/VirtRegMap.cpp | 4 +- llvm/lib/DWARFLinker/DWARFLinker.cpp | 14 + llvm/lib/DebugInfo/CodeView/TypeStreamMerger.cpp | 4 +- llvm/lib/DebugInfo/DWARF/DWARFContext.cpp | 10 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp | 14 +- llvm/lib/DebugInfo/Symbolize/DIPrinter.cpp | 2 - .../DebugInfo/Symbolize/SymbolizableObjectFile.cpp | 22 +- .../DebugInfo/Symbolize/SymbolizableObjectFile.h | 4 +- llvm/lib/DebugInfo/Symbolize/Symbolize.cpp | 8 +- llvm/lib/ExecutionEngine/Interpreter/Execution.cpp | 9 +- .../ExecutionEngine/Orc/CompileOnDemandLayer.cpp | 10 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 386 +- llvm/lib/ExecutionEngine/Orc/DebugUtils.cpp | 280 + llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp | 4 +- llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 78 +- llvm/lib/ExecutionEngine/Orc/Layer.cpp | 19 +- llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp | 22 +- llvm/lib/ExecutionEngine/Orc/Mangling.cpp | 18 +- .../lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp | 52 +- .../Orc/RTDyldObjectLinkingLayer.cpp | 73 +- llvm/lib/ExecutionEngine/Orc/SpeculateAnalyses.cpp | 2 +- .../ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp | 48 +- .../ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h | 8 +- llvm/lib/Frontend/OpenMP/OMPContext.cpp | 41 +- llvm/lib/FuzzMutate/Operations.cpp | 18 +- llvm/lib/IR/AsmWriter.cpp | 32 + llvm/lib/IR/AutoUpgrade.cpp | 19 +- llvm/lib/IR/BasicBlock.cpp | 4 +- llvm/lib/IR/ConstantFold.cpp | 68 +- llvm/lib/IR/ConstantFold.h | 2 +- llvm/lib/IR/ConstantRange.cpp | 22 + llvm/lib/IR/Constants.cpp | 50 +- llvm/lib/IR/ConstantsContext.h | 86 +- llvm/lib/IR/Core.cpp | 4 +- llvm/lib/IR/DebugInfoMetadata.cpp | 4 +- llvm/lib/IR/FPEnv.cpp | 16 + llvm/lib/IR/Instruction.cpp | 3 + llvm/lib/IR/Instructions.cpp | 286 +- llvm/lib/IR/IntrinsicInst.cpp | 136 + llvm/lib/IR/KnowledgeRetention.cpp | 89 +- llvm/lib/IR/MDBuilder.cpp | 2 +- llvm/lib/IR/Operator.cpp | 5 + llvm/lib/IR/Type.cpp | 61 +- llvm/lib/IR/Value.cpp | 7 +- llvm/lib/IR/Verifier.cpp | 60 +- llvm/lib/LTO/LTO.cpp | 16 +- llvm/lib/MC/CMakeLists.txt | 2 + llvm/lib/MC/MCAsmInfoCOFF.cpp | 2 +- llvm/lib/MC/MCAssembler.cpp | 8 +- llvm/lib/MC/MCInstrDesc.cpp | 11 - llvm/lib/MC/MCInstrInfo.cpp | 27 + llvm/lib/MC/MCSubtargetInfo.cpp | 2 +- llvm/lib/MC/MCTargetOptionsCommandFlags.cpp | 105 + llvm/lib/Object/COFFObjectFile.cpp | 6 + llvm/lib/Object/ELF.cpp | 16 +- llvm/lib/Object/ELFObjectFile.cpp | 89 +- llvm/lib/Object/MachOObjectFile.cpp | 5 + llvm/lib/Object/ObjectFile.cpp | 15 +- llvm/lib/Object/WasmObjectFile.cpp | 108 +- llvm/lib/Object/XCOFFObjectFile.cpp | 93 +- llvm/lib/ObjectYAML/ELFEmitter.cpp | 11 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 10 + llvm/lib/ObjectYAML/WasmEmitter.cpp | 36 +- llvm/lib/ObjectYAML/WasmYAML.cpp | 18 +- llvm/lib/Passes/PassBuilder.cpp | 8 +- llvm/lib/ProfileData/SampleProf.cpp | 1 + llvm/lib/ProfileData/SampleProfReader.cpp | 74 +- llvm/lib/ProfileData/SampleProfWriter.cpp | 32 +- llvm/lib/Support/AArch64TargetParser.cpp | 2 + llvm/lib/Support/ARMAttributeParser.cpp | 212 +- llvm/lib/Support/ARMBuildAttrs.cpp | 140 +- llvm/lib/Support/ARMTargetParser.cpp | 3 + llvm/lib/Support/CMakeLists.txt | 5 + llvm/lib/Support/ELFAttributeParser.cpp | 233 + llvm/lib/Support/ELFAttributes.cpp | 34 + llvm/lib/Support/FileCollector.cpp | 56 +- llvm/lib/Support/Host.cpp | 1 + llvm/lib/Support/LockFileManager.cpp | 64 +- llvm/lib/Support/OptimalLayout.cpp | 452 ++ llvm/lib/Support/Parallel.cpp | 8 +- llvm/lib/Support/PrettyStackTrace.cpp | 12 + llvm/lib/Support/RISCVAttributeParser.cpp | 67 + llvm/lib/Support/RISCVAttributes.cpp | 25 + llvm/lib/Support/Threading.cpp | 30 +- llvm/lib/Support/Triple.cpp | 2 + llvm/lib/Support/Unix/Process.inc | 20 +- llvm/lib/Support/Unix/Threading.inc | 2 +- llvm/lib/Support/VirtualFileSystem.cpp | 34 +- llvm/lib/Support/Windows/Path.inc | 99 +- llvm/lib/Support/Windows/Program.inc | 4 +- llvm/lib/Support/Windows/Threading.inc | 56 +- llvm/lib/Target/AArch64/AArch64.td | 10 +- llvm/lib/Target/AArch64/AArch64CallLowering.cpp | 10 +- .../Target/AArch64/AArch64ExpandPseudoInsts.cpp | 5 + llvm/lib/Target/AArch64/AArch64FastISel.cpp | 4 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 160 +- llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 89 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 107 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 3 + llvm/lib/Target/AArch64/AArch64InstrFormats.td | 104 + llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 12 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 18 + .../Target/AArch64/AArch64InstructionSelector.cpp | 11 +- llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp | 26 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 154 +- .../lib/Target/AArch64/AArch64SelectionDAGInfo.cpp | 2 +- llvm/lib/Target/AArch64/AArch64Subtarget.h | 7 + llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 3 + .../lib/Target/AArch64/AArch64TargetObjectFile.cpp | 1 - .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 4 + .../AArch64/MCTargetDesc/AArch64AsmBackend.cpp | 28 +- .../MCTargetDesc/AArch64ELFObjectWriter.cpp | 7 +- .../AArch64/MCTargetDesc/AArch64InstPrinter.cpp | 12 +- .../AArch64/MCTargetDesc/AArch64InstPrinter.h | 18 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 208 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 7 +- llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h | 5 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 39 +- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.h | 2 +- llvm/lib/Target/AMDGPU/AMDGPUCombine.td | 9 +- llvm/lib/Target/AMDGPU/AMDGPUGISel.td | 5 + llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h | 32 + llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 49 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 23 + llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 6 + llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h | 3 + .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 326 +- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 6 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 711 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 4 +- llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp | 36 +- .../Target/AMDGPU/AMDGPULowerKernelArguments.cpp | 2 +- .../Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp | 41 +- .../Target/AMDGPU/AMDGPUPropagateAttributes.cpp | 135 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 64 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBanks.td | 2 +- .../Target/AMDGPU/AMDGPURewriteOutArguments.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 57 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 43 +- .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 96 +- llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 12 +- .../AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp | 17 +- llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp | 8 +- llvm/lib/Target/AMDGPU/GCNRegPressure.h | 2 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 15 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h | 4 + .../Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp | 1 + .../AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp | 6 + .../AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h | 4 + llvm/lib/Target/AMDGPU/MIMGInstructions.td | 5 + .../lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp | 3 +- llvm/lib/Target/AMDGPU/R600FrameLowering.cpp | 6 +- llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | 2 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 17 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 389 +- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 35 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 265 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 2 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 99 - llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 13 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 85 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 26 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 95 +- llvm/lib/Target/AMDGPU/SIPostRABundler.cpp | 2 +- llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp | 169 + llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 186 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 16 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 113 +- llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp | 34 +- llvm/lib/Target/AMDGPU/SMInstructions.td | 4 +- llvm/lib/Target/AMDGPU/SOPInstructions.td | 4 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 27 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 19 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 4 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 16 +- llvm/lib/Target/ARC/ARCInstrInfo.cpp | 8 +- llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.h | 4 + llvm/lib/Target/ARM/ARM.td | 21 + llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 9 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 36 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 10 +- llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 4 +- llvm/lib/Target/ARM/ARMCallLowering.cpp | 7 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 11 +- llvm/lib/Target/ARM/ARMFastISel.cpp | 19 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 349 +- llvm/lib/Target/ARM/ARMFrameLowering.h | 9 +- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 122 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 349 +- llvm/lib/Target/ARM/ARMISelLowering.h | 17 +- llvm/lib/Target/ARM/ARMInstrCDE.td | 151 + llvm/lib/Target/ARM/ARMInstrFormats.td | 6 + llvm/lib/Target/ARM/ARMInstrInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMInstrInfo.td | 15 +- llvm/lib/Target/ARM/ARMInstrMVE.td | 619 +- llvm/lib/Target/ARM/ARMInstrNEON.td | 119 +- llvm/lib/Target/ARM/ARMInstrThumb2.td | 4 +- llvm/lib/Target/ARM/ARMInstrVFP.td | 29 + llvm/lib/Target/ARM/ARMInstructionSelector.cpp | 16 +- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 14 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 152 +- llvm/lib/Target/ARM/ARMPredicates.td | 4 + llvm/lib/Target/ARM/ARMSubtarget.h | 6 + llvm/lib/Target/ARM/ARMTargetMachine.cpp | 6 + llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 31 +- llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 36 +- llvm/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h | 11 + .../Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp | 7 +- .../lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp | 11 +- .../lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp | 4 +- llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h | 23 +- llvm/lib/Target/ARM/MVETailPredication.cpp | 4 +- llvm/lib/Target/ARM/MVEVPTBlockPass.cpp | 250 +- llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | 27 +- llvm/lib/Target/ARM/Thumb1InstrInfo.cpp | 4 +- llvm/lib/Target/ARM/Thumb2InstrInfo.cpp | 4 +- llvm/lib/Target/ARM/Thumb2InstrInfo.h | 4 + llvm/lib/Target/ARM/Thumb2SizeReduction.cpp | 2 +- llvm/lib/Target/ARM/Utils/ARMBaseInfo.h | 46 +- llvm/lib/Target/AVR/AVRFrameLowering.cpp | 19 +- llvm/lib/Target/AVR/AVRISelLowering.cpp | 32 +- llvm/lib/Target/AVR/AVRInstrInfo.cpp | 4 +- llvm/lib/Target/AVR/AVRMachineFunctionInfo.h | 20 +- llvm/lib/Target/AVR/AVRRegisterInfo.cpp | 13 +- llvm/lib/Target/AVR/MCTargetDesc/AVRFixupKinds.h | 2 +- .../lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp | 2 +- llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.h | 11 +- llvm/lib/Target/BPF/BPFTargetMachine.cpp | 4 +- llvm/lib/Target/Hexagon/CMakeLists.txt | 3 - llvm/lib/Target/Hexagon/HexagonBitTracker.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 77 +- llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 10 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 18 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 16 +- llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp | 6 +- llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp | 6 +- llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp | 7 +- llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp | 7 +- .../lib/Target/Hexagon/HexagonTargetObjectFile.cpp | 1 - llvm/lib/Target/Hexagon/RDFCopy.cpp | 6 +- llvm/lib/Target/Hexagon/RDFCopy.h | 6 +- llvm/lib/Target/Hexagon/RDFDeadCode.cpp | 4 +- llvm/lib/Target/Hexagon/RDFDeadCode.h | 4 +- llvm/lib/Target/Hexagon/RDFGraph.cpp | 1835 ------ llvm/lib/Target/Hexagon/RDFLiveness.cpp | 1118 ---- llvm/lib/Target/Hexagon/RDFRegisters.cpp | 380 -- llvm/lib/Target/Lanai/LanaiFrameLowering.cpp | 4 +- llvm/lib/Target/Lanai/LanaiTargetObjectFile.cpp | 1 - .../Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp | 2 +- .../Target/Lanai/MCTargetDesc/LanaiInstPrinter.h | 7 +- .../MSP430/MCTargetDesc/MSP430InstPrinter.cpp | 2 +- .../Target/MSP430/MCTargetDesc/MSP430InstPrinter.h | 7 +- llvm/lib/Target/MSP430/MSP430FrameLowering.cpp | 4 +- llvm/lib/Target/MSP430/MSP430InstrInfo.cpp | 4 +- llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 242 + .../Target/Mips/MCTargetDesc/MipsInstPrinter.cpp | 2 +- .../lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h | 11 +- .../Mips/MCTargetDesc/MipsTargetStreamer.cpp | 30 + llvm/lib/Target/Mips/Mips.td | 2 + llvm/lib/Target/Mips/Mips64InstrInfo.td | 14 + llvm/lib/Target/Mips/MipsBranchExpansion.cpp | 21 +- llvm/lib/Target/Mips/MipsCallLowering.cpp | 15 +- llvm/lib/Target/Mips/MipsFastISel.cpp | 8 +- llvm/lib/Target/Mips/MipsISelLowering.h | 2 +- llvm/lib/Target/Mips/MipsInstrFPU.td | 17 + llvm/lib/Target/Mips/MipsInstrInfo.cpp | 4 +- llvm/lib/Target/Mips/MipsInstrInfo.h | 4 + llvm/lib/Target/Mips/MipsInstrInfo.td | 44 + llvm/lib/Target/Mips/MipsInstructionSelector.cpp | 12 +- llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 9 +- llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp | 2 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 2 +- llvm/lib/Target/Mips/MipsRegisterInfo.cpp | 2 +- llvm/lib/Target/Mips/MipsSEFrameLowering.cpp | 6 +- llvm/lib/Target/Mips/MipsSEInstrInfo.cpp | 14 + llvm/lib/Target/Mips/MipsSEInstrInfo.h | 2 + llvm/lib/Target/Mips/MipsSchedule.td | 2 + llvm/lib/Target/Mips/MipsScheduleGeneric.td | 6 +- llvm/lib/Target/Mips/MipsScheduleP5600.td | 3 +- llvm/lib/Target/Mips/MipsSubtarget.h | 4 + llvm/lib/Target/Mips/MipsTargetObjectFile.cpp | 1 - llvm/lib/Target/Mips/MipsTargetStreamer.h | 7 + llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 4 +- llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp | 89 +- llvm/lib/Target/NVPTX/NVPTXISelLowering.h | 7 +- llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp | 4 +- llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp | 31 +- .../PowerPC/Disassembler/PPCDisassembler.cpp | 13 +- .../Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp | 47 +- .../PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp | 6 +- .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp | 36 +- .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.h | 9 +- llvm/lib/Target/PowerPC/PPC.td | 2 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 34 +- llvm/lib/Target/PowerPC/PPCFastISel.cpp | 12 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 35 +- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 2 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 275 +- llvm/lib/Target/PowerPC/PPCISelLowering.h | 10 +- llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 2 +- llvm/lib/Target/PowerPC/PPCInstrAltivec.td | 6 + llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 13 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 21 +- llvm/lib/Target/PowerPC/PPCInstrVSX.td | 85 + llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 10 +- llvm/lib/Target/PowerPC/PPCTargetObjectFile.cpp | 1 - llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 153 + .../Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp | 101 +- .../Target/RISCV/MCTargetDesc/RISCVELFStreamer.h | 88 +- .../Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp | 2 +- .../Target/RISCV/MCTargetDesc/RISCVInstPrinter.h | 8 +- .../RISCV/MCTargetDesc/RISCVTargetStreamer.cpp | 46 + .../RISCV/MCTargetDesc/RISCVTargetStreamer.h | 15 + llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp | 35 +- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 17 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 41 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h | 56 + llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 32 +- llvm/lib/Target/RISCV/RISCVISelLowering.h | 7 + llvm/lib/Target/RISCV/RISCVInstrInfoD.td | 8 + llvm/lib/Target/RISCV/RISCVInstrInfoF.td | 6 + llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp | 1 - .../Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp | 3 +- .../Target/Sparc/MCTargetDesc/SparcInstPrinter.h | 8 +- llvm/lib/Target/Sparc/SparcFrameLowering.cpp | 11 +- llvm/lib/Target/Sparc/SparcISelLowering.cpp | 6 +- llvm/lib/Target/Sparc/SparcInstrInfo.cpp | 4 +- llvm/lib/Target/Sparc/SparcTargetObjectFile.cpp | 1 - .../Target/SystemZ/AsmParser/SystemZAsmParser.cpp | 62 +- .../SystemZ/MCTargetDesc/SystemZInstPrinter.cpp | 3 +- .../SystemZ/MCTargetDesc/SystemZInstPrinter.h | 11 +- llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp | 4 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 6 +- llvm/lib/Target/SystemZ/SystemZInstrBuilder.h | 2 +- llvm/lib/Target/SystemZ/SystemZInstrFormats.td | 4 +- llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp | 31 +- llvm/lib/Target/SystemZ/SystemZInstrInfo.td | 4 +- llvm/lib/Target/SystemZ/SystemZInstrVector.td | 4 +- llvm/lib/Target/SystemZ/SystemZShortenInst.cpp | 45 +- llvm/lib/Target/TargetLoweringObjectFile.cpp | 7 +- llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.cpp | 4 +- llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.h | 3 +- llvm/lib/Target/VE/VE.h | 4 +- llvm/lib/Target/VE/VEFrameLowering.cpp | 6 +- llvm/lib/Target/VE/VEInstrInfo.cpp | 7 +- llvm/lib/Target/VE/VEInstrInfo.h | 1 - llvm/lib/Target/VE/VEInstrInfo.td | 4 +- .../Target/WebAssembly/WebAssemblyAsmPrinter.cpp | 5 +- llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp | 15 +- .../WebAssembly/WebAssemblyExplicitLocals.cpp | 2 + .../lib/Target/WebAssembly/WebAssemblyFastISel.cpp | 6 + .../WebAssembly/WebAssemblyFixFunctionBitcasts.cpp | 4 + .../WebAssembly/WebAssemblyFrameLowering.cpp | 6 +- .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 52 +- .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 17 + .../WebAssemblyLowerEmscriptenEHSjLj.cpp | 17 + .../WebAssembly/WebAssemblyLowerGlobalDtors.cpp | 30 +- .../Target/WebAssembly/WebAssemblyMCInstLower.cpp | 3 +- .../WebAssembly/WebAssemblyMachineFunctionInfo.cpp | 29 +- .../WebAssembly/WebAssemblyMachineFunctionInfo.h | 7 +- .../WebAssembly/WebAssemblySetP2AlignOperands.cpp | 2 +- llvm/lib/Target/X86/CMakeLists.txt | 1 + .../Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp | 5 +- .../Target/X86/MCTargetDesc/X86ATTInstPrinter.h | 7 +- llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 99 +- llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 27 - .../Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp | 4 +- .../X86/MCTargetDesc/X86InstPrinterCommon.cpp | 26 +- .../Target/X86/MCTargetDesc/X86InstPrinterCommon.h | 4 +- .../X86/MCTargetDesc/X86IntelInstPrinter.cpp | 3 +- .../Target/X86/MCTargetDesc/X86IntelInstPrinter.h | 7 +- llvm/lib/Target/X86/X86.h | 7 + llvm/lib/Target/X86/X86.td | 2 + llvm/lib/Target/X86/X86AvoidTrailingCall.cpp | 97 +- llvm/lib/Target/X86/X86CallFrameOptimization.cpp | 6 +- llvm/lib/Target/X86/X86CallLowering.cpp | 10 +- llvm/lib/Target/X86/X86FastISel.cpp | 18 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 77 +- llvm/lib/Target/X86/X86FrameLowering.h | 2 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 24 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 1119 ++-- llvm/lib/Target/X86/X86ISelLowering.h | 58 +- llvm/lib/Target/X86/X86IndirectBranchTracking.cpp | 13 +- llvm/lib/Target/X86/X86InstrAVX512.td | 616 +- llvm/lib/Target/X86/X86InstrBuilder.h | 2 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 64 +- llvm/lib/Target/X86/X86InstrInfo.h | 4 +- llvm/lib/Target/X86/X86InstrInfo.td | 8 + llvm/lib/Target/X86/X86InstructionSelector.cpp | 24 +- llvm/lib/Target/X86/X86InterleavedAccess.cpp | 36 +- llvm/lib/Target/X86/X86PartialReduction.cpp | 460 ++ llvm/lib/Target/X86/X86Subtarget.h | 4 + llvm/lib/Target/X86/X86TargetMachine.cpp | 21 +- llvm/lib/Target/X86/X86TargetObjectFile.cpp | 27 - llvm/lib/Target/X86/X86TargetObjectFile.h | 23 - llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 201 +- llvm/lib/Target/XCore/XCoreFrameLowering.cpp | 11 +- llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp | 2 +- llvm/lib/Target/XCore/XCoreInstrInfo.cpp | 4 +- llvm/lib/TextAPI/MachO/TextStub.cpp | 6 +- llvm/lib/Transforms/Coroutines/CoroEarly.cpp | 4 +- llvm/lib/Transforms/Coroutines/CoroElide.cpp | 36 +- llvm/lib/Transforms/Coroutines/CoroFrame.cpp | 325 +- llvm/lib/Transforms/Coroutines/CoroInstr.h | 13 +- llvm/lib/Transforms/Coroutines/CoroInternal.h | 42 +- llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 111 +- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 4 +- llvm/lib/Transforms/IPO/Attributor.cpp | 452 +- llvm/lib/Transforms/IPO/GlobalOpt.cpp | 5 +- llvm/lib/Transforms/IPO/OpenMPOpt.cpp | 67 +- llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 36 +- llvm/lib/Transforms/IPO/SampleProfile.cpp | 4 +- llvm/lib/Transforms/IPO/StripSymbols.cpp | 8 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 9 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 323 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 48 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 70 +- .../Transforms/InstCombine/InstCombineInternal.h | 13 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 5 +- .../InstCombine/InstCombineMulDivRem.cpp | 34 +- llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp | 9 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 46 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 84 +- .../InstCombine/InstCombineVectorOps.cpp | 130 +- .../InstCombine/InstructionCombining.cpp | 305 +- .../Transforms/Instrumentation/MemorySanitizer.cpp | 3 +- .../Instrumentation/PGOInstrumentation.cpp | 2 +- .../Transforms/Scalar/AlignmentFromAssumptions.cpp | 5 + llvm/lib/Transforms/Scalar/CallSiteSplitting.cpp | 28 +- llvm/lib/Transforms/Scalar/ConstantHoisting.cpp | 2 +- .../Scalar/CorrelatedValuePropagation.cpp | 13 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 165 +- llvm/lib/Transforms/Scalar/DivRemPairs.cpp | 24 + llvm/lib/Transforms/Scalar/EarlyCSE.cpp | 9 + llvm/lib/Transforms/Scalar/GVN.cpp | 29 +- llvm/lib/Transforms/Scalar/GVNSink.cpp | 11 +- llvm/lib/Transforms/Scalar/JumpThreading.cpp | 22 + .../Transforms/Scalar/LowerMatrixIntrinsics.cpp | 284 +- llvm/lib/Transforms/Scalar/NewGVN.cpp | 7 +- .../Transforms/Scalar/RewriteStatepointsForGC.cpp | 2 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 510 +- llvm/lib/Transforms/Scalar/SROA.cpp | 155 +- .../Scalar/SeparateConstOffsetFromGEP.cpp | 15 +- llvm/lib/Transforms/Scalar/StructurizeCFG.cpp | 38 +- llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 220 + llvm/lib/Transforms/Utils/BuildLibCalls.cpp | 4 + llvm/lib/Transforms/Utils/CMakeLists.txt | 1 + llvm/lib/Transforms/Utils/InlineFunction.cpp | 2 +- llvm/lib/Transforms/Utils/Local.cpp | 79 +- llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp | 85 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 13 +- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 5 +- llvm/lib/Transforms/Utils/UnifyLoopExits.cpp | 220 + llvm/lib/Transforms/Utils/Utils.cpp | 1 + llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 146 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 9 +- llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h | 5 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 44 +- llvm/lib/Transforms/Vectorize/VPlan.h | 87 +- llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp | 23 +- llvm/lib/Transforms/Vectorize/VPlanValue.h | 2 + llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 5 +- llvm/test/Analysis/CostModel/ARM/select.ll | 38 +- llvm/test/Analysis/CostModel/X86/reduce-add.ll | 165 +- llvm/test/Analysis/CostModel/X86/reduce-and.ll | 227 +- llvm/test/Analysis/CostModel/X86/reduce-fmax.ll | 111 + llvm/test/Analysis/CostModel/X86/reduce-fmin.ll | 111 + llvm/test/Analysis/CostModel/X86/reduce-mul.ll | 138 +- llvm/test/Analysis/CostModel/X86/reduce-or.ll | 227 +- llvm/test/Analysis/CostModel/X86/reduce-smax.ll | 155 +- llvm/test/Analysis/CostModel/X86/reduce-smin.ll | 155 +- llvm/test/Analysis/CostModel/X86/reduce-umax.ll | 155 +- llvm/test/Analysis/CostModel/X86/reduce-umin.ll | 155 +- llvm/test/Analysis/CostModel/X86/reduce-xor.ll | 199 +- llvm/test/Analysis/CostModel/X86/reduction.ll | 137 +- .../DivergenceAnalysis/AMDGPU/always_uniform.ll | 8 + llvm/test/Analysis/MemorySSA/scalable-vec.ll | 25 + llvm/test/Analysis/ScalarEvolution/pr44605.ll | 67 + .../known-bits-from-operator-constexpr.ll | 15 + .../Analysis/ValueTracking/known-signbit-shift.ll | 49 - .../Analysis/ValueTracking/knownnonzero-shift.ll | 6 +- .../CodeGen/AArch64/GlobalISel/arm64-fallback.ll | 16 +- .../GlobalISel/arm64-irtranslator-switch.ll | 124 +- .../AArch64/GlobalISel/arm64-irtranslator.ll | 27 +- .../GlobalISel/call-translator-tail-call.ll | 5 +- .../CodeGen/AArch64/GlobalISel/call-translator.ll | 3 +- .../AArch64/GlobalISel/irtranslator-exceptions.ll | 3 +- .../AArch64/GlobalISel/irtranslator-tbaa.ll | 4 +- .../GlobalISel/legalizer-info-validation.mir | 18 + .../AArch64/GlobalISel/localizer-arm64-tti.ll | 43 + .../prelegalizercombiner-binop-same-val.mir | 96 + .../GlobalISel/prelegalizercombiner-select.mir | 142 + .../prelegalizercombiner-trivial-arith.mir | 163 + .../GlobalISel/prelegalizercombiner-undef.mir | 226 + .../CodeGen/AArch64/GlobalISel/select-constant.mir | 14 + .../CodeGen/AArch64/GlobalISel/translate-gep.ll | 5 +- .../CodeGen/AArch64/dag-combine-trunc-build-vec.ll | 48 + .../CodeGen/AArch64/funclet-match-add-sub-stack.ll | 62 + llvm/test/CodeGen/AArch64/funnel-shift-rot.ll | 2 +- .../CodeGen/AArch64/machine-outliner-iterative.mir | 149 + llvm/test/CodeGen/AArch64/seh-finally.ll | 24 +- llvm/test/CodeGen/AArch64/speculation-hardening.ll | 2 +- llvm/test/CodeGen/AArch64/sve-fcmp.ll | 231 + llvm/test/CodeGen/AArch64/sve-int-log.ll | 210 +- ...e-intrinsics-gather-prefetches-scaled-offset.ll | 166 +- ...nsics-gather-prefetches-vect-base-imm-offset.ll | 64 +- ...ther-prefetches-vect-base-invalid-imm-offset.ll | 196 +- llvm/test/CodeGen/AArch64/sve-intrinsics-ldst1.ll | 182 + .../CodeGen/AArch64/sve-intrinsics-loads-ff.ll | 192 + .../CodeGen/AArch64/sve-intrinsics-loads-nf.ll | 273 + llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll | 42 +- .../AArch64/sve-intrinsics-shifts-merging.ll | 340 + llvm/test/CodeGen/AArch64/sve-intrinsics-stores.ll | 367 +- ...ed-non-temporal-ldst-addressing-mode-reg-imm.ll | 76 +- ...ed-non-temporal-ldst-addressing-mode-reg-reg.ll | 77 +- llvm/test/CodeGen/AArch64/wineh-try-catch-cbz.ll | 7 +- .../CodeGen/AArch64/wineh-try-catch-realign.ll | 2 +- llvm/test/CodeGen/AArch64/wineh-try-catch.ll | 14 +- .../CodeGen/AArch64/wineh-unwindhelp-via-fp.ll | 69 + .../CodeGen/AMDGPU/GlobalISel/combine-itofp.mir | 175 + .../AMDGPU/GlobalISel/divergent-control-flow.ll | 2 +- llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll | 612 ++ .../AMDGPU/GlobalISel/image_ls_mipmap_zero.a16.ll | 717 ++ .../AMDGPU/GlobalISel/image_ls_mipmap_zero.ll | 415 ++ .../CodeGen/AMDGPU/GlobalISel/insertelement.ll | 4 +- .../AMDGPU/GlobalISel/inst-select-frint.mir | 105 + .../CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir | 29 + .../GlobalISel/inst-select-insert-vector-elt.mir | 88 +- .../AMDGPU/GlobalISel/inst-select-load-local.mir | 278 +- .../AMDGPU/GlobalISel/inst-select-load-private.mir | 111 +- .../AMDGPU/GlobalISel/inst-select-pattern-add3.mir | 175 + .../GlobalISel/inst-select-pattern-and-or.mir | 176 + .../AMDGPU/GlobalISel/inst-select-store-local.mir | 224 +- .../GlobalISel/inst-select-store-private.mir | 383 +- .../GlobalISel/irtranslator-function-args.ll | 64 +- .../CodeGen/AMDGPU/GlobalISel/irtranslator-sat.ll | 318 + .../AMDGPU/GlobalISel/legalize-fmad.s16.mir | 80 +- .../AMDGPU/GlobalISel/legalize-fmad.s32.mir | 132 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir | 299 + .../AMDGPU/GlobalISel/legalize-implicit-def.mir | 104 + .../legalize-llvm.amdgcn.image.atomic.dim.a16.ll | 1209 ++++ .../legalize-llvm.amdgcn.image.dim.a16.ll | 3281 ++++++++++ .../legalize-llvm.amdgcn.image.load.2d.d16.ll | 1272 +++- .../legalize-llvm.amdgcn.image.load.2d.ll | 613 +- .../legalize-llvm.amdgcn.image.load.2darraymsaa.ll | 123 + .../legalize-llvm.amdgcn.image.load.3d.ll | 101 + .../legalize-llvm.amdgcn.image.store.2d.d16.ll | 30 +- .../legalize-sextload-constant-32bit.mir | 168 + .../CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir | 1851 +++++- .../AMDGPU/GlobalISel/legalize-unmerge-values.mir | 128 +- .../CodeGen/AMDGPU/GlobalISel/legalize-urem.mir | 1770 ++++- .../legalize-zextload-constant-32bit.mir | 170 + .../GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll | 1637 +++++ .../GlobalISel/llvm.amdgcn.image.atomic.dim.ll | 2107 ++++++ .../llvm.amdgcn.image.gather4.a16.dim.ll | 778 +++ .../GlobalISel/llvm.amdgcn.image.gather4.dim.ll | 812 +++ .../GlobalISel/llvm.amdgcn.image.gather4.o.dim.ll | 564 ++ .../GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll | 301 + .../GlobalISel/llvm.amdgcn.image.getresinfo.ll | 418 ++ .../GlobalISel/llvm.amdgcn.image.load.1d.d16.ll | 824 +++ .../AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll | 746 +++ .../AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll | 133 + .../llvm.amdgcn.image.load.2darraymsaa.a16.ll | 159 + .../llvm.amdgcn.image.load.2darraymsaa.ll | 133 + .../GlobalISel/llvm.amdgcn.image.load.3d.a16.ll | 159 + .../AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll | 133 + .../llvm.amdgcn.image.sample.ltolz.a16.ll | 577 ++ .../GlobalISel/llvm.amdgcn.image.sample.ltolz.ll | 293 + .../GlobalISel/llvm.amdgcn.image.store.2d.d16.ll | 118 + .../GlobalISel/llvm.amdgcn.image.store.2d.ll | 451 ++ llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll | 20 +- .../regbankselect-amdgcn.image.load.1d.ll | 16 +- .../regbankselect-amdgcn.image.sample.1d.ll | 22 +- .../AMDGPU/GlobalISel/regbankselect-fshr.mir | 152 + llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll | 3456 ++++++++++ llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll | 3427 ++++++++++ llvm/test/CodeGen/AMDGPU/addrspacecast.ll | 4 +- .../CodeGen/AMDGPU/amdgcn-load-offset-from-reg.ll | 62 + llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll | 30 + llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll | 20 +- llvm/test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll | 4 +- llvm/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll | 4 +- .../AMDGPU/at-least-one-def-value-assert.mir | 2 +- .../CodeGen/AMDGPU/atomic_optimizations_buffer.ll | 22 +- .../AMDGPU/atomic_optimizations_global_pointer.ll | 50 +- .../AMDGPU/atomic_optimizations_local_pointer.ll | 683 +- .../AMDGPU/atomic_optimizations_pixelshader.ll | 34 +- .../AMDGPU/atomic_optimizations_raw_buffer.ll | 22 +- .../AMDGPU/atomic_optimizations_struct_buffer.ll | 22 +- .../attr-amdgpu-flat-work-group-size-vgpr-limit.ll | 559 ++ llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll | 10 +- llvm/test/CodeGen/AMDGPU/bypass-div.ll | 36 +- llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll | 350 - llvm/test/CodeGen/AMDGPU/call-argument-types.ll | 74 +- llvm/test/CodeGen/AMDGPU/call-constant.ll | 6 +- .../CodeGen/AMDGPU/call-graph-register-usage.ll | 18 +- .../CodeGen/AMDGPU/call-preserved-registers.ll | 45 +- llvm/test/CodeGen/AMDGPU/call-waitcnt.ll | 37 +- llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll | 94 +- .../AMDGPU/callee-special-input-sgprs-fixed-abi.ll | 3 +- .../CodeGen/AMDGPU/callee-special-input-sgprs.ll | 44 +- .../CodeGen/AMDGPU/callee-special-input-vgprs.ll | 50 +- llvm/test/CodeGen/AMDGPU/captured-frame-index.ll | 36 +- llvm/test/CodeGen/AMDGPU/cc-update.ll | 422 ++ llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll | 12 +- llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll | 28 +- llvm/test/CodeGen/AMDGPU/collapse-endcf.ll | 2 +- .../CodeGen/AMDGPU/control-flow-fastregalloc.ll | 64 +- .../AMDGPU/cross-block-use-is-not-abi-copy.ll | 38 +- llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 380 +- llvm/test/CodeGen/AMDGPU/extload-private.ll | 8 +- .../AMDGPU/fast-unaligned-load-store.private.ll | 77 +- llvm/test/CodeGen/AMDGPU/fma-combine.ll | 9 +- llvm/test/CodeGen/AMDGPU/fold-fi-mubuf.mir | 197 +- .../test/CodeGen/AMDGPU/frame-index-elimination.ll | 73 +- .../AMDGPU/frame-lowering-entry-all-sgpr-used.mir | 1 - .../CodeGen/AMDGPU/frame-lowering-fp-adjusted.mir | 3 +- llvm/test/CodeGen/AMDGPU/fshr.ll | 870 ++- llvm/test/CodeGen/AMDGPU/function-returns.ll | 202 +- .../AMDGPU/hsa-metadata-kernel-code-props-v3.ll | 8 +- .../AMDGPU/hsa-metadata-kernel-code-props.ll | 6 +- llvm/test/CodeGen/AMDGPU/idot8s.ll | 2277 +++---- llvm/test/CodeGen/AMDGPU/idot8u.ll | 2572 ++++---- .../CodeGen/AMDGPU/indirect-addressing-term.ll | 104 +- llvm/test/CodeGen/AMDGPU/indirect-call.ll | 203 + llvm/test/CodeGen/AMDGPU/inline-attr.ll | 4 +- llvm/test/CodeGen/AMDGPU/insert-skip-from-vcc.mir | 4 +- llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 48 +- llvm/test/CodeGen/AMDGPU/ipra-regmask.ll | 6 +- llvm/test/CodeGen/AMDGPU/ipra.ll | 2 +- llvm/test/CodeGen/AMDGPU/large-alloca-compute.ll | 4 +- llvm/test/CodeGen/AMDGPU/large-alloca-graphics.ll | 42 +- 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.../CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll | 341 +- .../CodeGen/AMDGPU/pei-reg-scavenger-position.mir | 14 +- .../CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir | 23 +- .../test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir | 7 +- llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir | 3 - .../CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir | 60 + llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir | 12 +- llvm/test/CodeGen/AMDGPU/postra-machine-sink.mir | 2 +- .../CodeGen/AMDGPU/private-access-no-objects.ll | 14 +- llvm/test/CodeGen/AMDGPU/private-element-size.ll | 224 +- .../CodeGen/AMDGPU/propagate-attributes-clone.ll | 79 +- .../rename-independent-subregs-mac-operands.mir | 2 - ...hed-assert-dead-def-subreg-use-other-subreg.mir | 1 - ...d-handleMoveUp-subreg-def-across-subreg-def.mir | 1 - llvm/test/CodeGen/AMDGPU/scratch-buffer.ll | 14 +- llvm/test/CodeGen/AMDGPU/scratch-simple.ll | 49 +- llvm/test/CodeGen/AMDGPU/sdiv64.ll | 14 +- .../CodeGen/AMDGPU/sext-divergence-driven-isel.ll | 91 + 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llvm/test/CodeGen/AMDGPU/subvector-test.mir | 1 - llvm/test/CodeGen/AMDGPU/udiv64.ll | 12 +- llvm/test/CodeGen/AMDGPU/update-phi.ll | 2 - llvm/test/CodeGen/AMDGPU/urem64.ll | 10 +- .../AMDGPU/vgpr-spill-emergency-stack-slot.ll | 6 +- .../AMDGPU/virtregrewrite-undef-identity-copy.mir | 1 - llvm/test/CodeGen/AMDGPU/wave32.ll | 6 +- llvm/test/CodeGen/AMDGPU/wqm.ll | 4 +- llvm/test/CodeGen/AMDGPU/wqm.mir | 35 + llvm/test/CodeGen/AMDGPU/wwm-reserved.ll | 8 +- llvm/test/CodeGen/ARM/O3-pipeline.ll | 6 +- llvm/test/CodeGen/ARM/acle-intrinsics-v5.ll | 2 +- llvm/test/CodeGen/ARM/freeze-soften.ll | 16 + llvm/test/CodeGen/ARM/indvar-cost.ll | 514 ++ llvm/test/CodeGen/ARM/indvar-unroll-imm-cost.ll | 578 ++ .../CodeGen/ARM/ipra-extra-spills-exceptions.ll | 149 + llvm/test/CodeGen/ARM/ipra-extra-spills.ll | 406 ++ llvm/test/CodeGen/ARM/qdadd.ll | 8 +- llvm/test/CodeGen/AVR/interrupts.ll | 35 + llvm/test/CodeGen/BPF/i128.ll | 67 + llvm/test/CodeGen/Generic/csw-debug-assert.ll | 64 + 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+ llvm/test/CodeGen/Thumb2/ifcvt-minsize.ll | 13 +- llvm/test/CodeGen/Thumb2/mve-float16regloops.ll | 1468 +++++ llvm/test/CodeGen/Thumb2/mve-float32regloops.ll | 1424 ++++ llvm/test/CodeGen/Thumb2/mve-fmas.ll | 10 +- llvm/test/CodeGen/Thumb2/mve-gather-ptrs.ll | 10 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/dup.ll | 8 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/ternary.ll | 689 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vaddq.ll | 8 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vaddv.ll | 416 ++ llvm/test/CodeGen/Thumb2/mve-intrinsics/vminvq.ll | 849 ++- llvm/test/CodeGen/Thumb2/mve-intrinsics/vmulq.ll | 6 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmlad.ll | 589 ++ llvm/test/CodeGen/Thumb2/mve-intrinsics/vsubq.ll | 8 +- llvm/test/CodeGen/Thumb2/mve-masked-ldst.ll | 74 +- llvm/test/CodeGen/Thumb2/mve-postinc-lsr.ll | 16 +- llvm/test/CodeGen/Thumb2/mve-pred-not.ll | 76 +- llvm/test/CodeGen/Thumb2/mve-pred-threshold.ll | 116 +- llvm/test/CodeGen/Thumb2/mve-sext.ll | 10 +- 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+- llvm/test/CodeGen/X86/vector-reduce-umin.ll | 422 +- llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll | 98 +- llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll | 79 +- llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll | 17 +- llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll | 164 + llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll | 96 + llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll | 114 +- llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 37 +- llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll | 52 + llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll | 88 + llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll | 187 +- .../CodeGen/X86/vector-shuffle-combining-avx2.ll | 45 +- .../X86/vector-shuffle-combining-avx512bw.ll | 30 + llvm/test/CodeGen/X86/vector-shuffle-v1.ll | 10 +- llvm/test/CodeGen/X86/vector-trunc-math.ll | 264 +- llvm/test/CodeGen/X86/vector-trunc-packus.ll | 40 +- llvm/test/CodeGen/X86/vector-trunc-ssat.ll | 38 +- llvm/test/CodeGen/X86/vector-trunc-usat.ll | 26 +- llvm/test/CodeGen/X86/vector-trunc.ll | 289 +- llvm/test/CodeGen/X86/win64-eh-empty-block-2.mir | 223 + llvm/test/CodeGen/X86/win64-eh-empty-block.ll | 2 +- llvm/test/CodeGen/X86/wineh-coreclr.ll | 8 +- llvm/test/CodeGen/X86/x86-interleaved-access.ll | 142 +- .../AArch64/dbgcall-site-float-entry-value.ll | 49 + llvm/test/DebugInfo/AMDGPU/print-reg-name.s | 12 +- llvm/test/DebugInfo/AMDGPU/register-mapping.s | 37 - llvm/test/DebugInfo/AMDGPU/variable-locations.ll | 2 +- llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir | 6 + .../MIR/AArch64/dbgcall-site-orr-moves.mir | 2 +- .../DebugInfo/MIR/ARM/call-site-info-vmovd.mir | 2 +- .../DebugInfo/MIR/ARM/call-site-info-vmovs.mir | 2 +- .../MIR/ARM/dbgcall-site-propagated-value.mir | 6 +- llvm/test/DebugInfo/MIR/ARM/larger-subregister.mir | 3 + .../test/DebugInfo/MIR/ARM/param-reg-const-mix.mir | 4 +- .../DebugInfo/MIR/ARM/subregister-full-piece.mir | 4 + .../dbgcall-site-instr-before-bundled-call.mir | 4 +- .../live-debug-values-bundled-entry-values.mir | 2 + llvm/test/DebugInfo/MIR/SystemZ/call-site-lzer.mir | 2 + llvm/test/DebugInfo/MIR/X86/DW_OP_entry_value.mir | 2 +- .../MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir | 29 +- .../DebugInfo/MIR/X86/callsite-stack-value.mir | 68 + .../MIR/X86/dbgcall-site-copy-super-sub.mir | 2 +- .../MIR/X86/dbgcall-site-interpretation.mir | 2 +- .../MIR/X86/dbgcall-site-lea-interpretation.mir | 2 +- .../MIR/X86/dbgcall-site-partial-describe.mir | 2 +- .../DebugInfo/MIR/X86/dbgcall-site-reference.mir | 2 +- .../DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir | 2 +- .../MIR/X86/dbgcall-site-two-fwd-reg-defs.mir | 2 +- llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir | 2 +- .../DebugInfo/MIR/X86/debug-call-site-param.mir | 4 +- .../MIR/X86/entry-value-of-modified-param.mir | 7 +- .../DebugInfo/MIR/X86/entry-values-diamond-bbs.mir | 2 +- .../MIR/X86/propagate-entry-value-cross-bbs.mir | 11 +- .../MIR/X86/unreachable-block-call-site.mir | 2 +- llvm/test/DebugInfo/X86/arange.ll | 1 - llvm/test/DebugInfo/X86/arguments.ll | 1 - llvm/test/DebugInfo/X86/c-type-units.ll | 1 - llvm/test/DebugInfo/X86/dbg-value-range.ll | 2 +- .../DebugInfo/X86/dbg-value-regmask-clobber.ll | 6 +- .../test/DebugInfo/X86/dbgcall-site-64-bit-imms.ll | 2 +- .../DebugInfo/X86/dbgcall-site-zero-valued-imms.ll | 2 +- .../X86/dead-store-elimination-marks-undef.ll | 36 + llvm/test/DebugInfo/X86/debug-loc-frame.ll | 1 - llvm/test/DebugInfo/X86/debug-names-ir-disabled.ll | 1 - llvm/test/DebugInfo/X86/debug-names-partial.ll | 1 - llvm/test/DebugInfo/X86/debug-names-split-dwarf.ll | 1 - llvm/test/DebugInfo/X86/decl-derived-member.ll | 1 - .../DebugInfo/X86/dwarf-callsite-related-attrs.ll | 4 +- llvm/test/DebugInfo/X86/generate-odr-hash.ll | 1 - llvm/test/DebugInfo/X86/ghost-sdnode-dbgvalues.ll | 1 - llvm/test/DebugInfo/X86/inline-member-function.ll | 1 - .../X86/instcombine-demanded-bits-salvage.ll | 38 + llvm/test/DebugInfo/X86/lexical_block.ll | 1 - llvm/test/DebugInfo/X86/loclists-dwp.ll | 6 +- llvm/test/DebugInfo/X86/missing-file-line.ll | 1 - llvm/test/DebugInfo/X86/no-entry-values-with-O0.ll | 88 + llvm/test/DebugInfo/X86/nodebug.ll | 1 - llvm/test/DebugInfo/X86/nodebug_with_debug_loc.ll | 1 - llvm/test/DebugInfo/X86/parameters.ll | 1 - llvm/test/DebugInfo/X86/pr45181.ll | 306 + llvm/test/DebugInfo/X86/rematerialize.ll | 1 - .../DebugInfo/X86/string-offsets-multiple-cus.ll | 1 - .../DebugInfo/X86/string-offsets-table-order.ll | 1 - llvm/test/DebugInfo/X86/string-offsets-table.ll | 1 - llvm/test/DebugInfo/X86/template.ll | 1 - llvm/test/DebugInfo/X86/tu-to-non-named-type.ll | 1 - .../DebugInfo/X86/type_units_with_addresses.ll | 1 - .../OrcLazy/Inputs/bar-return-i32-call-foo.ll | 8 + ...{basic-object-source.ll => foo-return-i32-0.ll} | 0 .../OrcLazy/basic-object-file-loading.ll | 2 +- .../OrcLazy/static-library-support.ll | 12 +- .../ExecutionEngine/OrcMCJIT/test-global-ctors.ll | 4 +- .../test/FileCheck/numeric-defines-diagnostics.txt | 1 + llvm/test/FileCheck/numeric-expression.txt | 4 + llvm/test/IR/assume-builder.ll | 258 + llvm/test/LTO/Resolution/X86/not-prevailing.ll | 4 +- llvm/test/MC/AArch64/SVE/bfcvt-diagnostics.s | 27 + llvm/test/MC/AArch64/SVE/bfcvt.s | 29 + llvm/test/MC/AArch64/SVE/bfcvtnt-diagnostics.s | 27 + llvm/test/MC/AArch64/SVE/bfcvtnt.s | 29 + llvm/test/MC/AArch64/SVE/bfdot-diagnostics.s | 53 + llvm/test/MC/AArch64/SVE/bfdot.s | 52 + llvm/test/MC/AArch64/SVE/bfmlal-diagnostics.s | 42 + llvm/test/MC/AArch64/SVE/bfmlal.s | 157 + llvm/test/MC/AArch64/SVE/bfmmla-diagnostics.s | 22 + llvm/test/MC/AArch64/SVE/bfmmla.s | 22 + llvm/test/MC/AArch64/armv8.6a-bf16.s | 115 + llvm/test/MC/AArch64/reloc-directive-err.s | 6 + llvm/test/MC/AArch64/reloc-directive.s | 10 + llvm/test/MC/ARM/arm-memory-instructions.s | 6 + llvm/test/MC/ARM/bfloat16-a32-errors.s | 57 + llvm/test/MC/ARM/bfloat16-a32-errors2.s | 134 + llvm/test/MC/ARM/bfloat16-a32.s | 55 + llvm/test/MC/ARM/bfloat16-t32-errors.s | 32 + llvm/test/MC/ARM/bfloat16-t32.s | 15 + llvm/test/MC/ARM/reloc-directive-err.s | 6 + llvm/test/MC/ARM/reloc-directive.s | 10 + llvm/test/MC/COFF/cv-inline-linetable-unlikely.s | 4 +- llvm/test/MC/COFF/cv-loc-unreachable-2.s | 4 +- llvm/test/MC/COFF/cv-loc-unreachable.s | 4 +- .../test/MC/Disassembler/AArch64/armv8.6a-bf16.txt | 74 + llvm/test/MC/Disassembler/ARM/bfloat16-a32_1.txt | 102 + llvm/test/MC/Disassembler/ARM/bfloat16-a32_2.txt | 20 + llvm/test/MC/Disassembler/ARM/bfloat16-t32.txt | 25 + .../MC/Disassembler/ARM/bfloat16-t32_errors.txt | 40 + .../PowerPC/ppc64-encoding-bookIII.txt | 18 +- llvm/test/MC/Disassembler/X86/x86-16.txt | 3 + llvm/test/MC/Disassembler/X86/x86-32.txt | 3 + llvm/test/MC/Disassembler/X86/x86-64.txt | 3 + llvm/test/MC/Mips/cpadd-bad.s | 13 + llvm/test/MC/Mips/cpadd.s | 29 + llvm/test/MC/Mips/macro-sle.s | 31 + llvm/test/MC/Mips/macro-sle64.s | 29 + llvm/test/MC/Mips/macro-sne.s | 27 + llvm/test/MC/Mips/mips3d/valid.s | 7 + .../MC/Mips/mips64r6/invalid-mips5-wrong-error.s | 1 - llvm/test/MC/Mips/mips64r6/invalid-mips5.s | 2 + llvm/test/MC/PowerPC/ppc32-reloc-directive.s | 9 + llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s | 36 +- llvm/test/MC/PowerPC/ppc64-encoding-ext.s | 36 +- llvm/test/MC/PowerPC/ppc64-prefix-align.s | 8 +- llvm/test/MC/PowerPC/ppc64-reloc-directive.s | 9 + llvm/test/MC/RISCV/attribute-arch.s | 37 + llvm/test/MC/RISCV/attribute-with-insts.s | 34 + llvm/test/MC/RISCV/attribute-with-option.s | 21 + llvm/test/MC/RISCV/attribute.s | 22 + llvm/test/MC/RISCV/invalid-attribute.s | 31 + llvm/test/MC/SystemZ/insn-bad-z13.s | 48 - llvm/test/MC/SystemZ/insn-bad-z14.s | 18 - llvm/test/MC/SystemZ/insn-bad-z196.s | 12 - llvm/test/MC/SystemZ/insn-bad-zEC12.s | 12 - llvm/test/MC/SystemZ/insn-bad.s | 221 - llvm/test/MC/SystemZ/insn-good.s | 52 +- llvm/test/MC/SystemZ/regs-bad.s | 17 - llvm/test/MC/SystemZ/tokens.s | 9 - llvm/test/MC/WebAssembly/simd-encodings.s | 18 + .../X86/AlignedBundling/misaligned-bundle-group.s | 4 +- .../MC/X86/AlignedBundling/single-inst-bundling.s | 4 +- llvm/test/MC/X86/align-branch-64-basic.s | 38 +- llvm/test/MC/X86/align-branch-64-pad-max-prefix.s | 18 + llvm/test/MC/X86/align-via-padding-corner.s | 29 + llvm/test/MC/X86/align-via-padding.s | 6 +- llvm/test/MC/X86/align-via-relaxation.s | 22 +- llvm/test/MC/X86/relax-offset.s | 13 + llvm/test/MC/X86/reloc-directive-elf-32.s | 9 + llvm/test/MC/X86/reloc-directive-elf-64.s | 9 + llvm/test/MC/X86/x86-16.s | 4 + llvm/test/MC/X86/x86-32-coverage.s | 4 + llvm/test/MC/X86/x86-64.s | 4 + llvm/test/MC/X86/x86-branch-relaxation.s | 4 +- .../Object/AArch64/yaml2obj-elf-aarch64-rel.yaml | 1 - .../objdump-disassembly-inline-relocations.test | 8 +- llvm/test/Object/X86/objdump-trivial-object.test | 4 +- llvm/test/Object/obj2yaml.test | 17 +- llvm/test/Other/new-pm-cgprofile.ll | 11 + .../Other/opt-override-denormal-fp-math-f32.ll | 23 + .../Other/opt-override-denormal-fp-math-mixed.ll | 42 + llvm/test/Other/opt-override-denormal-fp-math.ll | 23 + llvm/test/TableGen/address-space-patfrags.td | 2 +- .../AlignmentFromAssumptions/amdgpu-crash.ll | 33 + .../ArgumentPromotion/2008-07-02-array-indexing.ll | 2 +- .../X86/min-legal-vector-width.ll | 80 +- .../Attributor/ArgumentPromotion/attrs.ll | 6 +- .../Attributor/ArgumentPromotion/byval-2.ll | 2 +- .../Attributor/ArgumentPromotion/chained.ll | 2 +- .../Attributor/ArgumentPromotion/musttail.ll | 10 +- .../Attributor/ArgumentPromotion/sret.ll | 2 +- .../Attributor/IPConstantProp/musttail-call.ll | 7 +- llvm/test/Transforms/Attributor/align.ll | 17 + llvm/test/Transforms/Attributor/callbacks.ll | 16 +- .../Transforms/Attributor/dereferenceable-1.ll | 88 +- .../Transforms/Attributor/dereferenceable-2.ll | 34 +- llvm/test/Transforms/Attributor/heap_to_stack.ll | 34 +- llvm/test/Transforms/Attributor/misc.ll | 4 +- llvm/test/Transforms/Attributor/nofree.ll | 58 + llvm/test/Transforms/Attributor/nonnull.ll | 40 +- llvm/test/Transforms/Attributor/range.ll | 379 +- llvm/test/Transforms/Attributor/readattrs.ll | 4 +- llvm/test/Transforms/Attributor/value-simplify.ll | 7 +- .../CallSiteSplitting/callsite-split-or-phi.ll | 34 + .../CodeGenPrepare/X86/extend-sink-hoist.ll | 2 - .../Transforms/CodeGenPrepare/X86/freeze-brcond.ll | 323 + .../Transforms/CodeGenPrepare/X86/freeze-cmp.ll | 109 - .../CodeGenPrepare/X86/optimizeSelect-DT.ll | 5 +- .../CodeGenPrepare/X86/tailcall-assume-xbb.ll | 48 + llvm/test/Transforms/Coroutines/ArgAddr.ll | 4 +- .../Coroutines/coro-alloc-with-param-O0.ll | 4 +- .../Coroutines/coro-alloc-with-param-O2.ll | 4 +- .../test/Transforms/Coroutines/coro-catchswitch.ll | 2 +- llvm/test/Transforms/Coroutines/coro-debug.ll | 6 +- .../Coroutines/coro-eh-aware-edge-split-01.ll | 4 +- .../Coroutines/coro-eh-aware-edge-split-02.ll | 4 +- .../Coroutines/coro-frame-arrayalloca.ll | 14 +- llvm/test/Transforms/Coroutines/coro-frame.ll | 8 +- llvm/test/Transforms/Coroutines/coro-heap-elide.ll | 10 +- .../test/Transforms/Coroutines/coro-materialize.ll | 2 +- llvm/test/Transforms/Coroutines/coro-padding.ll | 12 +- llvm/test/Transforms/Coroutines/coro-param-copy.ll | 6 +- .../Transforms/Coroutines/coro-retcon-alloca.ll | 31 +- .../Coroutines/coro-retcon-once-value.ll | 4 +- .../Coroutines/coro-retcon-once-value2.ll | 2 +- .../Coroutines/coro-retcon-resume-values.ll | 2 +- .../Coroutines/coro-retcon-resume-values2.ll | 6 +- .../Transforms/Coroutines/coro-retcon-value.ll | 2 +- llvm/test/Transforms/Coroutines/coro-retcon.ll | 2 +- .../Transforms/Coroutines/coro-spill-after-phi.ll | 6 +- .../Transforms/Coroutines/coro-spill-corobegin.ll | 6 +- llvm/test/Transforms/Coroutines/coro-split-02.ll | 10 + .../Transforms/Coroutines/coro-split-musttail2.ll | 68 + .../Transforms/Coroutines/coro-split-musttail3.ll | 101 + llvm/test/Transforms/Coroutines/coro-swifterror.ll | 4 +- llvm/test/Transforms/Coroutines/ex0.ll | 4 +- llvm/test/Transforms/Coroutines/ex1.ll | 4 +- llvm/test/Transforms/Coroutines/ex5.ll | 4 +- llvm/test/Transforms/Coroutines/no-suspend.ll | 52 + .../merge-range-and-undef.ll | 92 +- .../Transforms/CorrelatedValuePropagation/range.ll | 31 +- .../MSSA/memset-unknown-sizes.ll | 71 + .../MSSA/multiblock-exceptions.ll | 1 - .../DeadStoreElimination/MSSA/multiblock-loops.ll | 39 +- .../MSSA/multiblock-memoryphis.ll | 41 +- .../MSSA/multiblock-multipath.ll | 76 + .../MSSA/multiblock-overlap.ll | 112 + .../DeadStoreElimination/MSSA/multiblock-simple.ll | 105 +- .../test/Transforms/DeadStoreElimination/simple.ll | 13 + .../DivRemPairs/PowerPC/div-expanded-rem-pair.ll | 16 +- .../DivRemPairs/PowerPC/div-rem-pairs.ll | 72 +- .../Transforms/DivRemPairs/X86/div-rem-pairs.ll | 8 +- llvm/test/Transforms/EarlyCSE/guards.ll | 361 +- llvm/test/Transforms/EarlyCSE/invariant-loads.ll | 174 +- llvm/test/Transforms/EarlyCSE/invariant.start.ll | 345 +- llvm/test/Transforms/ExpandMemCmp/X86/memcmp.ll | 184 +- llvm/test/Transforms/GVN/PRE/volatile.ll | 143 +- llvm/test/Transforms/GVN/malloc-load-removal.ll | 25 + llvm/test/Transforms/GVNSink/indirect-call.ll | 24 + llvm/test/Transforms/GVNSink/sink-common-code.ll | 67 + .../GlobalOpt/null-check-is-use-pr35760.ll | 41 + .../{ => X86}/2009-04-14-shorten_iv_vars.ll | 0 .../{ => X86}/2009-04-15-shorten-iv-vars-2.ll | 0 .../{ => X86}/2011-11-15-multiexit.ll | 0 .../{ => X86}/deterministic-scev-verify.ll | 0 .../IndVarSimplify/{ => X86}/eliminate-trunc.ll | 0 .../IndVarSimplify/{ => X86}/huge_muls.ll | 0 .../IndVarSimplify/{ => X86}/indvar-debug-value.ll | 0 .../{ => X86}/indvar-debug-value2.ll | 0 .../{ => X86}/inner-loop-by-latch-cond.ll | 0 .../IndVarSimplify/{ => X86}/inner-loop.ll | 0 .../IndVarSimplify/{ => X86}/iv-widen.ll | 0 .../IndVarSimplify}/X86/lit.local.cfg | 0 .../{ => X86}/loop-invariant-conditions.ll | 0 .../IndVarSimplify/{ => X86}/loop_evaluate10.ll | 0 .../{ => X86}/overflow-intrinsics.ll | 0 .../IndVarSimplify/{ => X86}/polynomial-expand.ll | 0 .../Transforms/IndVarSimplify/{ => X86}/pr24356.ll | 0 .../Transforms/IndVarSimplify/{ => X86}/pr24804.ll | 0 .../Transforms/IndVarSimplify/{ => X86}/pr24956.ll | 0 .../Transforms/IndVarSimplify/{ => X86}/pr25047.ll | 0 .../Transforms/IndVarSimplify/{ => X86}/pr25051.ll | 0 .../Transforms/IndVarSimplify/{ => X86}/pr25360.ll | 0 .../Transforms/IndVarSimplify/{ => X86}/pr25421.ll | 0 .../Transforms/IndVarSimplify/{ => X86}/pr25576.ll | 0 .../Transforms/IndVarSimplify/{ => X86}/pr26973.ll | 0 .../Transforms/IndVarSimplify/{ => X86}/pr27133.ll | 0 .../Transforms/IndVarSimplify/{ => X86}/pr28935.ll | 0 .../Transforms/IndVarSimplify/{ => X86}/pr35406.ll | 0 .../{ => X86}/replace-iv-with-loop-invariant.ll | 0 .../{ => X86}/scev-phi-debug-info.ll | 0 .../Transforms/IndVarSimplify/{ => X86}/uglygep.ll | 0 .../{ => X86}/variable-stride-ivs-1.ll | 0 .../IndVarSimplify/{ => X86}/verify-scev.ll | 0 .../IndVarSimplify/{ => X86}/widen-nsw.ll | 0 .../InstCombine/AMDGPU/amdgcn-intrinsics.ll | 59 + llvm/test/Transforms/InstCombine/ExtractCast.ll | 36 +- llvm/test/Transforms/InstCombine/X86/x86-sse.ll | 83 + llvm/test/Transforms/InstCombine/X86/x86-sse2.ll | 159 +- llvm/test/Transforms/InstCombine/X86/x86-sse41.ll | 26 + .../InstCombine/X86/x86-vector-shifts.ll | 347 + llvm/test/Transforms/InstCombine/add.ll | 126 + .../Transforms/InstCombine/adjust-for-minmax.ll | 96 +- llvm/test/Transforms/InstCombine/align-attr.ll | 2 +- llvm/test/Transforms/InstCombine/all-bits-shift.ll | 3 +- llvm/test/Transforms/InstCombine/assume.ll | 153 +- llvm/test/Transforms/InstCombine/call-returned.ll | 50 + llvm/test/Transforms/InstCombine/ctpop-cttz.ll | 91 + .../test/Transforms/InstCombine/deref-alloc-fns.ll | 27 +- .../Transforms/InstCombine/expensive-combines.ll | 28 - .../test/Transforms/InstCombine/fortify-folding.ll | 4 +- llvm/test/Transforms/InstCombine/gep-vector.ll | 21 + llvm/test/Transforms/InstCombine/gepphigep.ll | 2 +- llvm/test/Transforms/InstCombine/icmp.ll | 91 + llvm/test/Transforms/InstCombine/known-bits.ll | 3 +- .../Transforms/InstCombine/known-signbit-shift.ll | 49 + .../Transforms/InstCombine/limit-max-iterations.ll | 67 +- .../Transforms/InstCombine/malloc-free-delete.ll | 11 + .../InstCombine/out-of-bounds-indexes.ll | 32 +- llvm/test/Transforms/InstCombine/phi-shifts.ll | 25 +- .../InstCombine/pr33689_same_bitwidth.ll | 6 +- llvm/test/Transforms/InstCombine/pr44541.ll | 2 +- llvm/test/Transforms/InstCombine/select.ll | 23 + llvm/test/Transforms/InstCombine/select_meta.ll | 6 +- llvm/test/Transforms/InstCombine/shuffle-cast.ll | 56 + .../Transforms/InstCombine/shufflevec-bitcast.ll | 100 +- llvm/test/Transforms/InstCombine/strcpy_chk-1.ll | 2 +- llvm/test/Transforms/InstCombine/strncpy_chk-1.ll | 2 +- .../Transforms/InstCombine/sub-of-negatible.ll | 52 +- .../Transforms/InstCombine/trunc-extractelement.ll | 178 + llvm/test/Transforms/InstCombine/unused-nonnull.ll | 9 +- llvm/test/Transforms/InstCombine/vector-xor.ll | 2 +- llvm/test/Transforms/InstCombine/vscale_alloca.ll | 37 + .../InstCombine/xor-of-icmps-with-extra-uses.ll | 2 +- llvm/test/Transforms/InstSimplify/add-mask.ll | 79 +- llvm/test/Transforms/InstSimplify/assume.ll | 6 +- llvm/test/Transforms/InstSimplify/bitreverse.ll | 51 +- llvm/test/Transforms/InstSimplify/bswap.ll | 57 +- llvm/test/Transforms/InstSimplify/call.ll | 4 + llvm/test/Transforms/InstSimplify/compare.ll | 119 +- .../InstSimplify/constfold-constrained.ll | 244 + llvm/test/Transforms/InstSimplify/freeze.ll | 323 + llvm/test/Transforms/InstSimplify/or.ll | 108 +- .../Transforms/InstSimplify/shift-knownbits.ll | 44 +- llvm/test/Transforms/InstSimplify/vscale.ll | 10 + .../JumpThreading/PR44611-across-header-hang.ll | 22 + llvm/test/Transforms/JumpThreading/is_constant.ll | 40 + .../Transforms/JumpThreading/select-unfold-msan.ll | 28 + llvm/test/Transforms/JumpThreading/select.ll | 28 + .../LoadStoreVectorizer/AMDGPU/merge-stores.ll | 2 +- .../AMDGPU/vect-ptr-ptr-size-mismatch.ll | 4 +- .../PowerPC/p8-unrolling-legalize-vectors.ll | 198 +- llvm/test/Transforms/LoopVectorize/pr45259.ll | 36 + .../Transforms/LowerMatrixIntrinsics/const-gep.ll | 85 + .../MemCpyOpt/store-to-memset-is-nonzero-type.ll | 73 + llvm/test/Transforms/MemCpyOpt/vscale-memset.ll | 115 + llvm/test/Transforms/NewGVN/malloc-load-removal.ll | 25 + llvm/test/Transforms/OpenMP/add_attributes.ll | 145 +- llvm/test/Transforms/OpenMP/parallel_deletion.ll | 4 +- llvm/test/Transforms/OpenMP/rtf_type_checking.ll | 63 + .../PGOProfile/thinlto_samplepgo_icp3.ll | 11 +- llvm/test/Transforms/PhaseOrdering/vector-trunc.ll | 24 + llvm/test/Transforms/Reassociate/cse-pairs.ll | 83 + llvm/test/Transforms/SCCP/apint-xor.ll | 39 + .../SCCP/binaryops-range-special-cases.ll | 97 + llvm/test/Transforms/SCCP/conditions-iter-order.ll | 79 + .../SCCP/conditions-ranges-with-undef.ll | 272 + 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+ mlir/include/mlir/Dialect/Affine/EDSC/Builders.h | 206 + mlir/include/mlir/Dialect/Affine/EDSC/Intrinsics.h | 32 + mlir/include/mlir/Dialect/Affine/IR/AffineOps.h | 624 ++ mlir/include/mlir/Dialect/Affine/IR/AffineOps.td | 608 ++ .../{AffineOps => Affine/IR}/AffineOpsBase.td | 0 .../mlir/Dialect/Affine/IR/AffineValueMap.h | 90 + mlir/include/mlir/Dialect/Affine/IR/CMakeLists.txt | 2 + mlir/include/mlir/Dialect/Affine/Passes.h | 79 + mlir/include/mlir/Dialect/Affine/Passes.td | 70 + mlir/include/mlir/Dialect/AffineOps/AffineOps.h | 624 -- mlir/include/mlir/Dialect/AffineOps/AffineOps.td | 510 -- .../mlir/Dialect/AffineOps/AffineValueMap.h | 90 - mlir/include/mlir/Dialect/AffineOps/CMakeLists.txt | 1 - .../include/mlir/Dialect/AffineOps/EDSC/Builders.h | 206 - .../mlir/Dialect/AffineOps/EDSC/Intrinsics.h | 32 - mlir/include/mlir/Dialect/CMakeLists.txt | 7 +- .../include/mlir/Dialect/FxpMathOps/CMakeLists.txt | 9 +- mlir/include/mlir/Dialect/FxpMathOps/FxpMathOps.td | 2 +- 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4 years, 7 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-Os updated (28b4928b1b -> a9d42c09a3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-Os in repository toolchain/ci/glibc. from 28b4928b1b Fix nscd/cachedumper.c compile errors adds cbd1569904 nscd/cachedumper.c : fix whitespace adds 49348beafe Fix build with GCC 10 when long double = double. adds 1fabdb9908 x86: Remove ARCH_CET_LEGACY_BITMAP [BZ #25397] adds 649fdf039b oc_FR locale: Fix spelling of Thursday (bug 25639) adds 4bad2e014e m68k: Remove mathinline.h adds a2ce37b564 math: Remove mathinline adds a8ce822234 Remove __LIBC_INTERNAL_MATH_INLINES adds 1c15464ca0 math: Remove inline math tests adds 39a05214fe Add NEWS entry for CVE-2020-1752 (bug 25414) adds 3cc4a8367c stdio: Remove memory leak from multibyte convertion [BZ#25691] adds 910a835dc9 stdio: Add tests for printf multibyte convertion leak [BZ#25691] adds b8de7980c0 Extended Char Intro: Use getwc in example (Bug 25626) adds 0334369949 y2038: fix: Add missing libc_hidden_def attribute for some s [...] adds f09542c584 posix: Fix system error return value [BZ #25715] adds 07d16a6deb Add NEWS entry for CVE-2020-1751 (bug 25423) adds 5fce0e095b support/shell-container.c: Return 127 if execve fails adds 5a5a3a3234 support/shell-container.c: Add builtin exit adds 1c17100c43 support/shell-container.c: Add builtin kill adds 4eda036f5b stdlib: Move tst-system to tests-container adds 45ae17dd7e ldbl-128ibm-compat: PLT redirects for using ldbl redirects i [...] adds d0d1811fb9 Fix tests which expose ldbl -> _Float128 redirects adds 076d06e849 powerpc64le: Ensure correct ldouble compiler flags are used adds 3618e5fece Makeconfig: sandwich gnulib-tests between libc/ld linking of tests adds 39517c008f powerpc64le: add -mno-gnu-attribute to *f128 objects and difftime adds 57651ee4c8 powerpc64: apply -mabi=ibmlongdouble to special files adds e8a0f5831e ARC: add definitions to elf/elf.h adds 4da2597af5 sysv/linux: Rename alpha functions to be alpha specific adds d1876749a8 time: Add a timeval with a 32-bit tv_sec and tv_usec adds 933dc0e570 time: Add a __itimerval64 struct adds 642d5abaf1 Add benchtests for roundeven and roundevenf. adds a1a486d70e Add Safe-Linking to fastbins and tcache adds e095db0bc6 hurd: Make O_TRUNC update mtime/ctime adds 5f34491510 math: Remove fenvinline.h adds 4a30b6109c x86: Remove feraiseexcept optimization adds ec07242c45 sparc: Move __fenv_{ld,st}fsr to fenv-private.h adds 1a044511a3 Fix data race in setting function descriptors during lazy bi [...] adds 66807aebad powerpc: Add support for fmaf128() in hardware adds acdcca7294 Add new file missed in previous hppa commit. adds 6b89dbc3ca Use Linux 5.6 and GMP 6.2.0 in build-many-glibcs.py. adds 768358b6a8 Typo fixes and CR cleanup in Safe-Linking adds 49c3c37651 Fix alignment bug in Safe-Linking adds a9d42c09a3 math: Add inputs that yield larger errors for float type (x86_64) No new revisions were added by this update. Summary of changes: Makeconfig | 12 +- NEWS | 6 + benchtests/Makefile | 6 +- benchtests/{trunc-inputs => roundeven-inputs} | 0 benchtests/{truncf-inputs => roundevenf-inputs} | 0 bits/fenvinline.h | 8 - bits/mathinline.h | 12 - elf/elf.h | 70 +- elf/tst-addr1.c | 11 + hurd/lookup-retry.c | 13 +- include/err.h | 12 +- include/libc-symbols.h | 2 + include/stdio.h | 52 +- include/sys/cdefs.h | 20 + include/sys/syslog.h | 2 +- include/time.h | 52 + include/wchar.h | 2 +- localedata/locales/oc_FR | 2 +- malloc/malloc.c | 79 +- manual/charset.texi | 2 +- math/Makefile | 164 +- math/README.libm-test | 33 +- math/auto-libm-test-in | 148 +- math/auto-libm-test-out-acosh | 826 +- math/auto-libm-test-out-asinh | 301 +- math/auto-libm-test-out-atanh | 1590 ++-- math/auto-libm-test-out-cos | 25 + math/auto-libm-test-out-cosh | 2269 ++--- math/auto-libm-test-out-erfc | 25 + math/auto-libm-test-out-exp | 25 + math/auto-libm-test-out-exp10 | 25 + math/auto-libm-test-out-hypot | 9442 ++++++++++---------- math/auto-libm-test-out-j0 | 25 + math/auto-libm-test-out-j1 | 25 + math/auto-libm-test-out-lgamma | 25 + math/auto-libm-test-out-sin | 25 + math/auto-libm-test-out-sinh | 1260 +-- math/auto-libm-test-out-tgamma | 25 + math/auto-libm-test-out-y0 | 25 + math/fenv.h | 4 - math/gen-auto-libm-tests.c | 8 +- math/gen-libm-test.py | 5 +- math/libm-test-asinh.inc | 4 +- math/libm-test-atanh.inc | 4 +- math/libm-test-cosh.inc | 4 +- math/libm-test-driver.c | 7 - math/libm-test-exp.inc | 4 +- math/libm-test-expm1.inc | 4 +- math/libm-test-hypot.inc | 32 +- math/libm-test-pow.inc | 118 +- math/libm-test-sinh.inc | 4 +- math/libm-test-support.c | 8 +- math/libm-test-support.h | 2 - math/libm-test-tanh.inc | 4 +- math/math.h | 6 - math/test-double-vlen2.h | 1 - math/test-double-vlen4.h | 1 - math/test-double-vlen8.h | 1 - math/test-double.h | 1 - math/test-fenvinline.c | 354 - math/test-float-vlen16.h | 1 - math/test-float-vlen4.h | 1 - math/test-float-vlen8.h | 1 - math/test-float.h | 1 - math/test-float128.h | 2 - math/test-float32.h | 1 - math/test-float32x.h | 1 - math/test-float64.h | 1 - math/test-float64x.h | 2 - math/test-ldouble.h | 3 - math/test-math-inline.h | 26 - math/test-math-no-inline.h | 23 - math/test-signgam-main.c | 1 - nscd/cachedumper.c | 8 +- scripts/build-many-glibcs.py | 4 +- stdio-common/Makefile | 9 +- stdio-common/tst-printf-bz25691.c | 108 + stdio-common/tst-vfprintf-user-type.c | 4 + stdio-common/vfprintf-internal.c | 324 +- stdlib/Makefile | 3 +- stdlib/tst-system.c | 124 +- support/shell-container.c | 40 +- sysdeps/aarch64/libm-test-ulps | 840 -- sysdeps/alpha/fpu/libm-test-ulps | 837 -- sysdeps/arm/libm-test-ulps | 552 -- sysdeps/csky/fpu/libm-test-ulps | 536 -- sysdeps/csky/nofpu/libm-test-ulps | 554 -- sysdeps/hppa/dl-fptr.c | 26 +- sysdeps/hppa/dl-machine.h | 36 +- sysdeps/hppa/dl-runtime.c | 58 + sysdeps/hppa/dl-trampoline.S | 74 +- sysdeps/hppa/fpu/libm-test-ulps | 586 -- sysdeps/i386/fpu/libm-test-ulps | 1095 --- sysdeps/i386/i686/fpu/multiarch/libm-test-ulps | 1121 +-- sysdeps/ia64/fpu/libm-test-ulps | 911 -- sysdeps/ieee754/ldbl-128ibm-compat/Makefile | 15 - .../ieee754/ldbl-128ibm-compat/ieee128-asprintf.c | 5 +- .../ieee754/ldbl-128ibm-compat/ieee128-dprintf.c | 1 + sysdeps/ieee754/ldbl-128ibm-compat/ieee128-err.c | 7 + .../ieee754/ldbl-128ibm-compat/ieee128-fprintf.c | 1 + .../ldbl-128ibm-compat/ieee128-isoc99_sscanf.c | 1 + .../ldbl-128ibm-compat/ieee128-isoc99_vfscanf.c | 2 + .../ldbl-128ibm-compat/ieee128-isoc99_vsscanf.c | 1 + .../ieee754/ldbl-128ibm-compat/ieee128-sprintf.c | 1 + .../ieee754/ldbl-128ibm-compat/ieee128-syslog.c | 1 + .../ieee754/ldbl-128ibm-compat/ieee128-vfprintf.c | 1 + .../ieee754/ldbl-128ibm/include/bits/iscanonical.h | 2 +- sysdeps/m68k/coldfire/fpu/libm-test-ulps | 68 - sysdeps/m68k/m680x0/fpu/bits/mathinline.h | 378 - sysdeps/m68k/m680x0/fpu/libm-test-ulps | 584 -- sysdeps/m68k/m680x0/fpu/mathimpl.h | 224 + sysdeps/m68k/m680x0/fpu/s_atan_template.c | 1 + sysdeps/m68k/m680x0/fpu/s_ceil_template.c | 1 + sysdeps/m68k/m680x0/fpu/s_fabs_template.c | 1 + sysdeps/m68k/m680x0/fpu/s_floor_template.c | 1 + sysdeps/m68k/m680x0/fpu/s_isinf.c | 1 + sysdeps/m68k/m680x0/fpu/s_log1p.c | 1 + sysdeps/m68k/m680x0/fpu/s_lrint_template.c | 1 + sysdeps/m68k/m680x0/fpu/s_nearbyint_template.c | 1 + sysdeps/m68k/m680x0/fpu/s_rint_template.c | 1 + sysdeps/m68k/m680x0/fpu/s_scalbn.c | 2 + sysdeps/m68k/m680x0/fpu/s_sincos_template.c | 1 + sysdeps/m68k/m680x0/fpu/s_tanh_template.c | 1 + sysdeps/m68k/m680x0/fpu/s_trunc_template.c | 1 + sysdeps/microblaze/libm-test-ulps | 124 - sysdeps/mips/mips32/libm-test-ulps | 552 -- sysdeps/mips/mips64/libm-test-ulps | 837 -- sysdeps/nios2/libm-test-ulps | 128 - sysdeps/posix/system.c | 18 +- sysdeps/powerpc/bits/fenvinline.h | 108 - sysdeps/powerpc/fpu/fegetround.c | 8 +- sysdeps/powerpc/fpu/fraiseexcpt.c | 1 - sysdeps/powerpc/fpu/libm-test-ulps | 1135 --- sysdeps/powerpc/nofpu/fraiseexcpt.c | 1 - sysdeps/powerpc/nofpu/libm-test-ulps | 862 -- sysdeps/powerpc/powerpc64/Makefile | 6 + sysdeps/powerpc/powerpc64/le/Makefile | 98 +- .../powerpc/powerpc64/le/fpu/multiarch/Makefile | 10 +- .../powerpc64/le/fpu/multiarch/s_fmaf128-power9.c | 11 +- .../powerpc64/le/fpu/multiarch/s_fmaf128-ppc64.c} | 10 +- .../powerpc64/le/fpu/multiarch/s_fmaf128.c} | 25 +- .../fpu/s_fmaf128.c} | 19 +- sysdeps/powerpc/powerpc64/power7/Makefile | 6 +- sysdeps/riscv/nofpu/libm-test-ulps | 813 -- sysdeps/riscv/rv64/rvd/libm-test-ulps | 822 -- sysdeps/s390/fpu/libm-test-ulps | 817 -- sysdeps/sh/libm-test-ulps | 265 - sysdeps/sparc/fpu/bits/fenv.h | 9 - sysdeps/sparc/fpu/fclrexcpt.c | 1 + sysdeps/sparc/fpu/fedisblxcpt.c | 1 + sysdeps/sparc/fpu/feenablxcpt.c | 1 + sysdeps/sparc/fpu/fegetenv.c | 1 + sysdeps/sparc/fpu/fegetexcept.c | 1 + sysdeps/sparc/fpu/fegetmode.c | 1 + sysdeps/sparc/fpu/fegetround.c | 1 + sysdeps/sparc/fpu/feholdexcpt.c | 1 + sysdeps/sparc/fpu/fenv_private.h | 9 + sysdeps/sparc/fpu/fesetenv.c | 1 + sysdeps/sparc/fpu/fesetexcept.c | 1 + sysdeps/sparc/fpu/fesetmode.c | 1 + sysdeps/sparc/fpu/fesetround.c | 1 + sysdeps/sparc/fpu/feupdateenv.c | 1 + sysdeps/sparc/fpu/fgetexcptflg.c | 1 + sysdeps/sparc/fpu/fsetexcptflg.c | 1 + sysdeps/sparc/fpu/ftestexcept.c | 1 + sysdeps/sparc/fpu/libm-test-ulps | 837 -- .../alpha/{tv32-compat.h => alpha-tv32-compat.h} | 16 +- sysdeps/unix/sysv/linux/alpha/osf_adjtime.c | 10 +- sysdeps/unix/sysv/linux/alpha/osf_getitimer.c | 6 +- sysdeps/unix/sysv/linux/alpha/osf_getrusage.c | 4 +- sysdeps/unix/sysv/linux/alpha/osf_gettimeofday.c | 4 +- sysdeps/unix/sysv/linux/alpha/osf_setitimer.c | 10 +- sysdeps/unix/sysv/linux/alpha/osf_settimeofday.c | 4 +- sysdeps/unix/sysv/linux/alpha/osf_utimes.c | 6 +- sysdeps/unix/sysv/linux/alpha/osf_wait4.c | 4 +- sysdeps/unix/sysv/linux/clock_getres.c | 2 + sysdeps/unix/sysv/linux/clock_gettime.c | 2 + sysdeps/unix/sysv/linux/clock_nanosleep.c | 2 + sysdeps/unix/sysv/linux/clock_settime.c | 2 + sysdeps/unix/sysv/linux/hppa/atomic-machine.h | 28 + sysdeps/unix/sysv/linux/ppoll.c | 2 + sysdeps/unix/sysv/linux/x86/dl-cet.h | 20 - sysdeps/unix/sysv/linux/x86/include/asm/prctl.h | 5 - sysdeps/x86/Makefile | 9 +- sysdeps/x86/dl-cet.c | 217 +- sysdeps/x86/dl-procruntime.c | 11 - sysdeps/x86/fpu/bits/fenv.h | 54 - sysdeps/x86/fpu/include/bits/fenv.h | 57 - sysdeps/x86/tst-cet-legacy-4.c | 19 +- sysdeps/x86/tst-cet-legacy-5.c | 3 +- sysdeps/x86/tst-cet-legacy-6.c | 3 +- .../x86/tst-cet-legacy-7.c | 26 +- .../tst-cet-legacy-8.c} | 50 +- sysdeps/x86_64/fpu/libm-test-ulps | 1204 +-- 194 files changed, 10051 insertions(+), 25718 deletions(-) copy benchtests/{trunc-inputs => roundeven-inputs} (100%) copy benchtests/{truncf-inputs => roundevenf-inputs} (100%) delete mode 100644 bits/fenvinline.h delete mode 100644 bits/mathinline.h delete mode 100644 math/test-fenvinline.c delete mode 100644 math/test-math-inline.h delete mode 100644 math/test-math-no-inline.h create mode 100644 stdio-common/tst-printf-bz25691.c create mode 100644 sysdeps/hppa/dl-runtime.c delete mode 100644 sysdeps/m68k/m680x0/fpu/bits/mathinline.h delete mode 100644 sysdeps/powerpc/bits/fenvinline.h copy math/test-ibm128.h => sysdeps/powerpc/powerpc64/le/fpu/multiarch/s_fmaf128-po [...] copy sysdeps/{aarch64/elf-initfini.h => powerpc/powerpc64/le/fpu/multiarch/s_fmaf1 [...] copy sysdeps/{ieee754/ldbl-128ibm-compat/w_scalbf128.c => powerpc/powerpc64/le/fpu [...] copy sysdeps/powerpc/powerpc64/le/{fpu/multiarch/w_sqrtf128-ppc64le.c => power9/fp [...] rename sysdeps/unix/sysv/linux/alpha/{tv32-compat.h => alpha-tv32-compat.h} (88%) delete mode 100644 sysdeps/x86/fpu/include/bits/fenv.h copy elf/tst-filterobj.c => sysdeps/x86/tst-cet-legacy-7.c (65%) copy sysdeps/{powerpc/tst-cache-ppc-static-dlopen.c => x86/tst-cet-legacy-8.c} (53%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-Os updated (14782c8123e -> df562b12d90)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-Os in repository toolchain/ci/gcc. from 14782c8123e [ARM][GCC][4/x]: MVE ACLE vector interleaving store intrinsics. adds a50f6abffc3 [ARM][GCC][1/1x]: Patch to support MVE ACLE intrinsics with [...] adds 5db0eb95c34 [ARM][GCC][2/1x]: MVE intrinsics with unary operand. adds a9a437ffc42 tree-ssa-strlen: Fix up count_nonzero_bytes* [PR94015] adds f582ca0fd70 [GCC][PATCH][ARM] Add multilib mapping for Armv8.1-M+MVE wi [...] adds 700d4cb08c8 Fix up duplicated duplicated words mostly in comments adds 6df4618cac9 [ARM][GCC][3/1x]: MVE intrinsics with unary operand. adds a475f153431 [ARM][GCC][4/1x]: MVE intrinsics with unary operand. adds 4be8cf77026 [ARM][GCC][1/2x]: MVE intrinsics with binary operands. adds 887085be635 c++: Fix access checks for __is_assignable and __is_constructible adds f166a8cdf48 [ARM][GCC][2/2x]: MVE intrinsics with binary operands. adds d71dba7b611 [ARM][GCC][3/2x]: MVE intrinsics with binary operands. adds 33203b4c27d [ARM][GCC][4/2x]: MVE intrinsics with binary operands. adds f9355dee93f [ARM][GCC][5/2x]: MVE intrinsics with binary operands. adds 0dad5b33687 [ARM][GCC][1/3x]: MVE intrinsics with ternary operands. adds e4596b66710 coroutines, testsuite: Fix single test execution. adds 1fef0148be4 Fix the ChangeLog after the __is_assignable/__is_constructible fix adds cf9c3bff39c aarch64: Fix bf16_v(ld|st)n.c failures for big-endian adds 58a703f0726 testsuite: Fix gcc.target/aarch64/advsimd-intrinsics/bfcvt- [...] adds cd0b7124273 c++: Fix parsing of invalid enum specifiers [PR90995] adds 046c58907ec c: Handle C_TYPE_INCOMPLETE_VARS even for ENUMERAL_TYPEs [PR94172] adds 2e30d3e3e88 testsuite: Fix g++.dg/debug/dwarf2/const2b.C target selector adds 3b2cc34369a Daily bump. adds 98f29f5638f libstdc++: Fix type-erasure in experimental::net::executor [...] adds 80616e5b7a5 c++: Fix comment typo. adds 52b3aa8be18 dwarf: Generate DIEs for external variables with -g1 [93751] adds af8656be8df c++: Diagnose a deduction guide in a wrong scope [PR91759] adds 4e3d3e40726 middle-end/94188 fix fold of addr expression generation adds 4da9288745d libgomp testsuite - disable long double for AMDGCN adds cb26919c857 aarch64: Treat p12-p15 as call-preserved in SVE PCS functions adds d91480dee93 aarch64: Fix SYMBOL_TINY_GOT handling for ILP32 [PR94201] adds d5029d45940 Fix up duplicated duplicated words in comments adds 1ba9acb11e3 middle-end/94206 fix memset folding to avoid types with padding adds 11cf25c40e3 PR c++/94147 - mangling of lambdas assigned to globals adds 5a80a6c3e5f amdgcn: Add cond_add/sub/and/ior/xor for all vector modes adds dbde9e2d595 amdgcn: Fix vector compare modes adds 07522ae90b5 libstdc++: Fix compilation with released versions of Clang adds e5de406f996 libstdc++ Fix compilation of <stop_token> with Clang adds 0db2cd17702 analyzer: tweaks to exploded_node ctor adds 7d9c107ab1e analyzer: introduce noop_region_model_context adds f665beeba62 analyzer: add test coverage for fixed ICE [PR94047] adds 884d9141112 analyzer: make summarized dumps more comprehensive adds 26cbcfe5fce Fix libgomp.oacc-fortran/atomic_capture-1.f90 adds 8165795c155 [ARM][GCC][2/3x]: MVE intrinsics with ternary operands. adds e3678b4464a [ARM][GCC][3/3x]: MVE intrinsics with ternary operands. adds db5db9d2548 [ARM][GCC][1/4x]: MVE intrinsics with quaternary operands. adds 8eb3b6b9cf2 [ARM][GCC][2/4x]: MVE intrinsics with quaternary operands. adds f2170a379b0 [ARM][GCC][3/4x]: MVE intrinsics with quaternary operands. adds 532e9e2402a [ARM][GCC][4/4x]: MVE intrinsics with quaternary operands. adds 4ff68575991 [ARM][GCC][1/5x]: MVE store intrinsics. adds 535a8645bb8 [ARM][GCC][2/5x]: MVE load intrinsics. adds 405e918c314 [ARM][GCC][3/5x]: MVE store intrinsics with predicated suffix. adds 429d607bc46 [ARM][GCC][4/5x]: MVE load intrinsics with zero(_z) suffix. adds bf1e3d5afa1 [ARM][GCC][5/5x]: MVE ACLE load intrinsics which load a byt [...] adds 4cc23303bad [ARM][GCC][6/5x]: Remaining MVE load intrinsics which loads [...] adds 5cad47e0f85 [ARM][GCC][7/5x]: MVE store intrinsics which stores byte,ha [...] adds 7a5fffa5ed0 [ARM][GCC][8/5x]: Remaining MVE store intrinsics which stor [...] adds 3512dc0108a PR ipa/92799 - ICE on a weakref function definition followe [...] adds 529ea7d9596 Complete change to resolve pr90275. adds 07fe4af4d51 rs6000: Add back some w* constraints (PR91886) adds b3341826531 libstdc++: Fix is_trivially_constructible (PR 94033) adds b5562f1187d Daily bump. adds 73bc09fa8c6 middle-end/94216 fix another build_fold_addr_expr use adds f3280e4c0c9 ipa/94217 simplify offsetted address build adds c7e90196818 phiopt: Avoid -fcompare-debug bug in phiopt [PR94211] adds bb83e069eba libgomp/testsuite: ignore blank-line output for function-no [...] adds 02f7334ac93 c++: Fix up handling of captured vars in lambdas in OpenMP [...] adds f5389e17e4b Update include/plugin-api.h. adds c8429c2aba8 API extension for binutils (type of symbols). adds f22712bd8a2 Fix inliner ICE on alias with flatten attribute [PR92372] adds 37482edc3f7 d/dmd: Merge upstream dmd d1a606599 adds 9def91e9f2a c: Fix up cfun->function_end_locus from the C FE [PR94029] adds f7dceb4e658 Fix cgraph_node::function_symbol availability compuattion [ [...] adds 3373d3e38ea Daily bump. adds 94e2418780f c++: Avoid unnecessary empty class copy [94175]. adds 4a18f168f47 [rs6000] Rewrite the declaration of a variable adds 05009698eeb gcc, Arm: Fix no_cond issue introduced by MVE adds 4119cd693d2 store-merging: Fix up -fnon-call-exceptions handling [PR94224] adds 0efe7d8796e gcc, Arm: Fix MVE move from GPR -> GPR adds 005f6fc59e5 gcc, Arm: Fix testisms for MVE testsuite adds 719c864225e gcc, Arm: Revert changes to {get,set}_fpscr adds 8fefa21fcf6 tree-optimization/94266 - fix object type extraction heuristics adds 7d4549b2cd2 Fix correct offset in ipa_get_jf_ancestor_result. adds 3eff57aacfe [ARM][GCC][6x]:MVE ACLE vaddq intrinsics using arithmetic p [...] adds 85a94e87901 [ARM][GCC][7x]: MVE vreinterpretq and vuninitializedq intrinsics. adds 92f80065d10 [ARM][GCC][1/8x]: MVE ACLE vidup, vddup, viwdup and vdwdup [...] adds 41e1a7ffae9 [ARM][GCC][2/8x]: MVE ACLE gather load and scatter store in [...] adds 3d42842c07f fix CTOR vectorization adds 261014a1be4 [ARM][GCC][9x]: MVE ACLE predicated intrinsics with (dont-c [...] adds 828878c35c8 c++: Include the constraint parameter mapping in diagnostic [...] adds c3562f81042 [ARM][GCC][10x]: MVE ACLE intrinsics "add with carry across [...] adds 1aa22b1916a c-family: Tighten vector handling in type_for_mode [PR94072] adds b5446d0cc09 d: Fix SEGV in hash_table<odr_name_hasher, false, xcallocat [...] adds 1dfcc3b541c [ARM][GCC][11x]: MVE ACLE vector interleaving store and dei [...] adds a23eff1bd04 c++: Add testcases from PR c++/69694 adds a89349e664f adjust SLP tree dumping adds 72b3bc895f0 Fix verifier ICE on wrong comdat local flag [PR93347] adds 68dd57808f7 rs6000: Add command line and builtin compatibility check adds cc3afc9db07 Regenerate gcc.pot. adds 29f23ed79b6 sra: Cap number of sub-access propagations with a param (PR 93435) adds 8416602026d Daily bump. adds 15711e837b2 Fix comma at end of enumerator list seen with -std=c++98. adds 497498c878d lra: Tighten check for reloading paradoxical subregs [PR94052] adds b599bf9d6d1 c++: Reject changing active member of union during initiali [...] adds 98eb7b2ed24 d: Fix ICE in add_symbol_to_partition_1, at lto/lto-partiti [...] adds 837cece888f Darwin: Address translation comments (PR93694). adds dfb25dfe3d3 Darwin: Handle NULL DECL_SIZE_TYPE in machopic_select_secti [...] adds 9fc985118d9 libstdc++: Fix path::generic_string allocator handling (PR 94242) adds a577c0c2693 libstdc++: Fix experimental::path::generic_string (PR 93245) adds 424e39081f9 d: Fix typo in ChangeLog for last change adds 4a01f7b1e73 d: Fix missing dependencies in depfile for imported files ( [...] adds 88d7d0ce8fa testsuite: Fix lambda-vis.C for targets with user label pre [...] adds 85e10e4f0fa Darwin: Fix i686 bootstrap when the assembler supports GOTO [...] adds fbe60463bb8 d: Generate phony targets for content imported files (PR93038) adds 83aa5aa313a Daily bump. adds 6e00d8dcf32 Daily bump. adds b809f0b6580 Set proper DECL_ALIGN in offload_handle_link_vars (PR94233) adds 2fa4b1ffd6e Save ref->speculative_id before clone_reference. adds 263ee1260bc tree-optimization/94266 - aovid propagating addresses of TA [...] adds 7a2090b04e5 ipa/94245 - avoid folding when we want an ADDR_EXPR adds 26b3e568a60 [PR94044] Fix ICE with sizeof<argumentpack> adds a3586eeb884 AMDGCN offloading – use amdgcn-amdhsa adds ce6413087de lto/lto.c – used $ or . in generated linkptr name adds 4897bb0045d libgomp – fix declare target link handling (PR94251) adds b0d84ecc55f fortran: ICE in gfc_match_assignment PR93600 adds 4dcc4502f31 tree-optimization/94261 - avoid IL adjustments in SLP analysis adds 6debbff6ca3 arm: Add earlyclobber to MVE instructions that require it adds 962406639c0 testsuite, arm: Change tests to assemble adds 0cd55f9d3af libgccjit: handle long literals in playback::context::new_s [...] adds 1a5c27b1b43 [ARM][GCC][12x]: MVE ACLE intrinsics to set and get vector lane. adds 85244449104 [ARM][GCC][13x]: MVE ACLE scalar shift intrinsics. adds 88c9a831f3a [ARM][GCC][14x]: MVE ACLE whole vector left shift with carr [...] adds d326e9586b4 driver: Improve the generated help text for alias options adds 5db9e89323c c: Fix up cfun->function_end_locus on invalid function bodi [...] adds ca6c722561c c++: Handle COMPOUND_EXPRs in get_narrower and warnings_for [...] adds 1f6c1c82eb5 c++: Avoid a suspicious -Wnoexcept warning [PR93805] adds 75fb811dfaa Verify the code used for the optimized comparison is valid [...] adds c86c99e6950 Update gcc es.po, sv.po. adds 75c24a08d69 Daily bump. adds 047811579f0 cgraphunit: Avoid code generation differences based on -w/T [...] adds a5a9400a846 if-conv: Fix -fcompare-debug bugs in ifcvt_local_dce [PR94283] adds 565ab7efbdc loop-manip: Avoid -fcompare-debug issues in create_iv [PR94285] adds 596c90d3559 arm: Fix arm {,u}subvdi4 and usubvsi4 expanders [PR94286] adds 906b3eb9df6 Improve endianess detection. adds c2211a60ff0 Fix OpenMP offload handling for target-link variables for n [...] adds 04099157691 Define __BIG_ENDIAN__ adds 8001f59c82b [testsuite,arm] target-supports.exp: Add arm_fp_dp_ok effec [...] adds 2a0eaca3e9c [testsuite,arm] cmp-2.c: Move double-precision tests to cmp-3.c adds 07f8bcc6ea9 [testsuite,arm] use arm_fp_dp_ok effective-target adds 6e771c087b1 c++: Give more expressions locations. adds 5c161741843 c++: Fix template parm with dependent type in concepts. adds fddfd3ce555 c++: Improve handling of ill-formed constraints [PR94186]. adds 75b7b7fdc45 c++: Fix wrong no post-decrement operator error in template [...] adds 0c1c8d9f137 Daily bump. adds adaf4b6c66e Test for sigsetjmp support in analyzer tests requiring that [...] adds c2133167ad5 if-conv: Delete dead stmts backwards in ifcvt_local_dce [PR94283] adds f1154b4d3c5 sccvn: Fix buffer overflow in push_partial_def [PR94300] adds 158cccea0d0 middle-end: Avoid using DECL_UID in ASM_FORMAT_PRIVATE_NAME [...] adds 5f18995e23e varasm: Fix output_constructor where a RANGE_EXPR index nee [...] adds c38daa79768 fortran: ICE using undeclared symbol in array constructor PR93484 adds c8504ebef1d testsuite: Fix up FAILs in gfortran testsuite with -fcompar [...] adds 0fb0240a051 Fix handling of --with{,out}-zstd option. adds 724ec02c2c6 Make target_clones resolver fn static if possible. adds d5ad8ee04a7 i386: Fix ix86_add_reg_usage_to_vzeroupper [PR94308] adds 780f1cfd8ee testsuite: Mention cleanup-13.c test is incompatible with - [...] adds 68c4570a4de Do not error about missing zstd unless --with-zstd. adds 83dfa06cb5c coroutines: Fix missing dereference (PR94319). adds 0fca105f8ca Fix gcc.dg/pr92301.c on targets that don't support argc/argv. adds 05c13c43990 PR tree-optimization/94131 - ICE on printf with a VLA strin [...] adds c7a252ba2d0 c++: Fix invalid -Wduplicated-cond warning [PR94265] adds 713ecb3d417 rs6000: Allow FPRs to change between SDmode and DDmode [...] adds b5228b1bc8c PR middle-end/94004 - missing -Walloca on calls to alloca d [...] adds 6e4cd3cd259 arm: Fix ICE caused by arm_gen_dicompare_reg [PR94292] adds eeb0c7c0713 Fix vector-compare-1 regressions on sh4/sh4eb caused by pat [...] adds 48817fbd761 Fix vector-compare-1 regressions on sh4/sh4eb caused by [...] adds fe4b53b2e7e testsuite: adjustments for amdgcn adds bf1fc37bb4a libstdc++: Define and use chrono::is_clock for C++20 adds e3ef371982a libstdc++ Add missing tests for std::shared_timed_mutex adds 9673d11ec53 libstdc++: Fix author in previous ChangeLog entry adds e97929e20b2 [PATCH] rs6000: vec_rlnm fix to make builtin work according to ABI adds 27f8c8c4c92 Daily bump. adds d21dff5b4fe widening_mul: restrict ops to be defined in the same basic- [...] adds 9708ca2be40 var-tracking: Mark as sp based more VALUEs [PR92264] adds 5a1706f63a2 c++: Fix a -fcompare-debug issue with DEBUG_BEGIN_STMT stmt [...] adds dab932d1519 c++: Fix up user_provided_p [PR81349] adds 10ea09ee846 gimplify: Fix -fcompare-debug differences caused by gimplif [...] adds d6730f06420 Skip test for non-x86 targets. adds da920d0c46c tree: Fix -fcompare-debug issues due to protected_set_expr_ [...] adds 40cdcddf274 Fix UNRESOLVED test-case. adds e519d644999 arm: unified syntax for libgcc when built with -Os [PR94220] adds 16948c54b75 libstdc++: Add some C++20 additions to <chrono> adds 2a1f0f64160 coroutines: Implement n4849 changes to exception handling. adds 6d85947d23a coroutines: Implement n4849 recommended symmetric transfer. adds 517f5356bb0 c++: DR1710, template keyword in a typename-specifier [PR94057] adds b1c905ba83e Update gcc .po files. adds f9c38702e96 Daily bump. adds 65937db83cd coroutines, testsuite: Fix symmetric-transfer-00-basic.C on Linux. adds 54f58e9416d c++: Remove redundant calls to type_dependent_expression_p adds 71d69548a1b c++: template keyword accepted before destructor names [PR94336] adds 06d5d63d994 modulo-sched: fix bootstrap compare-debug issue adds 72809d6fe8e c++: Handle COMPOUND_EXPRs in ocp_convert [PR94339] adds 2eea00c518d c++: Avoid calls in non-evaluated contexts affect whether f [...] adds a76ff304f90 Fortran] Reject invalid association target (PR93363) adds a9cd2d786ad fixup: move ChangeLog entry for last Arm fix to correct file. adds 66e0e23c12d fixup: move ChangeLog entry for last Arm fix to correct file. adds 8d689cf43b5 Fix PR90332 by extending half size vector mode adds 62ede14d30f [Fortran] Fix ICE with deferred-rank arrays (PR93957) adds 917e21e8bcd tree-optimization/94352 - fix uninitialized use of curr_order adds 45cfaf9903d debug/94273 - avoid creating type DIEs for DINFO_LEVEL_TERSE adds 4d661bb7a2e analyzer: tweaks to superedge::dump adds 8f02357571a analyzer: improvements to diagnostic-manager.cc logging adds 42c63313252 analyzer: add new supergraph visualization adds 6969ac301f2 analyzer: fix malloc pointer NULL-ness adds 9dba60130dc c++: Fix ICE after ambiguous inline namespace reopen [PR94257] adds 04dd734b52d c++: avoid -Wredundant-tags on a first declaration in use [ [...] adds 038769535a8 amdgcn: refactor mode iterators adds ccacf77be55 PR c++/94098 - ICE on attribute access redeclaration adds c7fc15f54b3 [pr84733] Fix ICE popping local scope adds 52f24a9e989 PR c++/94346 - [9/10 Regression] ICE due to handle_copy_att [...] adds 54de5afb4a9 c++: Handle COMPOUND_EXPRs in ocp_convert [PR94339] adds 19e5389debb [RS6000] PR94145, make PLT loads volatile adds 491009b609d Update gcc de.po. adds 0302a2de7f1 libstdc++: Move definition earlier in file adds ae6076b5bc1 libstdc++: Implement C++20 changes to insert iterators adds 81a8d137c22 libstdc++: Add remaining C++20 changes to iterator adaptors adds b8a28a06eaf libstdc++: Define __cpp_lib_ranges macro for C++20 adds c2781192292 Daily bump. adds 679becf175c reassoc: Fix -fcompare-debug bug in reassociate_bb [PR94329] adds c6a562de88c c: After issuing errors about array size, for error-recover [...] adds 75defde9fb5 c++: Replay errors during diagnosis of constraint satisfact [...] adds cd68edf894d c++: Respect current_constraint_diagnosis_depth in diagnose [...] adds a7ea3d2ced7 c++: requires-expression outside of a template is misevalua [...] adds 7981c06ae92 c++: Diagnose when "requires" is used instead of "requires [...] adds 3fb7f2fbd5f [Fortran] Fix result-variable handling of MODULE PROCEDURE [...] adds 7d57570b065 Patch for PR94246 adds 946a444df34 testsuite: adjust modulo-sched compare-debug tests adds 42cda3ba45f libstdc++: Fix std::reverse_iterator relational operators adds f6b2b79040d libstdc++: Fix two tests that fail in C++20 mode adds 673bb288e62 Daily bump. adds c76df72f1a9 testsuite: Split up gdc-test.exp into each subdirectory adds 46b7d819f7c Delete duplicate .align output. adds 85f6f317ec8 Fix typo in a warning related to flatten. adds afd9da8b8ad testsuite: Move C++ tests in gdc.test into own subdirectory. adds 60c254b279e testsuite: Handle more kinds of gdc.test test flags and dir [...] adds dacc7effeea doc: Update -falign-functions/-falign-loops/-falign-jumps adds 2a93fb6e962 Daily bump. adds 07c48b61a08 [RS6000] Put call cookie back in AIX/ELFv2 call patterns adds ec919cfcef8 Fix vextract* masked patterns [PR93069] adds 3a9db91bee4 Fix scan pattern of vect-8.f90 dump. adds 291aa50a631 XFAIL pr57193.c test-case. adds 5abbfd3cd36 i386: Fix up *one_cmplv*2* insn with avx512f [PR94343] adds 48c18af43fa Update bswap64-4 test for desired results adds 841e721579b RS6000 Allow builtin initialization regardless of mask adds 48e331d6382 Define TRY_EMPTY_VM_SPACE for riscv64-linux adds 1cb1986cb59 c++: Fix handling of internal fn calls in statement express [...] adds 5830f753559 c++: Fix comparison of fn() and ns::fn() [PR90711] adds 9f6abd1b03e Update gcc sv.po. adds 13a29fc5730 Daily bump. adds 3809bcd6c0e lra: set insn_code_data to NULL when freeing adds 56f0b32476c forwprop: Pattern recognize more rotates [PR94344] adds 5ea39b24122 store-merging: Allow enums during bswap recognition [PR94403] adds 1dcffc8ddc4 fold-const: Fix division folding with vector operands [PR94412] adds a27c534794d aarch64: Fix up aarch64_compare_and_swaphi pattern [PR94368] adds e81d0d9ec7a [ARM][PATCH]: Add support for MVE ACLE intrinsics polymorph [...] adds cea1fc6f67d arc: Allow more ABIs in GLIBC_DYNAMIC_LINKER adds 1ef979c6966 [ARM][PATCH]: Add MVE ACLE intrinsics vbicq_n_* polymorphic [...] adds d08a318b4fd arc: Cleanup compilation warning adds dc56917d111 arc: Update operand printing adds 1165109b401 amdgcn: generalize vector insn modes adds 48742e02d71 d: Use d_comdat_linkage on generated internal decl. adds e06cde870ed Library-side tests for parenthesized aggregate init adds f14b41d2712 vect: ICE: in vectorizable_load, at tree-vect-stmts.c:9173 [...] adds e8e0acbaa38 d: Use memset to fill alignment holes with zeroes. adds 331c438d5a6 Update cpplib sr.po. adds 689418b97e5 libgomp – fix handling of 'target enter data' adds 63b2923dc6f libgccjit: add new version entry point adds 1c16f7fc903 d: Add always_inline to the internal attribute table. adds 013fca64fc1 d: Merge UDAs between function prototype and definitions (PR90136) adds 73dd051894b Daily bump. adds 595f1b1274b c++: Adjust formatting. adds 76f09260b7e c++: Fix DMI with lambda 'this' capture [PR94205] adds bd0f22a8d5c Fix PR94043 by making vect_live_op generate lc-phi adds 142d68f50b4 Fix typo in a macro usage. adds 9ecb3ecc8cc objsz: Don't call replace_uses_by on SSA_NAME_OCCURS_IN_ABN [...] adds d3ee88fdb4e Clear me from patch ownership. adds 0c9a8a8c103 fortran : FAIL: gfortran.dg/pr93365.f90 PR94386 adds e899d4b7125 Add testcase for already fixed PR [PR94436] adds 032f2366a4c rs6000: Make code questionably using r2 not ICE (PR94420) adds dd5da571731 doc: Fix a typo in the documentation of the copy attribute adds 43d011eb054 Whoops, forgot the changelog adds b60bd122dc7 doc: Fix typo adds 7546463b9f7 subreg: Fix PR94123, SVN r273240 causes gcc.target/powerpc/ [...] adds a96f1c38a78 analyzer: handle compound assignments [PR94378] adds 6c557ba5380 libstdc++: Move "free books" list from fsf.org to gnu.org adds fb25041e11d d: Fix gdc.dg/pr92216.d FAILs on 32-bit targets adds 918b89b7623 d: Fix new tests gdc.dg/pr93038.d and gdc.dg/pr93038b.d in [...] adds 25839b6af9f Daily bump. adds bf1f6d8819a fortran: ICE equivalence with an element of an array PR94030 adds 2c54eab5a30 fortran : ICE in gfc_resolve_findloc PR93498 adds b7a98f48e06 S/390: Remove superfluous commutative constraint modifiers adds 224efaf7e1e [Fortran] Fix error cleanup of select rank (PR93522) adds c1effaa209f libstdc++-v3/test: Better skip for "use_service.cc" adds ff825b81583 [ARM]: Fix for MVE ACLE intrinsics with writeback (PR94317). adds 66e327517b1 aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435] adds df562b12d90 aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435] No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 7994 ++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 196 + gcc/analyzer/analyzer.h | 1 + gcc/analyzer/checker-path.cc | 1 + gcc/analyzer/constraint-manager.cc | 1 + gcc/analyzer/diagnostic-manager.cc | 50 +- gcc/analyzer/diagnostic-manager.h | 32 + gcc/analyzer/engine.cc | 287 +- gcc/analyzer/exploded-graph.h | 31 +- gcc/analyzer/program-point.cc | 1 + gcc/analyzer/program-state.cc | 3 +- gcc/analyzer/region-model.cc | 638 +- gcc/analyzer/region-model.h | 171 +- gcc/analyzer/sm-malloc.cc | 2 +- gcc/analyzer/state-purge.cc | 21 +- gcc/analyzer/state-purge.h | 5 +- gcc/analyzer/supergraph.cc | 56 +- gcc/analyzer/supergraph.h | 19 +- gcc/asan.c | 7 +- gcc/c-family/ChangeLog | 35 + gcc/c-family/c-attribs.c | 35 +- gcc/c-family/c-common.c | 13 +- gcc/c-family/c-warn.c | 5 + gcc/c-family/c.opt | 4 + gcc/c/ChangeLog | 39 + gcc/c/c-decl.c | 57 +- gcc/c/c-parser.c | 52 +- gcc/c/c-tree.h | 14 +- gcc/c/c-typeck.c | 3 +- gcc/calls.c | 82 +- gcc/cfgexpand.c | 2 +- gcc/cgraph.c | 90 +- gcc/cgraph.h | 17 +- gcc/cgraphunit.c | 32 +- gcc/config/aarch64/aarch64-sve.md | 2 +- gcc/config/aarch64/aarch64.c | 55 +- gcc/config/aarch64/aarch64.md | 22 +- gcc/config/aarch64/atomics.md | 5 +- gcc/config/aarch64/constraints.md | 7 + .../aarch64/falkor-tag-collision-avoidance.c | 2 +- gcc/config/aarch64/iterators.md | 3 +- gcc/config/arc/arc.c | 8 +- gcc/config/arc/arc.h | 6 +- gcc/config/arc/linux.h | 3 +- gcc/config/arm/arm-builtins.c | 514 + gcc/config/arm/arm-protos.h | 1 + gcc/config/arm/arm.c | 27 +- gcc/config/arm/arm.h | 3 + gcc/config/arm/arm.md | 15 +- gcc/config/arm/arm_mve.h | 27623 ++++++++++++++++++- gcc/config/arm/arm_mve_builtins.def | 885 + gcc/config/arm/constraints.md | 47 +- gcc/config/arm/iterators.md | 11 + gcc/config/arm/mve.md | 11184 +++++++- gcc/config/arm/neon.md | 53 +- gcc/config/arm/predicates.md | 36 + gcc/config/arm/t-rmprofile | 13 +- gcc/config/arm/unspecs.md | 4 +- gcc/config/arm/vec-common.md | 75 +- gcc/config/arm/vfp.md | 7 +- gcc/config/darwin.c | 29 +- gcc/config/darwin.opt | 96 +- gcc/config/fr30/fr30.c | 2 +- gcc/config/gcn/gcn-run.c | 2 +- gcc/config/gcn/gcn-valu.md | 2113 +- gcc/config/gcn/gcn.h | 4 + gcc/config/gcn/gcn.md | 2 + gcc/config/host-linux.c | 2 + gcc/config/i386/darwin.h | 10 + gcc/config/i386/i386-features.c | 6 +- gcc/config/i386/i386.c | 2 +- gcc/config/i386/i386.h | 5 +- gcc/config/i386/sse.md | 35 +- gcc/config/i386/x86-tune.def | 2 +- gcc/config/msp430/msp430.c | 2 +- gcc/config/nds32/nds32-md-auxiliary.c | 12 +- gcc/config/nvptx/nvptx.c | 2 +- gcc/config/pa/pa.c | 1 - gcc/config/pa/pa.h | 1 + gcc/config/rs6000/altivec.h | 2 +- gcc/config/rs6000/constraints.md | 11 + gcc/config/rs6000/rs6000-c.c | 2 +- gcc/config/rs6000/rs6000-call.c | 28 - gcc/config/rs6000/rs6000-internal.h | 1 - gcc/config/rs6000/rs6000-logue.c | 2 +- gcc/config/rs6000/rs6000-p8swap.c | 2 +- gcc/config/rs6000/rs6000-string.c | 2 +- gcc/config/rs6000/rs6000.c | 57 +- gcc/config/rs6000/rs6000.h | 1 + gcc/config/rs6000/rs6000.md | 136 +- gcc/config/s390/vector.md | 80 +- gcc/config/s390/vx-builtins.md | 78 +- gcc/config/sh/sh.md | 8 +- gcc/configure | 13 +- gcc/configure.ac | 9 +- gcc/cp/ChangeLog | 332 + gcc/cp/call.c | 20 +- gcc/cp/class.c | 10 +- gcc/cp/constexpr.c | 179 +- gcc/cp/constraint.cc | 275 +- gcc/cp/coroutines.cc | 313 +- gcc/cp/cp-gimplify.c | 66 +- gcc/cp/cp-tree.h | 8 +- gcc/cp/cvt.c | 11 + gcc/cp/cxx-pretty-print.c | 18 +- gcc/cp/cxx-pretty-print.h | 1 + gcc/cp/decl.c | 12 +- gcc/cp/decl2.c | 3 +- gcc/cp/error.c | 35 +- gcc/cp/except.c | 5 +- gcc/cp/logic.cc | 8 +- gcc/cp/method.c | 6 +- gcc/cp/name-lookup.c | 65 +- gcc/cp/parser.c | 442 +- gcc/cp/pt.c | 21 +- gcc/cp/semantics.c | 9 +- gcc/cp/tree.c | 42 +- gcc/cp/typeck2.c | 2 +- gcc/cse.c | 1 - gcc/d/ChangeLog | 83 + gcc/d/d-attribs.cc | 43 +- gcc/d/d-codegen.cc | 44 - gcc/d/d-lang.cc | 81 +- gcc/d/d-target.cc | 2 +- gcc/d/d-tree.h | 11 +- gcc/d/decl.cc | 59 +- gcc/d/dmd/MERGE | 2 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.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c | 22 + .../arm/mve/intrinsics/vcmpgeq_m_n_f16.c | 22 + .../arm/mve/intrinsics/vcmpgeq_m_n_f32.c | 22 + .../arm/mve/intrinsics/vcmpgeq_m_n_s16.c | 22 + .../arm/mve/intrinsics/vcmpgeq_m_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c | 22 + 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.../gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpleq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpleq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpleq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpltq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpltq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c | 22 + .../arm/mve/intrinsics/vcmpltq_m_n_f16.c | 22 + .../arm/mve/intrinsics/vcmpltq_m_n_f32.c | 22 + .../arm/mve/intrinsics/vcmpltq_m_n_s16.c | 22 + .../arm/mve/intrinsics/vcmpltq_m_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c | 22 + 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+ .../gcc.target/arm/mve/intrinsics/vcmpneq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpneq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpneq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpneq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpneq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmulq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmulq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c | 23 + .../arm/mve/intrinsics/vcmulq_rot180_f16.c | 21 + .../arm/mve/intrinsics/vcmulq_rot180_f32.c | 21 + .../arm/mve/intrinsics/vcmulq_rot180_m_f16.c | 23 + .../arm/mve/intrinsics/vcmulq_rot180_m_f32.c | 23 + .../arm/mve/intrinsics/vcmulq_rot180_x_f16.c | 22 + .../arm/mve/intrinsics/vcmulq_rot180_x_f32.c | 22 + .../arm/mve/intrinsics/vcmulq_rot270_f16.c | 21 + .../arm/mve/intrinsics/vcmulq_rot270_f32.c | 21 + .../arm/mve/intrinsics/vcmulq_rot270_m_f16.c | 23 + .../arm/mve/intrinsics/vcmulq_rot270_m_f32.c | 23 + .../arm/mve/intrinsics/vcmulq_rot270_x_f16.c | 22 + .../arm/mve/intrinsics/vcmulq_rot270_x_f32.c | 22 + .../arm/mve/intrinsics/vcmulq_rot90_f16.c | 21 + .../arm/mve/intrinsics/vcmulq_rot90_f32.c | 21 + .../arm/mve/intrinsics/vcmulq_rot90_m_f16.c | 23 + .../arm/mve/intrinsics/vcmulq_rot90_m_f32.c | 23 + .../arm/mve/intrinsics/vcmulq_rot90_x_f16.c | 23 + .../arm/mve/intrinsics/vcmulq_rot90_x_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vcreateq_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vcreateq_f32.c | 13 + .../gcc.target/arm/mve/intrinsics/vcreateq_s16.c | 13 + .../gcc.target/arm/mve/intrinsics/vcreateq_s32.c | 13 + .../gcc.target/arm/mve/intrinsics/vcreateq_s64.c | 13 + .../gcc.target/arm/mve/intrinsics/vcreateq_s8.c | 13 + .../gcc.target/arm/mve/intrinsics/vcreateq_u16.c | 13 + .../gcc.target/arm/mve/intrinsics/vcreateq_u32.c | 13 + .../gcc.target/arm/mve/intrinsics/vcreateq_u64.c | 13 + .../gcc.target/arm/mve/intrinsics/vcreateq_u8.c | 13 + .../gcc.target/arm/mve/intrinsics/vctp16q.c | 21 + .../gcc.target/arm/mve/intrinsics/vctp16q_m.c | 22 + .../gcc.target/arm/mve/intrinsics/vctp32q.c | 21 + .../gcc.target/arm/mve/intrinsics/vctp32q_m.c | 22 + .../gcc.target/arm/mve/intrinsics/vctp64q.c | 21 + .../gcc.target/arm/mve/intrinsics/vctp64q_m.c | 22 + .../gcc.target/arm/mve/intrinsics/vctp8q.c | 21 + .../gcc.target/arm/mve/intrinsics/vctp8q_m.c | 22 + .../arm/mve/intrinsics/vcvtaq_m_s16_f16.c | 22 + .../arm/mve/intrinsics/vcvtaq_m_s32_f32.c | 22 + .../arm/mve/intrinsics/vcvtaq_m_u16_f16.c | 22 + .../arm/mve/intrinsics/vcvtaq_m_u32_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c | 13 + .../gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c | 13 + .../arm/mve/intrinsics/vcvtaq_x_s16_f16.c | 14 + .../arm/mve/intrinsics/vcvtaq_x_s32_f32.c | 14 + .../arm/mve/intrinsics/vcvtaq_x_u16_f16.c | 14 + .../arm/mve/intrinsics/vcvtaq_x_u32_f32.c | 14 + .../gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c | 13 + .../gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c | 13 + .../arm/mve/intrinsics/vcvtbq_m_f16_f32.c | 22 + .../arm/mve/intrinsics/vcvtbq_m_f32_f16.c | 22 + .../arm/mve/intrinsics/vcvtbq_x_f32_f16.c | 14 + .../arm/mve/intrinsics/vcvtmq_m_s16_f16.c | 22 + .../arm/mve/intrinsics/vcvtmq_m_s32_f32.c | 22 + .../arm/mve/intrinsics/vcvtmq_m_u16_f16.c | 22 + .../arm/mve/intrinsics/vcvtmq_m_u32_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c | 13 + .../gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c | 13 + .../arm/mve/intrinsics/vcvtmq_x_s16_f16.c | 14 + .../arm/mve/intrinsics/vcvtmq_x_s32_f32.c | 14 + .../arm/mve/intrinsics/vcvtmq_x_u16_f16.c | 14 + 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.../gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c | 13 + .../arm/mve/intrinsics/vcvtpq_x_s16_f16.c | 14 + .../arm/mve/intrinsics/vcvtpq_x_s32_f32.c | 14 + .../arm/mve/intrinsics/vcvtpq_x_u16_f16.c | 14 + .../arm/mve/intrinsics/vcvtpq_x_u32_f32.c | 14 + .../gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c | 13 + .../gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c | 13 + .../gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c | 13 + .../gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c | 13 + .../arm/mve/intrinsics/vcvtq_m_f16_s16.c | 22 + .../arm/mve/intrinsics/vcvtq_m_f16_u16.c | 22 + .../arm/mve/intrinsics/vcvtq_m_f32_s32.c | 22 + .../arm/mve/intrinsics/vcvtq_m_f32_u32.c | 22 + .../arm/mve/intrinsics/vcvtq_m_n_f16_s16.c | 23 + .../arm/mve/intrinsics/vcvtq_m_n_f16_u16.c | 23 + .../arm/mve/intrinsics/vcvtq_m_n_f32_s32.c | 23 + .../arm/mve/intrinsics/vcvtq_m_n_f32_u32.c | 23 + .../arm/mve/intrinsics/vcvtq_m_n_s16_f16.c | 23 + .../arm/mve/intrinsics/vcvtq_m_n_s32_f32.c | 23 + .../arm/mve/intrinsics/vcvtq_m_n_u16_f16.c | 23 + .../arm/mve/intrinsics/vcvtq_m_n_u32_f32.c | 23 + .../arm/mve/intrinsics/vcvtq_m_s16_f16.c | 22 + .../arm/mve/intrinsics/vcvtq_m_s32_f32.c | 22 + .../arm/mve/intrinsics/vcvtq_m_u16_f16.c | 22 + .../arm/mve/intrinsics/vcvtq_m_u32_f32.c | 22 + .../arm/mve/intrinsics/vcvtq_n_f16_s16.c | 21 + .../arm/mve/intrinsics/vcvtq_n_f16_u16.c | 21 + .../arm/mve/intrinsics/vcvtq_n_f32_s32.c | 21 + .../arm/mve/intrinsics/vcvtq_n_f32_u32.c | 21 + .../arm/mve/intrinsics/vcvtq_n_s16_f16.c | 13 + .../arm/mve/intrinsics/vcvtq_n_s32_f32.c | 13 + .../arm/mve/intrinsics/vcvtq_n_u16_f16.c | 13 + .../arm/mve/intrinsics/vcvtq_n_u32_f32.c | 13 + .../gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c | 13 + .../gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c | 13 + .../arm/mve/intrinsics/vcvtq_x_f16_s16.c | 23 + .../arm/mve/intrinsics/vcvtq_x_f16_u16.c | 23 + .../arm/mve/intrinsics/vcvtq_x_f32_s32.c | 23 + .../arm/mve/intrinsics/vcvtq_x_f32_u32.c | 23 + .../arm/mve/intrinsics/vcvtq_x_n_f16_s16.c | 23 + .../arm/mve/intrinsics/vcvtq_x_n_f16_u16.c | 23 + .../arm/mve/intrinsics/vcvtq_x_n_f32_s32.c | 23 + .../arm/mve/intrinsics/vcvtq_x_n_f32_u32.c | 23 + .../arm/mve/intrinsics/vcvtq_x_n_s16_f16.c | 14 + .../arm/mve/intrinsics/vcvtq_x_n_s32_f32.c | 14 + .../arm/mve/intrinsics/vcvtq_x_n_u16_f16.c | 14 + .../arm/mve/intrinsics/vcvtq_x_n_u32_f32.c | 14 + .../arm/mve/intrinsics/vcvtq_x_s16_f16.c | 14 + .../arm/mve/intrinsics/vcvtq_x_s32_f32.c | 14 + .../arm/mve/intrinsics/vcvtq_x_u16_f16.c | 14 + .../arm/mve/intrinsics/vcvtq_x_u32_f32.c | 14 + .../gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c | 13 + .../gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c | 13 + .../arm/mve/intrinsics/vcvttq_m_f16_f32.c | 22 + .../arm/mve/intrinsics/vcvttq_m_f32_f16.c | 22 + .../arm/mve/intrinsics/vcvttq_x_f32_f16.c | 14 + .../gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c | 23 + .../arm/mve/intrinsics/vddupq_m_wb_u16.c | 23 + .../arm/mve/intrinsics/vddupq_m_wb_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vddupq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vddupq_n_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vddupq_n_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c | 23 + .../arm/mve/intrinsics/vddupq_x_wb_u16.c | 25 + .../arm/mve/intrinsics/vddupq_x_wb_u32.c | 25 + .../gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c | 25 + 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14 + .../gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c | 14 + .../gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c | 14 + .../gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c | 14 + .../gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c | 14 + .../gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c | 14 + .../gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c | 14 + .../arm/mve/intrinsics/vdwdupq_m_n_u16.c | 23 + .../arm/mve/intrinsics/vdwdupq_m_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c | 23 + .../arm/mve/intrinsics/vdwdupq_m_wb_u16.c | 23 + .../arm/mve/intrinsics/vdwdupq_m_wb_u32.c | 23 + .../arm/mve/intrinsics/vdwdupq_m_wb_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c | 21 + .../arm/mve/intrinsics/vdwdupq_x_n_u16.c | 23 + .../arm/mve/intrinsics/vdwdupq_x_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c | 23 + .../arm/mve/intrinsics/vdwdupq_x_wb_u16.c | 23 + .../arm/mve/intrinsics/vdwdupq_x_wb_u32.c | 23 + .../arm/mve/intrinsics/vdwdupq_x_wb_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/veorq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/veorq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/veorq_m_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/veorq_m_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/veorq_m_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/veorq_m_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/veorq_m_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/veorq_m_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/veorq_m_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/veorq_m_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/veorq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/veorq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/veorq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/veorq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/veorq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/veorq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/veorq_x_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/veorq_x_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/veorq_x_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/veorq_x_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/veorq_x_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/veorq_x_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/veorq_x_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/veorq_x_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vfmaq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vfmaq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vfmsq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vfmsq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_s64.c | 22 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_u64.c | 22 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vhaddq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vhaddq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vhaddq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vhaddq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vhaddq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vhaddq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c | 22 + .../arm/mve/intrinsics/vhcaddq_rot270_m_s16.c | 23 + .../arm/mve/intrinsics/vhcaddq_rot270_m_s32.c | 23 + .../arm/mve/intrinsics/vhcaddq_rot270_m_s8.c | 23 + .../arm/mve/intrinsics/vhcaddq_rot270_s16.c | 21 + .../arm/mve/intrinsics/vhcaddq_rot270_s32.c | 21 + .../arm/mve/intrinsics/vhcaddq_rot270_s8.c | 21 + .../arm/mve/intrinsics/vhcaddq_rot270_x_s16.c | 22 + .../arm/mve/intrinsics/vhcaddq_rot270_x_s32.c | 22 + .../arm/mve/intrinsics/vhcaddq_rot270_x_s8.c | 22 + .../arm/mve/intrinsics/vhcaddq_rot90_m_s16.c | 23 + .../arm/mve/intrinsics/vhcaddq_rot90_m_s32.c | 23 + .../arm/mve/intrinsics/vhcaddq_rot90_m_s8.c | 23 + .../arm/mve/intrinsics/vhcaddq_rot90_s16.c | 21 + .../arm/mve/intrinsics/vhcaddq_rot90_s32.c | 21 + .../arm/mve/intrinsics/vhcaddq_rot90_s8.c | 21 + .../arm/mve/intrinsics/vhcaddq_rot90_x_s16.c | 22 + .../arm/mve/intrinsics/vhcaddq_rot90_x_s32.c | 22 + .../arm/mve/intrinsics/vhcaddq_rot90_x_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c | 23 + .../arm/mve/intrinsics/vidupq_m_wb_u16.c | 23 + .../arm/mve/intrinsics/vidupq_m_wb_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vidupq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vidupq_n_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vidupq_n_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c | 23 + .../arm/mve/intrinsics/vidupq_x_wb_u16.c | 25 + .../arm/mve/intrinsics/vidupq_x_wb_u32.c | 25 + .../gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c | 25 + .../arm/mve/intrinsics/viwdupq_m_n_u16.c | 23 + .../arm/mve/intrinsics/viwdupq_m_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c | 23 + .../arm/mve/intrinsics/viwdupq_m_wb_u16.c | 23 + .../arm/mve/intrinsics/viwdupq_m_wb_u32.c | 23 + .../arm/mve/intrinsics/viwdupq_m_wb_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c | 21 + .../arm/mve/intrinsics/viwdupq_x_n_u16.c | 23 + .../arm/mve/intrinsics/viwdupq_x_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c | 23 + .../arm/mve/intrinsics/viwdupq_x_wb_u16.c | 23 + .../arm/mve/intrinsics/viwdupq_x_wb_u32.c | 23 + .../arm/mve/intrinsics/viwdupq_x_wb_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vld1q_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_z_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_z_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_z_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_z_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_z_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_z_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_z_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_z_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vld2q_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vld2q_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vld2q_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vld2q_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vld2q_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vld2q_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vld2q_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vld2q_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vld4q_f16.c | 24 + .../gcc.target/arm/mve/intrinsics/vld4q_f32.c | 24 + .../gcc.target/arm/mve/intrinsics/vld4q_s16.c | 24 + .../gcc.target/arm/mve/intrinsics/vld4q_s32.c | 24 + .../gcc.target/arm/mve/intrinsics/vld4q_s8.c | 24 + .../gcc.target/arm/mve/intrinsics/vld4q_u16.c | 24 + .../gcc.target/arm/mve/intrinsics/vld4q_u32.c | 24 + .../gcc.target/arm/mve/intrinsics/vld4q_u8.c | 24 + .../arm/mve/intrinsics/vldrbq_gather_offset_s16.c | 21 + .../arm/mve/intrinsics/vldrbq_gather_offset_s32.c | 21 + .../arm/mve/intrinsics/vldrbq_gather_offset_s8.c | 21 + .../arm/mve/intrinsics/vldrbq_gather_offset_u16.c | 21 + .../arm/mve/intrinsics/vldrbq_gather_offset_u32.c | 21 + .../arm/mve/intrinsics/vldrbq_gather_offset_u8.c | 21 + .../mve/intrinsics/vldrbq_gather_offset_z_s16.c | 21 + .../mve/intrinsics/vldrbq_gather_offset_z_s32.c | 21 + .../arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c | 21 + .../mve/intrinsics/vldrbq_gather_offset_z_u16.c | 21 + .../mve/intrinsics/vldrbq_gather_offset_z_u32.c | 21 + .../arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vldrbq_s16.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_s32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_s8.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_u16.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_u32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_u8.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c | 13 + .../arm/mve/intrinsics/vldrdq_gather_base_s64.c | 13 + .../arm/mve/intrinsics/vldrdq_gather_base_u64.c | 13 + .../arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c | 15 + .../arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c | 15 + .../mve/intrinsics/vldrdq_gather_base_wb_z_s64.c | 15 + .../mve/intrinsics/vldrdq_gather_base_wb_z_u64.c | 15 + .../arm/mve/intrinsics/vldrdq_gather_base_z_s64.c | 13 + .../arm/mve/intrinsics/vldrdq_gather_base_z_u64.c | 13 + .../arm/mve/intrinsics/vldrdq_gather_offset_s64.c | 21 + .../arm/mve/intrinsics/vldrdq_gather_offset_u64.c | 21 + .../mve/intrinsics/vldrdq_gather_offset_z_s64.c | 21 + .../mve/intrinsics/vldrdq_gather_offset_z_u64.c | 21 + .../intrinsics/vldrdq_gather_shifted_offset_s64.c | 21 + .../intrinsics/vldrdq_gather_shifted_offset_u64.c | 21 + .../vldrdq_gather_shifted_offset_z_s64.c | 21 + .../vldrdq_gather_shifted_offset_z_u64.c | 21 + .../gcc.target/arm/mve/intrinsics/vldrhq_f16.c | 13 + .../arm/mve/intrinsics/vldrhq_gather_offset_f16.c | 21 + .../arm/mve/intrinsics/vldrhq_gather_offset_s16.c | 21 + .../arm/mve/intrinsics/vldrhq_gather_offset_s32.c | 21 + .../arm/mve/intrinsics/vldrhq_gather_offset_u16.c | 21 + .../arm/mve/intrinsics/vldrhq_gather_offset_u32.c | 21 + .../mve/intrinsics/vldrhq_gather_offset_z_f16.c | 21 + .../mve/intrinsics/vldrhq_gather_offset_z_s16.c | 21 + .../mve/intrinsics/vldrhq_gather_offset_z_s32.c | 21 + .../mve/intrinsics/vldrhq_gather_offset_z_u16.c | 21 + .../mve/intrinsics/vldrhq_gather_offset_z_u32.c | 21 + .../intrinsics/vldrhq_gather_shifted_offset_f16.c | 21 + .../intrinsics/vldrhq_gather_shifted_offset_s16.c | 21 + .../intrinsics/vldrhq_gather_shifted_offset_s32.c | 21 + .../intrinsics/vldrhq_gather_shifted_offset_u16.c | 21 + .../intrinsics/vldrhq_gather_shifted_offset_u32.c | 21 + .../vldrhq_gather_shifted_offset_z_f16.c | 21 + .../vldrhq_gather_shifted_offset_z_s16.c | 21 + .../vldrhq_gather_shifted_offset_z_s32.c | 21 + .../vldrhq_gather_shifted_offset_z_u16.c | 21 + .../vldrhq_gather_shifted_offset_z_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vldrhq_s16.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrhq_s32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrhq_u16.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrhq_u32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrwq_f32.c | 13 + .../arm/mve/intrinsics/vldrwq_gather_base_f32.c | 13 + .../arm/mve/intrinsics/vldrwq_gather_base_s32.c | 13 + .../arm/mve/intrinsics/vldrwq_gather_base_u32.c | 13 + .../arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c | 15 + .../arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c | 15 + .../arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c | 15 + .../mve/intrinsics/vldrwq_gather_base_wb_z_f32.c | 17 + .../mve/intrinsics/vldrwq_gather_base_wb_z_s32.c | 17 + .../mve/intrinsics/vldrwq_gather_base_wb_z_u32.c | 17 + .../arm/mve/intrinsics/vldrwq_gather_base_z_f32.c | 13 + .../arm/mve/intrinsics/vldrwq_gather_base_z_s32.c | 13 + .../arm/mve/intrinsics/vldrwq_gather_base_z_u32.c | 13 + .../arm/mve/intrinsics/vldrwq_gather_offset_f32.c | 21 + .../arm/mve/intrinsics/vldrwq_gather_offset_s32.c | 21 + .../arm/mve/intrinsics/vldrwq_gather_offset_u32.c | 21 + .../mve/intrinsics/vldrwq_gather_offset_z_f32.c | 21 + .../mve/intrinsics/vldrwq_gather_offset_z_s32.c | 21 + .../mve/intrinsics/vldrwq_gather_offset_z_u32.c | 21 + .../intrinsics/vldrwq_gather_shifted_offset_f32.c | 21 + .../intrinsics/vldrwq_gather_shifted_offset_s32.c | 21 + .../intrinsics/vldrwq_gather_shifted_offset_u32.c | 21 + .../vldrwq_gather_shifted_offset_z_f32.c | 21 + .../vldrwq_gather_shifted_offset_z_s32.c | 21 + .../vldrwq_gather_shifted_offset_z_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vldrwq_s32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrwq_u32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c | 13 + .../gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxaq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxaq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxaq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxavq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxavq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxavq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c | 21 + .../arm/mve/intrinsics/vmaxnmavq_p_f16.c | 21 + .../arm/mve/intrinsics/vmaxnmavq_p_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vmaxq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vminaq_m_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vminaq_m_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vminaq_m_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vminaq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminaq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminaq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vminavq_p_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminavq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminavq_p_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vminavq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminavq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminavq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vminnmaq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminnmaq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vminnmavq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminnmavq_f32.c | 21 + .../arm/mve/intrinsics/vminnmavq_p_f16.c | 21 + .../arm/mve/intrinsics/vminnmavq_p_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminnmq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminnmq_f32.c | 21 + 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21 + .../gcc.target/arm/mve/intrinsics/vmladavxq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavxq_s8.c | 21 + .../arm/mve/intrinsics/vmlaldavaq_p_s16.c | 21 + .../arm/mve/intrinsics/vmlaldavaq_p_s32.c | 21 + .../arm/mve/intrinsics/vmlaldavaq_p_u16.c | 21 + .../arm/mve/intrinsics/vmlaldavaq_p_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c | 21 + .../arm/mve/intrinsics/vmlaldavaxq_p_s16.c | 21 + .../arm/mve/intrinsics/vmlaldavaxq_p_s32.c | 21 + .../arm/mve/intrinsics/vmlaldavaxq_p_u16.c | 21 + .../arm/mve/intrinsics/vmlaldavaxq_p_u32.c | 21 + .../arm/mve/intrinsics/vmlaldavaxq_s16.c | 21 + .../arm/mve/intrinsics/vmlaldavaxq_s32.c | 21 + .../arm/mve/intrinsics/vmlaldavq_p_s16.c | 21 + .../arm/mve/intrinsics/vmlaldavq_p_s32.c | 21 + .../arm/mve/intrinsics/vmlaldavq_p_u16.c | 21 + .../arm/mve/intrinsics/vmlaldavq_p_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c | 21 + .../arm/mve/intrinsics/vmlaldavxq_p_s16.c | 21 + .../arm/mve/intrinsics/vmlaldavxq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c | 21 + 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.../gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c | 21 + .../arm/mve/intrinsics/vmlsldavaq_p_s16.c | 21 + .../arm/mve/intrinsics/vmlsldavaq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c | 21 + .../arm/mve/intrinsics/vmlsldavaxq_p_s16.c | 21 + .../arm/mve/intrinsics/vmlsldavaxq_p_s32.c | 21 + .../arm/mve/intrinsics/vmlsldavaxq_s16.c | 21 + .../arm/mve/intrinsics/vmlsldavaxq_s32.c | 21 + .../arm/mve/intrinsics/vmlsldavq_p_s16.c | 21 + .../arm/mve/intrinsics/vmlsldavq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c | 21 + .../arm/mve/intrinsics/vmlsldavxq_p_s16.c | 21 + .../arm/mve/intrinsics/vmlsldavxq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovlbq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovlbq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovlbq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovlbq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovltq_s16.c | 21 + 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| 21 + .../gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqmovntq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vqmovntq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vqmovntq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vqmovntq_u32.c | 21 + .../arm/mve/intrinsics/vqmovunbq_m_s16.c | 22 + .../arm/mve/intrinsics/vqmovunbq_m_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c | 21 + .../arm/mve/intrinsics/vqmovuntq_m_s16.c | 22 + .../arm/mve/intrinsics/vqmovuntq_m_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c | 21 + 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| 23 + .../gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vrhaddq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrhaddq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vrhaddq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vrhaddq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrhaddq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vrhaddq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c | 22 + .../arm/mve/intrinsics/vrmlaldavhaq_p_s32.c | 21 + .../arm/mve/intrinsics/vrmlaldavhaq_p_u32.c | 21 + .../arm/mve/intrinsics/vrmlaldavhaq_s32.c | 21 + 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+ .../gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndmq_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vrndmq_f32.c | 13 + .../gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndnq_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vrndnq_f32.c | 13 + .../gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndpq_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vrndpq_f32.c | 13 + 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| 21 + .../arm/mve/intrinsics/vstrwq_scatter_offset_f32.c | 21 + .../mve/intrinsics/vstrwq_scatter_offset_p_f32.c | 21 + .../mve/intrinsics/vstrwq_scatter_offset_p_s32.c | 21 + .../mve/intrinsics/vstrwq_scatter_offset_p_u32.c | 21 + .../arm/mve/intrinsics/vstrwq_scatter_offset_s32.c | 21 + .../arm/mve/intrinsics/vstrwq_scatter_offset_u32.c | 21 + .../intrinsics/vstrwq_scatter_shifted_offset_f32.c | 21 + .../vstrwq_scatter_shifted_offset_p_f32.c | 21 + .../vstrwq_scatter_shifted_offset_p_s32.c | 21 + .../vstrwq_scatter_shifted_offset_p_u32.c | 21 + .../intrinsics/vstrwq_scatter_shifted_offset_s32.c | 21 + .../intrinsics/vstrwq_scatter_shifted_offset_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vstrwq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vsubq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vsubq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vsubq_m_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_m_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_m_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_m_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_m_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_m_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_n_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vsubq_n_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vsubq_n_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_n_s8.c | 22 + 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.../gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_s16.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_s32.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_s8.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_u16.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_u32.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_u8.c | 15 + .../arm/mve/intrinsics/vuninitializedq_float.c | 16 + .../arm/mve/intrinsics/vuninitializedq_float1.c | 16 + .../arm/mve/intrinsics/vuninitializedq_int.c | 28 + .../arm/mve/intrinsics/vuninitializedq_int1.c | 28 + gcc/testsuite/gcc.target/arm/mve/mve.exp | 2 + gcc/testsuite/gcc.target/arm/vfp-1.c | 4 +- gcc/testsuite/gcc.target/arm/vfp-ldmdbd.c | 4 +- gcc/testsuite/gcc.target/arm/vfp-ldmiad.c | 4 +- gcc/testsuite/gcc.target/arm/vfp-stmdbd.c | 4 +- gcc/testsuite/gcc.target/arm/vfp-stmiad.c | 4 +- gcc/testsuite/gcc.target/arm/vnmul-1.c | 4 +- gcc/testsuite/gcc.target/arm/vnmul-3.c | 4 +- gcc/testsuite/gcc.target/arm/vnmul-4.c | 4 +- gcc/testsuite/gcc.target/i386/avx512f-pr94300.c | 21 + gcc/testsuite/gcc.target/i386/avx512f-pr94343.c | 12 + gcc/testsuite/gcc.target/i386/avx512vl-pr93069.c | 12 + gcc/testsuite/gcc.target/i386/avx512vl-pr94343.c | 12 + gcc/testsuite/gcc.target/i386/pr57193.c | 3 +- gcc/testsuite/gcc.target/i386/pr81213-2.c | 12 + gcc/testsuite/gcc.target/i386/pr81213.c | 12 +- gcc/testsuite/gcc.target/i386/pr94283.c | 5 + gcc/testsuite/gcc.target/i386/pr94308.c | 31 + gcc/testsuite/gcc.target/powerpc/bswap64-4.c | 6 +- gcc/testsuite/gcc.target/powerpc/pragma_misc9.c | 47 + gcc/testsuite/gcc.target/powerpc/pragma_power6.c | 17 + gcc/testsuite/gcc.target/powerpc/pragma_power7.c | 32 + gcc/testsuite/gcc.target/powerpc/pragma_power8.c | 52 + gcc/testsuite/gcc.target/powerpc/pragma_power9.c | 63 + .../gcc.target/powerpc/vsu/vec-all-nez-7.c | 3 +- .../gcc.target/powerpc/vsu/vec-any-eqz-7.c | 3 +- gcc/testsuite/gdc.dg/fileimports/pr93038.txt | 1 + gcc/testsuite/gdc.dg/pr90136a.d | 21 + gcc/testsuite/gdc.dg/pr90136b.d | 21 + gcc/testsuite/gdc.dg/pr90136c.d | 9 + gcc/testsuite/gdc.dg/pr92216.d | 4 +- gcc/testsuite/gdc.dg/pr93038.d | 10 + gcc/testsuite/gdc.dg/pr93038b.d | 11 + gcc/testsuite/gdc.dg/pr94424.d | 19 + gcc/testsuite/gdc.test/compilable/compilable.exp | 30 + .../gdc.test/compilable/imports/pr9471a.d | 2 + .../gdc.test/compilable/imports/pr9471b.d | 5 + .../gdc.test/compilable/imports/pr9471c.d | 18 + .../gdc.test/compilable/imports/pr9471d.d | 1 + gcc/testsuite/gdc.test/compilable/pr9471.d | 6 + .../gdc.test/fail_compilation/fail_compilation.exp | 30 + gcc/testsuite/gdc.test/gdc-test.exp | 469 - gcc/testsuite/gdc.test/runnable/runnable.exp | 35 + gcc/testsuite/gdc.test/runnable/traits.d | 4 +- .../gdc.test/{runnable => runnable_cxx}/cabi1.d | 0 .../{runnable => runnable_cxx}/cpp_abi_tests.d | 0 .../gdc.test/{runnable => runnable_cxx}/cppa.d | 0 .../{runnable => runnable_cxx}/externmangle.d | 0 .../{runnable => runnable_cxx}/externmangle2.d | 0 .../extra-files/cabi2.cpp | 0 .../extra-files/cpp_abi_tests.cpp | 0 .../extra-files/cppb.cpp | 0 .../extra-files/externmangle.cpp | 0 .../extra-files/externmangle2.cpp | 0 .../gdc.test/runnable_cxx/runnable_cxx.exp | 46 + gcc/testsuite/gfortran.dg/associate_51.f90 | 2 +- gcc/testsuite/gfortran.dg/associate_53.f90 | 71 + gcc/testsuite/gfortran.dg/assumed_rank_19.f90 | 37 + gcc/testsuite/gfortran.dg/bessel_5_redux.f90 | 85 + .../gfortran.dg/graphite/vect-pr94043.f90 | 18 + .../gfortran.dg/iso_c_binding_compiler_1.f90 | 3 + .../gfortran.dg/iso_c_binding_compiler_3.f90 | 3 + gcc/testsuite/gfortran.dg/module_procedure_3.f90 | 27 + gcc/testsuite/gfortran.dg/pr93365.f90 | 15 + gcc/testsuite/gfortran.dg/pr93484_1.f90 | 8 + gcc/testsuite/gfortran.dg/pr93484_2.f90 | 8 + gcc/testsuite/gfortran.dg/pr93498_1.f90 | 11 + gcc/testsuite/gfortran.dg/pr93498_2.f90 | 12 + gcc/testsuite/gfortran.dg/pr93600_1.f90 | 9 + gcc/testsuite/gfortran.dg/pr93600_2.f90 | 10 + gcc/testsuite/gfortran.dg/pr94030_1.f90 | 11 + gcc/testsuite/gfortran.dg/pr94030_2.f90 | 33 + gcc/testsuite/gfortran.dg/pr94285.f90 | 5 + gcc/testsuite/gfortran.dg/pr94329.f90 | 12 + gcc/testsuite/gfortran.dg/select_rank_4.f90 | 26 + .../gfortran.dg/unlimited_polymorphic_31.f03 | 3 + gcc/testsuite/gfortran.dg/vect/vect-8.f90 | 2 +- gcc/testsuite/jit.dg/all-non-failing-tests.h | 30 + gcc/testsuite/jit.dg/test-long-string-literal.c | 54 + gcc/testsuite/jit.dg/test-version.c | 26 + gcc/testsuite/lib/gdc-utils.exp | 475 + gcc/testsuite/lib/gdc.exp | 106 +- gcc/testsuite/lib/target-supports.exp | 65 +- gcc/tree-call-cdce.c | 2 +- gcc/tree-data-ref.c | 2 +- gcc/tree-if-conv.c | 24 +- gcc/tree-object-size.c | 5 +- gcc/tree-sra.c | 39 +- gcc/tree-ssa-dom.c | 11 +- gcc/tree-ssa-dse.c | 4 +- gcc/tree-ssa-forwprop.c | 60 +- gcc/tree-ssa-loop-im.c | 3 +- gcc/tree-ssa-loop-manip.c | 12 +- gcc/tree-ssa-loop-split.c | 2 +- gcc/tree-ssa-math-opts.c | 8 +- gcc/tree-ssa-phiopt.c | 10 +- gcc/tree-ssa-propagate.c | 19 +- gcc/tree-ssa-reassoc.c | 16 +- gcc/tree-ssa-sccvn.c | 2 + gcc/tree-ssa-strlen.c | 257 +- gcc/tree-ssa-strlen.h | 2 +- gcc/tree-vect-loop.c | 52 +- gcc/tree-vect-slp.c | 58 +- gcc/tree-vect-stmts.c | 172 +- gcc/tree.c | 44 +- gcc/tree.def | 2 +- gcc/var-tracking.c | 3 +- gcc/varasm.c | 20 + include/ChangeLog | 29 + include/lto-symtab.h | 13 + include/plugin-api.h | 93 +- libcpp/po/ChangeLog | 4 + libcpp/po/sr.po | 78 +- libgcc/ChangeLog | 13 + libgcc/config/arm/lib1funcs.S | 33 +- libgcc/config/arm/t-arm | 3 + libgomp/ChangeLog | 38 + libgomp/target.c | 18 +- libgomp/testsuite/libgomp.c++/pr93931.C | 120 + .../libgomp.c-c++-common/function-not-offloaded.c | 1 + libgomp/testsuite/libgomp.c/target-link-1.c | 3 - .../libgomp.fortran/target-enter-data-1.f90 | 36 + .../libgomp.oacc-c++/firstprivate-mappings-1.C | 9 + .../firstprivate-mappings-1.c | 9 + .../libgomp.oacc-fortran/atomic_capture-1.f90 | 30 +- libstdc++-v3/ChangeLog | 246 + libstdc++-v3/doc/html/manual/appendix_free.html | 2 +- libstdc++-v3/doc/xml/manual/appendix_free.xml | 2 +- libstdc++-v3/include/bits/fs_fwd.h | 42 - libstdc++-v3/include/bits/fs_path.h | 11 +- libstdc++-v3/include/bits/iterator_concepts.h | 50 + libstdc++-v3/include/bits/range_access.h | 27 +- libstdc++-v3/include/bits/range_cmp.h | 3 + libstdc++-v3/include/bits/stl_algobase.h | 2 +- libstdc++-v3/include/bits/stl_iterator.h | 276 +- .../include/bits/stl_iterator_base_types.h | 4 +- libstdc++-v3/include/bits/stream_iterator.h | 4 +- libstdc++-v3/include/bits/streambuf_iterator.h | 4 +- libstdc++-v3/include/experimental/bits/fs_path.h | 40 +- libstdc++-v3/include/experimental/executor | 226 +- libstdc++-v3/include/experimental/socket | 18 +- libstdc++-v3/include/std/chrono | 206 +- libstdc++-v3/include/std/concepts | 2 +- libstdc++-v3/include/std/condition_variable | 3 + libstdc++-v3/include/std/future | 3 + libstdc++-v3/include/std/mutex | 3 + libstdc++-v3/include/std/shared_mutex | 6 + libstdc++-v3/include/std/stop_token | 12 + libstdc++-v3/include/std/thread | 3 + libstdc++-v3/include/std/type_traits | 80 +- libstdc++-v3/include/std/version | 7 +- .../allocator_traits/members/92878_92947.cc | 51 + .../testsuite/20_util/any/assign/92878_92947.cc | 46 + .../testsuite/20_util/any/cons/92878_92947.cc | 46 + .../20_util/is_constructible/92878_92947.cc | 49 + .../testsuite/20_util/is_constructible/value-2.cc | 4 + .../20_util/is_nothrow_constructible/94003.cc | 46 + .../20_util/optional/assignment/92878_92947.cc | 47 + .../testsuite/20_util/optional/cons/92878_92947.cc | 46 + .../testsuite/20_util/pair/cons/92878_92947.cc | 49 + .../20_util/shared_ptr/creation/92878_92947.cc | 46 + .../construct_at/92878_92947.cc | 50 + .../testsuite/20_util/time_point/cons/81468.cc | 8 +- .../time_point/requirements/duration_neg.cc | 32 + .../20_util/unique_ptr/creation/92878_92947.cc | 46 + .../20_util/uses_allocator/92878_92947.cc | 67 + .../testsuite/20_util/variant/92878_92947.cc | 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.../24_iterators/move_iterator/greedy_ops.cc | 8 +- .../24_iterators/move_iterator/input_iterator.cc | 42 + .../24_iterators/move_iterator/move_only.cc | 61 + .../24_iterators/move_iterator/rel_ops_c++20.cc | 163 + .../24_iterators/reverse_iterator/greedy_ops.cc | 8 +- .../24_iterators/reverse_iterator/rel_ops_c++20.cc | 193 + .../27_io/filesystem/path/generic/94242.cc | 52 + .../filesystem/path/generic/generic_string.cc | 32 + .../30_threads/condition_variable/members/2.cc | 2 + .../condition_variable/members/clock_neg.cc | 61 + .../condition_variable_any/members/clock_neg.cc | 61 + .../30_threads/future/members/clock_neg.cc | 59 + .../recursive_timed_mutex/try_lock_until/3.cc | 2 +- .../try_lock_until/clock_neg.cc | 57 + .../30_threads/shared_future/members/clock_neg.cc | 59 + .../30_threads/shared_lock/locking/clock_neg.cc | 59 + .../shared_timed_mutex/try_lock_until/1.cc | 87 + .../shared_timed_mutex/try_lock_until/2.cc | 74 + .../shared_timed_mutex/try_lock_until/clock_neg.cc | 57 + .../30_threads/timed_mutex/try_lock_until/3.cc | 2 +- .../30_threads/timed_mutex/try_lock_until/4.cc | 2 +- .../timed_mutex/try_lock_until/clock_neg.cc | 57 + .../30_threads/unique_lock/locking/clock_neg.cc | 59 + .../filesystem/path/generic/generic_string.cc | 46 +- .../net/execution_context/use_service.cc | 6 +- .../testsuite/experimental/net/executor/1.cc | 93 + .../std/ranges/headers/ranges/synopsis.cc | 6 + .../testsuite/std/time/clock/file/members.cc | 39 + .../testsuite/std/time/clock/file/overview.cc | 43 + libstdc++-v3/testsuite/std/time/syn_c++20.cc | 199 + libstdc++-v3/testsuite/std/time/traits/is_clock.cc | 141 + libstdc++-v3/testsuite/util/slow_clock.h | 3 + lto-plugin/ChangeLog | 20 + lto-plugin/lto-plugin.c | 141 +- 3043 files changed, 307172 insertions(+), 146220 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/attr-copy.c create mode 100644 gcc/testsuite/c-c++-common/pr94385.c create mode 100644 gcc/testsuite/g++.dg/abi/empty30.C create mode 100644 gcc/testsuite/g++.dg/abi/lambda-vis.C create mode 100644 gcc/testsuite/g++.dg/abi/mangle74.C create mode 100644 gcc/testsuite/g++.dg/concepts/diagnostic5.C create mode 100644 gcc/testsuite/g++.dg/concepts/diagnostic6.C create mode 100644 gcc/testsuite/g++.dg/concepts/diagnostic7.C create mode 100644 gcc/testsuite/g++.dg/concepts/diagnostic8.C create mode 100644 gcc/testsuite/g++.dg/concepts/pr94252.C create mode 100644 gcc/testsuite/g++.dg/conversion/op7.C create mode 100644 gcc/testsuite/g++.dg/coroutines/torture/exceptions-test-01-n4849-a.C create mode 100644 gcc/testsuite/g++.dg/coroutines/torture/symmetric-transfer-00-basic.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/decltype74.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/decltype75.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/enum40.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/alias-decl1.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/alias-decl2.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/alias-decl3.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-nsdmi2.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-union2.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-union3.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-union4.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-union5.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/pr94066-2.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/pr94066-3.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/pr94066.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/class-deduction72.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/lambda-this4.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/pr81349.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-nonbool1.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-nonbool2.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/constexpr-union1.C create mode 100644 gcc/testsuite/g++.dg/debug/pr94272.C create mode 100644 gcc/testsuite/g++.dg/debug/pr94273.C create mode 100644 gcc/testsuite/g++.dg/debug/pr94281.C create mode 100644 gcc/testsuite/g++.dg/debug/pr94323.C create mode 100644 gcc/testsuite/g++.dg/ext/attr-access-2.C create mode 100644 gcc/testsuite/g++.dg/ext/pr94197.C create mode 100644 gcc/testsuite/g++.dg/lookup/pr84733.C create mode 100644 gcc/testsuite/g++.dg/lookup/pr94257.C create mode 100644 gcc/testsuite/g++.dg/opt/pr94223.C create mode 100644 gcc/testsuite/g++.dg/other/pr94326.C create mode 100644 gcc/testsuite/g++.dg/other/pr94339.C create mode 100644 gcc/testsuite/g++.dg/template/dependent-name10.C create mode 100644 gcc/testsuite/g++.dg/template/dependent-name11.C create mode 100644 gcc/testsuite/g++.dg/template/dependent-name12.C create mode 100644 gcc/testsuite/g++.dg/template/dependent-name13.C create mode 100644 gcc/testsuite/g++.dg/template/dependent-name14.C create mode 100644 gcc/testsuite/g++.dg/template/dependent-name7.C create mode 100644 gcc/testsuite/g++.dg/template/dependent-name8.C create mode 100644 gcc/testsuite/g++.dg/template/dependent-name9.C create mode 100644 gcc/testsuite/g++.dg/template/dr1710-2.C create mode 100644 gcc/testsuite/g++.dg/template/dr1710.C create mode 100644 gcc/testsuite/g++.dg/template/dr1794.C create mode 100644 gcc/testsuite/g++.dg/template/dr314.C create mode 100644 gcc/testsuite/g++.dg/template/template-keyword2.C create mode 100644 gcc/testsuite/g++.dg/torture/pr93347.C create mode 100644 gcc/testsuite/g++.dg/torture/pr94202.C create mode 100644 gcc/testsuite/g++.dg/torture/pr94216.C create mode 100644 gcc/testsuite/g++.dg/torture/pr94303.C create mode 100644 gcc/testsuite/g++.dg/tree-ssa/pr94224.C create mode 100644 gcc/testsuite/g++.dg/tree-ssa/pr94403.C create mode 100644 gcc/testsuite/g++.dg/ubsan/pr91993.C create mode 100644 gcc/testsuite/g++.dg/warn/Wconversion-pr91993.C create mode 100644 gcc/testsuite/g++.dg/warn/Wduplicated-cond1.C create mode 100644 gcc/testsuite/g++.dg/warn/Wmismatched-tags-3.C create mode 100644 gcc/testsuite/g++.dg/warn/Wmismatched-tags-4.C create mode 100644 gcc/testsuite/g++.dg/warn/Wmismatched-tags-5.C create mode 100644 gcc/testsuite/g++.dg/warn/Wmismatched-tags-6.C create mode 100644 gcc/testsuite/g++.dg/warn/Wnoexcept2.C create mode 100644 gcc/testsuite/g++.dg/warn/Wredundant-tags-6.C create mode 100644 gcc/testsuite/g++.dg/warn/Wredundant-tags-7.C create mode 100644 gcc/testsuite/g++.target/aarch64/pr94052.C create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr94144.c create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr94238.c create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr94412.c create mode 100644 gcc/testsuite/gcc.c-torture/pr92372.c create mode 100644 gcc/testsuite/gcc.dg/Walloca-larger-than-3.c create mode 100644 gcc/testsuite/gcc.dg/Walloca-larger-than-3.h create mode 100644 gcc/testsuite/gcc.dg/Wvla-larger-than-4.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/compound-assignment-1.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/compound-assignment-2.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/compound-assignment-3.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/malloc-5.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr94047.c create mode 100644 gcc/testsuite/gcc.dg/attr-flatten-1.c create mode 100644 gcc/testsuite/gcc.dg/attr-weakref-5.c create mode 100644 gcc/testsuite/gcc.dg/debug/dwarf2/pr93751-1.c create mode 100644 gcc/testsuite/gcc.dg/debug/dwarf2/pr93751-2.c create mode 100644 gcc/testsuite/gcc.dg/lto/pr94271_0.c create mode 100644 gcc/testsuite/gcc.dg/lto/pr94271_1.c create mode 100644 gcc/testsuite/gcc.dg/pr84131.c create mode 100644 gcc/testsuite/gcc.dg/pr93573-1.c create mode 100644 gcc/testsuite/gcc.dg/pr93573-2.c create mode 100644 gcc/testsuite/gcc.dg/pr94015.c create mode 100644 gcc/testsuite/gcc.dg/pr94172-1.c create mode 100644 gcc/testsuite/gcc.dg/pr94172-2.c create mode 100644 gcc/testsuite/gcc.dg/pr94188.c create mode 100644 gcc/testsuite/gcc.dg/pr94211.c create mode 100644 gcc/testsuite/gcc.dg/pr94269.c create mode 100644 gcc/testsuite/gcc.dg/pr94277.c create mode 100644 gcc/testsuite/gcc.dg/pr94283.c create mode 100644 gcc/testsuite/gcc.dg/pr94286.c create mode 100644 gcc/testsuite/gcc.dg/pr94292.c create mode 100644 gcc/testsuite/gcc.dg/pr94344.c create mode 100644 gcc/testsuite/gcc.dg/pr94368.c create mode 100644 gcc/testsuite/gcc.dg/pr94436.c create mode 100644 gcc/testsuite/gcc.dg/sms-compare-debug-1.c create mode 100644 gcc/testsuite/gcc.dg/sms-compare-debug-2.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr94206.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr93435.c create mode 100644 gcc/testsuite/gcc.dg/ubsan/pr94423.c create mode 100644 gcc/testsuite/gcc.dg/vect/pr93069.c create mode 100644 gcc/testsuite/gcc.misc-tests/gcov-pr94029.c create mode 100644 gcc/testsuite/gcc.target/aarch64/pr94072.c create mode 100644 gcc/testsuite/gcc.target/aarch64/pr94201.c create mode 100644 gcc/testsuite/gcc.target/aarch64/pr94398.c create mode 100644 gcc/testsuite/gcc.target/aarch64/pr94435.c create mode 100644 gcc/testsuite/gcc.target/arm/cmp-3.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_move_gpr_to_gpr.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c create mode 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mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c create mode 100644 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create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c create mode 100644 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gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c create mode 100644 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mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c create mode 100644 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create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c create mode 100644 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mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c create mode 100644 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mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c create mode 100644 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gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c create mode 100644 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mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c create mode 100644 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gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c create mode 100644 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create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c create mode 100644 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gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c create mode 100644 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gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c create mode 100644 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gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c create mode 100644 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gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c create mode 100644 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create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_s64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c create mode 100644 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mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c create mode 100644 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100644 libstdc++-v3/testsuite/std/time/syn_c++20.cc create mode 100644 libstdc++-v3/testsuite/std/time/traits/is_clock.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-Os updated (9e38d61910 -> 516231b7c7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-Os in repository toolchain/ci/binutils-gdb. from 9e38d61910 Include missing header to get missing declarations adds 946ffddcae Automatic date update in version.in adds 9809762324 Inherit sh_nbsd_nat_target from nbsd_nat_target adds a225c9a869 Add support for NetBSD threads in sh-nbsd-nat.c adds ecbbbdba71 Remove a double free in the BFD library triggered when parsi [...] adds 68e52bc7ec Fix a small set of Z80 problems. adds 327ef784ba Replace a couple of assertions in the BFD library that can b [...] adds d3c3c54293 Fix PR number in previous delta adds 2108a63a5a Add support for NetBSD threads in sparc-nat.c adds fe64b263e0 Automatic date update in version.in adds 5ccd2fb722 Rename the read symbol to xread adds d3e2a5e85d Include <alloca.h> conditionally adds 1c0aa1fbb2 Add support for NetBSD threads in amd64-bsd-nat.c adds fb516a6913 Add support for NetBSD threads in i386-bsd-nat.c adds 5a82b8a12b Namespace the reg class to avoid clashes with OS headers adds 53215f214c Non-contiguous memory regions support: Avoid calls to abort adds ac4bf06ca2 Fix seg-fault in strip when copying a file containing corrup [...] adds aef397a154 Non-contiguous memory regions support: Fix testcases after p [...] adds a9933ccf46 [gdb/testsuite] Add test-case gdb.dwarf2/break-inline-psymtab.exp adds cdf236890c Automatic date update in version.in adds 645ba68105 setup_archive parameter mismatch adds b966f55ffa Invalid read in process_netbsd_elf_note adds 1cb7d8b1af readelf leak in process_archive adds 81a65eb338 Don't use bfd.h in binutils/elfcomm.c adds effc14f54c Additional c99 elfxx-riscv.c fix adds d8c8b84859 [gdb/testsuite] Fix gdb.opt/inline-locals.exp KFAILs adds 724fd9ba43 gdb: Restructure the completion_tracker class adds 19a2740f7f gdb: Remove C++ symbol aliases from completion list adds 6b8c53f2f1 gdb/testsuite/fortran: Add mixed language stack test adds cada5fc921 gdb: Handle W and X remote packets without giving a warning adds ef3df11042 readelf.c: Use unsigned long to iterate over num_syms adds fcc7376e0a Avoid get_ptrace_pid() usage on NetBSD in x86-bsd-nat.c adds 6a541707f3 Fix assertion failure in the BFD library when called to pars [...] adds 2d07da271e [AArch64] When unavailable, fetch VG from ptrace. adds 3734bec833 Include: Sync lto-symtab.h and plugin-api.h with GCC adds f3a08f7778 Fix discrepancies in nm's --line-number output by adding sup [...] adds f09db38094 Disable get_ptrace_pid for NetBSD adds 9a6c68caa9 Add support for --no-rosegment option. adds ce2ea1c7e0 Automatic date update in version.in adds a859124df2 tidy elf_backend calls adds 833d919c93 PowerPC disassembly of odd sized sections adds fe90ae8a9f NDS32 disassembly of odd sized sections adds 340f3ac808 metag uninitialized memory read adds 67338173a4 XCOFF uninitialized read adds c02d66610b Silence warnings due to plugin API change adds c3a1714ce7 plugin: Use LDPT_ADD_SYMBOLS_V2 to get symbol type adds 3d98c46092 plugin: Don't invoke LTO-wrapper adds 5844b4657a Fix compile time warnings about the possibility of using uni [...] adds c7da12c72c Add support for NetBSD threads in ppc-nbsd-nat.c adds 0d832e7f5e Add support for the xdef and xref pseudo-ops to the Z80 assembler. adds 0dd7b8f788 [gdb/testsuite] Fix timeouts in gdb.threads/step-over-*.exp adds 4a90f06205 Add support for NetBSD threads in hppa-nbsd-nat.c adds 9faa006d11 Inherit ppc_nbsd_nat_target from nbsd_nat_target adds 70304be939 Fix Ada val_print removal regression adds 1773be9ea2 Fix column alignment in "maint info line-table" adds f67210ff1c Avoid stringop-truncation errors adds f7d4f0b1b9 Fix assert in c-exp.y adds 1ff700c202 Update the return type of gdb_ptrace to be more flexible adds c884cc4619 gdb: remove HAVE_DECL_PTRACE adds c623cc9089 [gdb/testsuite] Fix gdb.threads/omp-par-scope.exp XPASS adds fe26d3a34a Make dwarf2_evaluate_property parameter const adds d9fb0d7136 Automatic date update in version.in adds e3b1fa32c2 include: Sync lto-symtab.h and plugin-api.h with GCC adds da2efc2050 Automatic date update in version.in adds d1023b5d1e s12z disassembler tidy adds 03704c7704 NS32K arg_bufs uninitialised adds beea5cc1bc ARC: Use of uninitialised value adds 57cb32b3c3 H8300 use of uninitialised value adds c15a8f173e XCOFF64 uninitialised read adds 2957d8d054 Automatic date update in version.in adds 5935fd1530 gdb/testsuite: Remove hard coded addresses from expected results adds 5e737279c6 i386msdos uninitialised read adds cf28cfef60 ECOFF archive uninitialised read adds fdde2fb60c Mention .tdata in comment in _bfd_elf_tls_setup() adds 0636b24556 Avoid trigger an assertion failure in the STABS parser by re [...] adds 1ce0847daa Automatic date update in version.in adds 5a814d6d96 readelf memory leak in process_mips_specific adds 65109548f8 Overlarge allocation in _bfd_generic_read_ar_hdr_mag adds a64fafb545 [gdb] Print user for maint info psymtabs adds 7e6e972f74 bfd: Display symbol version for nm -D adds dfb68cc358 include: Sync plugin-api.h with GCC adds cda7e5603f bfd: Change num_group to unsigned int adds ec2e748ad3 Fix assertion failure in the BFD library when linking with - [...] adds 0b8448af68 Add code to the BFD library to handle opening files with pat [...] adds e11cd7c491 Update changelog. adds 5ab2fbf185 gdb: bool-ify follow_fork adds a18cd0cab4 Uninitialised memory read in z80-dis.c adds 1081065c51 bfd: Add a bfd_boolean argument to bfd_get_symbol_version_string adds 0d4a4bc56f Automatic date update in version.in adds d16e3d2e5b PR25662, invalid sh_offset for first section in segment with phdrs adds 86fd7e2e10 h8300-linux ld testsuite adds cf2611febc arc: Use correct string when printing bfd DEBUG data adds dd8953924b gdb/riscv: Apply NaN boxing when writing return values into [...] adds 7b1eff95be [gdb] Print user/includes fields for maint commands adds b778095777 The "b" flag for COFF sections only unsets the LOAD attribut [...] adds aac88046e6 Add a new function to the BFD library to allow users access [...] adds 4c83662712 readelf looping in process_archive adds d503b685c6 Fix WOW64 process system DLL paths adds 33aa3c10f6 Fix error message in compile-object-load.c adds 46b438bb73 Automatic date update in version.in adds f75fbe8ad2 alpha-vms: Sanity check ETIR__C_CTL_DFLOC index adds 4c4addbe57 Re: ARC: Use of uninitialised value adds ff76851054 Re: i386msdos uninitialised read adds 832a580781 Re: H8300 use of uninitialised value adds aa49fc22c1 Revert earlier delta adding bfd_coff_get_internal_extra_pe_a [...] adds 9fda78b611 Introduce dwarf2/dwz.h adds 0314b3901c Add dwz.c and dwz_file::read_string adds bf80d71052 Change dwarf_decode_macro_bytes calling convention adds 9eac9650ce Split dwarf_decode_macros into two overloads adds 3d27bbdb4b Move dwarf2_section_buffer_overflow_complaint to dwarf2/section.c adds a0194fa8f2 Convert dwarf2_section_buffer_overflow_complaint to a method adds 4f44ae6c69 Add dwarf2_section_info::read_string method adds c90ec28ae4 Move code to new file dwarf2/macro.c adds 8844c11b8b Make some line_header methods const adds 5a0e026fe1 Use a const line_header in macro reader adds 4f9c1eda9f Use a const dwarf2_section_info in macro reader adds 2ef46c2fbb Trivial fix in dwarf_decode_macro_bytes adds 86c0bb4c57 Convert read_indirect_line_string to a method adds 0df7ad3a67 Move more code to line-header.c adds c2d50fd0b3 Move die_info to new header adds 2b24b6e4a6 Remove dwarf2_cu::base_known adds 052c8bb83a Change dwarf2_attr_no_follow to be a method adds 436c571c6a Remove sibling_die adds a39fdb411d Change two more functions to be methods on die_info adds eeb647814f Rewrite new die_info methods adds 2b2558bfac Move DWARF-constant stringifying code to new file adds 0826b30a9f Change two functions to be methods on struct attribute adds a879b4d5a6 Support AT_BSDFLAGS on FreeBSD. adds 89ff19d45e Automatic date update in version.in adds 80e2a3b66e Re: readelf looping in process_archive adds 1fafefd594 Add testcase for PR 25662 invalid sh_offset for section adds 8f2dae6a6a gdbsupport: Resolve shellcheck issues in create-version.sh script adds cacb9d8713 ld: Skip some x86 IFUNC tests for Solaris adds 258e884429 ld: Xfail pr20995-2 tests for Solaris adds ebea762639 Always fix system DLL paths for 32bit programs adds 8f4afc7112 Automatic date update in version.in adds 6a81c59be7 Adjust objcopy_test adds 0a6a8b596b Re: Adjust objcopy_test adds 767be9d907 ld: Set COMMONPAGESIZE for i386 Solaris adds f1749218ff Fix formatting of read_attribute_reprocess adds 4d1b9ab645 Fix comment in dwarf2/attribute.h adds 37d59eacfe Automatic date update in version.in adds 3ad830466f gdb: remove discard_psymtab function adds 48993951ce gdb: rename partial_symtab::read_dependencies to expand_depe [...] adds 69b037c30c gdb: rename partial symtab expand functions of debug info re [...] adds 988b7300bc PR25745, powerpc64-ld overflows string buffer in --stats mode adds c9fef64dab Automatic date update in version.in adds c0502da688 [gdb/testsuite] Fix c-linkage-name.exp with {cc-with-gdb-ind [...] adds 1310c1b066 Add low_new_clone method to linux_nat_target. adds 4db10d8f49 [PowerPC] Move up some register access routines adds 227c0bf4b3 [PowerPC] Fix debug register issues in ppc-linux-nat adds 00386881a3 Fix objcopy's --preserve-dates command line option so that i [...] adds d8af906814 Change ada_which_variant_applies to value API adds d1a89da5de RISC-V: Update CSR to privileged spec 1.11. adds d262797294 Automatic date update in version.in adds b3b360dec7 tekhex: Uninitialised read adds 8169954446 alpha-vms: sanity checks for image_write adds 89b599df37 alpha-coff: unitialised read adds 16b0db75af [gdb/testsuite] Fix c-linkage-name.exp with -flto adds af62665e13 Don't pass NULL to memcpy in gdb adds 6f29a53415 Fix py-tui.c build problem adds 876678f05e PR 25611, PR 25614: GAS: Remove a double inclusion of "bignum.h" adds 283b7aa134 Automatic date update in version.in adds 7b948a2580 mmo.c: Fix ld testsuite regression "objcopy executable (pr25662)". adds 41ff29bf5d ld/testsuite/ld-scripts/defined4.d: Don't xfail mmix-*-*. adds 40bd13ced9 include: Sync plugin-api.h with GCC adds 15ccbdd717 Arm: Fix thumb2 PLT branch offsets. adds a7618269b7 Arm: Fix LSB of GOT for Thumb2 only PLT. adds 15d47c3a70 gas: Fix some x86_64 testcases for Solaris not using R_X86_6 [...] adds efc3a95039 x86: Force relocation against local absolute symbol adds 81e3a1d00c Updated Serbian translation for the gprof subdirectory adds 8c072cb6a1 Avoid some copying in psymtab.c adds e0802d5996 Avoid copying in lookup_name_info adds e139a727be gdb/remote: do not check for null_ptid in stop reply adds 77bf7b5317 Extend the linker's error message for missing libraries if t [...] adds 60e22c1eac Allow pointer arithmetic with integer references adds 3ce23ca1de Arm: Skip Thumb2 PLT tests on NaCL. adds a0714d305f gdb: define convenience function 'exists_non_stop_target' adds 53cccef118 gdb/infrun: stop all threads if there exists a non-stop target adds e033dfa92f Remove local variable from simple.rs test case adds 3d1cfd43be Move Rust union tests to new file adds 5b930b4538 Change how complex types are created adds 4c99290df0 Add accessors for members of complex numbers adds 981c08ce72 Change how complex types are printed in C adds fa649bb7d3 Change the C parser to allow complex constants adds c34e871466 Implement complex arithmetic adds 3638a098a2 Add _Complex type support to C parser adds 6b4a335bf7 Fix value_literal_complex comment adds 382aae0632 x86: Only allow S + A relocations against absolute symbol adds bbe3dc410b Fix the resizing condition of the line table adds 64dc2d4bd2 Fix an undefined behavior in record_line adds 2836752f8f gdb: fix style issues in is_linked_with_cygwin_dll adds 15f89256af Automatic date update in version.in adds cc77ed241b [gdb/testsuite] Accept new complex print style in mixed-lang [...] adds d321419811 [gdb] Use partial symbol table to find language for main adds 1aa98955b1 [gdb/ada] Fix -readnow FAILs adds 4f5bd88505 Replace "use use" in a warning message with "use". adds f32682eaca [gdb/testsuite] Fix silent timeout in gdb.multi/multi-target.exp adds 59e28a9767 [PATCH gas/m68k] Fix a register range check adds bb89747721 ld: Disable ifunc tests on Solaris adds 516231b7c7 linux-x86.exp: Compile with -I../bfd No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 296 +++ bfd/archive.c | 15 +- bfd/bfd-in2.h | 5 +- bfd/bfdio.c | 36 +- bfd/coff-alpha.c | 2 +- bfd/coff-rs6000.c | 8 +- bfd/coff64-rs6000.c | 4 +- bfd/config.in | 6 - bfd/configure | 10 - bfd/configure.ac | 6 - bfd/dwarf2.c | 86 +- bfd/ecoff.c | 35 +- bfd/elf-bfd.h | 4 +- bfd/elf.c | 251 ++- bfd/elf32-arc.c | 4 +- bfd/elf32-arm.c | 19 +- bfd/elf32-csky.c | 9 +- bfd/elf32-hppa.c | 32 +- bfd/elf32-i386.c | 40 +- bfd/elf32-m68hc11.c | 9 +- bfd/elf32-m68hc12.c | 9 +- bfd/elf32-metag.c | 9 +- bfd/elf32-nios2.c | 10 +- bfd/elf64-ppc.c | 120 +- bfd/elf64-x86-64.c | 81 +- bfd/elfcode.h | 14 +- bfd/elflink.c | 4 +- bfd/elfnn-aarch64.c | 10 +- bfd/elfnn-ia64.c | 7 +- bfd/elfxx-riscv.c | 3 +- bfd/elfxx-x86.c | 103 +- bfd/elfxx-x86.h | 29 +- bfd/i386msdos.c | 14 +- bfd/libbfd-in.h | 2 +- bfd/libbfd.h | 2 +- bfd/libcoff-in.h | 4 +- bfd/libcoff.h | 4 +- bfd/mmo.c | 6 +- bfd/peXXigen.c | 4 +- bfd/plugin.c | 487 +---- bfd/plugin.h | 5 +- bfd/syms.c | 1 + bfd/targets.c | 5 +- bfd/tekhex.c | 2 +- bfd/version.h | 2 +- bfd/vms-alpha.c | 96 +- binutils/ChangeLog | 140 ++ binutils/ar.c | 2 +- binutils/elfcomm.c | 56 +- binutils/elfcomm.h | 6 +- binutils/nm.c | 30 +- binutils/objcopy.c | 5 + binutils/objdump.c | 3 +- binutils/readelf.c | 239 ++- binutils/testsuite/binutils-all/dw4.s | 1974 ++++++++++++++++++++ binutils/testsuite/binutils-all/nm.exp | 47 + binutils/testsuite/binutils-all/objcopy.exp | 97 +- binutils/testsuite/binutils-all/pr25662.ld | 15 + binutils/testsuite/binutils-all/pr25662.s | 34 + binutils/testsuite/lib/binutils-common.exp | 3 +- binutils/wrstabs.c | 56 +- gas/ChangeLog | 109 ++ gas/config/obj-coff.c | 5 + gas/config/tc-i386.h | 8 + gas/config/tc-m68k.c | 2 +- gas/config/tc-z80.c | 133 +- gas/config/tc-z80.h | 3 + gas/doc/c-z80.texi | 83 +- gas/dwarf2dbg.c | 1 - gas/testsuite/gas/elf/section12a.d | 2 +- gas/testsuite/gas/elf/section12b.d | 2 +- gas/testsuite/gas/elf/section16a.d | 2 +- gas/testsuite/gas/elf/section16b.d | 2 +- gas/testsuite/gas/i386/ilp32/x86-64-localpic.d | 4 +- gas/testsuite/gas/i386/localpic.d | 4 +- gas/testsuite/gas/i386/localpic.s | 2 + .../gas/i386/{ => solaris}/x86-64-branch-2.d | 5 +- .../gas/i386/{ => solaris}/x86-64-branch-3.d | 11 +- gas/testsuite/gas/i386/solaris/x86-64-jump.d | 16 +- .../gas/i386/solaris/x86-64-mpx-branch-1.d | 36 +- .../gas/i386/solaris/x86-64-mpx-branch-2.d | 28 +- gas/testsuite/gas/i386/x86-64-branch-2.d | 1 + gas/testsuite/gas/i386/x86-64-branch-3.d | 1 + gas/testsuite/gas/i386/x86-64-localpic.d | 4 +- gas/testsuite/gas/i386/x86-64-localpic.s | 2 + gas/testsuite/gas/riscv/alias-csr.d | 23 - gas/testsuite/gas/riscv/alias-csr.s | 14 - gas/testsuite/gas/riscv/bad-csr.d | 3 - gas/testsuite/gas/riscv/csr-dw-regnums.d | 7 +- gas/testsuite/gas/riscv/csr-dw-regnums.s | 9 +- gas/testsuite/gas/riscv/no-aliases-csr.d | 23 - .../gas/riscv/priv-reg-fail-nonexistent.d | 3 + .../{bad-csr.l => priv-reg-fail-nonexistent.l} | 0 .../{bad-csr.s => priv-reg-fail-nonexistent.s} | 0 gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l | 4 +- gas/testsuite/gas/riscv/priv-reg-pseudo-noalias.d | 36 + gas/testsuite/gas/riscv/priv-reg-pseudo.d | 36 + gas/testsuite/gas/riscv/priv-reg-pseudo.s | 33 + gas/testsuite/gas/riscv/priv-reg.d | 491 ++--- gas/testsuite/gas/riscv/priv-reg.s | 114 +- gas/testsuite/gas/riscv/satp.d | 11 - gas/testsuite/gas/riscv/satp.s | 3 - gas/testsuite/gas/s12z/truncated.d | 6 +- gas/testsuite/gas/z80/colonless.d | 12 +- gas/testsuite/gas/z80/colonless.s | 4 + gas/testsuite/gas/z80/ez80_adl_all.d | 8 +- gas/testsuite/gas/z80/ez80_unsup_regs.d | 34 + gas/testsuite/gas/z80/ez80_z80_all.d | 8 +- gas/testsuite/gas/z80/gbz80_unsup_regs.d | 45 + gas/testsuite/gas/z80/r800_unsup_regs.d | 35 + gas/testsuite/gas/z80/unsup_regs.s | 71 + gas/testsuite/gas/z80/z180_unsup_regs.d | 39 + gas/testsuite/gas/z80/z80.exp | 87 +- gas/testsuite/gas/z80/z80_strict_unsup_regs.d | 39 + gas/testsuite/gas/z80/z80_unsup_regs.d | 34 + gas/testsuite/gas/z80/z80n_unsup_regs.d | 34 + gdb/ChangeLog | 759 ++++++++ gdb/Makefile.in | 3 + gdb/ada-lang.c | 49 +- gdb/ada-lang.h | 3 +- gdb/ada-tasks.c | 3 +- gdb/ada-valprint.c | 97 +- gdb/amd64-bsd-nat.c | 47 +- gdb/buildsym.c | 36 +- gdb/c-exp.y | 160 +- gdb/c-valprint.c | 2 +- gdb/compile/compile-object-load.c | 2 +- gdb/completer.c | 209 ++- gdb/completer.h | 45 +- gdb/config.in | 4 - gdb/configure | 20 - gdb/ctfread.c | 2 +- gdb/d-lang.c | 9 +- gdb/dbxread.c | 10 +- gdb/dwarf2/abbrev.c | 5 +- gdb/dwarf2/attribute.c | 37 + gdb/dwarf2/attribute.h | 18 +- gdb/dwarf2/die.h | 103 + gdb/dwarf2/dwz.c | 40 + gdb/dwarf2/dwz.h | 65 + gdb/dwarf2/index-cache.c | 1 + gdb/dwarf2/index-write.c | 1 + gdb/dwarf2/line-header.c | 339 +++- gdb/dwarf2/line-header.h | 32 +- gdb/dwarf2/loc.c | 4 +- gdb/dwarf2/loc.h | 2 +- gdb/dwarf2/macro.c | 868 +++++++++ gdb/dwarf2/macro.h | 33 + gdb/dwarf2/read.c | 1752 ++--------------- gdb/dwarf2/read.h | 39 +- gdb/dwarf2/section.c | 26 + gdb/dwarf2/section.h | 9 + gdb/dwarf2/stringify.c | 114 ++ gdb/dwarf2/stringify.h | 38 + gdb/eval.c | 20 +- gdb/f-lang.c | 9 +- gdb/fbsd-nat.c | 6 +- gdb/fbsd-nat.h | 2 +- gdb/fbsd-tdep.c | 1 + gdb/features/riscv/32bit-csr.xml | 5 +- gdb/features/riscv/64bit-csr.xml | 5 +- gdb/gdbtypes.c | 58 +- gdb/gdbtypes.h | 9 +- gdb/go-lang.c | 6 +- gdb/hppa-nbsd-nat.c | 14 +- gdb/i386-bsd-nat.c | 63 +- gdb/inf-ptrace.c | 53 +- gdb/inf-ptrace.h | 9 +- gdb/infrun.c | 41 +- gdb/language.c | 4 +- gdb/linux-nat.c | 10 +- gdb/linux-nat.h | 6 +- gdb/linux-tdep.c | 4 +- gdb/mdebugread.c | 18 +- gdb/minsyms.c | 2 +- gdb/nat/aarch64-sve-linux-ptrace.c | 21 +- gdb/nat/gdb_ptrace.h | 8 - gdb/ppc-linux-nat.c | 1518 ++++++++++----- gdb/ppc-nbsd-nat.c | 17 +- gdb/psympriv.h | 8 +- gdb/psymtab.c | 100 +- gdb/ptrace.m4 | 6 +- gdb/python/py-tui.c | 8 +- gdb/regformats/regdef.h | 4 + gdb/remote.c | 58 +- gdb/riscv-tdep.c | 69 +- gdb/sh-nbsd-nat.c | 11 +- gdb/sparc-nat.c | 50 +- gdb/stabsread.c | 8 +- gdb/symfile-debug.c | 1 + gdb/symfile.c | 11 +- gdb/symfile.h | 11 + gdb/symmisc.c | 83 +- gdb/symtab.c | 66 +- gdb/symtab.h | 62 +- gdb/target-delegates.c | 24 +- gdb/target.c | 33 +- gdb/target.h | 9 +- gdb/testsuite/ChangeLog | 129 ++ .../complex.exp => gdb.ada/sub_variant.exp} | 37 +- gdb/testsuite/gdb.ada/sub_variant/subv.adb | 45 + gdb/testsuite/gdb.base/c-linkage-name.exp | 45 +- gdb/testsuite/gdb.base/callfuncs.exp | 6 +- gdb/testsuite/gdb.base/complex-parts.exp | 37 +- gdb/testsuite/gdb.base/complex.exp | 4 +- gdb/testsuite/gdb.base/endianity.exp | 4 +- gdb/testsuite/gdb.base/floatn.exp | 13 +- gdb/testsuite/gdb.base/funcargs.exp | 20 +- .../gdb.base/{complex.exp => main-psymtab.exp} | 33 +- gdb/testsuite/gdb.base/varargs.exp | 6 +- gdb/testsuite/gdb.compile/compile-cplus.exp | 2 +- gdb/testsuite/gdb.compile/compile.exp | 2 +- gdb/testsuite/gdb.cp/misc.cc | 3 + gdb/testsuite/gdb.cp/misc.exp | 8 + gdb/testsuite/gdb.dwarf2/break-inline-psymtab-2.c | 33 + gdb/testsuite/gdb.dwarf2/break-inline-psymtab.c | 24 + .../break-inline-psymtab.exp} | 31 +- gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp | 6 +- gdb/testsuite/gdb.fortran/mixed-lang-stack.c | 37 + gdb/testsuite/gdb.fortran/mixed-lang-stack.cpp | 85 + gdb/testsuite/gdb.fortran/mixed-lang-stack.exp | 163 ++ gdb/testsuite/gdb.fortran/mixed-lang-stack.f90 | 116 ++ .../gdb.linespec/cp-completion-aliases.cc | 73 + .../gdb.linespec/cp-completion-aliases.exp | 54 + gdb/testsuite/gdb.multi/multi-target.exp | 24 +- gdb/testsuite/gdb.multi/stop-all-on-exit.c | 27 + gdb/testsuite/gdb.multi/stop-all-on-exit.exp | 64 + gdb/testsuite/gdb.opt/inline-locals.exp | 26 +- gdb/testsuite/gdb.rust/simple.exp | 13 - gdb/testsuite/gdb.rust/simple.rs | 13 - .../{gdb.base/complex.exp => gdb.rust/union.exp} | 36 +- gdb/testsuite/gdb.rust/union.rs | 35 + gdb/testsuite/gdb.server/exit-multiple-threads.c | 202 ++ gdb/testsuite/gdb.server/exit-multiple-threads.exp | 136 ++ gdb/testsuite/gdb.server/stop-reply-no-thread.exp | 24 +- gdb/testsuite/gdb.threads/omp-par-scope.exp | 4 +- .../gdb.threads/step-over-lands-on-breakpoint.exp | 5 +- .../gdb.threads/step-over-trips-on-watchpoint.exp | 5 +- gdb/testsuite/lib/gdb.exp | 62 + gdb/testsuite/lib/gdbserver-support.exp | 40 +- gdb/user-regs.c | 21 +- gdb/valarith.c | 199 +- gdb/valops.c | 31 +- gdb/valprint.c | 9 +- gdb/value.c | 5 +- gdb/value.h | 12 + gdb/windows-nat.c | 49 +- gdb/windows-tdep.c | 8 +- gdb/x86-bsd-nat.c | 43 +- gdb/xcoffread.c | 8 +- gdbserver/ChangeLog | 11 + gdbserver/config.in | 4 - gdbserver/configure | 20 - gdbserver/regcache.cc | 2 +- gdbserver/tdesc.cc | 2 +- gdbserver/tdesc.h | 2 +- gdbsupport/ChangeLog | 18 + gdbsupport/btrace-common.cc | 3 +- gdbsupport/common-defs.h | 2 + gdbsupport/config.in | 4 - gdbsupport/configure | 20 - gdbsupport/create-version.sh | 18 +- gold/ChangeLog | 4 + gold/options.h | 2 +- gprof/ChangeLog | 4 + gprof/po/sr.po | 49 +- include/ChangeLog | 38 + include/elf/common.h | 1 + include/lto-symtab.h | 13 + include/opcode/riscv-opc.h | 25 +- include/plugin-api.h | 93 +- ld/ChangeLog | 277 +++ ld/Makefile.am | 2 + ld/Makefile.in | 3 + ld/emulparams/elf_i386_ldso.sh | 1 + ld/emultempl/pe.em | 5 +- ld/emultempl/pep.em | 5 +- ld/emultempl/xtensaelf.em | 6 +- ld/ldfile.c | 16 + ld/ldlang.c | 20 +- ld/pe-dll.c | 4 +- ld/po/BLD-POTFILES.in | 1 + ld/testplug.c | 5 +- ld/testplug2.c | 5 +- ld/testplug3.c | 5 +- ld/testplug4.c | 5 +- ld/testsuite/ld-arm/arm-elf.exp | 5 + ld/testsuite/ld-arm/non-contiguous-arm4.d | 2 +- ld/testsuite/ld-arm/thumb-plt-got.d | 14 + ld/testsuite/ld-arm/thumb-plt.d | 34 + ld/testsuite/ld-arm/thumb-plt.s | 18 + ld/testsuite/ld-elf/compress1c.d | 1 + ld/testsuite/ld-elf/compressed1c.d | 1 + ld/testsuite/ld-elf/compressed1e.d | 2 +- ld/testsuite/ld-elf/dynamic1.d | 1 + ld/testsuite/ld-elf/dynsym1.d | 1 + ld/testsuite/ld-elf/ehdr_start-shared.d | 2 +- ld/testsuite/ld-elf/exclude3b.d | 1 + ld/testsuite/ld-elf/export-class.exp | 2 +- ld/testsuite/ld-elf/global1.d | 1 + ld/testsuite/ld-elf/hash.d | 1 + ld/testsuite/ld-elf/linux-x86.exp | 167 ++ ld/testsuite/ld-elf/loadaddr1.d | 1 + ld/testsuite/ld-elf/loadaddr2.d | 1 + ld/testsuite/ld-elf/local1.d | 1 + ld/testsuite/ld-elf/mbind1b.d | 1 + ld/testsuite/ld-elf/mbind1c.d | 1 + ld/testsuite/ld-elf/now-1.d | 1 + ld/testsuite/ld-elf/now-2.d | 1 + ld/testsuite/ld-elf/now-3.d | 1 + ld/testsuite/ld-elf/now-4.d | 1 + ld/testsuite/ld-elf/pie.d | 1 + ld/testsuite/ld-elf/pr12975.d | 2 +- ld/testsuite/ld-elf/pr13177.d | 2 +- ld/testsuite/ld-elf/pr13195.d | 2 +- ld/testsuite/ld-elf/pr16322.d | 1 + ld/testsuite/ld-elf/pr16498a.d | 1 + ld/testsuite/ld-elf/pr16498b.d | 1 + ld/testsuite/ld-elf/pr17615.d | 2 +- ld/testsuite/ld-elf/pr19162.d | 2 +- ld/testsuite/ld-elf/pr19539.d | 2 +- ld/testsuite/ld-elf/pr19617a.d | 1 + ld/testsuite/ld-elf/pr19698.d | 1 + ld/testsuite/ld-elf/pr20513c.d | 1 + ld/testsuite/ld-elf/pr20513d.d | 1 + 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ld/testsuite/ld-h8300/relax.d | 2 +- ld/testsuite/ld-ifunc/ifunc-10-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-11-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-12-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-13-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14c-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14d-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14e-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14f-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-15-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-16-i386-now.d | 2 +- ld/testsuite/ld-ifunc/ifunc-16-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-17a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-17b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-18a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-18b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-19a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-19b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-2-i386-now.d | 2 +- ld/testsuite/ld-ifunc/ifunc-2-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-2-local-i386-now.d | 2 +- ld/testsuite/ld-ifunc/ifunc-2-local-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-20-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-21-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-22-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5a-local-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5b-local-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5r-local-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-6a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-6b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-7a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-7b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-8-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-9-i386.d | 2 +- ld/testsuite/ld-ifunc/pr17154-i386-now.d | 2 +- ld/testsuite/ld-ifunc/pr17154-i386.d | 2 +- ld/testsuite/ld-plugin/lto.exp | 15 +- ld/testsuite/ld-powerpc/non-contiguous-powerpc.d | 2 +- ld/testsuite/ld-scripts/defined4.d | 4 +- ld/testsuite/ld-undefined/entry-3.d | 1 + ld/testsuite/ld-undefined/entry-4.d | 1 + ld/testsuite/ld-x86-64/pr19609-6a.d | 11 +- opcodes/ChangeLog | 94 + opcodes/arc-dis.c | 11 +- opcodes/disassemble.c | 10 +- opcodes/disassemble.h | 6 + opcodes/h8300-dis.c | 261 +-- opcodes/metag-dis.c | 10 +- opcodes/nds32-dis.c | 24 +- opcodes/ns32k-dis.c | 19 +- opcodes/ppc-dis.c | 28 +- opcodes/s12z-dis.c | 14 +- opcodes/s12z-opc.c | 1030 +++++++--- opcodes/z80-dis.c | 28 +- 460 files changed, 13650 insertions(+), 5350 deletions(-) create mode 100644 binutils/testsuite/binutils-all/dw4.s create mode 100644 binutils/testsuite/binutils-all/pr25662.ld create mode 100644 binutils/testsuite/binutils-all/pr25662.s copy gas/testsuite/gas/i386/{ => solaris}/x86-64-branch-2.d (88%) copy gas/testsuite/gas/i386/{ => solaris}/x86-64-branch-3.d (80%) delete mode 100644 gas/testsuite/gas/riscv/alias-csr.d delete mode 100644 gas/testsuite/gas/riscv/alias-csr.s delete mode 100644 gas/testsuite/gas/riscv/bad-csr.d delete mode 100644 gas/testsuite/gas/riscv/no-aliases-csr.d create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-nonexistent.d rename gas/testsuite/gas/riscv/{bad-csr.l => priv-reg-fail-nonexistent.l} (100%) rename gas/testsuite/gas/riscv/{bad-csr.s => priv-reg-fail-nonexistent.s} (100%) create mode 100644 gas/testsuite/gas/riscv/priv-reg-pseudo-noalias.d create mode 100644 gas/testsuite/gas/riscv/priv-reg-pseudo.d create mode 100644 gas/testsuite/gas/riscv/priv-reg-pseudo.s delete mode 100644 gas/testsuite/gas/riscv/satp.d delete mode 100644 gas/testsuite/gas/riscv/satp.s create mode 100644 gas/testsuite/gas/z80/ez80_unsup_regs.d create mode 100644 gas/testsuite/gas/z80/gbz80_unsup_regs.d create mode 100644 gas/testsuite/gas/z80/r800_unsup_regs.d create mode 100644 gas/testsuite/gas/z80/unsup_regs.s create mode 100644 gas/testsuite/gas/z80/z180_unsup_regs.d create mode 100644 gas/testsuite/gas/z80/z80_strict_unsup_regs.d create mode 100644 gas/testsuite/gas/z80/z80_unsup_regs.d create mode 100644 gas/testsuite/gas/z80/z80n_unsup_regs.d create mode 100644 gdb/dwarf2/die.h create mode 100644 gdb/dwarf2/dwz.c create mode 100644 gdb/dwarf2/dwz.h create mode 100644 gdb/dwarf2/macro.c create mode 100644 gdb/dwarf2/macro.h create mode 100644 gdb/dwarf2/stringify.c create mode 100644 gdb/dwarf2/stringify.h copy gdb/testsuite/{gdb.base/complex.exp => gdb.ada/sub_variant.exp} (50%) create mode 100644 gdb/testsuite/gdb.ada/sub_variant/subv.adb copy gdb/testsuite/gdb.base/{complex.exp => main-psymtab.exp} (52%) create mode 100644 gdb/testsuite/gdb.dwarf2/break-inline-psymtab-2.c create mode 100644 gdb/testsuite/gdb.dwarf2/break-inline-psymtab.c copy gdb/testsuite/{gdb.base/complex.exp => gdb.dwarf2/break-inline-psymtab.exp} (54%) create mode 100644 gdb/testsuite/gdb.fortran/mixed-lang-stack.c create mode 100644 gdb/testsuite/gdb.fortran/mixed-lang-stack.cpp create mode 100644 gdb/testsuite/gdb.fortran/mixed-lang-stack.exp create mode 100644 gdb/testsuite/gdb.fortran/mixed-lang-stack.f90 create mode 100644 gdb/testsuite/gdb.linespec/cp-completion-aliases.cc create mode 100644 gdb/testsuite/gdb.linespec/cp-completion-aliases.exp create mode 100644 gdb/testsuite/gdb.multi/stop-all-on-exit.c create mode 100644 gdb/testsuite/gdb.multi/stop-all-on-exit.exp copy gdb/testsuite/{gdb.base/complex.exp => gdb.rust/union.exp} (50%) create mode 100644 gdb/testsuite/gdb.rust/union.rs create mode 100644 gdb/testsuite/gdb.server/exit-multiple-threads.c create mode 100644 gdb/testsuite/gdb.server/exit-multiple-threads.exp create mode 100644 ld/testsuite/ld-arm/thumb-plt-got.d create mode 100644 ld/testsuite/ld-arm/thumb-plt.d create mode 100644 ld/testsuite/ld-arm/thumb-plt.s create mode 100644 ld/testsuite/ld-elf/pr25708.d create mode 100644 ld/testsuite/ld-elf/pr25749-1.c create mode 100644 ld/testsuite/ld-elf/pr25749-1a.c create mode 100644 ld/testsuite/ld-elf/pr25749-1b.c create mode 100644 ld/testsuite/ld-elf/pr25749-1b.err create mode 100644 ld/testsuite/ld-elf/pr25749-1c.c create mode 100644 ld/testsuite/ld-elf/pr25749-1d.c create mode 100644 ld/testsuite/ld-elf/pr25749-2.c create mode 100644 ld/testsuite/ld-elf/pr25749-2a.s create mode 100644 ld/testsuite/ld-elf/pr25749-2b.s create mode 100644 ld/testsuite/ld-elf/pr25749.rd create mode 100644 ld/testsuite/ld-elf/pr25754-1a.c create mode 100644 ld/testsuite/ld-elf/pr25754-1b.s create mode 100644 ld/testsuite/ld-elf/pr25754-2a.c create mode 100644 ld/testsuite/ld-elf/pr25754-2b.s create mode 100644 ld/testsuite/ld-elf/pr25754-3a.c create mode 100644 ld/testsuite/ld-elf/pr25754-3b.s create mode 100644 ld/testsuite/ld-elf/pr25754-4a.c create mode 100644 ld/testsuite/ld-elf/pr25754-4b.s create mode 100644 ld/testsuite/ld-elf/pr25754-4c.s create mode 100644 ld/testsuite/ld-elf/pr25754-5a.c create mode 100644 ld/testsuite/ld-elf/pr25754-5b.s create mode 100644 ld/testsuite/ld-elf/pr25754-5c.s create mode 100644 ld/testsuite/ld-elf/pr25754-6a.c create mode 100644 ld/testsuite/ld-elf/pr25754-6b.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-Os updated (5e1e697e -> 892006e8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-Os in repository toolchain/ci/base-artifacts. discards 5e1e697e 1: update: binutils-gcc-glibc-llvm: 1 new 892006e8 1: update: binutils-gcc-glibc-llvm: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (5e1e697e) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 139 +- 02-prepare_abe/console.log | 420 +- 03-build_abe-binutils/console.log | 11823 ++- 04-build_abe-stage1/console.log | 15691 ++-- 05-build_abe-linux/console.log | 310 +- 06-build_abe-glibc/console.log | 39888 +++++---- 07-build_abe-stage2/console.log | 37601 +++++---- 08-build_llvm-true/console.log | 12789 +-- 10-benchmark--Os/benchmark-start.log | 2 +- 10-benchmark--Os/benchmark.log | 25 +- 10-benchmark--Os/console.log | 218 +- 11-check_regression/console.log | 2730 +- 11-check_regression/results-0.csv | 2258 +- 11-check_regression/results-1.csv | 2239 +- 11-check_regression/results-brief.csv | 36 +- 11-check_regression/results-compare.csv | 10 +- 11-check_regression/results-full.csv | 2417 +- 11-check_regression/results.csv | 160 +- 11-check_regression/results.log | 2826 +- 12-update_baseline/console.log | 5419 +- 12-update_baseline/extra-bisect-params | 2 +- 12-update_baseline/results-1.csv | 2239 +- 12-update_baseline/results-brief.csv | 36 +- 12-update_baseline/results-compare.csv | 10 +- 12-update_baseline/results-full.csv | 2239 +- 12-update_baseline/results.csv | 160 +- 12-update_baseline/results.log | 2016 +- 12-update_baseline/results.regressions | 1 + console.log | 127422 ++++++++++++++--------------- jenkins/manifest.sh | 24 +- regressions.txt | 2 - results | 1 - results_id | 2 +- 33 files changed, 134900 insertions(+), 136255 deletions(-) create mode 100644 12-update_baseline/results.regressions delete mode 100644 regressions.txt -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[binutils-gdb] branch master updated (aa350065a42 -> 880d97770b6)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from aa350065a42 NOCF_PROTECTION_CFLAGS: Replace nopie with available new 880d97770b6 [gdb/testsuite] Don't use O2 for inlining in break-inline-p [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gdb/testsuite/ChangeLog | 6 ++++++ gdb/testsuite/gdb.dwarf2/break-inline-psymtab-2.c | 2 +- gdb/testsuite/gdb.dwarf2/break-inline-psymtab.exp | 3 +-- 3 files changed, 8 insertions(+), 3 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_debug updated (c2781192292 -> 86c92411320)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_debug in repository toolchain/ci/gcc. from c2781192292 Daily bump. adds 679becf175c reassoc: Fix -fcompare-debug bug in reassociate_bb [PR94329] adds c6a562de88c c: After issuing errors about array size, for error-recover [...] adds 75defde9fb5 c++: Replay errors during diagnosis of constraint satisfact [...] adds cd68edf894d c++: Respect current_constraint_diagnosis_depth in diagnose [...] adds a7ea3d2ced7 c++: requires-expression outside of a template is misevalua [...] adds 7981c06ae92 c++: Diagnose when "requires" is used instead of "requires [...] adds 3fb7f2fbd5f [Fortran] Fix result-variable handling of MODULE PROCEDURE [...] adds 7d57570b065 Patch for PR94246 adds 946a444df34 testsuite: adjust modulo-sched compare-debug tests adds 42cda3ba45f libstdc++: Fix std::reverse_iterator relational operators adds f6b2b79040d libstdc++: Fix two tests that fail in C++20 mode adds 673bb288e62 Daily bump. adds c76df72f1a9 testsuite: Split up gdc-test.exp into each subdirectory adds 46b7d819f7c Delete duplicate .align output. adds 85f6f317ec8 Fix typo in a warning related to flatten. adds afd9da8b8ad testsuite: Move C++ tests in gdc.test into own subdirectory. adds 60c254b279e testsuite: Handle more kinds of gdc.test test flags and dir [...] adds dacc7effeea doc: Update -falign-functions/-falign-loops/-falign-jumps adds 2a93fb6e962 Daily bump. adds 07c48b61a08 [RS6000] Put call cookie back in AIX/ELFv2 call patterns adds ec919cfcef8 Fix vextract* masked patterns [PR93069] adds 3a9db91bee4 Fix scan pattern of vect-8.f90 dump. adds 291aa50a631 XFAIL pr57193.c test-case. adds 5abbfd3cd36 i386: Fix up *one_cmplv*2* insn with avx512f [PR94343] adds 48c18af43fa Update bswap64-4 test for desired results adds 841e721579b RS6000 Allow builtin initialization regardless of mask adds 48e331d6382 Define TRY_EMPTY_VM_SPACE for riscv64-linux adds 1cb1986cb59 c++: Fix handling of internal fn calls in statement express [...] adds 5830f753559 c++: Fix comparison of fn() and ns::fn() [PR90711] adds 9f6abd1b03e Update gcc sv.po. adds 13a29fc5730 Daily bump. adds 3809bcd6c0e lra: set insn_code_data to NULL when freeing adds 56f0b32476c forwprop: Pattern recognize more rotates [PR94344] adds 5ea39b24122 store-merging: Allow enums during bswap recognition [PR94403] adds 1dcffc8ddc4 fold-const: Fix division folding with vector operands [PR94412] adds a27c534794d aarch64: Fix up aarch64_compare_and_swaphi pattern [PR94368] adds e81d0d9ec7a [ARM][PATCH]: Add support for MVE ACLE intrinsics polymorph [...] adds cea1fc6f67d arc: Allow more ABIs in GLIBC_DYNAMIC_LINKER adds 1ef979c6966 [ARM][PATCH]: Add MVE ACLE intrinsics vbicq_n_* polymorphic [...] adds d08a318b4fd arc: Cleanup compilation warning adds dc56917d111 arc: Update operand printing adds 1165109b401 amdgcn: generalize vector insn modes adds 48742e02d71 d: Use d_comdat_linkage on generated internal decl. adds e06cde870ed Library-side tests for parenthesized aggregate init adds f14b41d2712 vect: ICE: in vectorizable_load, at tree-vect-stmts.c:9173 [...] adds e8e0acbaa38 d: Use memset to fill alignment holes with zeroes. adds 331c438d5a6 Update cpplib sr.po. adds 689418b97e5 libgomp – fix handling of 'target enter data' adds 63b2923dc6f libgccjit: add new version entry point adds 1c16f7fc903 d: Add always_inline to the internal attribute table. adds 013fca64fc1 d: Merge UDAs between function prototype and definitions (PR90136) adds 73dd051894b Daily bump. adds 595f1b1274b c++: Adjust formatting. adds 76f09260b7e c++: Fix DMI with lambda 'this' capture [PR94205] adds bd0f22a8d5c Fix PR94043 by making vect_live_op generate lc-phi adds 142d68f50b4 Fix typo in a macro usage. adds 9ecb3ecc8cc objsz: Don't call replace_uses_by on SSA_NAME_OCCURS_IN_ABN [...] adds d3ee88fdb4e Clear me from patch ownership. adds 0c9a8a8c103 fortran : FAIL: gfortran.dg/pr93365.f90 PR94386 adds e899d4b7125 Add testcase for already fixed PR [PR94436] adds 032f2366a4c rs6000: Make code questionably using r2 not ICE (PR94420) adds dd5da571731 doc: Fix a typo in the documentation of the copy attribute adds 43d011eb054 Whoops, forgot the changelog adds b60bd122dc7 doc: Fix typo adds 7546463b9f7 subreg: Fix PR94123, SVN r273240 causes gcc.target/powerpc/ [...] adds a96f1c38a78 analyzer: handle compound assignments [PR94378] adds 6c557ba5380 libstdc++: Move "free books" list from fsf.org to gnu.org adds fb25041e11d d: Fix gdc.dg/pr92216.d FAILs on 32-bit targets adds 918b89b7623 d: Fix new tests gdc.dg/pr93038.d and gdc.dg/pr93038b.d in [...] adds 25839b6af9f Daily bump. adds bf1f6d8819a fortran: ICE equivalence with an element of an array PR94030 adds 2c54eab5a30 fortran : ICE in gfc_resolve_findloc PR93498 adds b7a98f48e06 S/390: Remove superfluous commutative constraint modifiers adds 224efaf7e1e [Fortran] Fix error cleanup of select rank (PR93522) adds c1effaa209f libstdc++-v3/test: Better skip for "use_service.cc" adds ff825b81583 [ARM]: Fix for MVE ACLE intrinsics with writeback (PR94317). adds 66e327517b1 aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435] adds df562b12d90 aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435] adds 2c0fa3ecf70 cselib: Reuse VALUEs on sp adjustments [PR92264] adds 86c92411320 params: Decrease -param=max-find-base-term-values= default [...] No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 472 ++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 57 + gcc/analyzer/checker-path.cc | 1 + gcc/analyzer/constraint-manager.cc | 1 + gcc/analyzer/diagnostic-manager.cc | 1 + gcc/analyzer/engine.cc | 4 +- gcc/analyzer/program-point.cc | 1 + gcc/analyzer/program-state.cc | 1 + gcc/analyzer/region-model.cc | 342 ++++- gcc/analyzer/region-model.h | 71 +- gcc/c-family/ChangeLog | 4 + gcc/c-family/c.opt | 4 + gcc/c/c-decl.c | 3 + gcc/cgraphunit.c | 3 +- gcc/config/aarch64/aarch64.c | 5 +- gcc/config/aarch64/atomics.md | 5 +- gcc/config/aarch64/constraints.md | 7 + gcc/config/arc/arc.c | 6 +- gcc/config/arc/arc.h | 6 +- gcc/config/arc/linux.h | 3 +- gcc/config/arm/arm-builtins.c | 11 + gcc/config/arm/arm_mve.h | 1565 ++++++++++---------- gcc/config/arm/arm_mve_builtins.def | 30 +- gcc/config/arm/mve.md | 96 +- gcc/config/gcn/gcn-valu.md | 1352 ++++++++--------- gcc/config/host-linux.c | 2 + gcc/config/i386/sse.md | 35 +- gcc/config/pa/pa.c | 1 - gcc/config/rs6000/rs6000-call.c | 28 - gcc/config/rs6000/rs6000.c | 15 +- gcc/config/rs6000/rs6000.md | 116 +- gcc/config/s390/vector.md | 80 +- gcc/config/s390/vx-builtins.md | 78 +- gcc/cp/ChangeLog | 77 + gcc/cp/constexpr.c | 110 +- gcc/cp/constraint.cc | 188 ++- gcc/cp/cp-gimplify.c | 7 + gcc/cp/cp-tree.h | 1 + gcc/cp/parser.c | 31 +- gcc/cp/pt.c | 2 - gcc/cp/semantics.c | 9 +- gcc/cp/tree.c | 16 +- gcc/cp/typeck2.c | 2 +- gcc/cselib.c | 235 ++- gcc/d/ChangeLog | 40 + gcc/d/d-attribs.cc | 43 +- gcc/d/d-codegen.cc | 44 - gcc/d/d-tree.h | 6 +- gcc/d/decl.cc | 49 +- gcc/d/dmd/MERGE | 2 +- gcc/d/expr.cc | 20 +- gcc/d/modules.cc | 2 +- gcc/d/typeinfo.cc | 4 +- gcc/d/types.cc | 31 +- gcc/doc/extend.texi | 4 +- gcc/doc/invoke.texi | 12 +- gcc/dse.c | 57 +- gcc/fold-const.c | 8 +- gcc/fortran/ChangeLog | 40 + gcc/fortran/arith.c | 10 +- gcc/fortran/check.c | 4 + gcc/fortran/decl.c | 17 +- gcc/fortran/expr.c | 14 +- gcc/fortran/match.c | 1 + gcc/fortran/resolve.c | 6 +- gcc/gimple-ssa-store-merging.c | 3 +- gcc/jit/ChangeLog | 13 + gcc/jit/docs/topics/compatibility.rst | 33 + gcc/jit/libgccjit++.h | 22 + gcc/jit/libgccjit.c | 46 + gcc/jit/libgccjit.h | 16 + gcc/jit/libgccjit.map | 9 +- gcc/lower-subreg.c | 3 +- gcc/lra.c | 5 +- gcc/params.opt | 2 +- gcc/po/ChangeLog | 4 + gcc/po/sv.po | 377 ++--- gcc/rtl.h | 1 + gcc/testsuite/ChangeLog | 255 ++++ gcc/testsuite/c-c++-common/pr94385.c | 12 + gcc/testsuite/g++.dg/concepts/diagnostic1.C | 1 + gcc/testsuite/g++.dg/concepts/diagnostic2.C | 2 +- gcc/testsuite/g++.dg/concepts/diagnostic5.C | 43 + gcc/testsuite/g++.dg/concepts/diagnostic7.C | 11 + gcc/testsuite/g++.dg/concepts/diagnostic8.C | 6 + gcc/testsuite/g++.dg/concepts/pr94252.C | 27 + gcc/testsuite/g++.dg/cpp1y/constexpr-nsdmi2.C | 20 + gcc/testsuite/g++.dg/cpp1z/lambda-this4.C | 13 + gcc/testsuite/g++.dg/cpp2a/concepts-iconv1.C | 1 + gcc/testsuite/g++.dg/cpp2a/concepts-requires18.C | 2 +- gcc/testsuite/g++.dg/cpp2a/concepts-requires5.C | 2 +- gcc/testsuite/g++.dg/template/dependent-name14.C | 38 + gcc/testsuite/g++.dg/tree-ssa/pr94403.C | 37 + gcc/testsuite/gcc.c-torture/execute/pr94412.c | 28 + .../gcc.dg/analyzer/compound-assignment-1.c | 71 + .../gcc.dg/analyzer/compound-assignment-2.c | 24 + .../gcc.dg/analyzer/compound-assignment-3.c | 25 + gcc/testsuite/gcc.dg/pr93573-1.c | 12 + gcc/testsuite/gcc.dg/pr93573-2.c | 6 + gcc/testsuite/gcc.dg/pr94344.c | 53 + gcc/testsuite/gcc.dg/pr94368.c | 25 + gcc/testsuite/gcc.dg/pr94436.c | 13 + .../pr87197-debug-sms.c => sms-compare-debug-1.c} | 2 +- .../sms-compare-debug-2.c} | 3 +- gcc/testsuite/gcc.dg/ubsan/pr94423.c | 17 + gcc/testsuite/gcc.dg/vect/pr93069.c | 10 + gcc/testsuite/gcc.target/aarch64/pr94398.c | 24 + gcc/testsuite/gcc.target/aarch64/pr94435.c | 25 + .../gcc.target/arm/mve/intrinsics/vbicq_n_s16.c | 8 +- .../gcc.target/arm/mve/intrinsics/vbicq_n_s32.c | 8 +- .../gcc.target/arm/mve/intrinsics/vbicq_n_u16.c | 8 +- .../gcc.target/arm/mve/intrinsics/vbicq_n_u32.c | 8 +- .../arm/mve/intrinsics/vcmpcsq_m_n_u16.c | 2 +- .../arm/mve/intrinsics/vcmpcsq_m_n_u32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c | 2 +- .../arm/mve/intrinsics/vcmpgeq_m_n_s16.c | 2 +- .../arm/mve/intrinsics/vcmpgeq_m_n_s32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c | 2 +- .../arm/mve/intrinsics/vcmpgtq_m_n_f16.c | 2 +- .../arm/mve/intrinsics/vcmpgtq_m_n_f32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c | 2 +- .../arm/mve/intrinsics/vcmpleq_m_n_f16.c | 2 +- .../arm/mve/intrinsics/vcmpleq_m_n_f32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c | 2 +- .../arm/mve/intrinsics/vcmpltq_m_n_f16.c | 2 +- .../arm/mve/intrinsics/vcmpltq_m_n_f32.c | 2 +- .../arm/mve/intrinsics/vcmpneq_m_n_f16.c | 2 +- .../arm/mve/intrinsics/vcmpneq_m_n_f32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c | 2 +- .../arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c | 4 +- .../arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c | 4 +- .../mve/intrinsics/vldrdq_gather_base_wb_z_s64.c | 6 +- .../mve/intrinsics/vldrdq_gather_base_wb_z_u64.c | 6 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c | 4 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c | 4 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c | 4 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_f32.c | 6 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_s32.c | 6 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_u32.c | 6 +- gcc/testsuite/gcc.target/i386/avx512f-pr94343.c | 12 + gcc/testsuite/gcc.target/i386/avx512vl-pr93069.c | 12 + gcc/testsuite/gcc.target/i386/avx512vl-pr94343.c | 12 + gcc/testsuite/gcc.target/i386/pr57193.c | 3 +- gcc/testsuite/gcc.target/powerpc/bswap64-4.c | 6 +- gcc/testsuite/gcc.target/powerpc/pragma_misc9.c | 47 + gcc/testsuite/gcc.target/powerpc/pragma_power6.c | 17 + gcc/testsuite/gcc.target/powerpc/pragma_power7.c | 32 + gcc/testsuite/gcc.target/powerpc/pragma_power8.c | 52 + gcc/testsuite/gcc.target/powerpc/pragma_power9.c | 63 + .../gcc.target/powerpc/vsu/vec-all-nez-7.c | 3 +- .../gcc.target/powerpc/vsu/vec-any-eqz-7.c | 3 +- gcc/testsuite/gdc.dg/pr90136a.d | 21 + gcc/testsuite/gdc.dg/pr90136b.d | 21 + gcc/testsuite/gdc.dg/pr90136c.d | 9 + gcc/testsuite/gdc.dg/pr92216.d | 4 +- gcc/testsuite/gdc.dg/pr93038.d | 4 +- gcc/testsuite/gdc.dg/pr93038b.d | 5 +- gcc/testsuite/gdc.dg/pr94424.d | 19 + gcc/testsuite/gdc.test/compilable/compilable.exp | 30 + .../gdc.test/fail_compilation/fail_compilation.exp | 30 + gcc/testsuite/gdc.test/runnable/runnable.exp | 35 + .../gdc.test/{runnable => runnable_cxx}/cabi1.d | 0 .../{runnable => runnable_cxx}/cpp_abi_tests.d | 0 .../gdc.test/{runnable => runnable_cxx}/cppa.d | 0 .../{runnable => runnable_cxx}/externmangle.d | 0 .../{runnable => runnable_cxx}/externmangle2.d | 0 .../extra-files/cabi2.cpp | 0 .../extra-files/cpp_abi_tests.cpp | 0 .../extra-files/cppb.cpp | 0 .../extra-files/externmangle.cpp | 0 .../extra-files/externmangle2.cpp | 0 .../gdc.test/runnable_cxx/runnable_cxx.exp | 46 + gcc/testsuite/gfortran.dg/bessel_5_redux.f90 | 85 ++ .../gfortran.dg/graphite/vect-pr94043.f90 | 18 + gcc/testsuite/gfortran.dg/module_procedure_3.f90 | 27 + gcc/testsuite/gfortran.dg/pr93498_1.f90 | 11 + gcc/testsuite/gfortran.dg/pr93498_2.f90 | 12 + gcc/testsuite/gfortran.dg/pr94030_1.f90 | 11 + gcc/testsuite/gfortran.dg/pr94030_2.f90 | 33 + gcc/testsuite/gfortran.dg/pr94329.f90 | 12 + gcc/testsuite/gfortran.dg/select_rank_4.f90 | 26 + gcc/testsuite/gfortran.dg/vect/vect-8.f90 | 2 +- gcc/testsuite/jit.dg/all-non-failing-tests.h | 20 + gcc/testsuite/jit.dg/test-version.c | 26 + .../{gdc.test/gdc-test.exp => lib/gdc-utils.exp} | 118 +- gcc/testsuite/lib/gdc.exp | 106 +- gcc/tree-object-size.c | 5 +- gcc/tree-ssa-forwprop.c | 48 +- gcc/tree-ssa-reassoc.c | 14 +- gcc/tree-vect-loop.c | 50 +- gcc/tree-vect-stmts.c | 20 +- gcc/var-tracking.c | 24 +- include/ChangeLog | 5 + include/plugin-api.h | 2 +- libcpp/po/ChangeLog | 4 + libcpp/po/sr.po | 78 +- libgomp/ChangeLog | 5 + libgomp/target.c | 13 +- .../libgomp.fortran/target-enter-data-1.f90 | 36 + libstdc++-v3/ChangeLog | 78 + libstdc++-v3/doc/html/manual/appendix_free.html | 2 +- libstdc++-v3/doc/xml/manual/appendix_free.xml | 2 +- libstdc++-v3/include/bits/stl_iterator.h | 126 +- .../allocator_traits/members/92878_92947.cc} | 52 +- .../any/assign/92878_92947.cc} | 49 +- .../testsuite/20_util/any/cons/92878_92947.cc | 46 + .../20_util/is_constructible/92878_92947.cc | 49 + .../testsuite/20_util/is_constructible/value-2.cc | 4 + .../optional/assignment/92878_92947.cc} | 48 +- .../optional/cons/92878_92947.cc} | 47 +- .../pair/cons/92878_92947.cc} | 50 +- .../shared_ptr/creation/92878_92947.cc} | 47 +- .../construct_at/92878_92947.cc} | 51 +- .../testsuite/20_util/time_point/cons/81468.cc | 8 +- .../unique_ptr/creation/92878_92947.cc} | 47 +- .../20_util/uses_allocator/92878_92947.cc | 67 + .../testsuite/20_util/variant/92878_92947.cc | 91 ++ .../deque/modifiers/emplace/92878_92947.cc | 62 + .../forward_list/modifiers/92878_92947.cc | 62 + .../list/modifiers/emplace/92878_92947.cc | 78 + .../map/modifiers/emplace/92878_92947.cc | 137 ++ .../multimap/modifiers/emplace/92878_92947.cc | 71 + .../multiset/modifiers/emplace/92878_92947.cc | 70 + .../priority_queue/92878_92947.cc} | 53 +- .../queue/92878_92947.cc} | 48 +- .../set/modifiers/emplace/92878_92947.cc | 70 + .../stack/92878_92947.cc} | 48 +- .../unordered_map/modifiers/92878_92947.cc | 137 ++ .../unordered_multimap/modifiers/92878_92947.cc | 71 + .../unordered_multiset/modifiers/92878_92947.cc | 78 + .../unordered_set/modifiers/92878_92947.cc | 78 + .../vector/modifiers/emplace/92878_92947.cc | 61 + .../24_iterators/move_iterator/greedy_ops.cc | 8 +- .../24_iterators/move_iterator/rel_ops_c++20.cc | 34 + .../24_iterators/reverse_iterator/greedy_ops.cc | 8 +- .../24_iterators/reverse_iterator/rel_ops_c++20.cc | 61 +- .../net/execution_context/use_service.cc | 6 +- 243 files changed, 7564 insertions(+), 2806 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/pr94385.c create mode 100644 gcc/testsuite/g++.dg/concepts/diagnostic5.C create mode 100644 gcc/testsuite/g++.dg/concepts/diagnostic7.C create mode 100644 gcc/testsuite/g++.dg/concepts/diagnostic8.C create mode 100644 gcc/testsuite/g++.dg/concepts/pr94252.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-nsdmi2.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/lambda-this4.C create mode 100644 gcc/testsuite/g++.dg/template/dependent-name14.C create mode 100644 gcc/testsuite/g++.dg/tree-ssa/pr94403.C create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr94412.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/compound-assignment-1.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/compound-assignment-2.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/compound-assignment-3.c create mode 100644 gcc/testsuite/gcc.dg/pr93573-1.c create mode 100644 gcc/testsuite/gcc.dg/pr93573-2.c create mode 100644 gcc/testsuite/gcc.dg/pr94344.c create mode 100644 gcc/testsuite/gcc.dg/pr94368.c create mode 100644 gcc/testsuite/gcc.dg/pr94436.c rename gcc/testsuite/gcc.dg/{torture/pr87197-debug-sms.c => sms-compare-debug-1.c} (81%) rename gcc/testsuite/{gcc.c-torture/execute/pr70127-debug-sms.c => gcc.dg/sms-comp [...] create mode 100644 gcc/testsuite/gcc.dg/ubsan/pr94423.c create mode 100644 gcc/testsuite/gcc.dg/vect/pr93069.c create mode 100644 gcc/testsuite/gcc.target/aarch64/pr94398.c create mode 100644 gcc/testsuite/gcc.target/aarch64/pr94435.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-pr94343.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512vl-pr93069.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512vl-pr94343.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_misc9.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_power6.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_power7.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_power8.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_power9.c create mode 100644 gcc/testsuite/gdc.dg/pr90136a.d create mode 100644 gcc/testsuite/gdc.dg/pr90136b.d create mode 100644 gcc/testsuite/gdc.dg/pr90136c.d create mode 100644 gcc/testsuite/gdc.dg/pr94424.d create mode 100644 gcc/testsuite/gdc.test/compilable/compilable.exp create mode 100644 gcc/testsuite/gdc.test/fail_compilation/fail_compilation.exp create mode 100644 gcc/testsuite/gdc.test/runnable/runnable.exp rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/cabi1.d (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/cpp_abi_tests.d (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/cppa.d (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/externmangle.d (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/externmangle2.d (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/cabi2.cpp (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/cpp_abi_tests [...] rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/cppb.cpp (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/externmangle. [...] rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/externmangle2 [...] create mode 100644 gcc/testsuite/gdc.test/runnable_cxx/runnable_cxx.exp create mode 100644 gcc/testsuite/gfortran.dg/bessel_5_redux.f90 create mode 100644 gcc/testsuite/gfortran.dg/graphite/vect-pr94043.f90 create mode 100644 gcc/testsuite/gfortran.dg/module_procedure_3.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr93498_1.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr93498_2.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr94030_1.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr94030_2.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr94329.f90 create mode 100644 gcc/testsuite/gfortran.dg/select_rank_4.f90 create mode 100644 gcc/testsuite/jit.dg/test-version.c rename gcc/testsuite/{gdc.test/gdc-test.exp => lib/gdc-utils.exp} (80%) create mode 100644 libgomp/testsuite/libgomp.fortran/target-enter-data-1.f90 copy libstdc++-v3/testsuite/{24_iterators/move_iterator/greedy_ops.cc => 20_util/a [...] copy libstdc++-v3/testsuite/{24_iterators/reverse_iterator/greedy_ops.cc => 20_uti [...] create mode 100644 libstdc++-v3/testsuite/20_util/any/cons/92878_92947.cc create mode 100644 libstdc++-v3/testsuite/20_util/is_constructible/92878_92947.cc copy libstdc++-v3/testsuite/{24_iterators/move_iterator/greedy_ops.cc => 20_util/o [...] copy libstdc++-v3/testsuite/{24_iterators/move_iterator/greedy_ops.cc => 20_util/o [...] copy libstdc++-v3/testsuite/{24_iterators/move_iterator/greedy_ops.cc => 20_util/p [...] copy libstdc++-v3/testsuite/{24_iterators/move_iterator/greedy_ops.cc => 20_util/s [...] copy libstdc++-v3/testsuite/{24_iterators/move_iterator/greedy_ops.cc => 20_util/s [...] copy libstdc++-v3/testsuite/{24_iterators/move_iterator/greedy_ops.cc => 20_util/u [...] create mode 100644 libstdc++-v3/testsuite/20_util/uses_allocator/92878_92947.cc create mode 100644 libstdc++-v3/testsuite/20_util/variant/92878_92947.cc create mode 100644 libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/92 [...] create mode 100644 libstdc++-v3/testsuite/23_containers/forward_list/modifiers/928 [...] create mode 100644 libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/928 [...] create mode 100644 libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/9287 [...] create mode 100644 libstdc++-v3/testsuite/23_containers/multimap/modifiers/emplace [...] create mode 100644 libstdc++-v3/testsuite/23_containers/multiset/modifiers/emplace [...] copy libstdc++-v3/testsuite/{24_iterators/move_iterator/greedy_ops.cc => 23_contai [...] copy libstdc++-v3/testsuite/{24_iterators/move_iterator/greedy_ops.cc => 23_contai [...] create mode 100644 libstdc++-v3/testsuite/23_containers/set/modifiers/emplace/9287 [...] copy libstdc++-v3/testsuite/{24_iterators/move_iterator/greedy_ops.cc => 23_contai [...] create mode 100644 libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/92 [...] create mode 100644 libstdc++-v3/testsuite/23_containers/unordered_multimap/modifie [...] create mode 100644 libstdc++-v3/testsuite/23_containers/unordered_multiset/modifie [...] create mode 100644 libstdc++-v3/testsuite/23_containers/unordered_set/modifiers/92 [...] create mode 100644 libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/9 [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits April 2020