Tcwg-commits April 2020

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk_tk1/llvm-master-arm-spec2k6-Os updated (4a01f7b1e73 -> a950bb6e952)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/llvm-master-arm-spec2k6-Os in repository toolchain/ci/gcc. from 4a01f7b1e73 d: Fix missing dependencies in depfile for imported files ( [...] adds 88d7d0ce8fa testsuite: Fix lambda-vis.C for targets with user label pre [...] adds 85e10e4f0fa Darwin: Fix i686 bootstrap when the assembler supports GOTO [...] adds fbe60463bb8 d: Generate phony targets for content imported files (PR93038) adds 83aa5aa313a Daily bump. adds 6e00d8dcf32 Daily bump. adds b809f0b6580 Set proper DECL_ALIGN in offload_handle_link_vars (PR94233) adds 2fa4b1ffd6e Save ref->speculative_id before clone_reference. adds 263ee1260bc tree-optimization/94266 - aovid propagating addresses of TA [...] adds 7a2090b04e5 ipa/94245 - avoid folding when we want an ADDR_EXPR adds 26b3e568a60 [PR94044] Fix ICE with sizeof<argumentpack> adds a3586eeb884 AMDGCN offloading – use amdgcn-amdhsa adds ce6413087de lto/lto.c – used $ or . in generated linkptr name adds 4897bb0045d libgomp – fix declare target link handling (PR94251) adds b0d84ecc55f fortran: ICE in gfc_match_assignment PR93600 adds 4dcc4502f31 tree-optimization/94261 - avoid IL adjustments in SLP analysis adds 6debbff6ca3 arm: Add earlyclobber to MVE instructions that require it adds 962406639c0 testsuite, arm: Change tests to assemble adds 0cd55f9d3af libgccjit: handle long literals in playback::context::new_s [...] adds 1a5c27b1b43 [ARM][GCC][12x]: MVE ACLE intrinsics to set and get vector lane. adds 85244449104 [ARM][GCC][13x]: MVE ACLE scalar shift intrinsics. adds 88c9a831f3a [ARM][GCC][14x]: MVE ACLE whole vector left shift with carr [...] adds d326e9586b4 driver: Improve the generated help text for alias options adds 5db9e89323c c: Fix up cfun->function_end_locus on invalid function bodi [...] adds ca6c722561c c++: Handle COMPOUND_EXPRs in get_narrower and warnings_for [...] adds 1f6c1c82eb5 c++: Avoid a suspicious -Wnoexcept warning [PR93805] adds 75fb811dfaa Verify the code used for the optimized comparison is valid [...] adds c86c99e6950 Update gcc es.po, sv.po. adds 75c24a08d69 Daily bump. adds 047811579f0 cgraphunit: Avoid code generation differences based on -w/T [...] adds a5a9400a846 if-conv: Fix -fcompare-debug bugs in ifcvt_local_dce [PR94283] adds 565ab7efbdc loop-manip: Avoid -fcompare-debug issues in create_iv [PR94285] adds 596c90d3559 arm: Fix arm {,u}subvdi4 and usubvsi4 expanders [PR94286] adds 906b3eb9df6 Improve endianess detection. adds c2211a60ff0 Fix OpenMP offload handling for target-link variables for n [...] adds 04099157691 Define __BIG_ENDIAN__ adds 8001f59c82b [testsuite,arm] target-supports.exp: Add arm_fp_dp_ok effec [...] adds 2a0eaca3e9c [testsuite,arm] cmp-2.c: Move double-precision tests to cmp-3.c adds 07f8bcc6ea9 [testsuite,arm] use arm_fp_dp_ok effective-target adds 6e771c087b1 c++: Give more expressions locations. adds 5c161741843 c++: Fix template parm with dependent type in concepts. adds fddfd3ce555 c++: Improve handling of ill-formed constraints [PR94186]. adds 75b7b7fdc45 c++: Fix wrong no post-decrement operator error in template [...] adds 0c1c8d9f137 Daily bump. adds adaf4b6c66e Test for sigsetjmp support in analyzer tests requiring that [...] adds c2133167ad5 if-conv: Delete dead stmts backwards in ifcvt_local_dce [PR94283] adds f1154b4d3c5 sccvn: Fix buffer overflow in push_partial_def [PR94300] adds 158cccea0d0 middle-end: Avoid using DECL_UID in ASM_FORMAT_PRIVATE_NAME [...] adds 5f18995e23e varasm: Fix output_constructor where a RANGE_EXPR index nee [...] adds c38daa79768 fortran: ICE using undeclared symbol in array constructor PR93484 adds c8504ebef1d testsuite: Fix up FAILs in gfortran testsuite with -fcompar [...] adds 0fb0240a051 Fix handling of --with{,out}-zstd option. adds 724ec02c2c6 Make target_clones resolver fn static if possible. adds d5ad8ee04a7 i386: Fix ix86_add_reg_usage_to_vzeroupper [PR94308] adds 780f1cfd8ee testsuite: Mention cleanup-13.c test is incompatible with - [...] adds 68c4570a4de Do not error about missing zstd unless --with-zstd. adds 83dfa06cb5c coroutines: Fix missing dereference (PR94319). adds 0fca105f8ca Fix gcc.dg/pr92301.c on targets that don't support argc/argv. adds 05c13c43990 PR tree-optimization/94131 - ICE on printf with a VLA strin [...] adds c7a252ba2d0 c++: Fix invalid -Wduplicated-cond warning [PR94265] adds 713ecb3d417 rs6000: Allow FPRs to change between SDmode and DDmode [...] adds b5228b1bc8c PR middle-end/94004 - missing -Walloca on calls to alloca d [...] adds 6e4cd3cd259 arm: Fix ICE caused by arm_gen_dicompare_reg [PR94292] adds eeb0c7c0713 Fix vector-compare-1 regressions on sh4/sh4eb caused by pat [...] adds 48817fbd761 Fix vector-compare-1 regressions on sh4/sh4eb caused by [...] adds fe4b53b2e7e testsuite: adjustments for amdgcn adds bf1fc37bb4a libstdc++: Define and use chrono::is_clock for C++20 adds e3ef371982a libstdc++ Add missing tests for std::shared_timed_mutex adds 9673d11ec53 libstdc++: Fix author in previous ChangeLog entry adds e97929e20b2 [PATCH] rs6000: vec_rlnm fix to make builtin work according to ABI adds 27f8c8c4c92 Daily bump. adds d21dff5b4fe widening_mul: restrict ops to be defined in the same basic- [...] adds 9708ca2be40 var-tracking: Mark as sp based more VALUEs [PR92264] adds 5a1706f63a2 c++: Fix a -fcompare-debug issue with DEBUG_BEGIN_STMT stmt [...] adds dab932d1519 c++: Fix up user_provided_p [PR81349] adds 10ea09ee846 gimplify: Fix -fcompare-debug differences caused by gimplif [...] adds d6730f06420 Skip test for non-x86 targets. adds da920d0c46c tree: Fix -fcompare-debug issues due to protected_set_expr_ [...] adds 40cdcddf274 Fix UNRESOLVED test-case. adds e519d644999 arm: unified syntax for libgcc when built with -Os [PR94220] adds 16948c54b75 libstdc++: Add some C++20 additions to <chrono> adds 2a1f0f64160 coroutines: Implement n4849 changes to exception handling. adds 6d85947d23a coroutines: Implement n4849 recommended symmetric transfer. adds 517f5356bb0 c++: DR1710, template keyword in a typename-specifier [PR94057] adds b1c905ba83e Update gcc .po files. adds f9c38702e96 Daily bump. adds 65937db83cd coroutines, testsuite: Fix symmetric-transfer-00-basic.C on Linux. adds 54f58e9416d c++: Remove redundant calls to type_dependent_expression_p adds 71d69548a1b c++: template keyword accepted before destructor names [PR94336] adds 06d5d63d994 modulo-sched: fix bootstrap compare-debug issue adds 72809d6fe8e c++: Handle COMPOUND_EXPRs in ocp_convert [PR94339] adds 2eea00c518d c++: Avoid calls in non-evaluated contexts affect whether f [...] adds a76ff304f90 Fortran] Reject invalid association target (PR93363) adds a9cd2d786ad fixup: move ChangeLog entry for last Arm fix to correct file. adds 66e0e23c12d fixup: move ChangeLog entry for last Arm fix to correct file. adds 8d689cf43b5 Fix PR90332 by extending half size vector mode adds 62ede14d30f [Fortran] Fix ICE with deferred-rank arrays (PR93957) adds 917e21e8bcd tree-optimization/94352 - fix uninitialized use of curr_order adds 45cfaf9903d debug/94273 - avoid creating type DIEs for DINFO_LEVEL_TERSE adds 4d661bb7a2e analyzer: tweaks to superedge::dump adds 8f02357571a analyzer: improvements to diagnostic-manager.cc logging adds 42c63313252 analyzer: add new supergraph visualization adds 6969ac301f2 analyzer: fix malloc pointer NULL-ness adds 9dba60130dc c++: Fix ICE after ambiguous inline namespace reopen [PR94257] adds 04dd734b52d c++: avoid -Wredundant-tags on a first declaration in use [ [...] adds 038769535a8 amdgcn: refactor mode iterators adds ccacf77be55 PR c++/94098 - ICE on attribute access redeclaration adds c7fc15f54b3 [pr84733] Fix ICE popping local scope adds 52f24a9e989 PR c++/94346 - [9/10 Regression] ICE due to handle_copy_att [...] adds 54de5afb4a9 c++: Handle COMPOUND_EXPRs in ocp_convert [PR94339] adds 19e5389debb [RS6000] PR94145, make PLT loads volatile adds 491009b609d Update gcc de.po. adds 0302a2de7f1 libstdc++: Move definition earlier in file adds ae6076b5bc1 libstdc++: Implement C++20 changes to insert iterators adds 81a8d137c22 libstdc++: Add remaining C++20 changes to iterator adaptors adds b8a28a06eaf libstdc++: Define __cpp_lib_ranges macro for C++20 adds c2781192292 Daily bump. adds 679becf175c reassoc: Fix -fcompare-debug bug in reassociate_bb [PR94329] adds c6a562de88c c: After issuing errors about array size, for error-recover [...] adds 75defde9fb5 c++: Replay errors during diagnosis of constraint satisfact [...] adds cd68edf894d c++: Respect current_constraint_diagnosis_depth in diagnose [...] adds a7ea3d2ced7 c++: requires-expression outside of a template is misevalua [...] adds 7981c06ae92 c++: Diagnose when "requires" is used instead of "requires [...] adds 3fb7f2fbd5f [Fortran] Fix result-variable handling of MODULE PROCEDURE [...] adds 7d57570b065 Patch for PR94246 adds 946a444df34 testsuite: adjust modulo-sched compare-debug tests adds 42cda3ba45f libstdc++: Fix std::reverse_iterator relational operators adds f6b2b79040d libstdc++: Fix two tests that fail in C++20 mode adds 673bb288e62 Daily bump. adds c76df72f1a9 testsuite: Split up gdc-test.exp into each subdirectory adds 46b7d819f7c Delete duplicate .align output. adds 85f6f317ec8 Fix typo in a warning related to flatten. adds afd9da8b8ad testsuite: Move C++ tests in gdc.test into own subdirectory. adds 60c254b279e testsuite: Handle more kinds of gdc.test test flags and dir [...] adds dacc7effeea doc: Update -falign-functions/-falign-loops/-falign-jumps adds 2a93fb6e962 Daily bump. adds 07c48b61a08 [RS6000] Put call cookie back in AIX/ELFv2 call patterns adds ec919cfcef8 Fix vextract* masked patterns [PR93069] adds 3a9db91bee4 Fix scan pattern of vect-8.f90 dump. adds 291aa50a631 XFAIL pr57193.c test-case. adds 5abbfd3cd36 i386: Fix up *one_cmplv*2* insn with avx512f [PR94343] adds 48c18af43fa Update bswap64-4 test for desired results adds 841e721579b RS6000 Allow builtin initialization regardless of mask adds 48e331d6382 Define TRY_EMPTY_VM_SPACE for riscv64-linux adds 1cb1986cb59 c++: Fix handling of internal fn calls in statement express [...] adds 5830f753559 c++: Fix comparison of fn() and ns::fn() [PR90711] adds 9f6abd1b03e Update gcc sv.po. adds 13a29fc5730 Daily bump. adds 3809bcd6c0e lra: set insn_code_data to NULL when freeing adds 56f0b32476c forwprop: Pattern recognize more rotates [PR94344] adds 5ea39b24122 store-merging: Allow enums during bswap recognition [PR94403] adds 1dcffc8ddc4 fold-const: Fix division folding with vector operands [PR94412] adds a27c534794d aarch64: Fix up aarch64_compare_and_swaphi pattern [PR94368] adds e81d0d9ec7a [ARM][PATCH]: Add support for MVE ACLE intrinsics polymorph [...] adds cea1fc6f67d arc: Allow more ABIs in GLIBC_DYNAMIC_LINKER adds 1ef979c6966 [ARM][PATCH]: Add MVE ACLE intrinsics vbicq_n_* polymorphic [...] adds d08a318b4fd arc: Cleanup compilation warning adds dc56917d111 arc: Update operand printing adds 1165109b401 amdgcn: generalize vector insn modes adds 48742e02d71 d: Use d_comdat_linkage on generated internal decl. adds e06cde870ed Library-side tests for parenthesized aggregate init adds f14b41d2712 vect: ICE: in vectorizable_load, at tree-vect-stmts.c:9173 [...] adds e8e0acbaa38 d: Use memset to fill alignment holes with zeroes. adds 331c438d5a6 Update cpplib sr.po. adds 689418b97e5 libgomp – fix handling of 'target enter data' adds 63b2923dc6f libgccjit: add new version entry point adds 1c16f7fc903 d: Add always_inline to the internal attribute table. adds 013fca64fc1 d: Merge UDAs between function prototype and definitions (PR90136) adds 73dd051894b Daily bump. adds 595f1b1274b c++: Adjust formatting. adds 76f09260b7e c++: Fix DMI with lambda 'this' capture [PR94205] adds bd0f22a8d5c Fix PR94043 by making vect_live_op generate lc-phi adds 142d68f50b4 Fix typo in a macro usage. adds 9ecb3ecc8cc objsz: Don't call replace_uses_by on SSA_NAME_OCCURS_IN_ABN [...] adds d3ee88fdb4e Clear me from patch ownership. adds 0c9a8a8c103 fortran : FAIL: gfortran.dg/pr93365.f90 PR94386 adds e899d4b7125 Add testcase for already fixed PR [PR94436] adds 032f2366a4c rs6000: Make code questionably using r2 not ICE (PR94420) adds dd5da571731 doc: Fix a typo in the documentation of the copy attribute adds 43d011eb054 Whoops, forgot the changelog adds b60bd122dc7 doc: Fix typo adds 7546463b9f7 subreg: Fix PR94123, SVN r273240 causes gcc.target/powerpc/ [...] adds a96f1c38a78 analyzer: handle compound assignments [PR94378] adds 6c557ba5380 libstdc++: Move "free books" list from fsf.org to gnu.org adds fb25041e11d d: Fix gdc.dg/pr92216.d FAILs on 32-bit targets adds 918b89b7623 d: Fix new tests gdc.dg/pr93038.d and gdc.dg/pr93038b.d in [...] adds 25839b6af9f Daily bump. adds bf1f6d8819a fortran: ICE equivalence with an element of an array PR94030 adds 2c54eab5a30 fortran : ICE in gfc_resolve_findloc PR93498 adds b7a98f48e06 S/390: Remove superfluous commutative constraint modifiers adds 224efaf7e1e [Fortran] Fix error cleanup of select rank (PR93522) adds c1effaa209f libstdc++-v3/test: Better skip for "use_service.cc" adds ff825b81583 [ARM]: Fix for MVE ACLE intrinsics with writeback (PR94317). adds 66e327517b1 aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435] adds df562b12d90 aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435] adds 2c0fa3ecf70 cselib: Reuse VALUEs on sp adjustments [PR92264] adds 86c92411320 params: Decrease -param=max-find-base-term-values= default [...] adds d4ed2cd13d0 sra/doc: Document param sra-max-propagations adds 68cbee9bf53 Fix up -Wliteral-suffix warning on mti-linux.h adds 81ce375d1fd Fix PR94401 by considering reverse overrun adds 879bc686a0a doc: RISC-V: Update binutils requirement to 2.30 adds 54af95767e8 debug/94450 - remove DW_TAG_imported_unit generated in LTRA [...] adds 75efe9cb1f8 c/94392 - only enable -ffinite-loops for C++ adds b90061c6ec0 Prevent IPA-SRA from creating calls to local comdats (PR 92676) adds 3ab216a4d2f [Fortran] Resolve formal args before checking DTIO adds 0cd74f35889 Fix fortran/85982 ICE in resolve_component. adds a950bb6e952 Fix check_effective_target_sigsetjmp for glibc targets. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 1003 ++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 141 + gcc/analyzer/analyzer.h | 1 + gcc/analyzer/checker-path.cc | 1 + gcc/analyzer/constraint-manager.cc | 1 + gcc/analyzer/diagnostic-manager.cc | 48 +- gcc/analyzer/diagnostic-manager.h | 32 + gcc/analyzer/engine.cc | 274 +- gcc/analyzer/exploded-graph.h | 24 +- gcc/analyzer/program-point.cc | 1 + gcc/analyzer/program-state.cc | 3 +- gcc/analyzer/region-model.cc | 403 +- gcc/analyzer/region-model.h | 81 +- gcc/analyzer/state-purge.cc | 21 +- gcc/analyzer/state-purge.h | 5 +- gcc/analyzer/supergraph.cc | 56 +- gcc/analyzer/supergraph.h | 19 +- gcc/c-family/ChangeLog | 29 + gcc/c-family/c-attribs.c | 35 +- gcc/c-family/c-opts.c | 4 + gcc/c-family/c-warn.c | 5 + gcc/c-family/c.opt | 4 + gcc/c/ChangeLog | 8 + gcc/c/c-decl.c | 3 + gcc/c/c-parser.c | 7 +- gcc/calls.c | 82 +- gcc/cfgloop.h | 4 + gcc/cfgloopmanip.c | 1 + gcc/cgraphunit.c | 15 +- gcc/common.opt | 2 +- gcc/config/aarch64/aarch64.c | 5 +- gcc/config/aarch64/atomics.md | 5 +- gcc/config/aarch64/constraints.md | 7 + gcc/config/arc/arc.c | 6 +- gcc/config/arc/arc.h | 6 +- gcc/config/arc/linux.h | 3 +- gcc/config/arm/arm-builtins.c | 31 + gcc/config/arm/arm.c | 2 +- gcc/config/arm/arm.md | 7 +- gcc/config/arm/arm_mve.h | 2058 ++- gcc/config/arm/arm_mve_builtins.def | 48 +- gcc/config/arm/iterators.md | 3 + gcc/config/arm/mve.md | 493 +- gcc/config/arm/neon.md | 21 +- gcc/config/arm/vec-common.md | 33 + gcc/config/gcn/gcn-valu.md | 2102 +-- gcc/config/gcn/gcn.md | 2 + gcc/config/host-linux.c | 2 + gcc/config/i386/darwin.h | 10 + gcc/config/i386/i386-features.c | 4 + gcc/config/i386/i386.h | 5 +- gcc/config/i386/sse.md | 35 +- gcc/config/mips/mti-linux.h | 2 +- gcc/config/pa/pa.c | 1 - gcc/config/pa/pa.h | 1 + gcc/config/rs6000/altivec.h | 2 +- gcc/config/rs6000/rs6000-call.c | 28 - gcc/config/rs6000/rs6000.c | 46 +- gcc/config/rs6000/rs6000.md | 136 +- gcc/config/s390/vector.md | 80 +- gcc/config/s390/vx-builtins.md | 78 +- gcc/config/sh/sh.md | 8 +- gcc/configure | 13 +- gcc/configure.ac | 9 +- gcc/cp/ChangeLog | 237 + gcc/cp/call.c | 16 +- gcc/cp/class.c | 10 +- gcc/cp/constexpr.c | 110 +- gcc/cp/constraint.cc | 267 +- gcc/cp/coroutines.cc | 309 +- gcc/cp/cp-gimplify.c | 36 + gcc/cp/cp-tree.h | 7 +- gcc/cp/cvt.c | 11 + gcc/cp/decl.c | 3 +- gcc/cp/decl2.c | 3 +- gcc/cp/except.c | 5 +- gcc/cp/method.c | 2 +- gcc/cp/name-lookup.c | 63 +- gcc/cp/parser.c | 358 +- gcc/cp/pt.c | 13 +- gcc/cp/semantics.c | 9 +- gcc/cp/tree.c | 22 +- gcc/cp/typeck2.c | 2 +- gcc/cselib.c | 235 +- gcc/d/ChangeLog | 46 + gcc/d/d-attribs.cc | 43 +- gcc/d/d-codegen.cc | 44 - gcc/d/d-lang.cc | 39 +- gcc/d/d-tree.h | 6 +- gcc/d/decl.cc | 49 +- gcc/d/dmd/MERGE | 2 +- gcc/d/expr.cc | 20 +- gcc/d/modules.cc | 2 +- gcc/d/typeinfo.cc | 4 +- gcc/d/types.cc | 31 +- gcc/ddg.c | 169 +- gcc/ddg.h | 3 - gcc/doc/extend.texi | 4 +- gcc/doc/install.texi | 28 +- gcc/doc/invoke.texi | 28 +- gcc/doc/sourcebuild.texi | 11 + gcc/dse.c | 57 +- gcc/dwarf2out.c | 21 +- gcc/fold-const.c | 8 +- gcc/fortran/ChangeLog | 83 + gcc/fortran/arith.c | 10 +- gcc/fortran/check.c | 4 + gcc/fortran/decl.c | 47 +- gcc/fortran/expr.c | 46 +- gcc/fortran/gfortran.h | 1 + gcc/fortran/interface.c | 4 +- gcc/fortran/match.c | 13 +- gcc/fortran/resolve.c | 50 +- gcc/fortran/trans-array.c | 6 +- gcc/gimple-fold.c | 12 +- gcc/gimple-ssa-store-merging.c | 3 +- gcc/gimple-ssa-warn-alloca.c | 65 +- gcc/gimple.h | 14 +- gcc/gimplify.c | 35 +- gcc/graphviz.cc | 44 +- gcc/graphviz.h | 6 + gcc/ipa-icf-gimple.c | 2 + gcc/ipa-prop.c | 2 +- gcc/ipa-sra.c | 38 +- gcc/jit/ChangeLog | 24 + gcc/jit/docs/topics/compatibility.rst | 33 + gcc/jit/jit-playback.c | 16 +- gcc/jit/jit-playback.h | 1 - gcc/jit/libgccjit++.h | 22 + gcc/jit/libgccjit.c | 46 + gcc/jit/libgccjit.h | 16 + gcc/jit/libgccjit.map | 9 +- gcc/langhooks.c | 5 +- gcc/lower-subreg.c | 3 +- gcc/lra.c | 5 +- gcc/lto-streamer-in.c | 1 + gcc/lto-streamer-out.c | 1 + gcc/lto/ChangeLog | 22 + gcc/lto/lto-lang.c | 3 +- gcc/lto/lto.c | 13 +- gcc/modulo-sched.c | 13 +- gcc/multiple_target.c | 4 - gcc/omp-offload.c | 14 +- gcc/opts.c | 30 +- gcc/params.opt | 2 +- gcc/po/ChangeLog | 18 + gcc/po/be.po | 15546 +++++++++------- gcc/po/da.po | 16726 ++++++++++-------- gcc/po/de.po | 15296 +++++++++------- gcc/po/el.po | 15654 ++++++++++------- gcc/po/es.po | 15527 +++++++++------- gcc/po/fi.po | 17525 ++++++++++--------- gcc/po/fr.po | 15310 +++++++++------- gcc/po/hr.po | 15206 +++++++++------- gcc/po/id.po | 17084 +++++++++--------- gcc/po/ja.po | 16929 ++++++++++-------- gcc/po/nl.po | 16172 +++++++++-------- gcc/po/ru.po | 15477 +++++++++------- gcc/po/sr.po | 16946 +++++++++--------- gcc/po/sv.po | 15834 ++++++++++------- gcc/po/tr.po | 17101 +++++++++--------- gcc/po/uk.po | 17022 ++++++++++-------- gcc/po/vi.po | 15520 +++++++++------- gcc/po/zh_CN.po | 17326 +++++++++--------- gcc/po/zh_TW.po | 17429 +++++++++--------- gcc/rtl.h | 1 + gcc/simplify-rtx.c | 51 + gcc/symtab.c | 9 +- gcc/testsuite/ChangeLog | 3028 ++++ gcc/testsuite/c-c++-common/attr-copy.c | 43 + gcc/testsuite/c-c++-common/pr94385.c | 12 + .../c-c++-common/ubsan/float-cast-overflow-1.c | 2 +- .../c-c++-common/ubsan/float-cast-overflow-2.c | 2 +- .../c-c++-common/ubsan/float-cast-overflow-4.c | 2 +- gcc/testsuite/g++.dg/abi/lambda-vis.C | 12 +- gcc/testsuite/g++.dg/concepts/diagnostic1.C | 1 + gcc/testsuite/g++.dg/concepts/diagnostic2.C | 2 +- gcc/testsuite/g++.dg/concepts/diagnostic5.C | 43 + gcc/testsuite/g++.dg/concepts/diagnostic7.C | 11 + gcc/testsuite/g++.dg/concepts/diagnostic8.C | 6 + gcc/testsuite/g++.dg/concepts/pr84330.C | 2 +- gcc/testsuite/g++.dg/concepts/pr94252.C | 27 + gcc/testsuite/g++.dg/conversion/op7.C | 22 + .../coroutines/torture/co-ret-09-bool-await-susp.C | 44 +- .../torture/exceptions-test-01-n4849-a.C | 213 + .../torture/symmetric-transfer-00-basic.C | 111 + gcc/testsuite/g++.dg/cpp1y/alias-decl1.C | 9 + gcc/testsuite/g++.dg/cpp1y/alias-decl2.C | 8 + gcc/testsuite/g++.dg/cpp1y/alias-decl3.C | 9 + gcc/testsuite/g++.dg/cpp1y/constexpr-nsdmi2.C | 20 + gcc/testsuite/g++.dg/cpp1z/lambda-this4.C | 13 + gcc/testsuite/g++.dg/cpp1z/pr81349.C | 29 + gcc/testsuite/g++.dg/cpp2a/concepts-iconv1.C | 1 + gcc/testsuite/g++.dg/cpp2a/concepts-nonbool1.C | 20 + gcc/testsuite/g++.dg/cpp2a/concepts-nonbool2.C | 11 + gcc/testsuite/g++.dg/cpp2a/concepts-requires1.C | 4 +- gcc/testsuite/g++.dg/cpp2a/concepts-requires18.C | 2 +- gcc/testsuite/g++.dg/cpp2a/concepts-requires2.C | 12 +- gcc/testsuite/g++.dg/cpp2a/concepts-requires5.C | 2 +- gcc/testsuite/g++.dg/debug/pr94272.C | 14 + gcc/testsuite/g++.dg/debug/pr94273.C | 4 + gcc/testsuite/g++.dg/debug/pr94281.C | 11 + gcc/testsuite/g++.dg/debug/pr94323.C | 13 + gcc/testsuite/g++.dg/ext/attr-access-2.C | 88 + gcc/testsuite/g++.dg/ext/stmtexpr15.C | 2 +- gcc/testsuite/g++.dg/lookup/pr84733.C | 21 + gcc/testsuite/g++.dg/lookup/pr94257.C | 16 + gcc/testsuite/g++.dg/opt/pr94223.C | 5 + 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| 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c | 1 - .../arm/mve/intrinsics/vcmpleq_m_n_f16.c | 3 +- .../arm/mve/intrinsics/vcmpleq_m_n_f32.c | 3 +- .../arm/mve/intrinsics/vcmpleq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vcmpleq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c | 1 - 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| 1 - .../arm/mve/intrinsics/vcmulq_rot270_f16.c | 1 - .../arm/mve/intrinsics/vcmulq_rot270_f32.c | 1 - .../arm/mve/intrinsics/vcmulq_rot270_m_f16.c | 1 - .../arm/mve/intrinsics/vcmulq_rot270_m_f32.c | 1 - .../arm/mve/intrinsics/vcmulq_rot270_x_f16.c | 1 - .../arm/mve/intrinsics/vcmulq_rot270_x_f32.c | 1 - .../arm/mve/intrinsics/vcmulq_rot90_f16.c | 1 - .../arm/mve/intrinsics/vcmulq_rot90_f32.c | 1 - .../arm/mve/intrinsics/vcmulq_rot90_m_f16.c | 1 - .../arm/mve/intrinsics/vcmulq_rot90_m_f32.c | 1 - .../arm/mve/intrinsics/vcmulq_rot90_x_f16.c | 1 - .../arm/mve/intrinsics/vcmulq_rot90_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcreateq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcreateq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcreateq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcreateq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcreateq_s64.c | 1 - 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| 1 - .../gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c | 1 - .../arm/mve/intrinsics/vmladavaq_p_u16.c | 1 - .../arm/mve/intrinsics/vmladavaq_p_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaq_u8.c | 1 - .../arm/mve/intrinsics/vmladavaxq_p_s16.c | 1 - .../arm/mve/intrinsics/vmladavaxq_p_s32.c | 1 - .../arm/mve/intrinsics/vmladavaxq_p_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c | 1 - 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.../gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_u8.c | 1 - .../arm/mve/intrinsics/vuninitializedq_float.c | 1 - .../arm/mve/intrinsics/vuninitializedq_float1.c | 1 - .../arm/mve/intrinsics/vuninitializedq_int.c | 1 - .../arm/mve/intrinsics/vuninitializedq_int1.c | 1 - gcc/testsuite/gcc.target/arm/mve/mve.exp | 2 + gcc/testsuite/gcc.target/arm/vfp-1.c | 4 +- gcc/testsuite/gcc.target/arm/vfp-ldmdbd.c | 4 +- gcc/testsuite/gcc.target/arm/vfp-ldmiad.c | 4 +- gcc/testsuite/gcc.target/arm/vfp-stmdbd.c | 4 +- gcc/testsuite/gcc.target/arm/vfp-stmiad.c | 4 +- gcc/testsuite/gcc.target/arm/vnmul-1.c | 4 +- gcc/testsuite/gcc.target/arm/vnmul-3.c | 4 +- gcc/testsuite/gcc.target/arm/vnmul-4.c | 4 +- gcc/testsuite/gcc.target/i386/avx512f-pr94300.c | 21 + gcc/testsuite/gcc.target/i386/avx512f-pr94343.c | 12 + gcc/testsuite/gcc.target/i386/avx512vl-pr93069.c | 12 + gcc/testsuite/gcc.target/i386/avx512vl-pr94343.c | 12 + gcc/testsuite/gcc.target/i386/pr57193.c | 3 +- gcc/testsuite/gcc.target/i386/pr81213-2.c | 12 + gcc/testsuite/gcc.target/i386/pr81213.c | 12 +- gcc/testsuite/gcc.target/i386/pr94283.c | 5 + gcc/testsuite/gcc.target/i386/pr94308.c | 31 + gcc/testsuite/gcc.target/powerpc/bswap64-4.c | 6 +- gcc/testsuite/gcc.target/powerpc/pragma_misc9.c | 47 + gcc/testsuite/gcc.target/powerpc/pragma_power6.c | 17 + gcc/testsuite/gcc.target/powerpc/pragma_power7.c | 32 + gcc/testsuite/gcc.target/powerpc/pragma_power8.c | 52 + gcc/testsuite/gcc.target/powerpc/pragma_power9.c | 63 + .../gcc.target/powerpc/vsu/vec-all-nez-7.c | 3 +- .../gcc.target/powerpc/vsu/vec-any-eqz-7.c | 3 +- gcc/testsuite/gdc.dg/pr90136a.d | 21 + gcc/testsuite/gdc.dg/pr90136b.d | 21 + gcc/testsuite/gdc.dg/pr90136c.d | 9 + gcc/testsuite/gdc.dg/pr92216.d | 4 +- gcc/testsuite/gdc.dg/pr93038.d | 4 +- gcc/testsuite/gdc.dg/pr93038b.d | 11 + gcc/testsuite/gdc.dg/pr94424.d | 19 + gcc/testsuite/gdc.test/compilable/compilable.exp | 30 + .../gdc.test/fail_compilation/fail_compilation.exp | 30 + gcc/testsuite/gdc.test/gdc-test.exp | 469 - gcc/testsuite/gdc.test/runnable/runnable.exp | 35 + .../gdc.test/{runnable => runnable_cxx}/cabi1.d | 0 .../{runnable => runnable_cxx}/cpp_abi_tests.d | 0 .../gdc.test/{runnable => runnable_cxx}/cppa.d | 0 .../{runnable => runnable_cxx}/externmangle.d | 0 .../{runnable => runnable_cxx}/externmangle2.d | 0 .../extra-files/cabi2.cpp | 0 .../extra-files/cpp_abi_tests.cpp | 0 .../extra-files/cppb.cpp | 0 .../extra-files/externmangle.cpp | 0 .../extra-files/externmangle2.cpp | 0 .../gdc.test/runnable_cxx/runnable_cxx.exp | 46 + gcc/testsuite/gfortran.dg/associate_51.f90 | 2 +- gcc/testsuite/gfortran.dg/associate_53.f90 | 71 + gcc/testsuite/gfortran.dg/assumed_rank_19.f90 | 37 + gcc/testsuite/gfortran.dg/bessel_5_redux.f90 | 85 + gcc/testsuite/gfortran.dg/dec_structure_28.f90 | 35 + gcc/testsuite/gfortran.dg/dtio_35.f90 | 50 + .../gfortran.dg/graphite/vect-pr94043.f90 | 18 + .../gfortran.dg/iso_c_binding_compiler_1.f90 | 3 + .../gfortran.dg/iso_c_binding_compiler_3.f90 | 3 + gcc/testsuite/gfortran.dg/module_procedure_3.f90 | 27 + gcc/testsuite/gfortran.dg/pr93365.f90 | 15 + gcc/testsuite/gfortran.dg/pr93484_1.f90 | 8 + gcc/testsuite/gfortran.dg/pr93484_2.f90 | 8 + gcc/testsuite/gfortran.dg/pr93498_1.f90 | 11 + gcc/testsuite/gfortran.dg/pr93498_2.f90 | 12 + gcc/testsuite/gfortran.dg/pr93600_1.f90 | 9 + gcc/testsuite/gfortran.dg/pr93600_2.f90 | 10 + gcc/testsuite/gfortran.dg/pr94030_1.f90 | 11 + gcc/testsuite/gfortran.dg/pr94030_2.f90 | 33 + gcc/testsuite/gfortran.dg/pr94285.f90 | 5 + gcc/testsuite/gfortran.dg/pr94329.f90 | 12 + gcc/testsuite/gfortran.dg/select_rank_4.f90 | 26 + .../gfortran.dg/unlimited_polymorphic_31.f03 | 3 + gcc/testsuite/gfortran.dg/vect/vect-8.f90 | 2 +- gcc/testsuite/jit.dg/all-non-failing-tests.h | 30 + gcc/testsuite/jit.dg/test-long-string-literal.c | 54 + gcc/testsuite/jit.dg/test-version.c | 26 + gcc/testsuite/lib/gdc-utils.exp | 475 + gcc/testsuite/lib/gdc.exp | 106 +- gcc/testsuite/lib/target-supports.exp | 71 +- gcc/tree-cfg.c | 3 + gcc/tree-if-conv.c | 24 +- gcc/tree-object-size.c | 5 +- gcc/tree-ssa-forwprop.c | 49 +- gcc/tree-ssa-loop-manip.c | 12 +- gcc/tree-ssa-loop-niter.c | 2 +- gcc/tree-ssa-math-opts.c | 6 +- gcc/tree-ssa-propagate.c | 19 +- gcc/tree-ssa-reassoc.c | 14 +- gcc/tree-ssa-sccvn.c | 2 + gcc/tree-ssa-strlen.c | 14 +- gcc/tree-vect-loop.c | 50 +- gcc/tree-vect-slp.c | 54 +- gcc/tree-vect-stmts.c | 210 +- gcc/tree.c | 42 + gcc/var-tracking.c | 27 +- gcc/varasm.c | 20 + include/ChangeLog | 10 + include/plugin-api.h | 65 +- libcpp/po/ChangeLog | 4 + libcpp/po/sr.po | 78 +- libgcc/ChangeLog | 9 + libgcc/config/arm/lib1funcs.S | 33 +- libgomp/ChangeLog | 16 + libgomp/target.c | 18 +- libgomp/testsuite/libgomp.c/target-link-1.c | 3 - .../libgomp.fortran/target-enter-data-1.f90 | 36 + libstdc++-v3/ChangeLog | 183 + libstdc++-v3/doc/html/manual/appendix_free.html | 2 +- libstdc++-v3/doc/xml/manual/appendix_free.xml | 2 +- libstdc++-v3/include/bits/fs_fwd.h | 42 - libstdc++-v3/include/bits/iterator_concepts.h | 50 + libstdc++-v3/include/bits/range_access.h | 27 +- libstdc++-v3/include/bits/range_cmp.h | 3 + libstdc++-v3/include/bits/stl_iterator.h | 276 +- .../include/bits/stl_iterator_base_types.h | 4 +- libstdc++-v3/include/std/chrono | 206 +- libstdc++-v3/include/std/concepts | 2 +- libstdc++-v3/include/std/condition_variable | 3 + libstdc++-v3/include/std/future | 3 + libstdc++-v3/include/std/mutex | 3 + libstdc++-v3/include/std/shared_mutex | 6 + libstdc++-v3/include/std/thread | 3 + libstdc++-v3/include/std/type_traits | 10 +- libstdc++-v3/include/std/version | 7 +- .../allocator_traits/members/92878_92947.cc | 51 + .../testsuite/20_util/any/assign/92878_92947.cc | 46 + .../testsuite/20_util/any/cons/92878_92947.cc | 46 + .../20_util/is_constructible/92878_92947.cc | 49 + .../testsuite/20_util/is_constructible/value-2.cc | 4 + .../20_util/optional/assignment/92878_92947.cc | 47 + .../testsuite/20_util/optional/cons/92878_92947.cc | 46 + .../testsuite/20_util/pair/cons/92878_92947.cc | 49 + .../20_util/shared_ptr/creation/92878_92947.cc | 46 + .../construct_at/92878_92947.cc | 50 + .../testsuite/20_util/time_point/cons/81468.cc | 8 +- .../time_point/requirements/duration_neg.cc | 32 + .../20_util/unique_ptr/creation/92878_92947.cc | 46 + .../20_util/uses_allocator/92878_92947.cc | 67 + .../testsuite/20_util/variant/92878_92947.cc | 91 + .../deque/modifiers/emplace/92878_92947.cc | 62 + .../forward_list/modifiers/92878_92947.cc | 62 + .../list/modifiers/emplace/92878_92947.cc | 78 + .../map/modifiers/emplace/92878_92947.cc | 137 + .../multimap/modifiers/emplace/92878_92947.cc | 71 + .../multiset/modifiers/emplace/92878_92947.cc | 70 + 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4 years, 7 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk_tk1/llvm-master-arm-spec2k6-Os updated (da2efc2050 -> e0fc5c3fcb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/llvm-master-arm-spec2k6-Os in repository toolchain/ci/binutils-gdb. from da2efc2050 Automatic date update in version.in adds d1023b5d1e s12z disassembler tidy adds 03704c7704 NS32K arg_bufs uninitialised adds beea5cc1bc ARC: Use of uninitialised value adds 57cb32b3c3 H8300 use of uninitialised value adds c15a8f173e XCOFF64 uninitialised read adds 2957d8d054 Automatic date update in version.in adds 5935fd1530 gdb/testsuite: Remove hard coded addresses from expected results adds 5e737279c6 i386msdos uninitialised read adds cf28cfef60 ECOFF archive uninitialised read adds fdde2fb60c Mention .tdata in comment in _bfd_elf_tls_setup() adds 0636b24556 Avoid trigger an assertion failure in the STABS parser by re [...] adds 1ce0847daa Automatic date update in version.in adds 5a814d6d96 readelf memory leak in process_mips_specific adds 65109548f8 Overlarge allocation in _bfd_generic_read_ar_hdr_mag adds a64fafb545 [gdb] Print user for maint info psymtabs adds 7e6e972f74 bfd: Display symbol version for nm -D adds dfb68cc358 include: Sync plugin-api.h with GCC adds cda7e5603f bfd: Change num_group to unsigned int adds ec2e748ad3 Fix assertion failure in the BFD library when linking with - [...] adds 0b8448af68 Add code to the BFD library to handle opening files with pat [...] adds e11cd7c491 Update changelog. adds 5ab2fbf185 gdb: bool-ify follow_fork adds a18cd0cab4 Uninitialised memory read in z80-dis.c adds 1081065c51 bfd: Add a bfd_boolean argument to bfd_get_symbol_version_string adds 0d4a4bc56f Automatic date update in version.in adds d16e3d2e5b PR25662, invalid sh_offset for first section in segment with phdrs adds 86fd7e2e10 h8300-linux ld testsuite adds cf2611febc arc: Use correct string when printing bfd DEBUG data adds dd8953924b gdb/riscv: Apply NaN boxing when writing return values into [...] adds 7b1eff95be [gdb] Print user/includes fields for maint commands adds b778095777 The "b" flag for COFF sections only unsets the LOAD attribut [...] adds aac88046e6 Add a new function to the BFD library to allow users access [...] adds 4c83662712 readelf looping in process_archive adds d503b685c6 Fix WOW64 process system DLL paths adds 33aa3c10f6 Fix error message in compile-object-load.c adds 46b438bb73 Automatic date update in version.in adds f75fbe8ad2 alpha-vms: Sanity check ETIR__C_CTL_DFLOC index adds 4c4addbe57 Re: ARC: Use of uninitialised value adds ff76851054 Re: i386msdos uninitialised read adds 832a580781 Re: H8300 use of uninitialised value adds aa49fc22c1 Revert earlier delta adding bfd_coff_get_internal_extra_pe_a [...] adds 9fda78b611 Introduce dwarf2/dwz.h adds 0314b3901c Add dwz.c and dwz_file::read_string adds bf80d71052 Change dwarf_decode_macro_bytes calling convention adds 9eac9650ce Split dwarf_decode_macros into two overloads adds 3d27bbdb4b Move dwarf2_section_buffer_overflow_complaint to dwarf2/section.c adds a0194fa8f2 Convert dwarf2_section_buffer_overflow_complaint to a method adds 4f44ae6c69 Add dwarf2_section_info::read_string method adds c90ec28ae4 Move code to new file dwarf2/macro.c adds 8844c11b8b Make some line_header methods const adds 5a0e026fe1 Use a const line_header in macro reader adds 4f9c1eda9f Use a const dwarf2_section_info in macro reader adds 2ef46c2fbb Trivial fix in dwarf_decode_macro_bytes adds 86c0bb4c57 Convert read_indirect_line_string to a method adds 0df7ad3a67 Move more code to line-header.c adds c2d50fd0b3 Move die_info to new header adds 2b24b6e4a6 Remove dwarf2_cu::base_known adds 052c8bb83a Change dwarf2_attr_no_follow to be a method adds 436c571c6a Remove sibling_die adds a39fdb411d Change two more functions to be methods on die_info adds eeb647814f Rewrite new die_info methods adds 2b2558bfac Move DWARF-constant stringifying code to new file adds 0826b30a9f Change two functions to be methods on struct attribute adds a879b4d5a6 Support AT_BSDFLAGS on FreeBSD. adds 89ff19d45e Automatic date update in version.in adds 80e2a3b66e Re: readelf looping in process_archive adds 1fafefd594 Add testcase for PR 25662 invalid sh_offset for section adds 8f2dae6a6a gdbsupport: Resolve shellcheck issues in create-version.sh script adds cacb9d8713 ld: Skip some x86 IFUNC tests for Solaris adds 258e884429 ld: Xfail pr20995-2 tests for Solaris adds ebea762639 Always fix system DLL paths for 32bit programs adds 8f4afc7112 Automatic date update in version.in adds 6a81c59be7 Adjust objcopy_test adds 0a6a8b596b Re: Adjust objcopy_test adds 767be9d907 ld: Set COMMONPAGESIZE for i386 Solaris adds f1749218ff Fix formatting of read_attribute_reprocess adds 4d1b9ab645 Fix comment in dwarf2/attribute.h adds 37d59eacfe Automatic date update in version.in adds 3ad830466f gdb: remove discard_psymtab function adds 48993951ce gdb: rename partial_symtab::read_dependencies to expand_depe [...] adds 69b037c30c gdb: rename partial symtab expand functions of debug info re [...] adds 988b7300bc PR25745, powerpc64-ld overflows string buffer in --stats mode adds c9fef64dab Automatic date update in version.in adds c0502da688 [gdb/testsuite] Fix c-linkage-name.exp with {cc-with-gdb-ind [...] adds 1310c1b066 Add low_new_clone method to linux_nat_target. adds 4db10d8f49 [PowerPC] Move up some register access routines adds 227c0bf4b3 [PowerPC] Fix debug register issues in ppc-linux-nat adds 00386881a3 Fix objcopy's --preserve-dates command line option so that i [...] adds d8af906814 Change ada_which_variant_applies to value API adds d1a89da5de RISC-V: Update CSR to privileged spec 1.11. adds d262797294 Automatic date update in version.in adds b3b360dec7 tekhex: Uninitialised read adds 8169954446 alpha-vms: sanity checks for image_write adds 89b599df37 alpha-coff: unitialised read adds 16b0db75af [gdb/testsuite] Fix c-linkage-name.exp with -flto adds af62665e13 Don't pass NULL to memcpy in gdb adds 6f29a53415 Fix py-tui.c build problem adds 876678f05e PR 25611, PR 25614: GAS: Remove a double inclusion of "bignum.h" adds 283b7aa134 Automatic date update in version.in adds 7b948a2580 mmo.c: Fix ld testsuite regression "objcopy executable (pr25662)". adds 41ff29bf5d ld/testsuite/ld-scripts/defined4.d: Don't xfail mmix-*-*. adds 40bd13ced9 include: Sync plugin-api.h with GCC adds 15ccbdd717 Arm: Fix thumb2 PLT branch offsets. adds a7618269b7 Arm: Fix LSB of GOT for Thumb2 only PLT. adds 15d47c3a70 gas: Fix some x86_64 testcases for Solaris not using R_X86_6 [...] adds efc3a95039 x86: Force relocation against local absolute symbol adds 81e3a1d00c Updated Serbian translation for the gprof subdirectory adds 8c072cb6a1 Avoid some copying in psymtab.c adds e0802d5996 Avoid copying in lookup_name_info adds e139a727be gdb/remote: do not check for null_ptid in stop reply adds 77bf7b5317 Extend the linker's error message for missing libraries if t [...] adds 60e22c1eac Allow pointer arithmetic with integer references adds 3ce23ca1de Arm: Skip Thumb2 PLT tests on NaCL. adds a0714d305f gdb: define convenience function 'exists_non_stop_target' adds 53cccef118 gdb/infrun: stop all threads if there exists a non-stop target adds e033dfa92f Remove local variable from simple.rs test case adds 3d1cfd43be Move Rust union tests to new file adds 5b930b4538 Change how complex types are created adds 4c99290df0 Add accessors for members of complex numbers adds 981c08ce72 Change how complex types are printed in C adds fa649bb7d3 Change the C parser to allow complex constants adds c34e871466 Implement complex arithmetic adds 3638a098a2 Add _Complex type support to C parser adds 6b4a335bf7 Fix value_literal_complex comment adds 382aae0632 x86: Only allow S + A relocations against absolute symbol adds bbe3dc410b Fix the resizing condition of the line table adds 64dc2d4bd2 Fix an undefined behavior in record_line adds 2836752f8f gdb: fix style issues in is_linked_with_cygwin_dll adds 15f89256af Automatic date update in version.in adds cc77ed241b [gdb/testsuite] Accept new complex print style in mixed-lang [...] adds d321419811 [gdb] Use partial symbol table to find language for main adds 1aa98955b1 [gdb/ada] Fix -readnow FAILs adds 4f5bd88505 Replace "use use" in a warning message with "use". adds f32682eaca [gdb/testsuite] Fix silent timeout in gdb.multi/multi-target.exp adds 59e28a9767 [PATCH gas/m68k] Fix a register range check adds bb89747721 ld: Disable ifunc tests on Solaris adds 516231b7c7 linux-x86.exp: Compile with -I../bfd adds 4b27d27c07 Add support for intel SERIALIZE instruction adds a5863204fb gdbserver: make linux target op 'cannot_store_register' a pr [...] adds d16f3f6c70 gdbserver/linux-low: turn some static functions into private [...] adds ef0478f611 gdbserver/linux-low: start turning linux target ops into methods adds 797bcff595 gdbserver/linux-low: turn 'arch_setup' into a method adds aa8d21c9bb gdbserver/linux-low: turn 'regs_info' into a method adds daca57a7de gdbserver/linux-low: turn 'cannot_{fetch/store}_register' in [...] adds bd70b1f240 gdbserver/linux-low: turn 'fetch_register' into a method adds df95181f00 gdbserver/linux-low: turn some more static functions into pr [...] adds bf9ae9d8c3 gdbserver/linux-low: turn 'get_pc' and 'set_pc' into methods adds 06250e4e67 gdbserver/linux-low: turn 'breakpoint_kind_from_{pc, current [...] adds 3ca4edb661 gdbserver/linux-low: turn 'sw_breakpoint_from_kind' into a method adds 7582c77c1d gdbserver/linux-low: turn 'supports_software_single_step' an [...] adds d4807ea231 gdbserver/linux-low: turn the 'decr_pc_after_break' field in [...] adds d7146cda56 gdbserver/linux-low: turn 'breakpoint_at' into a method adds 007c9b975d gdbserver/linux-low: turn 'supports_z_point_type' into a method adds 9db9aa232a gdbserver/linux-low: turn 'insert_point' and 'remove_point' [...] adds ac1bbaca10 gdbserver/linux-low: turn watchpoint ops into methods adds b35db73327 gdbserver/linux-low: turn '{collect, supply}_ptrace_register [...] adds cb63de7ca8 gdbserver/linux-low: turn 'siginfo_fixup' into a method adds fd000fb3df gdbserver/linux-low: turn process/thread addition/deletion o [...] adds d7599cc082 gdbserver/linux-low: turn 'prepare_to_resume' into a method adds a5b5da9258 gdbserver/linux-low: turn 'process_qsupported' into a method adds 47f70aa768 gdbserver/linux-low: turn 'supports_tracepoints' into a method adds 13e567af27 gdbserver/linux-low: turn 'get_thread_area' into a method adds 809a0c354b gdbserver/linux-low: turn fast tracepoint ops into methods adds ab64c99982 gdbserver/linux-low: turn 'emit_ops' into a method adds 9cfd871551 gdbserver/linux-low: turn 'supports_range_stepping' into a method adds b31cdfa69f gdbserver/linux-low: turn 'supports_hardware_single_step' in [...] adds 9eedd27d42 gdbserver/linux-low: turn 'get_syscall_trapinfo' into a method adds fc5ecdb630 gdbserver/linux-low: turn 'get_ipa_tdesc_idx' into a method adds 0dd7b52ede gdbserver/linux-low: delete 'linux_target_ops' and 'the_low_target' adds 4d095f5b5e coff-go32-exe: support variable-length stubs adds 8be5def63b ld: Add NOCF_PROTECTION_CFLAGS to turn off -fcf-protection adds aa350065a4 NOCF_PROTECTION_CFLAGS: Replace nopie with available adds 880d97770b [gdb/testsuite] Don't use O2 for inlining in break-inline-ps [...] adds 6a35491162 gdb/testsuite: Add compiler options parameter to function_ra [...] adds 34e9a9fa0a gdb/testsuite: Add support for DW_LNS_set_file to DWARF compiler adds c90d28ac89 gdb: Don't remove duplicate entries from the line table adds e7da7f8f71 Micro-optimize partial_die_info::read adds 0830d30190 Avoid assertion failure due to complex type change adds e2ff18a0a5 gdb: replace some calls to internal_error with gdb_assert adds e0fc5c3fcb gdb: use bfd_get_section_contents to read section contents i [...] No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 229 + bfd/archive.c | 15 +- bfd/bfd-in2.h | 10 +- bfd/bfd.c | 5 +- bfd/bfdio.c | 40 +- bfd/bfdwin.c | 1 + bfd/coff-alpha.c | 2 +- bfd/coff-i386.c | 22 +- bfd/coff-stgo32.c | 449 +- bfd/coff64-rs6000.c | 4 +- bfd/coffcode.h | 9 - bfd/ecoff.c | 35 +- bfd/elf-bfd.h | 4 +- bfd/elf.c | 46 +- bfd/elf32-arc.c | 4 +- bfd/elf32-arm.c | 10 +- bfd/elf32-i386.c | 40 +- bfd/elf64-ppc.c | 76 +- bfd/elf64-x86-64.c | 81 +- bfd/elflink.c | 4 +- bfd/elfxx-x86.c | 103 +- bfd/elfxx-x86.h | 29 +- bfd/i386msdos.c | 14 +- bfd/libbfd-in.h | 2 +- bfd/libbfd.h | 2 +- bfd/libcoff-in.h | 12 +- bfd/libcoff.h | 12 +- bfd/mmo.c | 6 +- bfd/peXXigen.c | 4 +- bfd/syms.c | 1 + bfd/targets.c | 5 +- bfd/tekhex.c | 2 +- bfd/version.h | 2 +- bfd/vms-alpha.c | 96 +- binutils/ChangeLog | 92 + binutils/nm.c | 28 +- binutils/objcopy.c | 5 + binutils/objdump.c | 3 +- binutils/readelf.c | 17 +- binutils/testsuite/binutils-all/objcopy.exp | 97 +- binutils/testsuite/binutils-all/pr25662.ld | 15 + binutils/testsuite/binutils-all/pr25662.s | 34 + binutils/testsuite/lib/binutils-common.exp | 3 +- binutils/wrstabs.c | 56 +- gas/ChangeLog | 88 + gas/config/obj-coff.c | 5 + gas/config/tc-i386.c | 3 + gas/config/tc-i386.h | 8 + gas/config/tc-m68k.c | 2 +- gas/doc/c-i386.texi | 2 + gas/dwarf2dbg.c | 1 - gas/testsuite/gas/elf/section12a.d | 2 +- gas/testsuite/gas/elf/section12b.d | 2 +- gas/testsuite/gas/elf/section16a.d | 2 +- gas/testsuite/gas/elf/section16b.d | 2 +- gas/testsuite/gas/i386/i386.exp | 2 + gas/testsuite/gas/i386/ilp32/x86-64-localpic.d | 4 +- gas/testsuite/gas/i386/localpic.d | 4 +- gas/testsuite/gas/i386/localpic.s | 2 + gas/testsuite/gas/i386/serialize.d | 12 + gas/testsuite/gas/i386/serialize.s | 5 + .../gas/i386/{ => solaris}/x86-64-branch-2.d | 5 +- .../gas/i386/{ => solaris}/x86-64-branch-3.d | 11 +- gas/testsuite/gas/i386/solaris/x86-64-jump.d | 16 +- .../gas/i386/solaris/x86-64-mpx-branch-1.d | 36 +- .../gas/i386/solaris/x86-64-mpx-branch-2.d | 28 +- gas/testsuite/gas/i386/x86-64-branch-2.d | 1 + gas/testsuite/gas/i386/x86-64-branch-3.d | 1 + gas/testsuite/gas/i386/x86-64-localpic.d | 4 +- gas/testsuite/gas/i386/x86-64-localpic.s | 2 + gas/testsuite/gas/i386/x86-64-serialize.d | 12 + gas/testsuite/gas/riscv/alias-csr.d | 23 - gas/testsuite/gas/riscv/alias-csr.s | 14 - gas/testsuite/gas/riscv/bad-csr.d | 3 - gas/testsuite/gas/riscv/csr-dw-regnums.d | 7 +- gas/testsuite/gas/riscv/csr-dw-regnums.s | 9 +- gas/testsuite/gas/riscv/no-aliases-csr.d | 23 - .../gas/riscv/priv-reg-fail-nonexistent.d | 3 + .../{bad-csr.l => priv-reg-fail-nonexistent.l} | 0 .../{bad-csr.s => priv-reg-fail-nonexistent.s} | 0 gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l | 4 +- gas/testsuite/gas/riscv/priv-reg-pseudo-noalias.d | 36 + gas/testsuite/gas/riscv/priv-reg-pseudo.d | 36 + gas/testsuite/gas/riscv/priv-reg-pseudo.s | 33 + gas/testsuite/gas/riscv/priv-reg.d | 491 +- gas/testsuite/gas/riscv/priv-reg.s | 114 +- gas/testsuite/gas/riscv/satp.d | 11 - gas/testsuite/gas/riscv/satp.s | 3 - gas/testsuite/gas/s12z/truncated.d | 6 +- gdb/ChangeLog | 608 ++ gdb/Makefile.in | 3 + gdb/ada-lang.c | 49 +- gdb/ada-lang.h | 3 +- gdb/ada-valprint.c | 4 +- gdb/buildsym.c | 50 +- gdb/c-exp.y | 158 +- gdb/c-valprint.c | 2 +- gdb/compile/compile-object-load.c | 2 +- gdb/ctfread.c | 2 +- gdb/d-lang.c | 9 +- gdb/dbxread.c | 10 +- gdb/dwarf2/abbrev.c | 5 +- gdb/dwarf2/attribute.c | 37 + gdb/dwarf2/attribute.h | 18 +- gdb/dwarf2/die.h | 103 + gdb/dwarf2/dwz.c | 40 + gdb/dwarf2/dwz.h | 65 + gdb/dwarf2/index-cache.c | 1 + gdb/dwarf2/index-write.c | 1 + gdb/dwarf2/line-header.c | 339 +- gdb/dwarf2/line-header.h | 32 +- gdb/dwarf2/macro.c | 868 +++ .../break-inline-psymtab-2.c => dwarf2/macro.h} | 30 +- gdb/dwarf2/read.c | 1759 +---- gdb/dwarf2/read.h | 39 +- gdb/dwarf2/section.c | 26 + gdb/dwarf2/section.h | 9 + gdb/dwarf2/stringify.c | 114 + gdb/dwarf2/stringify.h | 38 + gdb/eval.c | 20 +- gdb/exec.c | 10 +- gdb/f-lang.c | 16 +- gdb/fbsd-nat.c | 6 +- gdb/fbsd-nat.h | 2 +- gdb/fbsd-tdep.c | 1 + gdb/features/riscv/32bit-csr.xml | 5 +- gdb/features/riscv/64bit-csr.xml | 5 +- gdb/gdb_bfd.c | 14 +- gdb/gdb_bfd.h | 9 + gdb/gdbtypes.c | 58 +- gdb/gdbtypes.h | 9 +- gdb/go-lang.c | 6 +- gdb/inf-ptrace.c | 6 +- gdb/inf-ptrace.h | 2 +- gdb/infrun.c | 41 +- gdb/language.c | 4 +- gdb/linux-nat.c | 10 +- gdb/linux-nat.h | 6 +- gdb/mdebugread.c | 23 +- gdb/minsyms.c | 2 +- gdb/ppc-linux-nat.c | 1518 ++-- gdb/psympriv.h | 8 +- gdb/psymtab.c | 111 +- gdb/python/py-tui.c | 8 +- gdb/remote.c | 12 +- gdb/riscv-tdep.c | 69 +- gdb/stabsread.c | 8 +- gdb/symfile-debug.c | 1 + gdb/symfile.c | 11 +- gdb/symfile.h | 11 + gdb/symmisc.c | 54 +- gdb/symtab.c | 45 +- gdb/symtab.h | 62 +- gdb/target-delegates.c | 24 +- gdb/target.c | 33 +- gdb/target.h | 9 +- gdb/testsuite/ChangeLog | 112 + gdb/testsuite/gdb.base/c-linkage-name.exp | 45 +- gdb/testsuite/gdb.base/callfuncs.exp | 6 +- gdb/testsuite/gdb.base/complex-parts.exp | 37 +- gdb/testsuite/gdb.base/complex.exp | 4 +- gdb/testsuite/gdb.base/endianity.exp | 4 +- gdb/testsuite/gdb.base/floatn.exp | 13 +- gdb/testsuite/gdb.base/funcargs.exp | 20 +- .../main-psymtab.exp} | 30 +- gdb/testsuite/gdb.base/varargs.exp | 6 +- gdb/testsuite/gdb.compile/compile-cplus.exp | 2 +- gdb/testsuite/gdb.compile/compile.exp | 2 +- gdb/testsuite/gdb.cp/misc.cc | 3 + gdb/testsuite/gdb.cp/misc.exp | 8 + gdb/testsuite/gdb.dwarf2/break-inline-psymtab-2.c | 2 +- gdb/testsuite/gdb.dwarf2/break-inline-psymtab.exp | 3 +- ...ne-psymtab-2.c => dw2-inline-small-func-lbls.c} | 32 +- ...-inline-psymtab-2.c => dw2-inline-small-func.c} | 23 +- gdb/testsuite/gdb.dwarf2/dw2-inline-small-func.exp | 158 + ...-inline-psymtab-2.c => dw2-inline-small-func.h} | 22 +- gdb/testsuite/gdb.fortran/mixed-lang-stack.exp | 8 +- gdb/testsuite/gdb.multi/multi-target.exp | 24 +- .../stop-all-on-exit.c} | 16 +- gdb/testsuite/gdb.multi/stop-all-on-exit.exp | 64 + .../inline-small-func.c} | 23 +- gdb/testsuite/gdb.opt/inline-small-func.exp | 60 + .../inline-small-func.h} | 22 +- gdb/testsuite/gdb.rust/simple.exp | 13 - gdb/testsuite/gdb.rust/simple.rs | 13 - .../{gdb.base/complex.exp => gdb.rust/union.exp} | 36 +- gdb/testsuite/gdb.rust/union.rs | 35 + gdb/testsuite/gdb.server/stop-reply-no-thread.exp | 24 +- gdb/testsuite/lib/dwarf.exp | 9 +- gdb/testsuite/lib/gdb.exp | 38 + gdb/testsuite/lib/gdbserver-support.exp | 40 +- gdb/utils.c | 4 +- gdb/valarith.c | 199 +- gdb/valops.c | 31 +- gdb/valprint.c | 9 +- gdb/value.c | 5 +- gdb/value.h | 12 + gdb/windows-nat.c | 49 +- gdb/windows-tdep.c | 23 +- gdb/xcoffread.c | 8 +- gdbserver/ChangeLog | 1980 +++++ gdbserver/linux-aarch64-low.cc | 377 +- gdbserver/linux-arm-low.cc | 262 +- gdbserver/linux-bfin-low.cc | 138 +- gdbserver/linux-cris-low.cc | 107 +- gdbserver/linux-crisv32-low.cc | 180 +- gdbserver/linux-ia64-low.cc | 86 +- gdbserver/linux-low.cc | 1105 ++- gdbserver/linux-low.h | 549 +- gdbserver/linux-m32r-low.cc | 134 +- gdbserver/linux-m68k-low.cc | 139 +- gdbserver/linux-mips-low.cc | 290 +- gdbserver/linux-nios2-low.cc | 125 +- gdbserver/linux-ppc-low.cc | 281 +- gdbserver/linux-riscv-low.cc | 130 +- gdbserver/linux-s390-low.cc | 258 +- gdbserver/linux-sh-low.cc | 137 +- gdbserver/linux-sparc-low.cc | 100 +- gdbserver/linux-tic6x-low.cc | 133 +- gdbserver/linux-tile-low.cc | 145 +- gdbserver/linux-x86-low.cc | 371 +- gdbserver/linux-xtensa-low.cc | 135 +- gdbserver/proc-service.cc | 2 +- gdbserver/thread-db.cc | 2 +- gdbsupport/ChangeLog | 9 + gdbsupport/btrace-common.cc | 3 +- gdbsupport/create-version.sh | 18 +- gprof/ChangeLog | 4 + gprof/po/sr.po | 49 +- include/ChangeLog | 25 + include/coff/go32exe.h | 36 - include/coff/internal.h | 13 +- include/elf/common.h | 1 + include/opcode/riscv-opc.h | 25 +- include/plugin-api.h | 65 +- ld/ChangeLog | 267 + ld/Makefile.am | 2 + ld/Makefile.in | 3 + ld/emulparams/elf_i386_ldso.sh | 1 + ld/emultempl/pe.em | 5 +- ld/emultempl/pep.em | 5 +- ld/ldfile.c | 16 + ld/pe-dll.c | 4 +- ld/po/BLD-POTFILES.in | 1 + ld/testsuite/config/default.exp | 38 + ld/testsuite/ld-arm/arm-elf.exp | 5 + ld/testsuite/ld-arm/thumb-plt-got.d | 14 + ld/testsuite/ld-arm/thumb-plt.d | 34 + ld/testsuite/ld-arm/thumb-plt.s | 18 + ld/testsuite/ld-elf/compress1c.d | 1 + ld/testsuite/ld-elf/compressed1c.d | 1 + ld/testsuite/ld-elf/compressed1e.d | 2 +- ld/testsuite/ld-elf/dynamic1.d | 1 + ld/testsuite/ld-elf/dynsym1.d | 1 + ld/testsuite/ld-elf/ehdr_start-shared.d | 2 +- ld/testsuite/ld-elf/exclude3b.d | 1 + ld/testsuite/ld-elf/export-class.exp | 2 +- ld/testsuite/ld-elf/global1.d | 1 + ld/testsuite/ld-elf/hash.d | 1 + ld/testsuite/ld-elf/linux-x86.exp | 167 + ld/testsuite/ld-elf/loadaddr1.d | 1 + ld/testsuite/ld-elf/loadaddr2.d | 1 + ld/testsuite/ld-elf/local1.d | 1 + ld/testsuite/ld-elf/mbind1b.d | 1 + ld/testsuite/ld-elf/mbind1c.d | 1 + ld/testsuite/ld-elf/now-1.d | 1 + ld/testsuite/ld-elf/now-2.d | 1 + ld/testsuite/ld-elf/now-3.d | 1 + ld/testsuite/ld-elf/now-4.d | 1 + ld/testsuite/ld-elf/pie.d | 1 + ld/testsuite/ld-elf/pr12975.d | 2 +- ld/testsuite/ld-elf/pr13177.d | 2 +- ld/testsuite/ld-elf/pr13195.d | 2 +- ld/testsuite/ld-elf/pr16322.d | 1 + ld/testsuite/ld-elf/pr16498a.d | 1 + ld/testsuite/ld-elf/pr16498b.d | 1 + ld/testsuite/ld-elf/pr17615.d | 2 +- ld/testsuite/ld-elf/pr19162.d | 2 +- ld/testsuite/ld-elf/pr19539.d | 2 +- ld/testsuite/ld-elf/pr19617a.d | 1 + ld/testsuite/ld-elf/pr19698.d | 1 + ld/testsuite/ld-elf/pr20513c.d | 1 + ld/testsuite/ld-elf/pr20513d.d | 1 + ld/testsuite/ld-elf/pr21389a.d | 1 + ld/testsuite/ld-elf/pr21389b.d | 1 + ld/testsuite/ld-elf/pr21389c.d | 1 + ld/testsuite/ld-elf/pr21562a.d | 2 +- ld/testsuite/ld-elf/pr21562b.d | 2 +- ld/testsuite/ld-elf/pr21562c.d | 2 +- ld/testsuite/ld-elf/pr21562d.d | 2 +- ld/testsuite/ld-elf/pr21562e.d | 1 + ld/testsuite/ld-elf/pr21562f.d | 1 + ld/testsuite/ld-elf/pr21562g.d | 1 + ld/testsuite/ld-elf/pr21562h.d | 1 + ld/testsuite/ld-elf/pr21562i.d | 2 +- ld/testsuite/ld-elf/pr21562j.d | 2 +- ld/testsuite/ld-elf/pr21562k.d | 2 +- ld/testsuite/ld-elf/pr21562l.d | 2 +- ld/testsuite/ld-elf/pr21562m.d | 2 +- ld/testsuite/ld-elf/pr21562n.d | 2 +- ld/testsuite/ld-elf/pr21903a.d | 1 + ld/testsuite/ld-elf/pr21903b.d | 1 + ld/testsuite/ld-elf/pr21903d.d | 1 + ld/testsuite/ld-elf/pr22269a.d | 1 + ld/testsuite/ld-elf/pr22269b.d | 1 + ld/testsuite/ld-elf/pr22393-1a.d | 1 + ld/testsuite/ld-elf/pr22393-1b.d | 1 + ld/testsuite/ld-elf/pr22393-1c.d | 1 + ld/testsuite/ld-elf/pr22393-1d.d | 1 + ld/testsuite/ld-elf/pr22393-1e.d | 1 + ld/testsuite/ld-elf/pr22393-1f.d | 1 + ld/testsuite/ld-elf/pr22423.d | 1 + ld/testsuite/ld-elf/pr22450.d | 2 +- ld/testsuite/ld-elf/pr23658-1c.d | 1 + ld/testsuite/ld-elf/pr25708.d | 11 + ld/testsuite/ld-elf/pr25749-1.c | 12 + ld/testsuite/ld-elf/pr25749-1a.c | 11 + ld/testsuite/ld-elf/pr25749-1b.c | 9 + ld/testsuite/ld-elf/pr25749-1b.err | 3 + ld/testsuite/ld-elf/pr25749-1c.c | 9 + ld/testsuite/ld-elf/pr25749-1d.c | 19 + ld/testsuite/ld-elf/pr25749-2.c | 12 + ld/testsuite/ld-elf/pr25749-2a.s | 6 + ld/testsuite/ld-elf/pr25749-2b.s | 7 + ld/testsuite/ld-elf/pr25749.rd | 4 + ld/testsuite/ld-elf/pr25754-1a.c | 19 + ld/testsuite/ld-elf/pr25754-1b.s | 3 + ld/testsuite/ld-elf/pr25754-2a.c | 20 + ld/testsuite/ld-elf/pr25754-2b.s | 3 + ld/testsuite/ld-elf/pr25754-3a.c | 19 + ld/testsuite/ld-elf/pr25754-3b.s | 3 + ld/testsuite/ld-elf/pr25754-4a.c | 12 + ld/testsuite/ld-elf/pr25754-4b.s | 23 + ld/testsuite/ld-elf/pr25754-4c.s | 12 + ld/testsuite/ld-elf/pr25754-5a.c | 12 + ld/testsuite/ld-elf/pr25754-5b.s | 23 + ld/testsuite/ld-elf/pr25754-5c.s | 12 + ld/testsuite/ld-elf/pr25754-6a.c | 12 + ld/testsuite/ld-elf/pr25754-6b.s | 12 + ld/testsuite/ld-elf/rpath-1.d | 1 + ld/testsuite/ld-elf/rpath-2.d | 1 + ld/testsuite/ld-elf/runpath-1.d | 1 + ld/testsuite/ld-elf/runpath-2.d | 1 + ld/testsuite/ld-elf/sizeofb.d | 1 + ld/testsuite/ld-elf/startofb.d | 1 + ld/testsuite/ld-elf/strtab.d | 1 + ld/testsuite/ld-elf/textaddr1.d | 1 + ld/testsuite/ld-elf/textaddr2.d | 1 + ld/testsuite/ld-elf/textaddr4.d | 1 + ld/testsuite/ld-elf/textaddr5.d | 1 + ld/testsuite/ld-elf/textaddr6.d | 1 + ld/testsuite/ld-elf/unknown2.d | 1 + ld/testsuite/ld-h8300/gcsection.d | 5 +- ld/testsuite/ld-h8300/h8300.exp | 19 +- ld/testsuite/ld-h8300/relax-2.d | 4 +- ld/testsuite/ld-h8300/relax-3.d | 4 +- ld/testsuite/ld-h8300/relax-4.d | 4 +- ld/testsuite/ld-h8300/relax-5.d | 4 +- ld/testsuite/ld-h8300/relax-6.d | 4 +- ld/testsuite/ld-h8300/relax-7.d | 4 +- ld/testsuite/ld-h8300/relax.d | 2 +- ld/testsuite/ld-ifunc/ifunc-10-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-11-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-12-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-13-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14c-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14d-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14e-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14f-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-15-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-16-i386-now.d | 2 +- ld/testsuite/ld-ifunc/ifunc-16-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-17a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-17b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-18a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-18b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-19a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-19b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-2-i386-now.d | 2 +- ld/testsuite/ld-ifunc/ifunc-2-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-2-local-i386-now.d | 2 +- ld/testsuite/ld-ifunc/ifunc-2-local-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-20-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-21-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-22-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5a-local-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5b-local-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5r-local-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-6a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-6b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-7a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-7b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-8-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-9-i386.d | 2 +- ld/testsuite/ld-ifunc/pr17154-i386-now.d | 2 +- ld/testsuite/ld-ifunc/pr17154-i386.d | 2 +- ld/testsuite/ld-scripts/defined4.d | 4 +- ld/testsuite/ld-srec/srec.exp | 8 +- ld/testsuite/ld-undefined/entry-3.d | 1 + ld/testsuite/ld-undefined/entry-4.d | 1 + ld/testsuite/ld-x86-64/pr19609-6a.d | 11 +- ld/testsuite/ld-x86-64/x86-64.exp | 10 +- opcodes/ChangeLog | 82 + opcodes/arc-dis.c | 11 +- opcodes/disassemble.c | 10 +- opcodes/disassemble.h | 6 + opcodes/h8300-dis.c | 261 +- opcodes/i386-dis.c | 2 +- opcodes/i386-gen.c | 5 + opcodes/i386-init.h | 358 +- opcodes/i386-opc.h | 3 + opcodes/i386-opc.tbl | 6 + opcodes/i386-tbl.h | 7970 ++++++++++---------- opcodes/ns32k-dis.c | 19 +- opcodes/s12z-dis.c | 14 +- opcodes/s12z-opc.c | 1030 ++- opcodes/z80-dis.c | 1 + 421 files changed, 18227 insertions(+), 10857 deletions(-) create mode 100644 binutils/testsuite/binutils-all/pr25662.ld create mode 100644 binutils/testsuite/binutils-all/pr25662.s create mode 100644 gas/testsuite/gas/i386/serialize.d create mode 100644 gas/testsuite/gas/i386/serialize.s copy gas/testsuite/gas/i386/{ => solaris}/x86-64-branch-2.d (88%) copy gas/testsuite/gas/i386/{ => solaris}/x86-64-branch-3.d (80%) create mode 100644 gas/testsuite/gas/i386/x86-64-serialize.d delete mode 100644 gas/testsuite/gas/riscv/alias-csr.d delete mode 100644 gas/testsuite/gas/riscv/alias-csr.s delete mode 100644 gas/testsuite/gas/riscv/bad-csr.d delete mode 100644 gas/testsuite/gas/riscv/no-aliases-csr.d create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-nonexistent.d rename gas/testsuite/gas/riscv/{bad-csr.l => priv-reg-fail-nonexistent.l} (100%) rename gas/testsuite/gas/riscv/{bad-csr.s => priv-reg-fail-nonexistent.s} (100%) create mode 100644 gas/testsuite/gas/riscv/priv-reg-pseudo-noalias.d create mode 100644 gas/testsuite/gas/riscv/priv-reg-pseudo.d create mode 100644 gas/testsuite/gas/riscv/priv-reg-pseudo.s delete mode 100644 gas/testsuite/gas/riscv/satp.d delete mode 100644 gas/testsuite/gas/riscv/satp.s create mode 100644 gdb/dwarf2/die.h create mode 100644 gdb/dwarf2/dwz.c create mode 100644 gdb/dwarf2/dwz.h create mode 100644 gdb/dwarf2/macro.c copy gdb/{testsuite/gdb.dwarf2/break-inline-psymtab-2.c => dwarf2/macro.h} (56%) create mode 100644 gdb/dwarf2/stringify.c create mode 100644 gdb/dwarf2/stringify.h copy gdb/testsuite/{gdb.dwarf2/break-inline-psymtab.exp => gdb.base/main-psymtab.e [...] copy gdb/testsuite/gdb.dwarf2/{break-inline-psymtab-2.c => dw2-inline-small-func-l [...] copy gdb/testsuite/gdb.dwarf2/{break-inline-psymtab-2.c => dw2-inline-small-func.c} (74%) create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-inline-small-func.exp copy gdb/testsuite/gdb.dwarf2/{break-inline-psymtab-2.c => dw2-inline-small-func.h} (74%) copy gdb/testsuite/{gdb.dwarf2/break-inline-psymtab-2.c => gdb.multi/stop-all-on-e [...] create mode 100644 gdb/testsuite/gdb.multi/stop-all-on-exit.exp copy gdb/testsuite/{gdb.dwarf2/break-inline-psymtab-2.c => gdb.opt/inline-small-fu [...] create mode 100644 gdb/testsuite/gdb.opt/inline-small-func.exp copy gdb/testsuite/{gdb.dwarf2/break-inline-psymtab-2.c => gdb.opt/inline-small-fu [...] copy gdb/testsuite/{gdb.base/complex.exp => gdb.rust/union.exp} (50%) create mode 100644 gdb/testsuite/gdb.rust/union.rs delete mode 100644 include/coff/go32exe.h create mode 100644 ld/testsuite/ld-arm/thumb-plt-got.d create mode 100644 ld/testsuite/ld-arm/thumb-plt.d create mode 100644 ld/testsuite/ld-arm/thumb-plt.s create mode 100644 ld/testsuite/ld-elf/pr25708.d create mode 100644 ld/testsuite/ld-elf/pr25749-1.c create mode 100644 ld/testsuite/ld-elf/pr25749-1a.c create mode 100644 ld/testsuite/ld-elf/pr25749-1b.c create mode 100644 ld/testsuite/ld-elf/pr25749-1b.err create mode 100644 ld/testsuite/ld-elf/pr25749-1c.c create mode 100644 ld/testsuite/ld-elf/pr25749-1d.c create mode 100644 ld/testsuite/ld-elf/pr25749-2.c create mode 100644 ld/testsuite/ld-elf/pr25749-2a.s create mode 100644 ld/testsuite/ld-elf/pr25749-2b.s create mode 100644 ld/testsuite/ld-elf/pr25749.rd create mode 100644 ld/testsuite/ld-elf/pr25754-1a.c create mode 100644 ld/testsuite/ld-elf/pr25754-1b.s create mode 100644 ld/testsuite/ld-elf/pr25754-2a.c create mode 100644 ld/testsuite/ld-elf/pr25754-2b.s create mode 100644 ld/testsuite/ld-elf/pr25754-3a.c create mode 100644 ld/testsuite/ld-elf/pr25754-3b.s create mode 100644 ld/testsuite/ld-elf/pr25754-4a.c create mode 100644 ld/testsuite/ld-elf/pr25754-4b.s create mode 100644 ld/testsuite/ld-elf/pr25754-4c.s create mode 100644 ld/testsuite/ld-elf/pr25754-5a.c create mode 100644 ld/testsuite/ld-elf/pr25754-5b.s create mode 100644 ld/testsuite/ld-elf/pr25754-5c.s create mode 100644 ld/testsuite/ld-elf/pr25754-6a.c create mode 100644 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4 years, 7 months

[binutils-gdb] branch master updated (e0fc5c3fcbf -> 492c3f03c70)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from e0fc5c3fcbf gdb: use bfd_get_section_contents to read section contents [...] new 492c3f03c70 Automatic date update in version.in The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[binutils-gdb] branch binutils-2_34-branch updated (e747868f34a -> 93bb0a34262)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch binutils-2_34-branch in repository binutils-gdb. from e747868f34a Automatic date update in version.in new 93bb0a34262 Automatic date update in version.in The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[binutils-gdb] branch gdb-9-branch updated (0659498d7cc -> 11831349528)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch gdb-9-branch in repository binutils-gdb. from 0659498d7cc Automatic date update in version.in new 11831349528 Automatic date update in version.in The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_tk1/llvm-master-arm-spec2k6-Os updated (60923e53 -> 40983a39)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/llvm-master-arm-spec2k6-Os in repository toolchain/ci/base-artifacts. discards 60923e53 9: update: binutils-gcc-glibc-llvm: 1 new 40983a39 9: update: binutils-gcc-glibc-llvm: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (60923e53) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk_tk1/llvm-master-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 182 +- 02-prepare_abe/console.log | 236 +- 03-build_abe-binutils/console.log | 11372 +- 04-build_abe-stage1/console.log | 20099 ++-- 05-build_abe-linux/console.log | 224 +- 06-build_abe-glibc/console.log | 39517 ++++--- 07-build_abe-stage2/console.log | 44888 ++++---- 08-build_llvm-true/console.log | 12807 +-- 10-benchmark--Os_mthumb/benchmark-start.log | 2 +- 10-benchmark--Os_mthumb/benchmark.log | 78 +- 10-benchmark--Os_mthumb/console.log | 236 +- 11-check_regression/console.log | 2845 +- 11-check_regression/results-0.csv | 2259 +- 11-check_regression/results-1.csv | 2267 +- 11-check_regression/results-brief.csv | 38 +- 11-check_regression/results-compare.csv | 2 +- 11-check_regression/results-full.csv | 2437 +- 11-check_regression/results.csv | 168 +- 11-check_regression/results.log | 2574 +- 12-update_baseline/console.log | 8570 +- 12-update_baseline/extra-bisect-params | 2 +- 12-update_baseline/results-1.csv | 2267 +- 12-update_baseline/results-brief.csv | 38 +- 12-update_baseline/results-compare.csv | 2 +- 12-update_baseline/results-full.csv | 2267 +- 12-update_baseline/results.csv | 166 +- 12-update_baseline/results.log | 1880 +- 12-update_baseline/results.regressions | 3 + console.log | 140986 ++++++++++++------------- jenkins/manifest.sh | 24 +- regressions.txt | 4 - results | 5 +- results_id | 2 +- 33 files changed, 148201 insertions(+), 150246 deletions(-) create mode 100644 12-update_baseline/results.regressions delete mode 100644 regressions.txt -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig updated (54b4fa6d3955 -> dda0e2920330)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig in repository toolchain/ci/linux. from 54b4fa6d3955 Linux 4.19.113 adds 4f32b45c9a2c mmc: core: Allow host controllers to require R1B for CMD6 adds 5fc615c1e3eb mmc: core: Respect MMC_CAP_NEED_RSP_BUSY for erase/trim/discard adds d091259b8d7a mmc: core: Respect MMC_CAP_NEED_RSP_BUSY for eMMC sleep command adds 23161bed631a mmc: sdhci-omap: Fix busy detection by enabling MMC_CAP_NE [...] adds ff6471fec204 mmc: sdhci-tegra: Fix busy detection by enabling MMC_CAP_N [...] adds 013b14652972 Revert "drm/dp_mst: Skip validating ports during destructi [...] adds 2c1a05e91fc6 geneve: move debug check after netdev unregister adds b1ab6a51895d hsr: fix general protection fault in hsr_addr_is_self() adds 1e62437e33fd macsec: restrict to ethernet devices adds b371fdcd2667 mlxsw: spectrum_mr: Fix list iteration in error path adds c94fbe2892d5 net: cbs: Fix software cbs to consider packet sending time adds e90e9226bea3 net: dsa: Fix duplicate frames flooded by learning adds b411ce503d98 net: mvneta: Fix the case where the last poll did not proc [...] adds 6fb0e4385928 net/packet: tpacket_rcv: avoid a producer race condition adds efec582aa025 net: qmi_wwan: add support for ASKEY WWHC050 adds ea3d6652c240 net_sched: cls_route: remove the right filter from hashtable adds 557d015ffb27 net_sched: keep alloc_hash updated after hash allocation adds 47e36be14674 net: stmmac: dwmac-rk: fix error path in rk_gmac_probe adds b9ac81058b6c NFC: fdp: Fix a signedness bug in fdp_nci_send_patch() adds 297e87cfbc43 slcan: not call free_netdev before rtnl_unlock in slcan_open adds 867c079ef0c2 bnxt_en: fix memory leaks in bnxt_dcbnl_ieee_getets() adds 2cbbedac94fc bnxt_en: Reset rings if ring reservation fails during open() adds 54266b269468 net: ip_gre: Separate ERSPAN newlink / changelink callbacks adds f5ebb2dd8677 net: ip_gre: Accept IFLA_INFO_DATA-less configuration adds 579efdbbb290 net: dsa: mt7530: Change the LINK bit to reflect the link status adds 39c6f2beb1b7 net: phy: mdio-mux-bcm-iproc: check clk_prepare_enable() r [...] adds 87559662c7b0 r8169: re-enable MSI on RTL8168c adds 58b501cc08cc tcp: repair: fix TCP_QUEUE_SEQ implementation adds facf9c7ecc2f vxlan: check return value of gro_cells_init() adds d45f603e14ef hsr: use rcu_read_lock() in hsr_get_node_{list/status}() adds 0884e7872abb hsr: add restart routine into hsr_get_node_list() adds 85eaea5f8e2d hsr: set .netnsok flag adds 967e97461ea3 cgroup-v1: cgroup_pidlist_next should update position index adds 968d4ec0c9eb nfs: add minor version to nfs_server_key for fscache adds 87639a608eb3 cpupower: avoid multiple definition with gcc -fno-common adds 1bea23309424 drivers/of/of_mdio.c:fix of_mdiobus_register() adds 5a8a69435d33 cgroup1: don't call release_agent when it is "" adds fbc835b0b4c9 dt-bindings: net: FMan erratum A050385 adds 6359254038b6 arm64: dts: ls1043a: FMan erratum A050385 adds 7deaf533087d fsl/fman: detect FMan erratum A050385 adds 547d6d43fc93 s390/qeth: handle error when backing RX buffer adds 29aacd438cc0 scsi: ipr: Fix softlockup when rescanning devices in petitboot adds 6deb51c700fc mac80211: Do not send mesh HWMP PREQ if HWMP is disabled adds ec8111fca9e6 dpaa_eth: Remove unnecessary boolean expression in dpaa_ge [...] adds 28866e0921f9 sxgbe: Fix off by one in samsung driver strncpy size arg adds cde88c24f91d ftrace/x86: Anotate text_mutex split between ftrace_arch_c [...] adds a2c056316430 i2c: hix5hd2: add missed clk_disable_unprepare in remove adds 83f64c118c44 Input: raydium_i2c_ts - fix error codes in raydium_i2c_boo [...] adds 894a3be3214b Input: synaptics - enable RMI on HP Envy 13-ad105ng adds 74d0c209f93b Input: avoid BIT() macro usage in the serio.h UAPI header adds 1e2d0c50980c ceph: check POOL_FLAG_FULL/NEARFULL in addition to OSDMAP_ [...] adds aa9e1a3bded8 ARM: dts: dra7: Add bus_dma_limit for L3 bus adds 8da3ffaafeb6 ARM: dts: omap5: Add bus_dma_limit for L3 bus adds 72057ab2923f perf probe: Do not depend on dwfl_module_addrsym() adds 55831a04b548 tools: Let O= makes handle a relative path with -C option adds 621f2ded6015 scripts/dtc: Remove redundant YYLOC global declaration adds d500b060316a scsi: sd: Fix optimal I/O size for devices that change rep [...] adds b9135475c375 nl80211: fix NL80211_ATTR_CHANNEL_WIDTH attribute type adds d34dce8d3dbf mac80211: mark station unauthorized before key removal adds 930f7ea27438 gpiolib: acpi: Correct comment for HP x2 10 honor_wakeup quirk adds c3c85c561c2b gpiolib: acpi: Rework honor_wakeup option into an ignore_w [...] adds e3aaea29e241 gpiolib: acpi: Add quirk to ignore EC wakeups on HP x2 10 [...] adds 05a93efc961c RDMA/core: Ensure security pkey modify is not lost adds 277db1b634fc genirq: Fix reference leaks on irq affinity notifiers adds cb2775c906ee xfrm: handle NETDEV_UNREGISTER for xfrm device adds f8ee708284e1 vti[6]: fix packet tx through bpf_redirect() in XinY cases adds 2eb46d004484 RDMA/mlx5: Block delay drop to unprivileged users adds cf265c64c919 xfrm: fix uctx len check in verify_sec_ctx_len adds 0a7b397c0133 xfrm: add the missing verify_sec_ctx_len check in xfrm_add [...] adds 7ad217a824f7 xfrm: policy: Fix doulbe free in xfrm_policy_timer adds ef21d2431f32 afs: Fix some tracing details adds 113df2c58a72 netfilter: flowtable: reload ip{v6}h in nf_flow_tuple_ip{v6} adds 24c290b81194 netfilter: nft_fwd_netdev: validate family and chain type adds fb957d1003ad bpf/btf: Fix BTF verification of enum members in struct/union adds 7df44c928549 vti6: Fix memory leak of skb if input policy check fails adds e8113b2f90c5 Revert "r8169: check that Realtek PHY driver module is loaded" adds 86d79d346c4f mac80211: add option for setting control flags adds 73b9f68ae99f mac80211: set IEEE80211_TX_CTRL_PORT_CTRL_PROTO for nl80211 TX adds 583965eaec37 USB: serial: option: add support for ASKEY WWHC050 adds ac53ddd4e09d USB: serial: option: add BroadMobi BM806U adds 9f76f37c7bbf USB: serial: option: add Wistron Neweb D19Q1 adds 7b27dd6fbfa5 USB: cdc-acm: restore capability check order adds a0dbf1583327 USB: serial: io_edgeport: fix slab-out-of-bounds read in e [...] adds 83f75226a7f2 usb: musb: fix crash with highmen PIO and usbmon adds d9bc386f3171 media: flexcop-usb: fix endpoint sanity check adds f035bfa4d5ce media: usbtv: fix control-message timeouts adds 7d0a6f03bbff staging: rtl8188eu: Add ASUS USB-N10 Nano B1 to device table adds 0caed6a57c35 staging: wlan-ng: fix ODEBUG bug in prism2sta_disconnect_usb adds b2f60325a350 staging: wlan-ng: fix use-after-free Read in hfa384x_usbin [...] adds eed7257a5cbf ahci: Add Intel Comet Lake H RAID PCI ID adds bf204158a8a6 libfs: fix infoleak in simple_attr_read() adds 747a7431661a media: ov519: add missing endpoint sanity checks adds 21d52891d1da media: dib0700: fix rc endpoint lookup adds 70764334b2bc media: stv06xx: add missing descriptor sanity checks adds 5d064d7f0327 media: xirlink_cit: add missing descriptor sanity checks adds a4f68ecf7336 mac80211: Check port authorization in the ieee80211_tx_deq [...] adds 605c89616911 mac80211: fix authentication with iwlwifi/mvm adds 7062646a82be vt: selection, introduce vc_is_sel adds 7de934f4099b vt: ioctl, switch VT_IS_IN_USE and VT_BUSY to inlines adds d277cae877ad vt: switch vt_dont_switch to bool adds 9fbd55e4f951 vt: vt_ioctl: remove unnecessary console allocation checks adds 54584f79579b vt: vt_ioctl: fix VT_DISALLOCATE freeing in-use virtual console adds 2ff2b207f355 vt: vt_ioctl: fix use-after-free in vt_in_use() adds b4026dacf428 platform/x86: pmc_atom: Add Lex 2I385SW to critclk_systems [...] adds aca6a9b0985b bpf: Explicitly memset the bpf_attr structure adds 638d8c748e9d bpf: Explicitly memset some bpf info structures declared o [...] adds e29629d20112 gpiolib: acpi: Add quirk to ignore EC wakeups on HP x2 10 [...] adds 9b3503810c73 net: ks8851-ml: Fix IO operations, again adds 49275ad17f1a arm64: alternative: fix build with clang integrated assembler adds 71fc11978c9e perf map: Fix off by one in strncpy() size argument adds c99fc06b7a87 ARM: dts: oxnas: Fix clear-mask property adds baa4b61553e0 ARM: bcm2835-rpi-zero-w: Add missing pinctrl name adds 5513fac57dbd ARM: dts: imx6: phycore-som: fix arm and soc minimum voltage adds 31d2ac32acdb ARM: dts: N900: fix onenand timings adds 66d4ef50b0ce arm64: dts: ls1043a-rdb: correct RGMII delay mode to rgmii-id adds 6ae3ac43abf5 arm64: dts: ls1046ardb: set RGMII interfaces to RGMII_ID mode adds dda0e2920330 Linux 4.19.114 No new revisions were added by this update. Summary of changes: Documentation/devicetree/bindings/net/fsl-fman.txt | 7 ++ Makefile | 2 +- arch/arm/boot/dts/bcm2835-rpi-zero-w.dts | 1 + arch/arm/boot/dts/dra7.dtsi | 1 + arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi | 4 +- arch/arm/boot/dts/omap3-n900.dts | 44 ++++--- arch/arm/boot/dts/omap5.dtsi | 1 + arch/arm/boot/dts/ox810se.dtsi | 4 +- arch/arm/boot/dts/ox820.dtsi | 4 +- arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi | 2 + arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 4 +- arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 4 +- arch/arm64/include/asm/alternative.h | 2 +- arch/x86/kernel/ftrace.c | 2 + drivers/ata/ahci.c | 1 + drivers/gpio/gpiolib-acpi.c | 140 +++++++++++++++++---- drivers/gpu/drm/drm_dp_mst_topology.c | 15 +-- drivers/i2c/busses/i2c-hix5hd2.c | 1 + drivers/infiniband/core/security.c | 11 +- drivers/infiniband/hw/mlx5/qp.c | 4 + drivers/input/mouse/synaptics.c | 1 + drivers/input/touchscreen/raydium_i2c_ts.c | 8 +- drivers/media/usb/b2c2/flexcop-usb.c | 6 +- drivers/media/usb/dvb-usb/dib0700_core.c | 4 +- drivers/media/usb/gspca/ov519.c | 10 ++ drivers/media/usb/gspca/stv06xx/stv06xx.c | 19 ++- drivers/media/usb/gspca/stv06xx/stv06xx_pb0100.c | 4 + drivers/media/usb/gspca/xirlink_cit.c | 18 ++- drivers/media/usb/usbtv/usbtv-core.c | 2 +- drivers/media/usb/usbtv/usbtv-video.c | 5 +- drivers/mmc/core/core.c | 5 +- drivers/mmc/core/mmc.c | 7 +- drivers/mmc/core/mmc_ops.c | 8 +- drivers/mmc/host/sdhci-omap.c | 3 + drivers/mmc/host/sdhci-tegra.c | 3 + drivers/net/can/slcan.c | 3 + drivers/net/dsa/mt7530.c | 2 +- drivers/net/ethernet/broadcom/bnxt/bnxt.c | 4 + drivers/net/ethernet/broadcom/bnxt/bnxt_dcb.c | 15 ++- drivers/net/ethernet/freescale/dpaa/dpaa_eth.c | 4 +- drivers/net/ethernet/freescale/fman/Kconfig | 28 +++++ drivers/net/ethernet/freescale/fman/fman.c | 18 +++ drivers/net/ethernet/freescale/fman/fman.h | 5 + drivers/net/ethernet/marvell/mvneta.c | 3 +- drivers/net/ethernet/mellanox/mlxsw/spectrum_mr.c | 8 +- drivers/net/ethernet/micrel/ks8851_mll.c | 56 ++++++++- drivers/net/ethernet/realtek/r8169.c | 11 +- drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c | 2 +- drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 2 +- drivers/net/geneve.c | 8 +- drivers/net/macsec.c | 3 + drivers/net/phy/mdio-mux-bcm-iproc.c | 7 +- drivers/net/usb/qmi_wwan.c | 1 + drivers/net/vxlan.c | 11 +- drivers/nfc/fdp/fdp.c | 5 +- drivers/of/of_mdio.c | 1 + drivers/platform/x86/pmc_atom.c | 8 ++ drivers/s390/net/qeth_core_main.c | 13 +- drivers/scsi/ipr.c | 3 +- drivers/scsi/ipr.h | 1 + drivers/scsi/sd.c | 4 +- drivers/staging/rtl8188eu/os_dep/usb_intf.c | 1 + drivers/staging/wlan-ng/hfa384x_usb.c | 2 + drivers/staging/wlan-ng/prism2usb.c | 1 + drivers/tty/vt/selection.c | 5 + drivers/tty/vt/vt.c | 30 ++++- drivers/tty/vt/vt_ioctl.c | 80 ++++++------ drivers/usb/class/cdc-acm.c | 18 +-- drivers/usb/musb/musb_host.c | 17 +-- drivers/usb/serial/io_edgeport.c | 2 +- drivers/usb/serial/option.c | 6 + fs/afs/rxrpc.c | 4 +- fs/ceph/file.c | 14 ++- fs/libfs.c | 8 +- fs/nfs/client.c | 1 + fs/nfs/fscache.c | 2 + fs/nfs/nfs4client.c | 1 - include/linux/ceph/osdmap.h | 4 + include/linux/ceph/rados.h | 6 +- include/linux/mmc/host.h | 1 + include/linux/selection.h | 4 +- include/linux/vt_kern.h | 2 +- include/trace/events/afs.h | 2 +- include/uapi/linux/serio.h | 10 +- kernel/bpf/btf.c | 5 +- kernel/bpf/syscall.c | 9 +- kernel/cgroup/cgroup-v1.c | 3 +- kernel/irq/manage.c | 11 +- net/ceph/osdmap.c | 9 ++ net/dsa/tag_brcm.c | 2 + net/hsr/hsr_framereg.c | 10 +- net/hsr/hsr_netlink.c | 74 ++++++----- net/hsr/hsr_slave.c | 8 +- net/ipv4/Kconfig | 1 + net/ipv4/ip_gre.c | 105 +++++++++++++--- net/ipv4/ip_vti.c | 38 ++++-- net/ipv4/tcp.c | 4 +- net/ipv6/ip6_vti.c | 34 +++-- net/mac80211/ieee80211_i.h | 3 +- net/mac80211/mesh_hwmp.c | 3 +- net/mac80211/sta_info.c | 7 +- net/mac80211/tdls.c | 2 +- net/mac80211/tx.c | 44 +++++-- net/netfilter/nf_flow_table_ip.c | 2 + net/netfilter/nft_fwd_netdev.c | 9 ++ net/packet/af_packet.c | 21 ++++ net/packet/internal.h | 5 +- net/sched/cls_route.c | 4 +- net/sched/cls_tcindex.c | 1 + net/sched/sch_cbs.c | 12 +- net/wireless/nl80211.c | 2 +- net/xfrm/xfrm_device.c | 1 + net/xfrm/xfrm_policy.c | 2 + net/xfrm/xfrm_user.c | 6 +- scripts/dtc/dtc-lexer.l | 1 - tools/perf/Makefile | 2 +- tools/perf/util/map.c | 2 +- tools/perf/util/probe-finder.c | 11 +- .../cpupower/utils/idle_monitor/amd_fam14h_idle.c | 2 +- .../cpupower/utils/idle_monitor/cpuidle_sysfs.c | 2 +- .../cpupower/utils/idle_monitor/cpupower-monitor.c | 2 + .../cpupower/utils/idle_monitor/cpupower-monitor.h | 2 +- tools/scripts/Makefile.include | 4 +- 123 files changed, 928 insertions(+), 341 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig updated (918b89b7623 -> 63f56527335)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig in repository toolchain/ci/gcc. from 918b89b7623 d: Fix new tests gdc.dg/pr93038.d and gdc.dg/pr93038b.d in [...] adds 25839b6af9f Daily bump. adds bf1f6d8819a fortran: ICE equivalence with an element of an array PR94030 adds 2c54eab5a30 fortran : ICE in gfc_resolve_findloc PR93498 adds b7a98f48e06 S/390: Remove superfluous commutative constraint modifiers adds 224efaf7e1e [Fortran] Fix error cleanup of select rank (PR93522) adds c1effaa209f libstdc++-v3/test: Better skip for "use_service.cc" adds ff825b81583 [ARM]: Fix for MVE ACLE intrinsics with writeback (PR94317). adds 66e327517b1 aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435] adds df562b12d90 aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435] adds 2c0fa3ecf70 cselib: Reuse VALUEs on sp adjustments [PR92264] adds 86c92411320 params: Decrease -param=max-find-base-term-values= default [...] adds d4ed2cd13d0 sra/doc: Document param sra-max-propagations adds 68cbee9bf53 Fix up -Wliteral-suffix warning on mti-linux.h adds 81ce375d1fd Fix PR94401 by considering reverse overrun adds 879bc686a0a doc: RISC-V: Update binutils requirement to 2.30 adds 54af95767e8 debug/94450 - remove DW_TAG_imported_unit generated in LTRA [...] adds 75efe9cb1f8 c/94392 - only enable -ffinite-loops for C++ adds b90061c6ec0 Prevent IPA-SRA from creating calls to local comdats (PR 92676) adds 3ab216a4d2f [Fortran] Resolve formal args before checking DTIO adds 0cd74f35889 Fix fortran/85982 ICE in resolve_component. adds a950bb6e952 Fix check_effective_target_sigsetjmp for glibc targets. adds 63f56527335 Fix some comment typos in alias.c. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 188 +++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/alias.c | 14 +- gcc/c-family/ChangeLog | 6 + gcc/c-family/c-opts.c | 4 + gcc/cfgloop.h | 4 + gcc/cfgloopmanip.c | 1 + gcc/common.opt | 2 +- gcc/config/aarch64/aarch64.c | 5 +- gcc/config/arm/arm-builtins.c | 11 + gcc/config/arm/arm_mve.h | 40 ++-- gcc/config/arm/arm_mve_builtins.def | 30 ++- gcc/config/arm/mve.md | 96 ++++++++- gcc/config/mips/mti-linux.h | 2 +- gcc/config/s390/vector.md | 80 +++---- gcc/config/s390/vx-builtins.md | 78 +++---- gcc/cselib.c | 235 ++++++++++++++++++--- gcc/doc/install.texi | 12 +- gcc/doc/invoke.texi | 8 +- gcc/dse.c | 57 ++++- gcc/dwarf2out.c | 18 -- gcc/fortran/ChangeLog | 28 +++ gcc/fortran/check.c | 4 + gcc/fortran/decl.c | 30 ++- gcc/fortran/gfortran.h | 1 + gcc/fortran/interface.c | 4 +- gcc/fortran/match.c | 1 + gcc/fortran/resolve.c | 16 +- gcc/ipa-icf-gimple.c | 2 + gcc/ipa-sra.c | 38 +++- gcc/lto-streamer-in.c | 1 + gcc/lto-streamer-out.c | 1 + gcc/opts.c | 1 - gcc/params.opt | 2 +- gcc/rtl.h | 1 + gcc/testsuite/ChangeLog | 56 +++++ gcc/testsuite/gcc.dg/torture/pr94392.c | 22 ++ gcc/testsuite/gcc.target/aarch64/pr94435.c | 25 +++ .../arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c | 4 +- .../arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c | 4 +- .../mve/intrinsics/vldrdq_gather_base_wb_z_s64.c | 6 +- .../mve/intrinsics/vldrdq_gather_base_wb_z_u64.c | 6 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c | 4 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c | 4 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c | 4 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_f32.c | 6 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_s32.c | 6 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_u32.c | 6 +- gcc/testsuite/gfortran.dg/dec_structure_28.f90 | 35 +++ gcc/testsuite/gfortran.dg/dtio_35.f90 | 50 +++++ gcc/testsuite/gfortran.dg/pr93498_1.f90 | 11 + gcc/testsuite/gfortran.dg/pr93498_2.f90 | 12 ++ gcc/testsuite/gfortran.dg/pr94030_1.f90 | 11 + gcc/testsuite/gfortran.dg/pr94030_2.f90 | 33 +++ gcc/testsuite/gfortran.dg/select_rank_4.f90 | 26 +++ gcc/testsuite/lib/target-supports.exp | 8 +- gcc/tree-cfg.c | 3 + gcc/tree-ssa-loop-niter.c | 2 +- gcc/tree-vect-stmts.c | 38 +++- gcc/var-tracking.c | 24 ++- libstdc++-v3/ChangeLog | 5 + .../net/execution_context/use_service.cc | 6 +- 62 files changed, 1204 insertions(+), 236 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/torture/pr94392.c create mode 100644 gcc/testsuite/gcc.target/aarch64/pr94435.c create mode 100644 gcc/testsuite/gfortran.dg/dec_structure_28.f90 create mode 100644 gcc/testsuite/gfortran.dg/dtio_35.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr93498_1.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr93498_2.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr94030_1.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr94030_2.f90 create mode 100644 gcc/testsuite/gfortran.dg/select_rank_4.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig updated (15f89256af -> e0fc5c3fcb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig in repository toolchain/ci/binutils-gdb. from 15f89256af Automatic date update in version.in adds cc77ed241b [gdb/testsuite] Accept new complex print style in mixed-lang [...] adds d321419811 [gdb] Use partial symbol table to find language for main adds 1aa98955b1 [gdb/ada] Fix -readnow FAILs adds 4f5bd88505 Replace "use use" in a warning message with "use". adds f32682eaca [gdb/testsuite] Fix silent timeout in gdb.multi/multi-target.exp adds 59e28a9767 [PATCH gas/m68k] Fix a register range check adds bb89747721 ld: Disable ifunc tests on Solaris adds 516231b7c7 linux-x86.exp: Compile with -I../bfd adds 4b27d27c07 Add support for intel SERIALIZE instruction adds a5863204fb gdbserver: make linux target op 'cannot_store_register' a pr [...] adds d16f3f6c70 gdbserver/linux-low: turn some static functions into private [...] adds ef0478f611 gdbserver/linux-low: start turning linux target ops into methods adds 797bcff595 gdbserver/linux-low: turn 'arch_setup' into a method adds aa8d21c9bb gdbserver/linux-low: turn 'regs_info' into a method adds daca57a7de gdbserver/linux-low: turn 'cannot_{fetch/store}_register' in [...] adds bd70b1f240 gdbserver/linux-low: turn 'fetch_register' into a method adds df95181f00 gdbserver/linux-low: turn some more static functions into pr [...] adds bf9ae9d8c3 gdbserver/linux-low: turn 'get_pc' and 'set_pc' into methods adds 06250e4e67 gdbserver/linux-low: turn 'breakpoint_kind_from_{pc, current [...] adds 3ca4edb661 gdbserver/linux-low: turn 'sw_breakpoint_from_kind' into a method adds 7582c77c1d gdbserver/linux-low: turn 'supports_software_single_step' an [...] adds d4807ea231 gdbserver/linux-low: turn the 'decr_pc_after_break' field in [...] adds d7146cda56 gdbserver/linux-low: turn 'breakpoint_at' into a method adds 007c9b975d gdbserver/linux-low: turn 'supports_z_point_type' into a method adds 9db9aa232a gdbserver/linux-low: turn 'insert_point' and 'remove_point' [...] adds ac1bbaca10 gdbserver/linux-low: turn watchpoint ops into methods adds b35db73327 gdbserver/linux-low: turn '{collect, supply}_ptrace_register [...] adds cb63de7ca8 gdbserver/linux-low: turn 'siginfo_fixup' into a method adds fd000fb3df gdbserver/linux-low: turn process/thread addition/deletion o [...] adds d7599cc082 gdbserver/linux-low: turn 'prepare_to_resume' into a method adds a5b5da9258 gdbserver/linux-low: turn 'process_qsupported' into a method adds 47f70aa768 gdbserver/linux-low: turn 'supports_tracepoints' into a method adds 13e567af27 gdbserver/linux-low: turn 'get_thread_area' into a method adds 809a0c354b gdbserver/linux-low: turn fast tracepoint ops into methods adds ab64c99982 gdbserver/linux-low: turn 'emit_ops' into a method adds 9cfd871551 gdbserver/linux-low: turn 'supports_range_stepping' into a method adds b31cdfa69f gdbserver/linux-low: turn 'supports_hardware_single_step' in [...] adds 9eedd27d42 gdbserver/linux-low: turn 'get_syscall_trapinfo' into a method adds fc5ecdb630 gdbserver/linux-low: turn 'get_ipa_tdesc_idx' into a method adds 0dd7b52ede gdbserver/linux-low: delete 'linux_target_ops' and 'the_low_target' adds 4d095f5b5e coff-go32-exe: support variable-length stubs adds 8be5def63b ld: Add NOCF_PROTECTION_CFLAGS to turn off -fcf-protection adds aa350065a4 NOCF_PROTECTION_CFLAGS: Replace nopie with available adds 880d97770b [gdb/testsuite] Don't use O2 for inlining in break-inline-ps [...] adds 6a35491162 gdb/testsuite: Add compiler options parameter to function_ra [...] adds 34e9a9fa0a gdb/testsuite: Add support for DW_LNS_set_file to DWARF compiler adds c90d28ac89 gdb: Don't remove duplicate entries from the line table adds e7da7f8f71 Micro-optimize partial_die_info::read adds 0830d30190 Avoid assertion failure due to complex type change adds e2ff18a0a5 gdb: replace some calls to internal_error with gdb_assert adds e0fc5c3fcb gdb: use bfd_get_section_contents to read section contents i [...] No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 39 + bfd/bfd-in2.h | 5 +- bfd/bfd.c | 5 +- bfd/bfdio.c | 4 + bfd/bfdwin.c | 1 + bfd/coff-i386.c | 22 +- bfd/coff-stgo32.c | 449 +- bfd/coffcode.h | 9 - bfd/libcoff-in.h | 8 +- bfd/libcoff.h | 8 +- binutils/ChangeLog | 5 + binutils/testsuite/lib/binutils-common.exp | 3 +- gas/ChangeLog | 22 + gas/config/tc-i386.c | 3 + gas/config/tc-m68k.c | 2 +- gas/doc/c-i386.texi | 2 + gas/testsuite/gas/elf/section12a.d | 2 +- gas/testsuite/gas/elf/section12b.d | 2 +- gas/testsuite/gas/elf/section16a.d | 2 +- gas/testsuite/gas/elf/section16b.d | 2 +- gas/testsuite/gas/i386/i386.exp | 2 + gas/testsuite/gas/i386/serialize.d | 12 + gas/testsuite/gas/i386/serialize.s | 5 + gas/testsuite/gas/i386/x86-64-serialize.d | 12 + gdb/ChangeLog | 55 + gdb/buildsym.c | 14 - gdb/dwarf2/read.c | 41 +- gdb/exec.c | 10 +- gdb/f-lang.c | 9 +- gdb/gdb_bfd.c | 14 +- gdb/gdb_bfd.h | 9 + gdb/mdebugread.c | 5 +- gdb/psymtab.c | 42 +- gdb/symfile-debug.c | 1 + gdb/symfile.c | 11 +- gdb/symfile.h | 11 + gdb/symtab.c | 37 + gdb/testsuite/ChangeLog | 44 + .../main-psymtab.exp} | 30 +- gdb/testsuite/gdb.dwarf2/break-inline-psymtab-2.c | 2 +- gdb/testsuite/gdb.dwarf2/break-inline-psymtab.exp | 3 +- ...ne-psymtab-2.c => dw2-inline-small-func-lbls.c} | 32 +- ...-inline-psymtab-2.c => dw2-inline-small-func.c} | 23 +- gdb/testsuite/gdb.dwarf2/dw2-inline-small-func.exp | 158 + ...-inline-psymtab-2.c => dw2-inline-small-func.h} | 22 +- gdb/testsuite/gdb.fortran/mixed-lang-stack.exp | 4 +- gdb/testsuite/gdb.multi/multi-target.exp | 24 +- .../inline-small-func.c} | 23 +- gdb/testsuite/gdb.opt/inline-small-func.exp | 60 + .../inline-small-func.h} | 22 +- gdb/testsuite/lib/dwarf.exp | 9 +- gdb/testsuite/lib/gdbserver-support.exp | 40 +- gdb/utils.c | 4 +- gdb/windows-tdep.c | 13 +- gdbserver/ChangeLog | 1980 +++++ gdbserver/linux-aarch64-low.cc | 377 +- gdbserver/linux-arm-low.cc | 262 +- gdbserver/linux-bfin-low.cc | 138 +- gdbserver/linux-cris-low.cc | 107 +- gdbserver/linux-crisv32-low.cc | 180 +- gdbserver/linux-ia64-low.cc | 86 +- gdbserver/linux-low.cc | 1105 ++- gdbserver/linux-low.h | 549 +- gdbserver/linux-m32r-low.cc | 134 +- gdbserver/linux-m68k-low.cc | 139 +- gdbserver/linux-mips-low.cc | 290 +- gdbserver/linux-nios2-low.cc | 125 +- gdbserver/linux-ppc-low.cc | 281 +- gdbserver/linux-riscv-low.cc | 130 +- gdbserver/linux-s390-low.cc | 258 +- gdbserver/linux-sh-low.cc | 137 +- gdbserver/linux-sparc-low.cc | 100 +- gdbserver/linux-tic6x-low.cc | 133 +- gdbserver/linux-tile-low.cc | 145 +- gdbserver/linux-x86-low.cc | 371 +- gdbserver/linux-xtensa-low.cc | 135 +- gdbserver/proc-service.cc | 2 +- gdbserver/thread-db.cc | 2 +- include/ChangeLog | 6 + include/coff/go32exe.h | 36 - include/coff/internal.h | 13 +- ld/ChangeLog | 72 + ld/ldfile.c | 2 +- ld/testsuite/config/default.exp | 38 + ld/testsuite/ld-elf/linux-x86.exp | 10 +- ld/testsuite/ld-ifunc/ifunc-10-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-11-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-12-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-13-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14c-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14d-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14e-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14f-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-15-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-16-i386-now.d | 2 +- ld/testsuite/ld-ifunc/ifunc-16-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-17a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-17b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-18a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-18b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-19a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-19b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-2-i386-now.d | 2 +- ld/testsuite/ld-ifunc/ifunc-2-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-2-local-i386-now.d | 2 +- ld/testsuite/ld-ifunc/ifunc-2-local-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-20-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-21-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-22-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-23a-x86.d | 1 - ld/testsuite/ld-ifunc/ifunc-24a-x86.d | 1 - ld/testsuite/ld-ifunc/ifunc-25a-x86.d | 1 - ld/testsuite/ld-ifunc/ifunc-5a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5a-local-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5b-local-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5r-local-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-6a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-6b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-7a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-7b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-8-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-9-i386.d | 2 +- ld/testsuite/ld-ifunc/pr17154-i386-now.d | 2 +- ld/testsuite/ld-ifunc/pr17154-i386.d | 2 +- ld/testsuite/ld-srec/srec.exp | 8 +- ld/testsuite/ld-x86-64/x86-64.exp | 10 +- opcodes/ChangeLog | 12 + opcodes/i386-dis.c | 2 +- opcodes/i386-gen.c | 5 + opcodes/i386-init.h | 358 +- opcodes/i386-opc.h | 3 + opcodes/i386-opc.tbl | 6 + opcodes/i386-tbl.h | 7970 ++++++++++---------- 136 files changed, 10175 insertions(+), 7021 deletions(-) create mode 100644 gas/testsuite/gas/i386/serialize.d create mode 100644 gas/testsuite/gas/i386/serialize.s create mode 100644 gas/testsuite/gas/i386/x86-64-serialize.d copy gdb/testsuite/{gdb.dwarf2/break-inline-psymtab.exp => gdb.base/main-psymtab.e [...] copy gdb/testsuite/gdb.dwarf2/{break-inline-psymtab-2.c => dw2-inline-small-func-l [...] copy gdb/testsuite/gdb.dwarf2/{break-inline-psymtab-2.c => dw2-inline-small-func.c} (74%) create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-inline-small-func.exp copy gdb/testsuite/gdb.dwarf2/{break-inline-psymtab-2.c => dw2-inline-small-func.h} (74%) copy gdb/testsuite/{gdb.dwarf2/break-inline-psymtab-2.c => gdb.opt/inline-small-fu [...] create mode 100644 gdb/testsuite/gdb.opt/inline-small-func.exp copy gdb/testsuite/{gdb.dwarf2/break-inline-psymtab-2.c => gdb.opt/inline-small-fu [...] delete mode 100644 include/coff/go32exe.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig updated (916d1f82 -> 1d4fef8d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 916d1f82 0: update: binutils-gcc-linux: all new 1d4fef8d 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (916d1f82) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-lt [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 120 +- 02-prepare_abe/console.log | 42 +- 03-build_abe-binutils/console.log | 11422 +++++------ 04-build_abe-stage1/console.log | 20256 +++++++++--------- 05-build_linux/console.log | 834 +- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 14 +- 07-check_regression/results.regressions | 2 +- 08-update_baseline/console.log | 12 +- 08-update_baseline/results.regressions | 2 +- console.log | 32734 +++++++++++++++--------------- jenkins/manifest.sh | 16 +- 12 files changed, 32742 insertions(+), 32714 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

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