Tcwg-commits April 2020

tcwg-commits@lists.linaro.org

6 participants
10681 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_O1 updated (969f86e1 -> b605d7ab)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_O1 in repository toolchain/ci/base-artifacts. discards 969f86e1 0: update: gcc-13f6d5ac48a7d55b41927849aeebc5832f8c63f0: 1 new b605d7ab 0: update: gcc-b20b7f7e88fd40a76f422838ed5ba64e33814d91: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (969f86e1) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-release-aarch64- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 118 +- 02-prepare_abe/console.log | 432 +- 03-build_abe-bootstrap_O1/console.log | 66031 +++++++++++++++---------------- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 2 +- console.log | 66583 ++++++++++++++++---------------- jenkins/manifest.sh | 8 +- 7 files changed, 66591 insertions(+), 66585 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[newlib] branch master updated (fb834beeb -> 44fe41a76)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository newlib. from fb834beeb Cygwin: symlinks: fix WSL symlinks pointing to /mnt new 44da5e4b8 Cygwin: symlinks: create WSL symlinks on supporting filesystems new 44fe41a76 Cygwin: docs: revamp docs explaining symlinks The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: winsup/cygwin/path.cc | 127 ++++++++++++++++++++++++++++++++++-------- winsup/cygwin/release/3.1.5 | 2 +- winsup/doc/faq-api.xml | 131 ++++++++++++++++++++++++++++++++++---------- winsup/doc/faq-using.xml | 14 +++-- winsup/doc/new-features.xml | 2 +- winsup/doc/pathnames.xml | 75 ++++++++++++------------- winsup/doc/specialnames.xml | 3 +- 7 files changed, 251 insertions(+), 103 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[gcc] branch devel/c++-modules updated (2188cea2c64 -> 2c6b4bd9ab0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch devel/c++-modules in repository gcc. from 2188cea2c64 Merge master bcafd8748cf9eb83a9e71bf67c4e2a7c5c8f513c new 2c6b4bd9ab0 Zap NSDMIS on as_base fields [PR94476] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog.modules | 6 ++++++ gcc/cp/class.c | 3 +++ gcc/testsuite/g++.dg/modules/nsdmi-2.C | 19 +++++++++++++++++++ 3 files changed, 28 insertions(+) create mode 100644 gcc/testsuite/g++.dg/modules/nsdmi-2.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allmodconfig updated (4b0b6303dde -> b20b7f7e88f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allmodconfig in repository toolchain/ci/gcc. from 4b0b6303dde tree-optimization/94103 avoid CSE of loads with padding adds 86f7d3333bd Fix fortran/85982 ICE in resolve_component. adds 7fe7c950c32 Daily bump. adds 69df6742cb4 Backport 55a7380213a5c16120d5c674fb42b38a3d796b57 adds b20b7f7e88f libstdc++: Fix std::to_address for debug iterators (PR 93960) No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 18 +++++++++++ gcc/DATESTAMP | 2 +- gcc/fortran/decl.c | 30 +++++++++++++------ gcc/ipa-icf-gimple.c | 4 +++ gcc/testsuite/ChangeLog | 8 +++++ gcc/testsuite/gfortran.dg/dec_structure_28.f90 | 35 ++++++++++++++++++++++ libstdc++-v3/ChangeLog | 11 +++++++ libstdc++-v3/include/bits/ptr_traits.h | 11 ++++++- libstdc++-v3/testsuite/20_util/to_address/1_neg.cc | 2 +- .../20_util/to_address/{1_neg.cc => debug.cc} | 26 ++++++++-------- 10 files changed, 122 insertions(+), 25 deletions(-) create mode 100644 gcc/testsuite/gfortran.dg/dec_structure_28.f90 copy libstdc++-v3/testsuite/20_util/to_address/{1_neg.cc => debug.cc} (66%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allmodconfig updated (75b92a99 -> 1b204f46)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards 75b92a99 0: update: binutils-gcc-linux: all new 1b204f46 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (75b92a99) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-prepare_abe/console.log | 436 +- 03-build_abe-binutils/console.log | 11468 +++++------ 04-build_abe-stage1/console.log | 18192 ++++++++--------- 05-build_linux/console.log | 806 +- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 2 +- 07-check_regression/results.regressions | 2 +- 08-update_baseline/console.log | 2 +- 08-update_baseline/results.regressions | 2 +- console.log | 31076 +++++++++++++++--------------- jenkins/manifest.sh | 8 +- 12 files changed, 31085 insertions(+), 31077 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (ab11b9eefa1 -> ba87430cadb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/llvm-project. from ab11b9eefa1 Revert "Make it possible for lit.site.cfg to contain relati [...] adds 6acd3003755 Reland D75382 "[lld] Initial commit for new Mach-O backend" adds 4fdb63bbf0c [X86] Enable combineExtSetcc for vectors larger than 256 bi [...] adds ea3152bb3d3 [libc++][test] Partially revert msvc_stdlib_force_include.h [...] adds fd4d07517b2 [llvm][TextAPI] adding inlining reexported libraries support adds a16ba6fea2e Reland "Make it possible for lit.site.cfg to contain relati [...] adds a6a841e0d7c [libc++] Refer to the Filesystem static test env as relative paths adds 90455dbe2e7 [libc++] NFC: Add documentation for writing tests adds 0c85c488e2b utils: Tweak clang-parse-diagnostics-file for modules includes adds 75cf30918f3 AMDGPU: Assume f32 denormals are enabled by default adds ce2258c1cd5 clang/AMDGPU: Stop setting old denormal subtarget features adds 5660bb6bc9a AMDGPU: Remove denormal subtarget features adds 192cccb1522 AMDGPU: Add some tests for exotic denormal mode combinations adds f68cc2a7ed7 AMDGPU: Use 128-bit DS operations by default adds cab904c6d31 [lit] Remove unnecessary indirection in progress_callback adds 022f1e2cc83 [lit] Refine filter error handling adds b94afc19ebc iOS simulator testing: replace `simctl bootstatus` with boo [...] adds 2aab46ab028 [llvm-objdump][COFF][NFC] Split format-specific interfaces; [...] adds 2680e880695 AMDGPU: Fix broken check lines adds 05598441dee Re-apply 0071eaaf089, "[ORC] Export __cxa_atexit ...", with fixes. adds e875ba15099 Try again to get tests passing again on Windows. adds 8838d6d3566 try more to appease win bots adds c024f3ebdcf Teach the stripNonLineTableDebugInfo pass about the llvm.db [...] adds 93fe58c9cf5 Teach the stripNonLineTableDebugInfo pass about the llvm.db [...] adds 30f18ed387c [AMDGPU] Handle SMRD signed offset immediate adds aef0877b1ba [mlir][Linalg] NFC - Rename Linalg and Vector EDSCs to avoi [...] adds 9c6f32a0ffd [Coroutines] Simplify implementation using removePredecessor adds c7aff9a109b another wild guess at the win bot-only failures adds 5998aceda9f Have lldb-vscode update the currently selecte thread and fr [...] adds 3a5192098c5 [mlir][VectorOps] Implement canonicalization for TransposeOp. adds 627e01feb71 [coroutines] Don't build promise init with no args adds 20cb7a904fc This might actually fix the Windows bots after a16ba6fea. adds 71f1ab53544 [PowerPC] Remove unnecessary XSRSP instruction adds fe8ac0fe51a [x86] Fix Intel OpenCL builtin CalleeSavedRegs on skx adds 71947ed927e [AArch64][GlobalISel] Constrain reg operands in selectBrJT adds be0a4fef6e7 [X86] Add -flax-vector-conversions=none to more of the clan [...] adds 43f031d3126 Enable IBT(Indirect Branch Tracking) in JIT with CET(Contro [...] adds 88da0199772 Fix a bug in the inliner that causes subsequent double inlining adds a0983ed3d2c Handle exp2 with proper vectorization and lowering to SVML calls adds 31b6e182f2c Use git-clang-format as Arcanist linter adds 71e8021d82c [X86][NFC] Generalize the naming of "Retpoline Thunks" and [...] adds 0cfdce26ea2 [gn build] Port 71e8021d82c adds b1d581019f5 [X86] Refactor X86IndirectThunks.cpp to Accommodate Mitigat [...] adds fef2dab100d Bugix for buildbot failure at commit 43f031d31264d20cfb8f1e [...] adds bd1d70bf0e1 [DAG] Change isGCValue detection for statepoint lowering adds 69c8fb1c65f [DWARF5] Added support for debug_macro section parsing and [...] adds f13ce15d441 [DebugInfo] Rename getOffset() to getContribution(). NFC. adds 0a3845b70f4 Silence -Wpessimizing-move warning adds 5b519cf1fc6 [X86] Add Indirect Thunk Support to X86 to mitigate Load Va [...] adds 6825920b181 Silence -Wpessimizing-move warning adds 9f5c786876c [NFC] G_DYN_STACKALLOC realign iff align > 1, update documentation adds 9b56cc9361a [DebugInfo] Salvage debug info when sinking loop invariant [...] adds 1aee1ae5326 Use --style file instead of --style LLVM adds ca11c480e78 [Alignment][NFC] Convert MachineIRBuilder::buildDynStackAll [...] adds c7e1fc8496d [AMDGPU] Fix CHECK lines adds 1a584a8d509 [Alignment][NFC] Remove unused private functions adds da74537e870 [LLD][ELF][ARM] use .reloc directive for Thumb assembler tests adds 02cb21df3f4 Make helpers static. NFC. adds 6aecf0cfef0 Drop unused diagnostic. NFC. adds 0718e3ae31b [mlir][vulkan-runner] Add support for 3D memrefs. adds 146d685cd65 clang-format: [JS] detect C++ keywords. adds 107200ae0a0 [lldb][nfc] early exit/continue adds a46e7d7a5f6 [AMDGPU] Allow AGPR in inline asm adds 5e426363ba4 [X86][AVX] Add tests showing failure to use chained PACKSS/ [...] adds 9068bccbae3 [Alignment][NFC] Deprecate InstrTypes getRetAlignment/getPa [...] adds f22445bf576 [mips][test] Remove redundant and invalid `CHECK-NOT` direc [...] adds d65557d15d4 [NFC][XCOFF][AIX] Refactor get/setContainingCsect adds 3e1b8db3093 Revert "Use git-clang-format as Arcanist linter" adds 164ed7b1d04 [clangd] Enable some nice clang-tidy checks by default. adds 0a173fd9a5d [gn build] Port d65557d15d4 adds c484b3e334d [Hexagon] Fix issue with non-preemptible STT_TLS symbols adds 74f00c66dd3 [X86] Regenerate stack clash test to fix issue reported on D77354 adds 7521f3c2f06 [X86] Regenerate soft fp legalization test to fix issue rep [...] adds b72fce1ffd0 Fix __builtin_amdgcn_workgroup_size_x/y/z return type adds 937040d1819 [libc++] Add REQUIRES for tests that need -fblocks and -fobjc-arc adds 4824b5ecce2 [Alignment][NFC] Remove documentation and FIXME for depreca [...] adds 3d94f3060c4 [libc++] Fix is_pointer support for Objective-C++ adds 71305033d11 [LoopOps] Return ArrayRefs from accessors instead of iterat [...] adds aa8434fa3d1 [X86] Cleanup emulated TLS test checks. NFC adds e9511c0206d [X86] Fix strong local function/global label issue reported [...] adds 58c242e7b87 [X86] Fix gisel copy tests to fix issue reported on D77354 adds 40fc3de369a [X86] Fix weak global label issue reported on D77354 adds 6897111231e [MSan] Add COMMON_INTERCEPTOR_NOTHING_IS_INITIALIZED adds 88fbadd0f5d [AST] clang::VectorType supports any size (that fits in unsigned) adds 80a2ddf65cc [libc++] Add an alternative Lit test format adds 80d4df5be66 [X86] Remove defunct section checks from emulated TLS tests [...] adds 56decd982dc [ELF] Allow invalid sh_size%sh_entsize!=0 for non-SHF_MERGE [...] adds 57a55313c3d InstCombine: Reduce minnum/maxnum if inputs are casted adds 5f47f613de5 [PowerPC] Regenerate f128 test to fix issue reported on D77354 adds 43d2fc7ed74 [LoopRotate] Cleanup test checks to fix issue reported on D77354 adds 63bfb3a81ba [lldb/Symbol] Reimplement Symbols::FindSymbolFileInBundle t [...] adds d144087c963 [lldb/Support] Treat empty FileSpec as an invalid file. adds 6d24dd7ed11 [InstSimplify] Regenerate compares tests to fix issue repor [...] adds 966ae762229 Run update_llc_test on test/CodeGen/ARM/vmov.ll adds cd58fb63253 [ARM] Avoid pointless vrev of element-wise vmov adds 4ad9ca0f9e1 [ARM] Fix incorrect handling of big-endian vmov.i64 adds 389704cc601 [PhaseOrdering] add shuffle tests based on D40633; NFC adds 30053c842ca [AArch64] Fix swap-compare-operands test names to fix issue [...] adds b952d799cac [cuda][hip] Fix `RegisterVar` function prototype. adds 396b1ee0e0b [LoopStrengthReduce] Fix test checks to fix issue reported [...] adds 8e7b25bb401 [NFC] Move ARM `opt -indvars` test from Codegen into Transforms adds 7d572ef2dd9 Revert "[SCEV] rewriteLoopExitValues(): even if have hard u [...] adds 34a497b7653 [X86][SSE] lowerShuffleWithPACK - extend to use chained PAC [...] adds ae044c5b0ca [CMAKE] Plumb include_directories() into tablegen() adds f288c216875 Revert "[CMAKE] Plumb include_directories() into tablegen()" adds aaaa25e23db [libc++] Remove useless nothing_to_do.pass.cpp tests adds e4ae0a2e975 [Support/Path] sys::path::replace_path_prefix fix and simpl [...] adds ce97ce3a5d7 [VectorCombine] try to form a better extractelement adds 22257975679 [YAMLParser] Scanner::setError - ensure we use the StringRe [...] adds b4b7c989d6f [libc++] Remove support for specifying LIBCXX_CXX_ABI_SYSTE [...] adds 0462795095e [AMDGPU] Propagate AGPR RC from PHI to its PHI operands adds 0c0831f74b7 [CMAKE] Plumb include_directories() into tablegen() new b6008096885 Clean up usages of asserting vector getters in Type new f27f1e8c27b [mlir] DialectConversion: support block creation in Convers [...] new 8c5dc084e52 [AMDGPU] Added label to test. NFC. new 2c7ea1c4c5f [clang-tidy] Address false positive in modernize-use-defaul [...] new 5d14c7b6d1f [libc++] NFC: Remove unused CMake option new e8dcb6d05e0 AMDGPU: Remove redundant virtual new 178050c3ba1 AMDGPU: Use Register in more places new 30ebafaa568 CodeGen: Convert some TII hooks to use Register new ea397a76f56 Support: Add specializations for reverseBits to use builtin new 9657446313a [compiler-rt] Build with correct ABI (PR38025) new ba87430cadb [PowerPC] Replace subtract-from-zero float in version with [...] The 11 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 4 +- .../modernize/UseDefaultMemberInitCheck.cpp | 16 +- clang-tools-extra/clangd/tool/ClangdMain.cpp | 36 +- .../checkers/modernize-use-default-member-init.cpp | 14 + clang/cmake/modules/AddClang.cmake | 2 +- clang/docs/ClangCommandLineReference.rst | 4 + clang/include/clang/AST/Type.h | 9 +- clang/include/clang/Basic/BuiltinsAMDGPU.def | 6 +- clang/include/clang/Basic/Cuda.h | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 2 - clang/include/clang/Driver/Options.td | 4 + clang/lib/Basic/Cuda.cpp | 2 +- clang/lib/Basic/Targets/AMDGPU.cpp | 53 +- clang/lib/Basic/Targets/AMDGPU.h | 13 +- clang/lib/CodeGen/CGBuiltin.cpp | 15 +- clang/lib/CodeGen/CGCUDANV.cpp | 12 +- clang/lib/Driver/ToolChains/Arch/X86.cpp | 17 + clang/lib/Format/FormatToken.h | 61 +- clang/lib/Format/TokenAnnotator.cpp | 12 +- clang/lib/Sema/SemaCoroutine.cpp | 55 +- clang/lib/Sema/SemaType.cpp | 29 +- clang/test/CMakeLists.txt | 17 + clang/test/CodeGen/avx512cdintrin.c | 2 +- clang/test/CodeGen/avx512vbmivl-builtin.c | 2 +- .../CodeGen/avx512vl-builtins-constrained-cmp.c | 2 +- clang/test/CodeGen/avx512vpopcntdqintrin.c | 2 +- clang/test/CodeGen/avx512vpopcntdqvlintrin.c | 2 +- clang/test/CodeGen/builtins-ppc-fma.c | 43 + clang/test/CodeGen/gfni-builtins.c | 6 +- clang/test/CodeGen/intel-avx512vlvp2intersect.c | 4 +- clang/test/CodeGen/intel-avx512vp2intersect.c | 4 +- clang/test/CodeGen/vaes-builtins.c | 4 +- clang/test/CodeGen/vpclmulqdq-builtins.c | 4 +- clang/test/CodeGenCUDA/device-stub.cu | 8 +- clang/test/CodeGenCUDA/flush-denormals.cu | 34 +- clang/test/CodeGenOpenCL/amdgpu-features.cl | 20 +- clang/test/CodeGenOpenCL/builtins-amdgcn.cl | 2 +- clang/test/CodeGenOpenCL/inline-asm-amdgcn.cl | 31 +- clang/test/Driver/x86-target-features.c | 5 + clang/test/Sema/types.c | 12 +- clang/test/SemaCXX/vector.cpp | 17 +- clang/test/Unit/lit.site.cfg.py.in | 15 +- clang/test/lit.site.cfg.py.in | 21 +- clang/unittests/Format/FormatTestJS.cpp | 62 +- compiler-rt/CMakeLists.txt | 1 - compiler-rt/cmake/Modules/AddCompilerRT.cmake | 8 + compiler-rt/cmake/Modules/HandleCompilerRT.cmake | 77 +- compiler-rt/cmake/config-ix.cmake | 2 +- compiler-rt/lib/msan/msan_interceptors.cpp | 2 + .../ios_commands/iossim_prepare.py | 5 +- libcxx/CMakeLists.txt | 1 - libcxx/cmake/Modules/HandleLibCXXABI.cmake | 2 +- libcxx/docs/TestingLibcxx.rst | 23 + libcxx/include/type_traits | 14 - libcxx/test/CMakeLists.txt | 3 - .../substitutes-in-compile-flags.sh.cpp} | 8 +- .../substitutes-in-run.sh.cpp} | 12 +- .../compile-error.compile.fail.cpp} | 13 +- .../compile-success.compile.fail.cpp} | 12 +- .../wrong-expected.compile.fail.cpp} | 14 +- .../compile-error.compile.pass.cpp} | 13 +- .../compile-success.compile.pass.cpp} | 6 +- .../compile.pass.cpp/link-error.compile.pass.cpp} | 8 +- .../compile.pass.cpp/run-error.compile.pass.cpp} | 6 +- .../fail.cpp/compile-error-with-verify.fail.cpp} | 9 +- .../compile-error-without-verify.fail.cpp} | 9 +- .../newformat/fail.cpp/compile-success.fail.cpp} | 12 +- .../newformat/fail.cpp/wrong-expected.fail.cpp} | 14 +- .../fail.mm/compile-error-with-verify.fail.mm} | 13 +- .../fail.mm/compile-error-without-verify.fail.mm} | 13 +- .../newformat/fail.mm/compile-success.fail.mm} | 12 +- .../newformat/fail.mm/wrong-expected.fail.cpp} | 14 +- .../file_dependencies/no-dependencies.sh.cpp} | 8 +- .../substitute-in-dependencies.sh.cpp} | 8 +- .../file_dependencies/substitute-in-run.sh.cpp | 17 + .../link.fail.cpp/compile-error.link.fail.cpp} | 13 +- .../link.fail.cpp/link-error.link.fail.cpp} | 8 +- .../link.fail.cpp/link-success.link.fail.cpp} | 8 +- .../link.pass.cpp/compile-error.link.pass.cpp} | 13 +- .../link.pass.cpp/link-error.link.pass.cpp} | 12 +- .../link.pass.cpp/link-success.link.pass.cpp} | 6 +- .../link.pass.cpp/run-error.link.pass.cpp} | 7 +- .../test/libcxx/selftest/newformat/lit.local.cfg | 4 + .../newformat/pass.cpp/compile-error.pass.cpp} | 13 +- .../newformat/pass.cpp/link-error.pass.cpp} | 12 +- .../newformat/pass.cpp/run-error.pass.cpp} | 8 +- .../newformat/pass.cpp/run-success.pass.cpp} | 6 +- .../newformat/pass.mm/compile-error.pass.mm} | 13 +- .../selftest/newformat/pass.mm/link-error.pass.mm} | 12 +- .../pass.mm/no-arc.pass.mm} | 11 +- .../selftest/newformat/pass.mm/run-error.pass.mm} | 12 +- .../newformat/pass.mm/run-success.pass.mm} | 8 +- .../newformat/pass.mm/use-objective-cxx.pass.mm} | 13 +- .../run.fail.cpp/compile-error.run.fail.cpp} | 13 +- .../run.fail.cpp/link-error.run.fail.cpp} | 13 +- .../newformat/run.fail.cpp/run-error.run.fail.cpp} | 6 +- .../run.fail.cpp/run-success.run.fail.cpp} | 8 +- .../newformat/sh.cpp/empty.sh.cpp} | 6 +- .../newformat/sh.cpp/remote-substitutions.sh.cpp | 30 + .../selftest/newformat/sh.cpp/run-error.sh.cpp} | 8 +- .../selftest/newformat/sh.cpp/run-success.sh.cpp} | 6 +- .../selftest/newformat/sh.cpp/substitutions.sh.cpp | 28 + libcxx/test/libcxx/selftest/test.arc.pass.mm | 1 + libcxx/test/libcxx/selftest/test.pass.mm | 2 + .../test/libcxx/type_traits/is_pointer.arc.pass.mm | 53 +- .../test/libcxx/type_traits/is_scalar.objc.pass.mm | 4 +- .../libcxx/utilities/optional/block.objc.pass.mm | 2 + libcxx/test/lit.cfg | 9 +- libcxx/test/nothing_to_do.pass.cpp | 13 - .../alg.heap.operations/nothing_to_do.pass.cpp | 13 - .../alg.set.operations/nothing_to_do.pass.cpp | 13 - .../alg.sorting/alg.sort/nothing_to_do.pass.cpp | 13 - .../algorithms/alg.sorting/nothing_to_do.pass.cpp | 13 - .../atomics/atomics.general/nothing_to_do.pass.cpp | 14 - .../nothing_to_do.pass.cpp | 14 - .../container.adaptors/nothing_to_do.pass.cpp | 13 - .../associative.reqmts/nothing_to_do.pass.cpp | 13 - .../nothing_to_do.pass.cpp | 13 - .../container.requirements/nothing_to_do.pass.cpp | 13 - .../unord.req/nothing_to_do.pass.cpp | 13 - libcxx/test/std/containers/nothing_to_do.pass.cpp | 13 - .../containers/sequences/nothing_to_do.pass.cpp | 13 - .../std/depr/depr.auto.ptr/nothing_to_do.pass.cpp | 13 - .../depr.adaptors/nothing_to_do.pass.cpp | 13 - .../depr.function.objects/nothing_to_do.pass.cpp | 13 - .../depr/depr.lib.binders/nothing_to_do.pass.cpp | 13 - .../exception.unexpected/nothing_to_do.pass.cpp | 13 - libcxx/test/std/depr/nothing_to_do.pass.cpp | 13 - libcxx/test/std/diagnostics/nothing_to_do.pass.cpp | 13 - .../syserr/syserr.errcat/nothing_to_do.pass.cpp | 13 - .../syserr/syserr.errcode/nothing_to_do.pass.cpp | 13 - .../syserr.errcondition/nothing_to_do.pass.cpp | 13 - .../syserr/syserr.syserr/nothing_to_do.pass.cpp | 13 - .../func/func.searchers/nothing_to_do.pass.cpp | 14 - .../std/experimental/func/nothing_to_do.pass.cpp | 14 - .../nothing_to_do.pass.cpp | 11 - .../std/experimental/memory/nothing_to_do.pass.cpp | 14 - .../test/std/experimental/nothing_to_do.pass.cpp | 11 - .../experimental/utilities/nothing_to_do.pass.cpp | 14 - .../file.streams/nothing_to_do.pass.cpp | 13 - .../directory_entry.cons/path.pass.cpp | 1 + .../directory_entry.mods/replace_filename.pass.cpp | 1 + .../directory_entry.obs/file_size.pass.cpp | 1 + .../directory_entry.obs/hard_link_count.pass.cpp | 1 + .../directory_entry.obs/last_write_time.pass.cpp | 1 + .../directory_iterator.members/copy.pass.cpp | 1 + .../copy_assign.pass.cpp | 1 + .../directory_iterator.members/ctor.pass.cpp | 1 + .../directory_iterator.members/increment.pass.cpp | 1 + .../directory_iterator.members/move.pass.cpp | 1 + .../move_assign.pass.cpp | 1 + .../begin_end.pass.cpp | 1 + .../rec.dir.itr.members/copy.pass.cpp | 1 + .../rec.dir.itr.members/copy_assign.pass.cpp | 1 + .../rec.dir.itr.members/ctor.pass.cpp | 1 + .../rec.dir.itr.members/depth.pass.cpp | 1 + .../disable_recursion_pending.pass.cpp | 1 + .../rec.dir.itr.members/increment.pass.cpp | 1 + .../rec.dir.itr.members/move.pass.cpp | 1 + .../rec.dir.itr.members/move_assign.pass.cpp | 1 + .../rec.dir.itr.members/pop.pass.cpp | 1 + .../rec.dir.itr.members/recursion_pending.pass.cpp | 1 + .../rec.dir.itr.nonmembers/begin_end.pass.cpp | 1 + .../fs.op.funcs/fs.op.canonical/canonical.pass.cpp | 1 + .../fs.op.current_path/current_path.pass.cpp | 1 + .../fs.op.equivalent/equivalent.pass.cpp | 1 + .../fs.op.funcs/fs.op.file_size/file_size.pass.cpp | 1 + .../fs.op.hard_lk_ct/hard_link_count.pass.cpp | 1 + .../fs.op.is_directory/is_directory.pass.cpp | 1 + .../fs.op.funcs/fs.op.is_empty/is_empty.pass.cpp | 1 + .../fs.op.is_symlink/is_symlink.pass.cpp | 1 + .../fs.op.last_write_time/last_write_time.pass.cpp | 1 + .../fs.op.funcs/fs.op.relative/relative.pass.cpp | 1 + .../fs.op.funcs/fs.op.space/space.pass.cpp | 1 + .../fs.op.funcs/fs.op.status/status.pass.cpp | 1 + .../fs.op.symlink_status/symlink_status.pass.cpp | 1 + .../weakly_canonical.pass.cpp | 1 + .../std/input.output/filesystems/lit.local.cfg | 3 - .../istream.formatted/nothing_to_do.pass.cpp | 13 - .../iostream.format/nothing_to_do.pass.cpp | 13 - .../ostream.formatted/nothing_to_do.pass.cpp | 13 - .../iostreams.base/fpos/nothing_to_do.pass.cpp | 13 - .../ios.base/ios.types/nothing_to_do.pass.cpp | 13 - .../std.ios.manip/nothing_to_do.pass.cpp | 13 - .../iostreams.requirements/nothing_to_do.pass.cpp | 13 - .../test/std/input.output/nothing_to_do.pass.cpp | 13 - .../streambuf.members/nothing_to_do.pass.cpp | 13 - .../streambuf.protected/nothing_to_do.pass.cpp | 13 - .../streambuf.virtuals/nothing_to_do.pass.cpp | 13 - .../iterator.primitives/nothing_to_do.pass.cpp | 13 - .../iterator.requirements/nothing_to_do.pass.cpp | 13 - .../iterators.general/nothing_to_do.pass.cpp | 13 - .../back.insert.iter.ops/nothing_to_do.pass.cpp | 13 - .../front.insert.iter.ops/nothing_to_do.pass.cpp | 13 - .../insert.iter.ops/nothing_to_do.pass.cpp | 13 - .../insert.iterators/nothing_to_do.pass.cpp | 13 - .../move.iter.ops/nothing_to_do.pass.cpp | 13 - .../move.iterators/nothing_to_do.pass.cpp | 13 - .../predef.iterators/nothing_to_do.pass.cpp | 13 - .../reverse.iterators/nothing_to_do.pass.cpp | 13 - .../reverse.iter.ops/nothing_to_do.pass.cpp | 13 - .../stream.iterators/nothing_to_do.pass.cpp | 13 - .../std/language.support/nothing_to_do.pass.cpp | 13 - .../alloc.errors/nothing_to_do.pass.cpp | 13 - .../new.delete/nothing_to_do.pass.cpp | 13 - .../exception.terminate/nothing_to_do.pass.cpp | 13 - .../support.limits/nothing_to_do.pass.cpp | 13 - .../category.collate/nothing_to_do.pass.cpp | 13 - .../category.messages/nothing_to_do.pass.cpp | 13 - .../category.monetary/nothing_to_do.pass.cpp | 13 - .../category.numeric/nothing_to_do.pass.cpp | 13 - .../category.time/nothing_to_do.pass.cpp | 13 - .../facet.numpunct/nothing_to_do.pass.cpp | 13 - .../conversions/nothing_to_do.pass.cpp | 13 - .../locale.convenience/nothing_to_do.pass.cpp | 13 - .../locale/locale.types/nothing_to_do.pass.cpp | 13 - .../locales/locale/nothing_to_do.pass.cpp | 13 - .../localization/locales/nothing_to_do.pass.cpp | 13 - libcxx/test/std/nothing_to_do.pass.cpp | 14 - .../test/std/numerics/bit/nothing_to_do.pass.cpp | 12 - libcxx/test/std/numerics/nothing_to_do.pass.cpp | 13 - .../numarray/class.gslice/nothing_to_do.pass.cpp | 13 - .../numarray/class.slice/nothing_to_do.pass.cpp | 13 - .../valarray.nonmembers/nothing_to_do.pass.cpp | 13 - .../test/std/numerics/rand/nothing_to_do.pass.cpp | 13 - .../rand/rand.adapt/nothing_to_do.pass.cpp | 13 - .../numerics/rand/rand.dis/nothing_to_do.pass.cpp | 13 - .../rand.dis/rand.dist.bern/nothing_to_do.pass.cpp | 13 - .../rand.dis/rand.dist.norm/nothing_to_do.pass.cpp | 13 - .../rand.dis/rand.dist.pois/nothing_to_do.pass.cpp | 13 - .../rand.dis/rand.dist.samp/nothing_to_do.pass.cpp | 13 - .../rand.dis/rand.dist.uni/nothing_to_do.pass.cpp | 13 - .../numerics/rand/rand.eng/nothing_to_do.pass.cpp | 13 - .../numerics/rand/rand.req/nothing_to_do.pass.cpp | 13 - .../numerics/rand/rand.util/nothing_to_do.pass.cpp | 13 - libcxx/test/std/re/nothing_to_do.pass.cpp | 13 - libcxx/test/std/re/re.alg/nothing_to_do.pass.cpp | 13 - libcxx/test/std/re/re.const/nothing_to_do.pass.cpp | 14 - libcxx/test/std/re/re.def/nothing_to_do.pass.cpp | 14 - .../test/std/re/re.grammar/nothing_to_do.pass.cpp | 13 - libcxx/test/std/re/re.iter/nothing_to_do.pass.cpp | 13 - .../re.regex.nonmemb/nothing_to_do.pass.cpp | 13 - .../string.modifiers/nothing_to_do.pass.cpp | 13 - .../string.nonmembers/nothing_to_do.pass.cpp | 13 - .../basic.string/string.ops/nothing_to_do.pass.cpp | 13 - .../nothing_to_do.pass.cpp | 13 - .../std/strings/char.traits/nothing_to_do.pass.cpp | 13 - .../nothing_to_do.pass.cpp | 13 - .../nothing_to_do.pass.cpp | 13 - .../nothing_to_do.pass.cpp | 13 - .../nothing_to_do.pass.cpp | 13 - .../nothing_to_do.pass.cpp | 13 - .../thread.once/nothing_to_do.pass.cpp | 13 - .../std/thread/thread.req/nothing_to_do.pass.cpp | 13 - .../thread.req.lockable/nothing_to_do.pass.cpp | 13 - .../bind/func.bind/nothing_to_do.pass.cpp | 13 - .../function.objects/bind/nothing_to_do.pass.cpp | 13 - .../func.search/nothing_to_do.pass.cpp | 14 - .../func.wrap/nothing_to_do.pass.cpp | 13 - .../std/utilities/intseq/nothing_to_do.pass.cpp | 13 - .../memory/allocator.uses/nothing_to_do.pass.cpp | 13 - .../specialized.algorithms/nothing_to_do.pass.cpp | 13 - .../memory/util.smartptr/nothing_to_do.pass.cpp | 13 - .../meta/meta.trans/nothing_to_do.pass.cpp | 13 - .../meta/meta.unary/nothing_to_do.pass.cpp | 13 - libcxx/test/std/utilities/nothing_to_do.pass.cpp | 13 - .../smartptr/unique.ptr/nothing_to_do.pass.cpp | 13 - .../unique.ptr.dltr/nothing_to_do.pass.cpp | 13 - .../utilities/time/time.cal/nothing_to_do.pass.cpp | 13 - .../time/time.clock/nothing_to_do.pass.cpp | 13 - .../time/time.traits/nothing_to_do.pass.cpp | 13 - .../utility.requirements/nothing_to_do.pass.cpp | 13 - .../utilities/utility/pairs/nothing_to_do.pass.cpp | 13 - libcxx/test/support/filesystem_test_helper.h | 12 +- libcxx/test/support/msvc_stdlib_force_include.h | 8 +- libcxx/test/support/nothing_to_do.pass.cpp | 14 - libcxx/utils/libcxx/test/config.py | 13 + libcxx/utils/libcxx/test/newformat.py | 243 ++++ libcxxabi/test/lit.cfg | 7 +- lld/CMakeLists.txt | 1 + lld/COFF/InputFiles.cpp | 2 +- lld/ELF/InputFiles.cpp | 8 +- lld/ELF/Relocations.cpp | 5 +- lld/MachO/Arch/X86_64.cpp | 60 + lld/MachO/CMakeLists.txt | 31 + lld/MachO/Config.h | 29 + lld/MachO/Driver.cpp | 150 +++ lld/MachO/Driver.h | 35 + lld/MachO/InputFiles.cpp | 204 ++++ lld/MachO/InputFiles.h | 70 ++ lld/MachO/InputSection.cpp | 39 + lld/MachO/InputSection.h | 52 + lld/MachO/Options.td | 18 + lld/MachO/OutputSegment.cpp | 30 + lld/MachO/OutputSegment.h | 34 + lld/MachO/SymbolTable.cpp | 62 + lld/MachO/SymbolTable.h | 44 + lld/MachO/Symbols.cpp | 23 + lld/MachO/Symbols.h | 100 ++ .../nothing_to_do.pass.cpp => lld/MachO/Target.cpp | 11 +- lld/MachO/Target.h | 41 + lld/MachO/Writer.cpp | 359 ++++++ .../selftest/test.pass.mm => lld/MachO/Writer.h | 18 +- lld/include/lld/Common/Driver.h | 5 + lld/test/ELF/arm-thumb-adr-err.s | 20 +- lld/test/ELF/arm-thumb-adr.s | 9 +- lld/test/ELF/arm-thumb-ldrlit-err.s | 20 +- lld/test/ELF/arm-thumb-ldrlit.s | 9 +- lld/test/ELF/arm-thumb2-adr-err.s | 15 +- lld/test/ELF/arm-thumb2-adr.s | 60 +- lld/test/ELF/arm-thumb2-ldrlit-err.s | 14 +- lld/test/ELF/arm-thumb2-ldrlit.s | 57 +- lld/test/ELF/hexagon-tls-gd-nonpreemptible.s | 39 + lld/test/ELF/invalid/entsize.yaml | 17 + lld/test/MachO/alignment-too-large.yaml | 58 + lld/test/MachO/arch.s | 11 + lld/test/MachO/duplicate-symbol.s | 12 + lld/test/MachO/entry-symbol.s | 13 + lld/test/MachO/invalid-executable.s | 11 + lld/test/MachO/load-commands.s | 17 + lld/test/MachO/no-such-file.s | 4 + lld/test/MachO/relocations.s | 21 + lld/test/MachO/section-headers.s | 46 + lld/test/MachO/segments.s | 20 + lld/test/MachO/silent-ignore.test | 8 + lld/test/MachO/text-segment.s | 15 + lld/tools/lld/CMakeLists.txt | 1 + lld/tools/lld/lld.cpp | 12 +- lldb/source/Breakpoint/BreakpointResolverName.cpp | 109 +- lldb/source/Host/common/FileSystem.cpp | 25 +- lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 10 +- .../SymbolFile/DWARF/SymbolFileDWARFDwo.cpp | 2 +- lldb/source/Symbol/LocateSymbolFileMacOSX.cpp | 70 +- .../API/tools/lldb-vscode/console}/Makefile | 0 .../lldb-vscode/console/TestVSCode_console.py | 70 ++ lldb/test/API/tools/lldb-vscode/console/main.cpp | 9 + lldb/tools/lldb-vscode/lldb-vscode.cpp | 22 +- lldb/unittests/Host/FileSystemTest.cpp | 26 + llvm/cmake/modules/AddLLVM.cmake | 64 +- llvm/cmake/modules/TableGen.cmake | 13 +- llvm/docs/GlobalISel/GenericOpcode.rst | 7 +- llvm/docs/ReleaseNotes.rst | 5 + llvm/include/llvm/Analysis/VecFuncs.def | 23 + .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 9 +- llvm/include/llvm/CodeGen/MachineFrameInfo.h | 6 +- llvm/include/llvm/CodeGen/MachineFunction.h | 1 - llvm/include/llvm/CodeGen/MachineMemOperand.h | 6 - llvm/include/llvm/CodeGen/TargetInstrInfo.h | 30 +- llvm/include/llvm/CodeGen/TargetLowering.h | 2 +- llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h | 21 +- .../include/llvm/DebugInfo/DWARF/DWARFDebugMacro.h | 56 +- llvm/include/llvm/DebugInfo/DWARF/DWARFObject.h | 1 + llvm/include/llvm/DebugInfo/DWARF/DWARFUnit.h | 2 +- llvm/include/llvm/DebugInfo/DWARF/DWARFUnitIndex.h | 6 +- llvm/include/llvm/IR/CallSite.h | 18 +- llvm/include/llvm/IR/GlobalObject.h | 1 - llvm/include/llvm/IR/IRBuilder.h | 40 +- llvm/include/llvm/IR/InstrTypes.h | 11 +- llvm/include/llvm/IR/IntrinsicInst.h | 10 +- llvm/include/llvm/MC/MCSectionXCOFF.h | 2 +- llvm/include/llvm/MC/MCSymbolXCOFF.h | 23 +- llvm/include/llvm/Support/MathExtras.h | 28 + llvm/include/llvm/Support/Path.h | 19 +- llvm/include/llvm/TextAPI/MachO/InterfaceFile.h | 20 + llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 14 - llvm/lib/CodeGen/GlobalISel/CallLowering.cpp | 10 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 19 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 6 +- llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 4 +- llvm/lib/CodeGen/MachineModuleInfo.cpp | 9 - llvm/lib/CodeGen/PeepholeOptimizer.cpp | 15 +- llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 8 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 13 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 17 +- .../CodeGen/SelectionDAG/StatepointLowering.cpp | 10 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 2 +- llvm/lib/CodeGen/TargetInstrInfo.cpp | 2 +- llvm/lib/DebugInfo/DWARF/DWARFContext.cpp | 73 +- llvm/lib/DebugInfo/DWARF/DWARFDebugMacro.cpp | 112 +- llvm/lib/DebugInfo/DWARF/DWARFUnit.cpp | 10 +- llvm/lib/DebugInfo/DWARF/DWARFUnitIndex.cpp | 4 +- llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 66 +- llvm/lib/IR/DebugInfo.cpp | 2 + llvm/lib/IR/Value.cpp | 10 +- llvm/lib/MC/CMakeLists.txt | 1 + llvm/lib/MC/MCSymbolXCOFF.cpp | 33 + llvm/lib/MC/XCOFFObjectWriter.cpp | 10 +- llvm/lib/Support/Path.cpp | 36 +- llvm/lib/Support/YAMLParser.cpp | 16 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 16 +- llvm/lib/Target/AArch64/AArch64InstrInfo.h | 20 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 9 +- llvm/lib/Target/AMDGPU/AMDGPU.td | 24 - llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPUFeatures.td | 9 - llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 30 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 14 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 9 +- llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 5 + llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 23 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 25 - .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 2 +- llvm/lib/Target/AMDGPU/R600Instructions.td | 2 +- llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 10 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 4 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 54 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 30 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 64 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 37 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 51 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 16 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 16 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 12 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 76 +- llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp | 6 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 4 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.h | 4 +- llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp | 2 +- .../Target/Hexagon/HexagonTargetTransformInfo.cpp | 4 +- llvm/lib/Target/Lanai/LanaiInstrInfo.cpp | 12 +- llvm/lib/Target/Lanai/LanaiInstrInfo.h | 8 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 4 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 4 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 32 +- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 20 +- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 10 +- llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp | 16 +- llvm/lib/Target/SystemZ/SystemZInstrInfo.h | 14 +- llvm/lib/Target/X86/CMakeLists.txt | 2 +- llvm/lib/Target/X86/X86.h | 2 +- llvm/lib/Target/X86/X86.td | 9 + llvm/lib/Target/X86/X86CallingConv.td | 2 +- llvm/lib/Target/X86/X86FastISel.cpp | 4 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 10 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 178 ++- llvm/lib/Target/X86/X86ISelLowering.h | 4 +- llvm/lib/Target/X86/X86IndirectBranchTracking.cpp | 25 +- llvm/lib/Target/X86/X86IndirectThunks.cpp | 364 ++++++ llvm/lib/Target/X86/X86InstrCompiler.td | 16 +- llvm/lib/Target/X86/X86InstrControl.td | 22 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 24 +- llvm/lib/Target/X86/X86InstrInfo.h | 22 +- llvm/lib/Target/X86/X86InstrInfo.td | 4 +- llvm/lib/Target/X86/X86MCInstLower.cpp | 8 +- llvm/lib/Target/X86/X86RetpolineThunks.cpp | 286 ----- llvm/lib/Target/X86/X86Subtarget.h | 22 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 4 +- llvm/lib/Target/X86/X86TargetMachine.h | 4 + llvm/lib/TextAPI/MachO/TextStub.cpp | 7 + llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 6 +- llvm/lib/Transforms/IPO/Inliner.cpp | 16 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 16 + llvm/lib/Transforms/Scalar/LICM.cpp | 1 + llvm/lib/Transforms/Utils/LoopUtils.cpp | 15 +- .../Transforms/Vectorize/LoadStoreVectorizer.cpp | 16 +- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 25 +- llvm/test/Analysis/CostModel/AMDGPU/fdiv.ll | 4 +- llvm/test/CMakeLists.txt | 11 + .../CodeGen/AArch64/GlobalISel/dynamic-alloca.ll | 4 +- .../select-jump-table-brjt-constrain.mir | 61 + llvm/test/CodeGen/AArch64/swap-compare-operands.ll | 92 +- .../GlobalISel/inst-select-amdgcn.fmad.ftz.mir | 8 +- .../GlobalISel/inst-select-load-constant.mir | 139 ++- .../AMDGPU/GlobalISel/legalize-load-local.mir | 1146 ++++++++---------- .../AMDGPU/GlobalISel/regbankselect-load.mir | 8 +- llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll | 43 +- llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll | 4 +- llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll | 4 +- llvm/test/CodeGen/AMDGPU/amdgcn-ieee.ll | 28 +- .../CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.ll | 4 +- llvm/test/CodeGen/AMDGPU/clamp-modifier.ll | 6 +- llvm/test/CodeGen/AMDGPU/clamp.ll | 8 +- llvm/test/CodeGen/AMDGPU/concat_vectors.ll | 4 +- llvm/test/CodeGen/AMDGPU/debug-value.ll | 2 +- llvm/test/CodeGen/AMDGPU/default-fp-mode.ll | 96 +- llvm/test/CodeGen/AMDGPU/ds_read2_superreg.ll | 2 +- llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll | 8 +- .../CodeGen/AMDGPU/fcanonicalize-elimination.ll | 12 +- llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll | 6 +- llvm/test/CodeGen/AMDGPU/fcanonicalize.ll | 12 +- llvm/test/CodeGen/AMDGPU/fdiv.f16.ll | 16 +- llvm/test/CodeGen/AMDGPU/fdiv.ll | 7 +- llvm/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll | 4 +- llvm/test/CodeGen/AMDGPU/fdot2.ll | 14 +- llvm/test/CodeGen/AMDGPU/fma-combine.ll | 6 +- llvm/test/CodeGen/AMDGPU/fmaxnum.ll | 4 +- llvm/test/CodeGen/AMDGPU/fminnum.ll | 2 +- .../CodeGen/AMDGPU/fmul-2-combine-multi-use.ll | 10 +- llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll | 16 +- llvm/test/CodeGen/AMDGPU/fmuladd.f32.ll | 24 +- llvm/test/CodeGen/AMDGPU/fmuladd.v2f16.ll | 18 +- llvm/test/CodeGen/AMDGPU/fneg-combines.ll | 2 +- llvm/test/CodeGen/AMDGPU/fpext-free.ll | 8 +- llvm/test/CodeGen/AMDGPU/frem.ll | 6 +- llvm/test/CodeGen/AMDGPU/hsa-fp-mode.ll | 18 +- llvm/test/CodeGen/AMDGPU/indirect-call.ll | 4 +- llvm/test/CodeGen/AMDGPU/indirect-private-64.ll | 8 +- .../AMDGPU/insert-subvector-unused-scratch.ll | 6 +- llvm/test/CodeGen/AMDGPU/known-never-snan.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.ll | 8 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.ll | 8 +- .../CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll | 9 +- llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll | 12 +- llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll | 20 +- llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll | 24 +- llvm/test/CodeGen/AMDGPU/load-local-f32.ll | 2 +- llvm/test/CodeGen/AMDGPU/load-local-f64.ll | 6 +- llvm/test/CodeGen/AMDGPU/load-local-i16.ll | 4 +- llvm/test/CodeGen/AMDGPU/load-local-i32.ll | 6 +- llvm/test/CodeGen/AMDGPU/load-local-i64.ll | 6 +- llvm/test/CodeGen/AMDGPU/load-local-i8.ll | 4 +- llvm/test/CodeGen/AMDGPU/local-64.ll | 30 +- llvm/test/CodeGen/AMDGPU/mad-combine.ll | 10 +- llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll | 2 +- llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll | 2 +- llvm/test/CodeGen/AMDGPU/mad-mix.ll | 4 +- llvm/test/CodeGen/AMDGPU/madak.ll | 20 +- llvm/test/CodeGen/AMDGPU/madmk.ll | 23 +- llvm/test/CodeGen/AMDGPU/mfma-loop.ll | 47 + llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll | 4 +- llvm/test/CodeGen/AMDGPU/omod.ll | 6 +- llvm/test/CodeGen/AMDGPU/operand-folding.ll | 19 +- llvm/test/CodeGen/AMDGPU/rcp-pattern.ll | 4 +- llvm/test/CodeGen/AMDGPU/rcp_iflag.ll | 27 +- llvm/test/CodeGen/AMDGPU/reorder-stores.ll | 58 +- llvm/test/CodeGen/AMDGPU/rsq.ll | 22 +- llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir | 2 +- llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll | 52 +- llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir | 2 +- llvm/test/CodeGen/AMDGPU/smrd.ll | 34 +- .../AMDGPU/split-vector-memoperand-offsets.ll | 2 +- llvm/test/CodeGen/AMDGPU/stack-realign-kernel.ll | 12 +- llvm/test/CodeGen/AMDGPU/store-local.ll | 6 +- llvm/test/CodeGen/AMDGPU/store-v3i64.ll | 10 +- llvm/test/CodeGen/AMDGPU/trunc-cmp-constant.ll | 6 +- llvm/test/CodeGen/AMDGPU/udiv.ll | 4 +- llvm/test/CodeGen/AMDGPU/udivrem24.ll | 61 + llvm/test/CodeGen/AMDGPU/v_mac.ll | 6 +- llvm/test/CodeGen/AMDGPU/v_mac_f16.ll | 8 +- llvm/test/CodeGen/AMDGPU/v_madak_f16.ll | 10 +- .../CodeGen/ARM/big-endian-neon-fp16-bitconv.ll | 2 +- llvm/test/CodeGen/ARM/big-endian-vmov.ll | 88 ++ llvm/test/CodeGen/ARM/vmov.ll | 1210 +++++++++++++++++--- .../CodeGen/MIR/AMDGPU/machine-function-info.ll | 28 +- llvm/test/CodeGen/PowerPC/mi-simplify-code.mir | 2 +- .../PowerPC/ppcf128-constrained-fp-intrinsics.ll | 1 - llvm/test/CodeGen/Thumb2/mve-masked-load.ll | 6 +- llvm/test/CodeGen/Thumb2/mve-vmovimm.ll | 289 ++--- llvm/test/CodeGen/X86/GlobalISel/select-copy.mir | 42 +- llvm/test/CodeGen/X86/O0-pipeline.ll | 2 +- llvm/test/CodeGen/X86/O3-pipeline.ll | 2 +- llvm/test/CodeGen/X86/avx-fp2int.ll | 6 +- llvm/test/CodeGen/X86/avx512-intel-ocl.ll | 12 +- llvm/test/CodeGen/X86/bitcast-and-setcc-512.ll | 126 +- llvm/test/CodeGen/X86/emutls.ll | 40 +- .../X86/indirect-branch-tracking-cm-lager.ll | 36 + llvm/test/CodeGen/X86/linux-preemption.ll | 10 +- llvm/test/CodeGen/X86/lvi-hardening-indirectbr.ll | 281 +++++ llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll | 9 +- llvm/test/CodeGen/X86/masked_store_trunc_usat.ll | 37 +- llvm/test/CodeGen/X86/min-legal-vector-width.ll | 40 + llvm/test/CodeGen/X86/psubus.ll | 121 +- llvm/test/CodeGen/X86/soft-fp-legal-in-HW-reg.ll | 69 +- ...clash-medium-natural-probes-mutliple-objects.ll | 26 +- llvm/test/CodeGen/X86/vec-strict-fptoint-128.ll | 30 +- llvm/test/CodeGen/X86/vec-strict-fptoint-256.ll | 18 +- llvm/test/CodeGen/X86/vec_cast2.ll | 6 +- llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll | 100 ++ llvm/test/CodeGen/X86/vector-trunc-packus.ll | 21 +- llvm/test/CodeGen/X86/vector-trunc-ssat.ll | 18 +- llvm/test/CodeGen/X86/vector-trunc-usat.ll | 74 +- llvm/test/DebugInfo/X86/debug-macro-macinfo.s | 47 + llvm/test/DebugInfo/X86/debug-macro-v5.s | 54 + llvm/test/DebugInfo/X86/licm-undef-dbg-value.ll | 86 ++ .../X86/unsupported-dwarf64-debug-macro-v5.s | 13 + ...upported-opcode_operands_table-debug-macro-v5.s | 13 + .../ExecutionEngine/MCJIT/cet-code-model-lager.ll | 32 + .../ExecutionEngine/OrcLazy/Inputs/noop-main.ll | 7 + .../OrcLazy/global-ctors-and-dtors.ll | 15 +- llvm/test/MC/Mips/mips32r2/valid.s | 3 +- llvm/test/MC/Mips/mips32r3/valid.s | 3 +- llvm/test/MC/Mips/mips32r5/valid.s | 3 +- llvm/test/MC/Mips/mips32r6/valid.s | 3 +- llvm/test/MC/Mips/mips64r2/valid.s | 3 +- llvm/test/MC/Mips/mips64r3/valid.s | 3 +- llvm/test/MC/Mips/mips64r5/valid.s | 3 +- llvm/test/MC/Mips/mips64r6/valid.s | 3 +- .../IndVarSimplify}/ARM/indvar-cost.ll | 134 ++- .../IndVarSimplify}/ARM/indvar-unroll-imm-cost.ll | 0 .../IndVarSimplify}/ARM/lit.local.cfg | 0 ...{do-recompute-if-cheap.ll => dont-recompute.ll} | 24 +- llvm/test/Transforms/IndVarSimplify/elim-extend.ll | 3 +- .../IndVarSimplify/lrev-existing-umin.ll | 3 +- llvm/test/Transforms/IndVarSimplify/pr28705.ll | 6 +- llvm/test/Transforms/IndVarSimplify/pr39673.ll | 12 +- .../Transforms/Inline/AMDGPU/inline-target-cpu.ll | 51 +- llvm/test/Transforms/Inline/inline_call.ll | 71 ++ .../InstCombine/double-float-shrink-1.ll | 12 +- llvm/test/Transforms/InstCombine/maximum.ll | 24 + llvm/test/Transforms/InstCombine/maxnum.ll | 58 + llvm/test/Transforms/InstCombine/minimum.ll | 54 +- llvm/test/Transforms/InstCombine/minnum.ll | 57 + llvm/test/Transforms/InstSimplify/compare.ll | 5 - llvm/test/Transforms/LoopRotate/pr35210.ll | 65 +- .../LoopStrengthReduce/X86/lsr-insns-2.ll | 6 +- .../Transforms/LoopVectorize/X86/svml-calls.ll | 145 ++- llvm/test/Transforms/PhaseOrdering/X86/shuffle.ll | 340 ++++++ .../Util/strip-nonlinetable-debuginfo-labels.ll | 28 + .../Util/strip-nonlinetable-debuginfo-localvars.ll | 8 +- .../Transforms/VectorCombine/X86/extract-binop.ll | 15 +- .../Transforms/VectorCombine/X86/extract-cmp.ll | 12 +- llvm/test/Unit/lit.site.cfg.py.in | 11 +- llvm/test/lit.site.cfg.py.in | 15 +- .../tools/llvm-objdump/ELF/AMDGPU/source-lines.ll | 2 +- llvm/tools/llvm-dwp/llvm-dwp.cpp | 6 +- llvm/tools/llvm-objdump/COFFDump.cpp | 19 +- llvm/tools/llvm-objdump/COFFDump.h | 37 + llvm/tools/llvm-objdump/llvm-objdump.cpp | 2 + llvm/tools/llvm-objdump/llvm-objdump.h | 9 - llvm/unittests/Support/Path.cpp | 22 +- llvm/unittests/TextAPI/TextStubV3Tests.cpp | 202 ++++ llvm/unittests/TextAPI/TextStubV4Tests.cpp | 299 ++++- llvm/utils/clang-parse-diagnostics-file | 4 + llvm/utils/gn/secondary/clang/test/BUILD.gn | 5 +- llvm/utils/gn/secondary/lld/MachO/BUILD.gn | 32 + llvm/utils/gn/secondary/lld/tools/lld/BUILD.gn | 1 + llvm/utils/gn/secondary/llvm/lib/MC/BUILD.gn | 1 + .../gn/secondary/llvm/lib/Target/X86/BUILD.gn | 2 +- llvm/utils/gn/secondary/llvm/test/BUILD.gn | 5 +- llvm/utils/lit/lit/cl_arguments.py | 2 +- llvm/utils/lit/lit/main.py | 29 +- llvm/utils/lit/lit/run.py | 9 +- mlir/cmake/modules/AddMLIR.cmake | 2 +- mlir/examples/toy/Ch3/CMakeLists.txt | 4 +- mlir/examples/toy/Ch4/CMakeLists.txt | 4 +- mlir/examples/toy/Ch4/include/toy/CMakeLists.txt | 4 +- mlir/examples/toy/Ch5/CMakeLists.txt | 4 +- mlir/examples/toy/Ch5/include/toy/CMakeLists.txt | 4 +- mlir/examples/toy/Ch6/CMakeLists.txt | 4 +- mlir/examples/toy/Ch6/include/toy/CMakeLists.txt | 4 +- mlir/examples/toy/Ch7/CMakeLists.txt | 4 +- mlir/examples/toy/Ch7/include/toy/CMakeLists.txt | 4 +- mlir/include/mlir/Dialect/Linalg/EDSC/Builders.h | 81 +- mlir/include/mlir/Dialect/Linalg/EDSC/Intrinsics.h | 3 + mlir/include/mlir/Dialect/LoopOps/LoopOps.td | 6 +- mlir/include/mlir/Dialect/Vector/EDSC/Builders.h | 2 +- mlir/include/mlir/Dialect/Vector/EDSC/Intrinsics.h | 1 + mlir/include/mlir/Dialect/Vector/VectorOps.td | 1 + mlir/include/mlir/IR/Builders.h | 16 +- mlir/include/mlir/Transforms/DialectConversion.h | 4 + .../ConvertGPULaunchFuncToVulkanLaunchFunc.cpp | 2 +- .../GPUToVulkan/ConvertLaunchFuncToVulkanCalls.cpp | 38 +- mlir/lib/Dialect/Linalg/EDSC/Builders.cpp | 66 +- mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 2 +- mlir/lib/Dialect/Vector/EDSC/Builders.cpp | 2 +- mlir/lib/Dialect/Vector/VectorOps.cpp | 52 +- mlir/lib/IR/Builders.cpp | 18 +- mlir/lib/Transforms/DialectConversion.cpp | 16 + mlir/test/Dialect/Vector/canonicalize.mlir | 39 +- mlir/test/EDSC/builder-api-test.cpp | 50 +- mlir/test/Transforms/test-legalizer.mlir | 27 + mlir/test/lib/Dialect/Test/TestPatterns.cpp | 50 +- mlir/test/mlir-vulkan-runner/subf.mlir | 54 + .../mlir-vulkan-runner/vulkan-runtime-wrappers.cpp | 19 + utils/arcanist/clang-format.sh | 2 +- 670 files changed, 10594 insertions(+), 5822 deletions(-) create mode 100644 clang/test/CodeGen/builtins-ppc-fma.c copy libcxx/test/libcxx/{extensions/nothing_to_do.pass.cpp => selftest/newformat/a [...] copy libcxx/test/{std/experimental/iterator/nothing_to_do.pass.cpp => libcxx/selft [...] copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] copy libcxx/test/{std/algorithms/alg.sorting/alg.binary.search/nothing_to_do.pass. [...] copy libcxx/test/{std/experimental/iterator/nothing_to_do.pass.cpp => libcxx/selft [...] copy libcxx/test/{std/algorithms/alg.nonmodifying/nothing_to_do.pass.cpp => libcxx [...] copy libcxx/test/{std/experimental/iterator/nothing_to_do.pass.cpp => libcxx/selft [...] copy libcxx/test/{std/experimental/iterator/nothing_to_do.pass.cpp => libcxx/selft [...] copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] copy libcxx/test/libcxx/{extensions/nothing_to_do.pass.cpp => selftest/newformat/f [...] copy libcxx/test/libcxx/selftest/{test.pass.mm => newformat/file_dependencies/subs [...] create mode 100644 libcxx/test/libcxx/selftest/newformat/file_dependencies/substit [...] copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] copy libcxx/test/{std/experimental/iterator/nothing_to_do.pass.cpp => libcxx/selft [...] rename libcxx/test/{std/strings/string.view/string.view.template/nothing_to_do.pas [...] copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] rename libcxx/test/{std/algorithms/alg.modifying.operations/nothing_to_do.pass.cpp [...] rename libcxx/test/{std/algorithms/alg.sorting/alg.binary.search/nothing_to_do.pas [...] create mode 100644 libcxx/test/libcxx/selftest/newformat/lit.local.cfg copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] copy libcxx/test/{std/experimental/iterator/nothing_to_do.pass.cpp => libcxx/selft [...] copy libcxx/test/{std/algorithms/alg.nonmodifying/nothing_to_do.pass.cpp => libcxx [...] copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] copy libcxx/test/libcxx/selftest/{test.pass.mm => newformat/pass.mm/no-arc.pass.mm} (70%) copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] copy libcxx/test/{std/experimental/iterator/nothing_to_do.pass.cpp => libcxx/selft [...] copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] copy libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cpp [...] rename libcxx/test/{std/input.output/iostreams.base/ios.base/nothing_to_do.pass.cp [...] copy libcxx/test/{std/algorithms/alg.nonmodifying/nothing_to_do.pass.cpp => libcxx [...] copy libcxx/test/{std/experimental/iterator/nothing_to_do.pass.cpp => libcxx/selft [...] rename libcxx/test/libcxx/{extensions/nothing_to_do.pass.cpp => selftest/newformat [...] create mode 100644 libcxx/test/libcxx/selftest/newformat/sh.cpp/remote-substitutio [...] copy libcxx/test/{std/algorithms/alg.nonmodifying/nothing_to_do.pass.cpp => libcxx [...] rename libcxx/test/{std/algorithms/alg.nonmodifying/nothing_to_do.pass.cpp => libc [...] create mode 100644 libcxx/test/libcxx/selftest/newformat/sh.cpp/substitutions.sh.cpp delete mode 100644 libcxx/test/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/noth [...] delete mode 100644 libcxx/test/std/algorithms/alg.sorting/alg.set.operations/nothi [...] delete mode 100644 libcxx/test/std/algorithms/alg.sorting/alg.sort/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/algorithms/alg.sorting/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/atomics/atomics.general/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/atomics/atomics.types.operations/nothing_to_do. [...] delete mode 100644 libcxx/test/std/containers/container.adaptors/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/containers/container.requirements/associative.r [...] delete mode 100644 libcxx/test/std/containers/container.requirements/container.req [...] delete mode 100644 libcxx/test/std/containers/container.requirements/nothing_to_do [...] delete mode 100644 libcxx/test/std/containers/container.requirements/unord.req/not [...] delete mode 100644 libcxx/test/std/containers/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/containers/sequences/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/depr/depr.auto.ptr/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/depr/depr.function.objects/depr.adaptors/nothin [...] delete mode 100644 libcxx/test/std/depr/depr.function.objects/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/depr/depr.lib.binders/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/depr/exception.unexpected/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/depr/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/diagnostics/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/diagnostics/syserr/syserr.errcat/nothing_to_do. [...] delete mode 100644 libcxx/test/std/diagnostics/syserr/syserr.errcode/nothing_to_do [...] delete mode 100644 libcxx/test/std/diagnostics/syserr/syserr.errcondition/nothing_ [...] delete mode 100644 libcxx/test/std/diagnostics/syserr/syserr.syserr/nothing_to_do. [...] delete mode 100644 libcxx/test/std/experimental/func/func.searchers/nothing_to_do. [...] delete mode 100644 libcxx/test/std/experimental/func/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/experimental/memory/memory.polymorphic.allocato [...] delete mode 100644 libcxx/test/std/experimental/memory/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/experimental/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/experimental/utilities/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/input.output/file.streams/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/input.output/iostream.format/input.streams/istr [...] delete mode 100644 libcxx/test/std/input.output/iostream.format/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/input.output/iostream.format/output.streams/ost [...] delete mode 100644 libcxx/test/std/input.output/iostreams.base/fpos/nothing_to_do. [...] delete mode 100644 libcxx/test/std/input.output/iostreams.base/ios.base/ios.types/ [...] delete mode 100644 libcxx/test/std/input.output/iostreams.base/std.ios.manip/nothi [...] delete mode 100644 libcxx/test/std/input.output/iostreams.requirements/nothing_to_ [...] delete mode 100644 libcxx/test/std/input.output/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/input.output/stream.buffers/streambuf/streambuf [...] delete mode 100644 libcxx/test/std/input.output/stream.buffers/streambuf/streambuf [...] delete mode 100644 libcxx/test/std/input.output/stream.buffers/streambuf/streambuf [...] delete mode 100644 libcxx/test/std/iterators/iterator.primitives/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/iterators/iterator.requirements/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/iterators/iterators.general/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/iterators/predef.iterators/insert.iterators/bac [...] delete mode 100644 libcxx/test/std/iterators/predef.iterators/insert.iterators/fro [...] delete mode 100644 libcxx/test/std/iterators/predef.iterators/insert.iterators/ins [...] delete mode 100644 libcxx/test/std/iterators/predef.iterators/insert.iterators/not [...] delete mode 100644 libcxx/test/std/iterators/predef.iterators/move.iterators/move. [...] delete mode 100644 libcxx/test/std/iterators/predef.iterators/move.iterators/nothi [...] delete mode 100644 libcxx/test/std/iterators/predef.iterators/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/iterators/predef.iterators/reverse.iterators/no [...] delete mode 100644 libcxx/test/std/iterators/predef.iterators/reverse.iterators/re [...] delete mode 100644 libcxx/test/std/iterators/stream.iterators/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/language.support/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/language.support/support.dynamic/alloc.errors/n [...] delete mode 100644 libcxx/test/std/language.support/support.dynamic/new.delete/not [...] delete mode 100644 libcxx/test/std/language.support/support.exception/exception.te [...] delete mode 100644 libcxx/test/std/language.support/support.limits/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/localization/locale.categories/category.collate [...] delete mode 100644 libcxx/test/std/localization/locale.categories/category.message [...] delete mode 100644 libcxx/test/std/localization/locale.categories/category.monetar [...] delete mode 100644 libcxx/test/std/localization/locale.categories/category.numeric [...] delete mode 100644 libcxx/test/std/localization/locale.categories/category.time/no [...] delete mode 100644 libcxx/test/std/localization/locale.categories/facet.numpunct/n [...] delete mode 100644 libcxx/test/std/localization/locales/locale.convenience/convers [...] delete mode 100644 libcxx/test/std/localization/locales/locale.convenience/nothing [...] delete mode 100644 libcxx/test/std/localization/locales/locale/locale.types/nothin [...] delete mode 100644 libcxx/test/std/localization/locales/locale/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/localization/locales/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/numerics/bit/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/numerics/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/numerics/numarray/class.gslice/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/numerics/numarray/class.slice/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/numerics/numarray/valarray.nonmembers/nothing_t [...] delete mode 100644 libcxx/test/std/numerics/rand/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/numerics/rand/rand.adapt/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/numerics/rand/rand.dis/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/numerics/rand/rand.dis/rand.dist.bern/nothing_t [...] delete mode 100644 libcxx/test/std/numerics/rand/rand.dis/rand.dist.norm/nothing_t [...] delete mode 100644 libcxx/test/std/numerics/rand/rand.dis/rand.dist.pois/nothing_t [...] delete mode 100644 libcxx/test/std/numerics/rand/rand.dis/rand.dist.samp/nothing_t [...] delete mode 100644 libcxx/test/std/numerics/rand/rand.dis/rand.dist.uni/nothing_to [...] delete mode 100644 libcxx/test/std/numerics/rand/rand.eng/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/numerics/rand/rand.req/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/numerics/rand/rand.util/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/re/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/re/re.alg/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/re/re.const/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/re/re.def/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/re/re.grammar/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/re/re.iter/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/re/re.regex/re.regex.nonmemb/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/strings/basic.string/string.modifiers/nothing_t [...] delete mode 100644 libcxx/test/std/strings/basic.string/string.nonmembers/nothing_ [...] delete mode 100644 libcxx/test/std/strings/basic.string/string.ops/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/strings/char.traits/char.traits.specializations [...] delete mode 100644 libcxx/test/std/strings/char.traits/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/n [...] delete mode 100644 libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/t [...] delete mode 100644 libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/t [...] delete mode 100644 libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/t [...] delete mode 100644 libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/t [...] delete mode 100644 libcxx/test/std/thread/thread.mutex/thread.once/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/thread/thread.req/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/thread/thread.req/thread.req.lockable/nothing_t [...] delete mode 100644 libcxx/test/std/utilities/function.objects/bind/func.bind/nothi [...] delete mode 100644 libcxx/test/std/utilities/function.objects/bind/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/utilities/function.objects/func.search/nothing_ [...] delete mode 100644 libcxx/test/std/utilities/function.objects/func.wrap/nothing_to [...] delete mode 100644 libcxx/test/std/utilities/intseq/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/utilities/memory/allocator.uses/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/utilities/memory/specialized.algorithms/nothing [...] delete mode 100644 libcxx/test/std/utilities/memory/util.smartptr/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/utilities/meta/meta.trans/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/utilities/meta/meta.unary/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/utilities/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/utilities/smartptr/unique.ptr/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.dltr/n [...] delete mode 100644 libcxx/test/std/utilities/time/time.cal/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/utilities/time/time.clock/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/utilities/time/time.traits/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/utilities/utility.requirements/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/std/utilities/utility/pairs/nothing_to_do.pass.cpp delete mode 100644 libcxx/test/support/nothing_to_do.pass.cpp create mode 100644 libcxx/utils/libcxx/test/newformat.py create mode 100644 lld/MachO/Arch/X86_64.cpp create mode 100644 lld/MachO/CMakeLists.txt create mode 100644 lld/MachO/Config.h create mode 100644 lld/MachO/Driver.cpp create mode 100644 lld/MachO/Driver.h create mode 100644 lld/MachO/InputFiles.cpp create mode 100644 lld/MachO/InputFiles.h create mode 100644 lld/MachO/InputSection.cpp create mode 100644 lld/MachO/InputSection.h create mode 100644 lld/MachO/Options.td create mode 100644 lld/MachO/OutputSegment.cpp create mode 100644 lld/MachO/OutputSegment.h create mode 100644 lld/MachO/SymbolTable.cpp create mode 100644 lld/MachO/SymbolTable.h create mode 100644 lld/MachO/Symbols.cpp create mode 100644 lld/MachO/Symbols.h rename libcxx/test/std/experimental/iterator/nothing_to_do.pass.cpp => lld/MachO/T [...] create mode 100644 lld/MachO/Target.h create mode 100644 lld/MachO/Writer.cpp copy libcxx/test/libcxx/selftest/test.pass.mm => lld/MachO/Writer.h (56%) create mode 100644 lld/test/ELF/hexagon-tls-gd-nonpreemptible.s create mode 100644 lld/test/ELF/invalid/entsize.yaml create mode 100644 lld/test/MachO/alignment-too-large.yaml create mode 100644 lld/test/MachO/arch.s create mode 100644 lld/test/MachO/duplicate-symbol.s create mode 100644 lld/test/MachO/entry-symbol.s create mode 100644 lld/test/MachO/invalid-executable.s create mode 100644 lld/test/MachO/load-commands.s create mode 100644 lld/test/MachO/no-such-file.s create mode 100644 lld/test/MachO/relocations.s create mode 100644 lld/test/MachO/section-headers.s create mode 100644 lld/test/MachO/segments.s create mode 100644 lld/test/MachO/silent-ignore.test create mode 100644 lld/test/MachO/text-segment.s copy lldb/{packages/Python/lldbsuite/test/tools/lldb-server/registers-target-xml-r [...] create mode 100644 lldb/test/API/tools/lldb-vscode/console/TestVSCode_console.py create mode 100644 lldb/test/API/tools/lldb-vscode/console/main.cpp create mode 100644 llvm/lib/MC/MCSymbolXCOFF.cpp create mode 100644 llvm/lib/Target/X86/X86IndirectThunks.cpp delete mode 100644 llvm/lib/Target/X86/X86RetpolineThunks.cpp create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt-con [...] create mode 100644 llvm/test/CodeGen/ARM/big-endian-vmov.ll create mode 100644 llvm/test/CodeGen/X86/indirect-branch-tracking-cm-lager.ll create mode 100644 llvm/test/CodeGen/X86/lvi-hardening-indirectbr.ll create mode 100644 llvm/test/DebugInfo/X86/debug-macro-macinfo.s create mode 100644 llvm/test/DebugInfo/X86/debug-macro-v5.s create mode 100644 llvm/test/DebugInfo/X86/licm-undef-dbg-value.ll create mode 100644 llvm/test/DebugInfo/X86/unsupported-dwarf64-debug-macro-v5.s create mode 100644 llvm/test/DebugInfo/X86/unsupported-opcode_operands_table-debug [...] create mode 100644 llvm/test/ExecutionEngine/MCJIT/cet-code-model-lager.ll create mode 100644 llvm/test/ExecutionEngine/OrcLazy/Inputs/noop-main.ll rename llvm/test/{CodeGen => Transforms/IndVarSimplify}/ARM/indvar-cost.ll (87%) rename llvm/test/{CodeGen => Transforms/IndVarSimplify}/ARM/indvar-unroll-imm-cost [...] copy llvm/test/{Analysis/CostModel => Transforms/IndVarSimplify}/ARM/lit.local.cfg (100%) rename llvm/test/Transforms/IndVarSimplify/{do-recompute-if-cheap.ll => dont-recom [...] create mode 100644 llvm/test/Transforms/Inline/inline_call.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/X86/shuffle.ll create mode 100644 llvm/test/Transforms/Util/strip-nonlinetable-debuginfo-labels.ll create mode 100644 llvm/tools/llvm-objdump/COFFDump.h create mode 100644 llvm/utils/gn/secondary/lld/MachO/BUILD.gn create mode 100644 mlir/test/mlir-vulkan-runner/subf.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (23983016 -> ab179aeb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards 23983016 11: update: llvm-linux: 16048 new ab179aeb 11: update: llvm-linux: 16048 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (23983016) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 182 +- 02-build_llvm/console.log | 12879 +++++++++---------- 03-build_linux/console.log | 6712 +++++----- 05-check_regression/console.log | 12 +- 05-check_regression/results.regressions | 20 +- 06-update_baseline/console.log | 36 +- 06-update_baseline/results.regressions | 20 +- console.log | 19821 +++++++++++++++--------------- jenkins/manifest.sh | 8 +- 9 files changed, 19860 insertions(+), 19830 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap_O3 updated (4dcc4502f31 -> 51ecad3c032)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap_O3 in repository toolchain/ci/gcc. from 4dcc4502f31 tree-optimization/94261 - avoid IL adjustments in SLP analysis adds 6debbff6ca3 arm: Add earlyclobber to MVE instructions that require it adds 962406639c0 testsuite, arm: Change tests to assemble adds 0cd55f9d3af libgccjit: handle long literals in playback::context::new_s [...] adds 1a5c27b1b43 [ARM][GCC][12x]: MVE ACLE intrinsics to set and get vector lane. adds 85244449104 [ARM][GCC][13x]: MVE ACLE scalar shift intrinsics. adds 88c9a831f3a [ARM][GCC][14x]: MVE ACLE whole vector left shift with carr [...] adds d326e9586b4 driver: Improve the generated help text for alias options adds 5db9e89323c c: Fix up cfun->function_end_locus on invalid function bodi [...] adds ca6c722561c c++: Handle COMPOUND_EXPRs in get_narrower and warnings_for [...] adds 1f6c1c82eb5 c++: Avoid a suspicious -Wnoexcept warning [PR93805] adds 75fb811dfaa Verify the code used for the optimized comparison is valid [...] adds c86c99e6950 Update gcc es.po, sv.po. adds 75c24a08d69 Daily bump. adds 047811579f0 cgraphunit: Avoid code generation differences based on -w/T [...] adds a5a9400a846 if-conv: Fix -fcompare-debug bugs in ifcvt_local_dce [PR94283] adds 565ab7efbdc loop-manip: Avoid -fcompare-debug issues in create_iv [PR94285] adds 596c90d3559 arm: Fix arm {,u}subvdi4 and usubvsi4 expanders [PR94286] adds 906b3eb9df6 Improve endianess detection. adds c2211a60ff0 Fix OpenMP offload handling for target-link variables for n [...] adds 04099157691 Define __BIG_ENDIAN__ adds 8001f59c82b [testsuite,arm] target-supports.exp: Add arm_fp_dp_ok effec [...] adds 2a0eaca3e9c [testsuite,arm] cmp-2.c: Move double-precision tests to cmp-3.c adds 07f8bcc6ea9 [testsuite,arm] use arm_fp_dp_ok effective-target adds 6e771c087b1 c++: Give more expressions locations. adds 5c161741843 c++: Fix template parm with dependent type in concepts. adds fddfd3ce555 c++: Improve handling of ill-formed constraints [PR94186]. adds 75b7b7fdc45 c++: Fix wrong no post-decrement operator error in template [...] adds 0c1c8d9f137 Daily bump. adds adaf4b6c66e Test for sigsetjmp support in analyzer tests requiring that [...] adds c2133167ad5 if-conv: Delete dead stmts backwards in ifcvt_local_dce [PR94283] adds f1154b4d3c5 sccvn: Fix buffer overflow in push_partial_def [PR94300] adds 158cccea0d0 middle-end: Avoid using DECL_UID in ASM_FORMAT_PRIVATE_NAME [...] adds 5f18995e23e varasm: Fix output_constructor where a RANGE_EXPR index nee [...] adds c38daa79768 fortran: ICE using undeclared symbol in array constructor PR93484 adds c8504ebef1d testsuite: Fix up FAILs in gfortran testsuite with -fcompar [...] adds 0fb0240a051 Fix handling of --with{,out}-zstd option. adds 724ec02c2c6 Make target_clones resolver fn static if possible. adds d5ad8ee04a7 i386: Fix ix86_add_reg_usage_to_vzeroupper [PR94308] adds 780f1cfd8ee testsuite: Mention cleanup-13.c test is incompatible with - [...] adds 68c4570a4de Do not error about missing zstd unless --with-zstd. adds 83dfa06cb5c coroutines: Fix missing dereference (PR94319). adds 0fca105f8ca Fix gcc.dg/pr92301.c on targets that don't support argc/argv. adds 05c13c43990 PR tree-optimization/94131 - ICE on printf with a VLA strin [...] adds c7a252ba2d0 c++: Fix invalid -Wduplicated-cond warning [PR94265] adds 713ecb3d417 rs6000: Allow FPRs to change between SDmode and DDmode [...] adds b5228b1bc8c PR middle-end/94004 - missing -Walloca on calls to alloca d [...] adds 6e4cd3cd259 arm: Fix ICE caused by arm_gen_dicompare_reg [PR94292] adds eeb0c7c0713 Fix vector-compare-1 regressions on sh4/sh4eb caused by pat [...] adds 48817fbd761 Fix vector-compare-1 regressions on sh4/sh4eb caused by [...] adds fe4b53b2e7e testsuite: adjustments for amdgcn adds bf1fc37bb4a libstdc++: Define and use chrono::is_clock for C++20 adds e3ef371982a libstdc++ Add missing tests for std::shared_timed_mutex adds 9673d11ec53 libstdc++: Fix author in previous ChangeLog entry adds e97929e20b2 [PATCH] rs6000: vec_rlnm fix to make builtin work according to ABI adds 27f8c8c4c92 Daily bump. adds d21dff5b4fe widening_mul: restrict ops to be defined in the same basic- [...] adds 9708ca2be40 var-tracking: Mark as sp based more VALUEs [PR92264] adds 5a1706f63a2 c++: Fix a -fcompare-debug issue with DEBUG_BEGIN_STMT stmt [...] adds dab932d1519 c++: Fix up user_provided_p [PR81349] adds 10ea09ee846 gimplify: Fix -fcompare-debug differences caused by gimplif [...] adds d6730f06420 Skip test for non-x86 targets. adds da920d0c46c tree: Fix -fcompare-debug issues due to protected_set_expr_ [...] adds 40cdcddf274 Fix UNRESOLVED test-case. adds e519d644999 arm: unified syntax for libgcc when built with -Os [PR94220] adds 16948c54b75 libstdc++: Add some C++20 additions to <chrono> adds 2a1f0f64160 coroutines: Implement n4849 changes to exception handling. adds 6d85947d23a coroutines: Implement n4849 recommended symmetric transfer. adds 517f5356bb0 c++: DR1710, template keyword in a typename-specifier [PR94057] adds b1c905ba83e Update gcc .po files. adds f9c38702e96 Daily bump. adds 65937db83cd coroutines, testsuite: Fix symmetric-transfer-00-basic.C on Linux. adds 54f58e9416d c++: Remove redundant calls to type_dependent_expression_p adds 71d69548a1b c++: template keyword accepted before destructor names [PR94336] adds 06d5d63d994 modulo-sched: fix bootstrap compare-debug issue adds 72809d6fe8e c++: Handle COMPOUND_EXPRs in ocp_convert [PR94339] adds 2eea00c518d c++: Avoid calls in non-evaluated contexts affect whether f [...] adds a76ff304f90 Fortran] Reject invalid association target (PR93363) adds a9cd2d786ad fixup: move ChangeLog entry for last Arm fix to correct file. adds 66e0e23c12d fixup: move ChangeLog entry for last Arm fix to correct file. adds 8d689cf43b5 Fix PR90332 by extending half size vector mode adds 62ede14d30f [Fortran] Fix ICE with deferred-rank arrays (PR93957) adds 917e21e8bcd tree-optimization/94352 - fix uninitialized use of curr_order adds 45cfaf9903d debug/94273 - avoid creating type DIEs for DINFO_LEVEL_TERSE adds 4d661bb7a2e analyzer: tweaks to superedge::dump adds 8f02357571a analyzer: improvements to diagnostic-manager.cc logging adds 42c63313252 analyzer: add new supergraph visualization adds 6969ac301f2 analyzer: fix malloc pointer NULL-ness adds 9dba60130dc c++: Fix ICE after ambiguous inline namespace reopen [PR94257] adds 04dd734b52d c++: avoid -Wredundant-tags on a first declaration in use [ [...] adds 038769535a8 amdgcn: refactor mode iterators adds ccacf77be55 PR c++/94098 - ICE on attribute access redeclaration adds c7fc15f54b3 [pr84733] Fix ICE popping local scope adds 52f24a9e989 PR c++/94346 - [9/10 Regression] ICE due to handle_copy_att [...] adds 54de5afb4a9 c++: Handle COMPOUND_EXPRs in ocp_convert [PR94339] adds 19e5389debb [RS6000] PR94145, make PLT loads volatile adds 491009b609d Update gcc de.po. adds 0302a2de7f1 libstdc++: Move definition earlier in file adds ae6076b5bc1 libstdc++: Implement C++20 changes to insert iterators adds 81a8d137c22 libstdc++: Add remaining C++20 changes to iterator adaptors adds b8a28a06eaf libstdc++: Define __cpp_lib_ranges macro for C++20 adds c2781192292 Daily bump. adds 679becf175c reassoc: Fix -fcompare-debug bug in reassociate_bb [PR94329] adds c6a562de88c c: After issuing errors about array size, for error-recover [...] adds 75defde9fb5 c++: Replay errors during diagnosis of constraint satisfact [...] adds cd68edf894d c++: Respect current_constraint_diagnosis_depth in diagnose [...] adds a7ea3d2ced7 c++: requires-expression outside of a template is misevalua [...] adds 7981c06ae92 c++: Diagnose when "requires" is used instead of "requires [...] adds 3fb7f2fbd5f [Fortran] Fix result-variable handling of MODULE PROCEDURE [...] adds 7d57570b065 Patch for PR94246 adds 946a444df34 testsuite: adjust modulo-sched compare-debug tests adds 42cda3ba45f libstdc++: Fix std::reverse_iterator relational operators adds f6b2b79040d libstdc++: Fix two tests that fail in C++20 mode adds 673bb288e62 Daily bump. adds c76df72f1a9 testsuite: Split up gdc-test.exp into each subdirectory adds 46b7d819f7c Delete duplicate .align output. adds 85f6f317ec8 Fix typo in a warning related to flatten. adds afd9da8b8ad testsuite: Move C++ tests in gdc.test into own subdirectory. adds 60c254b279e testsuite: Handle more kinds of gdc.test test flags and dir [...] adds dacc7effeea doc: Update -falign-functions/-falign-loops/-falign-jumps adds 2a93fb6e962 Daily bump. adds 07c48b61a08 [RS6000] Put call cookie back in AIX/ELFv2 call patterns adds ec919cfcef8 Fix vextract* masked patterns [PR93069] adds 3a9db91bee4 Fix scan pattern of vect-8.f90 dump. adds 291aa50a631 XFAIL pr57193.c test-case. adds 5abbfd3cd36 i386: Fix up *one_cmplv*2* insn with avx512f [PR94343] adds 48c18af43fa Update bswap64-4 test for desired results adds 841e721579b RS6000 Allow builtin initialization regardless of mask adds 48e331d6382 Define TRY_EMPTY_VM_SPACE for riscv64-linux adds 1cb1986cb59 c++: Fix handling of internal fn calls in statement express [...] adds 5830f753559 c++: Fix comparison of fn() and ns::fn() [PR90711] adds 9f6abd1b03e Update gcc sv.po. adds 13a29fc5730 Daily bump. adds 3809bcd6c0e lra: set insn_code_data to NULL when freeing adds 56f0b32476c forwprop: Pattern recognize more rotates [PR94344] adds 5ea39b24122 store-merging: Allow enums during bswap recognition [PR94403] adds 1dcffc8ddc4 fold-const: Fix division folding with vector operands [PR94412] adds a27c534794d aarch64: Fix up aarch64_compare_and_swaphi pattern [PR94368] adds e81d0d9ec7a [ARM][PATCH]: Add support for MVE ACLE intrinsics polymorph [...] adds cea1fc6f67d arc: Allow more ABIs in GLIBC_DYNAMIC_LINKER adds 1ef979c6966 [ARM][PATCH]: Add MVE ACLE intrinsics vbicq_n_* polymorphic [...] adds d08a318b4fd arc: Cleanup compilation warning adds dc56917d111 arc: Update operand printing adds 1165109b401 amdgcn: generalize vector insn modes adds 48742e02d71 d: Use d_comdat_linkage on generated internal decl. adds e06cde870ed Library-side tests for parenthesized aggregate init adds f14b41d2712 vect: ICE: in vectorizable_load, at tree-vect-stmts.c:9173 [...] adds e8e0acbaa38 d: Use memset to fill alignment holes with zeroes. adds 331c438d5a6 Update cpplib sr.po. adds 689418b97e5 libgomp – fix handling of 'target enter data' adds 63b2923dc6f libgccjit: add new version entry point adds 1c16f7fc903 d: Add always_inline to the internal attribute table. adds 013fca64fc1 d: Merge UDAs between function prototype and definitions (PR90136) adds 73dd051894b Daily bump. adds 595f1b1274b c++: Adjust formatting. adds 76f09260b7e c++: Fix DMI with lambda 'this' capture [PR94205] adds bd0f22a8d5c Fix PR94043 by making vect_live_op generate lc-phi adds 142d68f50b4 Fix typo in a macro usage. adds 9ecb3ecc8cc objsz: Don't call replace_uses_by on SSA_NAME_OCCURS_IN_ABN [...] adds d3ee88fdb4e Clear me from patch ownership. adds 0c9a8a8c103 fortran : FAIL: gfortran.dg/pr93365.f90 PR94386 adds e899d4b7125 Add testcase for already fixed PR [PR94436] adds 032f2366a4c rs6000: Make code questionably using r2 not ICE (PR94420) adds dd5da571731 doc: Fix a typo in the documentation of the copy attribute adds 43d011eb054 Whoops, forgot the changelog adds b60bd122dc7 doc: Fix typo adds 7546463b9f7 subreg: Fix PR94123, SVN r273240 causes gcc.target/powerpc/ [...] adds a96f1c38a78 analyzer: handle compound assignments [PR94378] adds 6c557ba5380 libstdc++: Move "free books" list from fsf.org to gnu.org adds fb25041e11d d: Fix gdc.dg/pr92216.d FAILs on 32-bit targets adds 918b89b7623 d: Fix new tests gdc.dg/pr93038.d and gdc.dg/pr93038b.d in [...] adds 25839b6af9f Daily bump. adds bf1f6d8819a fortran: ICE equivalence with an element of an array PR94030 adds 2c54eab5a30 fortran : ICE in gfc_resolve_findloc PR93498 adds b7a98f48e06 S/390: Remove superfluous commutative constraint modifiers adds 224efaf7e1e [Fortran] Fix error cleanup of select rank (PR93522) adds c1effaa209f libstdc++-v3/test: Better skip for "use_service.cc" adds ff825b81583 [ARM]: Fix for MVE ACLE intrinsics with writeback (PR94317). adds 66e327517b1 aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435] adds df562b12d90 aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435] adds 2c0fa3ecf70 cselib: Reuse VALUEs on sp adjustments [PR92264] adds 86c92411320 params: Decrease -param=max-find-base-term-values= default [...] adds d4ed2cd13d0 sra/doc: Document param sra-max-propagations adds 68cbee9bf53 Fix up -Wliteral-suffix warning on mti-linux.h adds 81ce375d1fd Fix PR94401 by considering reverse overrun adds 879bc686a0a doc: RISC-V: Update binutils requirement to 2.30 adds 54af95767e8 debug/94450 - remove DW_TAG_imported_unit generated in LTRA [...] adds 75efe9cb1f8 c/94392 - only enable -ffinite-loops for C++ adds b90061c6ec0 Prevent IPA-SRA from creating calls to local comdats (PR 92676) adds 3ab216a4d2f [Fortran] Resolve formal args before checking DTIO adds 0cd74f35889 Fix fortran/85982 ICE in resolve_component. adds a950bb6e952 Fix check_effective_target_sigsetjmp for glibc targets. adds 63f56527335 Fix some comment typos in alias.c. adds 535ce76acbe Daily bump. adds b749b5ec58a S/390 zTPF: Handle skip trace addresses when unwinding adds 55a7380213a ICF: compare type attributes for gimple_call_fntypes. adds 4441ecedc3d Fix PR94443 with gsi_insert_seq_before [PR94443] adds 2b1e849b35b Revert "[nvptx, libgomp] Update pr85381-{2,4}.c test-cases" [...] adds 24fe8c8e338 libstdc++: Fix std::to_address for debug iterators (PR 93960) adds 1dff18a181b amdgcn: Support unordered floating-point comparison operators adds fa4aab7f840 Improve svn-rev to search for pattern at line beginning. adds ef6631051d4 middle-end/94465 - handle released SSA names in array_ref_l [...] adds 53161358180 AArch64: Fix options canonicalization for assembler adds 3b6e79ae0c3 arm: Do not process rest of MVE header file after unsupport [...] adds a87cd913ae2 arm: MVE: Fix unintended change to tests adds 51ecad3c032 c++: Add test for PR c++/93211 No new revisions were added by this update. Summary of changes: contrib/ChangeLog | 5 + contrib/gcc-git-customization.sh | 2 +- gcc/ChangeLog | 1001 ++ gcc/DATESTAMP | 2 +- gcc/alias.c | 14 +- gcc/analyzer/ChangeLog | 141 + gcc/analyzer/analyzer.h | 1 + gcc/analyzer/checker-path.cc | 1 + gcc/analyzer/constraint-manager.cc | 1 + gcc/analyzer/diagnostic-manager.cc | 48 +- gcc/analyzer/diagnostic-manager.h | 32 + gcc/analyzer/engine.cc | 274 +- gcc/analyzer/exploded-graph.h | 24 +- gcc/analyzer/program-point.cc | 1 + gcc/analyzer/program-state.cc | 3 +- gcc/analyzer/region-model.cc | 403 +- gcc/analyzer/region-model.h | 81 +- gcc/analyzer/state-purge.cc | 21 +- gcc/analyzer/state-purge.h | 5 +- gcc/analyzer/supergraph.cc | 56 +- gcc/analyzer/supergraph.h | 19 +- gcc/c-family/ChangeLog | 29 + gcc/c-family/c-attribs.c | 35 +- gcc/c-family/c-opts.c | 4 + gcc/c-family/c-warn.c | 5 + gcc/c-family/c.opt | 4 + gcc/c/ChangeLog | 8 + gcc/c/c-decl.c | 3 + gcc/c/c-parser.c | 7 +- gcc/calls.c | 82 +- gcc/cfgloop.h | 4 + gcc/cfgloopmanip.c | 1 + gcc/cgraphunit.c | 15 +- gcc/common.opt | 2 +- gcc/common/config/aarch64/aarch64-common.c | 17 +- gcc/config/aarch64/aarch64.c | 5 +- gcc/config/aarch64/atomics.md | 5 +- gcc/config/aarch64/constraints.md | 7 + gcc/config/arc/arc.c | 6 +- gcc/config/arc/arc.h | 6 +- gcc/config/arc/linux.h | 3 +- gcc/config/arm/arm-builtins.c | 31 + gcc/config/arm/arm.c | 2 +- gcc/config/arm/arm.md | 7 +- gcc/config/arm/arm_mve.h | 2061 ++- gcc/config/arm/arm_mve_builtins.def | 48 +- gcc/config/arm/iterators.md | 3 + gcc/config/arm/mve.md | 493 +- gcc/config/arm/neon.md | 21 +- gcc/config/arm/vec-common.md | 33 + gcc/config/gcn/gcn-valu.md | 2102 +-- gcc/config/gcn/gcn.c | 15 + gcc/config/gcn/gcn.md | 2 + gcc/config/gcn/predicates.md | 2 +- gcc/config/host-linux.c | 2 + gcc/config/i386/i386-features.c | 4 + gcc/config/i386/sse.md | 35 +- gcc/config/mips/mti-linux.h | 2 +- gcc/config/pa/pa.c | 1 - gcc/config/pa/pa.h | 1 + gcc/config/rs6000/altivec.h | 2 +- gcc/config/rs6000/rs6000-call.c | 28 - gcc/config/rs6000/rs6000.c | 46 +- gcc/config/rs6000/rs6000.md | 136 +- gcc/config/s390/vector.md | 80 +- gcc/config/s390/vx-builtins.md | 78 +- gcc/config/sh/sh.md | 8 +- gcc/configure | 13 +- gcc/configure.ac | 9 +- gcc/cp/ChangeLog | 231 + gcc/cp/call.c | 16 +- gcc/cp/class.c | 10 +- gcc/cp/constexpr.c | 110 +- gcc/cp/constraint.cc | 267 +- gcc/cp/coroutines.cc | 309 +- gcc/cp/cp-gimplify.c | 36 + gcc/cp/cp-tree.h | 7 +- gcc/cp/cvt.c | 11 + gcc/cp/decl.c | 3 +- gcc/cp/decl2.c | 3 +- gcc/cp/except.c | 5 +- gcc/cp/method.c | 2 +- gcc/cp/name-lookup.c | 63 +- gcc/cp/parser.c | 358 +- gcc/cp/pt.c | 13 +- gcc/cp/semantics.c | 9 +- gcc/cp/tree.c | 16 +- gcc/cp/typeck2.c | 2 +- gcc/cselib.c | 235 +- gcc/d/ChangeLog | 40 + gcc/d/d-attribs.cc | 43 +- gcc/d/d-codegen.cc | 44 - gcc/d/d-tree.h | 6 +- gcc/d/decl.cc | 49 +- gcc/d/dmd/MERGE | 2 +- gcc/d/expr.cc | 20 +- gcc/d/modules.cc | 2 +- gcc/d/typeinfo.cc | 4 +- gcc/d/types.cc | 31 +- gcc/ddg.c | 169 +- gcc/ddg.h | 3 - gcc/doc/extend.texi | 4 +- gcc/doc/install.texi | 12 +- gcc/doc/invoke.texi | 28 +- gcc/doc/sourcebuild.texi | 11 + gcc/dse.c | 57 +- gcc/dwarf2out.c | 21 +- gcc/fold-const.c | 8 +- gcc/fortran/ChangeLog | 66 + gcc/fortran/arith.c | 10 +- gcc/fortran/check.c | 4 + gcc/fortran/decl.c | 47 +- gcc/fortran/expr.c | 14 +- gcc/fortran/gfortran.h | 1 + gcc/fortran/interface.c | 4 +- gcc/fortran/match.c | 5 +- gcc/fortran/resolve.c | 48 +- gcc/fortran/trans-array.c | 6 +- gcc/gimple-fold.c | 12 +- gcc/gimple-ssa-store-merging.c | 3 +- gcc/gimple-ssa-warn-alloca.c | 65 +- gcc/gimple.h | 14 +- gcc/gimplify.c | 35 +- gcc/graphviz.cc | 44 +- gcc/graphviz.h | 6 + gcc/ipa-icf-gimple.c | 6 + gcc/ipa-sra.c | 38 +- gcc/jit/ChangeLog | 24 + gcc/jit/docs/topics/compatibility.rst | 33 + gcc/jit/jit-playback.c | 16 +- gcc/jit/jit-playback.h | 1 - gcc/jit/libgccjit++.h | 22 + gcc/jit/libgccjit.c | 46 + gcc/jit/libgccjit.h | 16 + gcc/jit/libgccjit.map | 9 +- gcc/langhooks.c | 5 +- gcc/lower-subreg.c | 3 +- gcc/lra.c | 5 +- gcc/lto-streamer-in.c | 1 + gcc/lto-streamer-out.c | 1 + gcc/lto/ChangeLog | 11 + gcc/lto/lto-lang.c | 3 +- gcc/lto/lto.c | 1 + gcc/modulo-sched.c | 13 +- gcc/multiple_target.c | 4 - gcc/omp-offload.c | 14 +- gcc/opts.c | 30 +- gcc/params.opt | 2 +- gcc/po/ChangeLog | 18 + gcc/po/be.po | 15546 +++++++++------- gcc/po/da.po | 16726 ++++++++++-------- gcc/po/de.po | 15296 +++++++++------- gcc/po/el.po | 15654 ++++++++++------- gcc/po/es.po | 15527 +++++++++------- gcc/po/fi.po | 17525 ++++++++++--------- gcc/po/fr.po | 15310 +++++++++------- gcc/po/hr.po | 15206 +++++++++------- gcc/po/id.po | 17084 +++++++++--------- gcc/po/ja.po | 16929 ++++++++++-------- gcc/po/nl.po | 16172 +++++++++-------- gcc/po/ru.po | 15477 +++++++++------- gcc/po/sr.po | 16946 +++++++++--------- gcc/po/sv.po | 15834 ++++++++++------- gcc/po/tr.po | 17101 +++++++++--------- gcc/po/uk.po | 17022 ++++++++++-------- gcc/po/vi.po | 15520 +++++++++------- gcc/po/zh_CN.po | 17326 +++++++++--------- gcc/po/zh_TW.po | 17429 +++++++++--------- gcc/rtl.h | 1 + gcc/simplify-rtx.c | 51 + gcc/testsuite/ChangeLog | 3048 ++++ gcc/testsuite/c-c++-common/attr-copy.c | 43 + gcc/testsuite/c-c++-common/pr94385.c | 12 + .../c-c++-common/ubsan/float-cast-overflow-1.c | 2 +- .../c-c++-common/ubsan/float-cast-overflow-2.c | 2 +- .../c-c++-common/ubsan/float-cast-overflow-4.c | 2 +- gcc/testsuite/g++.dg/concepts/diagnostic1.C | 1 + gcc/testsuite/g++.dg/concepts/diagnostic2.C | 2 +- gcc/testsuite/g++.dg/concepts/diagnostic5.C | 43 + gcc/testsuite/g++.dg/concepts/diagnostic7.C | 11 + gcc/testsuite/g++.dg/concepts/diagnostic8.C | 6 + gcc/testsuite/g++.dg/concepts/pr84330.C | 2 +- gcc/testsuite/g++.dg/concepts/pr94252.C | 27 + gcc/testsuite/g++.dg/conversion/op7.C | 22 + .../coroutines/torture/co-ret-09-bool-await-susp.C | 44 +- .../torture/exceptions-test-01-n4849-a.C | 213 + .../torture/symmetric-transfer-00-basic.C | 111 + gcc/testsuite/g++.dg/cpp1y/alias-decl1.C | 9 + gcc/testsuite/g++.dg/cpp1y/alias-decl2.C | 8 + gcc/testsuite/g++.dg/cpp1y/alias-decl3.C | 9 + gcc/testsuite/g++.dg/cpp1y/constexpr-nsdmi2.C | 20 + gcc/testsuite/g++.dg/cpp1z/lambda-this4.C | 13 + gcc/testsuite/g++.dg/cpp1z/pr81349.C | 29 + gcc/testsuite/g++.dg/cpp2a/concepts-iconv1.C | 1 + gcc/testsuite/g++.dg/cpp2a/concepts-nonbool1.C | 20 + gcc/testsuite/g++.dg/cpp2a/concepts-nonbool2.C | 11 + gcc/testsuite/g++.dg/cpp2a/concepts-requires1.C | 4 +- gcc/testsuite/g++.dg/cpp2a/concepts-requires18.C | 2 +- gcc/testsuite/g++.dg/cpp2a/concepts-requires2.C | 12 +- gcc/testsuite/g++.dg/cpp2a/concepts-requires5.C | 2 +- gcc/testsuite/g++.dg/debug/pr94272.C | 14 + gcc/testsuite/g++.dg/debug/pr94273.C | 4 + gcc/testsuite/g++.dg/debug/pr94281.C | 11 + gcc/testsuite/g++.dg/debug/pr94323.C | 13 + gcc/testsuite/g++.dg/ext/attr-access-2.C | 88 + gcc/testsuite/g++.dg/ext/stmtexpr15.C | 2 +- gcc/testsuite/g++.dg/lookup/pr84733.C | 21 + gcc/testsuite/g++.dg/lookup/pr94257.C | 16 + gcc/testsuite/g++.dg/opt/pr94223.C | 5 + gcc/testsuite/g++.dg/other/pr94326.C | 19 + gcc/testsuite/g++.dg/other/pr94339.C | 11 + gcc/testsuite/g++.dg/parse/error26.C | 2 +- gcc/testsuite/g++.dg/parse/missing-template1.C | 4 +- gcc/testsuite/g++.dg/parse/template3.C | 5 +- gcc/testsuite/g++.dg/template/dependent-name10.C | 18 + gcc/testsuite/g++.dg/template/dependent-name11.C | 15 + gcc/testsuite/g++.dg/template/dependent-name12.C | 7 + gcc/testsuite/g++.dg/template/dependent-name13.C | 8 + gcc/testsuite/g++.dg/template/dependent-name14.C | 38 + gcc/testsuite/g++.dg/template/dependent-name5.C | 2 - gcc/testsuite/g++.dg/template/dependent-name7.C | 9 + gcc/testsuite/g++.dg/template/dependent-name8.C | 9 + gcc/testsuite/g++.dg/template/dependent-name9.C | 9 + gcc/testsuite/g++.dg/template/dr1710-2.C | 10 + gcc/testsuite/g++.dg/template/dr1710.C | 9 + gcc/testsuite/g++.dg/template/dr1794.C | 14 + gcc/testsuite/g++.dg/template/dr314.C | 15 + gcc/testsuite/g++.dg/template/error4.C | 3 +- gcc/testsuite/g++.dg/template/koenig11.C | 11 + gcc/testsuite/g++.dg/template/meminit2.C | 4 +- gcc/testsuite/g++.dg/template/template-keyword2.C | 5 + gcc/testsuite/g++.dg/torture/pr94303.C | 17 + gcc/testsuite/g++.dg/tree-ssa/pr94403.C | 37 + gcc/testsuite/g++.dg/ubsan/pr91993.C | 17 + gcc/testsuite/g++.dg/warn/Wconversion-pr91993.C | 17 + gcc/testsuite/g++.dg/warn/Wduplicated-cond1.C | 16 + gcc/testsuite/g++.dg/warn/Wmismatched-tags-3.C | 14 + gcc/testsuite/g++.dg/warn/Wmismatched-tags-4.C | 141 + gcc/testsuite/g++.dg/warn/Wmismatched-tags-5.C | 117 + gcc/testsuite/g++.dg/warn/Wmismatched-tags-6.C | 29 + gcc/testsuite/g++.dg/warn/Wnoexcept1.C | 2 +- gcc/testsuite/g++.dg/warn/Wnoexcept2.C | 15 + gcc/testsuite/g++.dg/warn/Wredundant-tags-3.C | 6 +- gcc/testsuite/g++.dg/warn/Wredundant-tags-6.C | 91 + gcc/testsuite/g++.dg/warn/Wredundant-tags-7.C | 25 + gcc/testsuite/g++.old-deja/g++.pt/crash38.C | 6 +- gcc/testsuite/gcc.c-torture/compile/pr94144.c | 18 + gcc/testsuite/gcc.c-torture/compile/pr94238.c | 22 + gcc/testsuite/gcc.c-torture/execute/pr94412.c | 28 + gcc/testsuite/gcc.dg/Walloca-larger-than-3.c | 38 + gcc/testsuite/gcc.dg/Walloca-larger-than-3.h | 9 + gcc/testsuite/gcc.dg/Wvla-larger-than-4.c | 30 + .../gcc.dg/analyzer/compound-assignment-1.c | 71 + .../gcc.dg/analyzer/compound-assignment-2.c | 24 + .../gcc.dg/analyzer/compound-assignment-3.c | 25 + gcc/testsuite/gcc.dg/analyzer/data-model-5b.c | 6 +- gcc/testsuite/gcc.dg/analyzer/data-model-5c.c | 7 +- gcc/testsuite/gcc.dg/analyzer/dot-output.c | 1 + gcc/testsuite/gcc.dg/analyzer/malloc-5.c | 12 + gcc/testsuite/gcc.dg/analyzer/sigsetjmp-5.c | 2 + gcc/testsuite/gcc.dg/analyzer/sigsetjmp-6.c | 2 + gcc/testsuite/gcc.dg/cleanup-13.c | 4 + gcc/testsuite/gcc.dg/lto/pr94271_0.c | 15 + gcc/testsuite/gcc.dg/lto/pr94271_1.c | 17 + gcc/testsuite/gcc.dg/pr84131.c | 29 + gcc/testsuite/gcc.dg/pr92301.c | 2 +- gcc/testsuite/gcc.dg/pr93573-1.c | 12 + gcc/testsuite/gcc.dg/pr93573-2.c | 6 + gcc/testsuite/gcc.dg/pr94269.c | 26 + gcc/testsuite/gcc.dg/pr94277.c | 11 + gcc/testsuite/gcc.dg/pr94283.c | 16 + gcc/testsuite/gcc.dg/pr94286.c | 11 + gcc/testsuite/gcc.dg/pr94292.c | 13 + gcc/testsuite/gcc.dg/pr94344.c | 53 + gcc/testsuite/gcc.dg/pr94368.c | 25 + gcc/testsuite/gcc.dg/pr94436.c | 13 + gcc/testsuite/gcc.dg/sms-compare-debug-1.c | 36 + gcc/testsuite/gcc.dg/sms-compare-debug-2.c | 24 + gcc/testsuite/gcc.dg/torture/pr94392.c | 22 + gcc/testsuite/gcc.dg/ubsan/pr94423.c | 17 + gcc/testsuite/gcc.dg/vect/bb-slp-pr69907.c | 5 +- gcc/testsuite/gcc.dg/vect/pr93069.c | 10 + gcc/testsuite/gcc.dg/vect/pr94443.c | 13 + gcc/testsuite/gcc.target/aarch64/options_set_11.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_12.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_13.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_14.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_15.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_16.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_17.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_18.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_19.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_20.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_21.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_22.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_23.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_24.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_25.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_26.c | 11 + gcc/testsuite/gcc.target/aarch64/pr94398.c | 24 + gcc/testsuite/gcc.target/aarch64/pr94435.c | 25 + gcc/testsuite/gcc.target/arm/cmp-2.c | 4 +- gcc/testsuite/gcc.target/arm/cmp-3.c | 49 + gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c | 13 + gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c | 13 + .../gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c | 3 +- .../gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c | 3 +- .../gcc.target/arm/mve/intrinsics/mve_fpu1.c | 3 +- .../gcc.target/arm/mve/intrinsics/mve_fpu2.c | 3 +- .../gcc.target/arm/mve/intrinsics/mve_fpu3.c | 3 +- .../gcc.target/arm/mve/intrinsics/mve_libcall1.c | 3 +- .../gcc.target/arm/mve/intrinsics/mve_libcall2.c | 3 +- .../arm/mve/intrinsics/mve_move_gpr_to_gpr.c | 3 +- .../arm/mve/intrinsics/mve_vector_float.c | 3 +- .../arm/mve/intrinsics/mve_vector_float1.c | 3 +- .../arm/mve/intrinsics/mve_vector_float2.c | 3 +- .../gcc.target/arm/mve/intrinsics/mve_vector_int.c | 3 +- .../arm/mve/intrinsics/mve_vector_int1.c | 3 +- .../arm/mve/intrinsics/mve_vector_int2.c | 3 +- .../arm/mve/intrinsics/mve_vector_uint.c | 3 +- .../arm/mve/intrinsics/mve_vector_uint1.c | 3 +- .../arm/mve/intrinsics/mve_vector_uint2.c | 3 +- .../gcc.target/arm/mve/intrinsics/sqrshr.c | 13 + .../gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c | 13 + .../gcc.target/arm/mve/intrinsics/sqrshrl_sat64.c | 13 + .../gcc.target/arm/mve/intrinsics/sqshl.c | 13 + .../gcc.target/arm/mve/intrinsics/sqshll.c | 13 + .../gcc.target/arm/mve/intrinsics/srshr.c | 13 + .../gcc.target/arm/mve/intrinsics/srshrl.c | 13 + .../gcc.target/arm/mve/intrinsics/uqrshl.c | 13 + .../gcc.target/arm/mve/intrinsics/uqrshll_sat48.c | 13 + .../gcc.target/arm/mve/intrinsics/uqrshll_sat64.c | 13 + .../gcc.target/arm/mve/intrinsics/uqshl.c | 13 + .../gcc.target/arm/mve/intrinsics/uqshll.c | 13 + .../gcc.target/arm/mve/intrinsics/urshr.c | 13 + .../gcc.target/arm/mve/intrinsics/urshrl.c | 13 + .../gcc.target/arm/mve/intrinsics/vabavq_p_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabavq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabavq_p_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vabavq_p_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabavq_p_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabavq_p_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vabavq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabavq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabavq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vabavq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabavq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabavq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabdq_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vabsq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabsq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabsq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabsq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabsq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabsq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabsq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vabsq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabsq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabsq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vabsq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabsq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabsq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vabsq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vabsq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vadciq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vadciq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vadciq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vadciq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vadcq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vadcq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vadcq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vadcq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddlvq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddlvq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddq_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvaq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvaq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvaq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvaq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvaq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvaq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vaddvq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vandq_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_n_s16.c | 9 +- .../gcc.target/arm/mve/intrinsics/vbicq_n_s32.c | 9 +- .../gcc.target/arm/mve/intrinsics/vbicq_n_u16.c | 9 +- .../gcc.target/arm/mve/intrinsics/vbicq_n_u32.c | 9 +- .../gcc.target/arm/mve/intrinsics/vbicq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbicq_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_f16.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_f32.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_m_f16.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_m_f32.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_m_s16.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_m_s32.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_m_s8.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_m_u16.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_m_u32.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_m_u8.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_s16.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_s32.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_s8.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_u16.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_u32.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_u8.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_x_f16.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_x_f32.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_x_s16.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_x_s32.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_x_s8.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_x_u16.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_x_u32.c | 1 - .../arm/mve/intrinsics/vcaddq_rot270_x_u8.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_f16.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_f32.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_m_f16.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_m_f32.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_m_s16.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_m_s32.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_m_s8.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_m_u16.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_m_u32.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_m_u8.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_s16.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_s32.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_s8.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_u16.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_u32.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_u8.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_x_f16.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_x_f32.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_x_s16.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_x_s32.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_x_s8.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_x_u16.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_x_u32.c | 1 - .../arm/mve/intrinsics/vcaddq_rot90_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vclsq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vclsq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vclsq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vclsq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vclsq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vclsq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vclsq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vclsq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vclsq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vclzq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vclzq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vclzq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vclzq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vclzq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vclzq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vclzq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vclzq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vclzq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vclzq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vclzq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vclzq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vclzq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vclzq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vclzq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vclzq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vclzq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vclzq_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmlaq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmlaq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c | 1 - .../arm/mve/intrinsics/vcmlaq_rot180_f16.c | 1 - .../arm/mve/intrinsics/vcmlaq_rot180_f32.c | 1 - .../arm/mve/intrinsics/vcmlaq_rot180_m_f16.c | 1 - .../arm/mve/intrinsics/vcmlaq_rot180_m_f32.c | 1 - .../arm/mve/intrinsics/vcmlaq_rot270_f16.c | 1 - .../arm/mve/intrinsics/vcmlaq_rot270_f32.c | 1 - .../arm/mve/intrinsics/vcmlaq_rot270_m_f16.c | 1 - .../arm/mve/intrinsics/vcmlaq_rot270_m_f32.c | 1 - .../arm/mve/intrinsics/vcmlaq_rot90_f16.c | 1 - .../arm/mve/intrinsics/vcmlaq_rot90_f32.c | 1 - .../arm/mve/intrinsics/vcmlaq_rot90_m_f16.c | 1 - .../arm/mve/intrinsics/vcmlaq_rot90_m_f32.c | 1 - .../arm/mve/intrinsics/vcmpcsq_m_n_u16.c | 3 +- .../arm/mve/intrinsics/vcmpcsq_m_n_u32.c | 3 +- .../gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c | 3 +- .../gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c | 1 - .../arm/mve/intrinsics/vcmpeqq_m_n_f16.c | 1 - .../arm/mve/intrinsics/vcmpeqq_m_n_f32.c | 1 - .../arm/mve/intrinsics/vcmpeqq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vcmpeqq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c | 1 - .../arm/mve/intrinsics/vcmpeqq_m_n_u16.c | 1 - .../arm/mve/intrinsics/vcmpeqq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c | 3 +- .../gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c | 3 +- .../gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c | 1 - .../arm/mve/intrinsics/vcmpgeq_m_n_f16.c | 1 - .../arm/mve/intrinsics/vcmpgeq_m_n_f32.c | 1 - .../arm/mve/intrinsics/vcmpgeq_m_n_s16.c | 3 +- .../arm/mve/intrinsics/vcmpgeq_m_n_s32.c | 3 +- .../gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c | 3 +- .../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c | 1 - .../arm/mve/intrinsics/vcmpgtq_m_n_f16.c | 3 +- .../arm/mve/intrinsics/vcmpgtq_m_n_f32.c | 3 +- .../arm/mve/intrinsics/vcmpgtq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vcmpgtq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c | 3 +- .../gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c | 3 +- .../gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c | 1 - .../arm/mve/intrinsics/vcmphiq_m_n_u16.c | 1 - .../arm/mve/intrinsics/vcmphiq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmphiq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c | 1 - .../arm/mve/intrinsics/vcmpleq_m_n_f16.c | 3 +- .../arm/mve/intrinsics/vcmpleq_m_n_f32.c | 3 +- .../arm/mve/intrinsics/vcmpleq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vcmpleq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c | 3 +- .../gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c | 3 +- .../gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpleq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpltq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpltq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c | 1 - .../arm/mve/intrinsics/vcmpltq_m_n_f16.c | 3 +- .../arm/mve/intrinsics/vcmpltq_m_n_f32.c | 3 +- .../arm/mve/intrinsics/vcmpltq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vcmpltq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpltq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpltq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpltq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c | 1 - .../arm/mve/intrinsics/vcmpneq_m_n_f16.c | 3 +- .../arm/mve/intrinsics/vcmpneq_m_n_f32.c | 3 +- .../arm/mve/intrinsics/vcmpneq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vcmpneq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c | 1 - .../arm/mve/intrinsics/vcmpneq_m_n_u16.c | 1 - .../arm/mve/intrinsics/vcmpneq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c | 3 +- .../gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c | 3 +- .../gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmpneq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmulq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmulq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c | 1 - .../arm/mve/intrinsics/vcmulq_rot180_f16.c | 1 - .../arm/mve/intrinsics/vcmulq_rot180_f32.c | 1 - .../arm/mve/intrinsics/vcmulq_rot180_m_f16.c | 1 - .../arm/mve/intrinsics/vcmulq_rot180_m_f32.c | 1 - .../arm/mve/intrinsics/vcmulq_rot180_x_f16.c | 1 - .../arm/mve/intrinsics/vcmulq_rot180_x_f32.c | 1 - .../arm/mve/intrinsics/vcmulq_rot270_f16.c | 1 - .../arm/mve/intrinsics/vcmulq_rot270_f32.c | 1 - .../arm/mve/intrinsics/vcmulq_rot270_m_f16.c | 1 - .../arm/mve/intrinsics/vcmulq_rot270_m_f32.c | 1 - .../arm/mve/intrinsics/vcmulq_rot270_x_f16.c | 1 - .../arm/mve/intrinsics/vcmulq_rot270_x_f32.c | 1 - .../arm/mve/intrinsics/vcmulq_rot90_f16.c | 1 - .../arm/mve/intrinsics/vcmulq_rot90_f32.c | 1 - .../arm/mve/intrinsics/vcmulq_rot90_m_f16.c | 1 - .../arm/mve/intrinsics/vcmulq_rot90_m_f32.c | 1 - .../arm/mve/intrinsics/vcmulq_rot90_x_f16.c | 1 - .../arm/mve/intrinsics/vcmulq_rot90_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcreateq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcreateq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcreateq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcreateq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcreateq_s64.c | 1 - .../gcc.target/arm/mve/intrinsics/vcreateq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vcreateq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcreateq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcreateq_u64.c | 1 - .../gcc.target/arm/mve/intrinsics/vcreateq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vctp16q.c | 1 - .../gcc.target/arm/mve/intrinsics/vctp16q_m.c | 1 - .../gcc.target/arm/mve/intrinsics/vctp32q.c | 1 - .../gcc.target/arm/mve/intrinsics/vctp32q_m.c | 1 - .../gcc.target/arm/mve/intrinsics/vctp64q.c | 1 - .../gcc.target/arm/mve/intrinsics/vctp64q_m.c | 1 - .../gcc.target/arm/mve/intrinsics/vctp8q.c | 1 - .../gcc.target/arm/mve/intrinsics/vctp8q_m.c | 1 - .../arm/mve/intrinsics/vcvtaq_m_s16_f16.c | 1 - .../arm/mve/intrinsics/vcvtaq_m_s32_f32.c | 1 - .../arm/mve/intrinsics/vcvtaq_m_u16_f16.c | 1 - .../arm/mve/intrinsics/vcvtaq_m_u32_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c | 1 - .../arm/mve/intrinsics/vcvtaq_x_s16_f16.c | 1 - .../arm/mve/intrinsics/vcvtaq_x_s32_f32.c | 1 - .../arm/mve/intrinsics/vcvtaq_x_u16_f16.c | 1 - .../arm/mve/intrinsics/vcvtaq_x_u32_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c | 1 - .../arm/mve/intrinsics/vcvtbq_m_f16_f32.c | 1 - .../arm/mve/intrinsics/vcvtbq_m_f32_f16.c | 1 - .../arm/mve/intrinsics/vcvtbq_x_f32_f16.c | 1 - .../arm/mve/intrinsics/vcvtmq_m_s16_f16.c | 1 - .../arm/mve/intrinsics/vcvtmq_m_s32_f32.c | 1 - .../arm/mve/intrinsics/vcvtmq_m_u16_f16.c | 1 - .../arm/mve/intrinsics/vcvtmq_m_u32_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c | 1 - .../arm/mve/intrinsics/vcvtmq_x_s16_f16.c | 1 - .../arm/mve/intrinsics/vcvtmq_x_s32_f32.c | 1 - .../arm/mve/intrinsics/vcvtmq_x_u16_f16.c | 1 - .../arm/mve/intrinsics/vcvtmq_x_u32_f32.c | 1 - .../arm/mve/intrinsics/vcvtnq_m_s16_f16.c | 1 - .../arm/mve/intrinsics/vcvtnq_m_s32_f32.c | 1 - .../arm/mve/intrinsics/vcvtnq_m_u16_f16.c | 1 - .../arm/mve/intrinsics/vcvtnq_m_u32_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c | 1 - .../arm/mve/intrinsics/vcvtnq_x_s16_f16.c | 1 - .../arm/mve/intrinsics/vcvtnq_x_s32_f32.c | 1 - .../arm/mve/intrinsics/vcvtnq_x_u16_f16.c | 1 - .../arm/mve/intrinsics/vcvtnq_x_u32_f32.c | 1 - .../arm/mve/intrinsics/vcvtpq_m_s16_f16.c | 1 - .../arm/mve/intrinsics/vcvtpq_m_s32_f32.c | 1 - .../arm/mve/intrinsics/vcvtpq_m_u16_f16.c | 1 - .../arm/mve/intrinsics/vcvtpq_m_u32_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c | 1 - .../arm/mve/intrinsics/vcvtpq_x_s16_f16.c | 1 - .../arm/mve/intrinsics/vcvtpq_x_s32_f32.c | 1 - .../arm/mve/intrinsics/vcvtpq_x_u16_f16.c | 1 - .../arm/mve/intrinsics/vcvtpq_x_u32_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c | 1 - .../arm/mve/intrinsics/vcvtq_m_f16_s16.c | 1 - .../arm/mve/intrinsics/vcvtq_m_f16_u16.c | 1 - .../arm/mve/intrinsics/vcvtq_m_f32_s32.c | 1 - .../arm/mve/intrinsics/vcvtq_m_f32_u32.c | 1 - .../arm/mve/intrinsics/vcvtq_m_n_f16_s16.c | 1 - .../arm/mve/intrinsics/vcvtq_m_n_f16_u16.c | 1 - .../arm/mve/intrinsics/vcvtq_m_n_f32_s32.c | 1 - .../arm/mve/intrinsics/vcvtq_m_n_f32_u32.c | 1 - .../arm/mve/intrinsics/vcvtq_m_n_s16_f16.c | 1 - .../arm/mve/intrinsics/vcvtq_m_n_s32_f32.c | 1 - .../arm/mve/intrinsics/vcvtq_m_n_u16_f16.c | 1 - .../arm/mve/intrinsics/vcvtq_m_n_u32_f32.c | 1 - .../arm/mve/intrinsics/vcvtq_m_s16_f16.c | 1 - .../arm/mve/intrinsics/vcvtq_m_s32_f32.c | 1 - .../arm/mve/intrinsics/vcvtq_m_u16_f16.c | 1 - .../arm/mve/intrinsics/vcvtq_m_u32_f32.c | 1 - .../arm/mve/intrinsics/vcvtq_n_f16_s16.c | 1 - .../arm/mve/intrinsics/vcvtq_n_f16_u16.c | 1 - .../arm/mve/intrinsics/vcvtq_n_f32_s32.c | 1 - .../arm/mve/intrinsics/vcvtq_n_f32_u32.c | 1 - .../arm/mve/intrinsics/vcvtq_n_s16_f16.c | 1 - .../arm/mve/intrinsics/vcvtq_n_s32_f32.c | 1 - .../arm/mve/intrinsics/vcvtq_n_u16_f16.c | 1 - .../arm/mve/intrinsics/vcvtq_n_u32_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c | 1 - .../arm/mve/intrinsics/vcvtq_x_f16_s16.c | 1 - .../arm/mve/intrinsics/vcvtq_x_f16_u16.c | 1 - .../arm/mve/intrinsics/vcvtq_x_f32_s32.c | 1 - .../arm/mve/intrinsics/vcvtq_x_f32_u32.c | 1 - .../arm/mve/intrinsics/vcvtq_x_n_f16_s16.c | 1 - .../arm/mve/intrinsics/vcvtq_x_n_f16_u16.c | 1 - .../arm/mve/intrinsics/vcvtq_x_n_f32_s32.c | 1 - .../arm/mve/intrinsics/vcvtq_x_n_f32_u32.c | 1 - .../arm/mve/intrinsics/vcvtq_x_n_s16_f16.c | 1 - .../arm/mve/intrinsics/vcvtq_x_n_s32_f32.c | 1 - .../arm/mve/intrinsics/vcvtq_x_n_u16_f16.c | 1 - .../arm/mve/intrinsics/vcvtq_x_n_u32_f32.c | 1 - .../arm/mve/intrinsics/vcvtq_x_s16_f16.c | 1 - .../arm/mve/intrinsics/vcvtq_x_s32_f32.c | 1 - .../arm/mve/intrinsics/vcvtq_x_u16_f16.c | 1 - .../arm/mve/intrinsics/vcvtq_x_u32_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c | 1 - .../arm/mve/intrinsics/vcvttq_m_f16_f32.c | 1 - .../arm/mve/intrinsics/vcvttq_m_f32_f16.c | 1 - .../arm/mve/intrinsics/vcvttq_x_f32_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c | 1 - .../arm/mve/intrinsics/vddupq_m_wb_u16.c | 1 - .../arm/mve/intrinsics/vddupq_m_wb_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vddupq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vddupq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vddupq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c | 1 - .../arm/mve/intrinsics/vddupq_x_wb_u16.c | 1 - .../arm/mve/intrinsics/vddupq_x_wb_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c | 1 - .../arm/mve/intrinsics/vdwdupq_m_n_u16.c | 1 - .../arm/mve/intrinsics/vdwdupq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c | 1 - .../arm/mve/intrinsics/vdwdupq_m_wb_u16.c | 1 - .../arm/mve/intrinsics/vdwdupq_m_wb_u32.c | 1 - .../arm/mve/intrinsics/vdwdupq_m_wb_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c | 1 - .../arm/mve/intrinsics/vdwdupq_x_n_u16.c | 1 - .../arm/mve/intrinsics/vdwdupq_x_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c | 1 - .../arm/mve/intrinsics/vdwdupq_x_wb_u16.c | 1 - .../arm/mve/intrinsics/vdwdupq_x_wb_u32.c | 1 - .../arm/mve/intrinsics/vdwdupq_x_wb_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/veorq_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vfmaq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vfmaq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vfmsq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vfmsq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vgetq_lane_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_s64.c | 22 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_u64.c | 22 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c | 1 - .../arm/mve/intrinsics/vhcaddq_rot270_m_s16.c | 1 - .../arm/mve/intrinsics/vhcaddq_rot270_m_s32.c | 1 - .../arm/mve/intrinsics/vhcaddq_rot270_m_s8.c | 1 - .../arm/mve/intrinsics/vhcaddq_rot270_s16.c | 1 - .../arm/mve/intrinsics/vhcaddq_rot270_s32.c | 1 - .../arm/mve/intrinsics/vhcaddq_rot270_s8.c | 1 - .../arm/mve/intrinsics/vhcaddq_rot270_x_s16.c | 1 - .../arm/mve/intrinsics/vhcaddq_rot270_x_s32.c | 1 - .../arm/mve/intrinsics/vhcaddq_rot270_x_s8.c | 1 - .../arm/mve/intrinsics/vhcaddq_rot90_m_s16.c | 1 - .../arm/mve/intrinsics/vhcaddq_rot90_m_s32.c | 1 - .../arm/mve/intrinsics/vhcaddq_rot90_m_s8.c | 1 - .../arm/mve/intrinsics/vhcaddq_rot90_s16.c | 1 - .../arm/mve/intrinsics/vhcaddq_rot90_s32.c | 1 - .../arm/mve/intrinsics/vhcaddq_rot90_s8.c | 1 - .../arm/mve/intrinsics/vhcaddq_rot90_x_s16.c | 1 - .../arm/mve/intrinsics/vhcaddq_rot90_x_s32.c | 1 - .../arm/mve/intrinsics/vhcaddq_rot90_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c | 1 - .../arm/mve/intrinsics/vidupq_m_wb_u16.c | 1 - .../arm/mve/intrinsics/vidupq_m_wb_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vidupq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vidupq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vidupq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c | 1 - .../arm/mve/intrinsics/vidupq_x_wb_u16.c | 1 - .../arm/mve/intrinsics/vidupq_x_wb_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c | 1 - .../arm/mve/intrinsics/viwdupq_m_n_u16.c | 1 - .../arm/mve/intrinsics/viwdupq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c | 1 - .../arm/mve/intrinsics/viwdupq_m_wb_u16.c | 1 - .../arm/mve/intrinsics/viwdupq_m_wb_u32.c | 1 - .../arm/mve/intrinsics/viwdupq_m_wb_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c | 1 - .../arm/mve/intrinsics/viwdupq_x_n_u16.c | 1 - .../arm/mve/intrinsics/viwdupq_x_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c | 1 - .../arm/mve/intrinsics/viwdupq_x_wb_u16.c | 1 - .../arm/mve/intrinsics/viwdupq_x_wb_u32.c | 1 - .../arm/mve/intrinsics/viwdupq_x_wb_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vld1q_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vld1q_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vld1q_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vld1q_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vld1q_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vld1q_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vld1q_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vld1q_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vld1q_z_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vld1q_z_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vld1q_z_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vld1q_z_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vld1q_z_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vld1q_z_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vld1q_z_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vld1q_z_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vld2q_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vld2q_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vld2q_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vld2q_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vld2q_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vld2q_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vld2q_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vld2q_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vld4q_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vld4q_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vld4q_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vld4q_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vld4q_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vld4q_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vld4q_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vld4q_u8.c | 1 - .../arm/mve/intrinsics/vldrbq_gather_offset_s16.c | 1 - .../arm/mve/intrinsics/vldrbq_gather_offset_s32.c | 1 - .../arm/mve/intrinsics/vldrbq_gather_offset_s8.c | 1 - .../arm/mve/intrinsics/vldrbq_gather_offset_u16.c | 1 - .../arm/mve/intrinsics/vldrbq_gather_offset_u32.c | 1 - .../arm/mve/intrinsics/vldrbq_gather_offset_u8.c | 1 - .../mve/intrinsics/vldrbq_gather_offset_z_s16.c | 1 - .../mve/intrinsics/vldrbq_gather_offset_z_s32.c | 1 - .../arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c | 1 - .../mve/intrinsics/vldrbq_gather_offset_z_u16.c | 1 - .../mve/intrinsics/vldrbq_gather_offset_z_u32.c | 1 - .../arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrbq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrbq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrbq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrbq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrbq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrbq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c | 1 - .../arm/mve/intrinsics/vldrdq_gather_base_s64.c | 1 - .../arm/mve/intrinsics/vldrdq_gather_base_u64.c | 1 - .../arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c | 5 +- .../arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c | 5 +- .../mve/intrinsics/vldrdq_gather_base_wb_z_s64.c | 7 +- .../mve/intrinsics/vldrdq_gather_base_wb_z_u64.c | 7 +- .../arm/mve/intrinsics/vldrdq_gather_base_z_s64.c | 1 - .../arm/mve/intrinsics/vldrdq_gather_base_z_u64.c | 1 - .../arm/mve/intrinsics/vldrdq_gather_offset_s64.c | 1 - .../arm/mve/intrinsics/vldrdq_gather_offset_u64.c | 1 - .../mve/intrinsics/vldrdq_gather_offset_z_s64.c | 1 - .../mve/intrinsics/vldrdq_gather_offset_z_u64.c | 1 - .../intrinsics/vldrdq_gather_shifted_offset_s64.c | 1 - .../intrinsics/vldrdq_gather_shifted_offset_u64.c | 1 - .../vldrdq_gather_shifted_offset_z_s64.c | 1 - .../vldrdq_gather_shifted_offset_z_u64.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrhq_f16.c | 1 - .../arm/mve/intrinsics/vldrhq_gather_offset_f16.c | 1 - .../arm/mve/intrinsics/vldrhq_gather_offset_s16.c | 1 - .../arm/mve/intrinsics/vldrhq_gather_offset_s32.c | 1 - .../arm/mve/intrinsics/vldrhq_gather_offset_u16.c | 1 - .../arm/mve/intrinsics/vldrhq_gather_offset_u32.c | 1 - .../mve/intrinsics/vldrhq_gather_offset_z_f16.c | 1 - .../mve/intrinsics/vldrhq_gather_offset_z_s16.c | 1 - .../mve/intrinsics/vldrhq_gather_offset_z_s32.c | 1 - .../mve/intrinsics/vldrhq_gather_offset_z_u16.c | 1 - .../mve/intrinsics/vldrhq_gather_offset_z_u32.c | 1 - .../intrinsics/vldrhq_gather_shifted_offset_f16.c | 1 - .../intrinsics/vldrhq_gather_shifted_offset_s16.c | 1 - .../intrinsics/vldrhq_gather_shifted_offset_s32.c | 1 - .../intrinsics/vldrhq_gather_shifted_offset_u16.c | 1 - .../intrinsics/vldrhq_gather_shifted_offset_u32.c | 1 - .../vldrhq_gather_shifted_offset_z_f16.c | 1 - .../vldrhq_gather_shifted_offset_z_s16.c | 1 - .../vldrhq_gather_shifted_offset_z_s32.c | 1 - .../vldrhq_gather_shifted_offset_z_u16.c | 1 - .../vldrhq_gather_shifted_offset_z_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrhq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrhq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrhq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrhq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrwq_f32.c | 1 - .../arm/mve/intrinsics/vldrwq_gather_base_f32.c | 1 - .../arm/mve/intrinsics/vldrwq_gather_base_s32.c | 1 - .../arm/mve/intrinsics/vldrwq_gather_base_u32.c | 1 - .../arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c | 5 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c | 5 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c | 5 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_f32.c | 7 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_s32.c | 7 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_u32.c | 7 +- .../arm/mve/intrinsics/vldrwq_gather_base_z_f32.c | 1 - .../arm/mve/intrinsics/vldrwq_gather_base_z_s32.c | 1 - .../arm/mve/intrinsics/vldrwq_gather_base_z_u32.c | 1 - .../arm/mve/intrinsics/vldrwq_gather_offset_f32.c | 1 - .../arm/mve/intrinsics/vldrwq_gather_offset_s32.c | 1 - .../arm/mve/intrinsics/vldrwq_gather_offset_u32.c | 1 - .../mve/intrinsics/vldrwq_gather_offset_z_f32.c | 1 - .../mve/intrinsics/vldrwq_gather_offset_z_s32.c | 1 - .../mve/intrinsics/vldrwq_gather_offset_z_u32.c | 1 - .../intrinsics/vldrwq_gather_shifted_offset_f32.c | 1 - .../intrinsics/vldrwq_gather_shifted_offset_s32.c | 1 - .../intrinsics/vldrwq_gather_shifted_offset_u32.c | 1 - .../vldrwq_gather_shifted_offset_z_f32.c | 1 - .../vldrwq_gather_shifted_offset_z_s32.c | 1 - .../vldrwq_gather_shifted_offset_z_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrwq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrwq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxaq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxaq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxaq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxavq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxavq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxavq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c | 1 - .../arm/mve/intrinsics/vmaxnmavq_p_f16.c | 1 - .../arm/mve/intrinsics/vmaxnmavq_p_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxvq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxvq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxvq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxvq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxvq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmaxvq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vminaq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminaq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminaq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vminaq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminaq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminaq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vminavq_p_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminavq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminavq_p_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vminavq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminavq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminavq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vminnmaq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminnmaq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminnmavq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminnmavq_f32.c | 1 - .../arm/mve/intrinsics/vminnmavq_p_f16.c | 1 - .../arm/mve/intrinsics/vminnmavq_p_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminnmq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminnmq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminnmvq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminnmvq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vminq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vminq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vminq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vminq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vminq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminq_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vminvq_p_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminvq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminvq_p_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vminvq_p_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminvq_p_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminvq_p_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vminvq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminvq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminvq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vminvq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vminvq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vminvq_u8.c | 1 - .../arm/mve/intrinsics/vmladavaq_p_s16.c | 1 - .../arm/mve/intrinsics/vmladavaq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c | 1 - .../arm/mve/intrinsics/vmladavaq_p_u16.c | 1 - .../arm/mve/intrinsics/vmladavaq_p_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaq_u8.c | 1 - .../arm/mve/intrinsics/vmladavaxq_p_s16.c | 1 - .../arm/mve/intrinsics/vmladavaxq_p_s32.c | 1 - .../arm/mve/intrinsics/vmladavaxq_p_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavq_u8.c | 1 - .../arm/mve/intrinsics/vmladavxq_p_s16.c | 1 - .../arm/mve/intrinsics/vmladavxq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavxq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavxq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmladavxq_s8.c | 1 - .../arm/mve/intrinsics/vmlaldavaq_p_s16.c | 1 - .../arm/mve/intrinsics/vmlaldavaq_p_s32.c | 1 - .../arm/mve/intrinsics/vmlaldavaq_p_u16.c | 1 - .../arm/mve/intrinsics/vmlaldavaq_p_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c | 1 - .../arm/mve/intrinsics/vmlaldavaxq_p_s16.c | 1 - .../arm/mve/intrinsics/vmlaldavaxq_p_s32.c | 1 - .../arm/mve/intrinsics/vmlaldavaxq_p_u16.c | 1 - .../arm/mve/intrinsics/vmlaldavaxq_p_u32.c | 1 - .../arm/mve/intrinsics/vmlaldavaxq_s16.c | 1 - .../arm/mve/intrinsics/vmlaldavaxq_s32.c | 1 - .../arm/mve/intrinsics/vmlaldavq_p_s16.c | 1 - .../arm/mve/intrinsics/vmlaldavq_p_s32.c | 1 - .../arm/mve/intrinsics/vmlaldavq_p_u16.c | 1 - .../arm/mve/intrinsics/vmlaldavq_p_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c | 1 - .../arm/mve/intrinsics/vmlaldavxq_p_s16.c | 1 - .../arm/mve/intrinsics/vmlaldavxq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c | 1 - .../arm/mve/intrinsics/vmlsdavaq_p_s16.c | 1 - .../arm/mve/intrinsics/vmlsdavaq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c | 1 - .../arm/mve/intrinsics/vmlsdavaxq_p_s16.c | 1 - .../arm/mve/intrinsics/vmlsdavaxq_p_s32.c | 1 - .../arm/mve/intrinsics/vmlsdavaxq_p_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c | 1 - .../arm/mve/intrinsics/vmlsdavxq_p_s16.c | 1 - .../arm/mve/intrinsics/vmlsdavxq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c | 1 - .../arm/mve/intrinsics/vmlsldavaq_p_s16.c | 1 - .../arm/mve/intrinsics/vmlsldavaq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c | 1 - .../arm/mve/intrinsics/vmlsldavaxq_p_s16.c | 1 - .../arm/mve/intrinsics/vmlsldavaxq_p_s32.c | 1 - .../arm/mve/intrinsics/vmlsldavaxq_s16.c | 1 - .../arm/mve/intrinsics/vmlsldavaxq_s32.c | 1 - .../arm/mve/intrinsics/vmlsldavq_p_s16.c | 1 - .../arm/mve/intrinsics/vmlsldavq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c | 1 - .../arm/mve/intrinsics/vmlsldavxq_p_s16.c | 1 - .../arm/mve/intrinsics/vmlsldavxq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovlbq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovlbq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovlbq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovlbq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovltq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovltq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovltq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovltq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovnbq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovnbq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovnbq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovnbq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovntq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovntq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovntq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmovntq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulhq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulhq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulhq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulhq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulhq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulhq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c | 1 - .../arm/mve/intrinsics/vmullbq_int_m_s16.c | 1 - .../arm/mve/intrinsics/vmullbq_int_m_s32.c | 1 - .../arm/mve/intrinsics/vmullbq_int_m_s8.c | 1 - .../arm/mve/intrinsics/vmullbq_int_m_u16.c | 1 - .../arm/mve/intrinsics/vmullbq_int_m_u32.c | 1 - .../arm/mve/intrinsics/vmullbq_int_m_u8.c | 1 - .../arm/mve/intrinsics/vmullbq_int_s16.c | 1 - .../arm/mve/intrinsics/vmullbq_int_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c | 1 - .../arm/mve/intrinsics/vmullbq_int_u16.c | 1 - .../arm/mve/intrinsics/vmullbq_int_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c | 1 - .../arm/mve/intrinsics/vmullbq_int_x_s16.c | 1 - .../arm/mve/intrinsics/vmullbq_int_x_s32.c | 1 - .../arm/mve/intrinsics/vmullbq_int_x_s8.c | 1 - .../arm/mve/intrinsics/vmullbq_int_x_u16.c | 1 - .../arm/mve/intrinsics/vmullbq_int_x_u32.c | 1 - .../arm/mve/intrinsics/vmullbq_int_x_u8.c | 1 - .../arm/mve/intrinsics/vmullbq_poly_m_p16.c | 1 - .../arm/mve/intrinsics/vmullbq_poly_m_p8.c | 1 - .../arm/mve/intrinsics/vmullbq_poly_p16.c | 1 - .../arm/mve/intrinsics/vmullbq_poly_p8.c | 1 - .../arm/mve/intrinsics/vmullbq_poly_x_p16.c | 1 - .../arm/mve/intrinsics/vmullbq_poly_x_p8.c | 1 - .../arm/mve/intrinsics/vmulltq_int_m_s16.c | 1 - .../arm/mve/intrinsics/vmulltq_int_m_s32.c | 1 - .../arm/mve/intrinsics/vmulltq_int_m_s8.c | 1 - .../arm/mve/intrinsics/vmulltq_int_m_u16.c | 1 - .../arm/mve/intrinsics/vmulltq_int_m_u32.c | 1 - .../arm/mve/intrinsics/vmulltq_int_m_u8.c | 1 - .../arm/mve/intrinsics/vmulltq_int_s16.c | 1 - .../arm/mve/intrinsics/vmulltq_int_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c | 1 - .../arm/mve/intrinsics/vmulltq_int_u16.c | 1 - .../arm/mve/intrinsics/vmulltq_int_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c | 1 - .../arm/mve/intrinsics/vmulltq_int_x_s16.c | 1 - .../arm/mve/intrinsics/vmulltq_int_x_s32.c | 1 - .../arm/mve/intrinsics/vmulltq_int_x_s8.c | 1 - .../arm/mve/intrinsics/vmulltq_int_x_u16.c | 1 - .../arm/mve/intrinsics/vmulltq_int_x_u32.c | 1 - .../arm/mve/intrinsics/vmulltq_int_x_u8.c | 1 - .../arm/mve/intrinsics/vmulltq_poly_m_p16.c | 1 - .../arm/mve/intrinsics/vmulltq_poly_m_p8.c | 1 - .../arm/mve/intrinsics/vmulltq_poly_p16.c | 1 - .../arm/mve/intrinsics/vmulltq_poly_p8.c | 1 - .../arm/mve/intrinsics/vmulltq_poly_x_p16.c | 1 - .../arm/mve/intrinsics/vmulltq_poly_x_p8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmulq_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vnegq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vnegq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vnegq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vnegq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vnegq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vnegq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vnegq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vnegq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vnegq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vnegq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vnegq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vnegq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vnegq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vnegq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vnegq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vornq_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vorrq_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vpnot.c | 1 - .../gcc.target/arm/mve/intrinsics/vpselq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vpselq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vpselq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vpselq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vpselq_s64.c | 1 - .../gcc.target/arm/mve/intrinsics/vpselq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vpselq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vpselq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vpselq_u64.c | 1 - .../gcc.target/arm/mve/intrinsics/vpselq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqabsq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqabsq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqabsq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqaddq_u8.c | 1 - .../arm/mve/intrinsics/vqdmladhq_m_s16.c | 1 - .../arm/mve/intrinsics/vqdmladhq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c | 1 - .../arm/mve/intrinsics/vqdmladhxq_m_s16.c | 1 - .../arm/mve/intrinsics/vqdmladhxq_m_s32.c | 1 - .../arm/mve/intrinsics/vqdmladhxq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c | 1 - .../arm/mve/intrinsics/vqdmlahq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vqdmlahq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vqdmlahq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmlahq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmlahq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmlahq_n_u8.c | 1 - .../arm/mve/intrinsics/vqdmlsdhq_m_s16.c | 1 - .../arm/mve/intrinsics/vqdmlsdhq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c | 1 - .../arm/mve/intrinsics/vqdmlsdhxq_m_s16.c | 1 - .../arm/mve/intrinsics/vqdmlsdhxq_m_s32.c | 1 - .../arm/mve/intrinsics/vqdmlsdhxq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c | 1 - .../arm/mve/intrinsics/vqdmulhq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vqdmulhq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vqdmulhq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c | 1 - .../arm/mve/intrinsics/vqdmullbq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vqdmullbq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vqdmullbq_m_s16.c | 1 - .../arm/mve/intrinsics/vqdmullbq_m_s32.c | 1 - .../arm/mve/intrinsics/vqdmullbq_n_s16.c | 1 - .../arm/mve/intrinsics/vqdmullbq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c | 1 - .../arm/mve/intrinsics/vqdmulltq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vqdmulltq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vqdmulltq_m_s16.c | 1 - .../arm/mve/intrinsics/vqdmulltq_m_s32.c | 1 - .../arm/mve/intrinsics/vqdmulltq_n_s16.c | 1 - .../arm/mve/intrinsics/vqdmulltq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovntq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovntq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovntq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovntq_u32.c | 1 - .../arm/mve/intrinsics/vqmovunbq_m_s16.c | 1 - .../arm/mve/intrinsics/vqmovunbq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c | 1 - .../arm/mve/intrinsics/vqmovuntq_m_s16.c | 1 - .../arm/mve/intrinsics/vqmovuntq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqnegq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqnegq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqnegq_s8.c | 1 - .../arm/mve/intrinsics/vqrdmladhq_m_s16.c | 1 - .../arm/mve/intrinsics/vqrdmladhq_m_s32.c | 1 - .../arm/mve/intrinsics/vqrdmladhq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c | 1 - .../arm/mve/intrinsics/vqrdmladhxq_m_s16.c | 1 - .../arm/mve/intrinsics/vqrdmladhxq_m_s32.c | 1 - .../arm/mve/intrinsics/vqrdmladhxq_m_s8.c | 1 - .../arm/mve/intrinsics/vqrdmladhxq_s16.c | 1 - .../arm/mve/intrinsics/vqrdmladhxq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c | 1 - .../arm/mve/intrinsics/vqrdmlahq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vqrdmlahq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vqrdmlahq_m_n_s8.c | 1 - .../arm/mve/intrinsics/vqrdmlahq_n_s16.c | 1 - .../arm/mve/intrinsics/vqrdmlahq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c | 1 - .../arm/mve/intrinsics/vqrdmlahq_n_u16.c | 1 - .../arm/mve/intrinsics/vqrdmlahq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u8.c | 1 - .../arm/mve/intrinsics/vqrdmlashq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vqrdmlashq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vqrdmlashq_m_n_s8.c | 1 - .../arm/mve/intrinsics/vqrdmlashq_n_s16.c | 1 - .../arm/mve/intrinsics/vqrdmlashq_n_s32.c | 1 - .../arm/mve/intrinsics/vqrdmlashq_n_s8.c | 1 - .../arm/mve/intrinsics/vqrdmlashq_n_u16.c | 1 - .../arm/mve/intrinsics/vqrdmlashq_n_u32.c | 1 - .../arm/mve/intrinsics/vqrdmlashq_n_u8.c | 1 - .../arm/mve/intrinsics/vqrdmlsdhq_m_s16.c | 1 - .../arm/mve/intrinsics/vqrdmlsdhq_m_s32.c | 1 - .../arm/mve/intrinsics/vqrdmlsdhq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c | 1 - .../arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c | 1 - .../arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c | 1 - .../arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c | 1 - .../arm/mve/intrinsics/vqrdmlsdhxq_s16.c | 1 - .../arm/mve/intrinsics/vqrdmlsdhxq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c | 1 - .../arm/mve/intrinsics/vqrdmulhq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vqrdmulhq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vqrdmulhq_m_n_s8.c | 1 - .../arm/mve/intrinsics/vqrdmulhq_m_s16.c | 1 - .../arm/mve/intrinsics/vqrdmulhq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c | 1 - .../arm/mve/intrinsics/vqrdmulhq_n_s16.c | 1 - .../arm/mve/intrinsics/vqrdmulhq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c | 1 - .../arm/mve/intrinsics/vqrshlq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vqrshlq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c | 1 - .../arm/mve/intrinsics/vqrshlq_m_n_u16.c | 1 - .../arm/mve/intrinsics/vqrshlq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqrshlq_u8.c | 1 - .../arm/mve/intrinsics/vqrshrnbq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vqrshrnbq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vqrshrnbq_m_n_u16.c | 1 - .../arm/mve/intrinsics/vqrshrnbq_m_n_u32.c | 1 - .../arm/mve/intrinsics/vqrshrnbq_n_s16.c | 1 - .../arm/mve/intrinsics/vqrshrnbq_n_s32.c | 1 - .../arm/mve/intrinsics/vqrshrnbq_n_u16.c | 1 - .../arm/mve/intrinsics/vqrshrnbq_n_u32.c | 1 - .../arm/mve/intrinsics/vqrshrntq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vqrshrntq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vqrshrntq_m_n_u16.c | 1 - .../arm/mve/intrinsics/vqrshrntq_m_n_u32.c | 1 - .../arm/mve/intrinsics/vqrshrntq_n_s16.c | 1 - .../arm/mve/intrinsics/vqrshrntq_n_s32.c | 1 - .../arm/mve/intrinsics/vqrshrntq_n_u16.c | 1 - .../arm/mve/intrinsics/vqrshrntq_n_u32.c | 1 - .../arm/mve/intrinsics/vqrshrunbq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vqrshrunbq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vqrshrunbq_n_s16.c | 1 - .../arm/mve/intrinsics/vqrshrunbq_n_s32.c | 1 - .../arm/mve/intrinsics/vqrshruntq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vqrshruntq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vqrshruntq_n_s16.c | 1 - .../arm/mve/intrinsics/vqrshruntq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshlq_u8.c | 1 - .../arm/mve/intrinsics/vqshluq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vqshluq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c | 1 - .../arm/mve/intrinsics/vqshrnbq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vqshrnbq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vqshrnbq_m_n_u16.c | 1 - .../arm/mve/intrinsics/vqshrnbq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c | 1 - .../arm/mve/intrinsics/vqshrntq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vqshrntq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vqshrntq_m_n_u16.c | 1 - .../arm/mve/intrinsics/vqshrntq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c | 1 - .../arm/mve/intrinsics/vqshrunbq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vqshrunbq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vqshrunbq_n_s16.c | 1 - .../arm/mve/intrinsics/vqshrunbq_n_s32.c | 1 - .../arm/mve/intrinsics/vqshruntq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vqshruntq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vqshruntq_n_s16.c | 1 - .../arm/mve/intrinsics/vqshruntq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vqsubq_u8.c | 1 - .../arm/mve/intrinsics/vreinterpretq_f16.c | 1 - .../arm/mve/intrinsics/vreinterpretq_f32.c | 1 - .../arm/mve/intrinsics/vreinterpretq_s16.c | 1 - .../arm/mve/intrinsics/vreinterpretq_s32.c | 1 - .../arm/mve/intrinsics/vreinterpretq_s64.c | 1 - .../arm/mve/intrinsics/vreinterpretq_s8.c | 1 - .../arm/mve/intrinsics/vreinterpretq_u16.c | 1 - .../arm/mve/intrinsics/vreinterpretq_u32.c | 1 - .../arm/mve/intrinsics/vreinterpretq_u64.c | 1 - .../arm/mve/intrinsics/vreinterpretq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev16q_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev16q_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev32q_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev32q_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev32q_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev32q_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev32q_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrhaddq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrhaddq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrhaddq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrhaddq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrhaddq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrhaddq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c | 1 - .../arm/mve/intrinsics/vrmlaldavhaq_p_s32.c | 1 - .../arm/mve/intrinsics/vrmlaldavhaq_p_u32.c | 1 - .../arm/mve/intrinsics/vrmlaldavhaq_s32.c | 1 - .../arm/mve/intrinsics/vrmlaldavhaq_u32.c | 1 - .../arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c | 1 - .../arm/mve/intrinsics/vrmlaldavhaxq_s32.c | 1 - .../arm/mve/intrinsics/vrmlaldavhq_p_s32.c | 1 - .../arm/mve/intrinsics/vrmlaldavhq_p_u32.c | 1 - .../arm/mve/intrinsics/vrmlaldavhq_s32.c | 1 - .../arm/mve/intrinsics/vrmlaldavhq_u32.c | 1 - .../arm/mve/intrinsics/vrmlaldavhxq_p_s32.c | 1 - .../arm/mve/intrinsics/vrmlaldavhxq_s32.c | 1 - .../arm/mve/intrinsics/vrmlsldavhaq_p_s32.c | 1 - .../arm/mve/intrinsics/vrmlsldavhaq_s32.c | 1 - .../arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c | 1 - .../arm/mve/intrinsics/vrmlsldavhaxq_s32.c | 1 - .../arm/mve/intrinsics/vrmlsldavhq_p_s32.c | 1 - .../arm/mve/intrinsics/vrmlsldavhq_s32.c | 1 - .../arm/mve/intrinsics/vrmlsldavhxq_p_s32.c | 1 - .../arm/mve/intrinsics/vrmlsldavhxq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrmulhq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrmulhq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrmulhq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrmulhq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrmulhq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrmulhq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndaq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndaq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndmq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndmq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndnq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndnq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndpq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndpq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndxq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndxq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c | 1 - .../arm/mve/intrinsics/vrshrnbq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vrshrnbq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vrshrnbq_m_n_u16.c | 1 - .../arm/mve/intrinsics/vrshrnbq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c | 1 - .../arm/mve/intrinsics/vrshrntq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vrshrntq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vrshrntq_m_n_u16.c | 1 - .../arm/mve/intrinsics/vrshrntq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsbciq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsbciq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsbcq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsbcq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c | 15 + .../gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c | 15 + .../gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c | 15 + .../gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c | 15 + .../gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c | 15 + .../gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c | 15 + .../gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c | 15 + .../gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c | 15 + .../gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c | 15 + .../gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c | 15 + .../gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vshlcq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlcq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlcq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlcq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlcq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlcq_u8.c | 1 - .../arm/mve/intrinsics/vshllbq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c | 1 - .../arm/mve/intrinsics/vshllbq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c | 1 - .../arm/mve/intrinsics/vshllbq_x_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c | 1 - .../arm/mve/intrinsics/vshllbq_x_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c | 1 - .../arm/mve/intrinsics/vshlltq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c | 1 - .../arm/mve/intrinsics/vshlltq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c | 1 - .../arm/mve/intrinsics/vshlltq_x_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c | 1 - .../arm/mve/intrinsics/vshlltq_x_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_r_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_r_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_r_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_r_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_r_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_r_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshlq_x_u8.c | 1 - .../arm/mve/intrinsics/vshrnbq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vshrnbq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vshrnbq_m_n_u16.c | 1 - .../arm/mve/intrinsics/vshrnbq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c | 1 - .../arm/mve/intrinsics/vshrntq_m_n_s16.c | 1 - .../arm/mve/intrinsics/vshrntq_m_n_s32.c | 1 - .../arm/mve/intrinsics/vshrntq_m_n_u16.c | 1 - .../arm/mve/intrinsics/vshrntq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsliq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsliq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsliq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsliq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsliq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsliq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsriq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsriq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsriq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsriq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsriq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsriq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vst1q_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vst1q_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vst1q_p_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vst1q_p_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vst1q_p_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vst1q_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vst1q_p_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vst1q_p_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vst1q_p_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vst1q_p_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vst1q_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vst1q_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vst1q_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vst1q_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vst1q_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vst1q_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vst2q_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vst2q_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vst2q_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vst2q_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vst2q_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vst2q_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vst2q_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vst2q_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vst4q_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vst4q_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vst4q_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vst4q_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vst4q_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vst4q_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vst4q_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vst4q_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrbq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrbq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrbq_s8.c | 1 - .../mve/intrinsics/vstrbq_scatter_offset_p_s16.c | 1 - .../mve/intrinsics/vstrbq_scatter_offset_p_s32.c | 1 - .../mve/intrinsics/vstrbq_scatter_offset_p_s8.c | 1 - .../mve/intrinsics/vstrbq_scatter_offset_p_u16.c | 1 - .../mve/intrinsics/vstrbq_scatter_offset_p_u32.c | 1 - .../mve/intrinsics/vstrbq_scatter_offset_p_u8.c | 1 - .../arm/mve/intrinsics/vstrbq_scatter_offset_s16.c | 1 - .../arm/mve/intrinsics/vstrbq_scatter_offset_s32.c | 1 - .../arm/mve/intrinsics/vstrbq_scatter_offset_s8.c | 1 - .../arm/mve/intrinsics/vstrbq_scatter_offset_u16.c | 1 - .../arm/mve/intrinsics/vstrbq_scatter_offset_u32.c | 1 - .../arm/mve/intrinsics/vstrbq_scatter_offset_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrbq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrbq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrbq_u8.c | 1 - .../arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c | 1 - .../arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c | 1 - .../arm/mve/intrinsics/vstrdq_scatter_base_s64.c | 1 - .../arm/mve/intrinsics/vstrdq_scatter_base_u64.c | 1 - .../mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c | 1 - .../mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c | 1 - .../mve/intrinsics/vstrdq_scatter_base_wb_s64.c | 1 - .../mve/intrinsics/vstrdq_scatter_base_wb_u64.c | 1 - .../mve/intrinsics/vstrdq_scatter_offset_p_s64.c | 1 - .../mve/intrinsics/vstrdq_scatter_offset_p_u64.c | 1 - .../arm/mve/intrinsics/vstrdq_scatter_offset_s64.c | 1 - .../arm/mve/intrinsics/vstrdq_scatter_offset_u64.c | 1 - .../vstrdq_scatter_shifted_offset_p_s64.c | 1 - .../vstrdq_scatter_shifted_offset_p_u64.c | 1 - .../intrinsics/vstrdq_scatter_shifted_offset_s64.c | 1 - .../intrinsics/vstrdq_scatter_shifted_offset_u64.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrhq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrhq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrhq_s32.c | 1 - .../arm/mve/intrinsics/vstrhq_scatter_offset_f16.c | 1 - .../mve/intrinsics/vstrhq_scatter_offset_p_f16.c | 1 - .../mve/intrinsics/vstrhq_scatter_offset_p_s16.c | 1 - .../mve/intrinsics/vstrhq_scatter_offset_p_s32.c | 1 - .../mve/intrinsics/vstrhq_scatter_offset_p_u16.c | 1 - .../mve/intrinsics/vstrhq_scatter_offset_p_u32.c | 1 - .../arm/mve/intrinsics/vstrhq_scatter_offset_s16.c | 1 - .../arm/mve/intrinsics/vstrhq_scatter_offset_s32.c | 1 - .../arm/mve/intrinsics/vstrhq_scatter_offset_u16.c | 1 - .../arm/mve/intrinsics/vstrhq_scatter_offset_u32.c | 1 - .../intrinsics/vstrhq_scatter_shifted_offset_f16.c | 1 - .../vstrhq_scatter_shifted_offset_p_f16.c | 1 - .../vstrhq_scatter_shifted_offset_p_s16.c | 1 - .../vstrhq_scatter_shifted_offset_p_s32.c | 1 - .../vstrhq_scatter_shifted_offset_p_u16.c | 1 - .../vstrhq_scatter_shifted_offset_p_u32.c | 1 - .../intrinsics/vstrhq_scatter_shifted_offset_s16.c | 1 - .../intrinsics/vstrhq_scatter_shifted_offset_s32.c | 1 - .../intrinsics/vstrhq_scatter_shifted_offset_u16.c | 1 - .../intrinsics/vstrhq_scatter_shifted_offset_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrhq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrhq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrwq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrwq_s32.c | 1 - .../arm/mve/intrinsics/vstrwq_scatter_base_f32.c | 1 - .../arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c | 1 - .../arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c | 1 - .../arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c | 1 - .../arm/mve/intrinsics/vstrwq_scatter_base_s32.c | 1 - .../arm/mve/intrinsics/vstrwq_scatter_base_u32.c | 1 - .../mve/intrinsics/vstrwq_scatter_base_wb_f32.c | 1 - .../mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c | 1 - .../mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c | 1 - .../mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c | 1 - .../mve/intrinsics/vstrwq_scatter_base_wb_s32.c | 1 - .../mve/intrinsics/vstrwq_scatter_base_wb_u32.c | 1 - .../arm/mve/intrinsics/vstrwq_scatter_offset_f32.c | 1 - .../mve/intrinsics/vstrwq_scatter_offset_p_f32.c | 1 - .../mve/intrinsics/vstrwq_scatter_offset_p_s32.c | 1 - .../mve/intrinsics/vstrwq_scatter_offset_p_u32.c | 1 - .../arm/mve/intrinsics/vstrwq_scatter_offset_s32.c | 1 - .../arm/mve/intrinsics/vstrwq_scatter_offset_u32.c | 1 - .../intrinsics/vstrwq_scatter_shifted_offset_f32.c | 1 - .../vstrwq_scatter_shifted_offset_p_f32.c | 1 - .../vstrwq_scatter_shifted_offset_p_s32.c | 1 - .../vstrwq_scatter_shifted_offset_p_u32.c | 1 - .../intrinsics/vstrwq_scatter_shifted_offset_s32.c | 1 - .../intrinsics/vstrwq_scatter_shifted_offset_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vstrwq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_m_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_s16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_s32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_s8.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_u16.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_u32.c | 1 - .../gcc.target/arm/mve/intrinsics/vsubq_x_u8.c | 1 - .../arm/mve/intrinsics/vuninitializedq_float.c | 1 - .../arm/mve/intrinsics/vuninitializedq_float1.c | 1 - .../arm/mve/intrinsics/vuninitializedq_int.c | 1 - .../arm/mve/intrinsics/vuninitializedq_int1.c | 1 - gcc/testsuite/gcc.target/arm/mve/mve.exp | 2 + gcc/testsuite/gcc.target/arm/vfp-1.c | 4 +- gcc/testsuite/gcc.target/arm/vfp-ldmdbd.c | 4 +- gcc/testsuite/gcc.target/arm/vfp-ldmiad.c | 4 +- gcc/testsuite/gcc.target/arm/vfp-stmdbd.c | 4 +- gcc/testsuite/gcc.target/arm/vfp-stmiad.c | 4 +- gcc/testsuite/gcc.target/arm/vnmul-1.c | 4 +- gcc/testsuite/gcc.target/arm/vnmul-3.c | 4 +- gcc/testsuite/gcc.target/arm/vnmul-4.c | 4 +- gcc/testsuite/gcc.target/i386/avx512f-pr94300.c | 21 + gcc/testsuite/gcc.target/i386/avx512f-pr94343.c | 12 + gcc/testsuite/gcc.target/i386/avx512vl-pr93069.c | 12 + gcc/testsuite/gcc.target/i386/avx512vl-pr94343.c | 12 + gcc/testsuite/gcc.target/i386/pr57193.c | 3 +- gcc/testsuite/gcc.target/i386/pr81213-2.c | 12 + gcc/testsuite/gcc.target/i386/pr81213.c | 12 +- gcc/testsuite/gcc.target/i386/pr94283.c | 5 + gcc/testsuite/gcc.target/i386/pr94308.c | 31 + gcc/testsuite/gcc.target/powerpc/bswap64-4.c | 6 +- gcc/testsuite/gcc.target/powerpc/pragma_misc9.c | 47 + gcc/testsuite/gcc.target/powerpc/pragma_power6.c | 17 + gcc/testsuite/gcc.target/powerpc/pragma_power7.c | 32 + gcc/testsuite/gcc.target/powerpc/pragma_power8.c | 52 + gcc/testsuite/gcc.target/powerpc/pragma_power9.c | 63 + .../gcc.target/powerpc/vsu/vec-all-nez-7.c | 3 +- .../gcc.target/powerpc/vsu/vec-any-eqz-7.c | 3 +- gcc/testsuite/gdc.dg/pr90136a.d | 21 + gcc/testsuite/gdc.dg/pr90136b.d | 21 + gcc/testsuite/gdc.dg/pr90136c.d | 9 + gcc/testsuite/gdc.dg/pr92216.d | 4 +- gcc/testsuite/gdc.dg/pr93038.d | 4 +- gcc/testsuite/gdc.dg/pr93038b.d | 5 +- gcc/testsuite/gdc.dg/pr94424.d | 19 + gcc/testsuite/gdc.test/compilable/compilable.exp | 30 + .../gdc.test/fail_compilation/fail_compilation.exp | 30 + gcc/testsuite/gdc.test/gdc-test.exp | 469 - gcc/testsuite/gdc.test/runnable/runnable.exp | 35 + .../gdc.test/{runnable => runnable_cxx}/cabi1.d | 0 .../{runnable => runnable_cxx}/cpp_abi_tests.d | 0 .../gdc.test/{runnable => runnable_cxx}/cppa.d | 0 .../{runnable => runnable_cxx}/externmangle.d | 0 .../{runnable => runnable_cxx}/externmangle2.d | 0 .../extra-files/cabi2.cpp | 0 .../extra-files/cpp_abi_tests.cpp | 0 .../extra-files/cppb.cpp | 0 .../extra-files/externmangle.cpp | 0 .../extra-files/externmangle2.cpp | 0 .../gdc.test/runnable_cxx/runnable_cxx.exp | 46 + gcc/testsuite/gfortran.dg/associate_51.f90 | 2 +- gcc/testsuite/gfortran.dg/associate_53.f90 | 71 + gcc/testsuite/gfortran.dg/assumed_rank_19.f90 | 37 + gcc/testsuite/gfortran.dg/bessel_5_redux.f90 | 85 + gcc/testsuite/gfortran.dg/dec_structure_28.f90 | 35 + gcc/testsuite/gfortran.dg/dtio_35.f90 | 50 + .../gfortran.dg/graphite/vect-pr94043.f90 | 18 + .../gfortran.dg/iso_c_binding_compiler_1.f90 | 3 + .../gfortran.dg/iso_c_binding_compiler_3.f90 | 3 + gcc/testsuite/gfortran.dg/module_procedure_3.f90 | 27 + gcc/testsuite/gfortran.dg/pr93484_1.f90 | 8 + gcc/testsuite/gfortran.dg/pr93484_2.f90 | 8 + gcc/testsuite/gfortran.dg/pr93498_1.f90 | 11 + gcc/testsuite/gfortran.dg/pr93498_2.f90 | 12 + gcc/testsuite/gfortran.dg/pr94030_1.f90 | 11 + gcc/testsuite/gfortran.dg/pr94030_2.f90 | 33 + gcc/testsuite/gfortran.dg/pr94285.f90 | 5 + gcc/testsuite/gfortran.dg/pr94329.f90 | 12 + gcc/testsuite/gfortran.dg/select_rank_4.f90 | 26 + .../gfortran.dg/unlimited_polymorphic_31.f03 | 3 + gcc/testsuite/gfortran.dg/vect/vect-8.f90 | 2 +- gcc/testsuite/jit.dg/all-non-failing-tests.h | 30 + gcc/testsuite/jit.dg/test-long-string-literal.c | 54 + gcc/testsuite/jit.dg/test-version.c | 26 + gcc/testsuite/lib/gdc-utils.exp | 475 + gcc/testsuite/lib/gdc.exp | 106 +- gcc/testsuite/lib/target-supports.exp | 69 +- gcc/tree-cfg.c | 3 + gcc/tree-if-conv.c | 24 +- gcc/tree-object-size.c | 5 +- gcc/tree-ssa-forwprop.c | 48 +- gcc/tree-ssa-loop-manip.c | 12 +- gcc/tree-ssa-loop-niter.c | 2 +- gcc/tree-ssa-math-opts.c | 6 +- gcc/tree-ssa-propagate.c | 19 +- gcc/tree-ssa-reassoc.c | 14 +- gcc/tree-ssa-sccvn.c | 2 + gcc/tree-ssa-strlen.c | 14 +- gcc/tree-vect-loop.c | 50 +- gcc/tree-vect-stmts.c | 210 +- gcc/tree.c | 46 +- gcc/var-tracking.c | 27 +- gcc/varasm.c | 20 + include/ChangeLog | 10 + include/plugin-api.h | 65 +- libcpp/po/ChangeLog | 4 + libcpp/po/sr.po | 78 +- libgcc/ChangeLog | 23 + libgcc/config/arm/lib1funcs.S | 33 +- libgcc/config/s390/tpf-unwind.h | 132 +- libgomp/ChangeLog | 18 + libgomp/target.c | 13 +- libgomp/testsuite/libgomp.c/target-link-1.c | 3 - .../libgomp.fortran/target-enter-data-1.f90 | 36 + .../libgomp.oacc-c-c++-common/pr85381-2.c | 20 +- .../libgomp.oacc-c-c++-common/pr85381-4.c | 5 +- libstdc++-v3/ChangeLog | 191 + libstdc++-v3/doc/html/manual/appendix_free.html | 2 +- libstdc++-v3/doc/xml/manual/appendix_free.xml | 2 +- libstdc++-v3/include/bits/fs_fwd.h | 42 - libstdc++-v3/include/bits/iterator_concepts.h | 50 + libstdc++-v3/include/bits/ptr_traits.h | 11 +- libstdc++-v3/include/bits/range_access.h | 27 +- libstdc++-v3/include/bits/range_cmp.h | 3 + libstdc++-v3/include/bits/stl_iterator.h | 276 +- .../include/bits/stl_iterator_base_types.h | 4 +- libstdc++-v3/include/std/chrono | 206 +- libstdc++-v3/include/std/concepts | 2 +- libstdc++-v3/include/std/condition_variable | 3 + libstdc++-v3/include/std/future | 3 + libstdc++-v3/include/std/mutex | 3 + libstdc++-v3/include/std/shared_mutex | 6 + libstdc++-v3/include/std/thread | 3 + libstdc++-v3/include/std/type_traits | 10 +- libstdc++-v3/include/std/version | 7 +- .../allocator_traits/members/92878_92947.cc | 51 + .../testsuite/20_util/any/assign/92878_92947.cc | 46 + .../testsuite/20_util/any/cons/92878_92947.cc | 46 + .../20_util/is_constructible/92878_92947.cc | 49 + .../testsuite/20_util/is_constructible/value-2.cc | 4 + .../20_util/optional/assignment/92878_92947.cc | 47 + .../testsuite/20_util/optional/cons/92878_92947.cc | 46 + .../testsuite/20_util/pair/cons/92878_92947.cc | 49 + .../20_util/shared_ptr/creation/92878_92947.cc | 46 + .../construct_at/92878_92947.cc | 50 + .../testsuite/20_util/time_point/cons/81468.cc | 8 +- .../time_point/requirements/duration_neg.cc | 32 + libstdc++-v3/testsuite/20_util/to_address/1_neg.cc | 2 +- libstdc++-v3/testsuite/20_util/to_address/debug.cc | 36 + .../20_util/unique_ptr/creation/92878_92947.cc | 46 + .../20_util/uses_allocator/92878_92947.cc | 67 + .../testsuite/20_util/variant/92878_92947.cc | 91 + .../deque/modifiers/emplace/92878_92947.cc | 62 + .../forward_list/modifiers/92878_92947.cc | 62 + .../list/modifiers/emplace/92878_92947.cc | 78 + .../map/modifiers/emplace/92878_92947.cc | 137 + .../multimap/modifiers/emplace/92878_92947.cc | 71 + .../multiset/modifiers/emplace/92878_92947.cc | 70 + .../23_containers/priority_queue/92878_92947.cc | 52 + .../testsuite/23_containers/queue/92878_92947.cc | 47 + .../set/modifiers/emplace/92878_92947.cc | 70 + .../testsuite/23_containers/stack/92878_92947.cc | 47 + .../unordered_map/modifiers/92878_92947.cc | 137 + .../unordered_multimap/modifiers/92878_92947.cc | 71 + .../unordered_multiset/modifiers/92878_92947.cc | 78 + .../unordered_set/modifiers/92878_92947.cc | 78 + .../vector/modifiers/emplace/92878_92947.cc | 61 + .../24_iterators/back_insert_iterator/constexpr.cc | 54 + .../front_insert_iterator/constexpr.cc | 54 + .../headers/iterator/synopsis_c++17.cc | 18 + .../24_iterators/insert_iterator/constexpr.cc | 57 + .../24_iterators/move_iterator/greedy_ops.cc | 8 +- .../24_iterators/move_iterator/input_iterator.cc | 42 + .../24_iterators/move_iterator/move_only.cc | 61 + .../24_iterators/move_iterator/rel_ops_c++20.cc | 163 + .../24_iterators/reverse_iterator/greedy_ops.cc | 8 +- .../24_iterators/reverse_iterator/rel_ops_c++20.cc | 193 + .../30_threads/condition_variable/members/2.cc | 2 + .../condition_variable/members/clock_neg.cc | 61 + .../condition_variable_any/members/clock_neg.cc | 61 + .../30_threads/future/members/clock_neg.cc | 59 + .../recursive_timed_mutex/try_lock_until/3.cc | 2 +- .../try_lock_until/clock_neg.cc | 57 + .../30_threads/shared_future/members/clock_neg.cc | 59 + .../30_threads/shared_lock/locking/clock_neg.cc | 59 + .../shared_timed_mutex/try_lock_until/1.cc | 87 + .../shared_timed_mutex/try_lock_until/2.cc | 74 + .../shared_timed_mutex/try_lock_until/clock_neg.cc | 57 + .../30_threads/timed_mutex/try_lock_until/3.cc | 2 +- .../30_threads/timed_mutex/try_lock_until/4.cc | 2 +- .../timed_mutex/try_lock_until/clock_neg.cc | 57 + .../30_threads/unique_lock/locking/clock_neg.cc | 59 + .../net/execution_context/use_service.cc | 6 +- .../std/ranges/headers/ranges/synopsis.cc | 6 + .../testsuite/std/time/clock/file/members.cc | 39 + .../testsuite/std/time/clock/file/overview.cc | 43 + libstdc++-v3/testsuite/std/time/syn_c++20.cc | 199 + libstdc++-v3/testsuite/std/time/traits/is_clock.cc | 141 + libstdc++-v3/testsuite/util/slow_clock.h | 3 + 2895 files changed, 195789 insertions(+), 141096 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/attr-copy.c create mode 100644 gcc/testsuite/c-c++-common/pr94385.c create mode 100644 gcc/testsuite/g++.dg/concepts/diagnostic5.C create mode 100644 gcc/testsuite/g++.dg/concepts/diagnostic7.C create mode 100644 gcc/testsuite/g++.dg/concepts/diagnostic8.C create mode 100644 gcc/testsuite/g++.dg/concepts/pr94252.C create mode 100644 gcc/testsuite/g++.dg/conversion/op7.C create mode 100644 gcc/testsuite/g++.dg/coroutines/torture/exceptions-test-01-n4849-a.C create mode 100644 gcc/testsuite/g++.dg/coroutines/torture/symmetric-transfer-00-basic.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/alias-decl1.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/alias-decl2.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/alias-decl3.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-nsdmi2.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/lambda-this4.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/pr81349.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-nonbool1.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-nonbool2.C create mode 100644 gcc/testsuite/g++.dg/debug/pr94272.C create mode 100644 gcc/testsuite/g++.dg/debug/pr94273.C create mode 100644 gcc/testsuite/g++.dg/debug/pr94281.C create mode 100644 gcc/testsuite/g++.dg/debug/pr94323.C create mode 100644 gcc/testsuite/g++.dg/ext/attr-access-2.C create mode 100644 gcc/testsuite/g++.dg/lookup/pr84733.C create mode 100644 gcc/testsuite/g++.dg/lookup/pr94257.C create mode 100644 gcc/testsuite/g++.dg/opt/pr94223.C create mode 100644 gcc/testsuite/g++.dg/other/pr94326.C create mode 100644 gcc/testsuite/g++.dg/other/pr94339.C create mode 100644 gcc/testsuite/g++.dg/template/dependent-name10.C create mode 100644 gcc/testsuite/g++.dg/template/dependent-name11.C create mode 100644 gcc/testsuite/g++.dg/template/dependent-name12.C create mode 100644 gcc/testsuite/g++.dg/template/dependent-name13.C create mode 100644 gcc/testsuite/g++.dg/template/dependent-name14.C create mode 100644 gcc/testsuite/g++.dg/template/dependent-name7.C create mode 100644 gcc/testsuite/g++.dg/template/dependent-name8.C create mode 100644 gcc/testsuite/g++.dg/template/dependent-name9.C create mode 100644 gcc/testsuite/g++.dg/template/dr1710-2.C create mode 100644 gcc/testsuite/g++.dg/template/dr1710.C create mode 100644 gcc/testsuite/g++.dg/template/dr1794.C create mode 100644 gcc/testsuite/g++.dg/template/dr314.C create mode 100644 gcc/testsuite/g++.dg/template/koenig11.C create mode 100644 gcc/testsuite/g++.dg/template/template-keyword2.C create mode 100644 gcc/testsuite/g++.dg/torture/pr94303.C create mode 100644 gcc/testsuite/g++.dg/tree-ssa/pr94403.C create mode 100644 gcc/testsuite/g++.dg/ubsan/pr91993.C create mode 100644 gcc/testsuite/g++.dg/warn/Wconversion-pr91993.C create mode 100644 gcc/testsuite/g++.dg/warn/Wduplicated-cond1.C create mode 100644 gcc/testsuite/g++.dg/warn/Wmismatched-tags-3.C create mode 100644 gcc/testsuite/g++.dg/warn/Wmismatched-tags-4.C create mode 100644 gcc/testsuite/g++.dg/warn/Wmismatched-tags-5.C create mode 100644 gcc/testsuite/g++.dg/warn/Wmismatched-tags-6.C create mode 100644 gcc/testsuite/g++.dg/warn/Wnoexcept2.C create mode 100644 gcc/testsuite/g++.dg/warn/Wredundant-tags-6.C create mode 100644 gcc/testsuite/g++.dg/warn/Wredundant-tags-7.C create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr94144.c create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr94238.c create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr94412.c create mode 100644 gcc/testsuite/gcc.dg/Walloca-larger-than-3.c create mode 100644 gcc/testsuite/gcc.dg/Walloca-larger-than-3.h create mode 100644 gcc/testsuite/gcc.dg/Wvla-larger-than-4.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/compound-assignment-1.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/compound-assignment-2.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/compound-assignment-3.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/malloc-5.c create mode 100644 gcc/testsuite/gcc.dg/lto/pr94271_0.c create mode 100644 gcc/testsuite/gcc.dg/lto/pr94271_1.c create mode 100644 gcc/testsuite/gcc.dg/pr84131.c create mode 100644 gcc/testsuite/gcc.dg/pr93573-1.c create mode 100644 gcc/testsuite/gcc.dg/pr93573-2.c create mode 100644 gcc/testsuite/gcc.dg/pr94269.c create mode 100644 gcc/testsuite/gcc.dg/pr94277.c create mode 100644 gcc/testsuite/gcc.dg/pr94283.c create mode 100644 gcc/testsuite/gcc.dg/pr94286.c create mode 100644 gcc/testsuite/gcc.dg/pr94292.c create mode 100644 gcc/testsuite/gcc.dg/pr94344.c create mode 100644 gcc/testsuite/gcc.dg/pr94368.c create mode 100644 gcc/testsuite/gcc.dg/pr94436.c create mode 100644 gcc/testsuite/gcc.dg/sms-compare-debug-1.c create mode 100644 gcc/testsuite/gcc.dg/sms-compare-debug-2.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr94392.c create mode 100644 gcc/testsuite/gcc.dg/ubsan/pr94423.c create mode 100644 gcc/testsuite/gcc.dg/vect/pr93069.c create mode 100644 gcc/testsuite/gcc.dg/vect/pr94443.c create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_11.c create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_12.c create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_13.c create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_14.c create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_15.c create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_17.c create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_18.c create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_19.c create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_20.c create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_21.c create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_22.c create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_23.c create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_24.c create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_25.c create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_26.c create mode 100644 gcc/testsuite/gcc.target/aarch64/pr94398.c create mode 100644 gcc/testsuite/gcc.target/aarch64/pr94435.c create mode 100644 gcc/testsuite/gcc.target/arm/cmp-3.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-pr94300.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-pr94343.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512vl-pr93069.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512vl-pr94343.c create mode 100644 gcc/testsuite/gcc.target/i386/pr81213-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr94283.c create mode 100644 gcc/testsuite/gcc.target/i386/pr94308.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_misc9.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_power6.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_power7.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_power8.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_power9.c create mode 100644 gcc/testsuite/gdc.dg/pr90136a.d create mode 100644 gcc/testsuite/gdc.dg/pr90136b.d create mode 100644 gcc/testsuite/gdc.dg/pr90136c.d create mode 100644 gcc/testsuite/gdc.dg/pr94424.d create mode 100644 gcc/testsuite/gdc.test/compilable/compilable.exp create mode 100644 gcc/testsuite/gdc.test/fail_compilation/fail_compilation.exp delete mode 100644 gcc/testsuite/gdc.test/gdc-test.exp create mode 100644 gcc/testsuite/gdc.test/runnable/runnable.exp rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/cabi1.d (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/cpp_abi_tests.d (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/cppa.d (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/externmangle.d (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/externmangle2.d (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/cabi2.cpp (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/cpp_abi_tests [...] rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/cppb.cpp (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/externmangle. [...] rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/externmangle2 [...] create mode 100644 gcc/testsuite/gdc.test/runnable_cxx/runnable_cxx.exp create mode 100644 gcc/testsuite/gfortran.dg/associate_53.f90 create mode 100644 gcc/testsuite/gfortran.dg/assumed_rank_19.f90 create mode 100644 gcc/testsuite/gfortran.dg/bessel_5_redux.f90 create mode 100644 gcc/testsuite/gfortran.dg/dec_structure_28.f90 create mode 100644 gcc/testsuite/gfortran.dg/dtio_35.f90 create mode 100644 gcc/testsuite/gfortran.dg/graphite/vect-pr94043.f90 create mode 100644 gcc/testsuite/gfortran.dg/module_procedure_3.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr93484_1.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr93484_2.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr93498_1.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr93498_2.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr94030_1.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr94030_2.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr94285.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr94329.f90 create mode 100644 gcc/testsuite/gfortran.dg/select_rank_4.f90 create mode 100644 gcc/testsuite/jit.dg/test-long-string-literal.c create mode 100644 gcc/testsuite/jit.dg/test-version.c create mode 100644 gcc/testsuite/lib/gdc-utils.exp create mode 100644 libgomp/testsuite/libgomp.fortran/target-enter-data-1.f90 create mode 100644 libstdc++-v3/testsuite/20_util/allocator_traits/members/92878_92947.cc create mode 100644 libstdc++-v3/testsuite/20_util/any/assign/92878_92947.cc create mode 100644 libstdc++-v3/testsuite/20_util/any/cons/92878_92947.cc create mode 100644 libstdc++-v3/testsuite/20_util/is_constructible/92878_92947.cc create mode 100644 libstdc++-v3/testsuite/20_util/optional/assignment/92878_92947.cc create mode 100644 libstdc++-v3/testsuite/20_util/optional/cons/92878_92947.cc create mode 100644 libstdc++-v3/testsuite/20_util/pair/cons/92878_92947.cc create mode 100644 libstdc++-v3/testsuite/20_util/shared_ptr/creation/92878_92947.cc create mode 100644 libstdc++-v3/testsuite/20_util/specialized_algorithms/construct [...] create mode 100644 libstdc++-v3/testsuite/20_util/time_point/requirements/duration_neg.cc create mode 100644 libstdc++-v3/testsuite/20_util/to_address/debug.cc create mode 100644 libstdc++-v3/testsuite/20_util/unique_ptr/creation/92878_92947.cc create mode 100644 libstdc++-v3/testsuite/20_util/uses_allocator/92878_92947.cc create mode 100644 libstdc++-v3/testsuite/20_util/variant/92878_92947.cc create mode 100644 libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/92 [...] create mode 100644 libstdc++-v3/testsuite/23_containers/forward_list/modifiers/928 [...] create mode 100644 libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/928 [...] create mode 100644 libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/9287 [...] create mode 100644 libstdc++-v3/testsuite/23_containers/multimap/modifiers/emplace [...] create mode 100644 libstdc++-v3/testsuite/23_containers/multiset/modifiers/emplace [...] create mode 100644 libstdc++-v3/testsuite/23_containers/priority_queue/92878_92947.cc create mode 100644 libstdc++-v3/testsuite/23_containers/queue/92878_92947.cc create mode 100644 libstdc++-v3/testsuite/23_containers/set/modifiers/emplace/9287 [...] create mode 100644 libstdc++-v3/testsuite/23_containers/stack/92878_92947.cc create mode 100644 libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/92 [...] create mode 100644 libstdc++-v3/testsuite/23_containers/unordered_multimap/modifie [...] create mode 100644 libstdc++-v3/testsuite/23_containers/unordered_multiset/modifie [...] create mode 100644 libstdc++-v3/testsuite/23_containers/unordered_set/modifiers/92 [...] create mode 100644 libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/9 [...] create mode 100644 libstdc++-v3/testsuite/24_iterators/back_insert_iterator/constexpr.cc create mode 100644 libstdc++-v3/testsuite/24_iterators/front_insert_iterator/constexpr.cc create mode 100644 libstdc++-v3/testsuite/24_iterators/insert_iterator/constexpr.cc create mode 100644 libstdc++-v3/testsuite/24_iterators/move_iterator/input_iterator.cc create mode 100644 libstdc++-v3/testsuite/24_iterators/move_iterator/move_only.cc create mode 100644 libstdc++-v3/testsuite/24_iterators/move_iterator/rel_ops_c++20.cc create mode 100644 libstdc++-v3/testsuite/24_iterators/reverse_iterator/rel_ops_c++20.cc create mode 100644 libstdc++-v3/testsuite/30_threads/condition_variable/members/cl [...] create mode 100644 libstdc++-v3/testsuite/30_threads/condition_variable_any/member [...] create mode 100644 libstdc++-v3/testsuite/30_threads/future/members/clock_neg.cc create mode 100644 libstdc++-v3/testsuite/30_threads/recursive_timed_mutex/try_loc [...] create mode 100644 libstdc++-v3/testsuite/30_threads/shared_future/members/clock_neg.cc create mode 100644 libstdc++-v3/testsuite/30_threads/shared_lock/locking/clock_neg.cc create mode 100644 libstdc++-v3/testsuite/30_threads/shared_timed_mutex/try_lock_u [...] create mode 100644 libstdc++-v3/testsuite/30_threads/shared_timed_mutex/try_lock_u [...] create mode 100644 libstdc++-v3/testsuite/30_threads/shared_timed_mutex/try_lock_u [...] create mode 100644 libstdc++-v3/testsuite/30_threads/timed_mutex/try_lock_until/cl [...] create mode 100644 libstdc++-v3/testsuite/30_threads/unique_lock/locking/clock_neg.cc create mode 100644 libstdc++-v3/testsuite/std/time/clock/file/members.cc create mode 100644 libstdc++-v3/testsuite/std/time/clock/file/overview.cc create mode 100644 libstdc++-v3/testsuite/std/time/syn_c++20.cc create mode 100644 libstdc++-v3/testsuite/std/time/traits/is_clock.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap_O3 updated (8bd2b42f -> 420a5c24)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap_O3 in repository toolchain/ci/base-artifacts. discards 8bd2b42f 0: update: gcc-4dcc4502f316a7320fe72b62c60af12c77e1c96c: 1 new 420a5c24 0: update: gcc-51ecad3c0327418c6e20ef47c6c5a8015bb99b2c: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (8bd2b42f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-master-aarch64-b [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 118 +- 02-prepare_abe/console.log | 432 +- 03-build_abe-bootstrap_O3/console.log | 71408 ++++++++++++++--------------- 05-check_regression/console.log | 26 +- 05-check_regression/results.regressions | 8 - 06-update_baseline/console.log | 80 +- 06-update_baseline/results.regressions | 9 - console.log | 72024 +++++++++++++++--------------- jenkins/manifest.sh | 10 +- 9 files changed, 72126 insertions(+), 71989 deletions(-) delete mode 100644 05-check_regression/results.regressions delete mode 100644 06-update_baseline/results.regressions -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

[gcc] branch releases/gcc-9 updated (a1bb16994ca -> 70ae6169224)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch releases/gcc-9 in repository gcc. from a1bb16994ca gcc-9 sra: Cap number of sub-access propagations with a par [...] new 70ae6169224 c++: alias template and parameter packs (PR91966). The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/cp/ChangeLog | 6 ++ gcc/cp/pt.c | 31 +++++++- gcc/testsuite/g++.dg/cpp0x/variadic-alias2.C | 103 +++++++++++++++++++++++++++ 3 files changed, 139 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/variadic-alias2.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 7 months

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits April 2020