Tcwg-commits April 2020

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[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk_tx1/gnu-master-aarch64-spec2k6-O2-vs-O2_LTO updated (083d644d42 -> f9ac84f92f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/gnu-master-aarch64-spec2k6-O2-vs-O2_LTO in repository toolchain/ci/glibc. from 083d644d42 test-container: print errno when execvp fails adds b7176cc2af ldconfig: trace origin paths with -v adds 2de7fe6253 parse_tunables: Fix typo in comment adds dcf46d3fe5 nscd: add cache dumper adds 4315f45c93 manual: Fix inconsistent declaration of wcsrchr [BZ #24655] adds 28b4928b1b Fix nscd/cachedumper.c compile errors adds cbd1569904 nscd/cachedumper.c : fix whitespace adds 49348beafe Fix build with GCC 10 when long double = double. adds 1fabdb9908 x86: Remove ARCH_CET_LEGACY_BITMAP [BZ #25397] adds 649fdf039b oc_FR locale: Fix spelling of Thursday (bug 25639) adds 4bad2e014e m68k: Remove mathinline.h adds a2ce37b564 math: Remove mathinline adds a8ce822234 Remove __LIBC_INTERNAL_MATH_INLINES adds 1c15464ca0 math: Remove inline math tests adds 39a05214fe Add NEWS entry for CVE-2020-1752 (bug 25414) adds 3cc4a8367c stdio: Remove memory leak from multibyte convertion [BZ#25691] adds 910a835dc9 stdio: Add tests for printf multibyte convertion leak [BZ#25691] adds b8de7980c0 Extended Char Intro: Use getwc in example (Bug 25626) adds 0334369949 y2038: fix: Add missing libc_hidden_def attribute for some s [...] adds f09542c584 posix: Fix system error return value [BZ #25715] adds 07d16a6deb Add NEWS entry for CVE-2020-1751 (bug 25423) adds 5fce0e095b support/shell-container.c: Return 127 if execve fails adds 5a5a3a3234 support/shell-container.c: Add builtin exit adds 1c17100c43 support/shell-container.c: Add builtin kill adds 4eda036f5b stdlib: Move tst-system to tests-container adds 45ae17dd7e ldbl-128ibm-compat: PLT redirects for using ldbl redirects i [...] adds d0d1811fb9 Fix tests which expose ldbl -> _Float128 redirects adds 076d06e849 powerpc64le: Ensure correct ldouble compiler flags are used adds 3618e5fece Makeconfig: sandwich gnulib-tests between libc/ld linking of tests adds 39517c008f powerpc64le: add -mno-gnu-attribute to *f128 objects and difftime adds 57651ee4c8 powerpc64: apply -mabi=ibmlongdouble to special files adds e8a0f5831e ARC: add definitions to elf/elf.h adds 4da2597af5 sysv/linux: Rename alpha functions to be alpha specific adds d1876749a8 time: Add a timeval with a 32-bit tv_sec and tv_usec adds 933dc0e570 time: Add a __itimerval64 struct adds 642d5abaf1 Add benchtests for roundeven and roundevenf. adds a1a486d70e Add Safe-Linking to fastbins and tcache adds e095db0bc6 hurd: Make O_TRUNC update mtime/ctime adds 5f34491510 math: Remove fenvinline.h adds 4a30b6109c x86: Remove feraiseexcept optimization adds ec07242c45 sparc: Move __fenv_{ld,st}fsr to fenv-private.h adds 1a044511a3 Fix data race in setting function descriptors during lazy bi [...] adds 66807aebad powerpc: Add support for fmaf128() in hardware adds acdcca7294 Add new file missed in previous hppa commit. adds 6b89dbc3ca Use Linux 5.6 and GMP 6.2.0 in build-many-glibcs.py. adds 768358b6a8 Typo fixes and CR cleanup in Safe-Linking adds 49c3c37651 Fix alignment bug in Safe-Linking adds a9d42c09a3 math: Add inputs that yield larger errors for float type (x86_64) adds 1c634e677f sysv: Define __KERNEL_OLD_TIMEVAL_MATCHES_TIMEVAL64 adds a51e035889 linux: Use long time_t __getitimer/__setitimer adds 5d24ba82c4 resource: Add a __rusage64 struct adds 600f00b747 linux: Use long time_t for wait4/getrusage adds 0bcd0c5100 sysv/alpha: Use generic __timeval32 and helpers adds 1c50d23a20 S390: Regenerate ULPs. adds 6310d570bf Add tests for Safe-Linking adds 0bdca3bd94 aarch64: update bits/hwcap.h adds 17fd707f88 nptl: Remove x86_64 cancellation assembly implementations [B [...] adds cea56af185 support: Change xgetline to return 0 on EOF adds 4c6e0415ef elf: Simplify handling of lists of audit strings adds 8f7a75d700 elf: Implement DT_AUDIT, DT_DEPAUDIT support [BZ #24943] adds e788beaf09 Update syscall lists for Linux 5.6. adds f9ac84f92f Add IPPROTO_ETHERNET and IPPROTO_MPTCP from Linux 5.6 to net [...] No new revisions were added by this update. Summary of changes: Makeconfig | 12 +- NEWS | 11 +- benchtests/Makefile | 6 +- benchtests/{trunc-inputs => roundeven-inputs} | 0 benchtests/{truncf-inputs => roundevenf-inputs} | 0 bits/fenvinline.h | 8 - bits/mathinline.h | 12 - bits/typesizes.h | 6 + elf/Makefile | 22 +- elf/dl-tunables.c | 2 +- elf/elf.h | 70 +- elf/ldconfig.c | 30 +- elf/rtld.c | 246 +- elf/tst-addr1.c | 11 + support/xgetline.c => elf/tst-audit14.c | 37 +- elf/tst-audit15.c | 50 + elf/tst-audit16.c | 54 + stdlib/tst-system.c => elf/tst-auditlogmod-1.c | 19 +- stdlib/tst-system.c => elf/tst-auditlogmod-2.c | 19 +- stdlib/tst-system.c => elf/tst-auditlogmod-3.c | 19 +- hurd/lookup-retry.c | 13 +- include/err.h | 12 +- include/libc-symbols.h | 2 + include/stdio.h | 52 +- include/sys/cdefs.h | 20 + include/sys/resource.h | 121 + include/sys/syslog.h | 2 +- include/time.h | 67 + include/wchar.h | 2 +- inet/netinet/in.h | 4 + localedata/locales/oc_FR | 2 +- malloc/Makefile | 1 + malloc/malloc.c | 79 +- malloc/tst-safe-linking.c | 179 + manual/charset.texi | 2 +- manual/string.texi | 2 +- math/Makefile | 164 +- math/README.libm-test | 33 +- math/auto-libm-test-in | 148 +- math/auto-libm-test-out-acosh | 826 +- math/auto-libm-test-out-asinh | 301 +- math/auto-libm-test-out-atanh | 1590 ++-- math/auto-libm-test-out-cos | 25 + math/auto-libm-test-out-cosh | 2269 ++--- math/auto-libm-test-out-erfc | 25 + math/auto-libm-test-out-exp | 25 + math/auto-libm-test-out-exp10 | 25 + math/auto-libm-test-out-hypot | 9442 ++++++++++---------- math/auto-libm-test-out-j0 | 25 + math/auto-libm-test-out-j1 | 25 + math/auto-libm-test-out-lgamma | 25 + math/auto-libm-test-out-sin | 25 + math/auto-libm-test-out-sinh | 1260 +-- math/auto-libm-test-out-tgamma | 25 + math/auto-libm-test-out-y0 | 25 + math/fenv.h | 4 - math/gen-auto-libm-tests.c | 8 +- math/gen-libm-test.py | 5 +- math/libm-test-asinh.inc | 4 +- math/libm-test-atanh.inc | 4 +- math/libm-test-cosh.inc | 4 +- math/libm-test-driver.c | 7 - math/libm-test-exp.inc | 4 +- math/libm-test-expm1.inc | 4 +- math/libm-test-hypot.inc | 32 +- math/libm-test-pow.inc | 118 +- math/libm-test-sinh.inc | 4 +- math/libm-test-support.c | 8 +- math/libm-test-support.h | 2 - math/libm-test-tanh.inc | 4 +- math/math.h | 6 - math/test-double-vlen2.h | 1 - math/test-double-vlen4.h | 1 - math/test-double-vlen8.h | 1 - math/test-double.h | 1 - math/test-fenvinline.c | 354 - math/test-float-vlen16.h | 1 - math/test-float-vlen4.h | 1 - math/test-float-vlen8.h | 1 - math/test-float.h | 1 - math/test-float128.h | 2 - math/test-float32.h | 1 - math/test-float32x.h | 1 - math/test-float64.h | 1 - math/test-float64x.h | 2 - math/test-ldouble.h | 3 - math/test-math-inline.h | 26 - math/test-signgam-main.c | 1 - nscd/Makefile | 2 +- nscd/cachedumper.c | 375 + nscd/nscd.c | 13 + nscd/nscd.h | 2 + scripts/build-many-glibcs.py | 4 +- stdio-common/Makefile | 9 +- stdio-common/tst-printf-bz25691.c | 108 + stdio-common/tst-vfprintf-user-type.c | 4 + stdio-common/vfprintf-internal.c | 324 +- stdlib/Makefile | 3 +- stdlib/tst-system.c | 124 +- support/shell-container.c | 40 +- support/support_process_state.c | 2 +- support/xgetline.c | 22 +- support/xstdio.h | 5 +- sysdeps/aarch64/libm-test-ulps | 840 -- sysdeps/alpha/fpu/libm-test-ulps | 837 -- sysdeps/arm/libm-test-ulps | 552 -- sysdeps/csky/fpu/libm-test-ulps | 536 -- sysdeps/csky/nofpu/libm-test-ulps | 554 -- sysdeps/hppa/dl-fptr.c | 26 +- sysdeps/hppa/dl-machine.h | 36 +- sysdeps/hppa/dl-runtime.c | 58 + sysdeps/hppa/dl-trampoline.S | 74 +- sysdeps/hppa/fpu/libm-test-ulps | 586 -- sysdeps/i386/fpu/libm-test-ulps | 1095 --- sysdeps/i386/i686/fpu/multiarch/libm-test-ulps | 1121 +-- sysdeps/ia64/fpu/libm-test-ulps | 911 -- sysdeps/ieee754/ldbl-128ibm-compat/Makefile | 15 - .../ieee754/ldbl-128ibm-compat/ieee128-asprintf.c | 5 +- .../ieee754/ldbl-128ibm-compat/ieee128-dprintf.c | 1 + sysdeps/ieee754/ldbl-128ibm-compat/ieee128-err.c | 7 + .../ieee754/ldbl-128ibm-compat/ieee128-fprintf.c | 1 + .../ldbl-128ibm-compat/ieee128-isoc99_sscanf.c | 1 + .../ldbl-128ibm-compat/ieee128-isoc99_vfscanf.c | 2 + .../ldbl-128ibm-compat/ieee128-isoc99_vsscanf.c | 1 + .../ieee754/ldbl-128ibm-compat/ieee128-sprintf.c | 1 + .../ieee754/ldbl-128ibm-compat/ieee128-syslog.c | 1 + .../ieee754/ldbl-128ibm-compat/ieee128-vfprintf.c | 1 + .../ieee754/ldbl-128ibm/include/bits/iscanonical.h | 2 +- sysdeps/m68k/coldfire/fpu/libm-test-ulps | 68 - sysdeps/m68k/m680x0/fpu/bits/mathinline.h | 378 - sysdeps/m68k/m680x0/fpu/libm-test-ulps | 584 -- sysdeps/m68k/m680x0/fpu/mathimpl.h | 224 + sysdeps/m68k/m680x0/fpu/s_atan_template.c | 1 + sysdeps/m68k/m680x0/fpu/s_ceil_template.c | 1 + sysdeps/m68k/m680x0/fpu/s_fabs_template.c | 1 + sysdeps/m68k/m680x0/fpu/s_floor_template.c | 1 + sysdeps/m68k/m680x0/fpu/s_isinf.c | 1 + sysdeps/m68k/m680x0/fpu/s_log1p.c | 1 + sysdeps/m68k/m680x0/fpu/s_lrint_template.c | 1 + sysdeps/m68k/m680x0/fpu/s_nearbyint_template.c | 1 + sysdeps/m68k/m680x0/fpu/s_rint_template.c | 1 + sysdeps/m68k/m680x0/fpu/s_scalbn.c | 2 + sysdeps/m68k/m680x0/fpu/s_sincos_template.c | 1 + sysdeps/m68k/m680x0/fpu/s_tanh_template.c | 1 + sysdeps/m68k/m680x0/fpu/s_trunc_template.c | 1 + sysdeps/microblaze/libm-test-ulps | 124 - sysdeps/mips/mips32/libm-test-ulps | 552 -- sysdeps/mips/mips64/libm-test-ulps | 837 -- sysdeps/nios2/libm-test-ulps | 128 - sysdeps/posix/system.c | 18 +- sysdeps/powerpc/bits/fenvinline.h | 108 - sysdeps/powerpc/fpu/fegetround.c | 8 +- sysdeps/powerpc/fpu/fraiseexcpt.c | 1 - sysdeps/powerpc/fpu/libm-test-ulps | 1135 --- sysdeps/powerpc/nofpu/fraiseexcpt.c | 1 - sysdeps/powerpc/nofpu/libm-test-ulps | 862 -- sysdeps/powerpc/powerpc64/Makefile | 6 + sysdeps/powerpc/powerpc64/le/Makefile | 98 +- .../powerpc/powerpc64/le/fpu/multiarch/Makefile | 10 +- .../powerpc64/le/fpu/multiarch/s_fmaf128-power9.c | 20 +- .../powerpc64/le/fpu/multiarch/s_fmaf128-ppc64.c | 15 +- .../powerpc/powerpc64/le/fpu/multiarch/s_fmaf128.c | 39 +- .../powerpc/powerpc64/le/power9/fpu/s_fmaf128.c | 36 + sysdeps/powerpc/powerpc64/power7/Makefile | 6 +- sysdeps/riscv/nofpu/libm-test-ulps | 813 -- sysdeps/riscv/rv64/rvd/libm-test-ulps | 822 -- sysdeps/s390/fpu/libm-test-ulps | 851 +- sysdeps/sh/libm-test-ulps | 265 - sysdeps/sparc/fpu/bits/fenv.h | 9 - sysdeps/sparc/fpu/fclrexcpt.c | 1 + sysdeps/sparc/fpu/fedisblxcpt.c | 1 + sysdeps/sparc/fpu/feenablxcpt.c | 1 + sysdeps/sparc/fpu/fegetenv.c | 1 + sysdeps/sparc/fpu/fegetexcept.c | 1 + sysdeps/sparc/fpu/fegetmode.c | 1 + sysdeps/sparc/fpu/fegetround.c | 1 + sysdeps/sparc/fpu/feholdexcpt.c | 1 + sysdeps/sparc/fpu/fenv_private.h | 9 + sysdeps/sparc/fpu/fesetenv.c | 1 + sysdeps/sparc/fpu/fesetexcept.c | 1 + sysdeps/sparc/fpu/fesetmode.c | 1 + sysdeps/sparc/fpu/fesetround.c | 1 + sysdeps/sparc/fpu/feupdateenv.c | 1 + sysdeps/sparc/fpu/fgetexcptflg.c | 1 + sysdeps/sparc/fpu/fsetexcptflg.c | 1 + sysdeps/sparc/fpu/ftestexcept.c | 1 + sysdeps/sparc/fpu/libm-test-ulps | 837 -- sysdeps/unix/syscalls.list | 3 - sysdeps/unix/sysv/linux/aarch64/arch-syscall.h | 2 + sysdeps/unix/sysv/linux/aarch64/bits/hwcap.h | 18 + sysdeps/unix/sysv/linux/alpha/arch-syscall.h | 2 + sysdeps/unix/sysv/linux/alpha/bits/typesizes.h | 3 + sysdeps/unix/sysv/linux/alpha/osf_adjtime.c | 7 +- sysdeps/unix/sysv/linux/alpha/osf_getitimer.c | 3 +- sysdeps/unix/sysv/linux/alpha/osf_getrusage.c | 8 +- sysdeps/unix/sysv/linux/alpha/osf_gettimeofday.c | 4 +- sysdeps/unix/sysv/linux/alpha/osf_setitimer.c | 5 +- sysdeps/unix/sysv/linux/alpha/osf_settimeofday.c | 4 +- sysdeps/unix/sysv/linux/alpha/osf_utimes.c | 4 +- sysdeps/unix/sysv/linux/alpha/osf_wait4.c | 8 +- sysdeps/unix/sysv/linux/arm/arch-syscall.h | 2 + sysdeps/unix/sysv/linux/clock_getres.c | 2 + sysdeps/unix/sysv/linux/clock_gettime.c | 2 + sysdeps/unix/sysv/linux/clock_nanosleep.c | 2 + sysdeps/unix/sysv/linux/clock_settime.c | 2 + sysdeps/unix/sysv/linux/csky/arch-syscall.h | 5 + sysdeps/unix/sysv/linux/generic/bits/typesizes.h | 6 + sysdeps/unix/sysv/linux/getitimer.c | 61 + .../linux/{alpha/osf_getrusage.c => getrusage.c} | 41 +- sysdeps/unix/sysv/linux/hppa/arch-syscall.h | 2 + sysdeps/unix/sysv/linux/hppa/atomic-machine.h | 28 + sysdeps/unix/sysv/linux/i386/arch-syscall.h | 2 + sysdeps/unix/sysv/linux/ia64/arch-syscall.h | 2 + sysdeps/unix/sysv/linux/m68k/arch-syscall.h | 3 + sysdeps/unix/sysv/linux/microblaze/arch-syscall.h | 2 + sysdeps/unix/sysv/linux/mips/mips32/arch-syscall.h | 2 + .../unix/sysv/linux/mips/mips64/n32/arch-syscall.h | 2 + .../unix/sysv/linux/mips/mips64/n64/arch-syscall.h | 2 + sysdeps/unix/sysv/linux/nios2/arch-syscall.h | 2 + .../sysv/linux/powerpc/powerpc32/arch-syscall.h | 2 + .../sysv/linux/powerpc/powerpc64/arch-syscall.h | 2 + sysdeps/unix/sysv/linux/ppoll.c | 2 + sysdeps/unix/sysv/linux/riscv/rv64/arch-syscall.h | 2 + sysdeps/unix/sysv/linux/s390/bits/typesizes.h | 6 + .../unix/sysv/linux/s390/s390-32/arch-syscall.h | 2 + .../unix/sysv/linux/s390/s390-64/arch-syscall.h | 2 + sysdeps/unix/sysv/linux/setitimer.c | 90 + sysdeps/unix/sysv/linux/sh/arch-syscall.h | 2 + sysdeps/unix/sysv/linux/sparc/bits/typesizes.h | 6 + .../unix/sysv/linux/sparc/sparc32/arch-syscall.h | 2 + .../unix/sysv/linux/sparc/sparc64/arch-syscall.h | 2 + sysdeps/unix/sysv/linux/syscall-names.list | 6 +- sysdeps/unix/sysv/linux/{alpha => }/tv32-compat.h | 92 +- sysdeps/unix/sysv/linux/wait4.c | 50 +- sysdeps/unix/sysv/linux/x86/bits/typesizes.h | 5 + sysdeps/unix/sysv/linux/x86/dl-cet.h | 20 - sysdeps/unix/sysv/linux/x86/include/asm/prctl.h | 5 - sysdeps/unix/sysv/linux/x86_64/64/arch-syscall.h | 2 + sysdeps/unix/sysv/linux/x86_64/cancellation.S | 104 - sysdeps/unix/sysv/linux/x86_64/libc-cancellation.S | 21 - .../unix/sysv/linux/x86_64/librt-cancellation.S | 21 - sysdeps/unix/sysv/linux/x86_64/x32/arch-syscall.h | 2 + sysdeps/x86/Makefile | 9 +- sysdeps/x86/dl-cet.c | 217 +- sysdeps/x86/dl-procruntime.c | 11 - sysdeps/x86/fpu/bits/fenv.h | 54 - sysdeps/x86/fpu/include/bits/fenv.h | 57 - sysdeps/x86/tst-cet-legacy-4.c | 19 +- sysdeps/x86/tst-cet-legacy-5.c | 3 +- sysdeps/x86/tst-cet-legacy-6.c | 3 +- .../xgetline.c => sysdeps/x86/tst-cet-legacy-7.c | 31 +- .../x86/{tst-cet-legacy-4.c => tst-cet-legacy-8.c} | 54 +- sysdeps/x86_64/fpu/libm-test-ulps | 1204 +-- sysdeps/x86_64/nptl/tcb-offsets.sym | 7 - 254 files changed, 11525 insertions(+), 26122 deletions(-) copy benchtests/{trunc-inputs => roundeven-inputs} (100%) copy benchtests/{truncf-inputs => roundevenf-inputs} (100%) delete mode 100644 bits/fenvinline.h delete mode 100644 bits/mathinline.h copy support/xgetline.c => elf/tst-audit14.c (52%) create mode 100644 elf/tst-audit15.c create mode 100644 elf/tst-audit16.c copy stdlib/tst-system.c => elf/tst-auditlogmod-1.c (72%) copy stdlib/tst-system.c => elf/tst-auditlogmod-2.c (72%) copy stdlib/tst-system.c => elf/tst-auditlogmod-3.c (72%) create mode 100644 malloc/tst-safe-linking.c delete mode 100644 math/test-fenvinline.c delete mode 100644 math/test-math-inline.h create mode 100644 nscd/cachedumper.c create mode 100644 stdio-common/tst-printf-bz25691.c create mode 100644 sysdeps/hppa/dl-runtime.c delete mode 100644 sysdeps/m68k/m680x0/fpu/bits/mathinline.h delete mode 100644 sysdeps/powerpc/bits/fenvinline.h copy stdlib/tst-system.c => sysdeps/powerpc/powerpc64/le/fpu/multiarch/s_fmaf128-p [...] rename math/test-math-no-inline.h => sysdeps/powerpc/powerpc64/le/fpu/multiarch/s_ [...] copy support/xgetline.c => sysdeps/powerpc/powerpc64/le/fpu/multiarch/s_fmaf128.c (57%) create mode 100644 sysdeps/powerpc/powerpc64/le/power9/fpu/s_fmaf128.c create mode 100644 sysdeps/unix/sysv/linux/getitimer.c copy sysdeps/unix/sysv/linux/{alpha/osf_getrusage.c => getrusage.c} (52%) create mode 100644 sysdeps/unix/sysv/linux/setitimer.c rename sysdeps/unix/sysv/linux/{alpha => }/tv32-compat.h (55%) delete mode 100644 sysdeps/unix/sysv/linux/x86_64/cancellation.S delete mode 100644 sysdeps/unix/sysv/linux/x86_64/libc-cancellation.S delete mode 100644 sysdeps/unix/sysv/linux/x86_64/librt-cancellation.S delete mode 100644 sysdeps/x86/fpu/include/bits/fenv.h copy support/xgetline.c => sysdeps/x86/tst-cet-legacy-7.c (60%) copy sysdeps/x86/{tst-cet-legacy-4.c => tst-cet-legacy-8.c} (51%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk_tx1/gnu-master-aarch64-spec2k6-O2-vs-O2_LTO updated (f457ae2218c -> 705510a708d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/gnu-master-aarch64-spec2k6-O2-vs-O2_LTO in repository toolchain/ci/gcc. from f457ae2218c [rs6000] Fix a wrong GC issue adds aedb4c8fc77 Update myself to MAINTAINERS adds 4069adf4bbc c++: Tweak reshape_init_array_1 [PR94124] adds 349ab34dc64 tree-dse: Fix mem* head trimming if call has lhs [PR94130] adds b73f69020f0 doc: Fix up ASM_OUTPUT_ALIGNED_DECL_LOCAL description adds 98aeb1ef510 [Fortran, OpenACC] Reject vars of different scope in $acc d [...] adds 54f46d82f54 i386: Use ix86_output_ssemov for MMX TYPE_SSEMOV adds fcc443b97e1 libstdc++: Fix test failure due to -Wnonnull warnings adds 1dc00a8ec9a tree-optimization/94103 avoid CSE of loads with padding adds a0ae4cbe9d1 maintainer-scripts: Fix jit documentation build with update [...] adds c56871dd15a maintainer-scripts: Fix up gcc_release without -l, where mk [...] adds daf2852b883 Support for the CPEN control register was removed in rev .5 [...] adds 4aded535ea6 Remove no-op register to register copies in CSE just like w [...] adds 54e69cb00da Daily bump. adds 82f620e2ba4 Fix unaligned load with small memcpy on the ARM adds 3e6ab5cefa8 Fix incorrect filling of delay slots in branchy code at -O2 adds dbf3dc75888 aarch64: Add --params to control the number of recip steps [...] adds fd8679974b2 i386: Use ix86_output_ssemov for DFmode TYPE_SSEMOV adds 7aa605c9d46 aarch64: Fix another bug in aarch64_add_offset_1 [PR94121] adds 43d513af3f2 [testsuite] Fix PR93935 to guard case under vect_hw_misalign adds 98ff89d1ac5 Do not strcat to result of getenv. adds 3604480a6fe tree-optimization/94163 constrain alignment set by PRE adds 80a13af724a c++: Redundant -Wdeprecated-declarations warning in build_o [...] adds 5c7e6d4bdf8 df: Don't abuse bb->aux (PR94148, PR94042) adds 9ae8bc02774 testsuite: Assorted x32 testsuite fixes adds f2e9fe5f97d PR c/94040 - ICE on a call to an invalid redeclaration of strftime adds 3b515f74841 Fix wrong year in ChangeLog. adds 45ee7a35f34 PR c/94040 - ICE on a call to an invalid redeclaration of strftime adds a4504f32c05 PR92303: Try to simplify memory subreg. adds db3fa3476e9 testsuite: Fix misquoted string in bfcvt-nosimd.c adds 5b74dd0a227 d/dmd: Merge upstream dmd e9420cfbf adds 5c048755ec9 analyzer: handle NOP_EXPR in get_lvalue [PR94099,PR94105] adds 50c96067c8e Fix UBSAN error, shifting 64 bit value by 64. adds 0034955eb16 Daily bump. adds 53b28abf8e4 Fix doubled indefinite articles, mostly in comments. adds 9a6408bd18f rs6000/test: Fix selector in fold-vec-mule-misc.c adds 6e5084b4401 libphobos: Merge upstream druntime 7915b6a3 adds c393c99d3dc c++: Fix CTAD with multiple-arg ctor template [93248]. adds b3b0c671cc3 c++: Find parameter pack in typedef in lambda [92909]. adds 3a285529ee3 c++: Fix ICE-after-error on partial spec [92068] adds 824722e45f8 i386: Use ix86_output_ssemov for DImode TYPE_SSEMOV adds 89769d70af2 Daily bump. adds 9c3cdb43c2b tree-nested: Fix handling of *reduction clauses with C arra [...] adds b408e010ccf driver: Fix redundant descriptions in options adds ced66da3135 coroutines: Fix indentation (NFC). adds 9d74caf21be i386: Use ix86_output_ssemov for SFmode TYPE_SSEMOV adds 5e5ce5371f6 Daily bump. adds e4e9a59105a Update post order number for merged SCC. adds 5ba25b2ef17 tree-inline: Fix a -fcompare-debug issue in the inliner [PR94167] adds 6d44c881286 tree-inline: Fix a -fcompare-debug issue in the inliner [PR94167] adds f2d3807f580 libphobos: Merge upstream druntime 6c45dd3a, phobos 68cc18adb. adds e41d4a0a567 d/dmd: Merge upstream dmd b061bd744 adds 5a3c42b227b i386: Use ix86_output_ssemov for SImode TYPE_SSEMOV adds 136fec1e27f x32 does not support MS ABI, skip testcases that require it. adds f19b40bd377 Fix ChangeLog formatting from my commit last friday. adds bc093503d74 libphobos: Reset libtool_VERSION to 1:0:0 adds 63c8f7d6a08 [ARM][GCC][1/x]: MVE ACLE intrinsics framework patch. adds c7be0832b54 [ARM][GCC][2/x]: MVE ACLE intrinsics framework patch. adds 5dee500b359 [ARM][GCC][3/x]: MVE ACLE intrinsics framework patch. adds f522810d2b5 [testsuite] Avoid duplicate test names in sizeless tests adds bae7b38cf8a Fix PR94185: Do not reuse insn alternative after changing m [...] adds c015ff8ccaf c: Handle MEM_REF in c_fully_fold* [PR94179] adds 447d196e75d d: Fix multiple definition error when using mixins and interfaces. adds c62f5e6e1f4 libstdc++: Add default constructor to net::service_already_ [...] adds 2691ffe6dba d: Fix assignment to anonymous union member corrupts siblin [...] adds b3f246f12b2 Daily bump. adds 950183c7741 Update gcc sv.po. adds 57e7ad5a8fd c++: Add test for PR 93901. adds ecf2b69a629 Filter a test-case with gas. adds 7afa3b82918 expand: Don't depend on warning flags in code generation of [...] adds 741ff2a263f strlen: Punt on UB reads past end of string literal [PR94187] adds fd857de8070 c: ignore initializers for elements of variable-size types [...] adds 994d4862062 testsuite: Fix pr94185.C testcase on i686-linux with C++98 [...] adds 14782c8123e [ARM][GCC][4/x]: MVE ACLE vector interleaving store intrinsics. adds a50f6abffc3 [ARM][GCC][1/1x]: Patch to support MVE ACLE intrinsics with [...] adds 5db0eb95c34 [ARM][GCC][2/1x]: MVE intrinsics with unary operand. adds a9a437ffc42 tree-ssa-strlen: Fix up count_nonzero_bytes* [PR94015] adds f582ca0fd70 [GCC][PATCH][ARM] Add multilib mapping for Armv8.1-M+MVE wi [...] adds 700d4cb08c8 Fix up duplicated duplicated words mostly in comments adds 6df4618cac9 [ARM][GCC][3/1x]: MVE intrinsics with unary operand. adds a475f153431 [ARM][GCC][4/1x]: MVE intrinsics with unary operand. adds 4be8cf77026 [ARM][GCC][1/2x]: MVE intrinsics with binary operands. adds 887085be635 c++: Fix access checks for __is_assignable and __is_constructible adds f166a8cdf48 [ARM][GCC][2/2x]: MVE intrinsics with binary operands. adds d71dba7b611 [ARM][GCC][3/2x]: MVE intrinsics with binary operands. adds 33203b4c27d [ARM][GCC][4/2x]: MVE intrinsics with binary operands. adds f9355dee93f [ARM][GCC][5/2x]: MVE intrinsics with binary operands. adds 0dad5b33687 [ARM][GCC][1/3x]: MVE intrinsics with ternary operands. adds e4596b66710 coroutines, testsuite: Fix single test execution. adds 1fef0148be4 Fix the ChangeLog after the __is_assignable/__is_constructible fix adds cf9c3bff39c aarch64: Fix bf16_v(ld|st)n.c failures for big-endian adds 58a703f0726 testsuite: Fix gcc.target/aarch64/advsimd-intrinsics/bfcvt- [...] adds cd0b7124273 c++: Fix parsing of invalid enum specifiers [PR90995] adds 046c58907ec c: Handle C_TYPE_INCOMPLETE_VARS even for ENUMERAL_TYPEs [PR94172] adds 2e30d3e3e88 testsuite: Fix g++.dg/debug/dwarf2/const2b.C target selector adds 3b2cc34369a Daily bump. adds 98f29f5638f libstdc++: Fix type-erasure in experimental::net::executor [...] adds 80616e5b7a5 c++: Fix comment typo. adds 52b3aa8be18 dwarf: Generate DIEs for external variables with -g1 [93751] adds af8656be8df c++: Diagnose a deduction guide in a wrong scope [PR91759] adds 4e3d3e40726 middle-end/94188 fix fold of addr expression generation adds 4da9288745d libgomp testsuite - disable long double for AMDGCN adds cb26919c857 aarch64: Treat p12-p15 as call-preserved in SVE PCS functions adds d91480dee93 aarch64: Fix SYMBOL_TINY_GOT handling for ILP32 [PR94201] adds d5029d45940 Fix up duplicated duplicated words in comments adds 1ba9acb11e3 middle-end/94206 fix memset folding to avoid types with padding adds 11cf25c40e3 PR c++/94147 - mangling of lambdas assigned to globals adds 5a80a6c3e5f amdgcn: Add cond_add/sub/and/ior/xor for all vector modes adds dbde9e2d595 amdgcn: Fix vector compare modes adds 07522ae90b5 libstdc++: Fix compilation with released versions of Clang adds e5de406f996 libstdc++ Fix compilation of <stop_token> with Clang adds 0db2cd17702 analyzer: tweaks to exploded_node ctor adds 7d9c107ab1e analyzer: introduce noop_region_model_context adds f665beeba62 analyzer: add test coverage for fixed ICE [PR94047] adds 884d9141112 analyzer: make summarized dumps more comprehensive adds 26cbcfe5fce Fix libgomp.oacc-fortran/atomic_capture-1.f90 adds 8165795c155 [ARM][GCC][2/3x]: MVE intrinsics with ternary operands. adds e3678b4464a [ARM][GCC][3/3x]: MVE intrinsics with ternary operands. adds db5db9d2548 [ARM][GCC][1/4x]: MVE intrinsics with quaternary operands. adds 8eb3b6b9cf2 [ARM][GCC][2/4x]: MVE intrinsics with quaternary operands. adds f2170a379b0 [ARM][GCC][3/4x]: MVE intrinsics with quaternary operands. adds 532e9e2402a [ARM][GCC][4/4x]: MVE intrinsics with quaternary operands. adds 4ff68575991 [ARM][GCC][1/5x]: MVE store intrinsics. adds 535a8645bb8 [ARM][GCC][2/5x]: MVE load intrinsics. adds 405e918c314 [ARM][GCC][3/5x]: MVE store intrinsics with predicated suffix. adds 429d607bc46 [ARM][GCC][4/5x]: MVE load intrinsics with zero(_z) suffix. adds bf1e3d5afa1 [ARM][GCC][5/5x]: MVE ACLE load intrinsics which load a byt [...] adds 4cc23303bad [ARM][GCC][6/5x]: Remaining MVE load intrinsics which loads [...] adds 5cad47e0f85 [ARM][GCC][7/5x]: MVE store intrinsics which stores byte,ha [...] adds 7a5fffa5ed0 [ARM][GCC][8/5x]: Remaining MVE store intrinsics which stor [...] adds 3512dc0108a PR ipa/92799 - ICE on a weakref function definition followe [...] adds 529ea7d9596 Complete change to resolve pr90275. adds 07fe4af4d51 rs6000: Add back some w* constraints (PR91886) adds b3341826531 libstdc++: Fix is_trivially_constructible (PR 94033) adds b5562f1187d Daily bump. adds 73bc09fa8c6 middle-end/94216 fix another build_fold_addr_expr use adds f3280e4c0c9 ipa/94217 simplify offsetted address build adds c7e90196818 phiopt: Avoid -fcompare-debug bug in phiopt [PR94211] adds bb83e069eba libgomp/testsuite: ignore blank-line output for function-no [...] adds 02f7334ac93 c++: Fix up handling of captured vars in lambdas in OpenMP [...] adds f5389e17e4b Update include/plugin-api.h. adds c8429c2aba8 API extension for binutils (type of symbols). adds f22712bd8a2 Fix inliner ICE on alias with flatten attribute [PR92372] adds 37482edc3f7 d/dmd: Merge upstream dmd d1a606599 adds 9def91e9f2a c: Fix up cfun->function_end_locus from the C FE [PR94029] adds f7dceb4e658 Fix cgraph_node::function_symbol availability compuattion [ [...] adds 3373d3e38ea Daily bump. adds 94e2418780f c++: Avoid unnecessary empty class copy [94175]. adds 4a18f168f47 [rs6000] Rewrite the declaration of a variable adds 05009698eeb gcc, Arm: Fix no_cond issue introduced by MVE adds 4119cd693d2 store-merging: Fix up -fnon-call-exceptions handling [PR94224] adds 0efe7d8796e gcc, Arm: Fix MVE move from GPR -> GPR adds 005f6fc59e5 gcc, Arm: Fix testisms for MVE testsuite adds 719c864225e gcc, Arm: Revert changes to {get,set}_fpscr adds 8fefa21fcf6 tree-optimization/94266 - fix object type extraction heuristics adds 7d4549b2cd2 Fix correct offset in ipa_get_jf_ancestor_result. adds 3eff57aacfe [ARM][GCC][6x]:MVE ACLE vaddq intrinsics using arithmetic p [...] adds 85a94e87901 [ARM][GCC][7x]: MVE vreinterpretq and vuninitializedq intrinsics. adds 92f80065d10 [ARM][GCC][1/8x]: MVE ACLE vidup, vddup, viwdup and vdwdup [...] adds 41e1a7ffae9 [ARM][GCC][2/8x]: MVE ACLE gather load and scatter store in [...] adds 3d42842c07f fix CTOR vectorization adds 261014a1be4 [ARM][GCC][9x]: MVE ACLE predicated intrinsics with (dont-c [...] adds 828878c35c8 c++: Include the constraint parameter mapping in diagnostic [...] adds c3562f81042 [ARM][GCC][10x]: MVE ACLE intrinsics "add with carry across [...] adds 1aa22b1916a c-family: Tighten vector handling in type_for_mode [PR94072] adds b5446d0cc09 d: Fix SEGV in hash_table<odr_name_hasher, false, xcallocat [...] adds 1dfcc3b541c [ARM][GCC][11x]: MVE ACLE vector interleaving store and dei [...] adds a23eff1bd04 c++: Add testcases from PR c++/69694 adds a89349e664f adjust SLP tree dumping adds 72b3bc895f0 Fix verifier ICE on wrong comdat local flag [PR93347] adds 68dd57808f7 rs6000: Add command line and builtin compatibility check adds cc3afc9db07 Regenerate gcc.pot. adds 29f23ed79b6 sra: Cap number of sub-access propagations with a param (PR 93435) adds 8416602026d Daily bump. adds 15711e837b2 Fix comma at end of enumerator list seen with -std=c++98. adds 497498c878d lra: Tighten check for reloading paradoxical subregs [PR94052] adds b599bf9d6d1 c++: Reject changing active member of union during initiali [...] adds 98eb7b2ed24 d: Fix ICE in add_symbol_to_partition_1, at lto/lto-partiti [...] adds 837cece888f Darwin: Address translation comments (PR93694). adds dfb25dfe3d3 Darwin: Handle NULL DECL_SIZE_TYPE in machopic_select_secti [...] adds 9fc985118d9 libstdc++: Fix path::generic_string allocator handling (PR 94242) adds a577c0c2693 libstdc++: Fix experimental::path::generic_string (PR 93245) adds 424e39081f9 d: Fix typo in ChangeLog for last change adds 4a01f7b1e73 d: Fix missing dependencies in depfile for imported files ( [...] adds 88d7d0ce8fa testsuite: Fix lambda-vis.C for targets with user label pre [...] adds 85e10e4f0fa Darwin: Fix i686 bootstrap when the assembler supports GOTO [...] adds fbe60463bb8 d: Generate phony targets for content imported files (PR93038) adds 83aa5aa313a Daily bump. adds 6e00d8dcf32 Daily bump. adds b809f0b6580 Set proper DECL_ALIGN in offload_handle_link_vars (PR94233) adds 2fa4b1ffd6e Save ref->speculative_id before clone_reference. adds 263ee1260bc tree-optimization/94266 - aovid propagating addresses of TA [...] adds 7a2090b04e5 ipa/94245 - avoid folding when we want an ADDR_EXPR adds 26b3e568a60 [PR94044] Fix ICE with sizeof<argumentpack> adds a3586eeb884 AMDGCN offloading – use amdgcn-amdhsa adds ce6413087de lto/lto.c – used $ or . in generated linkptr name adds 4897bb0045d libgomp – fix declare target link handling (PR94251) adds b0d84ecc55f fortran: ICE in gfc_match_assignment PR93600 adds 4dcc4502f31 tree-optimization/94261 - avoid IL adjustments in SLP analysis adds 6debbff6ca3 arm: Add earlyclobber to MVE instructions that require it adds 962406639c0 testsuite, arm: Change tests to assemble adds 0cd55f9d3af libgccjit: handle long literals in playback::context::new_s [...] adds 1a5c27b1b43 [ARM][GCC][12x]: MVE ACLE intrinsics to set and get vector lane. adds 85244449104 [ARM][GCC][13x]: MVE ACLE scalar shift intrinsics. adds 88c9a831f3a [ARM][GCC][14x]: MVE ACLE whole vector left shift with carr [...] adds d326e9586b4 driver: Improve the generated help text for alias options adds 5db9e89323c c: Fix up cfun->function_end_locus on invalid function bodi [...] adds ca6c722561c c++: Handle COMPOUND_EXPRs in get_narrower and warnings_for [...] adds 1f6c1c82eb5 c++: Avoid a suspicious -Wnoexcept warning [PR93805] adds 75fb811dfaa Verify the code used for the optimized comparison is valid [...] adds c86c99e6950 Update gcc es.po, sv.po. adds 75c24a08d69 Daily bump. adds 047811579f0 cgraphunit: Avoid code generation differences based on -w/T [...] adds a5a9400a846 if-conv: Fix -fcompare-debug bugs in ifcvt_local_dce [PR94283] adds 565ab7efbdc loop-manip: Avoid -fcompare-debug issues in create_iv [PR94285] adds 596c90d3559 arm: Fix arm {,u}subvdi4 and usubvsi4 expanders [PR94286] adds 906b3eb9df6 Improve endianess detection. adds c2211a60ff0 Fix OpenMP offload handling for target-link variables for n [...] adds 04099157691 Define __BIG_ENDIAN__ adds 8001f59c82b [testsuite,arm] target-supports.exp: Add arm_fp_dp_ok effec [...] adds 2a0eaca3e9c [testsuite,arm] cmp-2.c: Move double-precision tests to cmp-3.c adds 07f8bcc6ea9 [testsuite,arm] use arm_fp_dp_ok effective-target adds 6e771c087b1 c++: Give more expressions locations. adds 5c161741843 c++: Fix template parm with dependent type in concepts. adds fddfd3ce555 c++: Improve handling of ill-formed constraints [PR94186]. adds 75b7b7fdc45 c++: Fix wrong no post-decrement operator error in template [...] adds 0c1c8d9f137 Daily bump. adds adaf4b6c66e Test for sigsetjmp support in analyzer tests requiring that [...] adds c2133167ad5 if-conv: Delete dead stmts backwards in ifcvt_local_dce [PR94283] adds f1154b4d3c5 sccvn: Fix buffer overflow in push_partial_def [PR94300] adds 158cccea0d0 middle-end: Avoid using DECL_UID in ASM_FORMAT_PRIVATE_NAME [...] adds 5f18995e23e varasm: Fix output_constructor where a RANGE_EXPR index nee [...] adds c38daa79768 fortran: ICE using undeclared symbol in array constructor PR93484 adds c8504ebef1d testsuite: Fix up FAILs in gfortran testsuite with -fcompar [...] adds 0fb0240a051 Fix handling of --with{,out}-zstd option. adds 724ec02c2c6 Make target_clones resolver fn static if possible. adds d5ad8ee04a7 i386: Fix ix86_add_reg_usage_to_vzeroupper [PR94308] adds 780f1cfd8ee testsuite: Mention cleanup-13.c test is incompatible with - [...] adds 68c4570a4de Do not error about missing zstd unless --with-zstd. adds 83dfa06cb5c coroutines: Fix missing dereference (PR94319). adds 0fca105f8ca Fix gcc.dg/pr92301.c on targets that don't support argc/argv. adds 05c13c43990 PR tree-optimization/94131 - ICE on printf with a VLA strin [...] adds c7a252ba2d0 c++: Fix invalid -Wduplicated-cond warning [PR94265] adds 713ecb3d417 rs6000: Allow FPRs to change between SDmode and DDmode [...] adds b5228b1bc8c PR middle-end/94004 - missing -Walloca on calls to alloca d [...] adds 6e4cd3cd259 arm: Fix ICE caused by arm_gen_dicompare_reg [PR94292] adds eeb0c7c0713 Fix vector-compare-1 regressions on sh4/sh4eb caused by pat [...] adds 48817fbd761 Fix vector-compare-1 regressions on sh4/sh4eb caused by [...] adds fe4b53b2e7e testsuite: adjustments for amdgcn adds bf1fc37bb4a libstdc++: Define and use chrono::is_clock for C++20 adds e3ef371982a libstdc++ Add missing tests for std::shared_timed_mutex adds 9673d11ec53 libstdc++: Fix author in previous ChangeLog entry adds e97929e20b2 [PATCH] rs6000: vec_rlnm fix to make builtin work according to ABI adds 27f8c8c4c92 Daily bump. adds d21dff5b4fe widening_mul: restrict ops to be defined in the same basic- [...] adds 9708ca2be40 var-tracking: Mark as sp based more VALUEs [PR92264] adds 5a1706f63a2 c++: Fix a -fcompare-debug issue with DEBUG_BEGIN_STMT stmt [...] adds dab932d1519 c++: Fix up user_provided_p [PR81349] adds 10ea09ee846 gimplify: Fix -fcompare-debug differences caused by gimplif [...] adds d6730f06420 Skip test for non-x86 targets. adds da920d0c46c tree: Fix -fcompare-debug issues due to protected_set_expr_ [...] adds 40cdcddf274 Fix UNRESOLVED test-case. adds e519d644999 arm: unified syntax for libgcc when built with -Os [PR94220] adds 16948c54b75 libstdc++: Add some C++20 additions to <chrono> adds 2a1f0f64160 coroutines: Implement n4849 changes to exception handling. adds 6d85947d23a coroutines: Implement n4849 recommended symmetric transfer. adds 517f5356bb0 c++: DR1710, template keyword in a typename-specifier [PR94057] adds b1c905ba83e Update gcc .po files. adds f9c38702e96 Daily bump. adds 65937db83cd coroutines, testsuite: Fix symmetric-transfer-00-basic.C on Linux. adds 54f58e9416d c++: Remove redundant calls to type_dependent_expression_p adds 71d69548a1b c++: template keyword accepted before destructor names [PR94336] adds 06d5d63d994 modulo-sched: fix bootstrap compare-debug issue adds 72809d6fe8e c++: Handle COMPOUND_EXPRs in ocp_convert [PR94339] adds 2eea00c518d c++: Avoid calls in non-evaluated contexts affect whether f [...] adds a76ff304f90 Fortran] Reject invalid association target (PR93363) adds a9cd2d786ad fixup: move ChangeLog entry for last Arm fix to correct file. adds 66e0e23c12d fixup: move ChangeLog entry for last Arm fix to correct file. adds 8d689cf43b5 Fix PR90332 by extending half size vector mode adds 62ede14d30f [Fortran] Fix ICE with deferred-rank arrays (PR93957) adds 917e21e8bcd tree-optimization/94352 - fix uninitialized use of curr_order adds 45cfaf9903d debug/94273 - avoid creating type DIEs for DINFO_LEVEL_TERSE adds 4d661bb7a2e analyzer: tweaks to superedge::dump adds 8f02357571a analyzer: improvements to diagnostic-manager.cc logging adds 42c63313252 analyzer: add new supergraph visualization adds 6969ac301f2 analyzer: fix malloc pointer NULL-ness adds 9dba60130dc c++: Fix ICE after ambiguous inline namespace reopen [PR94257] adds 04dd734b52d c++: avoid -Wredundant-tags on a first declaration in use [ [...] adds 038769535a8 amdgcn: refactor mode iterators adds ccacf77be55 PR c++/94098 - ICE on attribute access redeclaration adds c7fc15f54b3 [pr84733] Fix ICE popping local scope adds 52f24a9e989 PR c++/94346 - [9/10 Regression] ICE due to handle_copy_att [...] adds 54de5afb4a9 c++: Handle COMPOUND_EXPRs in ocp_convert [PR94339] adds 19e5389debb [RS6000] PR94145, make PLT loads volatile adds 491009b609d Update gcc de.po. adds 0302a2de7f1 libstdc++: Move definition earlier in file adds ae6076b5bc1 libstdc++: Implement C++20 changes to insert iterators adds 81a8d137c22 libstdc++: Add remaining C++20 changes to iterator adaptors adds b8a28a06eaf libstdc++: Define __cpp_lib_ranges macro for C++20 adds c2781192292 Daily bump. adds 679becf175c reassoc: Fix -fcompare-debug bug in reassociate_bb [PR94329] adds c6a562de88c c: After issuing errors about array size, for error-recover [...] adds 75defde9fb5 c++: Replay errors during diagnosis of constraint satisfact [...] adds cd68edf894d c++: Respect current_constraint_diagnosis_depth in diagnose [...] adds a7ea3d2ced7 c++: requires-expression outside of a template is misevalua [...] adds 7981c06ae92 c++: Diagnose when "requires" is used instead of "requires [...] adds 3fb7f2fbd5f [Fortran] Fix result-variable handling of MODULE PROCEDURE [...] adds 7d57570b065 Patch for PR94246 adds 946a444df34 testsuite: adjust modulo-sched compare-debug tests adds 42cda3ba45f libstdc++: Fix std::reverse_iterator relational operators adds f6b2b79040d libstdc++: Fix two tests that fail in C++20 mode adds 673bb288e62 Daily bump. adds c76df72f1a9 testsuite: Split up gdc-test.exp into each subdirectory adds 46b7d819f7c Delete duplicate .align output. adds 85f6f317ec8 Fix typo in a warning related to flatten. adds afd9da8b8ad testsuite: Move C++ tests in gdc.test into own subdirectory. adds 60c254b279e testsuite: Handle more kinds of gdc.test test flags and dir [...] adds dacc7effeea doc: Update -falign-functions/-falign-loops/-falign-jumps adds 2a93fb6e962 Daily bump. adds 07c48b61a08 [RS6000] Put call cookie back in AIX/ELFv2 call patterns adds ec919cfcef8 Fix vextract* masked patterns [PR93069] adds 3a9db91bee4 Fix scan pattern of vect-8.f90 dump. adds 291aa50a631 XFAIL pr57193.c test-case. adds 5abbfd3cd36 i386: Fix up *one_cmplv*2* insn with avx512f [PR94343] adds 48c18af43fa Update bswap64-4 test for desired results adds 841e721579b RS6000 Allow builtin initialization regardless of mask adds 48e331d6382 Define TRY_EMPTY_VM_SPACE for riscv64-linux adds 1cb1986cb59 c++: Fix handling of internal fn calls in statement express [...] adds 5830f753559 c++: Fix comparison of fn() and ns::fn() [PR90711] adds 9f6abd1b03e Update gcc sv.po. adds 13a29fc5730 Daily bump. adds 3809bcd6c0e lra: set insn_code_data to NULL when freeing adds 56f0b32476c forwprop: Pattern recognize more rotates [PR94344] adds 5ea39b24122 store-merging: Allow enums during bswap recognition [PR94403] adds 1dcffc8ddc4 fold-const: Fix division folding with vector operands [PR94412] adds a27c534794d aarch64: Fix up aarch64_compare_and_swaphi pattern [PR94368] adds e81d0d9ec7a [ARM][PATCH]: Add support for MVE ACLE intrinsics polymorph [...] adds cea1fc6f67d arc: Allow more ABIs in GLIBC_DYNAMIC_LINKER adds 1ef979c6966 [ARM][PATCH]: Add MVE ACLE intrinsics vbicq_n_* polymorphic [...] adds d08a318b4fd arc: Cleanup compilation warning adds dc56917d111 arc: Update operand printing adds 1165109b401 amdgcn: generalize vector insn modes adds 48742e02d71 d: Use d_comdat_linkage on generated internal decl. adds e06cde870ed Library-side tests for parenthesized aggregate init adds f14b41d2712 vect: ICE: in vectorizable_load, at tree-vect-stmts.c:9173 [...] adds e8e0acbaa38 d: Use memset to fill alignment holes with zeroes. adds 331c438d5a6 Update cpplib sr.po. adds 689418b97e5 libgomp – fix handling of 'target enter data' adds 63b2923dc6f libgccjit: add new version entry point adds 1c16f7fc903 d: Add always_inline to the internal attribute table. adds 013fca64fc1 d: Merge UDAs between function prototype and definitions (PR90136) adds 73dd051894b Daily bump. adds 595f1b1274b c++: Adjust formatting. adds 76f09260b7e c++: Fix DMI with lambda 'this' capture [PR94205] adds bd0f22a8d5c Fix PR94043 by making vect_live_op generate lc-phi adds 142d68f50b4 Fix typo in a macro usage. adds 9ecb3ecc8cc objsz: Don't call replace_uses_by on SSA_NAME_OCCURS_IN_ABN [...] adds d3ee88fdb4e Clear me from patch ownership. adds 0c9a8a8c103 fortran : FAIL: gfortran.dg/pr93365.f90 PR94386 adds e899d4b7125 Add testcase for already fixed PR [PR94436] adds 032f2366a4c rs6000: Make code questionably using r2 not ICE (PR94420) adds dd5da571731 doc: Fix a typo in the documentation of the copy attribute adds 43d011eb054 Whoops, forgot the changelog adds b60bd122dc7 doc: Fix typo adds 7546463b9f7 subreg: Fix PR94123, SVN r273240 causes gcc.target/powerpc/ [...] adds a96f1c38a78 analyzer: handle compound assignments [PR94378] adds 6c557ba5380 libstdc++: Move "free books" list from fsf.org to gnu.org adds fb25041e11d d: Fix gdc.dg/pr92216.d FAILs on 32-bit targets adds 918b89b7623 d: Fix new tests gdc.dg/pr93038.d and gdc.dg/pr93038b.d in [...] adds 25839b6af9f Daily bump. adds bf1f6d8819a fortran: ICE equivalence with an element of an array PR94030 adds 2c54eab5a30 fortran : ICE in gfc_resolve_findloc PR93498 adds b7a98f48e06 S/390: Remove superfluous commutative constraint modifiers adds 224efaf7e1e [Fortran] Fix error cleanup of select rank (PR93522) adds c1effaa209f libstdc++-v3/test: Better skip for "use_service.cc" adds ff825b81583 [ARM]: Fix for MVE ACLE intrinsics with writeback (PR94317). adds 66e327517b1 aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435] adds df562b12d90 aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435] adds 2c0fa3ecf70 cselib: Reuse VALUEs on sp adjustments [PR92264] adds 86c92411320 params: Decrease -param=max-find-base-term-values= default [...] adds d4ed2cd13d0 sra/doc: Document param sra-max-propagations adds 68cbee9bf53 Fix up -Wliteral-suffix warning on mti-linux.h adds 81ce375d1fd Fix PR94401 by considering reverse overrun adds 879bc686a0a doc: RISC-V: Update binutils requirement to 2.30 adds 54af95767e8 debug/94450 - remove DW_TAG_imported_unit generated in LTRA [...] adds 75efe9cb1f8 c/94392 - only enable -ffinite-loops for C++ adds b90061c6ec0 Prevent IPA-SRA from creating calls to local comdats (PR 92676) adds 3ab216a4d2f [Fortran] Resolve formal args before checking DTIO adds 0cd74f35889 Fix fortran/85982 ICE in resolve_component. adds a950bb6e952 Fix check_effective_target_sigsetjmp for glibc targets. adds 63f56527335 Fix some comment typos in alias.c. adds 535ce76acbe Daily bump. adds b749b5ec58a S/390 zTPF: Handle skip trace addresses when unwinding adds 55a7380213a ICF: compare type attributes for gimple_call_fntypes. adds 4441ecedc3d Fix PR94443 with gsi_insert_seq_before [PR94443] adds 2b1e849b35b Revert "[nvptx, libgomp] Update pr85381-{2,4}.c test-cases" [...] adds 24fe8c8e338 libstdc++: Fix std::to_address for debug iterators (PR 93960) adds 1dff18a181b amdgcn: Support unordered floating-point comparison operators adds fa4aab7f840 Improve svn-rev to search for pattern at line beginning. adds ef6631051d4 middle-end/94465 - handle released SSA names in array_ref_l [...] adds 53161358180 AArch64: Fix options canonicalization for assembler adds 3b6e79ae0c3 arm: Do not process rest of MVE header file after unsupport [...] adds a87cd913ae2 arm: MVE: Fix unintended change to tests adds 51ecad3c032 c++: Add test for PR c++/93211 adds b8020a5aafd i386: Fix vph{add,subs?}[wd] 256-bit AVX2 RTL patterns [PR94460] adds bcafd8748cf c++: alias template and parameter packs (PR91966). adds a13d6ec867e i386: Fix up handling of OPTION_MASK_ISA_MMX builtins [PR94461] adds b949f8e2acb Fix va-arg-22.c at -O1 on m32r. adds bbcdf9bb3fd x86: Mark scratch operand in ssse3_pshufbv8qi3 as earlyclobber adds 710d54ed4e3 libgcc: avoid mmap/munmap hooks in split-stack code on GNU/Linux adds 0c809f727cd openmp: Fix ICE on #pragma omp parallel master in template [...] adds 7f26e60c260 Fix stdarg-3 regression on xstormy16 port adds 78e27649095 Daily bump. adds aae5d08a8d4 c++: Fix further protected_set_expr_location related -fcomp [...] adds bab8d9625f4 cselib: Don't consider SP_DERIVED_VALUE_P values as useless [...] adds 2523d721cfc ipa: Fix wrong code with failed propagation to builtin_cons [...] adds 9f143008c73 c++: Fix reuse of class constants [PR94453] adds f1ad7bac76b c++: Fix invalid pointer-to-member in requires [PR67825] adds 21e28527130 Fix previous commit. adds 37244b217a7 c++: Fix constexpr evaluation of self-modifying CONSTRUCTOR [...] adds 49a86fce1a8 c++: Refrain from using replace_placeholders in constexpr e [...] adds 75c8d6e54a1 c++: Mangling of dependent conversions [PR91377] adds 458ca332d10 libgcc: only use __mmap if glibc >- 2.26 adds 0be9efad938 debug: Improve debug info of c++14 deduced return type [PR94459] adds 705510a708d Daily bump. No new revisions were added by this update. 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gcc/testsuite/g++.dg/warn/Wduplicated-cond1.C | 16 + gcc/testsuite/g++.dg/warn/Wmismatched-tags-3.C | 14 + gcc/testsuite/g++.dg/warn/Wmismatched-tags-4.C | 141 + gcc/testsuite/g++.dg/warn/Wmismatched-tags-5.C | 117 + gcc/testsuite/g++.dg/warn/Wmismatched-tags-6.C | 29 + gcc/testsuite/g++.dg/warn/Wnoexcept1.C | 2 +- gcc/testsuite/g++.dg/warn/Wnoexcept2.C | 15 + gcc/testsuite/g++.dg/warn/Wredundant-tags-3.C | 6 +- gcc/testsuite/g++.dg/warn/Wredundant-tags-6.C | 91 + gcc/testsuite/g++.dg/warn/Wredundant-tags-7.C | 25 + gcc/testsuite/g++.old-deja/g++.pt/crash38.C | 6 +- gcc/testsuite/g++.target/aarch64/pr94052.C | 174 + gcc/testsuite/g++.target/i386/pr94185.C | 33 + gcc/testsuite/gcc.c-torture/compile/20200313-1.c | 14 + gcc/testsuite/gcc.c-torture/compile/pr90275.c | 27 + gcc/testsuite/gcc.c-torture/compile/pr94144.c | 18 + gcc/testsuite/gcc.c-torture/compile/pr94179.c | 9 + gcc/testsuite/gcc.c-torture/compile/pr94238.c | 22 + gcc/testsuite/gcc.c-torture/execute/pr94130.c | 16 + gcc/testsuite/gcc.c-torture/execute/pr94412.c | 28 + gcc/testsuite/gcc.c-torture/pr92372.c | 16 + gcc/testsuite/gcc.dg/Walloca-larger-than-3.c | 38 + gcc/testsuite/gcc.dg/Walloca-larger-than-3.h | 9 + .../gcc.dg/Wbuiltin-declaration-mismatch-12.c | 4 +- .../gcc.dg/Wbuiltin-declaration-mismatch-14.c | 77 + .../gcc.dg/Wbuiltin-declaration-mismatch-15.c | 56 + gcc/testsuite/gcc.dg/Wvla-larger-than-4.c | 30 + .../gcc.dg/analyzer/compound-assignment-1.c | 71 + .../gcc.dg/analyzer/compound-assignment-2.c | 24 + .../gcc.dg/analyzer/compound-assignment-3.c | 25 + gcc/testsuite/gcc.dg/analyzer/data-model-5b.c | 6 +- gcc/testsuite/gcc.dg/analyzer/data-model-5c.c | 7 +- gcc/testsuite/gcc.dg/analyzer/dot-output.c | 1 + gcc/testsuite/gcc.dg/analyzer/malloc-5.c | 12 + gcc/testsuite/gcc.dg/analyzer/pr94047.c | 23 + gcc/testsuite/gcc.dg/analyzer/pr94099.c | 27 + gcc/testsuite/gcc.dg/analyzer/pr94105.c | 3 + gcc/testsuite/gcc.dg/analyzer/sigsetjmp-5.c | 2 + gcc/testsuite/gcc.dg/analyzer/sigsetjmp-6.c | 2 + gcc/testsuite/gcc.dg/attr-flatten-1.c | 18 + gcc/testsuite/gcc.dg/attr-weakref-5.c | 31 + gcc/testsuite/gcc.dg/cleanup-13.c | 4 + gcc/testsuite/gcc.dg/debug/dwarf2/pr93751-1.c | 6 + gcc/testsuite/gcc.dg/debug/dwarf2/pr93751-2.c | 6 + gcc/testsuite/gcc.dg/lto/pr94157_0.c | 7 + gcc/testsuite/gcc.dg/lto/pr94271_0.c | 15 + gcc/testsuite/gcc.dg/lto/pr94271_1.c | 17 + gcc/testsuite/gcc.dg/pr62090.c | 2 + gcc/testsuite/gcc.dg/pr84131.c | 29 + gcc/testsuite/gcc.dg/pr89314.c | 2 +- gcc/testsuite/gcc.dg/pr92301.c | 2 +- gcc/testsuite/gcc.dg/pr93573-1.c | 12 + gcc/testsuite/gcc.dg/pr93573-2.c | 6 + gcc/testsuite/gcc.dg/pr94015.c | 107 + gcc/testsuite/gcc.dg/pr94166.c | 24 + gcc/testsuite/gcc.dg/pr94167.c | 33 + gcc/testsuite/gcc.dg/pr94172-1.c | 12 + gcc/testsuite/gcc.dg/pr94172-2.c | 19 + gcc/testsuite/gcc.dg/pr94188.c | 10 + gcc/testsuite/gcc.dg/pr94189.c | 11 + gcc/testsuite/gcc.dg/pr94211.c | 12 + gcc/testsuite/gcc.dg/pr94269.c | 26 + gcc/testsuite/gcc.dg/pr94277.c | 11 + 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11 + gcc/testsuite/gcc.target/aarch64/options_set_12.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_13.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_14.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_15.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_16.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_17.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_18.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_19.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_20.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_21.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_22.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_23.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_24.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_25.c | 11 + gcc/testsuite/gcc.target/aarch64/options_set_26.c | 11 + gcc/testsuite/gcc.target/aarch64/pr94072.c | 9 + gcc/testsuite/gcc.target/aarch64/pr94201.c | 13 + gcc/testsuite/gcc.target/aarch64/pr94398.c | 24 + gcc/testsuite/gcc.target/aarch64/pr94435.c | 25 + .../aarch64/sve/acle/general-c/sizeless-1.c | 3 +- .../aarch64/sve/acle/general-c/sizeless-2.c | 3 +- .../gcc.target/aarch64/sve/acle/general/cpy_1.c | 4 + gcc/testsuite/gcc.target/aarch64/sve/pcs/args_1.c | 6 + .../gcc.target/aarch64/sve/pcs/saves_1_be_nowrap.c | 78 +- .../gcc.target/aarch64/sve/pcs/saves_1_be_wrap.c | 78 +- .../gcc.target/aarch64/sve/pcs/saves_1_le_nowrap.c | 78 +- .../gcc.target/aarch64/sve/pcs/saves_1_le_wrap.c | 78 +- .../gcc.target/aarch64/sve/pcs/saves_2_be_nowrap.c | 304 +- .../gcc.target/aarch64/sve/pcs/saves_2_be_wrap.c | 304 +- .../gcc.target/aarch64/sve/pcs/saves_2_le_nowrap.c | 304 +- .../gcc.target/aarch64/sve/pcs/saves_2_le_wrap.c | 304 +- .../gcc.target/aarch64/sve/pcs/saves_4_be.c | 78 +- .../gcc.target/aarch64/sve/pcs/saves_4_le.c | 78 +- .../gcc.target/aarch64/sve/pcs/saves_5_be.c | 76 +- .../gcc.target/aarch64/sve/pcs/saves_5_le.c | 76 +- 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23 + .../gcc.target/arm/mve/intrinsics/vaddq_m_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_m_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_m_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_m_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_n_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddq_n_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddq_n_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddq_n_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddq_n_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddq_n_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddq_n_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddq_x_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_x_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_x_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_x_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_x_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_x_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_x_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddq_x_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvaq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvaq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvaq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvaq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvaq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvaq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vaddvq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vandq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vandq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vandq_m_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vandq_m_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vandq_m_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vandq_m_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vandq_m_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vandq_m_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vandq_m_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vandq_m_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vandq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vandq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vandq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vandq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vandq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vandq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vandq_x_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vandq_x_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vandq_x_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vandq_x_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vandq_x_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vandq_x_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vandq_x_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vandq_x_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vbicq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vbicq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vbicq_m_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vbicq_m_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c | 22 + 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.../gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c | 23 + .../arm/mve/intrinsics/vcaddq_rot270_f16.c | 21 + .../arm/mve/intrinsics/vcaddq_rot270_f32.c | 21 + .../arm/mve/intrinsics/vcaddq_rot270_m_f16.c | 23 + .../arm/mve/intrinsics/vcaddq_rot270_m_f32.c | 23 + .../arm/mve/intrinsics/vcaddq_rot270_m_s16.c | 23 + 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| 21 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c | 22 + .../arm/mve/intrinsics/vcmpgeq_m_n_f16.c | 22 + .../arm/mve/intrinsics/vcmpgeq_m_n_f32.c | 22 + .../arm/mve/intrinsics/vcmpgeq_m_n_s16.c | 22 + .../arm/mve/intrinsics/vcmpgeq_m_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c | 21 + 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+ .../gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c | 23 + .../arm/mve/intrinsics/vcmulq_rot180_f16.c | 21 + .../arm/mve/intrinsics/vcmulq_rot180_f32.c | 21 + .../arm/mve/intrinsics/vcmulq_rot180_m_f16.c | 23 + .../arm/mve/intrinsics/vcmulq_rot180_m_f32.c | 23 + .../arm/mve/intrinsics/vcmulq_rot180_x_f16.c | 22 + .../arm/mve/intrinsics/vcmulq_rot180_x_f32.c | 22 + .../arm/mve/intrinsics/vcmulq_rot270_f16.c | 21 + .../arm/mve/intrinsics/vcmulq_rot270_f32.c | 21 + .../arm/mve/intrinsics/vcmulq_rot270_m_f16.c | 23 + .../arm/mve/intrinsics/vcmulq_rot270_m_f32.c | 23 + .../arm/mve/intrinsics/vcmulq_rot270_x_f16.c | 22 + .../arm/mve/intrinsics/vcmulq_rot270_x_f32.c | 22 + .../arm/mve/intrinsics/vcmulq_rot90_f16.c | 21 + .../arm/mve/intrinsics/vcmulq_rot90_f32.c | 21 + .../arm/mve/intrinsics/vcmulq_rot90_m_f16.c | 23 + .../arm/mve/intrinsics/vcmulq_rot90_m_f32.c | 23 + .../arm/mve/intrinsics/vcmulq_rot90_x_f16.c | 23 + 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.../gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c | 23 + .../arm/mve/intrinsics/vidupq_m_wb_u16.c | 23 + .../arm/mve/intrinsics/vidupq_m_wb_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vidupq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vidupq_n_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vidupq_n_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c | 23 + .../arm/mve/intrinsics/vidupq_x_wb_u16.c | 25 + .../arm/mve/intrinsics/vidupq_x_wb_u32.c | 25 + .../gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c | 25 + .../arm/mve/intrinsics/viwdupq_m_n_u16.c | 23 + .../arm/mve/intrinsics/viwdupq_m_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c | 23 + .../arm/mve/intrinsics/viwdupq_m_wb_u16.c | 23 + .../arm/mve/intrinsics/viwdupq_m_wb_u32.c | 23 + .../arm/mve/intrinsics/viwdupq_m_wb_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c | 21 + .../arm/mve/intrinsics/viwdupq_x_n_u16.c | 23 + .../arm/mve/intrinsics/viwdupq_x_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c | 23 + .../arm/mve/intrinsics/viwdupq_x_wb_u16.c | 23 + .../arm/mve/intrinsics/viwdupq_x_wb_u32.c | 23 + .../arm/mve/intrinsics/viwdupq_x_wb_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vld1q_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_z_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_z_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_z_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_z_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_z_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_z_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_z_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vld1q_z_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vld2q_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vld2q_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vld2q_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vld2q_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vld2q_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vld2q_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vld2q_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vld2q_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vld4q_f16.c | 24 + .../gcc.target/arm/mve/intrinsics/vld4q_f32.c | 24 + .../gcc.target/arm/mve/intrinsics/vld4q_s16.c | 24 + .../gcc.target/arm/mve/intrinsics/vld4q_s32.c | 24 + .../gcc.target/arm/mve/intrinsics/vld4q_s8.c | 24 + .../gcc.target/arm/mve/intrinsics/vld4q_u16.c | 24 + .../gcc.target/arm/mve/intrinsics/vld4q_u32.c | 24 + .../gcc.target/arm/mve/intrinsics/vld4q_u8.c | 24 + .../arm/mve/intrinsics/vldrbq_gather_offset_s16.c | 21 + .../arm/mve/intrinsics/vldrbq_gather_offset_s32.c | 21 + .../arm/mve/intrinsics/vldrbq_gather_offset_s8.c | 21 + .../arm/mve/intrinsics/vldrbq_gather_offset_u16.c | 21 + .../arm/mve/intrinsics/vldrbq_gather_offset_u32.c | 21 + .../arm/mve/intrinsics/vldrbq_gather_offset_u8.c | 21 + .../mve/intrinsics/vldrbq_gather_offset_z_s16.c | 21 + .../mve/intrinsics/vldrbq_gather_offset_z_s32.c | 21 + .../arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c | 21 + .../mve/intrinsics/vldrbq_gather_offset_z_u16.c | 21 + .../mve/intrinsics/vldrbq_gather_offset_z_u32.c | 21 + .../arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vldrbq_s16.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_s32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_s8.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_u16.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_u32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_u8.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c | 13 + .../arm/mve/intrinsics/vldrdq_gather_base_s64.c | 13 + .../arm/mve/intrinsics/vldrdq_gather_base_u64.c | 13 + .../arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c | 15 + .../arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c | 15 + .../mve/intrinsics/vldrdq_gather_base_wb_z_s64.c | 15 + .../mve/intrinsics/vldrdq_gather_base_wb_z_u64.c | 15 + .../arm/mve/intrinsics/vldrdq_gather_base_z_s64.c | 13 + .../arm/mve/intrinsics/vldrdq_gather_base_z_u64.c | 13 + .../arm/mve/intrinsics/vldrdq_gather_offset_s64.c | 21 + .../arm/mve/intrinsics/vldrdq_gather_offset_u64.c | 21 + .../mve/intrinsics/vldrdq_gather_offset_z_s64.c | 21 + .../mve/intrinsics/vldrdq_gather_offset_z_u64.c | 21 + .../intrinsics/vldrdq_gather_shifted_offset_s64.c | 21 + .../intrinsics/vldrdq_gather_shifted_offset_u64.c | 21 + .../vldrdq_gather_shifted_offset_z_s64.c | 21 + .../vldrdq_gather_shifted_offset_z_u64.c | 21 + .../gcc.target/arm/mve/intrinsics/vldrhq_f16.c | 13 + .../arm/mve/intrinsics/vldrhq_gather_offset_f16.c | 21 + .../arm/mve/intrinsics/vldrhq_gather_offset_s16.c | 21 + .../arm/mve/intrinsics/vldrhq_gather_offset_s32.c | 21 + .../arm/mve/intrinsics/vldrhq_gather_offset_u16.c | 21 + .../arm/mve/intrinsics/vldrhq_gather_offset_u32.c | 21 + .../mve/intrinsics/vldrhq_gather_offset_z_f16.c | 21 + .../mve/intrinsics/vldrhq_gather_offset_z_s16.c | 21 + .../mve/intrinsics/vldrhq_gather_offset_z_s32.c | 21 + .../mve/intrinsics/vldrhq_gather_offset_z_u16.c | 21 + .../mve/intrinsics/vldrhq_gather_offset_z_u32.c | 21 + .../intrinsics/vldrhq_gather_shifted_offset_f16.c | 21 + .../intrinsics/vldrhq_gather_shifted_offset_s16.c | 21 + .../intrinsics/vldrhq_gather_shifted_offset_s32.c | 21 + .../intrinsics/vldrhq_gather_shifted_offset_u16.c | 21 + .../intrinsics/vldrhq_gather_shifted_offset_u32.c | 21 + .../vldrhq_gather_shifted_offset_z_f16.c | 21 + .../vldrhq_gather_shifted_offset_z_s16.c | 21 + .../vldrhq_gather_shifted_offset_z_s32.c | 21 + .../vldrhq_gather_shifted_offset_z_u16.c | 21 + .../vldrhq_gather_shifted_offset_z_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vldrhq_s16.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrhq_s32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrhq_u16.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrhq_u32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrwq_f32.c | 13 + .../arm/mve/intrinsics/vldrwq_gather_base_f32.c | 13 + .../arm/mve/intrinsics/vldrwq_gather_base_s32.c | 13 + .../arm/mve/intrinsics/vldrwq_gather_base_u32.c | 13 + .../arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c | 15 + .../arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c | 15 + .../arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c | 15 + .../mve/intrinsics/vldrwq_gather_base_wb_z_f32.c | 17 + .../mve/intrinsics/vldrwq_gather_base_wb_z_s32.c | 17 + .../mve/intrinsics/vldrwq_gather_base_wb_z_u32.c | 17 + .../arm/mve/intrinsics/vldrwq_gather_base_z_f32.c | 13 + .../arm/mve/intrinsics/vldrwq_gather_base_z_s32.c | 13 + .../arm/mve/intrinsics/vldrwq_gather_base_z_u32.c | 13 + .../arm/mve/intrinsics/vldrwq_gather_offset_f32.c | 21 + .../arm/mve/intrinsics/vldrwq_gather_offset_s32.c | 21 + .../arm/mve/intrinsics/vldrwq_gather_offset_u32.c | 21 + .../mve/intrinsics/vldrwq_gather_offset_z_f32.c | 21 + .../mve/intrinsics/vldrwq_gather_offset_z_s32.c | 21 + .../mve/intrinsics/vldrwq_gather_offset_z_u32.c | 21 + .../intrinsics/vldrwq_gather_shifted_offset_f32.c | 21 + .../intrinsics/vldrwq_gather_shifted_offset_s32.c | 21 + .../intrinsics/vldrwq_gather_shifted_offset_u32.c | 21 + .../vldrwq_gather_shifted_offset_z_f32.c | 21 + .../vldrwq_gather_shifted_offset_z_s32.c | 21 + .../vldrwq_gather_shifted_offset_z_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vldrwq_s32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrwq_u32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c | 13 + .../gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c | 13 + .../gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxaq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxaq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxaq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxavq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxavq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxavq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c | 21 + .../arm/mve/intrinsics/vmaxnmavq_p_f16.c | 21 + .../arm/mve/intrinsics/vmaxnmavq_p_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vmaxq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmaxvq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vminaq_m_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vminaq_m_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vminaq_m_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vminaq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminaq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminaq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vminavq_p_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminavq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminavq_p_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vminavq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminavq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminavq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vminnmaq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminnmaq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vminnmavq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminnmavq_f32.c | 21 + .../arm/mve/intrinsics/vminnmavq_p_f16.c | 21 + .../arm/mve/intrinsics/vminnmavq_p_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminnmq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminnmq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vminnmvq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminnmvq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminq_m_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vminq_m_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vminq_m_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vminq_m_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vminq_m_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vminq_m_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vminq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vminq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vminq_x_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vminq_x_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vminq_x_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vminq_x_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vminq_x_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vminq_x_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vminvq_p_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminvq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminvq_p_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vminvq_p_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminvq_p_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminvq_p_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vminvq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminvq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminvq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vminvq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vminvq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vminvq_u8.c | 21 + .../arm/mve/intrinsics/vmladavaq_p_s16.c | 22 + .../arm/mve/intrinsics/vmladavaq_p_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c | 22 + .../arm/mve/intrinsics/vmladavaq_p_u16.c | 22 + .../arm/mve/intrinsics/vmladavaq_p_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmladavaq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavaq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavaq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavaq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavaq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavaq_u8.c | 21 + .../arm/mve/intrinsics/vmladavaxq_p_s16.c | 22 + .../arm/mve/intrinsics/vmladavaxq_p_s32.c | 22 + .../arm/mve/intrinsics/vmladavaxq_p_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavq_u8.c | 21 + .../arm/mve/intrinsics/vmladavxq_p_s16.c | 21 + .../arm/mve/intrinsics/vmladavxq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavxq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavxq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmladavxq_s8.c | 21 + .../arm/mve/intrinsics/vmlaldavaq_p_s16.c | 21 + .../arm/mve/intrinsics/vmlaldavaq_p_s32.c | 21 + .../arm/mve/intrinsics/vmlaldavaq_p_u16.c | 21 + .../arm/mve/intrinsics/vmlaldavaq_p_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c | 21 + .../arm/mve/intrinsics/vmlaldavaxq_p_s16.c | 21 + .../arm/mve/intrinsics/vmlaldavaxq_p_s32.c | 21 + .../arm/mve/intrinsics/vmlaldavaxq_p_u16.c | 21 + .../arm/mve/intrinsics/vmlaldavaxq_p_u32.c | 21 + .../arm/mve/intrinsics/vmlaldavaxq_s16.c | 21 + .../arm/mve/intrinsics/vmlaldavaxq_s32.c | 21 + .../arm/mve/intrinsics/vmlaldavq_p_s16.c | 21 + .../arm/mve/intrinsics/vmlaldavq_p_s32.c | 21 + .../arm/mve/intrinsics/vmlaldavq_p_u16.c | 21 + .../arm/mve/intrinsics/vmlaldavq_p_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c | 21 + .../arm/mve/intrinsics/vmlaldavxq_p_s16.c | 21 + .../arm/mve/intrinsics/vmlaldavxq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c | 21 + .../arm/mve/intrinsics/vmlsdavaq_p_s16.c | 22 + .../arm/mve/intrinsics/vmlsdavaq_p_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c | 21 + .../arm/mve/intrinsics/vmlsdavaxq_p_s16.c | 22 + .../arm/mve/intrinsics/vmlsdavaxq_p_s32.c | 22 + .../arm/mve/intrinsics/vmlsdavaxq_p_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c | 21 + .../arm/mve/intrinsics/vmlsdavxq_p_s16.c | 21 + .../arm/mve/intrinsics/vmlsdavxq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c | 21 + .../arm/mve/intrinsics/vmlsldavaq_p_s16.c | 21 + .../arm/mve/intrinsics/vmlsldavaq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c | 21 + .../arm/mve/intrinsics/vmlsldavaxq_p_s16.c | 21 + .../arm/mve/intrinsics/vmlsldavaxq_p_s32.c | 21 + .../arm/mve/intrinsics/vmlsldavaxq_s16.c | 21 + .../arm/mve/intrinsics/vmlsldavaxq_s32.c | 21 + .../arm/mve/intrinsics/vmlsldavq_p_s16.c | 21 + .../arm/mve/intrinsics/vmlsldavq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c | 21 + .../arm/mve/intrinsics/vmlsldavxq_p_s16.c | 21 + .../arm/mve/intrinsics/vmlsldavxq_p_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovlbq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovlbq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovlbq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovlbq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovltq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovltq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovltq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovltq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovnbq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovnbq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovnbq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovnbq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vmovntq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovntq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovntq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmovntq_u32.c | 21 + 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.../arm/mve/intrinsics/vmullbq_int_m_s16.c | 23 + .../arm/mve/intrinsics/vmullbq_int_m_s32.c | 23 + .../arm/mve/intrinsics/vmullbq_int_m_s8.c | 23 + .../arm/mve/intrinsics/vmullbq_int_m_u16.c | 23 + .../arm/mve/intrinsics/vmullbq_int_m_u32.c | 23 + .../arm/mve/intrinsics/vmullbq_int_m_u8.c | 23 + .../arm/mve/intrinsics/vmullbq_int_s16.c | 21 + .../arm/mve/intrinsics/vmullbq_int_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c | 21 + .../arm/mve/intrinsics/vmullbq_int_u16.c | 21 + .../arm/mve/intrinsics/vmullbq_int_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c | 21 + .../arm/mve/intrinsics/vmullbq_int_x_s16.c | 22 + .../arm/mve/intrinsics/vmullbq_int_x_s32.c | 22 + .../arm/mve/intrinsics/vmullbq_int_x_s8.c | 22 + .../arm/mve/intrinsics/vmullbq_int_x_u16.c | 22 + .../arm/mve/intrinsics/vmullbq_int_x_u32.c | 22 + .../arm/mve/intrinsics/vmullbq_int_x_u8.c | 22 + .../arm/mve/intrinsics/vmullbq_poly_m_p16.c | 23 + .../arm/mve/intrinsics/vmullbq_poly_m_p8.c | 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| 22 + .../arm/mve/intrinsics/vmulltq_int_x_u32.c | 22 + .../arm/mve/intrinsics/vmulltq_int_x_u8.c | 22 + .../arm/mve/intrinsics/vmulltq_poly_m_p16.c | 23 + .../arm/mve/intrinsics/vmulltq_poly_m_p8.c | 23 + .../arm/mve/intrinsics/vmulltq_poly_p16.c | 21 + .../arm/mve/intrinsics/vmulltq_poly_p8.c | 21 + .../arm/mve/intrinsics/vmulltq_poly_x_p16.c | 22 + .../arm/mve/intrinsics/vmulltq_poly_x_p8.c | 22 + .../gcc.target/arm/mve/intrinsics/vmulq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vmulq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vmulq_m_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vmulq_m_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c | 23 + 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+ .../gcc.target/arm/mve/intrinsics/vqrshlq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vqrshlq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vqrshlq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vqrshlq_u8.c | 21 + .../arm/mve/intrinsics/vqrshrnbq_m_n_s16.c | 23 + .../arm/mve/intrinsics/vqrshrnbq_m_n_s32.c | 23 + .../arm/mve/intrinsics/vqrshrnbq_m_n_u16.c | 23 + .../arm/mve/intrinsics/vqrshrnbq_m_n_u32.c | 23 + .../arm/mve/intrinsics/vqrshrnbq_n_s16.c | 21 + .../arm/mve/intrinsics/vqrshrnbq_n_s32.c | 21 + .../arm/mve/intrinsics/vqrshrnbq_n_u16.c | 21 + .../arm/mve/intrinsics/vqrshrnbq_n_u32.c | 21 + .../arm/mve/intrinsics/vqrshrntq_m_n_s16.c | 23 + .../arm/mve/intrinsics/vqrshrntq_m_n_s32.c | 23 + .../arm/mve/intrinsics/vqrshrntq_m_n_u16.c | 23 + .../arm/mve/intrinsics/vqrshrntq_m_n_u32.c | 23 + .../arm/mve/intrinsics/vqrshrntq_n_s16.c | 21 + .../arm/mve/intrinsics/vqrshrntq_n_s32.c | 21 + .../arm/mve/intrinsics/vqrshrntq_n_u16.c | 21 + .../arm/mve/intrinsics/vqrshrntq_n_u32.c | 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21 + .../arm/mve/intrinsics/vqshruntq_n_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vqsubq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vqsubq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vqsubq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vqsubq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vqsubq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vqsubq_u8.c | 21 + .../arm/mve/intrinsics/vreinterpretq_f16.c | 44 + .../arm/mve/intrinsics/vreinterpretq_f32.c | 44 + .../arm/mve/intrinsics/vreinterpretq_s16.c | 44 + .../arm/mve/intrinsics/vreinterpretq_s32.c | 44 + .../arm/mve/intrinsics/vreinterpretq_s64.c | 45 + .../arm/mve/intrinsics/vreinterpretq_s8.c | 44 + .../arm/mve/intrinsics/vreinterpretq_u16.c | 44 + .../arm/mve/intrinsics/vreinterpretq_u32.c | 44 + .../arm/mve/intrinsics/vreinterpretq_u64.c | 45 + .../arm/mve/intrinsics/vreinterpretq_u8.c | 44 + .../gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev16q_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vrev16q_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev32q_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev32q_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrev32q_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vrev32q_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrev32q_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev64q_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vrev64q_f32.c | 13 + .../gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev64q_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrev64q_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vrev64q_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vrev64q_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrev64q_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vrev64q_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vrhaddq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrhaddq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vrhaddq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vrhaddq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrhaddq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vrhaddq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c | 22 + .../arm/mve/intrinsics/vrmlaldavhaq_p_s32.c | 21 + .../arm/mve/intrinsics/vrmlaldavhaq_p_u32.c | 21 + .../arm/mve/intrinsics/vrmlaldavhaq_s32.c | 21 + .../arm/mve/intrinsics/vrmlaldavhaq_u32.c | 21 + .../arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c | 21 + .../arm/mve/intrinsics/vrmlaldavhaxq_s32.c | 21 + .../arm/mve/intrinsics/vrmlaldavhq_p_s32.c | 21 + .../arm/mve/intrinsics/vrmlaldavhq_p_u32.c | 21 + .../arm/mve/intrinsics/vrmlaldavhq_s32.c | 21 + .../arm/mve/intrinsics/vrmlaldavhq_u32.c | 21 + .../arm/mve/intrinsics/vrmlaldavhxq_p_s32.c | 21 + .../arm/mve/intrinsics/vrmlaldavhxq_s32.c | 21 + .../arm/mve/intrinsics/vrmlsldavhaq_p_s32.c | 21 + .../arm/mve/intrinsics/vrmlsldavhaq_s32.c | 21 + .../arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c | 21 + .../arm/mve/intrinsics/vrmlsldavhaxq_s32.c | 21 + .../arm/mve/intrinsics/vrmlsldavhq_p_s32.c | 21 + .../arm/mve/intrinsics/vrmlsldavhq_s32.c | 21 + .../arm/mve/intrinsics/vrmlsldavhxq_p_s32.c | 21 + .../arm/mve/intrinsics/vrmlsldavhxq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vrmulhq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrmulhq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vrmulhq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vrmulhq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrmulhq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vrmulhq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndaq_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vrndaq_f32.c | 13 + .../gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndmq_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vrndmq_f32.c | 13 + .../gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndnq_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vrndnq_f32.c | 13 + .../gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndpq_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vrndpq_f32.c | 13 + .../gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndq_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vrndq_f32.c | 13 + .../gcc.target/arm/mve/intrinsics/vrndq_m_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndq_m_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndq_x_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndq_x_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndxq_f16.c | 13 + .../gcc.target/arm/mve/intrinsics/vrndxq_f32.c | 13 + .../gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshlq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshlq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshlq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshlq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshlq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshlq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c | 22 + .../arm/mve/intrinsics/vrshrnbq_m_n_s16.c | 23 + .../arm/mve/intrinsics/vrshrnbq_m_n_s32.c | 23 + .../arm/mve/intrinsics/vrshrnbq_m_n_u16.c | 23 + .../arm/mve/intrinsics/vrshrnbq_m_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c | 21 + .../arm/mve/intrinsics/vrshrntq_m_n_s16.c | 23 + .../arm/mve/intrinsics/vrshrntq_m_n_s32.c | 23 + .../arm/mve/intrinsics/vrshrntq_m_n_u16.c | 23 + .../arm/mve/intrinsics/vrshrntq_m_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c | 23 + 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+ .../gcc.target/arm/mve/intrinsics/vshlq_m_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vshlq_m_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vshlq_m_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vshlq_m_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vshlq_n_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vshlq_n_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vshlq_n_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vshlq_n_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vshlq_n_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vshlq_n_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vshlq_r_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vshlq_r_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vshlq_r_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vshlq_r_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vshlq_r_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vshlq_r_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vshlq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vshlq_s32.c | 21 + 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.../gcc.target/arm/mve/intrinsics/vstrwq_s32.c | 21 + .../arm/mve/intrinsics/vstrwq_scatter_base_f32.c | 21 + .../arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c | 21 + .../arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c | 21 + .../arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c | 21 + .../arm/mve/intrinsics/vstrwq_scatter_base_s32.c | 21 + .../arm/mve/intrinsics/vstrwq_scatter_base_u32.c | 21 + .../mve/intrinsics/vstrwq_scatter_base_wb_f32.c | 21 + .../mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c | 21 + .../mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c | 21 + .../mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c | 21 + .../mve/intrinsics/vstrwq_scatter_base_wb_s32.c | 21 + .../mve/intrinsics/vstrwq_scatter_base_wb_u32.c | 21 + .../arm/mve/intrinsics/vstrwq_scatter_offset_f32.c | 21 + .../mve/intrinsics/vstrwq_scatter_offset_p_f32.c | 21 + .../mve/intrinsics/vstrwq_scatter_offset_p_s32.c | 21 + .../mve/intrinsics/vstrwq_scatter_offset_p_u32.c | 21 + .../arm/mve/intrinsics/vstrwq_scatter_offset_s32.c | 21 + .../arm/mve/intrinsics/vstrwq_scatter_offset_u32.c | 21 + .../intrinsics/vstrwq_scatter_shifted_offset_f32.c | 21 + .../vstrwq_scatter_shifted_offset_p_f32.c | 21 + .../vstrwq_scatter_shifted_offset_p_s32.c | 21 + .../vstrwq_scatter_shifted_offset_p_u32.c | 21 + .../intrinsics/vstrwq_scatter_shifted_offset_s32.c | 21 + .../intrinsics/vstrwq_scatter_shifted_offset_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vstrwq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vsubq_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vsubq_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vsubq_m_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vsubq_m_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_m_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_m_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_m_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_m_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_m_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_n_f16.c | 21 + .../gcc.target/arm/mve/intrinsics/vsubq_n_f32.c | 21 + .../gcc.target/arm/mve/intrinsics/vsubq_n_s16.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_n_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_n_s8.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_n_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_n_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vsubq_s16.c | 21 + .../gcc.target/arm/mve/intrinsics/vsubq_s32.c | 21 + .../gcc.target/arm/mve/intrinsics/vsubq_s8.c | 21 + .../gcc.target/arm/mve/intrinsics/vsubq_u16.c | 21 + .../gcc.target/arm/mve/intrinsics/vsubq_u32.c | 21 + .../gcc.target/arm/mve/intrinsics/vsubq_u8.c | 21 + .../gcc.target/arm/mve/intrinsics/vsubq_x_f16.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_f32.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_s16.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_s32.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_s8.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_u16.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_u32.c | 15 + .../gcc.target/arm/mve/intrinsics/vsubq_x_u8.c | 15 + .../arm/mve/intrinsics/vuninitializedq_float.c | 16 + .../arm/mve/intrinsics/vuninitializedq_float1.c | 16 + .../arm/mve/intrinsics/vuninitializedq_int.c | 28 + .../arm/mve/intrinsics/vuninitializedq_int1.c | 28 + gcc/testsuite/gcc.target/arm/mve/mve.exp | 49 + gcc/testsuite/gcc.target/arm/vfp-1.c | 4 +- gcc/testsuite/gcc.target/arm/vfp-ldmdbd.c | 4 +- gcc/testsuite/gcc.target/arm/vfp-ldmiad.c | 4 +- gcc/testsuite/gcc.target/arm/vfp-stmdbd.c | 4 +- gcc/testsuite/gcc.target/arm/vfp-stmiad.c | 4 +- gcc/testsuite/gcc.target/arm/vnmul-1.c | 4 +- gcc/testsuite/gcc.target/arm/vnmul-3.c | 4 +- gcc/testsuite/gcc.target/arm/vnmul-4.c | 4 +- gcc/testsuite/gcc.target/i386/avx2-pr94460.c | 31 + gcc/testsuite/gcc.target/i386/avx512f-pr94300.c | 21 + gcc/testsuite/gcc.target/i386/avx512f-pr94343.c | 12 + gcc/testsuite/gcc.target/i386/avx512vl-pr93069.c | 12 + gcc/testsuite/gcc.target/i386/avx512vl-pr94343.c | 12 + gcc/testsuite/gcc.target/i386/pr57193.c | 3 +- gcc/testsuite/gcc.target/i386/pr64409.c | 4 +- gcc/testsuite/gcc.target/i386/pr71958.c | 7 +- gcc/testsuite/gcc.target/i386/pr81213-2.c | 12 + gcc/testsuite/gcc.target/i386/pr81213.c | 12 +- gcc/testsuite/gcc.target/i386/pr89229-4a.c | 16 + gcc/testsuite/gcc.target/i386/pr89229-4b.c | 7 + gcc/testsuite/gcc.target/i386/pr89229-4c.c | 6 + gcc/testsuite/gcc.target/i386/pr89229-5a.c | 17 + gcc/testsuite/gcc.target/i386/pr89229-5b.c | 6 + gcc/testsuite/gcc.target/i386/pr89229-5c.c | 7 + gcc/testsuite/gcc.target/i386/pr89229-6a.c | 16 + gcc/testsuite/gcc.target/i386/pr89229-6b.c | 6 + gcc/testsuite/gcc.target/i386/pr89229-6c.c | 6 + gcc/testsuite/gcc.target/i386/pr89229-7a.c | 17 + gcc/testsuite/gcc.target/i386/pr89229-7b.c | 6 + gcc/testsuite/gcc.target/i386/pr89229-7c.c | 7 + gcc/testsuite/gcc.target/i386/pr90096.c | 2 +- gcc/testsuite/gcc.target/i386/pr94103.c | 17 + gcc/testsuite/gcc.target/i386/pr94283.c | 5 + gcc/testsuite/gcc.target/i386/pr94308.c | 31 + gcc/testsuite/gcc.target/i386/pr94461.c | 12 + gcc/testsuite/gcc.target/i386/pr94467-1.c | 40 + gcc/testsuite/gcc.target/i386/pr94467-2.c | 48 + gcc/testsuite/gcc.target/powerpc/bswap64-4.c | 6 +- .../gcc.target/powerpc/fold-vec-mule-misc.c | 2 +- gcc/testsuite/gcc.target/powerpc/pragma_misc9.c | 47 + gcc/testsuite/gcc.target/powerpc/pragma_power6.c | 17 + gcc/testsuite/gcc.target/powerpc/pragma_power7.c | 32 + gcc/testsuite/gcc.target/powerpc/pragma_power8.c | 52 + gcc/testsuite/gcc.target/powerpc/pragma_power9.c | 63 + .../gcc.target/powerpc/vsu/vec-all-nez-7.c | 3 +- .../gcc.target/powerpc/vsu/vec-any-eqz-7.c | 3 +- gcc/testsuite/gdc.dg/asm1.d | 9 + gcc/testsuite/gdc.dg/asm5.d | 12 + gcc/testsuite/gdc.dg/fileimports/pr93038.txt | 1 + gcc/testsuite/gdc.dg/imports/pr92216.d | 22 + gcc/testsuite/gdc.dg/pr90136a.d | 21 + gcc/testsuite/gdc.dg/pr90136b.d | 21 + gcc/testsuite/gdc.dg/pr90136c.d | 9 + gcc/testsuite/gdc.dg/pr92216.d | 13 + gcc/testsuite/gdc.dg/pr92309.d | 25 + gcc/testsuite/gdc.dg/pr93038.d | 10 + gcc/testsuite/gdc.dg/pr93038b.d | 11 + gcc/testsuite/gdc.dg/pr94424.d | 19 + gcc/testsuite/gdc.test/compilable/b12001.d | 9 + gcc/testsuite/gdc.test/compilable/compilable.exp | 30 + .../gdc.test/compilable/imports/pr9471a.d | 2 + .../gdc.test/compilable/imports/pr9471b.d | 5 + .../gdc.test/compilable/imports/pr9471c.d | 18 + .../gdc.test/compilable/imports/pr9471d.d | 1 + gcc/testsuite/gdc.test/compilable/json.d | 21 + gcc/testsuite/gdc.test/compilable/pr9471.d | 6 + gcc/testsuite/gdc.test/compilable/staticforeach.d | 842 + gcc/testsuite/gdc.test/compilable/test11169.d | 15 + gcc/testsuite/gdc.test/compilable/test17819.d | 17 + gcc/testsuite/gdc.test/compilable/test18871.d | 15 + gcc/testsuite/gdc.test/compilable/test7815.d | 65 + gcc/testsuite/gdc.test/compilable/test7886.d | 5 + gcc/testsuite/gdc.test/fail_compilation/e7804_1.d | 11 + gcc/testsuite/gdc.test/fail_compilation/e7804_2.d | 19 + .../gdc.test/fail_compilation/fail11169.d | 28 - .../gdc.test/fail_compilation/fail19182.d | 18 + .../gdc.test/fail_compilation/fail19336.d | 17 + .../gdc.test/fail_compilation/fail19520.d | 21 + gcc/testsuite/gdc.test/fail_compilation/fail2195.d | 18 + gcc/testsuite/gdc.test/fail_compilation/fail7815.d | 65 - gcc/testsuite/gdc.test/fail_compilation/fail7886.d | 5 - .../gdc.test/fail_compilation/fail_compilation.exp | 30 + .../gdc.test/fail_compilation/staticforeach1.d | 13 + .../gdc.test/fail_compilation/staticforeach2.d | 13 + .../gdc.test/fail_compilation/staticforeach3.d | 7 + .../gdc.test/fail_compilation/test17307.d | 12 + .../gdc.test/fail_compilation/traits_alone.d | 10 + gcc/testsuite/gdc.test/gdc-test.exp | 469 - gcc/testsuite/gdc.test/runnable/arrayop.d | 3 +- gcc/testsuite/gdc.test/runnable/constfold.d | 18 +- gcc/testsuite/gdc.test/runnable/e7804.d | 179 + .../gdc.test/runnable/imports/template13478a.d | 5 +- gcc/testsuite/gdc.test/runnable/runnable.exp | 35 + gcc/testsuite/gdc.test/runnable/staticforeach.d | 45 + gcc/testsuite/gdc.test/runnable/test42.d | 60 +- gcc/testsuite/gdc.test/runnable/traits.d | 38 +- .../gdc.test/{runnable => runnable_cxx}/cabi1.d | 0 .../{runnable => runnable_cxx}/cpp_abi_tests.d | 0 .../gdc.test/{runnable => runnable_cxx}/cppa.d | 0 .../{runnable => runnable_cxx}/externmangle.d | 0 .../{runnable => runnable_cxx}/externmangle2.d | 0 .../extra-files/cabi2.cpp | 0 .../extra-files/cpp_abi_tests.cpp | 0 .../extra-files/cppb.cpp | 0 .../extra-files/externmangle.cpp | 0 .../extra-files/externmangle2.cpp | 0 .../gdc.test/runnable_cxx/runnable_cxx.exp | 46 + gcc/testsuite/gfortran.dg/associate_51.f90 | 2 +- gcc/testsuite/gfortran.dg/associate_53.f90 | 71 + gcc/testsuite/gfortran.dg/assumed_rank_19.f90 | 37 + gcc/testsuite/gfortran.dg/bessel_5_redux.f90 | 85 + gcc/testsuite/gfortran.dg/dec_structure_28.f90 | 35 + gcc/testsuite/gfortran.dg/dtio_35.f90 | 50 + gcc/testsuite/gfortran.dg/goacc/declare-2.f95 | 21 +- gcc/testsuite/gfortran.dg/goacc/declare-3.f95 | 10 +- gcc/testsuite/gfortran.dg/goacc/pr78260-2.f90 | 13 +- gcc/testsuite/gfortran.dg/goacc/pr94120-1.f90 | 11 + gcc/testsuite/gfortran.dg/goacc/pr94120-2.f90 | 12 + gcc/testsuite/gfortran.dg/goacc/pr94120-3.f90 | 13 + .../gfortran.dg/graphite/vect-pr94043.f90 | 18 + .../gfortran.dg/iso_c_binding_compiler_1.f90 | 3 + .../gfortran.dg/iso_c_binding_compiler_3.f90 | 3 + gcc/testsuite/gfortran.dg/module_procedure_3.f90 | 27 + gcc/testsuite/gfortran.dg/pr93365.f90 | 15 + gcc/testsuite/gfortran.dg/pr93484_1.f90 | 8 + gcc/testsuite/gfortran.dg/pr93484_2.f90 | 8 + gcc/testsuite/gfortran.dg/pr93498_1.f90 | 11 + gcc/testsuite/gfortran.dg/pr93498_2.f90 | 12 + gcc/testsuite/gfortran.dg/pr93600_1.f90 | 9 + gcc/testsuite/gfortran.dg/pr93600_2.f90 | 10 + gcc/testsuite/gfortran.dg/pr94030_1.f90 | 11 + gcc/testsuite/gfortran.dg/pr94030_2.f90 | 33 + gcc/testsuite/gfortran.dg/pr94285.f90 | 5 + gcc/testsuite/gfortran.dg/pr94329.f90 | 12 + gcc/testsuite/gfortran.dg/select_rank_4.f90 | 26 + .../gfortran.dg/unlimited_polymorphic_31.f03 | 3 + gcc/testsuite/gfortran.dg/vect/vect-8.f90 | 2 +- gcc/testsuite/jit.dg/all-non-failing-tests.h | 30 + gcc/testsuite/jit.dg/test-long-string-literal.c | 54 + gcc/testsuite/jit.dg/test-version.c | 26 + gcc/testsuite/lib/gdc-utils.exp | 475 + gcc/testsuite/lib/gdc.exp | 106 +- gcc/testsuite/lib/target-supports.exp | 114 +- gcc/tree-call-cdce.c | 2 +- gcc/tree-cfg.c | 3 + gcc/tree-data-ref.c | 2 +- gcc/tree-if-conv.c | 24 +- gcc/tree-inline.c | 4 +- gcc/tree-iterator.c | 41 + gcc/tree-iterator.h | 1 + gcc/tree-loop-distribution.c | 13 +- gcc/tree-nested.c | 37 +- gcc/tree-object-size.c | 5 +- gcc/tree-sra.c | 39 +- gcc/tree-ssa-dom.c | 11 +- gcc/tree-ssa-dse.c | 26 +- gcc/tree-ssa-forwprop.c | 60 +- gcc/tree-ssa-loop-im.c | 3 +- gcc/tree-ssa-loop-manip.c | 12 +- gcc/tree-ssa-loop-niter.c | 2 +- gcc/tree-ssa-loop-split.c | 2 +- gcc/tree-ssa-math-opts.c | 8 +- gcc/tree-ssa-phiopt.c | 10 +- gcc/tree-ssa-pre.c | 3 +- gcc/tree-ssa-propagate.c | 19 +- gcc/tree-ssa-reassoc.c | 23 +- gcc/tree-ssa-sccvn.c | 25 +- gcc/tree-ssa-strlen.c | 261 +- gcc/tree-ssa-strlen.h | 2 +- gcc/tree-vect-loop.c | 52 +- gcc/tree-vect-slp.c | 58 +- gcc/tree-vect-stmts.c | 210 +- gcc/tree.c | 38 +- gcc/tree.def | 2 +- gcc/tree.h | 1 + gcc/var-tracking.c | 27 +- gcc/varasm.c | 20 + include/ChangeLog | 29 + include/lto-symtab.h | 13 + include/plugin-api.h | 93 +- libcpp/po/ChangeLog | 4 + libcpp/po/sr.po | 78 +- libgcc/ChangeLog | 36 + libgcc/config/arm/lib1funcs.S | 33 +- libgcc/config/arm/t-arm | 3 + libgcc/config/s390/tpf-unwind.h | 132 +- libgcc/generic-morestack.c | 17 + libgomp/ChangeLog | 51 + libgomp/target.c | 18 +- libgomp/testsuite/libgomp.c++/pr93931.C | 120 + .../libgomp.c-c++-common/function-not-offloaded.c | 1 + libgomp/testsuite/libgomp.c/pr93566.c | 113 + libgomp/testsuite/libgomp.c/target-link-1.c | 3 - .../libgomp.fortran/target-enter-data-1.f90 | 36 + .../libgomp.oacc-c++/firstprivate-mappings-1.C | 9 + .../firstprivate-mappings-1.c | 9 + .../libgomp.oacc-c-c++-common/pr85381-2.c | 20 +- .../libgomp.oacc-c-c++-common/pr85381-4.c | 5 +- .../libgomp.oacc-fortran/atomic_capture-1.f90 | 30 +- libphobos/ChangeLog | 8 + libphobos/Makefile.in | 2 +- libphobos/configure | 2 +- libphobos/configure.ac | 2 +- libphobos/libdruntime/MERGE | 2 +- libphobos/libdruntime/Makefile.in | 2 +- libphobos/libdruntime/core/cpuid.d | 36 +- libphobos/libdruntime/core/stdc/errno.d | 328 + libphobos/libdruntime/core/stdc/fenv.d | 2 + libphobos/libdruntime/core/sys/posix/config.d | 8 +- libphobos/libdruntime/core/sys/posix/fcntl.d | 112 +- libphobos/libdruntime/core/sys/posix/semaphore.d | 4 +- libphobos/libdruntime/core/sys/posix/sys/socket.d | 62 +- libphobos/libdruntime/core/sys/posix/sys/stat.d | 236 +- libphobos/libdruntime/core/sys/posix/sys/types.d | 22 +- libphobos/src/MERGE | 2 +- libphobos/src/std/algorithm/iteration.d | 2 +- libphobos/src/std/math.d | 20 +- libstdc++-v3/ChangeLog | 267 + libstdc++-v3/doc/html/manual/appendix_free.html | 2 +- libstdc++-v3/doc/xml/manual/appendix_free.xml | 2 +- libstdc++-v3/include/bits/fs_fwd.h | 42 - libstdc++-v3/include/bits/fs_path.h | 11 +- libstdc++-v3/include/bits/iterator_concepts.h | 50 + libstdc++-v3/include/bits/ptr_traits.h | 11 +- libstdc++-v3/include/bits/range_access.h | 27 +- libstdc++-v3/include/bits/range_cmp.h | 3 + libstdc++-v3/include/bits/stl_algobase.h | 2 +- libstdc++-v3/include/bits/stl_iterator.h | 276 +- .../include/bits/stl_iterator_base_types.h | 4 +- libstdc++-v3/include/bits/stream_iterator.h | 4 +- libstdc++-v3/include/bits/streambuf_iterator.h | 4 +- libstdc++-v3/include/experimental/bits/fs_path.h | 40 +- libstdc++-v3/include/experimental/executor | 235 +- libstdc++-v3/include/experimental/socket | 18 +- libstdc++-v3/include/std/chrono | 206 +- libstdc++-v3/include/std/concepts | 2 +- libstdc++-v3/include/std/condition_variable | 3 + libstdc++-v3/include/std/future | 3 + libstdc++-v3/include/std/mutex | 3 + libstdc++-v3/include/std/shared_mutex | 6 + libstdc++-v3/include/std/stop_token | 12 + libstdc++-v3/include/std/thread | 3 + libstdc++-v3/include/std/type_traits | 80 +- libstdc++-v3/include/std/version | 7 +- .../allocator_traits/members/92878_92947.cc | 51 + .../testsuite/20_util/any/assign/92878_92947.cc | 46 + .../testsuite/20_util/any/cons/92878_92947.cc | 46 + libstdc++-v3/testsuite/20_util/bind/91371.cc | 2 +- .../20_util/is_constructible/92878_92947.cc | 49 + .../testsuite/20_util/is_constructible/value-2.cc | 4 + .../testsuite/20_util/is_function/91371.cc | 2 +- .../20_util/is_member_function_pointer/91371.cc | 2 +- .../20_util/is_nothrow_constructible/94003.cc | 46 + libstdc++-v3/testsuite/20_util/is_object/91371.cc | 2 +- .../20_util/optional/assignment/92878_92947.cc | 47 + .../testsuite/20_util/optional/cons/92878_92947.cc | 46 + .../testsuite/20_util/pair/cons/92878_92947.cc | 49 + .../20_util/shared_ptr/creation/92878_92947.cc | 46 + .../construct_at/92878_92947.cc | 50 + .../testsuite/20_util/time_point/cons/81468.cc | 8 +- .../time_point/requirements/duration_neg.cc | 32 + libstdc++-v3/testsuite/20_util/to_address/1_neg.cc | 2 +- libstdc++-v3/testsuite/20_util/to_address/debug.cc | 36 + .../20_util/unique_ptr/creation/92878_92947.cc | 46 + .../20_util/uses_allocator/92878_92947.cc | 67 + .../testsuite/20_util/variant/92878_92947.cc | 91 + .../deque/modifiers/emplace/92878_92947.cc | 62 + .../forward_list/modifiers/92878_92947.cc | 62 + .../list/modifiers/emplace/92878_92947.cc | 78 + .../map/modifiers/emplace/92878_92947.cc | 137 + .../multimap/modifiers/emplace/92878_92947.cc | 71 + .../multiset/modifiers/emplace/92878_92947.cc | 70 + .../23_containers/priority_queue/92878_92947.cc | 52 + .../testsuite/23_containers/queue/92878_92947.cc | 47 + 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gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c create mode 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gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c create mode 100644 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create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c create mode 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gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q_m.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q_m.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q_m.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q_m.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c create mode 100644 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gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c create mode 100644 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create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s8.c create mode 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mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c create mode 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gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c create mode 100644 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create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c create mode 100644 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gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c create mode 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gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpnot.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c create mode 100644 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mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c create mode 100644 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mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c create mode 100644 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gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c create mode 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gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c create mode 100644 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mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c create mode 100644 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create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c create mode 100644 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mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u16.c create mode 100644 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5 years, 2 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk_tx1/gnu-master-aarch64-spec2k6-O2-vs-O2_LTO updated (038b97fcd7 -> d87e3802d9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/gnu-master-aarch64-spec2k6-O2-vs-O2_LTO in repository toolchain/ci/binutils-gdb. from 038b97fcd7 testsuite: use `pwd -W` to convert from Unix to Windows paths adds dd69bf7a78 Avoid infinite recursion in find_pc_sect_line adds 8fb879cd16 asan: readelf leaks adds 1281424ccf [gdb/testsuite] Fix core file load FAIL in tls-core.exp adds 3217502e1b [gdb/testsuite] Use string_to_regexp on core filename in gdb [...] adds 9a2de3fc7f [gdb/testsuite] Fix gdb.linespec/explicit.exp FAIL with glib [...] adds 307eafd8df [gdb/testsuite] Fix dw2-ranges-base.exp FAIL with lib debuginfo adds e515d67ed6 [gdb/testsuite] Fix internal buffer full error in gdb.fortra [...] adds 14e9c72c33 [gdb/testsuite] Avoid breakpoint in GLIBC in gdb.threads/execl.exp adds 0925214029 [gdb/testsuite] Fix internal buffer full error in gdb.base/i [...] adds 607c693210 sim: ppc: netbsd: Sync errno codes with NetBSD 9.99.49 adds 7a20f753ef sim: ppc: netbsd: Sync signal names with NetBSD 9.99.49 adds 8dd8e1c722 Remove use of deprecated core functions (in NetBSD/ARM) adds 4d696a5c68 gdb/selftest.m4: ensure $development is set adds db6878ac55 Move sourcing of development.sh to GDB_AC_COMMON adds 74cd3f9d7e Don't include selftests objects in build when unit tests are [...] adds 272cd5a31e Move gdb/selftest.m4 to gdbsupport/selftest.m4 adds 40310f30a5 gdb: make gdb.arch/amd64-disp-step-avx.exp actually test dis [...] adds 3f512721a8 gdb: use foreach_with_prefix in gdb.base/break-interp.exp adds 64f251023b Fix CORE_ADDR size assertion in symfile-mem.c adds 53807e9f3d Don't use sprintf_vma for CORE_ADDR adds 227031b2bf Cast to bfd_vma in arm-tdep.c adds 9a665d6226 Fix gdbserver build when intl already built adds 213291361b Change gdbsupport not to rely on BFD adds 4635ff9753 Change gdbserver to use existing gdbsupport adds 6ba0a32103 Remove deprecated core file functions adds 301b21e0df [gdb/testsuite] Fix check-read1 FAIL in gdb.tui/corefile-run.exp adds 49ba92c0a6 [gdb/testsuite] Fix mi-sym-info.exp matching FAILs adds fd486f32d1 asan: more readelf leaks adds 502794d432 Fix several mix up between octets and bytes in ELF program headers adds 666318230c Fix several mix up between octets and bytes in ELF program headers adds 96c7f87394 [gdb/symtab] Fix partial unit psymtabs adds 1673df3278 x86-64: correct mis-named X86_64_0D enumerator adds 015ec493d8 Recognize aarch64 PT_GETREGS and PT_GETFPREGS notes on NetBSD adds 66d1f7cc12 gas, arm: PR25660L Fix vadd/vsub with lt and le condition co [...] adds 2e9145ace2 [gdb/testsuite] Fix mi-sym-info.exp matching FAILs (2) adds 2d61316c32 [gdb/testsuite] Fix buffer full errors in gdb.mi/mi-sym-info.exp adds 74e10d1742 x86: Check static link of dynamic objects adds abf874aafe Add support for non-contiguous memory regions adds 9fcbd8a90a Register NT_NETBSDCORE_AUXV (NetBSD-Core) adds 06d949ec31 Implement NT_NETBSDCORE_LWPSTATUS (NetBSD-Core) adds 1b83d09cd5 gdb/testsuite: Remove paths and make test names unique adds ce3acbe9fa Use scoped_value_mark in value_print adds b0c26e99f5 Refactor val_print and common_val_print adds c2a44efee1 Introduce common_val_print_checked adds 3444c526a3 Use common_val_print in infcmd.c adds a6e05a6c3a Use common_val_print in mi-main.c adds 040f66bd2d Use common_val_print in riscv-tdep.c adds 72a45c9384 Use common_val_print in f-valprint.c adds 410cf31501 Use common_val_print in cp-valprint.c adds a1f6a07c3d Use common_val_print in c-valprint.c adds 2b4e573d62 Introduce la_value_print_inner adds 156bfec999 Introduce generic_value_print adds 4f9ae81013 Introduce value_print_scalar_formatted adds 4dba70eee1 Two simple uses of value_print_scalar_formatted adds d121c6ce89 Introduce value_print_array_elements adds 7fe471e9ae Simplify c_val_print_array adds 1e592a8ae0 Make pascal_object_print_value_fields static adds 6218219002 Introduce c_value_print_inner adds 62c4663d3c Introduce m2_value_print_inner adds c0941be613 Introduce pascal_value_print_inner adds 24051bbe84 Introduce f_value_print_innner adds 26792ee034 Introduce ada_value_print_inner adds 5f56f7cbd2 Convert Rust printing to value-based API adds 23b0f06be4 Convert Go printing to value-based API adds d133c3e1a8 Convert D printing to value-based API adds 59fcdac646 Convert Modula-2 printing to value-based API adds 6a95a1f58d Convert Fortran printing to value-based API adds 64d64d3a76 Rewrite pascal_value_print_inner adds 07a328583d Convert Pascal to value-based API adds abc66ce95e Initial rewrite of generic_value_print adds 2a5b130bcb Introduce generic_value_print_ptr adds 40f3ce189e Fix generic_val_print_enum for value-based printing adds 65786af626 Remove generic_val_print_flags adds 4112d2e602 Simplify generic_val_print_func adds 6dde752183 Introduce generic_value_print_bool adds fdddfccba1 Introduce generic_value_print_int adds 3eec3b05b9 Introduce generic_value_print_char adds f535400886 Simplify generic_val_print_float adds 4f412b6e31 Introduce generic_value_print_complex adds 5083623134 Rewrite c_value_print_inner adds da3e2c2923 Introduce c_value_print_ptr adds 2faac269d5 Introduce c_value_print_int adds ce80b8bd37 Introduce c_value_print_memberptr adds 6999f067c1 Introduce c_value_print_array adds 64b653ca70 Introduce cp_print_value_fields and c_value_print_struct adds fbf54e7554 Introduce cp_print_value adds 5b5e15ecdd Rewrite ada_value_print_inner adds 416595d640 Introduce ada_value_print_ptr adds b9fa6e0798 Rewrite ada_value_print_1 floating point case adds 39ef85a896 Introduce ada_value_print_num adds 2e088f8b6e Convert ada_val_print_ref to value-based API adds 0337112903 Convert ada_value_print to value-based API adds b59eac3732 Introduce ada_value_print_array adds 3a916a9757 Change print_field_values to use value-based API adds 42331a1ea2 Change extension language pretty-printers to use value API adds 426a9c18dd Remove val_print adds 48e81d7f63 BFD_FAKE_SECTIONS formatting adds 02a8180e6f non-contiguous elf test adds f761cb13a9 asan: readelf: memory leaks adds 780f96aed2 readelf large memory allocation adds 09546b56ed [gdb/testsuite] Fix FAIL in gdb.base/printcmds.exp adds 2ac70237d2 [gdb/testsuite] Fix unrecognized debug output level 'stateme [...] adds 1bd6175ae7 Re: asan: more readelf leaks adds 8b5d0a4f6f Include netbsd-core.lo for all arm/mips NetBSD targets adds 25567eeece Define _KERNTYPES in vax-bsd-nat.c adds 52feded778 Define _KERNTYPES in ppc-nbsd-nat.c adds 8110f842bc Define _KERNTYPES in mips-nbsd-nat.c adds d5be5fa420 Inherit vax_bsd_nat_target from nbsd_nat_target adds 1275307303 Add explicit cast to fix build of vax-bsd-nat.c adds 6227b330d5 Add support for threads in vax_bsd_nat_target adds 013f99f035 Add support for NetBSD threads in x86-bsd-nat.c adds 6018d381a0 Inherit arm_netbsd_nat_target from nbsd_nat_target adds 75c56d3d12 Add support for NetBSD threads in arm-nbsd-nat.c adds 54c4382534 [gdb/testsuite] Fix check-read1 FAIL in attach-many-short-li [...] adds 2190cf067b Define _KERNTYPES in alpha-bsd-nat.c adds 4fed520be2 Inherit alpha_netbsd_nat_target from nbsd_nat_target adds 66eaca97eb Remove unused code from alpha-bsd-nat.c adds 6def66f140 Add support for NetBSD threads in alpha-bsd-nat.c adds f90280caf5 Define _KERNTYPES in m68k-bsd-nat.c adds 01a801176e Inherit m68k_bsd_nat_target from nbsd_nat_target adds bc10778499 m68k: bsd: Change type from char * to gdb_byte * adds 154151a6e3 Add support for NetBSD threads in m68k-bsd-nat.c adds ab44624cea [gdb/testsuite] Fix check-read1 FAILs in mi-fortran-modules.exp adds 3293bbaffa Add C parser support for "restrict" and "_Atomic" adds eaeaf44cfd [gdb/testsuite] Fix check-read1 FAIL with gdb.base/maint.exp adds 6b9374f1e0 [gdb/testsuite] Fix solib-list.exp test-case for exec with d [...] adds 7bac4137d7 asan: alpha-vms: null dereference adds 60e63c3e97 ubsan: shift exponent 70 is too large adds 28d1356774 asan: readelf leak in hppa_process_unwind adds 4b3ecb3b91 PR25675: SIGSEGV in bfd_octets_per_byte adds 2f89101fe8 [gdb/testsuite] Add cache_verify option for gdb_caching_procs adds cb9b645d3e gdb: recognize 64 bits Windows executables as Cygwin osabi adds fe4b2ee65c gdb: move enum gdb_osabi to osabi.h adds 053205cc40 gdb: add Windows OS ABI adds 7a1998dffb gdb: rename i386-cygwin-tdep.c to i386-windows-tdep.c adds 5982a56ab9 gdb: rename content of i386-windows-tdep.c, cygwin to windows adds 8db5243724 gdb: select "Cygwin" OS ABI for Cygwin binaries adds 30efb6c7af gdb: define builtin long type to be 64 bits on amd64 Cygwin adds 67430cd00a Fix dwarf2_name caching bug adds 817a758576 arc: Migrate to new target features adds 771dd3a88b Initialize base_value in pascal_object_print_value adds 7325b16ba4 [gdb/testsuite] Give up after consecutive timeouts in comple [...] adds 589902954d [gdb] Skip imports of c++ CUs adds a2ecbe9fb7 Rewrite nbsd_nat_target::pid_to_exec_file to sysctl(3) adds 9e38d61910 Include missing header to get missing declarations adds 946ffddcae Automatic date update in version.in adds 9809762324 Inherit sh_nbsd_nat_target from nbsd_nat_target adds a225c9a869 Add support for NetBSD threads in sh-nbsd-nat.c adds ecbbbdba71 Remove a double free in the BFD library triggered when parsi [...] adds 68e52bc7ec Fix a small set of Z80 problems. adds 327ef784ba Replace a couple of assertions in the BFD library that can b [...] adds d3c3c54293 Fix PR number in previous delta adds 2108a63a5a Add support for NetBSD threads in sparc-nat.c adds fe64b263e0 Automatic date update in version.in adds 5ccd2fb722 Rename the read symbol to xread adds d3e2a5e85d Include <alloca.h> conditionally adds 1c0aa1fbb2 Add support for NetBSD threads in amd64-bsd-nat.c adds fb516a6913 Add support for NetBSD threads in i386-bsd-nat.c adds 5a82b8a12b Namespace the reg class to avoid clashes with OS headers adds 53215f214c Non-contiguous memory regions support: Avoid calls to abort adds ac4bf06ca2 Fix seg-fault in strip when copying a file containing corrup [...] adds aef397a154 Non-contiguous memory regions support: Fix testcases after p [...] adds a9933ccf46 [gdb/testsuite] Add test-case gdb.dwarf2/break-inline-psymtab.exp adds cdf236890c Automatic date update in version.in adds 645ba68105 setup_archive parameter mismatch adds b966f55ffa Invalid read in process_netbsd_elf_note adds 1cb7d8b1af readelf leak in process_archive adds 81a65eb338 Don't use bfd.h in binutils/elfcomm.c adds effc14f54c Additional c99 elfxx-riscv.c fix adds d8c8b84859 [gdb/testsuite] Fix gdb.opt/inline-locals.exp KFAILs adds 724fd9ba43 gdb: Restructure the completion_tracker class adds 19a2740f7f gdb: Remove C++ symbol aliases from completion list adds 6b8c53f2f1 gdb/testsuite/fortran: Add mixed language stack test adds cada5fc921 gdb: Handle W and X remote packets without giving a warning adds ef3df11042 readelf.c: Use unsigned long to iterate over num_syms adds fcc7376e0a Avoid get_ptrace_pid() usage on NetBSD in x86-bsd-nat.c adds 6a541707f3 Fix assertion failure in the BFD library when called to pars [...] adds 2d07da271e [AArch64] When unavailable, fetch VG from ptrace. adds 3734bec833 Include: Sync lto-symtab.h and plugin-api.h with GCC adds f3a08f7778 Fix discrepancies in nm's --line-number output by adding sup [...] adds f09db38094 Disable get_ptrace_pid for NetBSD adds 9a6c68caa9 Add support for --no-rosegment option. adds ce2ea1c7e0 Automatic date update in version.in adds a859124df2 tidy elf_backend calls adds 833d919c93 PowerPC disassembly of odd sized sections adds fe90ae8a9f NDS32 disassembly of odd sized sections adds 340f3ac808 metag uninitialized memory read adds 67338173a4 XCOFF uninitialized read adds c02d66610b Silence warnings due to plugin API change adds c3a1714ce7 plugin: Use LDPT_ADD_SYMBOLS_V2 to get symbol type adds 3d98c46092 plugin: Don't invoke LTO-wrapper adds 5844b4657a Fix compile time warnings about the possibility of using uni [...] adds c7da12c72c Add support for NetBSD threads in ppc-nbsd-nat.c adds 0d832e7f5e Add support for the xdef and xref pseudo-ops to the Z80 assembler. adds 0dd7b8f788 [gdb/testsuite] Fix timeouts in gdb.threads/step-over-*.exp adds 4a90f06205 Add support for NetBSD threads in hppa-nbsd-nat.c adds 9faa006d11 Inherit ppc_nbsd_nat_target from nbsd_nat_target adds 70304be939 Fix Ada val_print removal regression adds 1773be9ea2 Fix column alignment in "maint info line-table" adds f67210ff1c Avoid stringop-truncation errors adds f7d4f0b1b9 Fix assert in c-exp.y adds 1ff700c202 Update the return type of gdb_ptrace to be more flexible adds c884cc4619 gdb: remove HAVE_DECL_PTRACE adds c623cc9089 [gdb/testsuite] Fix gdb.threads/omp-par-scope.exp XPASS adds fe26d3a34a Make dwarf2_evaluate_property parameter const adds d9fb0d7136 Automatic date update in version.in adds e3b1fa32c2 include: Sync lto-symtab.h and plugin-api.h with GCC adds da2efc2050 Automatic date update in version.in adds d1023b5d1e s12z disassembler tidy adds 03704c7704 NS32K arg_bufs uninitialised adds beea5cc1bc ARC: Use of uninitialised value adds 57cb32b3c3 H8300 use of uninitialised value adds c15a8f173e XCOFF64 uninitialised read adds 2957d8d054 Automatic date update in version.in adds 5935fd1530 gdb/testsuite: Remove hard coded addresses from expected results adds 5e737279c6 i386msdos uninitialised read adds cf28cfef60 ECOFF archive uninitialised read adds fdde2fb60c Mention .tdata in comment in _bfd_elf_tls_setup() adds 0636b24556 Avoid trigger an assertion failure in the STABS parser by re [...] adds 1ce0847daa Automatic date update in version.in adds 5a814d6d96 readelf memory leak in process_mips_specific adds 65109548f8 Overlarge allocation in _bfd_generic_read_ar_hdr_mag adds a64fafb545 [gdb] Print user for maint info psymtabs adds 7e6e972f74 bfd: Display symbol version for nm -D adds dfb68cc358 include: Sync plugin-api.h with GCC adds cda7e5603f bfd: Change num_group to unsigned int adds ec2e748ad3 Fix assertion failure in the BFD library when linking with - [...] adds 0b8448af68 Add code to the BFD library to handle opening files with pat [...] adds e11cd7c491 Update changelog. adds 5ab2fbf185 gdb: bool-ify follow_fork adds a18cd0cab4 Uninitialised memory read in z80-dis.c adds 1081065c51 bfd: Add a bfd_boolean argument to bfd_get_symbol_version_string adds 0d4a4bc56f Automatic date update in version.in adds d16e3d2e5b PR25662, invalid sh_offset for first section in segment with phdrs adds 86fd7e2e10 h8300-linux ld testsuite adds cf2611febc arc: Use correct string when printing bfd DEBUG data adds dd8953924b gdb/riscv: Apply NaN boxing when writing return values into [...] adds 7b1eff95be [gdb] Print user/includes fields for maint commands adds b778095777 The "b" flag for COFF sections only unsets the LOAD attribut [...] adds aac88046e6 Add a new function to the BFD library to allow users access [...] adds 4c83662712 readelf looping in process_archive adds d503b685c6 Fix WOW64 process system DLL paths adds 33aa3c10f6 Fix error message in compile-object-load.c adds 46b438bb73 Automatic date update in version.in adds f75fbe8ad2 alpha-vms: Sanity check ETIR__C_CTL_DFLOC index adds 4c4addbe57 Re: ARC: Use of uninitialised value adds ff76851054 Re: i386msdos uninitialised read adds 832a580781 Re: H8300 use of uninitialised value adds aa49fc22c1 Revert earlier delta adding bfd_coff_get_internal_extra_pe_a [...] adds 9fda78b611 Introduce dwarf2/dwz.h adds 0314b3901c Add dwz.c and dwz_file::read_string adds bf80d71052 Change dwarf_decode_macro_bytes calling convention adds 9eac9650ce Split dwarf_decode_macros into two overloads adds 3d27bbdb4b Move dwarf2_section_buffer_overflow_complaint to dwarf2/section.c adds a0194fa8f2 Convert dwarf2_section_buffer_overflow_complaint to a method adds 4f44ae6c69 Add dwarf2_section_info::read_string method adds c90ec28ae4 Move code to new file dwarf2/macro.c adds 8844c11b8b Make some line_header methods const adds 5a0e026fe1 Use a const line_header in macro reader adds 4f9c1eda9f Use a const dwarf2_section_info in macro reader adds 2ef46c2fbb Trivial fix in dwarf_decode_macro_bytes adds 86c0bb4c57 Convert read_indirect_line_string to a method adds 0df7ad3a67 Move more code to line-header.c adds c2d50fd0b3 Move die_info to new header adds 2b24b6e4a6 Remove dwarf2_cu::base_known adds 052c8bb83a Change dwarf2_attr_no_follow to be a method adds 436c571c6a Remove sibling_die adds a39fdb411d Change two more functions to be methods on die_info adds eeb647814f Rewrite new die_info methods adds 2b2558bfac Move DWARF-constant stringifying code to new file adds 0826b30a9f Change two functions to be methods on struct attribute adds a879b4d5a6 Support AT_BSDFLAGS on FreeBSD. adds 89ff19d45e Automatic date update in version.in adds 80e2a3b66e Re: readelf looping in process_archive adds 1fafefd594 Add testcase for PR 25662 invalid sh_offset for section adds 8f2dae6a6a gdbsupport: Resolve shellcheck issues in create-version.sh script adds cacb9d8713 ld: Skip some x86 IFUNC tests for Solaris adds 258e884429 ld: Xfail pr20995-2 tests for Solaris adds ebea762639 Always fix system DLL paths for 32bit programs adds 8f4afc7112 Automatic date update in version.in adds 6a81c59be7 Adjust objcopy_test adds 0a6a8b596b Re: Adjust objcopy_test adds 767be9d907 ld: Set COMMONPAGESIZE for i386 Solaris adds f1749218ff Fix formatting of read_attribute_reprocess adds 4d1b9ab645 Fix comment in dwarf2/attribute.h adds 37d59eacfe Automatic date update in version.in adds 3ad830466f gdb: remove discard_psymtab function adds 48993951ce gdb: rename partial_symtab::read_dependencies to expand_depe [...] adds 69b037c30c gdb: rename partial symtab expand functions of debug info re [...] adds 988b7300bc PR25745, powerpc64-ld overflows string buffer in --stats mode adds c9fef64dab Automatic date update in version.in adds c0502da688 [gdb/testsuite] Fix c-linkage-name.exp with {cc-with-gdb-ind [...] adds 1310c1b066 Add low_new_clone method to linux_nat_target. adds 4db10d8f49 [PowerPC] Move up some register access routines adds 227c0bf4b3 [PowerPC] Fix debug register issues in ppc-linux-nat adds 00386881a3 Fix objcopy's --preserve-dates command line option so that i [...] adds d8af906814 Change ada_which_variant_applies to value API adds d1a89da5de RISC-V: Update CSR to privileged spec 1.11. adds d262797294 Automatic date update in version.in adds b3b360dec7 tekhex: Uninitialised read adds 8169954446 alpha-vms: sanity checks for image_write adds 89b599df37 alpha-coff: unitialised read adds 16b0db75af [gdb/testsuite] Fix c-linkage-name.exp with -flto adds af62665e13 Don't pass NULL to memcpy in gdb adds 6f29a53415 Fix py-tui.c build problem adds 876678f05e PR 25611, PR 25614: GAS: Remove a double inclusion of "bignum.h" adds 283b7aa134 Automatic date update in version.in adds 7b948a2580 mmo.c: Fix ld testsuite regression "objcopy executable (pr25662)". adds 41ff29bf5d ld/testsuite/ld-scripts/defined4.d: Don't xfail mmix-*-*. adds 40bd13ced9 include: Sync plugin-api.h with GCC adds 15ccbdd717 Arm: Fix thumb2 PLT branch offsets. adds a7618269b7 Arm: Fix LSB of GOT for Thumb2 only PLT. adds 15d47c3a70 gas: Fix some x86_64 testcases for Solaris not using R_X86_6 [...] adds efc3a95039 x86: Force relocation against local absolute symbol adds 81e3a1d00c Updated Serbian translation for the gprof subdirectory adds 8c072cb6a1 Avoid some copying in psymtab.c adds e0802d5996 Avoid copying in lookup_name_info adds e139a727be gdb/remote: do not check for null_ptid in stop reply adds 77bf7b5317 Extend the linker's error message for missing libraries if t [...] adds 60e22c1eac Allow pointer arithmetic with integer references adds 3ce23ca1de Arm: Skip Thumb2 PLT tests on NaCL. adds a0714d305f gdb: define convenience function 'exists_non_stop_target' adds 53cccef118 gdb/infrun: stop all threads if there exists a non-stop target adds e033dfa92f Remove local variable from simple.rs test case adds 3d1cfd43be Move Rust union tests to new file adds 5b930b4538 Change how complex types are created adds 4c99290df0 Add accessors for members of complex numbers adds 981c08ce72 Change how complex types are printed in C adds fa649bb7d3 Change the C parser to allow complex constants adds c34e871466 Implement complex arithmetic adds 3638a098a2 Add _Complex type support to C parser adds 6b4a335bf7 Fix value_literal_complex comment adds 382aae0632 x86: Only allow S + A relocations against absolute symbol adds bbe3dc410b Fix the resizing condition of the line table adds 64dc2d4bd2 Fix an undefined behavior in record_line adds 2836752f8f gdb: fix style issues in is_linked_with_cygwin_dll adds 15f89256af Automatic date update in version.in adds cc77ed241b [gdb/testsuite] Accept new complex print style in mixed-lang [...] adds d321419811 [gdb] Use partial symbol table to find language for main adds 1aa98955b1 [gdb/ada] Fix -readnow FAILs adds 4f5bd88505 Replace "use use" in a warning message with "use". adds f32682eaca [gdb/testsuite] Fix silent timeout in gdb.multi/multi-target.exp adds 59e28a9767 [PATCH gas/m68k] Fix a register range check adds bb89747721 ld: Disable ifunc tests on Solaris adds 516231b7c7 linux-x86.exp: Compile with -I../bfd adds 4b27d27c07 Add support for intel SERIALIZE instruction adds a5863204fb gdbserver: make linux target op 'cannot_store_register' a pr [...] adds d16f3f6c70 gdbserver/linux-low: turn some static functions into private [...] adds ef0478f611 gdbserver/linux-low: start turning linux target ops into methods adds 797bcff595 gdbserver/linux-low: turn 'arch_setup' into a method adds aa8d21c9bb gdbserver/linux-low: turn 'regs_info' into a method adds daca57a7de gdbserver/linux-low: turn 'cannot_{fetch/store}_register' in [...] adds bd70b1f240 gdbserver/linux-low: turn 'fetch_register' into a method adds df95181f00 gdbserver/linux-low: turn some more static functions into pr [...] adds bf9ae9d8c3 gdbserver/linux-low: turn 'get_pc' and 'set_pc' into methods adds 06250e4e67 gdbserver/linux-low: turn 'breakpoint_kind_from_{pc, current [...] adds 3ca4edb661 gdbserver/linux-low: turn 'sw_breakpoint_from_kind' into a method adds 7582c77c1d gdbserver/linux-low: turn 'supports_software_single_step' an [...] adds d4807ea231 gdbserver/linux-low: turn the 'decr_pc_after_break' field in [...] adds d7146cda56 gdbserver/linux-low: turn 'breakpoint_at' into a method adds 007c9b975d gdbserver/linux-low: turn 'supports_z_point_type' into a method adds 9db9aa232a gdbserver/linux-low: turn 'insert_point' and 'remove_point' [...] adds ac1bbaca10 gdbserver/linux-low: turn watchpoint ops into methods adds b35db73327 gdbserver/linux-low: turn '{collect, supply}_ptrace_register [...] adds cb63de7ca8 gdbserver/linux-low: turn 'siginfo_fixup' into a method adds fd000fb3df gdbserver/linux-low: turn process/thread addition/deletion o [...] adds d7599cc082 gdbserver/linux-low: turn 'prepare_to_resume' into a method adds a5b5da9258 gdbserver/linux-low: turn 'process_qsupported' into a method adds 47f70aa768 gdbserver/linux-low: turn 'supports_tracepoints' into a method adds 13e567af27 gdbserver/linux-low: turn 'get_thread_area' into a method adds 809a0c354b gdbserver/linux-low: turn fast tracepoint ops into methods adds ab64c99982 gdbserver/linux-low: turn 'emit_ops' into a method adds 9cfd871551 gdbserver/linux-low: turn 'supports_range_stepping' into a method adds b31cdfa69f gdbserver/linux-low: turn 'supports_hardware_single_step' in [...] adds 9eedd27d42 gdbserver/linux-low: turn 'get_syscall_trapinfo' into a method adds fc5ecdb630 gdbserver/linux-low: turn 'get_ipa_tdesc_idx' into a method adds 0dd7b52ede gdbserver/linux-low: delete 'linux_target_ops' and 'the_low_target' adds 4d095f5b5e coff-go32-exe: support variable-length stubs adds 8be5def63b ld: Add NOCF_PROTECTION_CFLAGS to turn off -fcf-protection adds aa350065a4 NOCF_PROTECTION_CFLAGS: Replace nopie with available adds 880d97770b [gdb/testsuite] Don't use O2 for inlining in break-inline-ps [...] adds 6a35491162 gdb/testsuite: Add compiler options parameter to function_ra [...] adds 34e9a9fa0a gdb/testsuite: Add support for DW_LNS_set_file to DWARF compiler adds c90d28ac89 gdb: Don't remove duplicate entries from the line table adds e7da7f8f71 Micro-optimize partial_die_info::read adds 0830d30190 Avoid assertion failure due to complex type change adds e2ff18a0a5 gdb: replace some calls to internal_error with gdb_assert adds e0fc5c3fcb gdb: use bfd_get_section_contents to read section contents i [...] adds 492c3f03c7 Automatic date update in version.in adds d9e49b6169 Fix DWARF disassembly of DW_OP_const_type adds 9e7c9a03ee Fix attributes of typed enums of typedefs adds 2612e26d4d Automatic date update in version.in adds 3349112e38 elf: Remove zero-sized relocation section from section group adds d87e3802d9 Automatic date update in version.in No new revisions were added by this update. Summary of changes: ChangeLog | 15 + Makefile.def | 5 +- Makefile.in | 5 +- bfd/ChangeLog | 467 ++ bfd/archive.c | 15 +- bfd/bfd-in2.h | 39 +- bfd/bfd.c | 10 +- bfd/bfdio.c | 40 +- bfd/bfdwin.c | 1 + bfd/coff-alpha.c | 2 +- bfd/coff-i386.c | 22 +- bfd/coff-rs6000.c | 8 +- bfd/coff-stgo32.c | 449 +- bfd/coff64-rs6000.c | 4 +- bfd/coffcode.h | 9 - bfd/config.in | 6 - bfd/configure | 14 +- bfd/configure.ac | 10 +- bfd/dwarf2.c | 86 +- bfd/ecoff.c | 41 +- bfd/elf-bfd.h | 6 +- bfd/elf-linker-x86.h | 6 + bfd/elf.c | 482 +- bfd/elf32-arc.c | 4 +- bfd/elf32-arm.c | 18 +- bfd/elf32-csky.c | 8 + bfd/elf32-hppa.c | 27 + bfd/elf32-i386.c | 40 +- bfd/elf32-m68hc11.c | 8 + bfd/elf32-m68hc12.c | 8 + bfd/elf32-metag.c | 12 +- bfd/elf32-nios2.c | 11 + bfd/elf64-ppc.c | 114 +- bfd/elf64-x86-64.c | 81 +- bfd/elfcode.h | 42 +- bfd/elflink.c | 59 +- bfd/elfnn-aarch64.c | 14 +- bfd/elfnn-ia64.c | 7 +- bfd/elfxx-riscv.c | 3 +- bfd/elfxx-x86.c | 120 +- bfd/elfxx-x86.h | 29 +- bfd/i386msdos.c | 14 +- bfd/libbfd-in.h | 2 +- bfd/libbfd.h | 2 +- bfd/libcoff-in.h | 12 +- bfd/libcoff.h | 12 +- bfd/merge.c | 22 +- bfd/mmo.c | 6 +- bfd/peXXigen.c | 4 +- bfd/plugin.c | 487 +- bfd/plugin.h | 5 +- bfd/section.c | 31 +- bfd/syms.c | 1 + bfd/targets.c | 5 +- bfd/tekhex.c | 2 +- bfd/version.h | 2 +- bfd/vms-alpha.c | 134 +- binutils/ChangeLog | 200 + binutils/ar.c | 2 +- binutils/elfcomm.c | 68 +- binutils/elfcomm.h | 6 +- binutils/elfedit.c | 14 +- binutils/nm.c | 30 +- binutils/objcopy.c | 5 + binutils/objdump.c | 3 +- binutils/readelf.c | 579 +- binutils/testsuite/binutils-all/dw4.s | 1974 +++++ binutils/testsuite/binutils-all/nm.exp | 47 + binutils/testsuite/binutils-all/objcopy.exp | 97 +- binutils/testsuite/binutils-all/pr25662.ld | 15 + binutils/testsuite/binutils-all/pr25662.s | 34 + binutils/testsuite/lib/binutils-common.exp | 3 +- binutils/unwind-ia64.c | 21 +- binutils/wrstabs.c | 56 +- gas/ChangeLog | 133 + gas/config/obj-coff.c | 5 + gas/config/tc-arm.c | 15 +- gas/config/tc-i386.c | 3 + gas/config/tc-i386.h | 8 + gas/config/tc-m68k.c | 2 +- gas/config/tc-z80.c | 133 +- gas/config/tc-z80.h | 3 + gas/doc/c-i386.texi | 2 + gas/doc/c-z80.texi | 83 +- gas/dwarf2dbg.c | 1 - gas/testsuite/gas/arm/mve-vaddsub-it-bad.d | 6 + gas/testsuite/gas/arm/mve-vaddsub-it-bad.l | 7 + gas/testsuite/gas/arm/mve-vaddsub-it-bad.s | 11 + gas/testsuite/gas/arm/mve-vaddsub-it.d | 23 + gas/testsuite/gas/arm/mve-vaddsub-it.s | 17 + gas/testsuite/gas/arm/nomve-vaddsub-it.d | 24 + gas/testsuite/gas/elf/section12a.d | 2 +- gas/testsuite/gas/elf/section12b.d | 2 +- gas/testsuite/gas/elf/section16a.d | 2 +- gas/testsuite/gas/elf/section16b.d | 2 +- gas/testsuite/gas/i386/i386.exp | 2 + gas/testsuite/gas/i386/ilp32/x86-64-localpic.d | 4 +- gas/testsuite/gas/i386/localpic.d | 4 +- gas/testsuite/gas/i386/localpic.s | 2 + gas/testsuite/gas/i386/serialize.d | 12 + gas/testsuite/gas/i386/serialize.s | 5 + .../gas/i386/{ => solaris}/x86-64-branch-2.d | 5 +- .../gas/i386/{ => solaris}/x86-64-branch-3.d | 11 +- gas/testsuite/gas/i386/solaris/x86-64-jump.d | 16 +- .../gas/i386/solaris/x86-64-mpx-branch-1.d | 36 +- .../gas/i386/solaris/x86-64-mpx-branch-2.d | 28 +- gas/testsuite/gas/i386/x86-64-branch-2.d | 1 + gas/testsuite/gas/i386/x86-64-branch-3.d | 1 + gas/testsuite/gas/i386/x86-64-localpic.d | 4 +- gas/testsuite/gas/i386/x86-64-localpic.s | 2 + gas/testsuite/gas/i386/x86-64-serialize.d | 12 + gas/testsuite/gas/riscv/alias-csr.d | 23 - gas/testsuite/gas/riscv/alias-csr.s | 14 - gas/testsuite/gas/riscv/bad-csr.d | 3 - gas/testsuite/gas/riscv/csr-dw-regnums.d | 7 +- gas/testsuite/gas/riscv/csr-dw-regnums.s | 9 +- gas/testsuite/gas/riscv/no-aliases-csr.d | 23 - .../gas/riscv/priv-reg-fail-nonexistent.d | 3 + .../{bad-csr.l => priv-reg-fail-nonexistent.l} | 0 .../{bad-csr.s => priv-reg-fail-nonexistent.s} | 0 gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l | 4 +- gas/testsuite/gas/riscv/priv-reg-pseudo-noalias.d | 36 + gas/testsuite/gas/riscv/priv-reg-pseudo.d | 36 + gas/testsuite/gas/riscv/priv-reg-pseudo.s | 33 + gas/testsuite/gas/riscv/priv-reg.d | 491 +- gas/testsuite/gas/riscv/priv-reg.s | 114 +- gas/testsuite/gas/riscv/satp.d | 11 - gas/testsuite/gas/riscv/satp.s | 3 - gas/testsuite/gas/s12z/truncated.d | 6 +- gas/testsuite/gas/z80/colonless.d | 12 +- gas/testsuite/gas/z80/colonless.s | 4 + gas/testsuite/gas/z80/ez80_adl_all.d | 8 +- gas/testsuite/gas/z80/ez80_unsup_regs.d | 34 + gas/testsuite/gas/z80/ez80_z80_all.d | 8 +- gas/testsuite/gas/z80/gbz80_unsup_regs.d | 45 + gas/testsuite/gas/z80/r800_unsup_regs.d | 35 + gas/testsuite/gas/z80/unsup_regs.s | 71 + gas/testsuite/gas/z80/z180_unsup_regs.d | 39 + gas/testsuite/gas/z80/z80.exp | 87 +- gas/testsuite/gas/z80/z80_strict_unsup_regs.d | 39 + gas/testsuite/gas/z80/z80_unsup_regs.d | 34 + gas/testsuite/gas/z80/z80n_unsup_regs.d | 34 + gdb/ChangeLog | 1560 ++++ gdb/Makefile.in | 19 +- gdb/acinclude.m4 | 2 +- gdb/ada-lang.c | 51 +- gdb/ada-lang.h | 11 +- gdb/ada-tasks.c | 3 +- gdb/ada-valprint.c | 382 +- gdb/alpha-bsd-nat.c | 63 +- gdb/amd64-bsd-nat.c | 48 +- gdb/amd64-windows-tdep.c | 41 +- gdb/arc-tdep.c | 59 +- gdb/arc-tdep.h | 4 + gdb/arch/arc.c | 58 + gdb/arch/arc.h | 48 + gdb/arm-nbsd-nat.c | 154 +- gdb/arm-nbsd-tdep.c | 75 +- .../gdb.mi/mi-sym-info-2.c => arm-nbsd-tdep.h} | 34 +- gdb/arm-tdep.c | 4 +- gdb/breakpoint.c | 5 +- gdb/buildsym.c | 50 +- gdb/c-exp.y | 214 +- gdb/c-lang.c | 8 +- gdb/c-lang.h | 20 +- gdb/c-typeprint.c | 27 +- gdb/c-valprint.c | 270 +- gdb/compile/compile-object-load.c | 2 +- gdb/completer.c | 209 +- gdb/completer.h | 45 +- gdb/config.in | 4 - gdb/configure | 38 +- gdb/configure.ac | 7 +- gdb/configure.tgt | 12 +- gdb/corelow.c | 170 +- gdb/cp-valprint.c | 141 +- gdb/ctfread.c | 2 +- gdb/d-lang.c | 11 +- gdb/d-lang.h | 10 +- gdb/d-valprint.c | 22 +- gdb/dbxread.c | 10 +- gdb/defs.h | 31 - gdb/disasm-selftests.c | 5 - gdb/dwarf2/abbrev.c | 5 +- gdb/dwarf2/attribute.c | 37 + gdb/dwarf2/attribute.h | 18 +- gdb/dwarf2/die.h | 103 + gdb/{nbsd-nat.c => dwarf2/dwz.c} | 41 +- gdb/dwarf2/dwz.h | 65 + gdb/dwarf2/index-cache.c | 1 + gdb/dwarf2/index-write.c | 1 + gdb/dwarf2/line-header.c | 339 +- gdb/dwarf2/line-header.h | 32 +- gdb/dwarf2/loc.c | 10 +- gdb/dwarf2/loc.h | 2 +- gdb/dwarf2/macro.c | 868 +++ .../gdb.mi/mi-sym-info-2.c => dwarf2/macro.h} | 38 +- gdb/dwarf2/read.c | 1787 +---- gdb/dwarf2/read.h | 45 +- gdb/dwarf2/section.c | 26 + gdb/dwarf2/section.h | 9 + gdb/dwarf2/stringify.c | 114 + gdb/dwarf2/stringify.h | 38 + gdb/eval.c | 20 +- gdb/exec.c | 10 +- gdb/extension-priv.h | 17 +- gdb/extension.c | 19 +- gdb/extension.h | 6 +- gdb/f-lang.c | 18 +- gdb/f-lang.h | 9 +- gdb/f-valprint.c | 62 +- gdb/fbsd-nat.c | 6 +- gdb/fbsd-nat.h | 2 +- gdb/fbsd-tdep.c | 1 + gdb/features/Makefile | 6 +- gdb/features/arc-arcompact.c | 74 - gdb/features/arc-arcompact.xml | 85 - gdb/features/arc-v2.c | 78 - gdb/features/arc-v2.xml | 92 - gdb/features/arc/aux-arcompact.c | 31 + gdb/features/arc/aux-arcompact.xml | 28 + gdb/features/arc/aux-v2.c | 35 + gdb/features/arc/aux-v2.xml | 32 + gdb/features/arc/core-arcompact.c | 47 + gdb/features/arc/core-arcompact.xml | 58 + gdb/features/arc/core-v2.c | 47 + gdb/features/arc/core-v2.xml | 61 + gdb/features/riscv/32bit-csr.xml | 5 +- gdb/features/riscv/64bit-csr.xml | 5 +- gdb/gdb_bfd.c | 14 +- gdb/gdb_bfd.h | 9 + gdb/gdbarch-selftests.c | 4 - gdb/gdbarch.h | 1 + gdb/gdbarch.sh | 1 + gdb/gdbcore.h | 68 - gdb/gdbtypes.c | 58 +- gdb/gdbtypes.h | 9 +- gdb/go-lang.c | 8 +- gdb/go-lang.h | 10 +- gdb/go-valprint.c | 16 +- gdb/guile/guile-internal.h | 5 +- gdb/guile/scm-pretty-print.c | 16 +- gdb/guile/scm-value.c | 18 + gdb/hppa-nbsd-nat.c | 14 +- gdb/i386-bsd-nat.c | 63 +- gdb/{i386-cygwin-tdep.c => i386-windows-tdep.c} | 45 +- gdb/inf-ptrace.c | 53 +- gdb/inf-ptrace.h | 9 +- gdb/infcmd.c | 12 +- gdb/infrun.c | 41 +- gdb/language.c | 18 +- gdb/language.h | 25 +- gdb/linux-nat.c | 10 +- gdb/linux-nat.h | 6 +- gdb/linux-tdep.c | 4 +- gdb/m2-lang.c | 2 +- gdb/m2-lang.h | 8 +- gdb/m2-valprint.c | 95 +- gdb/m68k-bsd-nat.c | 27 +- gdb/mdebugread.c | 23 +- gdb/mi/mi-main.c | 4 +- gdb/minsyms.c | 2 +- gdb/mips-nbsd-nat.c | 2 + gdb/mips-tdep.c | 5 +- gdb/nat/aarch64-sve-linux-ptrace.c | 21 +- gdb/nat/gdb_ptrace.h | 8 - gdb/nbsd-nat.c | 22 +- gdb/objc-lang.c | 2 +- gdb/opencl-lang.c | 2 +- gdb/osabi.c | 1 + gdb/osabi.h | 32 + gdb/p-lang.c | 2 +- gdb/p-lang.h | 16 +- gdb/p-valprint.c | 161 +- gdb/ppc-linux-nat.c | 1518 ++-- gdb/ppc-nbsd-nat.c | 19 +- gdb/printcmd.c | 5 +- gdb/psympriv.h | 8 +- gdb/psymtab.c | 155 +- gdb/psymtab.h | 6 + gdb/ptrace.m4 | 6 +- gdb/python/py-prettyprint.c | 17 +- gdb/python/py-tui.c | 8 +- gdb/python/py-value.c | 21 + gdb/python/python-internal.h | 5 +- gdb/regformats/regdef.h | 4 + gdb/remote.c | 70 +- gdb/riscv-tdep.c | 81 +- gdb/rust-lang.c | 120 +- gdb/sh-nbsd-nat.c | 11 +- gdb/sparc-nat.c | 50 +- gdb/stabsread.c | 8 +- gdb/stack.c | 2 +- gdb/symfile-debug.c | 1 + gdb/symfile-mem.c | 2 +- gdb/symfile.c | 11 +- gdb/symfile.h | 11 + gdb/symmisc.c | 83 +- gdb/symtab.c | 78 +- gdb/symtab.h | 62 +- gdb/target-delegates.c | 24 +- gdb/target-descriptions.c | 3 +- gdb/target.c | 33 +- gdb/target.h | 9 +- gdb/testsuite/ChangeLog | 287 + .../complex.exp => gdb.ada/sub_variant.exp} | 37 +- gdb/testsuite/gdb.ada/sub_variant/subv.adb | 45 + gdb/testsuite/gdb.arch/amd64-disp-step-avx.S | 5 + gdb/testsuite/gdb.arch/amd64-disp-step-avx.exp | 8 +- gdb/testsuite/gdb.base/break-interp.exp | 286 +- gdb/testsuite/gdb.base/c-linkage-name.exp | 45 +- gdb/testsuite/gdb.base/callfuncs.exp | 6 +- gdb/testsuite/gdb.base/complex-parts.exp | 37 +- gdb/testsuite/gdb.base/complex.exp | 4 +- gdb/testsuite/gdb.base/cvexpr.exp | 11 + gdb/testsuite/gdb.base/endianity.exp | 4 +- gdb/testsuite/gdb.base/floatn.exp | 13 +- gdb/testsuite/gdb.base/funcargs.exp | 20 +- gdb/testsuite/gdb.base/info-types.exp | 40 +- .../gdb.base/{complex.exp => main-psymtab.exp} | 33 +- gdb/testsuite/gdb.base/maint.exp | 45 +- gdb/testsuite/gdb.base/printcmds.c | 3 + gdb/testsuite/gdb.base/printcmds.exp | 3 + gdb/testsuite/gdb.base/varargs.exp | 6 +- gdb/testsuite/gdb.compile/compile-cplus.exp | 2 +- gdb/testsuite/gdb.compile/compile.exp | 2 +- gdb/testsuite/gdb.cp/misc.cc | 3 + gdb/testsuite/gdb.cp/misc.exp | 8 + gdb/testsuite/gdb.cp/step-and-next-inline.exp | 4 + .../mi-sym-info-2.c => gdb.cp/typed-enum.cc} | 34 +- .../complex.exp => gdb.cp/typed-enum.exp} | 28 +- .../break-inline-psymtab-2.c} | 30 +- .../break-inline-psymtab.c} | 29 +- .../break-inline-psymtab.exp} | 30 +- .../dw2-inline-small-func-lbls.c} | 42 +- .../dw2-inline-small-func.c} | 33 +- gdb/testsuite/gdb.dwarf2/dw2-inline-small-func.exp | 158 + .../dw2-inline-small-func.h} | 32 +- gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp | 8 +- gdb/testsuite/gdb.dwarf2/imported-unit.exp | 13 + gdb/testsuite/gdb.fortran/mixed-lang-stack.c | 37 + gdb/testsuite/gdb.fortran/mixed-lang-stack.cpp | 85 + gdb/testsuite/gdb.fortran/mixed-lang-stack.exp | 163 + gdb/testsuite/gdb.fortran/mixed-lang-stack.f90 | 116 + gdb/testsuite/gdb.fortran/module.exp | 37 +- .../gdb.linespec/cp-completion-aliases.cc | 73 + .../gdb.linespec/cp-completion-aliases.exp | 54 + gdb/testsuite/gdb.linespec/explicit.exp | 20 +- gdb/testsuite/gdb.mi/mi-fortran-modules.exp | 116 +- gdb/testsuite/gdb.mi/mi-sym-info-2.c | 5 + gdb/testsuite/gdb.mi/mi-sym-info.exp | 190 +- gdb/testsuite/gdb.multi/multi-target.exp | 24 +- .../stop-all-on-exit.c} | 30 +- gdb/testsuite/gdb.multi/stop-all-on-exit.exp | 64 + gdb/testsuite/gdb.opt/inline-locals.exp | 26 +- .../inline-small-func.c} | 33 +- gdb/testsuite/gdb.opt/inline-small-func.exp | 60 + .../inline-small-func.h} | 32 +- gdb/testsuite/gdb.rust/simple.exp | 13 - gdb/testsuite/gdb.rust/simple.rs | 13 - .../{gdb.base/complex.exp => gdb.rust/union.exp} | 36 +- gdb/testsuite/gdb.rust/union.rs | 35 + gdb/testsuite/gdb.server/exit-multiple-threads.c | 202 + gdb/testsuite/gdb.server/exit-multiple-threads.exp | 136 + gdb/testsuite/gdb.server/solib-list.exp | 17 +- gdb/testsuite/gdb.server/stop-reply-no-thread.exp | 24 +- .../attach-many-short-lived-threads.exp | 16 +- gdb/testsuite/gdb.threads/execl.exp | 7 + gdb/testsuite/gdb.threads/omp-par-scope.exp | 4 +- .../gdb.threads/step-over-lands-on-breakpoint.exp | 5 +- .../gdb.threads/step-over-trips-on-watchpoint.exp | 5 +- .../gdb.tui/tui-layout-asm-short-prog.exp | 2 +- gdb/testsuite/gdb.tui/tui-layout-asm.exp | 2 +- gdb/testsuite/lib/cache.exp | 37 +- gdb/testsuite/lib/completion-support.exp | 27 +- gdb/testsuite/lib/dwarf.exp | 9 +- gdb/testsuite/lib/gdb.exp | 75 +- gdb/testsuite/lib/gdbserver-support.exp | 40 +- gdb/testsuite/lib/tuiterm.exp | 15 +- gdb/type-stack.c | 76 +- gdb/type-stack.h | 2 + gdb/user-regs.c | 21 +- gdb/utils.c | 4 +- gdb/valarith.c | 199 +- gdb/valops.c | 31 +- gdb/valprint.c | 452 +- gdb/valprint.h | 50 +- gdb/value.c | 5 +- gdb/value.h | 19 +- gdb/vax-bsd-nat.c | 17 +- gdb/windows-nat.c | 49 +- gdb/windows-tdep.c | 98 + gdb/windows-tdep.h | 6 + gdb/x86-bsd-nat.c | 29 +- gdb/xcoffread.c | 8 +- gdbserver/ChangeLog | 2029 +++++ gdbserver/Makefile.in | 100 +- gdbserver/acinclude.m4 | 5 +- gdbserver/config.in | 8 +- gdbserver/configure | 4966 ++++++------ gdbserver/configure.ac | 16 +- gdbserver/linux-aarch64-low.cc | 377 +- gdbserver/linux-arm-low.cc | 262 +- gdbserver/linux-bfin-low.cc | 138 +- gdbserver/linux-cris-low.cc | 107 +- gdbserver/linux-crisv32-low.cc | 180 +- gdbserver/linux-ia64-low.cc | 86 +- gdbserver/linux-low.cc | 1105 ++- gdbserver/linux-low.h | 549 +- gdbserver/linux-m32r-low.cc | 134 +- gdbserver/linux-m68k-low.cc | 139 +- gdbserver/linux-mips-low.cc | 290 +- gdbserver/linux-nios2-low.cc | 125 +- gdbserver/linux-ppc-low.cc | 281 +- gdbserver/linux-riscv-low.cc | 130 +- gdbserver/linux-s390-low.cc | 258 +- gdbserver/linux-sh-low.cc | 137 +- gdbserver/linux-sparc-low.cc | 100 +- gdbserver/linux-tic6x-low.cc | 133 +- gdbserver/linux-tile-low.cc | 145 +- gdbserver/linux-x86-low.cc | 371 +- gdbserver/linux-xtensa-low.cc | 135 +- gdbserver/proc-service.cc | 2 +- gdbserver/regcache.cc | 2 +- gdbserver/tdesc.cc | 2 +- gdbserver/tdesc.h | 2 +- gdbserver/thread-db.cc | 2 +- gdbsupport/ChangeLog | 39 + gdbsupport/Makefile.in | 3 +- gdbsupport/acinclude.m4 | 2 +- gdbsupport/btrace-common.cc | 3 +- gdbsupport/common-defs.h | 18 +- gdbsupport/common-types.h | 32 +- gdbsupport/common.m4 | 3 + gdbsupport/config.in | 4 - gdbsupport/configure | 34 +- gdbsupport/configure.ac | 3 - gdbsupport/create-version.sh | 18 +- {gdb => gdbsupport}/selftest.m4 | 7 +- gold/ChangeLog | 4 + gold/options.h | 2 +- gprof/ChangeLog | 4 + gprof/po/sr.po | 49 +- include/ChangeLog | 72 + include/bfdlink.h | 12 +- include/coff/go32exe.h | 36 - include/coff/internal.h | 13 +- include/elf/common.h | 3 + include/elf/internal.h | 30 +- include/lto-symtab.h | 13 + include/opcode/riscv-opc.h | 25 +- include/plugin-api.h | 93 +- ld/ChangeLog | 355 + ld/Makefile.am | 2 + ld/Makefile.in | 3 + ld/NEWS | 3 + ld/emulparams/elf32_x86_64.sh | 1 + ld/emulparams/elf_i386.sh | 1 + ld/emulparams/elf_i386_ldso.sh | 1 + ld/emulparams/elf_x86_64.sh | 1 + ld/emulparams/static.sh | 12 + ld/emultempl/armelf.em | 3 +- ld/emultempl/elf-x86.em | 1 + ld/emultempl/pe.em | 5 +- ld/emultempl/pep.em | 5 +- ld/emultempl/xtensaelf.em | 4 + ld/ld.texi | 42 + ld/ldexp.c | 3 +- ld/ldfile.c | 16 + ld/ldlang.c | 139 +- ld/ldlex.h | 2 + ld/lexsup.c | 10 + ld/pe-dll.c | 4 +- ld/po/BLD-POTFILES.in | 1 + ld/testplug.c | 5 +- ld/testplug2.c | 5 +- ld/testplug3.c | 5 +- ld/testplug4.c | 5 +- ld/testsuite/config/default.exp | 38 + ld/testsuite/ld-arm/arm-elf.exp | 12 + ld/testsuite/ld-arm/non-contiguous-arm.d | 4 + ld/testsuite/ld-arm/non-contiguous-arm.ld | 34 + ld/testsuite/ld-arm/non-contiguous-arm.s | 35 + ld/testsuite/ld-arm/non-contiguous-arm2.d | 77 + ld/testsuite/ld-arm/non-contiguous-arm2.ld | 33 + ld/testsuite/ld-arm/non-contiguous-arm3.d | 83 + ld/testsuite/ld-arm/non-contiguous-arm3.ld | 33 + ld/testsuite/ld-arm/non-contiguous-arm4.d | 4 + ld/testsuite/ld-arm/non-contiguous-arm4.ld | 34 + ld/testsuite/ld-arm/non-contiguous-arm5.d | 77 + ld/testsuite/ld-arm/non-contiguous-arm5.ld | 34 + ld/testsuite/ld-arm/non-contiguous-arm6.d | 77 + ld/testsuite/ld-arm/non-contiguous-arm6.ld | 33 + ld/testsuite/ld-arm/thumb-plt-got.d | 14 + ld/testsuite/ld-arm/thumb-plt.d | 34 + ld/testsuite/ld-arm/thumb-plt.s | 18 + ld/testsuite/ld-elf/compress1c.d | 1 + ld/testsuite/ld-elf/compressed1c.d | 1 + ld/testsuite/ld-elf/compressed1e.d | 2 +- ld/testsuite/ld-elf/dynamic1.d | 1 + ld/testsuite/ld-elf/dynsym1.d | 1 + ld/testsuite/ld-elf/ehdr_start-shared.d | 2 +- ld/testsuite/ld-elf/exclude3b.d | 1 + ld/testsuite/ld-elf/export-class.exp | 2 +- ld/testsuite/ld-elf/global1.d | 1 + ld/testsuite/ld-elf/hash.d | 1 + ld/testsuite/ld-elf/linux-x86.exp | 200 +- ld/testsuite/ld-elf/loadaddr1.d | 1 + ld/testsuite/ld-elf/loadaddr2.d | 1 + ld/testsuite/ld-elf/local1.d | 1 + ld/testsuite/ld-elf/mbind1b.d | 1 + ld/testsuite/ld-elf/mbind1c.d | 1 + ld/testsuite/ld-elf/non-contiguous.d | 28 + ld/testsuite/ld-elf/non-contiguous.ld | 47 + ld/testsuite/ld-elf/non-contiguous.s | 21 + ld/testsuite/ld-elf/now-1.d | 1 + ld/testsuite/ld-elf/now-2.d | 1 + ld/testsuite/ld-elf/now-3.d | 1 + ld/testsuite/ld-elf/now-4.d | 1 + ld/testsuite/ld-elf/pie.d | 1 + ld/testsuite/ld-elf/pr12975.d | 2 +- ld/testsuite/ld-elf/pr13177.d | 2 +- ld/testsuite/ld-elf/pr13195.d | 2 +- ld/testsuite/ld-elf/pr16322.d | 1 + ld/testsuite/ld-elf/pr16498a.d | 1 + ld/testsuite/ld-elf/pr16498b.d | 1 + ld/testsuite/ld-elf/pr17615.d | 2 +- ld/testsuite/ld-elf/pr19162.d | 2 +- ld/testsuite/ld-elf/pr19539.d | 2 +- ld/testsuite/ld-elf/pr19617a.d | 1 + ld/testsuite/ld-elf/pr19698.d | 1 + ld/testsuite/ld-elf/pr20513c.d | 1 + ld/testsuite/ld-elf/pr20513d.d | 1 + ld/testsuite/ld-elf/pr21389a.d | 1 + ld/testsuite/ld-elf/pr21389b.d | 1 + ld/testsuite/ld-elf/pr21389c.d | 1 + ld/testsuite/ld-elf/pr21562a.d | 2 +- ld/testsuite/ld-elf/pr21562b.d | 2 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ld/testsuite/ld-elf/pr25754-6b.s | 12 + ld/testsuite/ld-elf/rpath-1.d | 1 + ld/testsuite/ld-elf/rpath-2.d | 1 + ld/testsuite/ld-elf/runpath-1.d | 1 + ld/testsuite/ld-elf/runpath-2.d | 1 + ld/testsuite/ld-elf/sizeofb.d | 1 + ld/testsuite/ld-elf/startofb.d | 1 + ld/testsuite/ld-elf/strtab.d | 1 + ld/testsuite/ld-elf/textaddr1.d | 1 + ld/testsuite/ld-elf/textaddr2.d | 1 + ld/testsuite/ld-elf/textaddr4.d | 1 + ld/testsuite/ld-elf/textaddr5.d | 1 + ld/testsuite/ld-elf/textaddr6.d | 1 + ld/testsuite/ld-elf/unknown2.d | 1 + ld/testsuite/ld-h8300/gcsection.d | 5 +- ld/testsuite/ld-h8300/h8300.exp | 19 +- ld/testsuite/ld-h8300/relax-2.d | 4 +- ld/testsuite/ld-h8300/relax-3.d | 4 +- ld/testsuite/ld-h8300/relax-4.d | 4 +- ld/testsuite/ld-h8300/relax-5.d | 4 +- ld/testsuite/ld-h8300/relax-6.d | 4 +- ld/testsuite/ld-h8300/relax-7.d | 4 +- ld/testsuite/ld-h8300/relax.d | 2 +- ld/testsuite/ld-ifunc/ifunc-10-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-11-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-12-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-13-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14c-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14d-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14e-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-14f-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-15-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-16-i386-now.d | 2 +- ld/testsuite/ld-ifunc/ifunc-16-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-17a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-17b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-18a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-18b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-19a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-19b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-2-i386-now.d | 2 +- ld/testsuite/ld-ifunc/ifunc-2-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-2-local-i386-now.d | 2 +- ld/testsuite/ld-ifunc/ifunc-2-local-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-20-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-21-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-22-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5a-local-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5b-local-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-5r-local-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-6a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-6b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-7a-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-7b-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-8-i386.d | 2 +- ld/testsuite/ld-ifunc/ifunc-9-i386.d | 2 +- ld/testsuite/ld-ifunc/pr17154-i386-now.d | 2 +- ld/testsuite/ld-ifunc/pr17154-i386.d | 2 +- ld/testsuite/ld-plugin/lto.exp | 15 +- ld/testsuite/ld-powerpc/non-contiguous-powerpc.d | 5 + ld/testsuite/ld-powerpc/non-contiguous-powerpc.ld | 22 + ld/testsuite/ld-powerpc/non-contiguous-powerpc.s | 8 + ld/testsuite/ld-powerpc/non-contiguous-powerpc64.d | 5 + ld/testsuite/ld-powerpc/powerpc.exp | 3 + ld/testsuite/ld-scripts/defined4.d | 4 +- ld/testsuite/ld-srec/srec.exp | 8 +- ld/testsuite/ld-undefined/entry-3.d | 1 + ld/testsuite/ld-undefined/entry-4.d | 1 + ld/testsuite/ld-x86-64/pr19609-6a.d | 11 +- ld/testsuite/ld-x86-64/x86-64.exp | 10 +- opcodes/ChangeLog | 111 + opcodes/arc-dis.c | 11 +- opcodes/disassemble.c | 10 +- opcodes/disassemble.h | 6 + opcodes/h8300-dis.c | 261 +- opcodes/i386-dis.c | 8 +- opcodes/i386-gen.c | 5 + opcodes/i386-init.h | 358 +- opcodes/i386-opc.h | 3 + opcodes/i386-opc.tbl | 6 + opcodes/i386-tbl.h | 7970 ++++++++++---------- opcodes/metag-dis.c | 10 +- opcodes/nds32-dis.c | 24 +- opcodes/ns32k-dis.c | 19 +- opcodes/ppc-dis.c | 28 +- opcodes/s12z-dis.c | 14 +- opcodes/s12z-opc.c | 1030 ++- opcodes/z80-dis.c | 28 +- sim/ppc/ChangeLog | 8 + sim/ppc/emul_netbsd.c | 51 +- 683 files changed, 31531 insertions(+), 17726 deletions(-) create mode 100644 binutils/testsuite/binutils-all/dw4.s create mode 100644 binutils/testsuite/binutils-all/pr25662.ld create mode 100644 binutils/testsuite/binutils-all/pr25662.s create mode 100644 gas/testsuite/gas/arm/mve-vaddsub-it-bad.d create mode 100644 gas/testsuite/gas/arm/mve-vaddsub-it-bad.l create mode 100644 gas/testsuite/gas/arm/mve-vaddsub-it-bad.s create mode 100644 gas/testsuite/gas/arm/mve-vaddsub-it.d create mode 100644 gas/testsuite/gas/arm/mve-vaddsub-it.s create mode 100644 gas/testsuite/gas/arm/nomve-vaddsub-it.d create mode 100644 gas/testsuite/gas/i386/serialize.d create mode 100644 gas/testsuite/gas/i386/serialize.s copy gas/testsuite/gas/i386/{ => solaris}/x86-64-branch-2.d (88%) copy gas/testsuite/gas/i386/{ => solaris}/x86-64-branch-3.d (80%) create mode 100644 gas/testsuite/gas/i386/x86-64-serialize.d delete mode 100644 gas/testsuite/gas/riscv/alias-csr.d delete mode 100644 gas/testsuite/gas/riscv/alias-csr.s delete mode 100644 gas/testsuite/gas/riscv/bad-csr.d delete mode 100644 gas/testsuite/gas/riscv/no-aliases-csr.d create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-nonexistent.d rename gas/testsuite/gas/riscv/{bad-csr.l => priv-reg-fail-nonexistent.l} (100%) rename gas/testsuite/gas/riscv/{bad-csr.s => priv-reg-fail-nonexistent.s} (100%) create mode 100644 gas/testsuite/gas/riscv/priv-reg-pseudo-noalias.d create mode 100644 gas/testsuite/gas/riscv/priv-reg-pseudo.d create mode 100644 gas/testsuite/gas/riscv/priv-reg-pseudo.s delete mode 100644 gas/testsuite/gas/riscv/satp.d delete mode 100644 gas/testsuite/gas/riscv/satp.s create mode 100644 gas/testsuite/gas/z80/ez80_unsup_regs.d create mode 100644 gas/testsuite/gas/z80/gbz80_unsup_regs.d create mode 100644 gas/testsuite/gas/z80/r800_unsup_regs.d create mode 100644 gas/testsuite/gas/z80/unsup_regs.s create mode 100644 gas/testsuite/gas/z80/z180_unsup_regs.d create mode 100644 gas/testsuite/gas/z80/z80_strict_unsup_regs.d create mode 100644 gas/testsuite/gas/z80/z80_unsup_regs.d create mode 100644 gas/testsuite/gas/z80/z80n_unsup_regs.d create mode 100644 gdb/arch/arc.c create mode 100644 gdb/arch/arc.h copy gdb/{testsuite/gdb.mi/mi-sym-info-2.c => arm-nbsd-tdep.h} (65%) create mode 100644 gdb/dwarf2/die.h copy gdb/{nbsd-nat.c => dwarf2/dwz.c} (50%) create mode 100644 gdb/dwarf2/dwz.h create mode 100644 gdb/dwarf2/macro.c copy gdb/{testsuite/gdb.mi/mi-sym-info-2.c => dwarf2/macro.h} (58%) create mode 100644 gdb/dwarf2/stringify.c create mode 100644 gdb/dwarf2/stringify.h delete mode 100644 gdb/features/arc-arcompact.c delete mode 100644 gdb/features/arc-arcompact.xml delete mode 100644 gdb/features/arc-v2.c delete mode 100644 gdb/features/arc-v2.xml create mode 100644 gdb/features/arc/aux-arcompact.c create mode 100644 gdb/features/arc/aux-arcompact.xml create mode 100644 gdb/features/arc/aux-v2.c create mode 100644 gdb/features/arc/aux-v2.xml create mode 100644 gdb/features/arc/core-arcompact.c create mode 100644 gdb/features/arc/core-arcompact.xml create mode 100644 gdb/features/arc/core-v2.c create mode 100644 gdb/features/arc/core-v2.xml rename gdb/{i386-cygwin-tdep.c => i386-windows-tdep.c} (83%) copy gdb/testsuite/{gdb.base/complex.exp => gdb.ada/sub_variant.exp} (50%) create mode 100644 gdb/testsuite/gdb.ada/sub_variant/subv.adb copy gdb/testsuite/gdb.base/{complex.exp => main-psymtab.exp} (52%) copy gdb/testsuite/{gdb.mi/mi-sym-info-2.c => gdb.cp/typed-enum.cc} (63%) copy gdb/testsuite/{gdb.base/complex.exp => gdb.cp/typed-enum.exp} (58%) copy gdb/testsuite/{gdb.mi/mi-sym-info-2.c => gdb.dwarf2/break-inline-psymtab-2.c} (63%) copy gdb/testsuite/{gdb.mi/mi-sym-info-2.c => gdb.dwarf2/break-inline-psymtab.c} (63%) copy gdb/testsuite/{gdb.base/complex.exp => gdb.dwarf2/break-inline-psymtab.exp} (54%) copy gdb/testsuite/{gdb.mi/mi-sym-info-2.c => gdb.dwarf2/dw2-inline-small-func-lbl [...] copy gdb/testsuite/{gdb.mi/mi-sym-info-2.c => gdb.dwarf2/dw2-inline-small-func.c} (62%) create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-inline-small-func.exp copy gdb/testsuite/{gdb.mi/mi-sym-info-2.c => gdb.dwarf2/dw2-inline-small-func.h} (62%) create mode 100644 gdb/testsuite/gdb.fortran/mixed-lang-stack.c create mode 100644 gdb/testsuite/gdb.fortran/mixed-lang-stack.cpp create mode 100644 gdb/testsuite/gdb.fortran/mixed-lang-stack.exp create mode 100644 gdb/testsuite/gdb.fortran/mixed-lang-stack.f90 create mode 100644 gdb/testsuite/gdb.linespec/cp-completion-aliases.cc create mode 100644 gdb/testsuite/gdb.linespec/cp-completion-aliases.exp copy gdb/testsuite/{gdb.mi/mi-sym-info-2.c => gdb.multi/stop-all-on-exit.c} (63%) create mode 100644 gdb/testsuite/gdb.multi/stop-all-on-exit.exp copy gdb/testsuite/{gdb.mi/mi-sym-info-2.c => gdb.opt/inline-small-func.c} (62%) create mode 100644 gdb/testsuite/gdb.opt/inline-small-func.exp copy gdb/testsuite/{gdb.mi/mi-sym-info-2.c => gdb.opt/inline-small-func.h} (62%) copy gdb/testsuite/{gdb.base/complex.exp => gdb.rust/union.exp} (50%) create mode 100644 gdb/testsuite/gdb.rust/union.rs create mode 100644 gdb/testsuite/gdb.server/exit-multiple-threads.c create mode 100644 gdb/testsuite/gdb.server/exit-multiple-threads.exp rename {gdb => gdbsupport}/selftest.m4 (84%) delete mode 100644 include/coff/go32exe.h create mode 100644 ld/emulparams/static.sh create mode 100644 ld/testsuite/ld-arm/non-contiguous-arm.d create mode 100644 ld/testsuite/ld-arm/non-contiguous-arm.ld create mode 100644 ld/testsuite/ld-arm/non-contiguous-arm.s create mode 100644 ld/testsuite/ld-arm/non-contiguous-arm2.d create mode 100644 ld/testsuite/ld-arm/non-contiguous-arm2.ld create mode 100644 ld/testsuite/ld-arm/non-contiguous-arm3.d create mode 100644 ld/testsuite/ld-arm/non-contiguous-arm3.ld create mode 100644 ld/testsuite/ld-arm/non-contiguous-arm4.d create mode 100644 ld/testsuite/ld-arm/non-contiguous-arm4.ld create mode 100644 ld/testsuite/ld-arm/non-contiguous-arm5.d create mode 100644 ld/testsuite/ld-arm/non-contiguous-arm5.ld create mode 100644 ld/testsuite/ld-arm/non-contiguous-arm6.d create mode 100644 ld/testsuite/ld-arm/non-contiguous-arm6.ld create mode 100644 ld/testsuite/ld-arm/thumb-plt-got.d create mode 100644 ld/testsuite/ld-arm/thumb-plt.d create mode 100644 ld/testsuite/ld-arm/thumb-plt.s create mode 100644 ld/testsuite/ld-elf/non-contiguous.d create mode 100644 ld/testsuite/ld-elf/non-contiguous.ld create mode 100644 ld/testsuite/ld-elf/non-contiguous.s create mode 100644 ld/testsuite/ld-elf/pr24920.err create mode 100644 ld/testsuite/ld-elf/pr25708.d create mode 100644 ld/testsuite/ld-elf/pr25749-1.c create mode 100644 ld/testsuite/ld-elf/pr25749-1a.c create mode 100644 ld/testsuite/ld-elf/pr25749-1b.c create mode 100644 ld/testsuite/ld-elf/pr25749-1b.err create mode 100644 ld/testsuite/ld-elf/pr25749-1c.c create mode 100644 ld/testsuite/ld-elf/pr25749-1d.c create mode 100644 ld/testsuite/ld-elf/pr25749-2.c create mode 100644 ld/testsuite/ld-elf/pr25749-2a.s create mode 100644 ld/testsuite/ld-elf/pr25749-2b.s create mode 100644 ld/testsuite/ld-elf/pr25749.rd create mode 100644 ld/testsuite/ld-elf/pr25754-1a.c create mode 100644 ld/testsuite/ld-elf/pr25754-1b.s create mode 100644 ld/testsuite/ld-elf/pr25754-2a.c create mode 100644 ld/testsuite/ld-elf/pr25754-2b.s create mode 100644 ld/testsuite/ld-elf/pr25754-3a.c create mode 100644 ld/testsuite/ld-elf/pr25754-3b.s create mode 100644 ld/testsuite/ld-elf/pr25754-4a.c create mode 100644 ld/testsuite/ld-elf/pr25754-4b.s create mode 100644 ld/testsuite/ld-elf/pr25754-4c.s create mode 100644 ld/testsuite/ld-elf/pr25754-5a.c create mode 100644 ld/testsuite/ld-elf/pr25754-5b.s create mode 100644 ld/testsuite/ld-elf/pr25754-5c.s create mode 100644 ld/testsuite/ld-elf/pr25754-6a.c create mode 100644 ld/testsuite/ld-elf/pr25754-6b.s create mode 100644 ld/testsuite/ld-powerpc/non-contiguous-powerpc.d create mode 100644 ld/testsuite/ld-powerpc/non-contiguous-powerpc.ld create mode 100644 ld/testsuite/ld-powerpc/non-contiguous-powerpc.s create mode 100644 ld/testsuite/ld-powerpc/non-contiguous-powerpc64.d -- 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5 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_tx1/gnu-master-aarch64-spec2k6-O2-vs-O2_LTO updated (425b5b46 -> 18b8b6a7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/gnu-master-aarch64-spec2k6-O2-vs-O2_LTO in repository toolchain/ci/base-artifacts. from 425b5b46 1: reset: : 1 new 18b8b6a7 2: update: binutils-gcc-glibc: 1 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 71 +- 02-prepare_abe/console.log | 320 +- 03-build_abe-binutils/console.log | 11442 +-- 04-build_abe-stage1/console.log | 14922 ++-- 05-build_abe-linux/console.log | 308 +- 06-build_abe-glibc/console.log | 39407 ++++----- 07-build_abe-stage2/console.log | 37396 +++++---- 08-benchmark--O2/benchmark-start.log | 2 +- 08-benchmark--O2/benchmark.log | 16 +- 08-benchmark--O2/console.log | 148 +- 09-benchmark--O2_LTO/benchmark-start.log | 2 +- 09-benchmark--O2_LTO/benchmark.log | 17 +- 09-benchmark--O2_LTO/console.log | 151 +- 10-check_regression/console.log | 2482 +- 10-check_regression/extra-bisect-params | 2 +- 10-check_regression/new-results-0.csv | 58 +- 10-check_regression/new-results-1.csv | 58 +- 10-check_regression/new-results-brief.csv | 58 +- 10-check_regression/new-results-full.csv | 58 +- 10-check_regression/new-results.csv | 58 +- 10-check_regression/new-results.log | 4106 +- 10-check_regression/new-results.regressions | 4 + 10-check_regression/ref-results-0.csv | 58 +- 10-check_regression/ref-results-1.csv | 58 +- 10-check_regression/ref-results-brief.csv | 58 +- 10-check_regression/ref-results-compare.csv | 8 +- 10-check_regression/ref-results-full.csv | 58 +- 10-check_regression/ref-results.csv | 58 +- 10-check_regression/ref-results.log | 3852 +- 10-check_regression/ref-results.regressions | 4 + 10-check_regression/results-compare.csv | 8 +- 10-check_regression/trigger-build- | 3 - 11-update_baseline/console.log | 3632 +- 11-update_baseline/new-results-0.csv | 58 +- 11-update_baseline/new-results-1.csv | 58 +- 11-update_baseline/new-results-brief.csv | 58 +- 11-update_baseline/new-results-full.csv | 58 +- 11-update_baseline/new-results.csv | 58 +- 11-update_baseline/new-results.log | 4040 +- 11-update_baseline/new-results.regressions | 4 + 11-update_baseline/ref-results.log | 2016 +- 11-update_baseline/ref-results.regressions | 6 + 11-update_baseline/results.regressions | 1 + console.log | 111663 +++++++++++++------------ jenkins/manifest.sh | 21 +- regressions.txt | 2 - reset-baseline | 0 results | 2 - results_id-1 | 2 +- results_id-2 | 2 +- 50 files changed, 120764 insertions(+), 116168 deletions(-) create mode 100644 10-check_regression/new-results.regressions create mode 100644 10-check_regression/ref-results.regressions delete mode 100644 10-check_regression/trigger-build- create mode 100644 11-update_baseline/new-results.regressions create mode 100644 11-update_baseline/ref-results.regressions create mode 100644 11-update_baseline/results.regressions delete mode 100644 regressions.txt delete mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[binutils-gdb] branch users/hjl/linux/master updated (e7affc64839 -> 96e43c015c9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch users/hjl/linux/master in repository binutils-gdb. from e7affc64839 Apply elf: Remove zero-sized relocation section from section group adds 2612e26d4de Automatic date update in version.in adds 3349112e380 elf: Remove zero-sized relocation section from section group adds d87e3802d9f Automatic date update in version.in new 48d86234c25 Merge remote-tracking branch 'origin/master' into users/hjl [...] new 96e43c015c9 Revert "Apply elf: Remove zero-sized relocation section fro [...] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/ChangeLog | 6 ++ bfd/elf.c | 37 ++++++--- bfd/version.h | 2 +- ...zero-sized-relocation-section-from-sectio.patch | 89 ---------------------- patches/README | 1 - 5 files changed, 33 insertions(+), 102 deletions(-) delete mode 100644 patches/0001-elf-Remove-zero-sized-relocation-section-from-sect [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allnoconfig updated (5364abc57993 -> 4c205c84e249)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allnoconfig in repository toolchain/ci/linux. from 5364abc57993 Merge tag 'arc-5.7-rc1' of git://git.kernel.org/pub/scm/li [...] adds 0d6f1693f255 s390/cpum_sf: Rework sampling buffer allocation adds c4f762ff6b77 s390/zcrypt: Support for CCA protected key block version 2 adds dd62abd2d84d s390/qdio: clean up cdev access in qdio_setup_irq() adds 014816b66218 s390/qdio: reduce access to cdev->private->qdio_data adds b059a39cfa27 s390/arch: install kernels with their proper version ID adds 6e2a7b5171ec s390/qdio: use QDIO_IRQ_STATE_INACTIVE instead of 0 adds d5d006fa0927 s390/qdio: simplify debugfs code adds fa226f1d81e2 s390: Replace zero-length array with flexible-array member adds 4a559cd15dbc s390/crypto: explicitly memzero stack key material in aes_s390.c adds 701dc81e7412 s390/mm: remove fake numa support adds 124377596023 s390/mm: mark private defines for vm_fault_t as such adds e189b172d212 MAINTAINERS: Update s390/cio maintainer adds 5e674c308bab MAINTAINERS: Update s390/pci maintainer adds 014b020475d4 s390/mm: cleanup phys_to_pfn() and friends adds ad451abee4ba s390/qdio: export SSQD via debugfs adds 035f212fa7f2 s390/pci: embedding hotplug_slot in zdev adds d68d5d51dc89 s390/cpum_cf: Add new extended counters for IBM z15 adds d2abfbe4652d s390: enable bpf jit by default when not built as always-on adds 0b38b5e1d0e2 s390: prevent leaking kernel address in BEAR adds fb83510295d7 s390/cpuinfo: add system topology information adds 8719b6d29d28 s390/irq: replace setup_irq() by request_irq() adds 76fb118083ea s390/irq: make init_ext_interrupts static adds 1d49688d2bc6 s390/traps: mark test_monitor_call __init adds bb533ec8bacd s390/config: do not select VIRTIO_CONSOLE via Kconfig adds 31932757c612 s390/mm: optimize page table upgrade routine adds 42d211a1ae3b s390/cpuinfo: show processor physical address adds cd8e702f0db7 s390/numa: remove redundant cpus_with_topology variable adds 52aeda7accb6 s390/topology: remove offline CPUs from CPU topology masks adds eb3e064b8dd1 s390/zcrypt: Use scnprintf() for avoiding potential buffer [...] adds 40501c70e3f0 s390/zcrypt: replace snprintf/sprintf with scnprintf adds 1a2ae03b1938 s390/ipl: add support to control memory clearing for FCP a [...] adds 959684978d5a s390/cpuinfo: show number of online cores adds 2db52dc35314 s390/cpuinfo: show number of online CPUs within a package adds 872f27103874 s390/cpuinfo: fix wrong output when CPU0 is offline adds 1b648dfd544b s390/cpuinfo: do not skip info for CPUs without MHz feature adds 394216275c7d s390: remove broken hibernate / power management support adds 086b2d78375c PM: remove s390 specific callbacks adds 9289224040cb s390/qdio: pass ISC as parameter to chsc_sadc() adds 969ae01bab2f s390/pci: Fix zpci_alloc_domain() over allocation adds 7a11c67a1ff9 s390/pci: Improve handling of unset UID adds 3cc7c927102d s390/ap: Remove ap device suspend and resume callbacks adds 6c7c851f1b66 s390/diag: fix display of diagnose call statistics adds 4141b6a5e9f1 s390/cpum_sf: Fix wrong page count in error message adds 2c7749b90536 s390: use fallthrough; adds fcf0220abc5b s390/zcrypt: use fallthrough; adds 0696178e7741 s390/vfio: use fallthrough; adds b09fcecb6c91 s390/cio: use fallthrough; adds 194f75706b86 s390/ism: remove pm support adds 712fa5f294f3 s390/mm: cleanup arch_get_unmapped_area() and friends adds 34515df25d7e s390/zcrypt: use kvmalloc instead of kmalloc for 256k alloc adds 41677b1d9415 s390/ap: remove power management code from ap bus and drivers adds 5e1fb45ec8e2 s390/ccwgroup: remove pm support adds dea284867701 s390/qdio: remove unused function declarations adds b2745655be36 s390/qdio: set qdio_irq->cdev at allocation time adds 6a3eb35e56b3 s390/mm: remove page table downgrade support adds f75556081afe s390/mm: cleanup virtual memory constants usage adds 1058c163dc31 s390/mm: cleanup init_new_context() callback adds ad0bf4eb91c2 Merge tag 's390-5.7-1' of git://git.kernel.org/pub/scm/lin [...] adds 723fe298ad85 vfio: platform: Switch to platform_get_irq_optional() adds 5f3874c2a231 vfio: Include optional device match in vfio_device_ops callbacks adds 467c084f9ad3 vfio/pci: Implement match ops adds cc20d7999000 vfio/pci: Introduce VF token adds 43eeeecc8ed5 vfio: Introduce VFIO_DEVICE_FEATURE ioctl and first user adds 137e5531351d vfio/pci: Add sriov_configure support adds 959e1b75cc87 vfio/pci: Remove dev_fmt definition adds b66574a3fb32 vfio/pci: Cleanup .probe() exit paths adds c0560f51cf77 vfio: allow external user to get vfio group from device adds 8d46c0cca5f4 vfio: introduce vfio_dma_rw to read/write a range of IOVAs adds 40280cf7e8ca vfio: avoid inefficient operations on VFIO group in vfio_p [...] adds 48219795e7db Merge branches 'v5.7/vfio/alex-sriov-v3' and 'v5.7/vfio/ya [...] adds 00bc5095547e vfio-pci/nvlink2: Allow fallback to ibm,mmio-atsd[0] adds f44efca0493d vfio: Ignore -ENODEV when getting MSI cookie adds 2fb732b33b0f Merge tag 'vfio-v5.7-rc1' of git://github.com/awilliam/linux-vfio adds 6952a4f64644 selftests: add pid namespace ENOMEM regression test adds 1e396a5d171d Merge tag 'threads-v5.7' of git://git.kernel.org/pub/scm/l [...] adds 286c21de32b9 dma-coherent: fix integer overflow in the reserved-memory [...] adds 4f8232bbf887 dma-direct: remove the cached_kernel_address hook adds 3d0fc341c4bb dma-direct: consolidate the error handling in dma_direct_a [...] adds fa7e2247c572 dma-direct: make uncached_kernel_address more general adds 999a5d1203ba dma-direct: provide a arch_dma_clear_uncached hook adds a4a4d11a22ee openrisc: use the generic in-place uncached DMA allocator adds fd50924917f9 ARM/dma-mapping: remove get_coherent_dma_mask adds 7607cb733fbb ARM/dma-mapping: take the bus limit into account in __dma_alloc adds fd27a526bb38 ARM/dma-mapping: merge __dma_supported into arm_dma_supported adds 6f43bae38269 Merge tag 'dma-mapping-5.7' of git://git.infradead.org/use [...] adds 046e14afb356 gpio: Avoid kernel.h inclusion where it's possible adds a630fe34ddc0 gpio: pxa: Avoid a warning when gpio0 and gpio1 IRQS are n [...] adds 47d7d1166619 gpio: wcd934x: Don't change gpio direction in wcd_gpio_set adds 47203198ed3d gpio: wcd934x: Fix logic of wcd_gpio_get adds 3f2e4c11e136 kfifo: provide noirqsave variants of spinlocked in and out [...] adds 5195a89e8583 kfifo: provide kfifo_is_empty_spinlocked() adds dea9c80ee672 gpiolib: rework the locking mechanism for lineevent kfifo adds 248ae1752e91 gpiolib: emit a debug message when adding events to a full kfifo adds d2ac25798208 gpiolib: provide a dedicated function for setting lineinfo adds 51c1064e82e7 gpiolib: add new ioctl() for monitoring changes in line info adds 33f0c47b8fb4 tools: gpio: implement gpio-watch adds b2929a9cb2fb Merge tag 'gpio-updates-for-v5.7-part1' of git://git.kerne [...] adds b36368f685d6 gpio: rcar: Fix typo in comment adds f6e51bb331d5 gpio: mockup: coding-style fix adds 023892ec80f0 gpio: siox: use raw spinlock for irq related locking adds 1739a2d85226 gpiolib: use gpiochip_get_desc() where applicable adds f8850206e160 gpio: Switch timestamps to ktime_get_ns() adds bc21077e084b gpio: of: Extract of_gpiochip_add_hog() adds 63636d956c45 gpio: of: Add DT overlay support for GPIO hogs adds 869233f81337 gpiolib: Optimize gpiochip_remove() when check for requested line adds ca18a852ee36 gpiolib: Fix inverted check in gpiochip_remove() adds ec18d7e7d286 gpio: uniphier: Replace zero-length array with flexible-ar [...] adds df2cd589766c gpiolib: Rename 'event' to 'ge' to be consistent with other use adds 48543bd8e928 gpiolib: fix unwatch ioctl() adds 1931479788c5 gpiolib: fix bitmap operations related to line event watching adds 5779925c23e1 Merge tag 'gpio-updates-for-v5.7-part2' of git://git.kerne [...] adds bc0ae0e737f5 gpio: add driver for Mellanox BlueField 2 GPIO controller adds 55be2f50336f ARM: OMAP2+: Handle errors for cpu_pm adds 43582265be8c gpio: omap: Block idle on pending gpio interrupts adds 579ced8fdb00 Revert "gpio: omap: Fix lost edge wake-up interrupts" adds 347ae6e29145 Merge branch 'ib-omap-block-idle' into devel adds a28e1c0505a0 gpio: Move devres calls to devres file adds 32f5f62d7991 gpio: uapi: Improve phrasing around arrays representing em [...] adds f8c3cea834d2 docs: gpio: driver.rst: don't mark literal blocks twice adds 1a555713ac9d gpio: pl061: Warn when IRQ line has not been configured adds d4e9361442e2 gpio: mxc: Add COMPILE_TEST support for GPIO_MXC adds 6876ca311bfc gpio: mxs: add COMPILE_TEST support for GPIO_MXS adds 525b0858ff2f gpio: mvebu: avoid error message for optional IRQ adds d1ee7e1f5c91 tools: gpio-hammer: Avoid potential overflow in main adds d19d2de61fb1 gpio: mmio: introduce BGPIOF_NO_SET_ON_INPUT adds 427cabede05c gpio: mt7621: add BGPIOF_NO_SET_ON_INPUT flag adds 55f17e2ae916 tools: gpio-hammer: fix spelling mistake: "occurences" -> [...] adds ee203bbd63c0 gpiolib: gpio_name_to_desc: factor out !name check adds 1003bc16481a tools: gpio-hammer: Apply scripts/Lindent and retain good changes adds 975516250253 tools: gpio: Fix typo in gpio-utils adds 30a464a8dfee Merge tag 'gpio-updates-for-v5.7-part4' of git://git.kerne [...] adds 5eefcaed501d gpio: brcmstb: support gpio-line-names property adds da3f594737cf ARM: integrator: impd1: Use GPIO_LOOKUP() helper macro adds 2ab73c6d8323 gpio: Support GPIO controllers without pin-ranges adds b64d6c9a6a05 gpio: tegra186: Add support for pin ranges adds ffa91e7ca142 gpio: tegra186: Add Tegra194 pin ranges for GG.0 and GG.1 adds 35c6cfb4340c gpio: gpiolib: fix a doc warning adds 82f04bfe2aff tools: gpio: Fix out-of-tree build regression adds 06dd3f31cb70 Merge tag 'v5.6-rc7' into devel adds 8ced32ffadc8 gpiolib: Introduce gpiod_set_config() adds 83522358438d gpiolib: Pass gpio_desc to gpio_set_config() adds 5f4bf171ca03 gpiolib: Remove unused gpio_chip parameter from gpio_set_bias() adds 89ad556b7f96 gpio: Avoid using pin ranges with !PINCTRL adds a0b66a73785c gpio: Rename variable in core APIs adds e45ee71ae101 pinctrl: Define of_pinctrl_get() dummy for !PINCTRL adds 33dd88826319 gpio: export of_pinctrl_get to modules adds f0254b51cbbf gpio: Unconditionally assign .request()/.free() adds d6471d6e09d4 pinctrl: Unconditionally assign .request()/.free() adds 4ed7d7dd4890 Revert "gpio: eic-sprd: Use devm_platform_ioremap_resource()" adds 828907ef25e0 Merge tag 'gpio-v5.7-1' of git://git.kernel.org/pub/scm/li [...] adds 38a49742de11 rtc: sh: Restore devm_ioremap() alignment adds 4594d082dbe6 rtc: zynqmp: Clear alarm interrupt status before interrupt enable adds a137e9b620bc rtc: snvs: Remove unused include of of_device.h adds 66e4f4a9cc38 rtc: cmos: Use spin_lock_irqsave() in cmos_interrupt() adds ae243ef0afbc rtc: sysfs: use kobj_to_dev adds b427ca8c663e rtc: snvs: Improve Kconfig dependency adds 2911ee9e60d9 rtc: sirfsoc: convert to devm_rtc_allocate_device adds cd65dd4180df rtc: sirfsoc: set range adds 09b875a426c9 rtc: sirfsoc: switch to rtc_time64_to_tm/rtc_tm_to_time64 adds b1c67e0b07c5 rtc: davinci: convert to devm_rtc_allocate_device adds dc924ce9a184 rtc: davinci: remove useless 24h alarm handling adds b6d8f5892048 rtc: davinci: let the core handle rtc range adds 6a5bbad58691 rtc: davinci: remove useless error handling adds 9896169a1222 rtc: pl030: set range adds b303b2fe5d97 rtc: pl030: remove useless invalid alarm handling adds c33c4713cd6b rtc: pl030: switch to rtc_time64_to_tm/rtc_tm_to_time64 adds 166b13325c5b rtc: starfire: set range adds 326bce078a6a rtc: starfire: switch to rtc_time64_to_tm adds 7fc9790aa38f rtc: au1xxx: convert to devm_rtc_allocate_device adds 9cf71edb024a rtc: au1xxx: remove goto label adds b1b686e4b0d1 rtc: au1xxx: set range adds 0a22bd6fe46d rtc: au1xxx: switch to rtc_time64_to_tm/rtc_tm_to_time64 adds f2997775b111 rtc: sa1100: fix possible race condition adds e877ab73028f rtc: sa1100: set range adds eb8d94203292 rtc: sa1100: switch to rtc_time64_to_tm/rtc_tm_to_time64 adds 05b38d182c5d rtc: cpcap: convert to devm_rtc_allocate_device adds d2377f8cc5a7 rtc: cpcap: set range adds d238df15e5cd rtc: cpcap: switch to rtc_time64_to_tm/rtc_tm_to_time64 adds c11af8131a4e rtc: ds1374: fix possible race condition adds 4136ff3a5157 rtc: ds1374: set range adds ca824be9b394 rtc: ds1374: switch to rtc_time64_to_tm/rtc_tm_to_time64 adds 9869a93c823b rtc: ds1305: set range adds f2adcb9c3abd rtc: ds1305: switch to rtc_tm_to_time64 adds d5d55b709840 rtc: pm8xxx: convert to devm_rtc_allocate_device adds 3cfe52607779 rtc: pm8xxx: set range adds 4c470b2f1213 rtc: pm8xxx: : switch to rtc_time64_to_tm/rtc_tm_to_time64 adds c47cf9d6bb7b rtc: pm8xxx: stop validating valid alarm time adds d53d4ae981d0 rtc: mpc5121: simplify probe adds fffbe10e2fd3 rtc: mpc5121: convert to devm_rtc_allocate_device adds 3905d1c02dc9 rtc: mpc5121: set range adds 3d5a49545ac5 rtc: mpc5121: switch to rtc_time64_to_tm/rtc_tm_to_time64 adds 7098f5368268 rtc: fsl-ftm-alarm: allow COMPILE_TEST adds 61c9fbff9d62 rtc: pl031: remove useless invalid alarm handling adds 03f2a0e45f39 rtc: pl031: set range adds c8ff5841a90b rtc: pl031: switch to rtc_time64_to_tm/rtc_tm_to_time64 adds a5965a31012f rtc: ab8500: switch to rtc_time64_to_tm/rtc_tm_to_time64 adds a04b3b965f3d rtc: puv3: set range adds 0155b547746f rtc: puv3: switch to rtc_time64_to_tm/rtc_tm_to_time64 adds ec98a87509f4 rtc: sun6i: Make external 32k oscillator optional adds eac1c3fc55f8 rtc: m48t35: remove SGI-IP27 kludge adds bfb8c3b464f1 dt-bindings: rtc: add bindings for MT2712 RTC adds 64823360a829 rtc: add support for the MediaTek MT2712 RTC adds 21cbe8109415 MAINTAINERS: add MT2712 RTC files adds 7863bd076b99 rtc: snvs: Use devm_add_action_or_reset() for calls to clk [...] adds 9cf4789e6e46 rtc: 88pm860x: fix possible race condition adds b773f2a97fc5 rtc: 88pm860x: stop setting a default time adds 1c9fe6d6d275 rtc: 88pm860x: stop calling unused callback adds a3e4937112ce rtc: 88pm860x: set range adds 3b45cc522e5b rtc: 88pm860x: stop mangling alarm time adds b2a2aa63f9f1 rtc: 88pm860x: switch to rtc_time64_to_tm/rtc_tm_to_time64 adds ccf1441db9ca rtc: 88pm860x: remove platform data support adds 30a790653d8a rtc: mt2712: fix build without PM_SLEEP adds df11b323b16f rtc: ds1307: handle oscillator failure flags for ds1388 variant adds fdc9f0eace99 rtc: mxc: Use devm_add_action_or_reset() for calls to clk_ [...] adds 929a32704889 rtc: fsl-ftm-alarm: enable acpi support adds c05a31f4d1de rtc: max8907: add missing select REGMAP_IRQ adds 6e7af4510299 rtc: bd70528: Avoid double error messaging when IRQ absent adds 4828a82e29eb rtc: omap: drop unused dt-bindings header adds 34ce29774dad rtc: pm8xxx: clear alarm register when alarm is not enabled adds f9b2a4d6a5f1 rtc: class: support hctosys from modular RTC drivers adds 5840748520be rtc: jz4740: Add support for JZ4760 SoC adds 91b298f5dc95 rtc: jz4740: Rename vendor-specific DT properties adds f1cd223389f0 dt-bindings: rtc: Convert and update jz4740-rtc doc to YAML adds 5614a4a3ca0e rtc: class: avoid unnecessary lookup in hctosys adds b0efe0281234 rtc: make definitions in include/uapi/linux/rtc.h actually [...] adds 8c229ab6048b rtc: pcf85063: Add pcf85063 clkout control to common clock [...] adds 9c328c9dd84a rtc: fsl-ftm-alarm: report alarm to core adds a29de86521d8 rtc: imx-sc: Align imx sc msg structs to 4 adds d17077e570b2 rtc: da9052: convert to devm_rtc_allocate_device adds 23af616ca4da rtc: da9052: set range adds 06c4e103bf8a rtc: da9052: switch to rtc_time64_to_tm/rtc_tm_to_time64 adds fd90d48db037 rtc: ds1307: add support for watchdog timer on ds1388 adds 99b7ac9c68fa rtc: sun6i: switch to rtc_time64_to_tm/rtc_tm_to_time64 adds 8ae79be79b1d rtc: sun6i: let the core handle rtc range adds 6487a8019b3e rtc: remove rtc_time_to_tm and rtc_tm_to_time adds 3edf29d9d585 rtc: class: remove redundant assignment to variable err adds 1821b79d6a7d rtc: ds1307: check for failed memory allocation on wdt adds bdabb68931b9 Merge tag 'rtc-5.7' of git://git.kernel.org/pub/scm/linux/ [...] adds 7627d7dc79a8 nfsd: set the server_scope during service startup adds 469aef23aa4e sunrpc: Replace zero-length array with flexible-array member adds 51cae673d036 sunrpc: Pass lockdep expression to RCU lists adds c0fb23f867b6 svcrdma: Replace zero-length array with flexible-array member adds 36a8049181d5 fs: nfsd: nfs4state.c: Use built-in RCU list checking adds 057a22743577 fs: nfsd: fileache.c: Use built-in RCU list checking adds 412055398b9e nfsd: Fix NFSv4 READ on RDMA when using readv adds 7dcf4ab952d6 NFSD: Clean up nfsd4_encode_readv adds 758a3bf9459d svcrdma: Fix double svc_rdma_send_ctxt_put() in an error path adds 96f194b715b6 SUNRPC: Add xdr_pad_size() helper adds 28155524eaa2 SUNRPC: Clean up: Replace dprintk and BUG_ON call sites in [...] adds b20dfc3fcd6e svcrdma: Create a generic tracing class for displaying xdr [...] adds 2426ddfdf169 svcrdma: Remove svcrdma_cm_event() trace point adds e604aad2cac7 svcrdma: Use struct xdr_stream to decode ingress transport [...] adds 2fe8c446338e svcrdma: De-duplicate code that locates Write and Reply chunks adds 6fa5785e78d3 svcrdma: Update synopsis of svc_rdma_send_reply_chunk() adds 4554755ed81b svcrdma: Update synopsis of svc_rdma_map_reply_msg() adds db9602e40425 svcrdma: Update synopsis of svc_rdma_send_reply_msg() adds a406c563e842 svcrdma: Rename svcrdma_encode trace points in send routines adds 5c266df52701 SUNRPC: Add encoders for list item discriminators adds 6fd5034db45c svcrdma: Refactor chunk list encoders adds aee4b74a3f27 svcrdma: Fix double sync of transport header buffer adds 0dabe948f282 svcrdma: Avoid DMA mapping small RPC Replies adds 9e55eef4ab1b SUNRPC: Refactor xs_sendpages() adds da1661b93bf4 SUNRPC: Teach server to use xprt_sock_sendmsg for socket sends adds a451b12311aa nfsd: Don't add locks to closed or closing open stateids adds f01274a93353 nfsd: Add tracing to nfsd_set_fh_dentry() adds cf749f3cc734 nfsd: Add tracepoints for exp_find_key() and exp_get_by_name() adds 6a30e47fa0c3 nfsd: Add tracepoints for update of the expkey and export [...] adds 65286b883c6d nfsd: export upcalls must not return ESTALE when mountd is down adds 277f27e2f277 SUNRPC/cache: Allow garbage collection of invalid cache entries adds 78a947f50aaa sunrpc: Add tracing for cache events adds 3ac3711adb88 NFSD: Fix NFS server build errors adds 6cbfad5f201b nfsd: remove read permission bit for ctl sysctl adds 663e36f07666 nfsd4: kill warnings on testing stateids with mismatched c [...] adds 69afd267982e nfsd: fsnotify on rmdir under nfsd/clients/ adds 9a81ef42b238 SUNRPC/cache: don't allow invalid entries to be flushed adds b25b60d7bfb0 SUNRPC: Fix a potential buffer overflow in 'svc_print_xprts()' adds 1a33d8a284b1 svcrdma: Fix leak of transport addresses adds b3d8e4228268 Merge tag 'nfsd-5.7' of git://git.linux-nfs.org/projects/c [...] adds 1acf1a564b60 exfat: add in-memory and on-disk structures and headers adds 719c1e182916 exfat: add super block operations adds 5f2aa075070c exfat: add inode operations adds ca06197382bd exfat: add directory operations adds 98d917047e8b exfat: add file operations adds 31023864e67a exfat: add fat entry operations adds 1e49a94cf707 exfat: add bitmap operations adds c35b6810c495 exfat: add exfat cache adds 772b29cca528 exfat: add misc operations adds 370e812b3ec1 exfat: add nls operations adds b9d1e2e6265f exfat: add Kconfig and Makefile adds 88ab55f16aae MAINTAINERS: add exfat filesystem adds 1a3c0509ce83 staging: exfat: make staging/exfat and fs/exfat mutually e [...] adds 9acd0d53800c exfat: update file system parameter handling adds 83eb69f3b80f Merge branch 'work.exfat' of git://git.kernel.org/pub/scm/ [...] adds f05a3849f644 fs: Constify vma argument to vma_is_dax adds 2484ca9b6a20 mm: Introduce vma_is_special_huge adds 327e9fd48972 mm: Split huge pages on write-notify or COW adds 9a9731b18c9b mm: Add vmf_insert_pfn_xxx_prot() for huge page-table entries adds 314b6580adc5 drm/ttm, drm/vmwgfx: Support huge TTM pagefaults adds 75390281ab68 drm/vmwgfx: Support huge page faults adds b18234166709 drm: Add a drm_get_unmapped_area() helper adds 7546f7ffdb5c drm/vmwgfx: Introduce a huge page aligning TTM range manager adds 9431042dbc8c drm/vmwgfx: Hook up the helpers to align buffer objects adds 0e7e6198af28 Merge branch 'ttm-transhuge' of git://people.freedesktop.o [...] adds ea9448b254e2 Merge tag 'drm-next-2020-04-03-1' of git://anongit.freedes [...] adds d3ec10aa9581 KEYS: Don't write out to userspace while holding key semaphore adds 4f0882491a14 KEYS: Avoid false positive ENOMEM error on key read adds 4c205c84e249 Merge tag 'keys-fixes-20200329' of git://git.kernel.org/pu [...] No new revisions were added by this update. Summary of changes: .../devicetree/bindings/rtc/ingenic,jz4740-rtc.txt | 37 - .../devicetree/bindings/rtc/ingenic,rtc.yaml | 83 ++ .../devicetree/bindings/rtc/rtc-mt2712.txt | 14 + Documentation/driver-api/gpio/driver.rst | 4 +- MAINTAINERS | 14 +- arch/Kconfig | 15 +- arch/arm/include/asm/dma-iommu.h | 2 - arch/arm/mach-integrator/impd1.c | 11 +- arch/arm/mach-omap2/cpuidle34xx.c | 9 +- arch/arm/mach-omap2/cpuidle44xx.c | 26 +- arch/arm/mach-omap2/pm34xx.c | 8 +- arch/arm/mm/dma-mapping.c | 76 +- arch/microblaze/Kconfig | 2 +- arch/microblaze/mm/consistent.c | 9 +- arch/mips/Kconfig | 3 +- arch/mips/mm/dma-noncoherent.c | 7 +- arch/nios2/Kconfig | 3 +- arch/nios2/mm/dma-mapping.c | 12 +- arch/openrisc/Kconfig | 2 + arch/openrisc/kernel/dma.c | 55 +- arch/s390/Kconfig | 73 +- arch/s390/appldata/appldata_os.c | 2 +- arch/s390/boot/install.sh | 17 +- arch/s390/configs/debug_defconfig | 1 + arch/s390/configs/defconfig | 1 + arch/s390/crypto/aes_s390.c | 3 + arch/s390/include/asm/hw_irq.h | 1 - arch/s390/include/asm/ipl.h | 1 + arch/s390/include/asm/lowcore.h | 4 +- arch/s390/include/asm/mmu.h | 2 - arch/s390/include/asm/mmu_context.h | 44 +- arch/s390/include/asm/numa.h | 13 +- arch/s390/include/asm/page.h | 18 +- arch/s390/include/asm/pci.h | 6 + arch/s390/include/asm/pgalloc.h | 39 +- arch/s390/include/asm/processor.h | 10 +- arch/s390/include/asm/setup.h | 7 + arch/s390/include/asm/smp.h | 1 + arch/s390/include/asm/topology.h | 15 +- arch/s390/kernel/Makefile | 1 - arch/s390/kernel/asm-offsets.c | 2 + arch/s390/kernel/diag.c | 2 +- arch/s390/kernel/entry.S | 65 +- arch/s390/kernel/ipl.c | 73 +- arch/s390/kernel/irq.c | 26 +- arch/s390/kernel/machine_kexec.c | 31 - arch/s390/kernel/perf_cpum_cf_events.c | 123 +- arch/s390/kernel/perf_cpum_sf.c | 44 +- arch/s390/kernel/process.c | 1 + arch/s390/kernel/processor.c | 34 +- arch/s390/kernel/setup.c | 4 + arch/s390/kernel/signal.c | 4 +- arch/s390/kernel/smp.c | 13 +- arch/s390/kernel/suspend.c | 240 ---- arch/s390/kernel/swsusp.S | 276 ---- arch/s390/kernel/topology.c | 34 +- arch/s390/kernel/traps.c | 2 +- arch/s390/mm/cmm.c | 46 +- arch/s390/mm/fault.c | 21 +- arch/s390/mm/hugetlbpage.c | 11 +- arch/s390/mm/mmap.c | 40 +- arch/s390/mm/pageattr.c | 16 - arch/s390/mm/pgalloc.c | 108 +- arch/s390/mm/vmem.c | 4 + arch/s390/numa/Makefile | 2 - arch/s390/numa/mode_emu.c | 577 -------- arch/s390/numa/numa.c | 147 +- arch/s390/numa/numa_mode.h | 25 - arch/s390/numa/toptree.c | 351 ----- arch/s390/numa/toptree.h | 61 - arch/s390/pci/pci.c | 83 +- arch/s390/pci/pci_clp.c | 2 +- arch/xtensa/Kconfig | 2 +- arch/xtensa/kernel/pci-dma.c | 12 +- drivers/gpio/Kconfig | 11 +- drivers/gpio/Makefile | 1 + drivers/gpio/gpio-brcmstb.c | 44 + drivers/gpio/gpio-davinci.c | 7 +- drivers/gpio/gpio-eic-sprd.c | 9 +- drivers/gpio/gpio-mlxbf2.c | 335 +++++ drivers/gpio/gpio-mmio.c | 23 +- drivers/gpio/gpio-mockup.c | 2 +- drivers/gpio/gpio-mt7621.c | 4 +- drivers/gpio/gpio-mvebu.c | 2 +- drivers/gpio/gpio-mxc.c | 7 +- drivers/gpio/gpio-omap.c | 29 +- drivers/gpio/gpio-pl061.c | 13 +- drivers/gpio/gpio-pxa.c | 11 +- drivers/gpio/gpio-rcar.c | 4 +- drivers/gpio/gpio-siox.c | 28 +- drivers/gpio/gpio-tegra186.c | 64 + drivers/gpio/gpio-uniphier.c | 2 +- drivers/gpio/gpio-wcd934x.c | 9 +- drivers/gpio/gpio-zx.c | 10 +- drivers/gpio/gpiolib-devres.c | 46 + drivers/gpio/gpiolib-of.c | 139 +- drivers/gpio/gpiolib-of.h | 2 + drivers/gpio/gpiolib.c | 1299 ++++++++++-------- drivers/gpio/gpiolib.h | 4 + drivers/gpu/drm/drm_file.c | 141 ++ drivers/gpu/drm/ttm/ttm_bo_vm.c | 161 ++- drivers/gpu/drm/vmwgfx/Makefile | 1 + drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 13 + drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 12 + drivers/gpu/drm/vmwgfx/vmwgfx_page_dirty.c | 76 +- drivers/gpu/drm/vmwgfx/vmwgfx_thp.c | 166 +++ drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c | 5 +- drivers/pci/hotplug/s390_pci_hpc.c | 99 +- drivers/pinctrl/devicetree.c | 1 + drivers/pinctrl/pinctrl-ingenic.c | 7 +- drivers/rtc/Kconfig | 17 +- drivers/rtc/Makefile | 2 +- drivers/rtc/class.c | 49 + drivers/rtc/hctosys.c | 69 - drivers/rtc/rtc-88pm860x.c | 104 +- drivers/rtc/rtc-ab8500.c | 10 +- drivers/rtc/rtc-au1xxx.c | 29 +- drivers/rtc/rtc-bd70528.c | 4 +- drivers/rtc/rtc-cmos.c | 5 +- drivers/rtc/rtc-cpcap.c | 13 +- drivers/rtc/rtc-da9052.c | 18 +- drivers/rtc/rtc-davinci.c | 58 +- drivers/rtc/rtc-ds1305.c | 10 +- drivers/rtc/rtc-ds1307.c | 126 ++ drivers/rtc/rtc-ds1374.c | 27 +- drivers/rtc/rtc-fsl-ftm-alarm.c | 23 +- drivers/rtc/rtc-imx-sc.c | 2 +- drivers/rtc/rtc-jz4740.c | 9 +- drivers/rtc/rtc-m48t35.c | 7 +- drivers/rtc/rtc-mpc5121.c | 61 +- drivers/rtc/rtc-mt2712.c | 423 ++++++ drivers/rtc/rtc-mxc.c | 46 +- drivers/rtc/rtc-omap.c | 1 - drivers/rtc/rtc-pcf85063.c | 157 +++ drivers/rtc/rtc-pl030.c | 27 +- drivers/rtc/rtc-pl031.c | 53 +- drivers/rtc/rtc-pm8xxx.c | 40 +- drivers/rtc/rtc-puv3.c | 14 +- drivers/rtc/rtc-sa1100.c | 40 +- drivers/rtc/rtc-sh.c | 3 +- drivers/rtc/rtc-sirfsoc.c | 44 +- drivers/rtc/rtc-snvs.c | 28 +- drivers/rtc/rtc-starfire.c | 10 +- drivers/rtc/rtc-sun6i.c | 47 +- drivers/rtc/rtc-zynqmp.c | 27 +- drivers/rtc/sysfs.c | 2 +- drivers/s390/block/dasd_diag.c | 2 +- drivers/s390/block/dasd_eckd.h | 2 +- drivers/s390/char/con3215.c | 2 +- drivers/s390/char/hmcdrv_ftp.c | 2 +- drivers/s390/char/raw3270.h | 2 +- drivers/s390/char/sclp_cmd.c | 2 +- drivers/s390/char/sclp_pci.c | 2 +- drivers/s390/char/sclp_sdias.c | 2 +- drivers/s390/char/tape_core.c | 6 +- drivers/s390/cio/airq.c | 8 +- drivers/s390/cio/ccwgroup.c | 69 - drivers/s390/cio/chsc.c | 5 +- drivers/s390/cio/chsc.h | 3 +- drivers/s390/cio/cio.c | 8 +- drivers/s390/cio/device.c | 4 +- drivers/s390/cio/idset.c | 2 +- drivers/s390/cio/qdio.h | 9 +- drivers/s390/cio/qdio_debug.c | 59 +- drivers/s390/cio/qdio_debug.h | 3 +- drivers/s390/cio/qdio_main.c | 23 +- drivers/s390/cio/qdio_setup.c | 29 +- drivers/s390/cio/qdio_thinint.c | 2 +- drivers/s390/crypto/ap_bus.c | 212 +-- drivers/s390/crypto/ap_bus.h | 5 - drivers/s390/crypto/ap_card.c | 17 +- drivers/s390/crypto/ap_queue.c | 75 +- drivers/s390/crypto/pkey_api.c | 2 +- drivers/s390/crypto/vfio_ap_ops.c | 2 +- drivers/s390/crypto/zcrypt_card.c | 6 +- drivers/s390/crypto/zcrypt_ccamisc.c | 33 +- drivers/s390/crypto/zcrypt_ccamisc.h | 2 +- drivers/s390/crypto/zcrypt_cex2a.c | 2 - drivers/s390/crypto/zcrypt_cex2c.c | 2 - drivers/s390/crypto/zcrypt_cex4.c | 76 +- drivers/s390/crypto/zcrypt_ep11misc.c | 10 +- drivers/s390/crypto/zcrypt_msgtype6.c | 10 +- drivers/s390/crypto/zcrypt_queue.c | 4 +- drivers/s390/net/ism_drv.c | 20 - drivers/vfio/pci/vfio_pci.c | 390 +++++- drivers/vfio/pci/vfio_pci_nvlink2.c | 10 +- drivers/vfio/pci/vfio_pci_private.h | 10 + drivers/vfio/platform/vfio_platform.c | 2 +- drivers/vfio/vfio.c | 198 ++- drivers/vfio/vfio_iommu_type1.c | 78 +- fs/Kconfig | 3 +- fs/Makefile | 1 + fs/exfat/Kconfig | 21 + fs/exfat/Makefile | 8 + fs/exfat/balloc.c | 280 ++++ fs/exfat/cache.c | 325 +++++ fs/exfat/dir.c | 1238 +++++++++++++++++ fs/exfat/exfat_fs.h | 519 +++++++ fs/exfat/exfat_raw.h | 184 +++ fs/exfat/fatent.c | 463 +++++++ fs/exfat/file.c | 360 +++++ fs/exfat/inode.c | 671 +++++++++ fs/exfat/misc.c | 163 +++ fs/exfat/namei.c | 1448 ++++++++++++++++++++ fs/exfat/nls.c | 831 +++++++++++ fs/exfat/super.c | 722 ++++++++++ fs/nfs/dns_resolve.c | 11 +- fs/nfsd/Kconfig | 2 +- fs/nfsd/export.c | 45 +- fs/nfsd/filecache.c | 2 +- fs/nfsd/netns.h | 2 + fs/nfsd/nfs4idmap.c | 14 + fs/nfsd/nfs4state.c | 87 +- fs/nfsd/nfs4xdr.c | 38 +- fs/nfsd/nfsctl.c | 1 + fs/nfsd/nfsfh.c | 13 +- fs/nfsd/nfssvc.c | 3 + fs/nfsd/trace.h | 122 ++ include/asm-generic/gpio.h | 4 +- include/drm/drm_file.h | 9 + include/drm/ttm/ttm_bo_api.h | 3 +- include/keys/big_key-type.h | 2 +- include/keys/user-type.h | 3 +- include/linux/dma-noncoherent.h | 4 +- include/linux/fs.h | 2 +- include/linux/gpio.h | 2 - include/linux/gpio/consumer.h | 13 +- include/linux/gpio/driver.h | 139 +- include/linux/huge_mm.h | 41 +- include/linux/key-type.h | 2 +- include/linux/kfifo.h | 73 + include/linux/mm.h | 17 + include/linux/of_gpio.h | 9 +- include/linux/pinctrl/pinctrl.h | 2 +- include/linux/rtc.h | 12 - include/linux/sunrpc/cache.h | 9 +- include/linux/sunrpc/rpc_rdma.h | 3 +- include/linux/sunrpc/svc.h | 5 +- include/linux/sunrpc/svc_rdma.h | 24 +- include/linux/sunrpc/svc_xprt.h | 2 + include/linux/sunrpc/xdr.h | 67 +- include/linux/suspend.h | 34 - include/linux/vfio.h | 17 + include/trace/events/rpcgss.h | 59 +- include/trace/events/rpcrdma.h | 67 +- include/trace/events/sunrpc.h | 76 + include/uapi/linux/gpio.h | 38 +- include/uapi/linux/rtc.h | 11 +- include/uapi/linux/vfio.h | 37 + kernel/dma/coherent.c | 13 +- kernel/dma/direct.c | 25 +- kernel/power/Kconfig | 3 - kernel/power/snapshot.c | 18 - mm/huge_memory.c | 44 +- mm/memory.c | 27 +- net/dns_resolver/dns_key.c | 2 +- net/rxrpc/key.c | 27 +- net/sunrpc/auth_gss/auth_gss.c | 2 +- net/sunrpc/auth_gss/svcauth_gss.c | 60 +- net/sunrpc/cache.c | 128 +- net/sunrpc/clnt.c | 1 + net/sunrpc/socklib.c | 141 ++ net/sunrpc/socklib.h | 15 + net/sunrpc/sunrpc.h | 4 - net/sunrpc/svc.c | 20 +- net/sunrpc/svc_xprt.c | 22 +- net/sunrpc/svcauth_unix.c | 12 + net/sunrpc/svcsock.c | 202 +-- net/sunrpc/xprt.c | 3 +- net/sunrpc/xprtrdma/rpc_rdma.c | 36 +- net/sunrpc/xprtrdma/svc_rdma_backchannel.c | 17 +- net/sunrpc/xprtrdma/svc_rdma_recvfrom.c | 244 ++-- net/sunrpc/xprtrdma/svc_rdma_rw.c | 57 +- net/sunrpc/xprtrdma/svc_rdma_sendto.c | 512 ++++--- net/sunrpc/xprtrdma/svc_rdma_transport.c | 8 +- net/sunrpc/xprtsock.c | 188 +-- security/keys/big_key.c | 11 +- security/keys/encrypted-keys/encrypted.c | 7 +- security/keys/internal.h | 12 + security/keys/keyctl.c | 103 +- security/keys/keyring.c | 6 +- security/keys/request_key_auth.c | 7 +- security/keys/trusted-keys/trusted_tpm1.c | 14 +- security/keys/user_defined.c | 5 +- tools/gpio/.gitignore | 1 + tools/gpio/Build | 1 + tools/gpio/Makefile | 13 +- tools/gpio/gpio-hammer.c | 19 +- tools/gpio/gpio-utils.c | 6 +- tools/gpio/gpio-watch.c | 99 ++ tools/testing/selftests/Makefile | 1 + tools/testing/selftests/pid_namespace/.gitignore | 1 + tools/testing/selftests/pid_namespace/Makefile | 8 + tools/testing/selftests/pid_namespace/config | 2 + .../selftests/pid_namespace/regression_enomem.c | 45 + tools/testing/selftests/pidfd/pidfd.h | 2 + 297 files changed, 14124 insertions(+), 5372 deletions(-) delete mode 100644 Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt create mode 100644 Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml create mode 100644 Documentation/devicetree/bindings/rtc/rtc-mt2712.txt delete mode 100644 arch/s390/kernel/suspend.c delete mode 100644 arch/s390/kernel/swsusp.S delete mode 100644 arch/s390/numa/mode_emu.c delete mode 100644 arch/s390/numa/numa_mode.h delete mode 100644 arch/s390/numa/toptree.c delete mode 100644 arch/s390/numa/toptree.h create mode 100644 drivers/gpio/gpio-mlxbf2.c create mode 100644 drivers/gpu/drm/vmwgfx/vmwgfx_thp.c delete mode 100644 drivers/rtc/hctosys.c create mode 100644 drivers/rtc/rtc-mt2712.c create mode 100644 fs/exfat/Kconfig create mode 100644 fs/exfat/Makefile create mode 100644 fs/exfat/balloc.c create mode 100644 fs/exfat/cache.c create mode 100644 fs/exfat/dir.c create mode 100644 fs/exfat/exfat_fs.h create mode 100644 fs/exfat/exfat_raw.h create mode 100644 fs/exfat/fatent.c create mode 100644 fs/exfat/file.c create mode 100644 fs/exfat/inode.c create mode 100644 fs/exfat/misc.c create mode 100644 fs/exfat/namei.c create mode 100644 fs/exfat/nls.c create mode 100644 fs/exfat/super.c create mode 100644 net/sunrpc/socklib.h create mode 100644 tools/gpio/gpio-watch.c create mode 100644 tools/testing/selftests/pid_namespace/.gitignore create mode 100644 tools/testing/selftests/pid_namespace/Makefile create mode 100644 tools/testing/selftests/pid_namespace/config create mode 100644 tools/testing/selftests/pid_namespace/regression_enomem.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allnoconfig updated (adc1ed3b -> 242829ca)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards adc1ed3b 0: update: llvm-linux: all new 242829ca 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (adc1ed3b) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 22 +- 02-build_llvm/console.log | 12564 ++++++++++++++++++------------------ 03-build_linux/console.log | 688 +- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 2 +- console.log | 13280 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 13284 insertions(+), 13284 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig updated (dff795974310 -> 57021046c331)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig in repository toolchain/ci/linux. omits dff795974310 Add linux-next specific files for 20200404 omits 62e8d649eace Merge branch 'akpm/master' omits 04655cae6a37 drivers/media/platform/sti/delta/delta-ipc.c: fix read buf [...] omits f7c2764965d5 ipc/util.c: sysvipc_find_ipc() should increase position index omits 6c314ee95174 kernel/gcov/fs.c: gcov_seq_next() should increase position index omits bc7cb5791054 seq_read-info-message-about-buggy-next-functions-fix omits 2556da0f42cd fs/seq_file.c: seq_read(): add info message about buggy .n [...] omits 4556b1ea4de5 arm64: memory: give hotplug memory a different resource name omits 7bdab6dcb885 mm/memory_hotplug: allow arch override of non boot memory [...] omits 5fdf80538a7b kexec: prevent removal of memory in use by a loaded kexec image omits f3005c826dea selftests: kmod: test disabling module autoloading omits 68b70d31e29c selftests: kmod: fix handling test numbers above 9 omits 72ce9c3adfaf docs-admin-guide-document-the-kernelmodprobe-sysctl-v5 omits 18afc3cda1fe docs: admin-guide: document the kernel.modprobe sysctl omits 822f06d12ba4 fs/filesystems.c: downgrade user-reachable WARN_ONCE() to [...] omits e1d35ba20d97 kmod: make request_module() return an error when autoloadi [...] omits 66088f005d80 mm/madvise: allow KSM hints for remote API omits 5756f0bcffe2 mm/madvise: employ mmget_still_valid() for write lock omits 5e14b9af648d mm/madvise: support both pid and pidfd for process_madvise omits 03aa8e412f6c pid: move pidfd_get_pid() to pid.c omits 3cb0b5fad5d7 mm/madvise: check fatal signal pending of target process omits a66248f0d35d fix process_madvise build break for arm64 omits abef2ec447d8 mm/madvise: introduce process_madvise() syscall: an extern [...] omits 24084e147faf mm/madvise: pass task and mm to do_madvise omits 023962977c71 mm/memremap: set caching mode for PCI P2PDMA memory to WC omits 41d9707fa91c mm/memory_hotplug: add pgprot_t to mhp_params omits e8c519e7ae76 powerpc/mm: thread pgprot_t through create_section_mapping() omits cc669464171e x86/mm: introduce __set_memory_prot() omits 048fb4c8d36c x86/mm: thread pgprot_t through init_memory_mapping() omits 44d8d9bc9407 mm/memory_hotplug: rename mhp_restrictions to mhp_params omits 02776c331d1f mm/memory_hotplug: drop the flags field from struct mhp_re [...] omits 5fc3c0ead8bf mm/debug: add tests validating architecture page table helpers omits 5ab36c90aa3d mm-special-create-generic-fallbacks-for-pte_special-and-pt [...] omits 56f2ccdd2cad mm/special: create generic fallbacks for pte_special() and [...] omits 2ed75fa6ec17 mm/vma: introduce VM_ACCESS_FLAGS omits 438a0c38bfdd mm/vma: define a default value for VM_DATA_DEFAULT_FLAGS omits e4d4d14f96a3 net-zerocopy-use-vm_insert_pages-for-tcp-rcv-zerocopy-fix omits 1e617917fb6a net-zerocopy: use vm_insert_pages() for tcp rcv zerocopy omits e6f219f28d41 mm: vm_insert_pages() checks if pte_index defined. omits ef066dbb9034 add missing page_count() check to vm_insert_pages(). omits a9b591a2cc2e mm-add-vm_insert_pages-fix omits 8507df36bd3e mm/memory.c: add vm_insert_pages() omits ecb8143f3b6e mm: define pte_index as macro for x86 omits 21d35ddaf356 mm: bring sparc pte_index() semantics inline with other platforms omits e6d71fa4e74e mm/memory.c: refactor insert_page to prepare for batched-l [...] omits fd2b4b1b17f2 mm/swap.c: annotate data races for lru_rotate_pvecs omits bf9bfbb4246e mm: annotate a data race in page_zonenum() omits 8e717c99e47e mm/rmap: annotate a data race at tlb_flush_batched omits 300f8b47d3a8 mm/util.c: annotate an data race at vm_committed_as omits 6b12213507f0 mm/mempool: fix a data race in mempool_free() omits 0f38e4e67ed7 mm/list_lru: fix a data race in list_lru_count_one omits 12c58ea3450a mm/memcontrol: fix a data race in scan count omits 1dc8e31af9e7 mm/page_counter: fix various data races at memsw omits 3c7e8be0a940 mm-swapfile-fix-and-annotate-various-data-races-v2 omits 56a25ea5d75a mm/swapfile: fix and annotate various data races omits bd24adf74276 mm/filemap.c: fix a data race in filemap_fault() omits 2375da974854 mm/swap_state: mark various intentional data races omits 2ceba625637a mm-page_io-mark-various-intentional-data-races-v2 omits 23aefa4428ff mm/page_io: mark various intentional data races omits 5d466b344501 mm/frontswap: mark various intentional data races omits b3949e3dc863 drivers/dma/tegra20-apb-dma.c: fix platform_get_irq.cocci [...] omits 7746bda918a0 mm/kmemleak: silence KCSAN splats in checksum omits 90da94e7caa1 Change email address for Pali Rohár omits ed8a50a0830c Merge branch 'akpm-current/current' omits 1f209c365756 Merge remote-tracking branch 'cel/cel-next' omits 5fc83b695797 Merge remote-tracking branch 'fpga/for-next' omits 5319624cbd84 Merge remote-tracking branch 'devfreq/devfreq-next' omits dcd24f4d3899 Merge remote-tracking branch 'pidfd/for-next' omits 978f07172ac9 Merge remote-tracking branch 'kgdb/kgdb/for-next' omits b1ed96c921db Merge remote-tracking branch 'hyperv/hyperv-next' omits 768b2c5b73a3 Merge remote-tracking branch 'xarray/xarray' omits b8513c458a09 Merge remote-tracking branch 'nvmem/for-next' omits d48765e5507f Merge remote-tracking branch 'slimbus/for-next' omits 3a99b1e8cf39 Merge remote-tracking branch 'fsi/next' omits 06ddcb431121 Merge remote-tracking branch 'kspp/for-next/kspp' omits 744888d101ad Merge remote-tracking branch 'ntb/ntb-next' omits f2c6288c50ae Merge remote-tracking branch 'nvdimm/libnvdimm-for-next' omits 081fa67a2562 Merge remote-tracking branch 'rtc/rtc-next' omits 6ad09132703c Merge remote-tracking branch 'coresight/next' omits 3079f3e2f802 Merge remote-tracking branch 'livepatching/for-next' omits 42bf7b119418 Merge remote-tracking branch 'random/dev' omits e7854ffd328d Merge remote-tracking branch 'pwm/for-next' omits ff88594beee7 Merge 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branch 'csky/linux-next' omits b717a269b6ea Merge remote-tracking branch 'clk/clk-next' omits 46e982b99e85 Merge remote-tracking branch 'tegra/for-next' omits 244f4a879752 Merge remote-tracking branch 'sunxi/sunxi/for-next' omits f5262839a113 Merge remote-tracking branch 'samsung-krzk/for-next' omits 4660ad837ff7 Merge remote-tracking branch 'rockchip/for-next' omits b430f81e9df8 Merge remote-tracking branch 'reset/reset/next' omits 15dd68d74ca3 Merge remote-tracking branch 'renesas/next' omits f25e2a701bce Merge remote-tracking branch 'realtek/for-next' omits 7f682aba4d90 Merge remote-tracking branch 'raspberrypi/for-next' omits 39c231dbe9c0 Merge remote-tracking branch 'qcom/for-next' omits 47cc14777a56 Merge remote-tracking branch 'omap/for-next' omits aab8ae4db5ca Merge remote-tracking branch 'mvebu/for-next' omits 3f139528a597 Merge remote-tracking branch 'mediatek/for-next' omits 9b4135adca2a Merge remote-tracking branch 'keystone/next' omits e71d030b0793 Merge remote-tracking branch 'imx-mxs/for-next' omits 297da8c74ebb Merge remote-tracking branch 'at91/at91-next' omits 62fce24f83b5 Merge remote-tracking branch 'aspeed/for-next' omits 45fb4d630893 Merge remote-tracking branch 'amlogic/for-next' omits 5190023ef272 Merge remote-tracking branch 'arm-soc/for-next' omits 441ed320492f Merge remote-tracking branch 'arm64/for-next/core' omits 885ef94cd523 Merge remote-tracking branch 'arm/for-next' omits 5c3ae4b1f634 Merge remote-tracking branch 'dma-mapping/for-next' omits 96f5678b7e2e Merge remote-tracking branch 'kbuild/for-next' omits e7321620d80b Merge remote-tracking branch 'kspp-gustavo/for-next/kspp' omits 0b1e9f1086f3 Merge remote-tracking branch 'drm-misc-fixes/for-linux-nex [...] omits 50de3c00f88f Merge remote-tracking branch 'fpga-fixes/fixes' omits 8e936490acc8 Merge remote-tracking branch 'hyperv-fixes/hyperv-fixes' omits 8d8d241f0f51 Merge remote-tracking branch 'mmc-fixes/fixes' omits 12d77cc8c137 Merge remote-tracking branch 'samsung-krzk-fixes/fixes' omits 6a6b918ae893 Merge remote-tracking branch 'btrfs-fixes/next-fixes' omits 9ad313554be1 Merge remote-tracking branch 'nvdimm-fixes/libnvdimm-fixes' omits 016b50913007 Merge remote-tracking branch 'hwmon-fixes/hwmon' omits 63f6f4a69a24 Merge remote-tracking branch 'omap-fixes/fixes' omits 2d479dca9597 Merge remote-tracking branch 'crypto-current/master' omits 78b1cc2a6e28 Merge remote-tracking branch 'usb-chipidea-fixes/ci-for-us [...] omits 91340caf546a Merge remote-tracking branch 'spi-fixes/for-linus' omits 57eaf818dee3 Merge remote-tracking branch 'regmap-fixes/for-linus' omits 1c0506870a4b Merge remote-tracking branch 'sound-asoc-fixes/for-linus' omits d3f257d18761 Merge remote-tracking branch 'sound-current/for-linus' omits 0ae41c4c913d Merge remote-tracking branch 'bpf/master' omits b2b5ffc49799 Merge remote-tracking branch 'net/master' omits d8cbbe175783 Merge remote-tracking branch 'sparc/master' omits c1af47f9d954 Merge remote-tracking branch 'arc-current/for-curr' omits d005ee78244a Merge remote-tracking branch 'fixes/master' omits 1503af98f54d rcutorture: Add test of holding scheduler locks across rcu [...] omits 3f55a8cb7aa6 rcu-tasks: Add IPI failure count to statistics omits 754814aac621 rcutorture: Add TRACE02 scenario enabling RCU Tasks Trace IPIs omits 838850b2716a rcu-tasks: Add count for idle tasks on offline CPUs omits a10e2eed98b5 rcu-tasks: Add rcu_dynticks_zero_in_eqs() effectiveness st [...] omits eb1d96590500 rcu-tasks: Make RCU tasks trace also wait for idle tasks omits ec21d0094a77 rcu-tasks: Handle the running-offline idle-task special case omits f2b326899b61 rcu-tasks: Disable CPU hotplug across RCU tasks trace scans omits a60a2797a83f rcu-tasks: Allow rcu_read_unlock_trace() under scheduler locks omits f4c4ce43cacb rcu-tasks: Avoid IPIing userspace/idle tasks if kernel is [...] omits bfc3f73644ac rcu-tasks: Add Kconfig option to mediate smp_mb() vs. IPI omits 534621ff4aa5 rcu-tasks: Add grace-period and IPI counts to statistics omits a720a3e892a1 rcu-tasks: Split ->trc_reader_need_end omits b5e04f9938c9 rcu-tasks: Provide boot parameter to delay IPIs until late [...] omits 8fc9a59b3f1f rcu-tasks: Add a grace-period start time for throttling and debug omits 4edeeff95124 rcu-tasks: Make RCU Tasks Trace make use of RCU scheduler hooks omits bfabc3f283b9 rcu-tasks: Make rcutorture writer stall output include GP state omits 588f34dd2d36 rcu-tasks: Add RCU tasks to rcutorture writer stall output omits b4000a92b894 rcu-tasks: Move #ifdef into tasks.h omits 48d9b11e999a rcu-tasks: Add stall warnings for RCU Tasks Trace omits 64da9fe4e925 rcutorture: Add torture tests for RCU Tasks Trace omits 4fb89506be24 rcu-tasks: Add an RCU Tasks Trace to simplify protection o [...] omits 2986e1d66cb9 rcu-tasks: Code movement to allow more Tasks RCU variants omits 33116c8fb050 rcu-tasks: Further refactor RCU-tasks to allow adding more [...] omits 2853c0c659b2 rcu-tasks: Use unique names for RCU-Tasks kthreads and messages omits 3fac38837f46 rcutorture: Add torture tests for RCU Tasks Rude omits ad497f41c47b rcu-tasks: Add an RCU-tasks rude variant omits cadf27dbd060 rcu-tasks: Refactor RCU-tasks to allow variants to be added omits de1dac1baa55 rcutorture: Add a test for synchronize_rcu_mult() omits c3dd29a46cb1 rcu: Reinstate synchronize_rcu_mult() omits 4d9499c442e6 rcu-tasks: Create struct to hold state information omits 1f2e6a3d6458 rcu-tasks: Move Tasks RCU to its own file omits d5635e253379 rcutorture: Add flag to produce non-busy-wait task stalls omits a2fedb177568 rcu: Add per-task state to RCU CPU stall warnings omits 4196be7c8511 sched/core: Add function to sample state of locked-down task omits fe3419f5acf0 Merge branch 'clk-imx' into clk-next omits a89255cda204 Merge branch 'clk-fixes' into clk-next omits f5e46c68ddac MAINTAINERS: Update maintainers for new Documentaion/litmu [...] omits c27419915d96 Documentation: LKMM: Add litmus test for RCU GP guarantee [...] omits b345ac81ef90 Documentation: LKMM: Add litmus test for RCU GP guarantee [...] omits 293fd8c9da47 Documentation: LKMM: Move MP+onceassign+derefonce to new l [...] omits e6c4ca6e43ce rcu: Mark rcu_state.gp_seq to detect more concurrent writes omits 82140e399c12 kcsan: Avoid blocking producers in prepare_report() omits ebd17c7cad72 kcsan: Introduce report access_info and other_info omits 3541a5d6d001 rcu/tree: Count number of batched kfree_rcu() locklessly omits f26a2810cbce rcu/tree: Add a shrinker to prevent OOM due to kfree_rcu() [...] omits d9f740b0390d rcuperf: Add ability to increase object allocation size omits 2e9efa26d353 rcu-tasks: Use context-switch hook for PREEMPT=y kernels omits 6a6bf2b45774 rcu: update.c: get rid of some doc warnings omits 939f419e360d rcu: Add comments marking transitions between RCU watching [...] omits f0132b534907 rcu: Don't acquire lock in NMI handler in rcu_nmi_enter_common() omits 43f76469ec57 x86/mm/pat: Mark an intentional data race omits dd61ffd2ef21 Revert "rculist: Describe variadic macro argument in a Sph [...] omits dff3365fb7fd rcu: Fix the (t=0 jiffies) false positive omits 51f1ea00e55a tools/memory-model: Fix "conflict" definition omits ce6074cfbc19 Default enable RCU list lockdep debugging with PROVE_RCU omits 833f53b2c5ff Documentation/locking/atomic: Add a litmus test smp_mb__af [...] omits 3bd201cecb29 Documentation/locking/atomic: Add a litmus test for atomic_set() omits 23c19c80c207 Documentation/locking/atomic: Introduce atomic-tests directory omits 59ffd85c7cb9 Documentation/locking/atomic: Fix atomic-set litmus test omits c13c55d43433 tools/memory-model: Add an exception for limitations on _u [...] omits 160b0b22792e Merge branch 'clk-imx' into clk-next omits f828f725f457 Merge branch 'clk-qcom' into clk-next omits 96d8b0cc59b7 Merge branch 'clk-tegra' into clk-next omits 4e70f3f54b29 Merge branch 'clk-unisoc' into clk-next omits 85db7cee9fd6 Merge branch 'clk-arm-icst' into clk-next omits 1e00779a1fab Merge branch 'clk-mmp2' into clk-next omits e8d72c393947 Merge branch 'clk-at91' into clk-next omits c930ccc57c11 Merge branch 'clk-arm-icst' into clk-next omits c4993dd50030 Merge branch 'clk-typo' into clk-next omits b0bf1cf40f6d Merge branch 'clk-ingenic' into clk-next omits 25aa4d4ff89f Merge branch 'clk-ti' into clk-next omits 2bd3086d1a45 Merge branch 'clk-qcom' into clk-next omits 3de343ef3255 Merge branch 'clk-fixes' into clk-next omits 952ddc22e0d4 Merge branch 'clk-allwinner' into clk-next omits 72f8f018ddc8 Merge branch 'clk-renesas' into clk-next omits 15716dddd82c Merge branch 'clk-qcom' into clk-next omits 0e394a6c55de Merge branch 'clk-qcom' into clk-next omits 5b36638c88df Merge branch 'clk-amlogic' into clk-next omits 27e0278e06f2 Merge branch 'clk-renesas' into clk-next omits f2e23e097ff6 Merge branch 'clk-phase-errors' into clk-next omits 7c45519cbf92 Merge branch 'clk-phase-errors' into clk-next omits 5c5f96168439 Merge branch 'clk-fixes' into clk-next omits 931cfff0458a Merge branch 'clk-socfpga' into clk-next omits 54d34bbe08f1 Merge branch 'clk-si5341' into clk-next omits 898fe3af935a Merge branch 'clk-formatting' into clk-next omits 3f4d7755556b Merge branch 'clk-samsung' into clk-next omits bbc9409f8c8e Merge branch 'clk-at91' into clk-next omits 0d426990beac Merge branch 'clk-phase-errors' into clk-next omits 5d98429bbebc Merge branch 'clk-fixes' into clk-next omits 6e37add6b938 Merge branch 'clk-qcom' into clk-next adds f125e2d4339d ARM: qcom: Add support for IPQ40xx adds 0e8fb69f287b Merge tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/li [...] adds d18292dc07db Merge tag 'arm-drivers-5.7' of git://git.kernel.org/pub/sc [...] adds 9b48c8f132e0 Merge tag 'arm-defconfig-5.7' of git://git.kernel.org/pub/ [...] adds 8bdbf169084e Merge branch 'arm/late' into arm/dt adds 854e80bcfdaf Merge tag 'arm-dt-5.7' of git://git.kernel.org/pub/scm/lin [...] adds 5364abc57993 Merge tag 'arc-5.7-rc1' of git://git.kernel.org/pub/scm/li [...] adds ad0bf4eb91c2 Merge tag 's390-5.7-1' of git://git.kernel.org/pub/scm/lin [...] adds 2fb732b33b0f Merge tag 'vfio-v5.7-rc1' of git://github.com/awilliam/linux-vfio adds 1e396a5d171d Merge tag 'threads-v5.7' of git://git.kernel.org/pub/scm/l [...] adds 6f43bae38269 Merge tag 'dma-mapping-5.7' of git://git.infradead.org/use [...] adds 828907ef25e0 Merge tag 'gpio-v5.7-1' of git://git.kernel.org/pub/scm/li [...] adds bdabb68931b9 Merge tag 'rtc-5.7' of git://git.kernel.org/pub/scm/linux/ [...] adds b3d8e4228268 Merge tag 'nfsd-5.7' of git://git.linux-nfs.org/projects/c [...] adds 83eb69f3b80f Merge branch 'work.exfat' of git://git.kernel.org/pub/scm/ [...] adds ea9448b254e2 Merge tag 'drm-next-2020-04-03-1' of git://anongit.freedes [...] adds d3ec10aa9581 KEYS: Don't write out to userspace while holding key semaphore adds 4f0882491a14 KEYS: Avoid false positive ENOMEM error on key read adds 4c205c84e249 Merge tag 'keys-fixes-20200329' of git://git.kernel.org/pu [...] adds c17cba9f8dcb Merge remote-tracking branch 'fixes/master' adds 4ddb75da3106 Merge remote-tracking branch 'sparc/master' adds 3e1221acf6a8 net: stmmac: dwmac1000: fix out-of-bounds mac address reg setting adds a8eab6d35e22 net_sched: fix a missing refcnt in tcindex_init() adds 6110dff776f7 net: phy: micrel: kszphy_resume(): add delay after genphy_ [...] adds c85adced953a mptcp: add some missing pr_fmt defines adds 0452800f6db4 net: dsa: mt7530: fix null pointer dereferencing in port5 setup adds 10f89fd8bd53 Merge remote-tracking branch 'net/master' adds 1738864853b6 Merge remote-tracking branch 'bpf/master' adds a0af850701ef Merge remote-tracking branch 'sound-current/for-linus' adds 8e0dec280d17 Merge remote-tracking branch 'sound-asoc-fixes/for-linus' adds 27fbb2a8c752 Merge remote-tracking branch 'regmap-fixes/for-linus' adds 31b2a1e7e715 Merge remote-tracking branch 'spi-fixes/for-linus' adds c3a8b9fb49be Merge remote-tracking branch 'usb-chipidea-fixes/ci-for-us [...] adds b6fa0dcf3ed9 Merge remote-tracking branch 'crypto-current/master' adds 6a0033457f23 drivers/ide: convert to list_for_each_entry_safe() adds 94393189f620 Merge remote-tracking branch 'ide/master' adds 53255db2b49e Merge remote-tracking branch 'omap-fixes/fixes' adds c62872bb6f24 Merge remote-tracking branch 'hwmon-fixes/hwmon' adds cd2a1e443cb8 Merge remote-tracking branch 'nvdimm-fixes/libnvdimm-fixes' adds c8b96c0fdec7 Merge remote-tracking branch 'btrfs-fixes/next-fixes' adds 1f81af5e028d Merge remote-tracking branch 'samsung-krzk-fixes/fixes' adds b806cdd6d7de Merge remote-tracking branch 'mmc-fixes/fixes' adds 915f2d49d025 Merge remote-tracking branch 'hyperv-fixes/hyperv-fixes' adds 22971861e61c Merge remote-tracking branch 'fpga-fixes/fixes' adds 25533a084e59 Merge remote-tracking branch 'drm-misc-fixes/for-linux-nex [...] adds 3a864c7ee293 Merge remote-tracking branch 'kspp-gustavo/for-next/kspp' adds 1042611c4385 Merge remote-tracking branch 'kbuild/for-next' adds 6bb20018bcb6 Merge remote-tracking branch 'arm/for-next' adds 5d50d4160030 Merge remote-tracking branch 'arm64/for-next/core' adds d1a3de2a3d55 Merge remote-tracking branch 'arm-soc/for-next' adds ef9c14fe29da Merge remote-tracking branch 'amlogic/for-next' adds 21b2f4771849 Merge remote-tracking branch 'aspeed/for-next' adds 717b7d838427 Merge remote-tracking branch 'at91/at91-next' adds a4332dbffa6a Merge remote-tracking branch 'imx-mxs/for-next' adds 2ebd1d98f611 Merge remote-tracking branch 'keystone/next' adds 02e08c2bedbd Merge remote-tracking branch 'mediatek/for-next' adds c4c3ecd580b5 Merge remote-tracking branch 'mvebu/for-next' adds dbdf25b5c23e Merge remote-tracking branch 'omap/for-next' adds da4cd782c6b6 Merge remote-tracking branch 'qcom/for-next' adds b8cd43426751 Merge remote-tracking branch 'raspberrypi/for-next' adds b9c0c1233387 Merge remote-tracking branch 'realtek/for-next' adds c0b6efaadad1 Merge remote-tracking branch 'renesas/next' adds 82b330c9ede0 Merge remote-tracking branch 'reset/reset/next' adds ad870a9d9aea Merge remote-tracking branch 'rockchip/for-next' adds d56bef6aca5c Merge remote-tracking branch 'samsung-krzk/for-next' adds a598c8ef1aa0 Merge remote-tracking branch 'sunxi/sunxi/for-next' adds c496e3876fcf Merge remote-tracking branch 'tegra/for-next' adds ea0a1fb716c1 Merge branches 'clk-samsung', 'clk-formatting', 'clk-si534 [...] adds 2d11e9a1fd2a Merge branches 'clk-phase-errors', 'clk-amlogic', 'clk-ren [...] adds 53a2cc5cc36f Merge branches 'clk-ti', 'clk-ingenic', 'clk-typo', 'clk-a [...] adds 39d1c90665e3 clk: sprd: fix to get a correct ibias of pll adds 28ecaf1c30fe Merge branches 'clk-unisoc', 'clk-tegra', 'clk-qcom' and ' [...] adds 02c476deb2c8 Merge remote-tracking branch 'clk/clk-next' adds 42fe5f33c7bb Merge remote-tracking branch 'csky/linux-next' adds f2b3f0dc507b Merge remote-tracking branch 'h8300/h8300-next' adds 619edbbe22d5 Merge remote-tracking branch 'm68knommu/for-next' adds 0a1531b2f29e Merge remote-tracking branch 'nds32/next' adds 2e13e44ebf06 Merge remote-tracking branch 'openrisc/for-next' adds 3f699393d3d6 Merge remote-tracking branch 'parisc-hd/for-next' adds cce568daadfe Merge remote-tracking branch 'powerpc/next' adds 85394a8e96ad Merge remote-tracking branch 'risc-v/for-next' adds b324f802271b Merge remote-tracking branch 'sh/sh-next' adds 2aea408c8cff Merge remote-tracking branch 'uml/linux-next' adds 325f22900b86 Merge remote-tracking branch 'xtensa/xtensa-for-next' adds 59fbb0bbbcba Merge remote-tracking branch 'btrfs/for-next' adds 72374806ee97 Merge remote-tracking branch 'ceph/master' adds 52d31905763a Merge remote-tracking branch 'cifs/for-next' adds bbc29626a80b Merge remote-tracking branch 'ext3/for_next' adds 2e14e6e37ea9 Merge remote-tracking branch 'ext4/dev' adds 362312b79700 Merge remote-tracking branch 'f2fs/dev' adds cf0aff0c3b6e Merge remote-tracking branch 'jfs/jfs-next' adds 8bb0227b84c4 Merge remote-tracking branch 'nfs/linux-next' adds d2f80b6ffd6a Merge remote-tracking branch 'nfsd/nfsd-next' adds aeb2cfa6a3cd Merge remote-tracking branch 'overlayfs/overlayfs-next' adds cb734f63bca0 Merge remote-tracking branch 'ubifs/linux-next' adds 21ebdba5e691 Merge remote-tracking branch 'v9fs/9p-next' adds 86eabb4be1f3 Merge remote-tracking branch 'xfs/for-next' adds 9b3ba7cc3251 Merge remote-tracking branch 'iomap/iomap-for-next' adds a5c977615a9f Merge remote-tracking branch 'file-locks/locks-next' adds 9cf147b8dc0f Merge remote-tracking branch 'vfs/for-next' adds 3fb0ebb278ca Merge remote-tracking branch 'printk/for-next' adds d8dbe922b36e Merge remote-tracking branch 'hid/for-next' adds d627cd4178cf Merge remote-tracking branch 'i2c/i2c/for-next' adds 9f039f11c4c9 Merge branch 'dmi/master' adds 696ac2e3bf26 x86: ACPI: fix CPU hotplug deadlock adds 58b7033ec57e Merge branch 'acpi-x86' into linux-next adds ddfd9dcf270c ACPI: PM: Add acpi_[un]register_wakeup_handler() adds 767191db8220 platform/x86: intel_int0002_vgpio: Use acpi_register_wakeu [...] adds 8a378171d0e1 Merge branch 'pm-acpi' into linux-next adds b64df879abe6 Merge remote-tracking branch 'pm/linux-next' adds 7219601bc878 Merge remote-tracking branch 'thermal/thermal/linux-next' adds f6c423a07f98 Merge remote-tracking branch 'ieee1394/for-next' adds 10772de67095 Merge remote-tracking branch 'swiotlb/linux-next' adds bb794b3bacfb Merge remote-tracking branch 'bluetooth/master' adds 1955584bf3a8 Merge remote-tracking branch 'mac80211-next/master' adds 9870afcdefa3 Merge remote-tracking branch 'amdgpu/drm-next' adds cd70b299113c Merge remote-tracking branch 'drm-intel/for-linux-next' adds cc46c03397c1 Merge drm/drm-next into drm-misc-next-fixes adds efb82bb7fb78 Merge remote-tracking branch 'drm-misc/for-linux-next' adds 0bec8df276c2 Merge remote-tracking branch 'mali-dp/for-upstream/mali-dp' adds e48126f55e38 Merge remote-tracking branch 'imx-drm/imx-drm/next' adds 405a47990350 Merge remote-tracking branch 'regmap/for-next' adds a2324a1d43a4 Merge remote-tracking branch 'modules/modules-next' adds 093d426b82d5 Merge remote-tracking branch 'input/next' adds 0b7cb64c7305 Merge remote-tracking branch 'block/for-next' adds fa8883a13bcb Merge remote-tracking branch 'pcmcia/pcmcia-next' adds fb56ea8ece71 Merge remote-tracking branch 'mfd/for-mfd-next' adds 2e59f0558652 Merge remote-tracking branch 'backlight/for-backlight-next' adds 31256365bde6 Merge remote-tracking branch 'battery/for-next' adds a67327398c74 Merge remote-tracking branch 'apparmor/apparmor-next' adds ba1ffa94d20b Merge remote-tracking branch 'keys/keys-next' adds 9fb64ec8f5c9 Merge remote-tracking branch 'smack/for-next' adds 6c2491191b37 Merge remote-tracking branch 'watchdog/master' adds ae64d1066c3d Merge remote-tracking branch 'iommu/next' adds 3283d948b88e Merge remote-tracking branch 'tip/auto-latest' adds ce2f3dbb74ed Merge remote-tracking branch 'clockevents/timers/drivers/next' adds ad4baa438c45 Merge remote-tracking branch 'edac/edac-for-next' adds 39e3c9702c82 Merge remote-tracking branch 'ftrace/for-next' adds 7439824ecaf3 Default enable RCU list lockdep debugging with PROVE_RCU adds 36eb0901ad0b tools/memory-model: Fix "conflict" definition adds efb34dd76055 rcu: Fix the (t=0 jiffies) false positive adds d0bf09c5ac09 Revert "rculist: Describe variadic macro argument in a Sph [...] adds 89888487e7e8 x86/mm/pat: Mark an intentional data race adds 6a4e034c65d8 rcu: Don't acquire lock in NMI handler in rcu_nmi_enter_common() adds b281de6a2c7f rcu: Add comments marking transitions between RCU watching [...] adds 5018b39d0822 rcu: update.c: get rid of some doc warnings adds 55dbcc2b0a51 rcu-tasks: Use context-switch hook for PREEMPT=y kernels adds 9eb0bb7ae6f5 rcuperf: Add ability to increase object allocation size adds 7a1c60d9e118 rcu/tree: Add a shrinker to prevent OOM due to kfree_rcu() [...] adds c2a24586e8c4 rcu/tree: Count number of batched kfree_rcu() locklessly adds 74e61419ecca kcsan: Introduce report access_info and other_info adds df7d42ac3955 kcsan: Avoid blocking producers in prepare_report() adds 1cab6833db3b rcu: Mark rcu_state.gp_seq to detect more concurrent writes adds 64b89b71144c Documentation: LKMM: Move MP+onceassign+derefonce to new l [...] adds 4904bcd686a9 Documentation: LKMM: Add litmus test for RCU GP guarantee [...] adds 46d6c3ffc0c1 Documentation: LKMM: Add litmus test for RCU GP guarantee [...] adds f5b2607dd80e MAINTAINERS: Update maintainers for new Documentaion/litmu [...] adds 9b6df7882b76 sched/core: Add function to sample state of locked-down task adds cccbab1e7aee rcu: Add per-task state to RCU CPU stall warnings adds 82d1582a5963 rcutorture: Add flag to produce non-busy-wait task stalls adds 4dbad397293c rcu-tasks: Move Tasks RCU to its own file adds d4f046d9e78e rcu-tasks: Create struct to hold state information adds 1196612809e0 rcu: Reinstate synchronize_rcu_mult() adds c0963e8ca738 rcutorture: Add a test for synchronize_rcu_mult() adds dfdddf06801d rcu-tasks: Refactor RCU-tasks to allow variants to be added adds ced65b14ee06 rcu-tasks: Add an RCU-tasks rude variant adds f09371aa29c2 rcutorture: Add torture tests for RCU Tasks Rude adds 71360d23d5a7 rcu-tasks: Use unique names for RCU-Tasks kthreads and messages adds fd6ee13466fe rcu-tasks: Further refactor RCU-tasks to allow adding more [...] adds 93e94b89113a rcu-tasks: Code movement to allow more Tasks RCU variants adds c482fc396ce3 rcu-tasks: Add an RCU Tasks Trace to simplify protection o [...] adds b64fe0023cf4 rcutorture: Add torture tests for RCU Tasks Trace adds f58137ac18eb rcu-tasks: Add stall warnings for RCU Tasks Trace adds b90e98ac6324 rcu-tasks: Move #ifdef into tasks.h adds 2619c112cae7 rcu-tasks: Add RCU tasks to rcutorture writer stall output adds 68a3255ead72 rcu-tasks: Make rcutorture writer stall output include GP state adds 6c13106e6b74 rcu-tasks: Make RCU Tasks Trace make use of RCU scheduler hooks adds 7d9852063ef4 rcu-tasks: Add a grace-period start time for throttling and debug adds 4169d0279410 rcu-tasks: Provide boot parameter to delay IPIs until late [...] adds 7b4996b0be1e rcu-tasks: Split ->trc_reader_need_end adds 692d7e4e1056 rcu-tasks: Add grace-period and IPI counts to statistics adds fda9aa10864a rcu-tasks: Add Kconfig option to mediate smp_mb() vs. IPI adds 3da22f7569d7 rcu-tasks: Avoid IPIing userspace/idle tasks if kernel is [...] adds 564521786488 rcu-tasks: Allow rcu_read_unlock_trace() under scheduler locks adds ec9adcf3d9ce rcu-tasks: Disable CPU hotplug across RCU tasks trace scans adds 3cb9dda392b6 rcu-tasks: Handle the running-offline idle-task special case adds 82d43b9ebac6 rcu-tasks: Make RCU tasks trace also wait for idle tasks adds 87369089104a rcu-tasks: Add rcu_dynticks_zero_in_eqs() effectiveness st [...] adds a9450175a508 rcu-tasks: Add count for idle tasks on offline CPUs adds c25090b348e2 rcutorture: Add TRACE02 scenario enabling RCU Tasks Trace IPIs adds bfa3e1f82553 rcu-tasks: Add IPI failure count to statistics adds dd6015fc3443 rcutorture: Add test of holding scheduler locks across rcu [...] adds 86fb904adfe9 rcutorture: Right-size TREE10 CPU consumption adds b6a5ef6fca97 rcu: Replace assigned pointer ret value by corresponding b [...] adds 77fd35b3dbd0 rcu: Replace 1 by true adds fd03527d77de kcsan: Add support for scoped accesses adds 273bb91ee1b8 objtool, kcsan: Add explicit check functions to uaccess whitelist adds c6dd810c818b kcsan: Introduce scoped ASSERT_EXCLUSIVE macros adds d25c85d89469 kcsan: Move kcsan_{disable,enable}_current() to kcsan-checks.h adds eca25bb22614 kcsan: Change data_race() to no longer require marking rac [...] adds e111bf63c02e rcu: When GP kthread is starved, tag idle threads as false [...] adds dbcd0e16adfb tools/memory-model: Add an exception for limitations on _u [...] adds 9065b05371d0 Documentation/litmus-tests: Introduce atomic directory adds 3a183d982b28 Documentation/litmus-tests/atomic: Add a test for atomic_set() adds ed137881ef13 Documentation/litmus-tests/atomic: Add a test for smp_mb__ [...] adds 786b9fec2dba rcu: Allow rcutorture to starve grace-period kthread adds 59377f3e06b8 ftrace: Use synchronize_rcu_tasks_rude() instead of ftrace_sync() adds c9a503a8ebd2 rcu: Remove self-stack-trace when all quiescent states seen adds 878f6b2560c3 Merge remote-tracking branch 'rcu/rcu/next' adds f537ea03dbc4 Merge remote-tracking branch 'percpu/for-next' adds a8312416d79d Merge remote-tracking branch 'workqueues/for-next' adds f183f642e1ba Merge remote-tracking branch 'chrome-platform/for-next' adds 933d39db95bd Merge remote-tracking branch 'leds/for-next' adds 1d1bd00a3419 Merge remote-tracking branch 'ipmi/for-next' adds 61778a3c3291 Merge remote-tracking branch 'usb-chipidea-next/ci-for-usb-next' adds be59825e1c41 Merge remote-tracking branch 'mux/for-next' adds 4006bb11e26e Merge remote-tracking branch 'cgroup/for-next' adds 8c1d7d5463de Merge remote-tracking branch 'scsi/for-next' adds 336ae4c1a012 Merge remote-tracking branch 'vhost/linux-next' adds 3f1dca2da056 Merge remote-tracking branch 'rpmsg/for-next' adds 1ca7c823ce84 Merge remote-tracking branch 'pwm/for-next' adds b4db8d758258 Merge remote-tracking branch 'random/dev' adds 829aca7aea2b Merge remote-tracking branch 'livepatching/for-next' adds cf4bb974688b Merge remote-tracking branch 'coresight/next' adds f467a0f0b96e Merge remote-tracking branch 'nvdimm/libnvdimm-for-next' adds 95fd8a4d6ab1 Merge remote-tracking branch 'ntb/ntb-next' adds 26ef95500d41 Merge remote-tracking branch 'kspp/for-next/kspp' adds 21dfe61618ef Merge remote-tracking branch 'fsi/next' adds 0a9504695a28 Merge remote-tracking branch 'slimbus/for-next' adds 9fa2960f477d Merge remote-tracking branch 'nvmem/for-next' adds b945ed3d71e7 Merge remote-tracking branch 'xarray/xarray' adds 6ee17ab899d7 Merge remote-tracking branch 'hyperv/hyperv-next' adds 36e8d76b07ff Merge remote-tracking branch 'kgdb/kgdb/for-next' adds 97c481500e02 Merge remote-tracking branch 'devfreq/devfreq-next' adds e28fe96f6d15 Merge remote-tracking branch 'fpga/for-next' adds eb29440fde03 drivers/ide: fix for conversion adds 6eee8ee979db Merge branch 'akpm-current/current' adds 4d0493a25b7c Change email address for Pali Rohár adds 327f0010e944 mm/kmemleak: silence KCSAN splats in checksum adds 9a14ec6f535f drivers/dma/tegra20-apb-dma.c: fix platform_get_irq.cocci [...] adds de9d56143ad1 mm/frontswap: mark various intentional data races adds 5b919172549c mm/page_io: mark various intentional data races adds 3f5947f7ca8c mm-page_io-mark-various-intentional-data-races-v2 adds 434d60cac407 mm/swap_state: mark various intentional data races adds 9c979f53657b mm/filemap.c: fix a data race in filemap_fault() adds 091a74628998 mm/swapfile: fix and annotate various data races adds 2bbb3a9c7f29 mm-swapfile-fix-and-annotate-various-data-races-v2 adds 564cc5223753 mm/page_counter: fix various data races at memsw adds edfcd99115a1 mm/memcontrol: fix a data race in scan count adds 537e27fd5071 mm/list_lru: fix a data race in list_lru_count_one adds b10a4900227b mm/mempool: fix a data race in mempool_free() adds 40d443f201d1 mm/util.c: annotate an data race at vm_committed_as adds 0ac756323d6f mm/rmap: annotate a data race at tlb_flush_batched adds 80497581a10a mm: annotate a data race in page_zonenum() adds fa2a38e71004 mm/swap.c: annotate data races for lru_rotate_pvecs adds f4ea8b607dad mm/memory.c: refactor insert_page to prepare for batched-l [...] adds ba6d161b2c9f mm: bring sparc pte_index() semantics inline with other platforms adds b4b598eb5909 mm: define pte_index as macro for x86 adds 229c4b8eaecb mm/memory.c: add vm_insert_pages() adds a89d5abdc74c mm-add-vm_insert_pages-fix adds 57e27095831e add missing page_count() check to vm_insert_pages(). adds 1d43527d5c91 mm: vm_insert_pages() checks if pte_index defined. adds 891c0c5c8b6d net-zerocopy: use vm_insert_pages() for tcp rcv zerocopy adds 00f289eed808 net-zerocopy-use-vm_insert_pages-for-tcp-rcv-zerocopy-fix adds a85589be1021 mm/vma: define a default value for VM_DATA_DEFAULT_FLAGS adds 617e314469b5 mm/vma: introduce VM_ACCESS_FLAGS adds a7740c154fe4 mm/special: create generic fallbacks for pte_special() and [...] adds 9e7a3d7d8d7b mm-special-create-generic-fallbacks-for-pte_special-and-pt [...] adds ba5a010fa0b8 mm/debug: add tests validating architecture page table helpers adds 75274c14e8a4 mm/memory_hotplug: drop the flags field from struct mhp_re [...] adds 4a8c1842d51c mm/memory_hotplug: rename mhp_restrictions to mhp_params adds 1c6f0d9e0a75 x86/mm: thread pgprot_t through init_memory_mapping() adds 388208088591 x86/mm: introduce __set_memory_prot() adds db1c73c2ca9d powerpc/mm: thread pgprot_t through create_section_mapping() adds 84ef7b7f6e44 mm/memory_hotplug: add pgprot_t to mhp_params adds 352b1594d5c7 mm/memremap: set caching mode for PCI P2PDMA memory to WC adds 4611b5033408 mm/madvise: pass task and mm to do_madvise adds 68c9b8a89343 mm/madvise: introduce process_madvise() syscall: an extern [...] adds b6b8cd8d4763 fix process_madvise build break for arm64 adds f0acfdbbada5 mm/madvise: check fatal signal pending of target process adds c8cd874a7d44 pid: move pidfd_get_pid() to pid.c adds d5ae2ef0a98f mm/madvise: support both pid and pidfd for process_madvise adds 142a1376b655 mm/madvise: employ mmget_still_valid() for write lock adds 191ffb3af1c2 mm/madvise: allow KSM hints for remote API adds ae82249316ea kmod: make request_module() return an error when autoloadi [...] adds 2278fa85a6d8 fs/filesystems.c: downgrade user-reachable WARN_ONCE() to [...] adds 6e35112a837a docs: admin-guide: document the kernel.modprobe sysctl adds 61797d4eb593 docs-admin-guide-document-the-kernelmodprobe-sysctl-v5 adds 90277ea23771 selftests: kmod: fix handling test numbers above 9 adds d6a3b19c98ec selftests: kmod: test disabling module autoloading adds 93bde3013cdd kexec: prevent removal of memory in use by a loaded kexec image adds 5997fd39c49c mm/memory_hotplug: allow arch override of non boot memory [...] adds 14a4bd9ceffa arm64: memory: give hotplug memory a different resource name adds 7aa46858fa9d fs/seq_file.c: seq_read(): add info message about buggy .n [...] adds 852e38e0e653 seq_read-info-message-about-buggy-next-functions-fix adds a7c7867200de kernel/gcov/fs.c: gcov_seq_next() should increase position index adds a8ed58cac0a0 ipc/util.c: sysvipc_find_ipc() should increase position index adds e793b3276816 drivers/media/platform/sti/delta/delta-ipc.c: fix read buf [...] adds 17cbc8b8ef3d Merge branch 'akpm/master' adds 57021046c331 Add linux-next specific files for 20200405 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (dff795974310) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-n [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. No new revisions were added by this update. Summary of changes: Documentation/admin-guide/kernel-parameters.txt | 7 + Documentation/dev-tools/kcsan.rst | 3 +- ...b__after_atomic-is-stronger-than-acquire.litmus | 0 ...Atomic-RMW-ops-are-atomic-WRT-atomic_set.litmus | 4 +- .../{atomic-tests => litmus-tests/atomic}/README | 0 MAINTAINERS | 1 - Next/SHA1s | 22 +- Next/merge.log | 4830 +++++--------------- arch/arm/Makefile | 1 + arch/arm/configs/omap2plus_defconfig | 6 +- arch/arm/mach-qcom/Kconfig | 5 + arch/x86/kernel/acpi/cstate.c | 3 +- drivers/acpi/processor_throttling.c | 7 - drivers/acpi/sleep.c | 4 + drivers/acpi/sleep.h | 1 + drivers/acpi/wakeup.c | 81 + drivers/clk/sprd/pll.c | 7 +- drivers/ide/ide-scan-pci.c | 8 +- drivers/net/dsa/mt7530.c | 3 + .../net/ethernet/stmicro/stmmac/dwmac1000_core.c | 2 +- drivers/net/phy/micrel.c | 7 + drivers/platform/x86/intel_int0002_vgpio.c | 10 + include/acpi/processor.h | 8 + include/keys/big_key-type.h | 2 +- include/keys/user-type.h | 3 +- include/linux/acpi.h | 5 + include/linux/compiler.h | 4 +- include/linux/kcsan-checks.h | 146 +- include/linux/kcsan.h | 19 +- include/linux/key-type.h | 2 +- init/init_task.c | 1 + kernel/kcsan/core.c | 83 +- kernel/kcsan/debugfs.c | 16 +- kernel/kcsan/report.c | 33 +- kernel/rcu/rcu.h | 2 + kernel/rcu/rcutorture.c | 20 +- kernel/rcu/tree.c | 29 +- kernel/rcu/tree_stall.h | 24 +- kernel/rcu/update.c | 6 +- localversion-next | 2 +- net/dns_resolver/dns_key.c | 2 +- net/mptcp/options.c | 2 + net/mptcp/pm.c | 2 + net/mptcp/pm_netlink.c | 2 + net/rxrpc/key.c | 27 +- net/sched/cls_tcindex.c | 1 + security/keys/big_key.c | 11 +- security/keys/encrypted-keys/encrypted.c | 7 +- security/keys/internal.h | 12 + security/keys/keyctl.c | 103 +- security/keys/keyring.c | 6 +- security/keys/request_key_auth.c | 7 +- security/keys/trusted-keys/trusted_tpm1.c | 14 +- security/keys/user_defined.c | 5 +- tools/memory-model/README | 2 +- tools/objtool/check.c | 2 + .../selftests/rcutorture/configs/rcu/TREE10 | 2 +- 57 files changed, 1733 insertions(+), 3891 deletions(-) rename Documentation/{atomic-tests => litmus-tests/atomic}/Atomic-RMW+mb__after_at [...] rename Documentation/{atomic-tests => litmus-tests/atomic}/Atomic-RMW-ops-are-atom [...] rename Documentation/{atomic-tests => litmus-tests/atomic}/README (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig updated (62f3a9650a9 -> 51e3709c2b9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig in repository toolchain/ci/llvm-project. from 62f3a9650a9 [libc++] Attempt to workaround module invalidation bug adds a5eb1236e3b [IVDescriptors] Remove unnecessary DemandedBits.h include; NFC adds 1055e9e3c87 [IVDescriptors] Remove IRBuilder.h include; NFC adds ebd5a1b0498 [Reassociate] Use IRBuilderBase; NFC adds 541bead8b42 [Object] object::ELFObjectFile::dynamic_symbol_begin(): ski [...] adds 6896d559f3c [VNCoercion] Use IRBuilderBase; NFC adds b90ea4f3419 [IRBuilder] Move some code into the cpp file; NFC adds e5e719d8854 [X86][SSE] lowerV8I16Shuffle - lower compaction shuffles us [...] adds 87fd686f6fd [CostModel][X86] Add insert/extract cost tests for sub-128b [...] adds 6a57ba17c03 [CostModel][X86] Add shuffle cost tests for sub-128bit vectors adds 2e9839729d3 [WebAssembly] Fix wasm.lsda() optimization in WasmEHPrepare adds 0f9e1e3ae75 [clang-tidy]: fix false positive of cert-oop54-cpp check. adds 7db64e202f9 Disable relative paths in lit.site.cfg in presence of symlinks adds ceed44adfd1 [OpenMP][NFC] Remove unnecessary argument adds eec6d87626e [Attributor] Deduce attributes for non-exact functions adds 4ede7300968 [InstCombine] Don't limit uses in eraseInstFromFunction() adds eb81d440fc9 fix typo in comment to cycle bots adds fc5d8b672b9 [WebAssembly] Fix a sanitizer error in WasmEHPrepare adds 160f5aa65fa [mlir] Add an out-of-tree dialect example adds a2b18c5a080 [LV] Simplify tryToWiden as recipes are not re-used (NFC). adds 28202dd35cc [InstCombine] add more tests for min/max folding; NFC adds 6d343740435 [ValueTracking] add tests for smin/smax; NFC adds a13212582a9 [ELF][test] Test that thunks are processed before finalizeS [...] adds 9195b019113 [ELF][PPC64] Enable R_PPC64_REL14 trunks adds 17673ae0b2c [DAG] Fix PR45049: LegalizeTypes crash adds 3ce77142a64 Revert "[DAG] Fix PR45049: LegalizeTypes crash" adds 54176d1766f libcxx 'LLVM_USE_SANITIZER=Address;Undefined' adds 1580c76c4a0 [libc++] Enable the new libc++ testing format by default adds 3380d4d75e8 [X86] Cleanup vectorcall test checks adds be84d2b5b7e [CostModel][X86] Add some insert subvector cost tests for v [...] adds 695ca346eb0 [compiler-rt] Fix build on NetBSD 9.99.52+ adds f3dd3a66d3d [Attributor] AAUndefinedBehavior: Use AAValueSimplify in me [...] adds 221890d7092 AMDGPU: Add feature for fast f32 denormals adds 475abe14a59 [Attributor] Make use of analysis in the MustBeExecutedExplorer adds c80cf48801b [Attributor] AAReachability : use isPotentiallyReachable in [...] adds 6bfe28e92f6 AMDGPU: Fix annotate kernel features through casted calls adds abdd042bb7a [clang-tools-extra] NFC: Fix trivial typo in documents and [...] adds 5aacce3db2e [mlir] NFC: Fix trivial typo adds 948ef5b1a60 [llvm-objdump] Teach `llvm-objdump` dump dynamic symbols. adds 685bf42e9e0 [llvm-objdump][test] Remove unimplemented-features.test adds dc4c8a3c9c4 [llvm-objdump][test] Recommit unimplemented-features.test adds 688fe2d03da [llvm-nm] Add test for `--debug-syms --dynamic` adds 86b97f00a28 [llvm-objdump] Simplify conditional statements (isa<...>(Ob [...] adds dd5571d51a0 [clang-tools-extra] NFC: Fix trivial typo in documents and [...] adds 0359b86d8bb [mlir][ODS] Add support for variadic regions. new 51e3709c2b9 [MLIR] Don't insert YieldOp for non-void loop.for by default. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../clang-change-namespace/ChangeNamespace.cpp | 2 +- .../clang-change-namespace/ChangeNamespace.h | 4 +- clang-tools-extra/clang-doc/Generators.cpp | 2 +- clang-tools-extra/clang-doc/Serialize.cpp | 2 +- .../clang-include-fixer/IncludeFixer.h | 2 +- .../clang-include-fixer/IncludeFixerContext.h | 2 +- .../clang-include-fixer/SymbolIndexManager.cpp | 2 +- .../find-all-symbols/FindAllSymbols.cpp | 2 +- .../find-all-symbols/tool/run-find-all-symbols.py | 2 +- .../tool/clang-include-fixer.py | 2 +- clang-tools-extra/clang-move/Move.cpp | 8 +- .../clang-reorder-fields/ReorderFieldsAction.cpp | 4 +- .../abseil/DurationFactoryScaleCheck.cpp | 2 +- .../clang-tidy/abseil/DurationRewriter.cpp | 2 +- .../clang-tidy/abseil/TimeSubtractionCheck.cpp | 2 +- .../clang-tidy/bugprone/BranchCloneCheck.cpp | 4 +- .../clang-tidy/bugprone/FoldInitTypeCheck.cpp | 2 +- .../MisplacedOperatorInStrlenInAllocCheck.cpp | 2 +- .../clang-tidy/bugprone/SizeofExpressionCheck.cpp | 2 +- .../bugprone/SuspiciousEnumUsageCheck.cpp | 2 +- .../bugprone/SuspiciousMissingCommaCheck.cpp | 2 +- .../bugprone/UnhandledSelfAssignmentCheck.cpp | 7 +- .../clang-tidy/bugprone/UnusedRaiiCheck.cpp | 2 +- .../clang-tidy/bugprone/UseAfterMoveCheck.cpp | 2 +- .../cppcoreguidelines/OwningMemoryCheck.cpp | 2 +- .../cppcoreguidelines/ProTypeMemberInitCheck.cpp | 2 +- .../cppcoreguidelines/ProTypeMemberInitCheck.h | 2 +- .../fuchsia/MultipleInheritanceCheck.cpp | 2 +- .../clang-tidy/fuchsia/MultipleInheritanceCheck.h | 2 +- .../clang-tidy/hicpp/ExceptionBaseclassCheck.cpp | 2 +- .../clang-tidy/hicpp/MultiwayPathsCoveredCheck.cpp | 4 +- .../clang-tidy/misc/NoRecursionCheck.cpp | 6 +- .../clang-tidy/modernize/LoopConvertUtils.cpp | 2 +- .../clang-tidy/modernize/MakeSmartPtrCheck.cpp | 2 +- .../clang-tidy/modernize/UseAutoCheck.cpp | 2 +- .../clang-tidy/modernize/UseNullptrCheck.cpp | 2 +- .../modernize/UseTrailingReturnTypeCheck.cpp | 2 +- .../readability/ConstReturnTypeCheck.cpp | 2 +- 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clang-tools-extra/clangd/QueryDriverDatabase.cpp | 2 +- clang-tools-extra/clangd/index/Background.cpp | 2 +- clang-tools-extra/clangd/index/Serialization.cpp | 2 +- clang-tools-extra/clangd/index/SymbolOrigin.h | 2 +- clang-tools-extra/clangd/index/dex/Trigram.cpp | 2 +- clang-tools-extra/clangd/refactor/Rename.cpp | 4 +- clang-tools-extra/clangd/refactor/Rename.h | 2 +- .../clangd/refactor/tweaks/AddUsing.cpp | 2 +- .../clangd/refactor/tweaks/DefineInline.cpp | 6 +- .../clangd/refactor/tweaks/DefineOutline.cpp | 4 +- .../clangd/refactor/tweaks/ExtractFunction.cpp | 4 +- clang-tools-extra/clangd/tool/ClangdMain.cpp | 2 +- .../clangd/unittests/CodeCompleteTests.cpp | 8 +- .../clangd/unittests/CollectMacrosTests.cpp | 2 +- .../clangd/unittests/FindTargetTests.cpp | 2 +- .../clangd/unittests/HeaderSourceSwitchTests.cpp | 2 +- .../clangd/unittests/PathMappingTests.cpp | 2 +- clang-tools-extra/clangd/unittests/RenameTests.cpp | 2 +- .../clangd/unittests/SymbolInfoTests.cpp | 2 +- clang-tools-extra/clangd/unittests/TweakTests.cpp | 2 +- ...prone-misplaced-pointer-arithmetic-in-alloc.rst | 2 +- .../checks/bugprone-virtual-near-miss.rst | 2 +- .../performance-inefficient-vector-operation.rst | 2 +- .../portability-restrict-system-includes.rst | 2 +- ...dability-convert-member-functions-to-static.rst | 2 +- .../readability-make-member-function-const.rst | 2 +- clang-tools-extra/docs/doxygen.cfg.in | 2 +- clang-tools-extra/docs/pp-trace.rst | 2 +- clang-tools-extra/modularize/CoverageChecker.cpp | 2 +- clang-tools-extra/modularize/CoverageChecker.h | 2 +- clang-tools-extra/modularize/Modularize.cpp | 2 +- .../modularize/PreprocessorTracker.cpp | 6 +- clang-tools-extra/pp-trace/PPCallbacksTracker.h | 4 +- .../test/clang-move/move-used-helper-decls.cpp | 10 +- .../header-fixed.h | 2 +- .../performance-unnecessary-value-param/header.h | 2 +- .../checkers/abseil-duration-subtraction.cpp | 2 +- .../clang-tidy/checkers/bugprone-branch-clone.cpp | 2 +- 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| 60 + lld/test/ELF/ppc64-long-branch.s | 9 + llvm/cmake/modules/AddLLVM.cmake | 10 +- llvm/docs/CommandGuide/llvm-objdump.rst | 4 + llvm/include/llvm/Analysis/IVDescriptors.h | 3 +- llvm/include/llvm/IR/IRBuilder.h | 346 +----- llvm/include/llvm/Object/ELFObjectFile.h | 8 +- llvm/include/llvm/Transforms/IPO/Attributor.h | 21 +- llvm/include/llvm/Transforms/Scalar/Reassociate.h | 4 +- llvm/include/llvm/Transforms/Utils/LoopUtils.h | 1 - llvm/include/llvm/Transforms/Utils/VNCoercion.h | 5 +- llvm/lib/Analysis/IVDescriptors.cpp | 1 + llvm/lib/CodeGen/WasmEHPrepare.cpp | 165 ++- llvm/lib/IR/IRBuilder.cpp | 376 +++++++ llvm/lib/Target/AMDGPU/AMDGPU.td | 14 +- .../Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 1 + llvm/lib/Target/X86/X86ISelLowering.cpp | 23 + llvm/lib/Transforms/IPO/Attributor.cpp | 87 +- .../Transforms/InstCombine/InstCombineInternal.h | 9 +- llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp | 1 + llvm/lib/Transforms/Scalar/Reassociate.cpp | 4 +- llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp | 1 + llvm/lib/Transforms/Utils/VNCoercion.cpp | 3 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 21 +- llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h | 10 +- .../Analysis/CostModel/X86/shuffle-broadcast.ll | 44 +- .../CostModel/X86/shuffle-insert_subvector.ll | 1188 +++++++++++++++++++- .../test/Analysis/CostModel/X86/shuffle-reverse.ll | 54 +- .../Analysis/CostModel/X86/shuffle-single-src.ll | 77 +- .../Analysis/CostModel/X86/shuffle-transpose.ll | 54 +- .../test/Analysis/CostModel/X86/shuffle-two-src.ll | 77 +- llvm/test/Analysis/CostModel/X86/vector-extract.ll | 155 +++ llvm/test/Analysis/CostModel/X86/vector-insert.ll | 125 ++ .../AMDGPU/annotate-kernel-features-hsa-call.ll | 15 + llvm/test/CodeGen/WebAssembly/wasmehprepare.ll | 224 +++- llvm/test/CodeGen/X86/cast-vsel.ll | 32 +- llvm/test/CodeGen/X86/masked_store_trunc.ll | 38 +- llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll | 51 +- llvm/test/CodeGen/X86/masked_store_trunc_usat.ll | 63 +- llvm/test/CodeGen/X86/phaddsub.ll | 8 +- llvm/test/CodeGen/X86/psubus.ll | 24 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-256.ll | 231 ++-- llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll | 67 +- llvm/test/CodeGen/X86/vector-reduce-and-bool.ll | 8 +- llvm/test/CodeGen/X86/vector-reduce-or-bool.ll | 8 +- llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll | 8 +- llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll | 92 +- llvm/test/CodeGen/X86/vector-trunc-packus.ll | 160 +-- llvm/test/CodeGen/X86/vector-trunc-ssat.ll | 162 ++- llvm/test/CodeGen/X86/vector-trunc-usat.ll | 174 ++- llvm/test/CodeGen/X86/vector-trunc.ll | 141 +-- llvm/test/CodeGen/X86/vectorcall.ll | 142 ++- .../ArgumentPromotion/2008-07-02-array-indexing.ll | 19 +- .../Attributor/ArgumentPromotion/X86/attributes.ll | 2 +- .../X86/min-legal-vector-width.ll | 2 +- .../Attributor/ArgumentPromotion/alignment.ll | 2 +- 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.../llvm-objdump/X86/elf-dynamic-symbols.test | 107 ++ .../tools/llvm-objdump/unimplemented-features.test | 31 + llvm/tools/llvm-objdump/llvm-objdump.cpp | 290 ++--- llvm/tools/llvm-objdump/llvm-objdump.h | 6 +- llvm/unittests/Analysis/ValueTrackingTest.cpp | 48 + mlir/docs/Dialects/LLVM.md | 2 +- mlir/docs/Dialects/Standard.md | 2 +- mlir/docs/LangRef.md | 2 +- mlir/docs/OpDefinitions.md | 18 + mlir/docs/RationaleLinalgDialect.md | 2 +- mlir/docs/doxygen.cfg.in | 2 +- mlir/examples/standalone/CMakeLists.txt | 44 + mlir/examples/standalone/README.md | 18 + mlir/examples/standalone/include/CMakeLists.txt | 1 + .../standalone/include/Standalone/CMakeLists.txt | 3 + .../include/Standalone/StandaloneDialect.h | 22 + .../include/Standalone/StandaloneDialect.td | 36 + .../standalone/include/Standalone/StandaloneOps.h | 25 + .../standalone/include/Standalone/StandaloneOps.td | 42 + mlir/examples/standalone/lib/CMakeLists.txt | 1 + .../standalone/lib/Standalone/CMakeLists.txt | 12 + .../lib/Standalone/StandaloneDialect.cpp | 25 + .../standalone/lib/Standalone/StandaloneOps.cpp | 18 + .../standalone/standalone-opt/CMakeLists.txt | 13 + .../standalone/standalone-opt/standalone-opt.cpp | 97 ++ mlir/examples/standalone/test/CMakeLists.txt | 19 + .../examples/standalone/test/Standalone/dummy.mlir | 11 + mlir/examples/standalone/test/lit.cfg.py | 60 + mlir/examples/standalone/test/lit.site.cfg.py.in | 49 + mlir/examples/toy/Ch7/mlir/Dialect.cpp | 2 +- mlir/include/mlir/Analysis/SliceAnalysis.h | 8 +- .../StandardToLLVM/ConvertStandardToLLVM.h | 6 +- .../StandardToLLVM/ConvertStandardToLLVMPass.h | 2 +- .../mlir/Dialect/Linalg/IR/LinalgStructuredOps.td | 2 +- mlir/include/mlir/Dialect/LoopOps/LoopOps.td | 8 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 2 +- mlir/include/mlir/IR/Attributes.h | 8 +- mlir/include/mlir/IR/OpBase.td | 4 + mlir/include/mlir/IR/OpDefinition.h | 87 ++ mlir/include/mlir/IR/StandardTypes.h | 2 +- mlir/include/mlir/Pass/AnalysisManager.h | 2 +- mlir/include/mlir/TableGen/Operator.h | 9 + mlir/include/mlir/TableGen/Pattern.h | 2 +- mlir/include/mlir/TableGen/Region.h | 6 + .../Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp | 2 +- .../Conversion/LoopToStandard/LoopToStandard.cpp | 19 +- mlir/lib/Conversion/LoopsToGPU/LoopsToGPU.cpp | 2 +- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 6 +- .../StandardToSPIRV/ConvertStandardToSPIRV.cpp | 4 +- mlir/lib/Dialect/GPU/IR/GPUDialect.cpp | 2 +- .../Dialect/GPU/Transforms/AllReduceLowering.cpp | 2 +- .../lib/Dialect/GPU/Transforms/KernelOutlining.cpp | 4 +- mlir/lib/Dialect/LoopOps/LoopOps.cpp | 6 +- .../Transforms/ParallelLoopSpecialization.cpp | 2 +- mlir/lib/Dialect/SPIRV/SPIRVOps.cpp | 2 +- mlir/lib/Dialect/Vector/VectorOps.cpp | 2 +- mlir/lib/IR/AttributeDetail.h | 2 +- mlir/lib/IR/Operation.cpp | 36 +- mlir/lib/IR/SymbolTable.cpp | 2 +- mlir/lib/Pass/PassTiming.cpp | 2 +- mlir/lib/TableGen/CMakeLists.txt | 1 + mlir/lib/TableGen/Operator.cpp | 27 +- mlir/lib/TableGen/Region.cpp | 20 + mlir/lib/Transforms/Utils/LoopUtils.cpp | 2 +- .../Conversion/AffineToStandard/lower-affine.mlir | 2 +- mlir/test/Dialect/LLVMIR/func.mlir | 2 +- mlir/test/Dialect/LLVMIR/global.mlir | 8 +- mlir/test/Dialect/Loops/invalid.mlir | 12 +- mlir/test/Dialect/SPIRV/types.mlir | 2 +- mlir/test/IR/region.mlir | 4 +- mlir/test/lib/Dialect/Test/TestPatterns.cpp | 2 +- mlir/test/mlir-tblgen/op-decl.td | 14 +- mlir/test/mlir-tblgen/op-format-spec.td | 2 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 125 +- mlir/tools/mlir-tblgen/OpFormatGen.cpp | 4 +- mlir/tools/mlir-tblgen/RewriterGen.cpp | 2 +- mlir/tools/mlir-vulkan-runner/VulkanRuntime.cpp | 2 +- mlir/tools/mlir-vulkan-runner/VulkanRuntime.h | 2 +- mlir/utils/spirv/gen_spirv_dialect.py | 4 +- 274 files changed, 5358 insertions(+), 1747 deletions(-) create mode 100644 lld/test/ELF/ppc64-long-branch-rel14.s create mode 100644 llvm/test/Transforms/Attributor/wrapper.ll create mode 100644 llvm/test/tools/llvm-nm/dynamic.test create mode 100644 llvm/test/tools/llvm-objdump/X86/elf-dynamic-symbols.test create mode 100644 llvm/test/tools/llvm-objdump/unimplemented-features.test create mode 100644 mlir/examples/standalone/CMakeLists.txt create mode 100644 mlir/examples/standalone/README.md create mode 100644 mlir/examples/standalone/include/CMakeLists.txt create mode 100644 mlir/examples/standalone/include/Standalone/CMakeLists.txt create mode 100644 mlir/examples/standalone/include/Standalone/StandaloneDialect.h create mode 100644 mlir/examples/standalone/include/Standalone/StandaloneDialect.td create mode 100644 mlir/examples/standalone/include/Standalone/StandaloneOps.h create mode 100644 mlir/examples/standalone/include/Standalone/StandaloneOps.td create mode 100644 mlir/examples/standalone/lib/CMakeLists.txt create mode 100644 mlir/examples/standalone/lib/Standalone/CMakeLists.txt create mode 100644 mlir/examples/standalone/lib/Standalone/StandaloneDialect.cpp create mode 100644 mlir/examples/standalone/lib/Standalone/StandaloneOps.cpp create mode 100644 mlir/examples/standalone/standalone-opt/CMakeLists.txt create mode 100644 mlir/examples/standalone/standalone-opt/standalone-opt.cpp create mode 100644 mlir/examples/standalone/test/CMakeLists.txt create mode 100644 mlir/examples/standalone/test/Standalone/dummy.mlir create mode 100644 mlir/examples/standalone/test/lit.cfg.py create mode 100644 mlir/examples/standalone/test/lit.site.cfg.py.in create mode 100644 mlir/lib/TableGen/Region.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig updated (b928d20d -> 330a063a)

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