Tcwg-commits March 2020

tcwg-commits@lists.linaro.org

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[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig updated (e595dd94515e -> 7111951b8d49)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig in repository toolchain/ci/linux. from e595dd94515e Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net adds df81dfcfd699 genirq: Fix reference leaks on irq affinity notifiers adds 01af08bd24ed Merge tag 'irq-urgent-2020-03-29' of git://git.kernel.org/ [...] adds 749da8ca978f clocksource/drivers/hyper-v: Make sched clock return nanos [...] adds ab93e984dbb4 Merge tag 'timers-urgent-2020-03-29' of git://git.kernel.o [...] adds d795a90e2ba0 mm/swapfile.c: move inode_lock out of claim_swapfile adds 53cdc1cb29e8 drivers/base/memory.c: indicate all memory blocks as removable adds 726b7bbeafd4 hugetlb_cgroup: fix illegal access to memory adds 8380ce479010 mm: fork: fix kernel_stack memcg stats for various stack i [...] adds b943f045a9af mm/sparse: fix kernel crash with pfn_section_valid check adds 570203ec830d Merge branch 'akpm' (patches from Andrew) adds 7111951b8d49 Linux 5.6 No new revisions were added by this update. Summary of changes: Makefile | 2 +- drivers/base/memory.c | 23 +++------------------ drivers/clocksource/hyperv_timer.c | 6 ++++-- include/linux/memcontrol.h | 12 +++++++++++ kernel/fork.c | 4 ++-- kernel/irq/manage.c | 11 ++++++++-- mm/hugetlb_cgroup.c | 3 +-- mm/memcontrol.c | 38 +++++++++++++++++++++++++++++++++++ mm/sparse.c | 6 ++++++ mm/swapfile.c | 41 +++++++++++++++++++------------------- 10 files changed, 96 insertions(+), 50 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig updated (673bb288e62 -> 2a93fb6e962)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig in repository toolchain/ci/gcc. from 673bb288e62 Daily bump. adds c76df72f1a9 testsuite: Split up gdc-test.exp into each subdirectory adds 46b7d819f7c Delete duplicate .align output. adds 85f6f317ec8 Fix typo in a warning related to flatten. adds afd9da8b8ad testsuite: Move C++ tests in gdc.test into own subdirectory. adds 60c254b279e testsuite: Handle more kinds of gdc.test test flags and dir [...] adds dacc7effeea doc: Update -falign-functions/-falign-loops/-falign-jumps adds 2a93fb6e962 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 17 +++ gcc/DATESTAMP | 2 +- gcc/cgraphunit.c | 3 +- gcc/config/pa/pa.c | 1 - gcc/d/dmd/MERGE | 2 +- gcc/doc/invoke.texi | 12 ++- gcc/testsuite/ChangeLog | 30 ++++++ gcc/testsuite/gdc.test/compilable/compilable.exp | 30 ++++++ .../gdc.test/fail_compilation/fail_compilation.exp | 30 ++++++ gcc/testsuite/gdc.test/runnable/runnable.exp | 35 ++++++ .../gdc.test/{runnable => runnable_cxx}/cabi1.d | 0 .../{runnable => runnable_cxx}/cpp_abi_tests.d | 0 .../gdc.test/{runnable => runnable_cxx}/cppa.d | 0 .../{runnable => runnable_cxx}/externmangle.d | 0 .../{runnable => runnable_cxx}/externmangle2.d | 0 .../extra-files/cabi2.cpp | 0 .../extra-files/cpp_abi_tests.cpp | 0 .../extra-files/cppb.cpp | 0 .../extra-files/externmangle.cpp | 0 .../extra-files/externmangle2.cpp | 0 .../gdc.test/runnable_cxx/runnable_cxx.exp | 46 ++++++++ .../{gdc.test/gdc-test.exp => lib/gdc-utils.exp} | 118 +++++++++++---------- gcc/testsuite/lib/gdc.exp | 106 ++++++++++-------- 23 files changed, 326 insertions(+), 106 deletions(-) create mode 100644 gcc/testsuite/gdc.test/compilable/compilable.exp create mode 100644 gcc/testsuite/gdc.test/fail_compilation/fail_compilation.exp create mode 100644 gcc/testsuite/gdc.test/runnable/runnable.exp rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/cabi1.d (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/cpp_abi_tests.d (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/cppa.d (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/externmangle.d (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/externmangle2.d (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/cabi2.cpp (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/cpp_abi_tests [...] rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/cppb.cpp (100%) rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/externmangle. [...] rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/externmangle2 [...] create mode 100644 gcc/testsuite/gdc.test/runnable_cxx/runnable_cxx.exp rename gcc/testsuite/{gdc.test/gdc-test.exp => lib/gdc-utils.exp} (80%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig updated (37d59eacfe -> c9fef64dab)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig in repository toolchain/ci/binutils-gdb. from 37d59eacfe Automatic date update in version.in adds 3ad830466f gdb: remove discard_psymtab function adds 48993951ce gdb: rename partial_symtab::read_dependencies to expand_depe [...] adds 69b037c30c gdb: rename partial symtab expand functions of debug info re [...] adds 988b7300bc PR25745, powerpc64-ld overflows string buffer in --stats mode adds c9fef64dab Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 6 +++++ bfd/elf64-ppc.c | 76 +++++++++++++++++++++++++++++-------------------------- bfd/version.h | 2 +- gdb/ChangeLog | 32 +++++++++++++++++++++++ gdb/dbxread.c | 10 ++++---- gdb/dwarf2/read.c | 4 +-- gdb/mdebugread.c | 12 ++++----- gdb/psympriv.h | 8 +----- gdb/psymtab.c | 2 +- gdb/xcoffread.c | 8 +++--- 10 files changed, 98 insertions(+), 62 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig updated (9df9665c -> eb4e02d0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards 9df9665c 0: update: binutils-gcc-linux: all new eb4e02d0 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (9df9665c) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-ma [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 182 +- 02-prepare_abe/console.log | 300 +- 03-build_abe-binutils/console.log | 11290 ++++----- 04-build_abe-stage1/console.log | 19659 ++++++++-------- 05-build_linux/console.log | 6406 ++--- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 14 +- 07-check_regression/results.regressions | 2 +- 08-update_baseline/console.log | 12 +- 08-update_baseline/results.regressions | 2 +- console.log | 37867 +++++++++++++++--------------- jenkins/manifest.sh | 16 +- 12 files changed, 37875 insertions(+), 37877 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-defconfig updated (e595dd94515e -> 7111951b8d49)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-defconfig in repository toolchain/ci/linux. from e595dd94515e Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net adds df81dfcfd699 genirq: Fix reference leaks on irq affinity notifiers adds 01af08bd24ed Merge tag 'irq-urgent-2020-03-29' of git://git.kernel.org/ [...] adds 749da8ca978f clocksource/drivers/hyper-v: Make sched clock return nanos [...] adds ab93e984dbb4 Merge tag 'timers-urgent-2020-03-29' of git://git.kernel.o [...] adds d795a90e2ba0 mm/swapfile.c: move inode_lock out of claim_swapfile adds 53cdc1cb29e8 drivers/base/memory.c: indicate all memory blocks as removable adds 726b7bbeafd4 hugetlb_cgroup: fix illegal access to memory adds 8380ce479010 mm: fork: fix kernel_stack memcg stats for various stack i [...] adds b943f045a9af mm/sparse: fix kernel crash with pfn_section_valid check adds 570203ec830d Merge branch 'akpm' (patches from Andrew) adds 7111951b8d49 Linux 5.6 No new revisions were added by this update. Summary of changes: Makefile | 2 +- drivers/base/memory.c | 23 +++------------------ drivers/clocksource/hyperv_timer.c | 6 ++++-- include/linux/memcontrol.h | 12 +++++++++++ kernel/fork.c | 4 ++-- kernel/irq/manage.c | 11 ++++++++-- mm/hugetlb_cgroup.c | 3 +-- mm/memcontrol.c | 38 +++++++++++++++++++++++++++++++++++ mm/sparse.c | 6 ++++++ mm/swapfile.c | 41 +++++++++++++++++++------------------- 10 files changed, 96 insertions(+), 50 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-defconfig updated (7829ddec -> 15c0c4cb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-defconfig in repository toolchain/ci/base-artifacts. discards 7829ddec 0: update: llvm-linux: boot new 15c0c4cb 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (7829ddec) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 222 +- 02-build_llvm/console.log | 12622 +++++++++++++-------------- 03-build_linux/console.log | 664 +- 04-boot_linux/console.log | 478 +- 05-check_regression/console.log | 12 +- 05-check_regression/results.regressions | 2 +- 06-update_baseline/console.log | 12 +- console.log | 14035 +++++++++++++++--------------- jenkins/manifest.sh | 8 +- 9 files changed, 14009 insertions(+), 14046 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (e595dd94515e -> 7111951b8d49)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/linux. from e595dd94515e Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net adds df81dfcfd699 genirq: Fix reference leaks on irq affinity notifiers adds 01af08bd24ed Merge tag 'irq-urgent-2020-03-29' of git://git.kernel.org/ [...] adds 749da8ca978f clocksource/drivers/hyper-v: Make sched clock return nanos [...] adds ab93e984dbb4 Merge tag 'timers-urgent-2020-03-29' of git://git.kernel.o [...] adds d795a90e2ba0 mm/swapfile.c: move inode_lock out of claim_swapfile adds 53cdc1cb29e8 drivers/base/memory.c: indicate all memory blocks as removable adds 726b7bbeafd4 hugetlb_cgroup: fix illegal access to memory adds 8380ce479010 mm: fork: fix kernel_stack memcg stats for various stack i [...] adds b943f045a9af mm/sparse: fix kernel crash with pfn_section_valid check adds 570203ec830d Merge branch 'akpm' (patches from Andrew) adds 7111951b8d49 Linux 5.6 No new revisions were added by this update. Summary of changes: Makefile | 2 +- drivers/base/memory.c | 23 +++------------------ drivers/clocksource/hyperv_timer.c | 6 ++++-- include/linux/memcontrol.h | 12 +++++++++++ kernel/fork.c | 4 ++-- kernel/irq/manage.c | 11 ++++++++-- mm/hugetlb_cgroup.c | 3 +-- mm/memcontrol.c | 38 +++++++++++++++++++++++++++++++++++ mm/sparse.c | 6 ++++++ mm/swapfile.c | 41 +++++++++++++++++++------------------- 10 files changed, 96 insertions(+), 50 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (4bf015c035e -> b4695351cb4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/llvm-project. from 4bf015c035e [AlignmentFromAssumptions] Fix a SCEV assertion resulting f [...] adds 6dab8067123 [mlir] Add exp2 conversion to llvm.intr.exp2 adds a7115d51be0 [X86] X86CallFrameOptimization - generalize slow push code path adds 6ba63510720 [PostOrderIterator] Use SmallVector to store stack; NFC adds 49d00824bbb [VPlan] Use one VPWidenRecipe per original IR instruction. (NFC). adds b632bd88a63 [mlir] NFC: fix trivial typo in documents adds 10439f9e32e [X86][AVX] Add X86ISD::VALIGN target shuffle decode support adds da4c7db793a [X86] Rename matchShuffleAsByteRotate to matchShuffleAsElem [...] adds 7734e4b3a36 [X86][AVX] Combine 128-bit lane shuffles with a zeroable up [...] adds 1e363023b82 [InstCombine] Use replaceOperand() in a few more places adds 6f07a9e80ab [InstCombine] Erase original add when creating saddo adds 28f67bd5c56 [InstCombine] Fix worklist management in varargs transform adds 99913ef3d14 [OpenMP] set_bits iterator yields unsigned elements, no ref [...] adds 26fa33755f1 [InstCombine] Simplify select of cmpxchg transform adds b44f07045c5 Remove unnecessary empty comments from test check lines. NFC. adds 443dcc0e008 [X86][AVX] Add tests for 512-bit shuffle patterns that coul [...] adds febcb24f149 [InstCombine] make test independent of branch undef/UB; NFC adds fc3cc8a4b07 [VectorCombine] skip debug intrinsics first for efficiency adds 97bbe7ad2a9 AMDGPU: Fix typo adds 0b68ca51623 AMDGPU: Add some additional tests for v_cvt_ubyte* formation adds ab7a41069eb AMDGPU: Fix using wrong instruction for FP conversion adds d15723ef065 AMDGPU/GlobalISel: Remove redundant virtual adds cce3d96bcc6 GlobalISel: Add matcher for G_SHL adds c0955edfd6e Introduce support for lib function aligned_alloc in TLI / m [...] adds a9ddcd6411b [InstCombine] Erase old add when optimizing add overflow adds 0c871400658 [InstCombine] Use replaceOperand() in assoc cast simplification adds 4e4ea2cde44 [MLIR] Add missing asserts in interchangeLoops util, doc co [...] adds 53d209076aa [InstCombine] Use replaceOperand() in demanded elements sim [...] adds 8253a86b65c [InstCombine] Erase old mul when creating umulo adds 8206c50cdec [X86] Add isAnyZero shuffle mask helper adds fe0723dc9d4 Fix -Wdocumentation warning. NFC. adds 9c8ec99c80a [X86][AVX] Combine 128/256-bit lane shuffles with zeroable [...] adds 15f1fe1506f clang-format fixes in ClangTidyDiagnosticConsumer.cpp and D [...] adds b9d9968f63a [clangd] Handle clang-tidy suppression comments for diagnos [...] adds 854f268ca62 [MC] Move deprecation infos from MCTargetDesc to MCInstrInfo adds 6628c525cba [gn build] Port 854f268ca62 adds 7c1a6873aa5 [ARM] VMOV.64 immediate tests. NFC adds 00c76f34962 [ELF][test] Improve arm-exidx-output.s to test different ou [...] adds a5458bb0d6b Don't claim template names that name non-templates are undeclared. adds 6e0afb5f108 [ARMMVE] Create fewer temporary SmallVectors adds 2451e4c5978 [X86] Add sse4.2 command lines to min/max reduction tests. adds 24562c6588b [InstCombine] Add tests for trunc (extelt x); (NFC) Baselin [...] adds d74533a18b8 [X86] Add sse4.1 RUNs lines to the min/max reduction cost m [...] adds 12f6b024f9f Revert "[libc++] NFC: Simplify substitutions by using lit r [...] adds 42dc667db24 [LLD][ELF] Put back rounding which was lost in 8404aeb56a73 [...] adds a94fa2c0494 [Coroutines 1/2] Improve symmetric control transfer feature adds 31a1d85c535 [Coroutines 2/2] Improve symmetric control transfer feature adds 9a7eda1bece PR45350: Handle unsized array CXXConstructExprs in constant [...] adds 05f0e598ab2 [LangRef] Clarify the semantics of branch on undef adds 3d44f48edc2 [mlir][Diagnostics] Don't print note source line if it is t [...] adds f86104bb68d [mlir][NFC] Use the auto-generated op documentation in the [...] adds 16f27b70a50 [mlir][NFC] Update dialect/op documentation to be consistent adds 4e0d9925d6a [NFC] Remove obsolete checks followed by fix of isGuarantee [...] adds b4695351cb4 [TTI][X86] Fix the value passed to IsUnsigned for cost mode [...] No new revisions were added by this update. Summary of changes: .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 87 +- .../clang-tidy/ClangTidyDiagnosticConsumer.h | 11 +- clang-tools-extra/clangd/ParsedAST.cpp | 9 +- .../clangd/unittests/DiagnosticsTests.cpp | 29 +- clang/include/clang/AST/PrettyPrinter.h | 3 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 3 +- clang/include/clang/Sema/Sema.h | 32 +- clang/lib/AST/ExprConstant.cpp | 23 +- clang/lib/Sema/SemaTemplate.cpp | 30 +- clang/test/SemaCXX/constant-expression-cxx2a.cpp | 20 + clang/test/SemaCXX/pseudo-destructors.cpp | 13 + clang/utils/TableGen/MveEmitter.cpp | 4 +- libcxx/test/lit.cfg | 2 - libcxx/utils/libcxx/test/config.py | 39 +- libcxx/utils/libcxx/test/format.py | 3 +- lld/ELF/SyntheticSections.cpp | 6 +- lld/test/ELF/arm-exidx-link.s | 25 - lld/test/ELF/arm-exidx-output.s | 34 +- llvm/docs/LangRef.rst | 39 +- llvm/include/llvm/ADT/PostOrderIterator.h | 3 +- llvm/include/llvm/Analysis/MemoryBuiltins.h | 8 + llvm/include/llvm/Analysis/TargetLibraryInfo.def | 3 + llvm/include/llvm/CodeGen/BasicTTIImpl.h | 4 +- .../llvm/CodeGen/GlobalISel/MIPatternMatch.h | 6 + llvm/include/llvm/MC/MCInstrDesc.h | 14 - llvm/include/llvm/MC/MCInstrInfo.h | 23 +- llvm/lib/Analysis/BasicAliasAnalysis.cpp | 2 +- .../lib/Analysis/InstructionPrecedenceTracking.cpp | 21 +- llvm/lib/Analysis/MemoryBuiltins.cpp | 26 +- llvm/lib/Analysis/TargetLibraryInfo.cpp | 2 + llvm/lib/Frontend/OpenMP/OMPContext.cpp | 16 +- llvm/lib/MC/CMakeLists.txt | 1 + llvm/lib/MC/MCInstrDesc.cpp | 11 - llvm/lib/MC/MCInstrInfo.cpp | 27 + .../Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp | 4 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 9 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 2 +- llvm/lib/Target/X86/X86CallFrameOptimization.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 75 +- llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 64 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 60 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 16 +- .../Transforms/InstCombine/InstCombineInternal.h | 6 + .../InstCombine/InstCombineMulDivRem.cpp | 24 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 30 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 9 +- .../InstCombine/InstCombineVectorOps.cpp | 6 +- .../InstCombine/InstructionCombining.cpp | 8 +- llvm/lib/Transforms/Utils/BuildLibCalls.cpp | 4 + llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 17 +- llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h | 5 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 3 +- llvm/lib/Transforms/Vectorize/VPlan.h | 25 +- llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp | 15 +- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 5 +- llvm/test/Analysis/CostModel/X86/reduce-fmax.ll | 19 +- llvm/test/Analysis/CostModel/X86/reduce-fmin.ll | 19 +- llvm/test/Analysis/CostModel/X86/reduce-smax.ll | 155 +-- llvm/test/Analysis/CostModel/X86/reduce-smin.ll | 155 +-- llvm/test/Analysis/CostModel/X86/reduce-umax.ll | 155 +-- llvm/test/Analysis/CostModel/X86/reduce-umin.ll | 155 +-- llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 380 ++++++- llvm/test/CodeGen/Thumb2/mve-vmovimm.ll | 797 ++++++++++--- llvm/test/CodeGen/X86/atomic-idempotent.ll | 547 +++++++-- llvm/test/CodeGen/X86/avx-vperm2x128.ll | 10 +- llvm/test/CodeGen/X86/vector-reduce-mul.ll | 158 ++- llvm/test/CodeGen/X86/vector-reduce-smax.ll | 432 ++++--- llvm/test/CodeGen/X86/vector-reduce-smin.ll | 434 +++++--- llvm/test/CodeGen/X86/vector-reduce-umax.ll | 464 +++++--- llvm/test/CodeGen/X86/vector-reduce-umin.ll | 422 ++++--- llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll | 17 +- llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 17 +- llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll | 188 ++-- .../CodeGen/X86/vector-shuffle-combining-avx2.ll | 45 +- llvm/test/CodeGen/X86/vector-shuffle-v1.ll | 10 +- .../Transforms/Coroutines/coro-split-musttail2.ll | 68 ++ .../Transforms/Coroutines/coro-split-musttail3.ll | 101 ++ .../test/Transforms/DeadStoreElimination/simple.ll | 13 + .../InstCombine/pr33689_same_bitwidth.ll | 6 +- .../Transforms/InstCombine/trunc-extractelement.ll | 127 +++ llvm/unittests/Analysis/TargetLibraryInfoTest.cpp | 1 + .../CodeGen/GlobalISel/PatternMatchTest.cpp | 8 + llvm/unittests/CodeGen/MachineInstrTest.cpp | 26 +- .../Transforms/Vectorize/VPlanHCFGTest.cpp | 26 +- llvm/utils/TableGen/AsmMatcherEmitter.cpp | 2 +- llvm/utils/TableGen/InstrInfoEmitter.cpp | 95 +- llvm/utils/gn/secondary/llvm/lib/MC/BUILD.gn | 1 + mlir/docs/ConversionToLLVMDialect.md | 2 +- mlir/docs/CreatingADialect.md | 2 +- mlir/docs/Diagnostics.md | 4 +- mlir/docs/Dialects/Affine.md | 200 +--- mlir/docs/Dialects/GPU.md | 97 +- mlir/docs/Dialects/LLVM.md | 2 +- mlir/docs/Dialects/Linalg.md | 6 +- mlir/docs/Dialects/Standard.md | 1095 +----------------- mlir/docs/OpDefinitions.md | 2 +- mlir/docs/RationaleLinalgDialect.md | 2 +- mlir/include/mlir/Dialect/Affine/IR/AffineOps.td | 212 ++-- mlir/include/mlir/Dialect/Affine/IR/CMakeLists.txt | 2 +- mlir/include/mlir/Dialect/GPU/CMakeLists.txt | 4 +- mlir/include/mlir/Dialect/GPU/GPUOps.td | 94 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 3 +- mlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt | 3 +- mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 32 +- .../mlir/Dialect/Linalg/IR/LinalgStructuredOps.td | 228 ++-- .../Linalg/IR/LinalgStructuredOpsInterface.td | 13 +- mlir/include/mlir/Dialect/LoopOps/LoopOps.td | 95 +- mlir/include/mlir/Dialect/Quant/QuantOps.td | 34 +- mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td | 2 +- mlir/include/mlir/Dialect/Shape/IR/CMakeLists.txt | 7 +- mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td | 2 +- .../mlir/Dialect/StandardOps/IR/CMakeLists.txt | 2 + mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 1174 ++++++++++++++++---- mlir/include/mlir/Dialect/Vector/VectorOps.td | 393 +++---- mlir/include/mlir/IR/Diagnostics.h | 3 +- .../mlir/Interfaces/InferTypeOpInterface.td | 3 +- mlir/include/mlir/Transforms/LoopUtils.h | 14 +- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 2 + mlir/lib/IR/Diagnostics.cpp | 46 +- mlir/lib/Transforms/Utils/LoopUtils.cpp | 45 +- .../StandardToLLVM/convert-to-llvmir.mlir | 22 +- .../StandardToSPIRV/std-types-to-spirv.mlir | 2 +- mlir/test/IR/attribute.mlir | 2 +- mlir/test/IR/diagnostic-handler.mlir | 6 +- mlir/test/Target/llvmir-intrinsics.mlir | 9 + mlir/test/mlir-tblgen/llvm-intrinsics.td | 2 +- 126 files changed, 5797 insertions(+), 4092 deletions(-) delete mode 100644 lld/test/ELF/arm-exidx-link.s create mode 100644 llvm/lib/MC/MCInstrInfo.cpp create mode 100644 llvm/test/Transforms/Coroutines/coro-split-musttail2.ll create mode 100644 llvm/test/Transforms/Coroutines/coro-split-musttail3.ll create mode 100644 llvm/test/Transforms/InstCombine/trunc-extractelement.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (dea9a344 -> 0a09067d)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards dea9a344 0: update: llvm-linux: boot new 0a09067d 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (dea9a344) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 182 +- 02-build_llvm/console.log | 12791 +++++++++++++-------------- 03-build_linux/console.log | 748 +- 04-boot_linux/console.log | 4 +- 05-check_regression/console.log | 12 +- 05-check_regression/results.regressions | 2 +- 06-update_baseline/console.log | 12 +- console.log | 13774 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- 9 files changed, 13751 insertions(+), 13786 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (4bf015c035e -> b4695351cb4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/llvm-project. from 4bf015c035e [AlignmentFromAssumptions] Fix a SCEV assertion resulting f [...] adds 6dab8067123 [mlir] Add exp2 conversion to llvm.intr.exp2 adds a7115d51be0 [X86] X86CallFrameOptimization - generalize slow push code path adds 6ba63510720 [PostOrderIterator] Use SmallVector to store stack; NFC adds 49d00824bbb [VPlan] Use one VPWidenRecipe per original IR instruction. (NFC). adds b632bd88a63 [mlir] NFC: fix trivial typo in documents adds 10439f9e32e [X86][AVX] Add X86ISD::VALIGN target shuffle decode support adds da4c7db793a [X86] Rename matchShuffleAsByteRotate to matchShuffleAsElem [...] adds 7734e4b3a36 [X86][AVX] Combine 128-bit lane shuffles with a zeroable up [...] adds 1e363023b82 [InstCombine] Use replaceOperand() in a few more places adds 6f07a9e80ab [InstCombine] Erase original add when creating saddo adds 28f67bd5c56 [InstCombine] Fix worklist management in varargs transform adds 99913ef3d14 [OpenMP] set_bits iterator yields unsigned elements, no ref [...] adds 26fa33755f1 [InstCombine] Simplify select of cmpxchg transform adds b44f07045c5 Remove unnecessary empty comments from test check lines. NFC. adds 443dcc0e008 [X86][AVX] Add tests for 512-bit shuffle patterns that coul [...] adds febcb24f149 [InstCombine] make test independent of branch undef/UB; NFC adds fc3cc8a4b07 [VectorCombine] skip debug intrinsics first for efficiency adds 97bbe7ad2a9 AMDGPU: Fix typo adds 0b68ca51623 AMDGPU: Add some additional tests for v_cvt_ubyte* formation adds ab7a41069eb AMDGPU: Fix using wrong instruction for FP conversion adds d15723ef065 AMDGPU/GlobalISel: Remove redundant virtual adds cce3d96bcc6 GlobalISel: Add matcher for G_SHL adds c0955edfd6e Introduce support for lib function aligned_alloc in TLI / m [...] adds a9ddcd6411b [InstCombine] Erase old add when optimizing add overflow adds 0c871400658 [InstCombine] Use replaceOperand() in assoc cast simplification adds 4e4ea2cde44 [MLIR] Add missing asserts in interchangeLoops util, doc co [...] adds 53d209076aa [InstCombine] Use replaceOperand() in demanded elements sim [...] adds 8253a86b65c [InstCombine] Erase old mul when creating umulo adds 8206c50cdec [X86] Add isAnyZero shuffle mask helper adds fe0723dc9d4 Fix -Wdocumentation warning. NFC. adds 9c8ec99c80a [X86][AVX] Combine 128/256-bit lane shuffles with zeroable [...] adds 15f1fe1506f clang-format fixes in ClangTidyDiagnosticConsumer.cpp and D [...] adds b9d9968f63a [clangd] Handle clang-tidy suppression comments for diagnos [...] adds 854f268ca62 [MC] Move deprecation infos from MCTargetDesc to MCInstrInfo adds 6628c525cba [gn build] Port 854f268ca62 adds 7c1a6873aa5 [ARM] VMOV.64 immediate tests. NFC adds 00c76f34962 [ELF][test] Improve arm-exidx-output.s to test different ou [...] adds a5458bb0d6b Don't claim template names that name non-templates are undeclared. adds 6e0afb5f108 [ARMMVE] Create fewer temporary SmallVectors adds 2451e4c5978 [X86] Add sse4.2 command lines to min/max reduction tests. adds 24562c6588b [InstCombine] Add tests for trunc (extelt x); (NFC) Baselin [...] adds d74533a18b8 [X86] Add sse4.1 RUNs lines to the min/max reduction cost m [...] adds 12f6b024f9f Revert "[libc++] NFC: Simplify substitutions by using lit r [...] adds 42dc667db24 [LLD][ELF] Put back rounding which was lost in 8404aeb56a73 [...] adds a94fa2c0494 [Coroutines 1/2] Improve symmetric control transfer feature adds 31a1d85c535 [Coroutines 2/2] Improve symmetric control transfer feature adds 9a7eda1bece PR45350: Handle unsized array CXXConstructExprs in constant [...] adds 05f0e598ab2 [LangRef] Clarify the semantics of branch on undef adds 3d44f48edc2 [mlir][Diagnostics] Don't print note source line if it is t [...] adds f86104bb68d [mlir][NFC] Use the auto-generated op documentation in the [...] adds 16f27b70a50 [mlir][NFC] Update dialect/op documentation to be consistent adds 4e0d9925d6a [NFC] Remove obsolete checks followed by fix of isGuarantee [...] new b4695351cb4 [TTI][X86] Fix the value passed to IsUnsigned for cost mode [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 87 +- .../clang-tidy/ClangTidyDiagnosticConsumer.h | 11 +- clang-tools-extra/clangd/ParsedAST.cpp | 9 +- .../clangd/unittests/DiagnosticsTests.cpp | 29 +- clang/include/clang/AST/PrettyPrinter.h | 3 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 3 +- clang/include/clang/Sema/Sema.h | 32 +- clang/lib/AST/ExprConstant.cpp | 23 +- clang/lib/Sema/SemaTemplate.cpp | 30 +- clang/test/SemaCXX/constant-expression-cxx2a.cpp | 20 + clang/test/SemaCXX/pseudo-destructors.cpp | 13 + clang/utils/TableGen/MveEmitter.cpp | 4 +- libcxx/test/lit.cfg | 2 - libcxx/utils/libcxx/test/config.py | 39 +- libcxx/utils/libcxx/test/format.py | 3 +- lld/ELF/SyntheticSections.cpp | 6 +- lld/test/ELF/arm-exidx-link.s | 25 - lld/test/ELF/arm-exidx-output.s | 34 +- llvm/docs/LangRef.rst | 39 +- llvm/include/llvm/ADT/PostOrderIterator.h | 3 +- llvm/include/llvm/Analysis/MemoryBuiltins.h | 8 + llvm/include/llvm/Analysis/TargetLibraryInfo.def | 3 + llvm/include/llvm/CodeGen/BasicTTIImpl.h | 4 +- .../llvm/CodeGen/GlobalISel/MIPatternMatch.h | 6 + llvm/include/llvm/MC/MCInstrDesc.h | 14 - llvm/include/llvm/MC/MCInstrInfo.h | 23 +- llvm/lib/Analysis/BasicAliasAnalysis.cpp | 2 +- .../lib/Analysis/InstructionPrecedenceTracking.cpp | 21 +- llvm/lib/Analysis/MemoryBuiltins.cpp | 26 +- llvm/lib/Analysis/TargetLibraryInfo.cpp | 2 + llvm/lib/Frontend/OpenMP/OMPContext.cpp | 16 +- llvm/lib/MC/CMakeLists.txt | 1 + llvm/lib/MC/MCInstrDesc.cpp | 11 - llvm/lib/MC/MCInstrInfo.cpp | 27 + .../Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp | 4 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 9 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 2 +- llvm/lib/Target/X86/X86CallFrameOptimization.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 75 +- llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 64 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 60 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 16 +- .../Transforms/InstCombine/InstCombineInternal.h | 6 + .../InstCombine/InstCombineMulDivRem.cpp | 24 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 30 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 9 +- .../InstCombine/InstCombineVectorOps.cpp | 6 +- .../InstCombine/InstructionCombining.cpp | 8 +- llvm/lib/Transforms/Utils/BuildLibCalls.cpp | 4 + llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 17 +- llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h | 5 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 3 +- llvm/lib/Transforms/Vectorize/VPlan.h | 25 +- llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp | 15 +- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 5 +- llvm/test/Analysis/CostModel/X86/reduce-fmax.ll | 19 +- llvm/test/Analysis/CostModel/X86/reduce-fmin.ll | 19 +- llvm/test/Analysis/CostModel/X86/reduce-smax.ll | 155 +-- llvm/test/Analysis/CostModel/X86/reduce-smin.ll | 155 +-- llvm/test/Analysis/CostModel/X86/reduce-umax.ll | 155 +-- llvm/test/Analysis/CostModel/X86/reduce-umin.ll | 155 +-- llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 380 ++++++- llvm/test/CodeGen/Thumb2/mve-vmovimm.ll | 797 ++++++++++--- llvm/test/CodeGen/X86/atomic-idempotent.ll | 547 +++++++-- llvm/test/CodeGen/X86/avx-vperm2x128.ll | 10 +- llvm/test/CodeGen/X86/vector-reduce-mul.ll | 158 ++- llvm/test/CodeGen/X86/vector-reduce-smax.ll | 432 ++++--- llvm/test/CodeGen/X86/vector-reduce-smin.ll | 434 +++++--- llvm/test/CodeGen/X86/vector-reduce-umax.ll | 464 +++++--- llvm/test/CodeGen/X86/vector-reduce-umin.ll | 422 ++++--- llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll | 17 +- llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 17 +- llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll | 188 ++-- .../CodeGen/X86/vector-shuffle-combining-avx2.ll | 45 +- llvm/test/CodeGen/X86/vector-shuffle-v1.ll | 10 +- .../Transforms/Coroutines/coro-split-musttail2.ll | 68 ++ .../Transforms/Coroutines/coro-split-musttail3.ll | 101 ++ .../test/Transforms/DeadStoreElimination/simple.ll | 13 + .../InstCombine/pr33689_same_bitwidth.ll | 6 +- .../Transforms/InstCombine/trunc-extractelement.ll | 127 +++ llvm/unittests/Analysis/TargetLibraryInfoTest.cpp | 1 + .../CodeGen/GlobalISel/PatternMatchTest.cpp | 8 + llvm/unittests/CodeGen/MachineInstrTest.cpp | 26 +- .../Transforms/Vectorize/VPlanHCFGTest.cpp | 26 +- llvm/utils/TableGen/AsmMatcherEmitter.cpp | 2 +- llvm/utils/TableGen/InstrInfoEmitter.cpp | 95 +- llvm/utils/gn/secondary/llvm/lib/MC/BUILD.gn | 1 + mlir/docs/ConversionToLLVMDialect.md | 2 +- mlir/docs/CreatingADialect.md | 2 +- mlir/docs/Diagnostics.md | 4 +- mlir/docs/Dialects/Affine.md | 200 +--- mlir/docs/Dialects/GPU.md | 97 +- mlir/docs/Dialects/LLVM.md | 2 +- mlir/docs/Dialects/Linalg.md | 6 +- mlir/docs/Dialects/Standard.md | 1095 +----------------- mlir/docs/OpDefinitions.md | 2 +- mlir/docs/RationaleLinalgDialect.md | 2 +- mlir/include/mlir/Dialect/Affine/IR/AffineOps.td | 212 ++-- mlir/include/mlir/Dialect/Affine/IR/CMakeLists.txt | 2 +- mlir/include/mlir/Dialect/GPU/CMakeLists.txt | 4 +- mlir/include/mlir/Dialect/GPU/GPUOps.td | 94 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 3 +- mlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt | 3 +- mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 32 +- .../mlir/Dialect/Linalg/IR/LinalgStructuredOps.td | 228 ++-- .../Linalg/IR/LinalgStructuredOpsInterface.td | 13 +- mlir/include/mlir/Dialect/LoopOps/LoopOps.td | 95 +- mlir/include/mlir/Dialect/Quant/QuantOps.td | 34 +- mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td | 2 +- mlir/include/mlir/Dialect/Shape/IR/CMakeLists.txt | 7 +- mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td | 2 +- .../mlir/Dialect/StandardOps/IR/CMakeLists.txt | 2 + mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 1174 ++++++++++++++++---- mlir/include/mlir/Dialect/Vector/VectorOps.td | 393 +++---- mlir/include/mlir/IR/Diagnostics.h | 3 +- .../mlir/Interfaces/InferTypeOpInterface.td | 3 +- mlir/include/mlir/Transforms/LoopUtils.h | 14 +- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 2 + mlir/lib/IR/Diagnostics.cpp | 46 +- mlir/lib/Transforms/Utils/LoopUtils.cpp | 45 +- .../StandardToLLVM/convert-to-llvmir.mlir | 22 +- .../StandardToSPIRV/std-types-to-spirv.mlir | 2 +- mlir/test/IR/attribute.mlir | 2 +- mlir/test/IR/diagnostic-handler.mlir | 6 +- mlir/test/Target/llvmir-intrinsics.mlir | 9 + mlir/test/mlir-tblgen/llvm-intrinsics.td | 2 +- 126 files changed, 5797 insertions(+), 4092 deletions(-) delete mode 100644 lld/test/ELF/arm-exidx-link.s create mode 100644 llvm/lib/MC/MCInstrInfo.cpp create mode 100644 llvm/test/Transforms/Coroutines/coro-split-musttail2.ll create mode 100644 llvm/test/Transforms/Coroutines/coro-split-musttail3.ll create mode 100644 llvm/test/Transforms/InstCombine/trunc-extractelement.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

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