Tcwg-commits March 2020

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[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (5d90f886bc0 -> 1cc09dcefcc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/llvm-project. from 5d90f886bc0 [clang][AArch64] readd support for 'p' inline asm constraint adds 585a3cc31bb Fix -Wdeprecated-copy-dtor and -Wdeprecated-dynamic-excepti [...] adds 9e2715aaaca [lldb] Remove template parameters from FunctionTemplateDecl names adds 98369178bc6 [SelectionDAGBuilder] Don't set MachinePointerInfo for gath [...] adds b6bcf728507 [OPENMP50]Mark expression in detach clause as firstprivate. adds 1bf0c993758 [ValueTracking][SVE] Fix isGEPKnownNonNull for scalable vector. adds 5267f5e6b4c [mlir] Add a hook to PatternRewriter to allow for patterns [...] adds 586565c514e [InstCombine] add tests for bool math; NFC adds be9e3d94165 [InstCombine] reduce demand-limited bool math to logic, part 2 adds 661c950630f [NFC][Attr TableGen] Emit Spelling Enum for Attr types if there >1 adds 768ead0a6ca [libc] Add a new rule `add_object`. adds 3d9e6c42f8c [libc++] Use env to set the tool's environment on Darwin adds 080dd10f7df Move RDF from Hexagon to Codegen adds 5555c04ba9f [gn build] Port 080dd10f7df adds 526c51e6fdc [DwarfDebug] Fix an assertion error when emitting call site [...] adds 51b78a3e06d [libc++] Bugfix to std::binomial_distribution<int> adds 2bd1ca28c1f [ELF][test] Delete unneeded --no-threads adds 17566573b29 [libc] Resolve race condition in sub-process test runner. adds a72ae99cf9d [SCCP] Split up callsite handling, only propagate result on [...] adds c48442c9f38 PR45207: Fix crash if constrained-type-specifier annotation [...] adds 36b8d02c8df [pstl] A hot fix for exclusive_scan (+ lost enable_if in de [...] adds 83989e69415 Don't call anyone lazy in the documentation. adds 1458bb92dff [lit] NFC: Fix typo in log statement adds c45eaeabb77 [Clang] Undef attribute for global variables adds 68224c19522 [TargetLowering] Only demand a rotation's modulo amount bits adds d177c36e5c4 Add some libc++ revisions to .git-blame-ignore-revs adds 7aa28995e87 [lldb/PlatformDarwin] Be more robust in computing the SDK p [...] adds 6a38e0e4f51 [MC] Recalculate fragment offsets after relaxation adds a4ef2a71d38 [libc++] Move some misplaced compile-time flags adds 9a65d683e02 [mlir] Add target for Shape dialect adds a2920c4ea99 [codegen] Fix one more case where `getGlobalDecl` should be [...] adds 31b7f0ed6a9 [clangd] Extend findTarget()'s dependent name heuristic to [...] adds 1d19b153955 Fix arm build broken by D74361 by dropping align from filec [...] adds 363dd3f394b [mlir][NFC] Rename QuantOps to Quant adds 4d60f47b082 [mlir][NFC] Renamed VectorOps to Vector adds 3829d85cc61 [lldb/PlatformDarwin] Return POSIX path from FindXcodeConte [...] adds cc691f3384c Disable loader-uninitialized tests on Windows adds 68f163df0ec [AMDGPU] Print DWARF register numbers in AMDGPUInstPrinter adds a11b3304188 [lldb/Bindings] Check that process isn't None before callin [...] adds c9b454a1b7e AMDGPU/GlobalISel: Fix verifier errors on image atomics adds f2f8bdc2b16 Fix `-Wunused-variable` warning. NFC. adds a9e05d5711a [libc] Add AOR testing dependencies for buildbot workers. adds 4e0fe038f43 Revert "Avoid emitting unreachable SP adjustments after `throw`" adds ab2dcff309f Support repeated machine outlining adds 7b166d51823 Revert "Support repeated machine outlining" adds 7ca473a27bd [MLIR] Add support for out of tree external projects using MLIR adds 2fae7878d55 [mlir][Vector] Mostly-NFC - Restructure options for lowerin [...] adds 3145427dd73 [mlir][NFC] Replace all usages of PatternMatchResult with L [...] adds bd0ca2627cf [mlir] Update DRR patterns to notify the rewriter why a pat [...] adds d577193c0f7 [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d adds e7a811b3193 PR45133: Don't crash if the active member of a union change [...] adds 34d0d6ba74f [mlir][DialectConversion] Print the operation being legaliz [...] adds 9bca8fc4cf5 Revert "AMDGPU/GlobalISel: Fully handle 0 dmask case during [...] adds 4d35055635a [libc] Add sigaction adds 974d649f8ea CET for Exception Handle adds c3df69faa03 [Alignment][NFC] Deprecate getTransientStackAlignment adds bd763e2cf7c [clang] Fix crash on visiting null nestedNameSpecifier. adds ef56b55e129 [NFC][ARM] Add thumb triple to test adds 5672ae8d868 [SCCP] Use constant ranges for select, if cond is overdefined. adds cda2b0769f5 [InstCombine][X86] Tests for variable but in-range per-elem [...] adds 8d019cda851 Fix ac1d23ed7de01fb3 interaction with gold plugin adds 28c5d97beec [ARM,MVE] Add intrinsics and isel for MVE integer VMLA. adds 928776de923 [ARM,MVE] Add intrinsics for the VQDMLAH family. adds c5b81466c2b Reland D75470 [SVE] Auto-generate builtins and header for svld1. adds f4e495a18e8 [InstCombine][X86] simplifyX86varShift - convert variable i [...] adds 0db7244295b [SCCP] Precommit some additional tests for integer ranges. adds a0a3a9c5a83 [DebugInfo] Fix multi-byte entry values in call site values adds 940ba1465b2 Fix possible assertion when using PBQP with debug info adds 4788ca450fe [AArch64][SVE] Change pointer type of nontemporal load/stor [...] adds 9bdcd9bf443 [llvm][SVE] Addressing mode for FF/NF loads. adds b09cce07c7e [OPENMP50]Codegen for detach clause. adds db31e2e1e6c [lldb/Target] Support more than 2 symbols in StackFrameRecognizer adds a8901a03544 [mlir] NFC: Fix trivial typos in documents adds 6739805e24c [ARM] Track epilogue instructions with FrameDestroy flag (NFC) adds 4cf01ed75e3 [hip] Revise `GlobalDecl` constructors. NFC. adds 2aaafaf5005 [NFC] Add missing REQUIRES clause to a test adds 96b70809d95 [NFC][PowerPC] Add a new MIR file to test if-converter pass adds d000655a8cd [Alignment][NFC] Deprecate getMaxAlignment adds 73cea83a6f5 [IPRA][ARM] Spill extra registers at -Oz adds 85334b030a6 [NFCI][SCEV] Avoid recursion in SCEVExpander::isHighCostExp [...] adds f3e297d90fc Fix build with gcc 7.5 by adding a "redundant move" adds 4d506da91c4 Fix `warning: extra ‘;’` (NFC) adds 24c2e61362a [InstCombine][X86] Add additional demandedelts style test f [...] adds 3481062bc68 [lldb] [testsuite] Enable forgotten -gsplit-dwarf for 2 testfiles adds c21866476e1 [PowerPC][AIX] Implement by-val caller arguments in a singl [...] adds ef64ba83119 [InstCombine] GEPOperator::accumulateConstantOffset does no [...] adds dd12826808f [Syntax] Build template declaration nodes adds 9f981e9adf9 Reland "[gn build] (manually) port 8b409eaba" adds 06150e8356c [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds f57290ec57d [gn build] add rebase changes that should have been in 9f98 [...] adds d1a7bfca743 [AMDGPU] Fix AMDGPUUnifyDivergentExitNodes adds ea4597eef10 Reapply "AMDGPU/GlobalISel: Fully handle 0 dmask case durin [...] adds 4ea1baf6a0e AMDGPU: Initial, crude support for indirect calls adds fc2a5ef9c87 [NFC][PowerPC] Update test adds 642a424bc49 [gn build] remove a workaround that is no longer needed adds 04a309dd0be [libc] Adding memcpy implementation for x86_64 adds 881f5b5a7b2 Revert "[Syntax] Build template declaration nodes" new e13d153c1b5 [ARM,MVE] Add intrinsics for the VQDMLAD family. new e6a74803d4e [VPlan] Use underlying value for printing, if available. new 0d896278c81 Support repeated machine outlining new 1cc09dcefcc Add missing module map entry. The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .git-blame-ignore-revs | 6 + clang-tools-extra/clangd/FindTarget.cpp | 6 + clang-tools-extra/clangd/unittests/XRefsTests.cpp | 8 + clang/docs/HowToSetupToolingForLLVM.rst | 2 +- clang/include/clang/AST/GlobalDecl.h | 22 +- clang/include/clang/Basic/Attr.td | 6 + clang/include/clang/Basic/AttrDocs.td | 23 + clang/include/clang/Basic/BuiltinsAArch64.def | 13 - clang/include/clang/Basic/BuiltinsSVE.def | 20 + clang/include/clang/Basic/CMakeLists.txt | 10 +- clang/include/clang/Basic/DiagnosticASTKinds.td | 3 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 11 + clang/include/clang/Basic/TargetBuiltins.h | 49 ++ clang/include/clang/Basic/arm_mve.td | 61 ++ clang/include/clang/Basic/arm_sve.td | 125 ++++ clang/include/clang/module.modulemap | 1 + clang/lib/AST/DeclBase.cpp | 5 +- clang/lib/AST/Expr.cpp | 2 +- clang/lib/AST/ExprConstant.cpp | 35 +- clang/lib/AST/ItaniumMangle.cpp | 10 +- clang/lib/AST/Mangle.cpp | 2 +- clang/lib/Basic/Targets/AArch64.cpp | 4 + clang/lib/CodeGen/CGBuiltin.cpp | 105 ++-- clang/lib/CodeGen/CGDecl.cpp | 4 +- clang/lib/CodeGen/CGExpr.cpp | 4 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 37 +- clang/lib/CodeGen/CodeGenFunction.h | 1 + clang/lib/CodeGen/CodeGenModule.cpp | 11 +- clang/lib/CodeGen/CodeGenModule.h | 3 - clang/lib/Parse/ParseDecl.cpp | 2 +- clang/lib/Sema/SemaDecl.cpp | 35 ++ clang/lib/Sema/SemaDeclAttr.cpp | 4 + clang/lib/Sema/SemaOpenMP.cpp | 20 +- clang/lib/Sema/SemaTemplate.cpp | 5 +- clang/test/AST/ast-dump-openmp-task.c | 22 +- clang/test/CodeGen/arm-mve-intrinsics/ternary.c | 645 ++++++++++++++++++++ clang/test/CodeGen/arm-mve-intrinsics/vqdmlad.c | 677 +++++++++++++++++++++ clang/test/CodeGen/attr-loader-uninitialized.c | 25 + .../test/CodeGenCXX/attr-loader-uninitialized.cpp | 30 + ...pragma-attribute-supported-attributes-list.test | 1 + clang/test/OpenMP/task_codegen.c | 12 +- clang/test/OpenMP/task_messages.cpp | 14 +- clang/test/Parser/cxx-template-decl.cpp | 6 + clang/test/Sema/attr-loader-uninitialized.c | 37 ++ clang/test/Sema/attr-loader-uninitialized.cpp | 60 ++ clang/test/SemaCXX/constant-expression-cxx2a.cpp | 35 ++ clang/test/SemaTemplate/undeclared-template.cpp | 9 + clang/utils/TableGen/ClangAttrEmitter.cpp | 2 +- clang/utils/TableGen/SveEmitter.cpp | 664 +++++++++++++++++++- clang/utils/TableGen/TableGen.cpp | 18 + clang/utils/TableGen/TableGenBackends.h | 3 + libc/CMakeLists.txt | 1 + libc/cmake/modules/LLVMLibCCheckCpuFeatures.cmake | 180 +++--- libc/cmake/modules/LLVMLibCRules.cmake | 81 ++- libc/cmake/modules/cpu_features/check_avx.cpp | 8 - libc/cmake/modules/cpu_features/check_avx512f.cpp | 8 - .../modules/cpu_features/check_cpu_features.cpp.in | 29 + libc/cmake/modules/cpu_features/check_sse.cpp | 8 - libc/cmake/modules/cpu_features/check_sse2.cpp | 8 - libc/config/linux/api.td | 19 + libc/config/linux/signal.h.in | 4 + libc/lib/CMakeLists.txt | 2 + libc/spec/posix.td | 18 +- libc/spec/stdc.td | 1 - libc/src/signal/linux/CMakeLists.txt | 33 + libc/src/signal/linux/__restore.cpp | 20 + libc/src/signal/linux/sigaction.cpp | 56 ++ libc/src/signal/sigaction.h | 22 + libc/src/string/CMakeLists.txt | 63 +- libc/src/string/memcpy.cpp | 22 + libc/src/string/memcpy.h | 21 + libc/src/string/memcpy_arch_specific.h.def | 65 ++ libc/src/string/memory_utils/CMakeLists.txt | 7 +- libc/src/string/memory_utils/memcpy_utils.h | 100 +++ libc/src/string/memory_utils/utils.h | 7 +- libc/src/string/x86/CMakeLists.txt | 4 + libc/src/string/x86/memcpy_arch_specific.h.inc | 35 ++ libc/test/src/signal/CMakeLists.txt | 15 + libc/test/src/signal/sigaction_test.cpp | 66 ++ libc/test/src/string/CMakeLists.txt | 21 + libc/test/src/string/memcpy_test.cpp | 53 ++ libc/test/src/string/memory_utils/CMakeLists.txt | 7 + .../src/string/memory_utils/memcpy_utils_test.cpp | 208 +++++++ libc/test/src/string/memory_utils/utils_test.cpp | 8 + libc/utils/buildbot/Dockerfile | 3 + libc/utils/testutils/ExecuteFunctionUnix.cpp | 8 +- libcxx/include/codecvt | 72 +-- libcxx/include/exception | 2 + libcxx/include/filesystem | 1 + libcxx/include/future | 1 + libcxx/include/ios | 3 +- libcxx/include/memory | 32 +- libcxx/include/random | 5 + libcxx/include/regex | 3 +- libcxx/include/stdexcept | 7 + libcxx/include/system_error | 1 + libcxx/include/typeinfo | 1 + .../rand.dist.bern.bin/eval.pass.cpp | 141 +++++ libcxx/utils/libcxx/test/config.py | 6 +- lld/test/ELF/arm-thumb-interwork-notfunc.s | 3 +- lld/test/ELF/linkerscript/eh-frame-merge.s | 2 +- lld/test/ELF/mips-micro-jal.s | 2 +- lldb/bindings/interface/SBAddress.i | 2 +- lldb/include/lldb/Target/StackFrameRecognizer.h | 14 +- lldb/packages/Python/lldbsuite/test/lldbutil.py | 2 +- lldb/source/Commands/CommandObjectFrame.cpp | 41 +- lldb/source/Commands/Options.td | 3 +- .../ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp | 3 +- .../Plugins/Platform/MacOSX/PlatformDarwin.cpp | 247 +++++--- .../Plugins/Platform/MacOSX/PlatformDarwin.h | 26 +- .../Plugins/Platform/MacOSX/PlatformMacOSX.cpp | 92 +-- .../SymbolFile/DWARF/DWARFASTParserClang.cpp | 28 +- lldb/source/Target/AssertFrameRecognizer.cpp | 24 +- lldb/source/Target/StackFrameRecognizer.cpp | 51 +- .../frame/recognizer/TestFrameRecognizer.py | 62 +- lldb/test/API/commands/frame/recognizer/main.m | 5 +- .../cpp/template-function/TestTemplateFunctions.py | 40 +- lldb/test/API/lang/cpp/template-function/main.cpp | 62 +- .../Shell/SymbolFile/DWARF/debug-types-basic.test | 2 +- .../SymbolFile/DWARF/debug-types-expressions.test | 8 +- lldb/unittests/Platform/PlatformDarwinTest.cpp | 63 ++ lldb/unittests/Target/StackFrameRecognizerTest.cpp | 3 +- .../LLJITWithLazyReexports.cpp | 2 +- llvm/examples/ThinLtoJIT/ThinLtoJIT.cpp | 2 +- llvm/examples/ThinLtoJIT/ThinLtoModuleIndex.cpp | 2 +- .../llvm/Analysis/ScalarEvolutionExpander.h | 16 +- llvm/include/llvm/CodeGen/DIE.h | 19 +- llvm/include/llvm/CodeGen/MachineFrameInfo.h | 8 +- llvm/include/llvm/CodeGen/MachineRegisterInfo.h | 13 +- .../Hexagon => include/llvm/CodeGen}/RDFGraph.h | 0 .../Hexagon => include/llvm/CodeGen}/RDFLiveness.h | 0 .../llvm/CodeGen}/RDFRegisters.h | 0 llvm/include/llvm/CodeGen/TargetFrameLowering.h | 13 +- llvm/include/llvm/IR/IntrinsicsAArch64.td | 13 +- llvm/include/llvm/IR/IntrinsicsARM.td | 26 + llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 48 +- llvm/lib/Analysis/ValueTracking.cpp | 6 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 9 +- llvm/lib/CodeGen/CMakeLists.txt | 3 + llvm/lib/CodeGen/CalcSpillWeights.cpp | 9 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineFrameInfo.cpp | 19 +- llvm/lib/CodeGen/MachineOutliner.cpp | 47 +- llvm/lib/CodeGen/MachineRegisterInfo.cpp | 50 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 49 +- llvm/lib/{Target/Hexagon => CodeGen}/RDFGraph.cpp | 10 +- .../{Target/Hexagon => CodeGen}/RDFLiveness.cpp | 6 +- .../{Target/Hexagon => CodeGen}/RDFRegisters.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 25 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 52 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 9 + llvm/lib/CodeGen/TargetRegisterInfo.cpp | 4 +- llvm/lib/IR/DebugInfoMetadata.cpp | 4 +- llvm/lib/IR/Operator.cpp | 5 + llvm/lib/MC/MCAssembler.cpp | 8 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 3 +- llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 10 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 4 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 55 +- llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h | 5 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 71 +-- .../AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp | 17 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 14 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp | 1 + llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 7 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 42 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 12 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 11 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 341 +++++++++-- llvm/lib/Target/ARM/ARMFrameLowering.h | 9 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 63 +- llvm/lib/Target/ARM/ARMISelLowering.h | 1 + llvm/lib/Target/ARM/ARMInstrMVE.td | 130 ++-- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 2 +- llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | 25 +- llvm/lib/Target/AVR/AVRISelLowering.cpp | 24 +- llvm/lib/Target/Hexagon/CMakeLists.txt | 3 - llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 8 +- llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 10 +- llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp | 6 +- llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp | 6 +- llvm/lib/Target/Hexagon/RDFCopy.cpp | 6 +- llvm/lib/Target/Hexagon/RDFCopy.h | 6 +- llvm/lib/Target/Hexagon/RDFDeadCode.cpp | 4 +- llvm/lib/Target/Hexagon/RDFDeadCode.h | 4 +- llvm/lib/Target/Lanai/LanaiFrameLowering.cpp | 4 +- llvm/lib/Target/Mips/MipsSEFrameLowering.cpp | 6 +- llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 4 +- llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp | 31 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 35 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 90 ++- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 2 +- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 14 +- llvm/lib/Target/Sparc/SparcFrameLowering.cpp | 11 +- .../WebAssembly/WebAssemblyFrameLowering.cpp | 6 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 22 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 6 + llvm/lib/Target/X86/X86IndirectBranchTracking.cpp | 13 +- llvm/lib/Target/XCore/XCoreFrameLowering.cpp | 9 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 22 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 31 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 189 +++--- llvm/lib/Transforms/Vectorize/VPlan.cpp | 22 +- llvm/lib/Transforms/Vectorize/VPlan.h | 20 + llvm/lib/Transforms/Vectorize/VPlanValue.h | 2 + llvm/test/Analysis/CostModel/ARM/select.ll | 38 +- llvm/test/CodeGen/AArch64/funnel-shift-rot.ll | 2 +- .../CodeGen/AArch64/machine-outliner-iterative.mir | 149 +++++ .../CodeGen/AArch64/sve-intrinsics-loads-ff.ll | 192 ++++++ .../CodeGen/AArch64/sve-intrinsics-loads-nf.ll | 273 +++++++++ llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll | 42 +- llvm/test/CodeGen/AArch64/sve-intrinsics-stores.ll | 42 +- ...ed-non-temporal-ldst-addressing-mode-reg-imm.ll | 76 ++- ...ed-non-temporal-ldst-addressing-mode-reg-reg.ll | 77 ++- .../legalize-llvm.amdgcn.image.atomic.dim.a16.ll | 4 +- llvm/test/CodeGen/AMDGPU/indirect-call.ll | 201 ++++++ .../CodeGen/AMDGPU/multi-divergent-exit-region.ll | 40 ++ llvm/test/CodeGen/AMDGPU/update-phi.ll | 2 - .../CodeGen/ARM/ipra-extra-spills-exceptions.ll | 149 +++++ llvm/test/CodeGen/ARM/ipra-extra-spills.ll | 406 ++++++++++++ llvm/test/CodeGen/Generic/csw-debug-assert.ll | 64 ++ llvm/test/CodeGen/MIR/ARM/thumb2-sub-sp-t3.mir | 4 +- llvm/test/CodeGen/PowerPC/aix-byval-param.ll | 16 - .../CodeGen/PowerPC/aix-cc-byval-limitation1.ll | 16 + .../CodeGen/PowerPC/aix-cc-byval-limitation2.ll | 16 + .../CodeGen/PowerPC/aix-cc-byval-limitation3.ll | 16 + llvm/test/CodeGen/PowerPC/aix-cc-byval.ll | 206 +++++++ llvm/test/CodeGen/PowerPC/aix64-cc-byval.ll | 146 +++++ llvm/test/CodeGen/PowerPC/fma-precision.ll | 27 +- llvm/test/CodeGen/PowerPC/ifcvt.mir | 53 ++ llvm/test/CodeGen/PowerPC/recipest.ll | 9 +- llvm/test/CodeGen/PowerPC/rotl-2.ll | 2 - llvm/test/CodeGen/SystemZ/rot-01.ll | 4 +- llvm/test/CodeGen/SystemZ/rot-02.ll | 6 +- llvm/test/CodeGen/SystemZ/shift-04.ll | 12 +- llvm/test/CodeGen/SystemZ/shift-08.ll | 12 +- llvm/test/CodeGen/Thumb2/ifcvt-minsize.ll | 13 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/ternary.ll | 591 ++++++++++++++++++ llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmlad.ll | 589 ++++++++++++++++++ llvm/test/CodeGen/Thumb2/thumb2-ror.ll | 4 +- llvm/test/CodeGen/X86/combine-rotates.ll | 66 +- .../CodeGen/X86/indirect-branch-tracking-eh.ll | 31 + llvm/test/CodeGen/X86/noreturn-call-win64.ll | 58 -- llvm/test/CodeGen/X86/vector-fshl-rot-512.ll | 62 +- llvm/test/CodeGen/X86/vector-fshr-rot-512.ll | 50 +- .../AArch64/dbgcall-site-float-entry-value.ll | 49 ++ llvm/test/DebugInfo/AMDGPU/print-reg-name.s | 12 +- llvm/test/DebugInfo/AMDGPU/register-mapping.s | 37 -- .../DebugInfo/MIR/X86/callsite-stack-value.mir | 68 +++ llvm/test/MC/X86/relax-offset.s | 13 + .../InstCombine/X86/x86-vector-shifts.ll | 116 ++++ llvm/test/Transforms/InstCombine/add.ll | 126 ++++ llvm/test/Transforms/InstCombine/gep-vector.ll | 21 + llvm/test/Transforms/InstSimplify/vscale.ll | 10 + .../PowerPC/p8-unrolling-legalize-vectors.ll | 198 +++++- .../SCCP/binaryops-range-special-cases.ll | 103 ++++ llvm/test/Transforms/SCCP/ip-ranges-select.ll | 95 +++ llvm/test/Transforms/SCCP/ipsccp-range-crashes.ll | 195 ++++++ llvm/test/Transforms/SCCP/range-and.ll | 39 +- llvm/test/Transforms/SCCP/select.ll | 30 +- llvm/tools/gold/gold-plugin.cpp | 2 +- .../Transforms/Vectorize/VPlanHCFGTest.cpp | 37 ++ llvm/unittests/Transforms/Vectorize/VPlanTest.cpp | 32 +- .../secondary/clang/include/clang/Basic/BUILD.gn | 15 + llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn | 2 + llvm/utils/gn/secondary/clang/lib/CodeGen/BUILD.gn | 1 + llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn | 3 + .../gn/secondary/llvm/lib/Target/Hexagon/BUILD.gn | 3 - llvm/utils/lit/lit/main.py | 2 +- llvm/utils/lit/tests/selecting.py | 2 +- mlir/cmake/modules/CMakeLists.txt | 41 +- mlir/cmake/modules/MLIRConfig.cmake.in | 35 ++ mlir/docs/CreatingADialect.md | 2 +- mlir/docs/DialectConversion.md | 2 +- mlir/docs/Dialects/SPIR-V.md | 2 +- mlir/docs/Dialects/Vector.md | 6 +- mlir/docs/LangRef.md | 2 +- mlir/docs/OpDefinitions.md | 2 +- mlir/docs/QuickstartRewrites.md | 8 +- mlir/docs/RationaleLinalgDialect.md | 4 +- mlir/docs/Tutorials/Toy/Ch-3.md | 6 +- mlir/docs/Tutorials/Toy/Ch-5.md | 4 +- mlir/examples/toy/Ch3/mlir/ToyCombine.cpp | 6 +- mlir/examples/toy/Ch4/mlir/ToyCombine.cpp | 6 +- mlir/examples/toy/Ch5/mlir/LowerToAffineLoops.cpp | 22 +- mlir/examples/toy/Ch5/mlir/ToyCombine.cpp | 6 +- mlir/examples/toy/Ch6/mlir/LowerToAffineLoops.cpp | 22 +- mlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp | 4 +- mlir/examples/toy/Ch6/mlir/ToyCombine.cpp | 6 +- mlir/examples/toy/Ch7/mlir/LowerToAffineLoops.cpp | 22 +- mlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp | 4 +- mlir/examples/toy/Ch7/mlir/ToyCombine.cpp | 6 +- .../Conversion/VectorToLLVM/ConvertVectorToLLVM.h | 2 +- mlir/include/mlir/Dialect/CMakeLists.txt | 4 +- mlir/include/mlir/Dialect/FxpMathOps/FxpMathOps.td | 2 +- .../Linalg/Transforms/LinalgTransformPatterns.td | 10 +- .../Dialect/{QuantOps => Quant}/CMakeLists.txt | 0 .../Dialect/{QuantOps => Quant}/FakeQuantSupport.h | 8 +- .../mlir/Dialect/{QuantOps => Quant}/Passes.h | 6 +- .../mlir/Dialect/{QuantOps => Quant}/QuantOps.h | 10 +- .../mlir/Dialect/{QuantOps => Quant}/QuantOps.td | 8 +- .../Dialect/{QuantOps => Quant}/QuantOpsBase.td | 6 +- .../mlir/Dialect/{QuantOps => Quant}/QuantTypes.h | 6 +- .../Dialect/{QuantOps => Quant}/QuantizeUtils.h | 6 +- .../Dialect/{QuantOps => Quant}/UniformSupport.h | 8 +- mlir/include/mlir/Dialect/SPIRV/SPIRVCastOps.td | 2 +- mlir/include/mlir/Dialect/Shape/IR/CMakeLists.txt | 6 +- mlir/include/mlir/Dialect/Shape/IR/Shape.h | 3 +- mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td | 70 ++- .../Dialect/{VectorOps => Vector}/CMakeLists.txt | 0 .../Dialect/{VectorOps => Vector}/EDSC/Builders.h | 2 +- .../{VectorOps => Vector}/EDSC/Intrinsics.h | 10 +- .../mlir/Dialect/{VectorOps => Vector}/VectorOps.h | 22 +- .../Dialect/{VectorOps => Vector}/VectorOps.td | 6 +- .../VectorTransformPatterns.td | 0 .../{VectorOps => Vector}/VectorTransforms.h | 6 +- .../Dialect/{VectorOps => Vector}/VectorUtils.h | 6 +- mlir/include/mlir/IR/PatternMatch.h | 64 +- mlir/include/mlir/InitAllDialects.h | 8 +- mlir/include/mlir/InitAllPasses.h | 2 +- .../include/mlir/Quantizer/Support/Configuration.h | 2 +- mlir/include/mlir/Quantizer/Support/Metadata.h | 2 +- mlir/include/mlir/Transforms/DialectConversion.h | 24 +- .../AffineToStandard/AffineToStandard.cpp | 88 +-- .../GPUCommon/IndexIntrinsicsOpLowering.h | 6 +- .../Conversion/GPUCommon/OpToFuncCallLowering.h | 6 +- .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 12 +- .../Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp | 60 +- mlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp | 65 +- .../lib/Conversion/LinalgToSPIRV/LinalgToSPIRV.cpp | 14 +- .../LoopToStandard/ConvertLoopToStandard.cpp | 32 +- mlir/lib/Conversion/LoopsToGPU/LoopsToGPU.cpp | 16 +- .../StandardToLLVM/ConvertStandardToLLVM.cpp | 195 +++--- .../StandardToSPIRV/ConvertStandardToSPIRV.cpp | 70 +-- .../StandardToSPIRV/LegalizeStandardForSPIRV.cpp | 24 +- mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt | 2 +- .../VectorToLLVM/ConvertVectorToLLVM.cpp | 126 ++-- .../VectorToLoops/ConvertVectorToLoops.cpp | 14 +- mlir/lib/Dialect/AffineOps/AffineOps.cpp | 16 +- mlir/lib/Dialect/CMakeLists.txt | 6 +- mlir/lib/Dialect/FxpMathOps/IR/FxpMathOps.cpp | 2 +- .../FxpMathOps/Transforms/LowerUniformRealMath.cpp | 30 +- .../FxpMathOps/Transforms/UniformKernelUtils.h | 6 +- .../Dialect/GPU/Transforms/AllReduceLowering.cpp | 6 +- mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt | 2 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 10 +- .../Dialect/Linalg/Transforms/LinalgToLoops.cpp | 22 +- .../Dialect/Linalg/Transforms/LinalgTransforms.cpp | 2 +- .../lib/Dialect/{QuantOps => Quant}/CMakeLists.txt | 0 .../Dialect/{QuantOps => Quant}/IR/QuantOps.cpp | 8 +- .../Dialect/{QuantOps => Quant}/IR/QuantTypes.cpp | 2 +- .../Dialect/{QuantOps => Quant}/IR/TypeDetail.h | 0 .../Dialect/{QuantOps => Quant}/IR/TypeParser.cpp | 4 +- .../Transforms/ConvertConst.cpp | 28 +- .../Transforms/ConvertSimQuant.cpp | 16 +- .../{QuantOps => Quant}/Utils/FakeQuantSupport.cpp | 4 +- .../{QuantOps => Quant}/Utils/QuantizeUtils.cpp | 4 +- .../{QuantOps => Quant}/Utils/UniformSupport.cpp | 2 +- mlir/lib/Dialect/SPIRV/SPIRVCanonicalization.cpp | 39 +- mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp | 10 +- .../DecorateSPIRVCompositeTypeLayoutPass.cpp | 12 +- .../SPIRV/Transforms/LowerABIAttributesPass.cpp | 12 +- mlir/lib/Dialect/Shape/CMakeLists.txt | 11 +- mlir/lib/Dialect/Shape/DialectRegistration.cpp | 13 - mlir/lib/Dialect/Shape/IR/Shape.cpp | 116 ++++ mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 102 ++-- .../Dialect/{VectorOps => Vector}/CMakeLists.txt | 6 +- .../{VectorOps => Vector}/EDSC/Builders.cpp | 6 +- .../Dialect/{VectorOps => Vector}/VectorOps.cpp | 34 +- .../{VectorOps => Vector}/VectorTransforms.cpp | 180 +++--- .../Dialect/{VectorOps => Vector}/VectorUtils.cpp | 6 +- mlir/lib/IR/PatternMatch.cpp | 2 +- .../lib/Quantizer/Configurations/FxpMathConfig.cpp | 4 +- mlir/lib/Quantizer/Support/UniformConstraints.cpp | 2 +- .../Transforms/AddDefaultStatsTestPass.cpp | 4 +- .../Transforms/InferQuantizedTypesPass.cpp | 4 +- .../Transforms/RemoveInstrumentationPass.cpp | 8 +- mlir/lib/Transforms/CMakeLists.txt | 2 +- mlir/lib/Transforms/DialectConversion.cpp | 27 +- mlir/lib/Transforms/Vectorize.cpp | 4 +- .../Dialect/{QuantOps => Quant}/canonicalize.mlir | 0 .../Dialect/{QuantOps => Quant}/convert-const.mlir | 0 .../convert-fakequant-invalid.mlir | 0 .../{QuantOps => Quant}/convert-fakequant.mlir | 0 .../{QuantOps => Quant}/parse-any-invalid.mlir | 0 .../Dialect/{QuantOps => Quant}/parse-any.mlir | 0 .../{QuantOps => Quant}/parse-ops-invalid.mlir | 0 .../Dialect/{QuantOps => Quant}/parse-ops.mlir | 0 .../{QuantOps => Quant}/parse-uniform-invalid.mlir | 0 .../Dialect/{QuantOps => Quant}/parse-uniform.mlir | 0 .../Dialect/{QuantOps => Quant}/quant_region.mlir | 0 mlir/test/Dialect/Shape/ops.mlir | 58 ++ .../{VectorOps => Vector}/canonicalize.mlir | 0 .../Dialect/{VectorOps => Vector}/invalid.mlir | 0 mlir/test/Dialect/{VectorOps => Vector}/ops.mlir | 0 .../vector-contract-transforms.mlir | 2 +- .../vector-slices-transforms.mlir | 0 .../{VectorOps => Vector}/vector-transforms.mlir | 0 mlir/test/EDSC/CMakeLists.txt | 4 +- mlir/test/EDSC/builder-api-test.cpp | 4 +- .../TestVectorTransformPatterns.td | 4 +- mlir/test/lib/Dialect/SPIRV/TestAvailability.cpp | 40 +- mlir/test/lib/TestDialect/TestDialect.cpp | 6 +- mlir/test/lib/TestDialect/TestPatterns.cpp | 60 +- mlir/test/lib/Transforms/CMakeLists.txt | 2 +- mlir/test/lib/Transforms/TestVectorTransforms.cpp | 18 +- .../test/lib/Transforms/TestVectorizationUtils.cpp | 2 +- mlir/tools/mlir-tblgen/RewriterGen.cpp | 81 ++- .../{QuantOps => Quant}/QuantizationUtilsTest.cpp | 6 +- pstl/include/pstl/internal/glue_numeric_defs.h | 2 +- pstl/include/pstl/internal/glue_numeric_impl.h | 18 +- pstl/test/std/numerics/numeric.ops/scan.fail.cpp | 38 ++ 413 files changed, 11859 insertions(+), 2622 deletions(-) create mode 100644 clang/include/clang/Basic/BuiltinsSVE.def create mode 100644 clang/test/CodeGen/arm-mve-intrinsics/vqdmlad.c create mode 100644 clang/test/CodeGen/attr-loader-uninitialized.c create mode 100644 clang/test/CodeGenCXX/attr-loader-uninitialized.cpp create mode 100644 clang/test/Sema/attr-loader-uninitialized.c create mode 100644 clang/test/Sema/attr-loader-uninitialized.cpp create mode 100644 clang/test/SemaTemplate/undeclared-template.cpp delete mode 100644 libc/cmake/modules/cpu_features/check_avx.cpp delete mode 100644 libc/cmake/modules/cpu_features/check_avx512f.cpp create mode 100644 libc/cmake/modules/cpu_features/check_cpu_features.cpp.in delete mode 100644 libc/cmake/modules/cpu_features/check_sse.cpp delete mode 100644 libc/cmake/modules/cpu_features/check_sse2.cpp create mode 100644 libc/src/signal/linux/__restore.cpp create mode 100644 libc/src/signal/linux/sigaction.cpp create mode 100644 libc/src/signal/sigaction.h create mode 100644 libc/src/string/memcpy.cpp create mode 100644 libc/src/string/memcpy.h create mode 100644 libc/src/string/memcpy_arch_specific.h.def create mode 100644 libc/src/string/memory_utils/memcpy_utils.h create mode 100644 libc/src/string/x86/CMakeLists.txt create mode 100644 libc/src/string/x86/memcpy_arch_specific.h.inc create mode 100644 libc/test/src/signal/sigaction_test.cpp create mode 100644 libc/test/src/string/memcpy_test.cpp create mode 100644 libc/test/src/string/memory_utils/memcpy_utils_test.cpp rename llvm/{lib/Target/Hexagon => include/llvm/CodeGen}/RDFGraph.h (100%) rename llvm/{lib/Target/Hexagon => include/llvm/CodeGen}/RDFLiveness.h (100%) rename llvm/{lib/Target/Hexagon => include/llvm/CodeGen}/RDFRegisters.h (100%) rename llvm/lib/{Target/Hexagon => CodeGen}/RDFGraph.cpp (99%) rename llvm/lib/{Target/Hexagon => CodeGen}/RDFLiveness.cpp (99%) rename llvm/lib/{Target/Hexagon => CodeGen}/RDFRegisters.cpp (99%) create mode 100644 llvm/test/CodeGen/AArch64/machine-outliner-iterative.mir create mode 100644 llvm/test/CodeGen/AMDGPU/indirect-call.ll create mode 100644 llvm/test/CodeGen/ARM/ipra-extra-spills-exceptions.ll create mode 100644 llvm/test/CodeGen/ARM/ipra-extra-spills.ll create mode 100644 llvm/test/CodeGen/Generic/csw-debug-assert.ll delete mode 100644 llvm/test/CodeGen/PowerPC/aix-byval-param.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation1.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation2.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation3.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix64-cc-byval.ll create mode 100644 llvm/test/CodeGen/PowerPC/ifcvt.mir create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmlad.ll create mode 100644 llvm/test/CodeGen/X86/indirect-branch-tracking-eh.ll create mode 100644 llvm/test/DebugInfo/AArch64/dbgcall-site-float-entry-value.ll delete mode 100644 llvm/test/DebugInfo/AMDGPU/register-mapping.s create mode 100644 llvm/test/DebugInfo/MIR/X86/callsite-stack-value.mir create mode 100644 llvm/test/MC/X86/relax-offset.s create mode 100644 llvm/test/Transforms/SCCP/binaryops-range-special-cases.ll create mode 100644 llvm/test/Transforms/SCCP/ipsccp-range-crashes.ll create mode 100644 mlir/cmake/modules/MLIRConfig.cmake.in rename mlir/include/mlir/Dialect/{QuantOps => Quant}/CMakeLists.txt (100%) rename mlir/include/mlir/Dialect/{QuantOps => Quant}/FakeQuantSupport.h (94%) rename mlir/include/mlir/Dialect/{QuantOps => Quant}/Passes.h (92%) rename mlir/include/mlir/Dialect/{QuantOps => Quant}/QuantOps.h (76%) rename mlir/include/mlir/Dialect/{QuantOps => Quant}/QuantOps.td (98%) rename mlir/include/mlir/Dialect/{QuantOps => Quant}/QuantOpsBase.td (95%) rename mlir/include/mlir/Dialect/{QuantOps => Quant}/QuantTypes.h (99%) rename mlir/include/mlir/Dialect/{QuantOps => Quant}/QuantizeUtils.h (94%) rename mlir/include/mlir/Dialect/{QuantOps => Quant}/UniformSupport.h (97%) rename mlir/include/mlir/Dialect/{VectorOps => Vector}/CMakeLists.txt (100%) rename mlir/include/mlir/Dialect/{VectorOps => Vector}/EDSC/Builders.h (97%) rename mlir/include/mlir/Dialect/{VectorOps => Vector}/EDSC/Intrinsics.h (69%) rename mlir/include/mlir/Dialect/{VectorOps => Vector}/VectorOps.h (79%) rename mlir/include/mlir/Dialect/{VectorOps => Vector}/VectorOps.td (99%) rename mlir/include/mlir/Dialect/{VectorOps => Vector}/VectorTransformPatterns.td (100%) rename mlir/include/mlir/Dialect/{VectorOps => Vector}/VectorTransforms.h (95%) rename mlir/include/mlir/Dialect/{VectorOps => Vector}/VectorUtils.h (97%) rename mlir/lib/Dialect/{QuantOps => Quant}/CMakeLists.txt (100%) rename mlir/lib/Dialect/{QuantOps => Quant}/IR/QuantOps.cpp (94%) rename mlir/lib/Dialect/{QuantOps => Quant}/IR/QuantTypes.cpp (99%) rename mlir/lib/Dialect/{QuantOps => Quant}/IR/TypeDetail.h (100%) rename mlir/lib/Dialect/{QuantOps => Quant}/IR/TypeParser.cpp (99%) rename mlir/lib/Dialect/{QuantOps => Quant}/Transforms/ConvertConst.cpp (86%) rename mlir/lib/Dialect/{QuantOps => Quant}/Transforms/ConvertSimQuant.cpp (92%) rename mlir/lib/Dialect/{QuantOps => Quant}/Utils/FakeQuantSupport.cpp (98%) rename mlir/lib/Dialect/{QuantOps => Quant}/Utils/QuantizeUtils.cpp (98%) rename mlir/lib/Dialect/{QuantOps => Quant}/Utils/UniformSupport.cpp (98%) delete mode 100644 mlir/lib/Dialect/Shape/DialectRegistration.cpp create mode 100644 mlir/lib/Dialect/Shape/IR/Shape.cpp rename mlir/lib/Dialect/{VectorOps => Vector}/CMakeLists.txt (70%) rename mlir/lib/Dialect/{VectorOps => Vector}/EDSC/Builders.cpp (91%) rename mlir/lib/Dialect/{VectorOps => Vector}/VectorOps.cpp (98%) rename mlir/lib/Dialect/{VectorOps => Vector}/VectorTransforms.cpp (92%) rename mlir/lib/Dialect/{VectorOps => Vector}/VectorUtils.cpp (98%) rename mlir/test/Dialect/{QuantOps => Quant}/canonicalize.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/convert-const.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/convert-fakequant-invalid.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/convert-fakequant.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/parse-any-invalid.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/parse-any.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/parse-ops-invalid.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/parse-ops.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/parse-uniform-invalid.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/parse-uniform.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/quant_region.mlir (100%) create mode 100644 mlir/test/Dialect/Shape/ops.mlir rename mlir/test/Dialect/{VectorOps => Vector}/canonicalize.mlir (100%) rename mlir/test/Dialect/{VectorOps => Vector}/invalid.mlir (100%) rename mlir/test/Dialect/{VectorOps => Vector}/ops.mlir (100%) rename mlir/test/Dialect/{VectorOps => Vector}/vector-contract-transforms.mlir (99%) rename mlir/test/Dialect/{VectorOps => Vector}/vector-slices-transforms.mlir (100%) rename mlir/test/Dialect/{VectorOps => Vector}/vector-transforms.mlir (100%) rename mlir/unittests/Dialect/{QuantOps => Quant}/QuantizationUtilsTest.cpp (97%) create mode 100644 pstl/test/std/numerics/numeric.ops/scan.fail.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-next-allnoconfig updated (135744ce689 -> 52c365aa9ca)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-next-allnoconfig in repository toolchain/ci/llvm-project. from 135744ce689 [Concepts] Fix incorrect control flow when TryAnnotateTypeC [...] adds 26c762df6c4 Revert "[Concepts] Fix incorrect control flow when TryAnnot [...] adds 52c365aa9ca Revert "[Concepts] Fix incorrect DeclContext for transforme [...] No new revisions were added by this update. Summary of changes: clang/include/clang/Sema/Sema.h | 6 ++---- clang/lib/Parse/ParseDecl.cpp | 6 ------ clang/lib/Parse/ParseTemplate.cpp | 3 +-- clang/lib/Sema/SemaTemplate.cpp | 13 +++++-------- clang/lib/Sema/TreeTransform.h | 2 +- clang/test/SemaCXX/invalid-member-expr.cpp | 1 - clang/test/SemaCXX/typo-correction.cpp | 5 ++--- clang/test/SemaTemplate/instantiate-requires-expr.cpp | 13 ------------- clang/test/SemaTemplate/ms-lookup-template-base-classes.cpp | 1 - 9 files changed, 11 insertions(+), 39 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-next-allnoconfig updated (96c4b944d -> 73eff33ac)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-next-allnoconfig in repository toolchain/ci/base-artifacts. discards 96c4b944d 0: update: llvm-linux: all new 73eff33ac 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (96c4b944d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-build_llvm/console.log | 12580 +++++++++++++++++------------------ 03-build_linux/console.log | 696 +- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 4 +- 06-update_baseline/console.log | 36 - console.log | 13448 +++++++++++++++++++------------------- jenkins/manifest.sh | 14 +- 8 files changed, 13419 insertions(+), 13491 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (c9a98c5c6 -> 9bae2bc76)

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5 years, 3 months

[gcc] branch master updated (535a8645bb8 -> 405e918c314)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 535a8645bb8 [ARM][GCC][2/5x]: MVE load intrinsics. new 405e918c314 [ARM][GCC][3/5x]: MVE store intrinsics with predicated suffix. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 54 ++++++++++ gcc/config/arm/arm-builtins.c | 35 +++++++ gcc/config/arm/arm_mve.h | 111 +++++++++++++++++++++ gcc/config/arm/arm_mve_builtins.def | 6 ++ gcc/config/arm/mve.md | 65 ++++++++++++ gcc/testsuite/ChangeLog | 19 ++++ .../gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c | 22 ++++ .../gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c | 22 ++++ .../gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c | 22 ++++ .../gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c | 22 ++++ .../gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c | 22 ++++ .../gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c | 22 ++++ .../mve/intrinsics/vstrbq_scatter_offset_p_s16.c | 22 ++++ .../mve/intrinsics/vstrbq_scatter_offset_p_s32.c | 22 ++++ .../mve/intrinsics/vstrbq_scatter_offset_p_s8.c | 22 ++++ .../mve/intrinsics/vstrbq_scatter_offset_p_u16.c | 22 ++++ .../mve/intrinsics/vstrbq_scatter_offset_p_u32.c | 22 ++++ .../mve/intrinsics/vstrbq_scatter_offset_p_u8.c | 22 ++++ .../arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c | 22 ++++ .../arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c | 22 ++++ 20 files changed, 598 insertions(+) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offs [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offs [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offs [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offs [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offs [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offs [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allyesconfig updated (339485c9a80f -> 93556fb211fa)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allyesconfig in repository toolchain/ci/linux. from 339485c9a80f Linux 4.19.110 adds 458c058c9cd4 phy: Revert toggling reset changes. adds ba389f362030 net: phy: Avoid multiple suspends adds d6d11db20e8f cgroup, netclassid: periodically release file_lock on clas [...] adds 33f0d95c1079 gre: fix uninit-value in __iptunnel_pull_header adds 24dd755fcec6 inet_diag: return classid for all socket types adds 3d95a5e34b40 ipv6/addrconf: call ipv6_mc_up() for non-Ethernet interface adds 79a958d8a1e5 ipvlan: add cond_resched_rcu() while processing muticast backlog adds ee98e615c8ee ipvlan: do not add hardware address of master to its unica [...] adds cb9e7197bbeb ipvlan: do not use cond_resched_rcu() in ipvlan_process_mu [...] adds eb273bb8205c ipvlan: don't deref eth hdr before checking it's set adds 53e404eddda4 net/ipv6: use configured metric when add peer route adds 7aa760f0f545 netlink: Use netlink header as base to calculate bad attri [...] adds 28cedae50965 net: macsec: update SCI upon MAC address change. adds 7e78a7fdcc8d net: nfc: fix bounds checking bugs on "pipe" adds 64fabf9bcadf net/packet: tpacket_rcv: do not increment ring index on drop adds ba245652e198 net: stmmac: dwmac1000: Disable ACS if enhanced descs are [...] adds c8149165ac27 net: systemport: fix index check to avoid an array out of [...] adds 8a207f28f55d r8152: check disconnect status after long sleep adds 989e5462fae3 sfc: detach from cb_page in efx_copy_channel() adds aadf2a728fd7 bnxt_en: reinitialize IRQs when MTU is modified adds 941464dcbcd3 cgroup: memcg: net: do not associate sock with unrelated cgroup adds 9d9141948a02 net: memcg: late association of sock to memcg adds 34636d249831 net: memcg: fix lockdep splat in inet_csk_accept() adds f9f04772a2a8 devlink: validate length of param values adds 4e4a3292c69a fib: add missing attribute validation for tun_id adds 4785c6659738 nl802154: add missing attribute validation adds 1768ebf32e5e nl802154: add missing attribute validation for dev_type adds 89b4332a9f24 can: add missing attribute validation for termination adds 388b9d45aecd macsec: add missing attribute validation for port adds 09ec15bbde5f net: fq: add missing attribute validation for orphan mask adds 1c2dcaf80a0f team: add missing attribute validation for port ifindex adds 98be45047c33 team: add missing attribute validation for array index adds ae855e782d4d nfc: add missing attribute validation for SE API adds b198061962a9 nfc: add missing attribute validation for deactivate target adds 18164e7902ba nfc: add missing attribute validation for vendor subcommand adds e37fc53a1ea7 net: phy: fix MDIO bus PM PHY resuming adds b5a8261a4588 selftests/net/fib_tests: update addr_metric_test for peer [...] adds d8cfddaf47d2 net/ipv6: need update peer route when modify metric adds dfe7df51a58b net/ipv6: remove the old peer route if change it to a new one adds 3c2893a77cef tipc: add missing attribute validation for MTU property adds 48aea14b8840 devlink: validate length of region addr/len adds 4dff63b3ff05 bonding/alb: make sure arp header is pulled before accessing it adds 6a62f2dd47a7 slip: make slhc_compress() more robust against malicious packets adds 10ea9902ed4f net: fec: validate the new settings in fec_enet_set_coalesce() adds 084dce9dc9d3 macvlan: add cond_resched() during multicast processing adds ff79a4a75ca3 cgroup: cgroup_procs_next should increase position index adds ab3e3b23d8d5 cgroup: Iterate tasks that did not finish do_exit() adds 30fa84ae81ca iwlwifi: mvm: Do not require PHY_SKU NVM section for 3168 devices adds 2d716cbdfd9f virtio-blk: fix hw_queue stopped on arbitrary error adds ba21563b257a iommu/vt-d: quirk_ioat_snb_local_iommu: replace WARN_TAINT [...] adds 64cd059b7944 netfilter: nf_conntrack: ct_cpu_seq_next should increase p [...] adds 4fbcbed7c451 netfilter: synproxy: synproxy_cpu_seq_next should increase [...] adds 6fb92c687fba netfilter: xt_recent: recent_seq_next should increase posi [...] adds 80a12a6f0357 netfilter: x_tables: xt_mttg_seq_next should increase posi [...] adds 3cd2a91a88be workqueue: don't use wq_select_unbound_cpu() for bound works adds bef7177cefad drm/amd/display: remove duplicated assignment to grph_obj_type adds a89327c1f770 ktest: Add timeout for ssh sync testing adds a8ab0b709790 cifs_atomic_open(): fix double-put on late allocation failure adds 777179200cb8 gfs2_atomic_open(): fix O_EXCL|O_CREAT handling on cold dcache adds 331c88f5d0f1 KVM: x86: clear stale x86_emulate_ctxt->intercept value adds 2345c4d769ed ARC: define __ALIGN_STR and __ALIGN symbols for ARC adds 609314331540 macintosh: windfarm: fix MODINFO regression adds 86896c1c5785 efi: Fix a race and a buffer overflow while reading efivar [...] adds 53afdba2c35e efi: Make efi_rts_work accessible to efi page fault handler adds 319478cbd2be mt76: fix array overflow on receiving too many fragments f [...] adds 119c200b41fc x86/mce: Fix logic and comments around MSR_PPIN_CTL adds 9407d33ff453 iommu/dma: Fix MSI reservation allocation adds 9d9a8afd4c70 iommu/vt-d: dmar: replace WARN_TAINT with pr_warn + add_taint adds 1315f6e50e4e iommu/vt-d: Fix a bug in intel_iommu_iova_to_phys() for huge page adds bf0ef794e197 batman-adv: Don't schedule OGM for disabled interface adds e0e86d976a14 pinctrl: meson-gxl: fix GPIOX sdio pins adds c62016bdc2da pinctrl: core: Remove extra kref_get which blocks hogs bei [...] adds cce0478d6a9e drm/i915/gvt: Fix unnecessary schedule timer when no vGPU exits adds 70f5b3685234 i2c: gpio: suppress error on probe defer adds 7ff441815924 nl80211: add missing attribute validation for critical pro [...] adds 4fe88c83221d nl80211: add missing attribute validation for beacon repor [...] adds 99c731e17d5e nl80211: add missing attribute validation for channel switch adds 5e8dff99645e perf bench futex-wake: Restore thread count default to onl [...] adds 5b425d389ed2 netfilter: cthelper: add missing attribute validation for [...] adds 64d43185eba6 netfilter: nft_payload: add missing attribute validation f [...] adds 5ae2daf9977a netfilter: nft_tunnel: add missing attribute validation fo [...] adds d51c65f835a9 iommu/vt-d: Fix the wrong printing in RHSA parsing adds 7967fef2c6aa iommu/vt-d: Ignore devices with out-of-spec domain number adds 9dda737464fc i2c: acpi: put device when verifying client fails adds b5b9c644cfc2 ipv6: restrict IPV6_ADDRFORM operation adds a22af440349c net/smc: check for valid ib_client_data adds 2f3121f6e2a5 net/smc: cancel event worker during device removal adds d47aae069e8f efi: Add a sanity check to efivar_store_raw() adds 8562759c8fca batman-adv: Avoid free/alloc race when handling OGM2 buffer adds 93556fb211fa Linux 4.19.111 No new revisions were added by this update. Summary of changes: Documentation/filesystems/porting | 7 +++ Makefile | 2 +- arch/arc/include/asm/linkage.h | 2 + arch/x86/kernel/cpu/mcheck/mce_intel.c | 9 ++-- arch/x86/kvm/emulate.c | 1 + drivers/block/virtio_blk.c | 8 ++-- drivers/firmware/efi/efivars.c | 32 +++++++++---- drivers/firmware/efi/runtime-wrappers.c | 53 ++++------------------ drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | 3 +- drivers/gpu/drm/i915/gvt/vgpu.c | 12 +++-- drivers/i2c/busses/i2c-gpio.c | 2 +- drivers/i2c/i2c-core-acpi.c | 10 +++- drivers/iommu/dma-iommu.c | 16 +++---- drivers/iommu/dmar.c | 21 ++++++--- drivers/iommu/intel-iommu.c | 13 ++++-- drivers/macintosh/windfarm_ad7417_sensor.c | 7 +++ drivers/macintosh/windfarm_fcu_controls.c | 7 +++ drivers/macintosh/windfarm_lm75_sensor.c | 16 ++++++- drivers/macintosh/windfarm_lm87_sensor.c | 7 +++ drivers/macintosh/windfarm_max6690_sensor.c | 7 +++ drivers/macintosh/windfarm_smu_sat.c | 7 +++ drivers/net/bonding/bond_alb.c | 20 ++++---- drivers/net/can/dev.c | 1 + drivers/net/ethernet/broadcom/bcmsysport.c | 2 +- drivers/net/ethernet/broadcom/bnxt/bnxt.c | 4 +- drivers/net/ethernet/freescale/fec_main.c | 6 +-- drivers/net/ethernet/sfc/efx.c | 1 + .../net/ethernet/stmicro/stmmac/dwmac1000_core.c | 3 +- drivers/net/ipvlan/ipvlan_core.c | 19 ++++---- drivers/net/ipvlan/ipvlan_main.c | 5 +- drivers/net/macsec.c | 12 +++-- drivers/net/macvlan.c | 2 + drivers/net/phy/phy_device.c | 18 +++++--- drivers/net/slip/slhc.c | 14 ++++-- drivers/net/team/team.c | 2 + drivers/net/usb/r8152.c | 8 ++++ drivers/net/wireless/intel/iwlwifi/mvm/nvm.c | 3 +- drivers/net/wireless/mediatek/mt76/dma.c | 9 ++-- drivers/pinctrl/core.c | 1 - drivers/pinctrl/meson/pinctrl-meson-gxl.c | 4 +- fs/cifs/dir.c | 1 - fs/gfs2/inode.c | 2 +- fs/open.c | 3 -- include/linux/cgroup.h | 1 + include/linux/efi.h | 36 +++++++++++++++ include/linux/inet_diag.h | 18 +++++--- include/linux/phy.h | 2 + include/net/fib_rules.h | 1 + kernel/cgroup/cgroup.c | 37 +++++++++++---- kernel/workqueue.c | 14 +++--- mm/memcontrol.c | 14 +----- net/batman-adv/bat_iv_ogm.c | 4 ++ net/batman-adv/bat_v_ogm.c | 42 +++++++++++++---- net/batman-adv/types.h | 4 ++ net/core/devlink.c | 33 +++++++++----- net/core/netclassid_cgroup.c | 47 +++++++++++++++---- net/core/sock.c | 5 +- net/ieee802154/nl_policy.c | 6 +++ net/ipv4/gre_demux.c | 12 ++++- net/ipv4/inet_connection_sock.c | 20 ++++++++ net/ipv4/inet_diag.c | 44 ++++++++---------- net/ipv4/raw_diag.c | 5 +- net/ipv4/udp_diag.c | 5 +- net/ipv6/addrconf.c | 49 +++++++++++++++----- net/ipv6/ipv6_sockglue.c | 10 +++- net/netfilter/nf_conntrack_standalone.c | 2 +- net/netfilter/nf_synproxy_core.c | 2 +- net/netfilter/nfnetlink_cthelper.c | 2 + net/netfilter/nft_payload.c | 1 + net/netfilter/nft_tunnel.c | 2 + net/netfilter/x_tables.c | 6 +-- net/netfilter/xt_recent.c | 2 +- net/netlink/af_netlink.c | 2 +- net/nfc/hci/core.c | 19 ++++++-- net/nfc/netlink.c | 4 ++ net/packet/af_packet.c | 13 +++--- net/sched/sch_fq.c | 1 + net/sctp/diag.c | 8 +--- net/smc/smc_ib.c | 3 ++ net/tipc/netlink.c | 3 +- net/wireless/nl80211.c | 5 ++ tools/perf/bench/futex-wake.c | 4 +- tools/testing/ktest/ktest.pl | 2 +- tools/testing/selftests/net/fib_tests.sh | 34 ++++++++++++-- 84 files changed, 624 insertions(+), 282 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allyesconfig updated (135744ce689 -> 52c365aa9ca)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allyesconfig in repository toolchain/ci/llvm-project. from 135744ce689 [Concepts] Fix incorrect control flow when TryAnnotateTypeC [...] adds 26c762df6c4 Revert "[Concepts] Fix incorrect control flow when TryAnnot [...] adds 52c365aa9ca Revert "[Concepts] Fix incorrect DeclContext for transforme [...] No new revisions were added by this update. Summary of changes: clang/include/clang/Sema/Sema.h | 6 ++---- clang/lib/Parse/ParseDecl.cpp | 6 ------ clang/lib/Parse/ParseTemplate.cpp | 3 +-- clang/lib/Sema/SemaTemplate.cpp | 13 +++++-------- clang/lib/Sema/TreeTransform.h | 2 +- clang/test/SemaCXX/invalid-member-expr.cpp | 1 - clang/test/SemaCXX/typo-correction.cpp | 5 ++--- clang/test/SemaTemplate/instantiate-requires-expr.cpp | 13 ------------- clang/test/SemaTemplate/ms-lookup-template-base-classes.cpp | 1 - 9 files changed, 11 insertions(+), 39 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/interesting-commits] branch linaro-local/ci/tcwg_bmk_tx1 updated (68925b9 -> a2f7442)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1 in repository toolchain/ci/interesting-commits. from 68925b9 Add last-good 8404aeb56a73ab24f9b295111de3b37a37f0b841 from h [...] new a2f7442 Add regression 9122b92f8e046bfeabdc503d978cf098c86f6e49 from [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: llvm | 1 + 1 file changed, 1 insertion(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/interesting-commits] branch linaro-local/ci/tcwg_bmk_tx1 updated (ee6c998 -> 68925b9)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1 in repository toolchain/ci/interesting-commits. from ee6c998 Add regression 3133bed5d0327e8a9cd0a601b7ecdb9de4fc825d from [...] new 68925b9 Add last-good 8404aeb56a73ab24f9b295111de3b37a37f0b841 from h [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: llvm | 1 + 1 file changed, 1 insertion(+) create mode 100644 llvm -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allyesconfig updated (c2590c49c -> 1c07c48eb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards c2590c49c 0: update: llvm-linux: 16 new 1c07c48eb 0: update: llvm-linux: 16 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (c2590c49c) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-build_llvm/console.log | 12620 ++++++++++++++++++----------------- 03-build_linux/console.log | 864 ++- 05-check_regression/console.log | 62 +- 06-update_baseline/console.log | 10 +- console.log | 13684 +++++++++++++++++++------------------- jenkins/manifest.sh | 14 +- regressions.txt | 20 +- 8 files changed, 13691 insertions(+), 13711 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

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Tcwg-commits March 2020