Tcwg-commits March 2020

tcwg-commits@lists.linaro.org

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allnoconfig updated (fcc7376e0a -> 4a90f06205)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allnoconfig in repository toolchain/ci/binutils-gdb. from fcc7376e0a Avoid get_ptrace_pid() usage on NetBSD in x86-bsd-nat.c adds 6a541707f3 Fix assertion failure in the BFD library when called to pars [...] adds 2d07da271e [AArch64] When unavailable, fetch VG from ptrace. adds 3734bec833 Include: Sync lto-symtab.h and plugin-api.h with GCC adds f3a08f7778 Fix discrepancies in nm's --line-number output by adding sup [...] adds f09db38094 Disable get_ptrace_pid for NetBSD adds 9a6c68caa9 Add support for --no-rosegment option. adds ce2ea1c7e0 Automatic date update in version.in adds a859124df2 tidy elf_backend calls adds 833d919c93 PowerPC disassembly of odd sized sections adds fe90ae8a9f NDS32 disassembly of odd sized sections adds 340f3ac808 metag uninitialized memory read adds 67338173a4 XCOFF uninitialized read adds c02d66610b Silence warnings due to plugin API change adds c3a1714ce7 plugin: Use LDPT_ADD_SYMBOLS_V2 to get symbol type adds 3d98c46092 plugin: Don't invoke LTO-wrapper adds 5844b4657a Fix compile time warnings about the possibility of using uni [...] adds c7da12c72c Add support for NetBSD threads in ppc-nbsd-nat.c adds 0d832e7f5e Add support for the xdef and xref pseudo-ops to the Z80 assembler. adds 0dd7b8f788 [gdb/testsuite] Fix timeouts in gdb.threads/step-over-*.exp new 4a90f06205 Add support for NetBSD threads in hppa-nbsd-nat.c The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/ChangeLog | 70 + bfd/coff-rs6000.c | 8 +- bfd/config.in | 6 - bfd/configure | 10 - bfd/configure.ac | 6 - bfd/dwarf2.c | 86 +- bfd/elf.c | 42 +- bfd/elfcode.h | 14 +- bfd/elfnn-ia64.c | 7 +- bfd/plugin.c | 487 +---- bfd/plugin.h | 5 +- bfd/version.h | 2 +- binutils/ChangeLog | 20 + binutils/ar.c | 2 +- binutils/nm.c | 2 +- binutils/readelf.c | 34 +- binutils/testsuite/binutils-all/dw4.s | 1974 ++++++++++++++++++++ binutils/testsuite/binutils-all/nm.exp | 47 + gas/ChangeLog | 6 + gas/config/tc-z80.c | 2 + gas/doc/c-z80.texi | 83 +- gdb/ChangeLog | 26 + gdb/hppa-nbsd-nat.c | 14 +- gdb/inf-ptrace.c | 47 +- gdb/inf-ptrace.h | 7 +- gdb/nat/aarch64-sve-linux-ptrace.c | 21 +- gdb/ppc-nbsd-nat.c | 14 +- gdb/testsuite/ChangeLog | 6 + .../gdb.threads/step-over-lands-on-breakpoint.exp | 5 +- .../gdb.threads/step-over-trips-on-watchpoint.exp | 5 +- gold/ChangeLog | 4 + gold/options.h | 2 +- include/ChangeLog | 13 + include/lto-symtab.h | 13 + include/plugin-api.h | 32 +- ld/ChangeLog | 13 + ld/testplug.c | 5 +- ld/testplug2.c | 5 +- ld/testplug3.c | 5 +- ld/testplug4.c | 5 +- ld/testsuite/ld-plugin/lto.exp | 15 +- opcodes/ChangeLog | 19 + opcodes/metag-dis.c | 10 +- opcodes/nds32-dis.c | 24 +- opcodes/ppc-dis.c | 28 +- 45 files changed, 2625 insertions(+), 626 deletions(-) create mode 100644 binutils/testsuite/binutils-all/dw4.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig updated (d01cb80e0fb -> bf061b9a5f7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig in repository toolchain/ci/gcc. from d01cb80e0fb rs6000: Check -+0 and NaN for smax/smin generation adds 337111a2349 doc: Note that some warnings depend on optimizations (PR 92757) adds bf061b9a5f7 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 9 +++++++++ gcc/DATESTAMP | 2 +- gcc/doc/invoke.texi | 5 +++++ 3 files changed, 15 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allnoconfig updated (b0602c57b -> 5a1335d59)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards b0602c57b 0: update: binutils-gcc-linux: all new 5a1335d59 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b0602c57b) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-st [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 175 +- 02-prepare_abe/console.log | 435 +- 03-build_abe-binutils/console.log | 11460 ++++++------- 04-build_abe-stage1/console.log | 20298 +++++++++++----------- 05-build_linux/console.log | 766 +- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 14 +- 08-update_baseline/console.log | 12 +- console.log | 33360 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- regressions.txt | 4 +- 11 files changed, 33347 insertions(+), 33191 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig updated (a3aebd3c8 -> 642204b2d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig in repository toolchain/ci/base-artifacts. discards a3aebd3c8 0: update: binutils-gcc-linux: boot new 642204b2d 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a3aebd3c8) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 106 +- 02-prepare_abe/console.log | 430 +- 03-build_abe-binutils/console.log | 11511 ++++++++-------- 04-build_abe-stage1/console.log | 13579 +++++++++--------- 05-build_linux/console.log | 726 +- 06-boot_linux/console.log | 386 +- 07-check_regression/console.log | 20 +- 08-update_baseline/console.log | 69 +- console.log | 26827 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- regressions.txt | 4 +- 11 files changed, 26757 insertions(+), 26913 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allnoconfig updated (d01cb80e0fb -> bf061b9a5f7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allnoconfig in repository toolchain/ci/gcc. from d01cb80e0fb rs6000: Check -+0 and NaN for smax/smin generation adds 337111a2349 doc: Note that some warnings depend on optimizations (PR 92757) adds bf061b9a5f7 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 9 +++++++++ gcc/DATESTAMP | 2 +- gcc/doc/invoke.texi | 5 +++++ 3 files changed, 15 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allnoconfig updated (78a929fda -> 8592dd348)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards 78a929fda 0: update: binutils-gcc-linux: all new 8592dd348 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (78a929fda) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 418 +- 03-build_abe-binutils/console.log | 11274 ++++++------- 04-build_abe-stage1/console.log | 17877 +++++++++++---------- 05-build_linux/console.log | 640 +- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 8 +- 08-update_baseline/console.log | 8 +- console.log | 30355 ++++++++++++++++++------------------ jenkins/manifest.sh | 8 +- regressions.txt | 2 +- 11 files changed, 30337 insertions(+), 30383 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig updated (5076190daded -> 6c90b86a745a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig in repository toolchain/ci/linux. from 5076190daded mm: slub: be more careful about the double cmpxchg of freelist adds dcf23ac3e846 locks: reinstate locks_delete_block optimization adds 5d892919fdd0 rtc: max8907: add missing select REGMAP_IRQ adds 46b7c49254f8 kbuild: Fix inconsistent comment adds 8cc4fd73501d kconfig: introduce m32-flag and m64-flag adds 3a7c733165a4 int128: fix __uint128_t compiler test in Kconfig adds 2eebb7abefb9 kbuild: doc: fix references to other documents adds 82f2bc2fcc01 kbuild: Disable -Wpointer-to-enum-cast adds 5190044c2965 modpost: move the namespace field in Module.symvers last adds 785d74ec3bbf initramfs: restore default compression behavior adds 4b8a5cfb5fd3 modpost: Get proper section index by get_secindex() instea [...] adds 7883a1433929 scripts/kallsyms: fix wrong kallsyms_relative_base adds 207f75c4543f Merge tag 'kbuild-fixes-v5.6-3' of git://git.kernel.org/pu [...] adds 39946886fc86 cifs: potential unintitliazed error code in cifs_getattr() adds 1be1fa42ebb7 CIFS: Increment num_remote_opens stats counter even in cas [...] adds 979a2665eb6c CIFS: fiemap: do not return EINVAL if get nothing adds cd607737f3b8 Merge tag '5.6-rc6-smb3-fixes' of git://git.samba.org/sfre [...] adds 84d49b3d08a1 mmc: sdhci-acpi: Switch signal voltage back to 3.3V on sus [...] adds 3397b251ea02 mmc: sdhci-acpi: Disable write protect detection on Acer A [...] adds 18b587b45c13 mmc: sdhci-cadence: set SDHCI_QUIRK2_PRESET_VALUE_BROKEN f [...] adds 53dd0a7cd65e mmc: sdhci-of-at91: fix cd-gpios for SAMA5D2 adds 4686392c3236 mmc: rtsx_pci: Fix support for speed-modes that relies on tuning adds 6c90b86a745a Merge tag 'mmc-v5.6-rc6' of git://git.kernel.org/pub/scm/l [...] No new revisions were added by this update. Summary of changes: Documentation/kbuild/kbuild.rst | 2 +- Documentation/kbuild/kconfig-macro-language.rst | 2 +- Documentation/kbuild/makefiles.rst | 6 +- Documentation/kbuild/modules.rst | 4 +- Makefile | 2 +- drivers/misc/cardreader/rts5227.c | 2 +- drivers/misc/cardreader/rts5249.c | 2 + drivers/misc/cardreader/rts5260.c | 2 +- drivers/misc/cardreader/rts5261.c | 2 +- drivers/mmc/host/rtsx_pci_sdmmc.c | 13 ++-- drivers/mmc/host/sdhci-acpi.c | 84 ++++++++++++++++++++++++- drivers/mmc/host/sdhci-cadence.c | 18 +++++- drivers/mmc/host/sdhci-of-at91.c | 8 ++- drivers/rtc/Kconfig | 1 + fs/cifs/file.c | 3 +- fs/cifs/inode.c | 2 +- fs/cifs/smb2ops.c | 4 +- fs/locks.c | 54 ++++++++++++++-- init/Kconfig | 3 +- scripts/Kconfig.include | 7 +++ scripts/Makefile.extrawarn | 1 + scripts/export_report.pl | 2 +- scripts/kallsyms.c | 8 +-- scripts/mod/modpost.c | 27 ++++---- usr/Kconfig | 22 +++---- 25 files changed, 219 insertions(+), 62 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig updated (accf06feb1d -> ece6cf0fa56)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig in repository toolchain/ci/llvm-project. from accf06feb1d Test commit. adds 9c69cc109bc [obj2yaml] - SHT_REL*, SHT_DYNAMIC sections: add tests to d [...] adds 44361782e2c [lldb] fix typo in comment for lldbtest.py adds 55b92dcb35a [clangd] Fix elog message when preamble build fails. adds cf1f8f9bec2 [OPENMP][DOCS]Update list of constructs and status, NFC. adds a02b38698b4 [obj2yaml] - SHT_DYNAMIC and SHT_REL* sections: stop dumpin [...] adds fecce903db2 [obj2yaml][test] - Update test after output change. adds 5d67fb3eccc [AST][NFCi] Make CXXBasePaths::Origin const adds 06c810b1559 [PowerPC][AIX] Simplify the check prefixes in the ByVal lit [...] adds 6cff2e9f788 [Analyzer] Bugfix for CheckerRegistry adds 0dd0b1017c8 [Parser] Avoid spurious 'missing template' error in presenc [...] adds d0fb6879c37 [NFC][ARM] Add two tests adds e154cbb124a [lldb/testsuite] XFail TestBuiltinTrap.py not only on linux adds ecc6c426977 [lldb/testsuite] Fix TestInlineStepping on arm64 with newer [...] adds 8758d02074b [lldb/testsuite] Skip part of TestProcessCrashInfo.py on Da [...] adds 99a0cbb4232 [lldb/Test] Remove debug print in supports_hw_breakpoints. adds d4d62fcab66 [MLIR] Add test for multiple gpu.all_reduce in the same ker [...] adds 433897da4ab [InstCombine][X86] simplifyX86immShift - convert variable i [...] adds 27ef7c6bf08 [NFC][ARM] Fix for buildbots adds 76a5451a524 [lldb/testsuite] un-XFail TestInlineStepping.py on linux an [...] adds 5e6e545cbab [test] Re-enable accidentally disabled X86 tests adds c13aa36bb7d [X86] Attempt to more accurately model the cost of a bool r [...] adds 88bf9b3d26f [Syntax] Build template declaration nodes adds 5ade17e0ca8 [libc++] Use builtin type traits whenever possible adds 50f19853536 [lldb][NFC] Delete the original UserExpression before tryin [...] adds 74494d9992b [libc++] Don't use __is_fundamental in C++03 mode adds 7b2442584e4 Reland [lldb] Fix string summary of an empty NSPathStore2 adds 56da41393df [SDAG] reduce code duplication in getNegatedExpression(); NFCI adds cd34c0570b5 [ORC] Bail out early if a replacement MaterializationUnit i [...] adds a7b8393ffea [ORC] Don't waste time building empty replacement Materiali [...] adds eb918d8daf1 [ORC] Use finer-grained and session locking in MachOPlatfor [...] adds ad2da631bf3 [ORC] Fix indentation in debugging output. adds 54aec178dac [ORC] Don't use a platform mutex for LLJIT's GenericLLVMIRP [...] adds 018dde4ce57 [AArch64][SVE] Add support for DestructiveBinaryImm Destruc [...] adds 9e2207a00bd [libc++] fix non-builtin is_void implementation adds a11e5b32dfb [InstCombine][X86] simplifyX86immShift - handle variable ou [...] adds c31ee83abb0 Add Builder::get{I32,I64}TensorAttr. adds 90308a4da16 [debugserver] Implement hardware breakpoints for ARM64 adds a983562b234 Precommit test for clang::CallGraph declared functions. adds c2586cab89f [InstCombine][X86] Tests for variable but in-range vector-b [...] adds 0cc2d237516 [Matrix] Hoist load/store generation logic, add helpers for [...] adds 430c9a80c17 [Hexagon] Enable linux #defines adds 30bb113beb3 [AMDGPU][NFC] Refactor emitEntryFunctionPrologue adds db099f994b5 [AMDGPU][NFC] Refactor some uses of unsigned to Register adds 60b1967c393 [AMDGPU] Add Scratch Wave Offset to Scratch Buffer Descript [...] adds 0e9368cc8ca [AMDGPU] Move frame pointer from s34 to s33 adds b20ab412bf8 Teach TreeTransform to substitute into resolved TemplateArguments. adds e23d7865269 [JumpThreading] Fix infinite loop (PR44611) adds 796fb2e4749 [Matrix] Move multiply-add code generation into separate fu [...] adds c985b244ee1 [MSan] Simulate OOM in mmap_interceptor() adds 1db8b341a66 [Matrix] Fold single-use variable into assert adds b4f02d89e5d [AST] Make Expr::setDependence protected and remove add/rem [...] adds b89202e842a [clangd] Do not trigger go-to-def textual fallback inside s [...] adds f87563661d6 [MC][ARM] add implicit immediate form for ldrsbt/ldrht/ldrsht adds 95b6f62efb1 [InstSimplify] Add some vector shift tests to show lack of [...] adds 8a8778f25f1 [CMake] Enable the use of -ffile-prefix-map adds 98223f7931f [Fuchsia] Use -ffile-prefix-map adds d6fc61b7e8b [profile] Record the profile size as a property of the VMO adds 39253a50f0f [ORC] Re-apply 98f2bb44610, enable JITEventListeners in Orc [...] adds 6bc775a1fc1 [MLIR] Interfaces need to used add_mlir_library adds c999084619a [GlobalISel] Port some basic shufflevector undef combines f [...] adds 98ff6eb679c Cleanup the plumbing for DILineInfoSpecifier. [NFC] adds 678da7b109f AMDGPU/GlobalISel: Remove leftover #if 0 adds a3f974f3c33 [WebAssembly] SIMD bitmask intrinsics and builtin functions adds 6343526d640 Revert "Cleanup the plumbing for DILineInfoSpecifier. [NFC]" adds 34db3c3a184 [WebAssembly] SIMD integer abs instructions adds 08670d435bb [WebAssembly] Support swiftself and swifterror for WebAssem [...] adds 09ac859c136 [ELF][test] Make tests less address sensitive and delete re [...] adds 1c153774961 Recommit: CFGDiff: Simplify/common the begin/end implementa [...] adds f7d4bd81443 [MLIR] Fix for out-of-tree builds from install area. adds 4e6c778eca4 [XRay] Record the XRay data size as a property of the VMO adds 011b785505b [ELF] Create readonly PT_LOAD in the presence of a SECTIONS [...] adds 6ef1f3718f3 [sanitizer_coverage][Fuchsia] Set ZX_PROP_VMO_CONTENT_SIZE adds 0ddd04391d2 [MLIR] Fix op folding to not run pre-replace when not const [...] adds fc3752665f4 [RISCV] Passing small data limitation value to RISCV backend adds 032251e34d1 [Coroutines] Fix PR45130 adds a035726e5aa Revert "Generate Callee Saved Register (CSR) related cfi di [...] adds 728b878de68 [AMDGPU] Set the CostPerUse value for vgpr registers. adds 2cbb8c946a6 [AMDGPU] Reuse register during frame index elimination adds 3a8372ed02a [DSE] Support traversing MemoryPhis. adds be86bc76f0c [Matrix] Generalize ColumnMatrixTy to MatrixTy (NFC). adds e9630630ffa [Syntax] Split syntax tests adds 5c10967157d [InstCombine] Don't replace musttail result based on known bits adds 9cf920e64d1 [ARM] Extra MVE float loop tests. NFC adds 03727687766 [InstCombine] Simplify calls with "returned" attribute adds ebb04e9ca93 [NFC][RISCV] Test for 0.0 fp immediate adds 3c24aee7ee8 [RISCV] Select +0.0 immediate using fmv.{w,d}.x / fcvt.d.w adds b3499f572d3 [ARM] Change VDUP type to i32 for MVE adds baa6f6a7828 Revert "[TableGen][GlobalISel] Account for HwMode in Regist [...] adds 180581cfcf5 [clang] Add support for consteval constructors adds 467c4902a10 [lldb] Enable now passing part of TestDataFormatterStdString.py adds 63778bc653a [llvm-readobj][llvm-readelf][test] - Add a test to check ho [...] adds 089cfe113da Improve step over performance adds fd7300f717c [Syntax] Test both the default and windows target platforms [...] adds 86b093d1a18 [llvm-readobj] Allow syms from all sections to match stack [...] adds a09ff56b5b5 [Tests] Regenerate some test checks; NFC adds c1efdbcbe0d [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds 9967352a034 Revert "[Syntax] Test both the default and windows target p [...] adds ce6c95aacae [InstCombine] Move test to instcombine; NFC adds fcba7c3534f [OPENMP50]Initial support for scan directive. adds 7f764fa18f6 [ValueTracking] Add some initial isKnownNonZero DemandedElt [...] adds a4edea29be2 Fix `-Wunused-variable` warning. NFC. adds ece6cf0fa56 [DSE,MSSA] Precommit additional tests for D73763. No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/Preamble.cpp | 2 +- clang-tools-extra/clangd/XRefs.cpp | 12 + clang-tools-extra/clangd/unittests/XRefsTests.cpp | 5 +- clang/cmake/caches/Fuchsia-stage2.cmake | 2 +- clang/docs/ClangCommandLineReference.rst | 6 +- clang/docs/OpenMPSupport.rst | 6 +- clang/include/clang-c/Index.h | 6 +- clang/include/clang/AST/CXXInheritance.h | 6 +- clang/include/clang/AST/Expr.h | 28 +- clang/include/clang/AST/RecursiveASTVisitor.h | 3 + clang/include/clang/AST/StmtOpenMP.h | 57 + clang/include/clang/Basic/BuiltinsWebAssembly.def | 4 + clang/include/clang/Basic/CodeGenOptions.def | 3 + clang/include/clang/Basic/DiagnosticDriverKinds.td | 3 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 9 +- clang/include/clang/Basic/StmtNodes.td | 1 + clang/include/clang/Driver/CC1Options.td | 2 + clang/include/clang/Driver/Options.td | 3 + clang/include/clang/Parse/Parser.h | 18 +- clang/include/clang/Sema/Sema.h | 4 + clang/include/clang/Serialization/ASTBitCodes.h | 1 + .../StaticAnalyzer/Frontend/CheckerRegistry.h | 2 +- clang/include/clang/Tooling/Syntax/Nodes.h | 33 + clang/lib/AST/ComputeDependence.cpp | 20 +- clang/lib/AST/Expr.cpp | 30 +- clang/lib/AST/ExprConcepts.cpp | 4 +- clang/lib/AST/StmtOpenMP.cpp | 21 + clang/lib/AST/StmtPrinter.cpp | 5 + clang/lib/AST/StmtProfile.cpp | 4 + clang/lib/Basic/OpenMPKinds.cpp | 13 + clang/lib/Basic/Targets.cpp | 3 + clang/lib/CodeGen/CGBuiltin.cpp | 8 + clang/lib/CodeGen/CGOpenMPRuntime.cpp | 5 + clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 4 + clang/lib/CodeGen/CGStmt.cpp | 3 + clang/lib/CodeGen/CodeGenModule.cpp | 15 + clang/lib/CodeGen/CodeGenModule.h | 4 + clang/lib/Driver/ToolChains/Clang.cpp | 32 + clang/lib/Frontend/CompilerInvocation.cpp | 2 + clang/lib/Parse/ParseDecl.cpp | 19 +- clang/lib/Parse/ParseDeclCXX.cpp | 42 +- clang/lib/Parse/ParseExpr.cpp | 24 +- clang/lib/Parse/ParseExprCXX.cpp | 150 +- clang/lib/Parse/ParseOpenMP.cpp | 23 +- clang/lib/Parse/ParseStmtAsm.cpp | 20 +- clang/lib/Parse/ParseTemplate.cpp | 46 +- clang/lib/Parse/Parser.cpp | 26 +- clang/lib/Sema/SemaDeclCXX.cpp | 14 +- clang/lib/Sema/SemaExceptionSpec.cpp | 1 + clang/lib/Sema/SemaExpr.cpp | 18 + clang/lib/Sema/SemaInit.cpp | 14 +- clang/lib/Sema/SemaOpenMP.cpp | 36 +- clang/lib/Sema/SemaOverload.cpp | 2 +- clang/lib/Sema/TreeTransform.h | 112 +- clang/lib/Serialization/ASTReaderStmt.cpp | 12 + clang/lib/Serialization/ASTWriterStmt.cpp | 7 + clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 1 + clang/lib/Tooling/Syntax/BuildTree.cpp | 170 +- clang/lib/Tooling/Syntax/Nodes.cpp | 35 + clang/test/Analysis/debug-CallGraph.cpp | 20 +- clang/test/CodeGen/builtins-wasm.c | 18 + clang/test/CodeGen/riscv-sdata-module-flag.c | 48 + clang/test/Driver/riscv-sdata-warning.c | 8 + clang/test/OpenMP/nesting_of_regions.cpp | 374 ++- clang/test/OpenMP/scan_ast_print.cpp | 50 + clang/test/OpenMP/scan_messages.cpp | 164 ++ clang/test/Preprocessor/hexagon-predefines.c | 12 + clang/test/SemaCXX/cxx2a-consteval.cpp | 144 +- .../test/SemaTemplate/dependent-typos-recovery.cpp | 10 + clang/test/SemaTemplate/subst-into-subst.cpp | 34 + clang/tools/libclang/CIndex.cpp | 7 + clang/tools/libclang/CXCursor.cpp | 3 + .../StaticAnalyzer/RegisterCustomCheckersTest.cpp | 60 + clang/unittests/Tooling/Syntax/TreeTest.cpp | 772 ++++-- compiler-rt/lib/msan/msan_interceptors.cpp | 17 +- .../lib/profile/InstrProfilingPlatformFuchsia.c | 5 + .../sanitizer_coverage_fuchsia.cpp | 25 +- compiler-rt/lib/xray/xray_utils.cpp | 4 + libcxx/include/type_traits | 392 ++- .../std/utilities/meta/meta.rel/is_same.pass.cpp | 11 + lld/ELF/ScriptParser.cpp | 6 - lld/test/ELF/arm-force-pi-thunk.s | 2 +- lld/test/ELF/arm-thumb-thunk-v6m.s | 4 +- lld/test/ELF/arm-thunk-linkerscript-dotexpr.s | 2 +- lld/test/ELF/arm-thunk-linkerscript.s | 2 +- lld/test/ELF/linkerscript/absolute-expr.test | 2 +- lld/test/ELF/linkerscript/align-empty.test | 8 +- lld/test/ELF/linkerscript/at-self-reference.s | 63 - lld/test/ELF/linkerscript/at.s | 9 +- lld/test/ELF/linkerscript/at4.s | 5 +- lld/test/ELF/linkerscript/common-assign.s | 8 +- lld/test/ELF/linkerscript/double-bss.test | 6 +- lld/test/ELF/linkerscript/extend-pt-load1.test | 6 +- lld/test/ELF/linkerscript/extend-pt-load2.test | 9 +- lld/test/ELF/linkerscript/extend-pt-load3.test | 7 +- lld/test/ELF/linkerscript/loadaddr.s | 2 +- lld/test/ELF/linkerscript/map-file2.test | 8 +- lld/test/ELF/linkerscript/merge-header-load.s | 5 +- lld/test/ELF/linkerscript/merge-sections-syms.s | 34 +- lld/test/ELF/linkerscript/merge-sections.s | 2 +- lld/test/ELF/linkerscript/noload.s | 53 +- lld/test/ELF/linkerscript/non-alloc.s | 6 +- lld/test/ELF/linkerscript/orphan-align.s | 2 +- lld/test/ELF/linkerscript/overlapping-sections.s | 12 +- lld/test/ELF/linkerscript/overlay.test | 5 +- lld/test/ELF/linkerscript/repsection-symbol.s | 8 +- lld/test/ELF/linkerscript/rosegment.test | 25 +- lld/test/ELF/linkerscript/sections-keep.s | 12 +- lld/test/ELF/linkerscript/sizeofheaders.s | 4 +- lld/test/ELF/linkerscript/symbol-conflict.s | 11 - lld/test/ELF/linkerscript/synthetic-symbols1.test | 18 +- lld/test/ELF/many-alloc-sections.s | 2 +- lldb/include/lldb/DataFormatters/StringPrinter.h | 6 + lldb/packages/Python/lldbsuite/test/lldbtest.py | 2 +- lldb/source/DataFormatters/StringPrinter.cpp | 22 +- lldb/source/Expression/UserExpression.cpp | 4 + .../Plugins/Language/CPlusPlus/LibStdcpp.cpp | 2 + lldb/source/Plugins/Language/ObjC/NSString.cpp | 7 + lldb/source/Target/ThreadPlanStepOverRange.cpp | 4 + .../TestRequireHWBreakpoints.py | 1 - .../nsstring/TestDataFormatterNSString.py | 6 +- .../data-formatter-objc/nsstring/main.m | 2 + .../libstdcpp/string/TestDataFormatterStdString.py | 3 +- .../inline-stepping/TestInlineStepping.py | 3 - .../functionalities/inline-stepping/calling.cpp | 4 +- .../process_crash_info/TestProcessCrashInfo.py | 2 + .../test/API/linux/builtin_trap/TestBuiltinTrap.py | 2 +- .../source/MacOSX/arm64/DNBArchImplARM64.cpp | 132 + .../source/MacOSX/arm64/DNBArchImplARM64.h | 15 +- llvm/cmake/modules/HandleLLVMOptions.cmake | 18 +- llvm/cmake/modules/LLVMExternalProjectUtils.cmake | 1 + llvm/docs/AMDGPUUsage.rst | 220 +- llvm/docs/CMake.rst | 8 + llvm/examples/OrcV2Examples/CMakeLists.txt | 3 +- .../CMakeLists.txt | 16 + .../LLJITWithGDBRegistrationListener.cpp | 109 + .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 7 + .../include/llvm/CodeGen/GlobalISel/RegisterBank.h | 13 +- .../llvm/CodeGen/GlobalISel/RegisterBankInfo.h | 3 +- .../llvm/ExecutionEngine/Orc/MachOPlatform.h | 5 +- .../ExecutionEngine/Orc/RTDyldObjectLinkingLayer.h | 19 +- llvm/include/llvm/ExecutionEngine/RuntimeDyld.h | 27 +- llvm/include/llvm/Frontend/OpenMP/OMPKinds.def | 1 + llvm/include/llvm/IR/CFGDiff.h | 76 +- llvm/include/llvm/IR/IntrinsicsWebAssembly.td | 4 + llvm/include/llvm/Target/GlobalISel/Combine.td | 25 +- llvm/lib/Analysis/ValueTracking.cpp | 100 +- llvm/lib/CodeGen/CFIInstrInserter.cpp | 76 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 13 + llvm/lib/CodeGen/GlobalISel/RegisterBank.cpp | 8 +- llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp | 5 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 122 +- .../ExecutionEngine/Orc/CompileOnDemandLayer.cpp | 10 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 15 +- llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 73 +- llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp | 18 +- .../Orc/RTDyldObjectLinkingLayer.cpp | 70 +- .../ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp | 48 +- .../ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h | 8 +- .../Target/AArch64/AArch64ExpandPseudoInsts.cpp | 5 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 31 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 86 +- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 2 - llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 18 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 41 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 13 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 1 - llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 17 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 358 +-- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 35 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 93 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 24 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 95 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 137 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 5 - llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 8 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 12 + llvm/lib/Target/ARM/ARMInstrInfo.td | 3 + llvm/lib/Target/ARM/ARMInstrMVE.td | 126 +- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 20 + llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 11 + llvm/lib/Target/RISCV/RISCVISelLowering.h | 2 + llvm/lib/Target/RISCV/RISCVInstrInfoD.td | 8 + llvm/lib/Target/RISCV/RISCVInstrInfoF.td | 6 + llvm/lib/Target/RISCV/RISCVRegisterBankInfo.cpp | 4 +- llvm/lib/Target/RISCV/RISCVRegisterBankInfo.h | 2 +- llvm/lib/Target/RISCV/RISCVSubtarget.cpp | 2 +- .../Target/WebAssembly/WebAssemblyAsmPrinter.cpp | 5 +- .../lib/Target/WebAssembly/WebAssemblyFastISel.cpp | 6 + .../WebAssembly/WebAssemblyFixFunctionBitcasts.cpp | 4 + .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 52 +- .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 17 + .../Target/WebAssembly/WebAssemblyMCInstLower.cpp | 3 +- .../WebAssembly/WebAssemblyMachineFunctionInfo.cpp | 29 +- .../WebAssembly/WebAssemblyMachineFunctionInfo.h | 7 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 31 +- llvm/lib/Target/X86/X86FrameLowering.h | 2 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 19 +- llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 5 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 122 +- .../InstCombine/InstructionCombining.cpp | 13 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 163 +- llvm/lib/Transforms/Scalar/JumpThreading.cpp | 12 + .../Transforms/Scalar/LowerMatrixIntrinsics.cpp | 284 ++- llvm/test/Analysis/CostModel/X86/reduce-and.ll | 28 +- llvm/test/Analysis/CostModel/X86/reduce-or.ll | 28 +- .../Analysis/ValueTracking/knownnonzero-shift.ll | 6 +- .../GlobalISel/prelegalizercombiner-undef.mir | 58 + .../AArch64/sve-intrinsics-shifts-merging.ll | 340 +++ .../AMDGPU/GlobalISel/divergent-control-flow.ll | 2 +- .../CodeGen/AMDGPU/GlobalISel/insertelement.ll | 4 +- .../AMDGPU/GlobalISel/inst-select-load-local.mir | 278 ++- .../AMDGPU/GlobalISel/inst-select-load-private.mir | 111 +- .../AMDGPU/GlobalISel/inst-select-store-local.mir | 224 +- .../GlobalISel/inst-select-store-private.mir | 383 ++- llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll | 20 +- llvm/test/CodeGen/AMDGPU/addrspacecast.ll | 4 +- llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll | 20 +- llvm/test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll | 4 +- llvm/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll | 4 +- llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll | 10 +- llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll | 350 --- llvm/test/CodeGen/AMDGPU/call-argument-types.ll | 74 +- llvm/test/CodeGen/AMDGPU/call-constant.ll | 6 +- .../CodeGen/AMDGPU/call-graph-register-usage.ll | 18 +- .../CodeGen/AMDGPU/call-preserved-registers.ll | 45 +- llvm/test/CodeGen/AMDGPU/call-waitcnt.ll | 37 +- llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll | 94 +- .../AMDGPU/callee-special-input-sgprs-fixed-abi.ll | 3 +- .../CodeGen/AMDGPU/callee-special-input-sgprs.ll | 44 +- .../CodeGen/AMDGPU/callee-special-input-vgprs.ll | 50 +- llvm/test/CodeGen/AMDGPU/captured-frame-index.ll | 36 +- llvm/test/CodeGen/AMDGPU/cc-update.ll | 422 ++++ llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll | 12 +- llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll | 28 +- llvm/test/CodeGen/AMDGPU/collapse-endcf.ll | 2 +- .../CodeGen/AMDGPU/control-flow-fastregalloc.ll | 64 +- .../AMDGPU/cross-block-use-is-not-abi-copy.ll | 38 +- llvm/test/CodeGen/AMDGPU/extload-private.ll | 8 +- .../AMDGPU/fast-unaligned-load-store.private.ll | 77 +- llvm/test/CodeGen/AMDGPU/fold-fi-mubuf.mir | 197 +- .../test/CodeGen/AMDGPU/frame-index-elimination.ll | 73 +- .../AMDGPU/frame-lowering-entry-all-sgpr-used.mir | 1 - .../CodeGen/AMDGPU/frame-lowering-fp-adjusted.mir | 3 +- llvm/test/CodeGen/AMDGPU/function-returns.ll | 202 +- .../AMDGPU/hsa-metadata-kernel-code-props-v3.ll | 8 +- .../AMDGPU/hsa-metadata-kernel-code-props.ll | 6 +- llvm/test/CodeGen/AMDGPU/idot8s.ll | 2277 ++++++++--------- llvm/test/CodeGen/AMDGPU/idot8u.ll | 2572 ++++++++++---------- .../CodeGen/AMDGPU/indirect-addressing-term.ll | 104 +- llvm/test/CodeGen/AMDGPU/indirect-call.ll | 14 +- llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 48 +- llvm/test/CodeGen/AMDGPU/ipra.ll | 2 +- llvm/test/CodeGen/AMDGPU/large-alloca-compute.ll | 4 +- llvm/test/CodeGen/AMDGPU/large-alloca-graphics.ll | 42 +- .../AMDGPU/llvm.amdgcn.implicit.buffer.ptr.ll | 4 +- llvm/test/CodeGen/AMDGPU/load-hi16.ll | 20 +- llvm/test/CodeGen/AMDGPU/load-lo16.ll | 36 +- llvm/test/CodeGen/AMDGPU/memory-legalizer-load.ll | 8 +- llvm/test/CodeGen/AMDGPU/memory-legalizer-store.ll | 8 +- llvm/test/CodeGen/AMDGPU/memory_clause.ll | 93 +- llvm/test/CodeGen/AMDGPU/mesa3d.ll | 2 +- llvm/test/CodeGen/AMDGPU/mir-print-dead-csr-fi.mir | 1 - llvm/test/CodeGen/AMDGPU/misched-killflags.mir | 1 - llvm/test/CodeGen/AMDGPU/mubuf-offset-private.ll | 38 +- llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll | 34 +- llvm/test/CodeGen/AMDGPU/nested-calls.ll | 10 +- .../AMDGPU/optimize-exec-masking-pre-ra.mir | 1 - .../CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll | 341 ++- .../CodeGen/AMDGPU/pei-reg-scavenger-position.mir | 14 +- .../CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir | 23 +- .../test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir | 7 +- llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir | 3 - .../CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir | 60 + .../CodeGen/AMDGPU/private-access-no-objects.ll | 14 +- llvm/test/CodeGen/AMDGPU/private-element-size.ll | 224 +- .../rename-independent-subregs-mac-operands.mir | 2 - ...hed-assert-dead-def-subreg-use-other-subreg.mir | 1 - ...d-handleMoveUp-subreg-def-across-subreg-def.mir | 1 - llvm/test/CodeGen/AMDGPU/scratch-buffer.ll | 14 +- llvm/test/CodeGen/AMDGPU/scratch-simple.ll | 49 +- .../CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir | 25 +- llvm/test/CodeGen/AMDGPU/shl_add_ptr.ll | 12 +- llvm/test/CodeGen/AMDGPU/si-spill-sgpr-stack.ll | 3 +- llvm/test/CodeGen/AMDGPU/sibling-call.ll | 22 +- .../test/CodeGen/AMDGPU/sp-too-many-input-sgprs.ll | 102 - llvm/test/CodeGen/AMDGPU/spill-agpr.ll | 16 +- llvm/test/CodeGen/AMDGPU/spill-before-exec.mir | 11 +- .../CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll | 6 +- .../CodeGen/AMDGPU/spill-empty-live-interval.mir | 2 - llvm/test/CodeGen/AMDGPU/spill-m0.ll | 4 +- .../CodeGen/AMDGPU/spill-offset-calculation.ll | 45 +- llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll | 2 +- .../stack-pointer-offset-relative-frameindex.ll | 21 +- llvm/test/CodeGen/AMDGPU/stack-realign-kernel.ll | 36 +- llvm/test/CodeGen/AMDGPU/stack-realign.ll | 58 +- .../AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir | 7 +- llvm/test/CodeGen/AMDGPU/store-hi16.ll | 28 +- .../CodeGen/AMDGPU/subreg-split-live-in-error.mir | 1 - llvm/test/CodeGen/AMDGPU/subvector-test.mir | 1 - .../AMDGPU/vgpr-spill-emergency-stack-slot.ll | 6 +- .../AMDGPU/virtregrewrite-undef-identity-copy.mir | 1 - llvm/test/CodeGen/AMDGPU/wave32.ll | 6 +- llvm/test/CodeGen/AMDGPU/wqm.ll | 4 +- llvm/test/CodeGen/AMDGPU/wwm-reserved.ll | 8 +- llvm/test/CodeGen/ARM/indvar-cost.ll | 514 ++++ llvm/test/CodeGen/ARM/indvar-unroll-imm-cost.ll | 578 +++++ .../MIR/AMDGPU/machine-function-info-no-ir.mir | 16 - .../CodeGen/MIR/AMDGPU/machine-function-info.ll | 18 +- .../mfi-parse-error-scratch-wave-offset-reg.mir | 12 - .../AMDGPU/mfi-scratch-wave-offset-reg-class.mir | 13 - .../MIR/AMDGPU/parse-order-reserved-regs.mir | 2 - llvm/test/CodeGen/PowerPC/aix-cc-byval.ll | 128 +- llvm/test/CodeGen/PowerPC/aix64-cc-byval.ll | 139 +- llvm/test/CodeGen/RISCV/double-arith.ll | 56 +- llvm/test/CodeGen/RISCV/float-arith.ll | 88 +- llvm/test/CodeGen/RISCV/float-br-fcmp.ll | 8 +- llvm/test/CodeGen/RISCV/fp-imm.ll | 116 + llvm/test/CodeGen/Thumb2/mve-float16regloops.ll | 1491 ++++++++++++ llvm/test/CodeGen/Thumb2/mve-float32regloops.ll | 1418 +++++++++++ llvm/test/CodeGen/Thumb2/mve-fmas.ll | 10 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/dup.ll | 8 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/ternary.ll | 16 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vaddq.ll | 8 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vmulq.ll | 6 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vsubq.ll | 8 +- llvm/test/CodeGen/Thumb2/mve-pred-threshold.ll | 14 +- llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll | 56 +- llvm/test/CodeGen/Thumb2/mve-vdup.ll | 2 +- llvm/test/CodeGen/Thumb2/mve-vldst4.ll | 2 +- llvm/test/CodeGen/WebAssembly/simd-arith.ll | 36 + llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll | 30 + llvm/test/CodeGen/WebAssembly/swiftcc.ll | 46 + llvm/test/CodeGen/X86/cfi-epilogue-with-return.mir | 48 - .../CodeGen/X86/cfi-epilogue-without-return.mir | 53 - .../X86/cfi-inserter-callee-save-register.mir | 34 - .../X86/cfi-inserter-verify-inconsistent-csr.mir | 28 - llvm/test/DebugInfo/AMDGPU/variable-locations.ll | 2 +- llvm/test/DebugInfo/X86/arange.ll | 1 - llvm/test/DebugInfo/X86/arguments.ll | 1 - llvm/test/DebugInfo/X86/c-type-units.ll | 1 - llvm/test/DebugInfo/X86/debug-loc-frame.ll | 1 - llvm/test/DebugInfo/X86/debug-names-ir-disabled.ll | 1 - llvm/test/DebugInfo/X86/debug-names-partial.ll | 1 - llvm/test/DebugInfo/X86/debug-names-split-dwarf.ll | 1 - llvm/test/DebugInfo/X86/decl-derived-member.ll | 1 - .../DebugInfo/X86/dwarf-callsite-related-attrs.ll | 1 - llvm/test/DebugInfo/X86/generate-odr-hash.ll | 1 - llvm/test/DebugInfo/X86/ghost-sdnode-dbgvalues.ll | 1 - llvm/test/DebugInfo/X86/inline-member-function.ll | 1 - llvm/test/DebugInfo/X86/lexical_block.ll | 1 - llvm/test/DebugInfo/X86/missing-file-line.ll | 1 - llvm/test/DebugInfo/X86/nodebug.ll | 1 - llvm/test/DebugInfo/X86/nodebug_with_debug_loc.ll | 1 - llvm/test/DebugInfo/X86/parameters.ll | 1 - llvm/test/DebugInfo/X86/rematerialize.ll | 1 - .../DebugInfo/X86/string-offsets-multiple-cus.ll | 1 - .../DebugInfo/X86/string-offsets-table-order.ll | 1 - llvm/test/DebugInfo/X86/string-offsets-table.ll | 1 - llvm/test/DebugInfo/X86/template.ll | 1 - llvm/test/DebugInfo/X86/tu-to-non-named-type.ll | 1 - .../DebugInfo/X86/type_units_with_addresses.ll | 1 - llvm/test/MC/ARM/arm-memory-instructions.s | 6 + llvm/test/MC/WebAssembly/simd-encodings.s | 18 + .../Object/AArch64/yaml2obj-elf-aarch64-rel.yaml | 1 - llvm/test/Object/obj2yaml.test | 3 - llvm/test/Transforms/Coroutines/no-suspend.ll | 52 + .../MSSA/memset-unknown-sizes.ll | 71 + .../MSSA/multiblock-exceptions.ll | 1 - .../DeadStoreElimination/MSSA/multiblock-loops.ll | 39 +- .../MSSA/multiblock-memoryphis.ll | 41 +- .../MSSA/multiblock-multipath.ll | 76 + .../MSSA/multiblock-overlap.ll | 112 + .../DeadStoreElimination/MSSA/multiblock-simple.ll | 105 +- llvm/test/Transforms/GVN/PRE/volatile.ll | 143 +- .../InstCombine/X86/x86-vector-shifts.ll | 159 +- llvm/test/Transforms/InstCombine/align-attr.ll | 2 +- llvm/test/Transforms/InstCombine/call-returned.ll | 51 + .../Transforms/InstCombine/expensive-combines.ll | 2 +- .../test/Transforms/InstCombine/fortify-folding.ll | 4 +- .../InstCombine}/known-signbit-shift.ll | 19 +- llvm/test/Transforms/InstCombine/strcpy_chk-1.ll | 2 +- llvm/test/Transforms/InstCombine/strncpy_chk-1.ll | 2 +- llvm/test/Transforms/InstCombine/unused-nonnull.ll | 9 +- llvm/test/Transforms/InstSimplify/assume.ll | 6 +- llvm/test/Transforms/InstSimplify/call.ll | 4 + llvm/test/Transforms/InstSimplify/compare.ll | 42 + .../Transforms/InstSimplify/shift-knownbits.ll | 44 +- .../JumpThreading/PR44611-across-header-hang.ll | 22 + .../llvm-objcopy/ELF/Inputs/partitions.elf.test | 1 - .../test/tools/llvm-readobj/ELF/reloc-addends.test | 155 ++ llvm/test/tools/llvm-readobj/ELF/stack-sizes.test | 73 +- llvm/test/tools/obj2yaml/dynamic-section.test | 21 +- .../test/tools/obj2yaml/elf-ppc64-relocations.yaml | 5 +- .../tools/obj2yaml/elf-reladyn-section-shinfo.yaml | 43 + llvm/test/tools/obj2yaml/no-symbol-reloc.test | 1 - llvm/test/tools/obj2yaml/rel-rela-section.yaml | 24 +- llvm/test/tools/obj2yaml/relocation-type.yaml | 1 - llvm/test/tools/obj2yaml/relr-section.yaml | 34 +- llvm/tools/lli/lli.cpp | 6 + llvm/tools/llvm-readobj/ELFDumper.cpp | 30 +- llvm/tools/obj2yaml/elf2yaml.cpp | 19 +- llvm/utils/TableGen/RegisterBankEmitter.cpp | 64 +- mlir/cmake/modules/MLIRConfig.cmake.in | 4 +- mlir/include/mlir/IR/Builders.h | 7 + mlir/lib/IR/Builders.cpp | 14 + mlir/lib/Interfaces/CMakeLists.txt | 12 +- mlir/lib/Transforms/Utils/FoldUtils.cpp | 14 +- mlir/test/Dialect/GPU/multiple-all-reduce.mlir | 25 + .../test/mlir-cuda-runner/multiple-all-reduce.mlir | 64 + 411 files changed, 16094 insertions(+), 7476 deletions(-) create mode 100644 clang/test/CodeGen/riscv-sdata-module-flag.c create mode 100644 clang/test/Driver/riscv-sdata-warning.c create mode 100644 clang/test/OpenMP/scan_ast_print.cpp create mode 100644 clang/test/OpenMP/scan_messages.cpp create mode 100644 clang/test/SemaTemplate/dependent-typos-recovery.cpp create mode 100644 clang/test/SemaTemplate/subst-into-subst.cpp delete mode 100644 lld/test/ELF/linkerscript/at-self-reference.s delete mode 100644 lld/test/ELF/linkerscript/symbol-conflict.s create mode 100644 llvm/examples/OrcV2Examples/LLJITWithGDBRegistrationListener/CM [...] create mode 100644 llvm/examples/OrcV2Examples/LLJITWithGDBRegistrationListener/LL [...] create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-shifts-merging.ll create mode 100644 llvm/test/CodeGen/AMDGPU/cc-update.ll create mode 100644 llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir delete mode 100644 llvm/test/CodeGen/AMDGPU/sp-too-many-input-sgprs.ll create mode 100644 llvm/test/CodeGen/ARM/indvar-cost.ll create mode 100644 llvm/test/CodeGen/ARM/indvar-unroll-imm-cost.ll delete mode 100644 llvm/test/CodeGen/MIR/AMDGPU/mfi-parse-error-scratch-wave-offse [...] delete mode 100644 llvm/test/CodeGen/MIR/AMDGPU/mfi-scratch-wave-offset-reg-class.mir create mode 100644 llvm/test/CodeGen/RISCV/fp-imm.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-float16regloops.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-float32regloops.ll create mode 100644 llvm/test/CodeGen/WebAssembly/swiftcc.ll delete mode 100644 llvm/test/CodeGen/X86/cfi-epilogue-with-return.mir delete mode 100644 llvm/test/CodeGen/X86/cfi-epilogue-without-return.mir delete mode 100644 llvm/test/CodeGen/X86/cfi-inserter-callee-save-register.mir delete mode 100644 llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-csr.mir create mode 100644 llvm/test/Transforms/DeadStoreElimination/MSSA/memset-unknown-sizes.ll create mode 100644 llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-multipath.ll create mode 100644 llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-overlap.ll create mode 100644 llvm/test/Transforms/InstCombine/call-returned.ll rename llvm/test/{Analysis/ValueTracking => Transforms/InstCombine}/known-signbit- [...] create mode 100644 llvm/test/Transforms/JumpThreading/PR44611-across-header-hang.ll create mode 100644 llvm/test/tools/llvm-readobj/ELF/reloc-addends.test create mode 100644 llvm/test/tools/obj2yaml/elf-reladyn-section-shinfo.yaml create mode 100644 mlir/test/Dialect/GPU/multiple-all-reduce.mlir create mode 100644 mlir/test/mlir-cuda-runner/multiple-all-reduce.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig updated (2f5e3f2d3 -> 0d45b6551)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig in repository toolchain/ci/base-artifacts. discards 2f5e3f2d3 0: update: llvm-linux: 18458 new 0d45b6551 0: update: llvm-linux: 18458 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (2f5e3f2d3) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-build_llvm/console.log | 12800 +++++++++++++++++------------------ 03-build_linux/console.log | 834 +-- 05-check_regression/console.log | 6 +- 06-update_baseline/console.log | 12 +- console.log | 13782 +++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- regressions.txt | 2 +- 8 files changed, 13789 insertions(+), 13789 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig updated (93556fb211fa -> 14cfdbd39e31)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig in repository toolchain/ci/linux. from 93556fb211fa Linux 4.19.111 adds e01975190d7b perf/amd/uncore: Replace manual sampling check with CAP_NO [...] adds 6811f1727af0 mmc: sdhci-omap: Add platform specific reset callback adds 971d17255721 mmc: sdhci-omap: Workaround errata regarding SDR104/HS200 [...] adds 625d0b132e8a mmc: host: Fix Kconfig warnings on keystone_defconfig adds e8faa2c49b86 ACPI: watchdog: Allow disabling WDAT at boot adds 2ca4fec1d0f0 HID: apple: Add support for recent firmware on Magic Keyboards adds 70056047a678 HID: i2c-hid: add Trekstor Surfbook E11B to descriptor override adds 81aebc37d223 cfg80211: check reg_rule for NULL in handle_channel_custom() adds 8343dffacc1b scsi: libfc: free response frame from GPN_ID adds 90d77cff14fe net: usb: qmi_wwan: restore mtu min/max values after raw_i [...] adds a17fcd59a2c8 net: ks8851-ml: Fix IRQ handling and locking adds ebd1b09e8112 mac80211: rx: avoid RCU list traversal under mutex adds 797479da0ae9 signal: avoid double atomic counter increments for user ac [...] adds 851346e59122 slip: not call free_netdev before rtnl_unlock in slip_open adds e78ae0038ee8 hinic: fix a irq affinity bug adds 6bd688f39430 hinic: fix a bug of setting hw_ioctxt adds 71ae5b691490 net: rmnet: fix NULL pointer dereference in rmnet_newlink() adds be0453582577 net: rmnet: fix NULL pointer dereference in rmnet_changelink() adds 5cd211aa255f net: rmnet: fix suspicious RCU usage adds 7111ec0927f1 net: rmnet: remove rcu_read_lock in rmnet_force_unassociat [...] adds 48c5bfbbcec1 net: rmnet: do not allow to change mux id if mux id is duplicated adds 799781649bb5 net: rmnet: use upper/lower device infrastructure adds 8cf81bf8ec15 net: rmnet: fix bridge mode bugs adds 5043d35d3738 net: rmnet: fix packet forwarding in rmnet bridge mode adds 04a244c8e61f sfc: fix timestamp reconstruction at 16-bit rollover points adds b0caab0e619e jbd2: fix data races at struct journal_head adds dd5a14630d81 wimax: i2400: fix memory leak adds dfb827019bcc wimax: i2400: Fix memory leak in i2400m_op_rfkill_sw_toggle adds 3f909e15839c mmc: sdhci-omap: Don't finish_mrq() on a command error dur [...] adds 6bdf6513f330 mmc: sdhci-omap: Fix Tuning procedure for temperatures < -20C adds b600c5a14eb9 driver core: Remove the link if there is no driver with AUTO flag adds 1c89b531db42 driver core: Fix adding device links to probing suppliers adds 1f5102cb6bc9 driver core: Make driver core own stateful device links adds 822e87b74f1e driver core: Add device link flag DL_FLAG_AUTOPROBE_CONSUMER adds 53a895ff19bd driver core: Remove device link creation limitation adds cda3bca05e2c driver core: Fix creation of device links with PM-runtime flags adds bc97a345d975 net: qrtr: fix len of skb_put_padto in qrtr_node_enqueue adds 8cf58ea4abd3 ARM: 8957/1: VDSO: Match ARMv8 timer in cntvct_functional() adds c1a9559a24b0 ARM: 8958/1: rename missed uaccess .fixup section adds 30f6cae72265 mm: slub: add missing TID bump in kmem_cache_alloc_bulk() adds 705d1b54a70a HID: google: add moonball USB id adds a44324b0bdca efi: Fix debugobjects warning on 'efi_rts_work' adds b4176d3b1a82 ipv4: ensure rcu_read_lock() in cipso_v4_error() adds 14cfdbd39e31 Linux 4.19.112 No new revisions were added by this update. Summary of changes: Documentation/admin-guide/kernel-parameters.txt | 4 + Documentation/driver-api/device_link.rst | 63 +++-- Makefile | 2 +- arch/arm/kernel/vdso.c | 2 + arch/arm/lib/copy_from_user.S | 2 +- arch/x86/events/amd/uncore.c | 14 +- drivers/acpi/acpi_watchdog.c | 12 +- drivers/base/core.c | 293 +++++++++++++++------ drivers/base/dd.c | 2 +- drivers/base/power/runtime.c | 4 +- drivers/firmware/efi/runtime-wrappers.c | 2 +- drivers/hid/hid-apple.c | 3 +- drivers/hid/hid-google-hammer.c | 2 + drivers/hid/hid-ids.h | 1 + drivers/hid/i2c-hid/i2c-hid-dmi-quirks.c | 8 + drivers/mmc/host/Kconfig | 2 + drivers/mmc/host/sdhci-omap.c | 148 ++++++++++- drivers/net/ethernet/huawei/hinic/hinic_hw_dev.c | 1 + drivers/net/ethernet/huawei/hinic/hinic_hw_dev.h | 2 +- drivers/net/ethernet/huawei/hinic/hinic_hw_if.h | 1 + drivers/net/ethernet/huawei/hinic/hinic_hw_qp.h | 1 + drivers/net/ethernet/huawei/hinic/hinic_rx.c | 5 +- drivers/net/ethernet/micrel/ks8851_mll.c | 14 +- drivers/net/ethernet/qualcomm/rmnet/rmnet_config.c | 186 +++++++------ drivers/net/ethernet/qualcomm/rmnet/rmnet_config.h | 3 +- .../net/ethernet/qualcomm/rmnet/rmnet_handlers.c | 7 +- drivers/net/ethernet/qualcomm/rmnet/rmnet_vnd.c | 8 - drivers/net/ethernet/qualcomm/rmnet/rmnet_vnd.h | 1 - drivers/net/ethernet/sfc/ptp.c | 38 ++- drivers/net/slip/slip.c | 3 + drivers/net/usb/qmi_wwan.c | 3 + drivers/net/wimax/i2400m/op-rfkill.c | 1 + drivers/scsi/libfc/fc_disc.c | 2 + fs/jbd2/transaction.c | 8 +- include/linux/device.h | 7 +- kernel/signal.c | 23 +- mm/slub.c | 9 + net/ipv4/cipso_ipv4.c | 7 +- net/mac80211/rx.c | 2 +- net/qrtr/qrtr.c | 2 +- net/wireless/reg.c | 2 +- 41 files changed, 645 insertions(+), 255 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

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