Tcwg-commits March 2020

tcwg-commits@lists.linaro.org

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11017 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (222b470 -> 39a0871)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards 222b470 0: update: llvm-linux: 16 new 39a0871 0: update: llvm-linux: 16 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (222b470) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 182 +- 02-build_llvm/console.log | 12826 +++++++++++++-------------- 03-build_linux/console.log | 842 +- 05-check_regression/console.log | 35 +- 05-check_regression/results.regressions | 11 + 06-update_baseline/console.log | 13 +- 06-update_baseline/results.regressions | 11 + console.log | 13898 +++++++++++++++--------------- jenkins/manifest.sh | 10 +- regressions.txt | 11 - 10 files changed, 13927 insertions(+), 13912 deletions(-) create mode 100644 05-check_regression/results.regressions create mode 100644 06-update_baseline/results.regressions delete mode 100644 regressions.txt -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_ubsan updated (bf061b9a5f7 -> 938de7cbb1c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_ubsan in repository toolchain/ci/gcc. from bf061b9a5f7 Daily bump. adds ecce469d89e Daily bump. adds 938de7cbb1c Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_ubsan updated (3bb76ee -> 7189986)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_ubsan in repository toolchain/ci/base-artifacts. discards 3bb76ee 0: update: gcc-bf061b9a5f77bfda10bd5a82eb6db2cc5a71d271: 1 new 7189986 0: update: gcc-938de7cbb1c7030eb1d9e1972f23b6ae0b913132: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (3bb76ee) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-release-aarch64- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 22 +- 02-prepare_abe/console.log | 402 +- 03-build_abe-bootstrap_ubsan/console.log | 70532 ++++++++++++++-------------- 05-check_regression/console.log | 3 +- 05-check_regression/results.regressions | 11 + 06-update_baseline/console.log | 3 +- 06-update_baseline/results.regressions | 11 + console.log | 70962 ++++++++++++++--------------- jenkins/manifest.sh | 10 +- regressions.txt | 11 - 10 files changed, 70989 insertions(+), 70978 deletions(-) create mode 100644 05-check_regression/results.regressions create mode 100644 06-update_baseline/results.regressions delete mode 100644 regressions.txt -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig updated (140d6245af2 -> a1762f9ceb9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig in repository toolchain/ci/llvm-project. from 140d6245af2 Delete TargetLoweringObjectFile::Ctx adds 71f8b78d897 [AsmPrinter] Simplify AsmPrinter::emitXXStructorList after D61547 adds dbf78ae1287 [LVI] Use SmallDenseMap for getValueFromCondition(); NFC adds e9482ed1942 [mlir] Move several static cl::opts to be pass options instead. adds e74961eee26 [mlir][NFC] Remove Analysis/Passes.h adds e8f5c072f6d [mlir] Move the testing pass for GpuKernelToCubin to the te [...] adds c1bc56bf4f2 [NFC] [PowerPC] Update FMA association test adds a63eaa5449f [SLP] Avoid repeated visitation in getVectorElementSize(); NFC adds d077d678d34 [ValueTracking] Avoid blind cast from Operator to Instruction adds 0105e9cd92b [X86][SSE] Add some additional irregular AVG tests adds 996dc13dc4c [NFC] [PowerPC] Remove unsafe-fp-math in FMA test adds 763871053cc [DAGCombiner] Require nsz for aggressive fma fold adds 830cfda19f7 Utils: Mostly convert memcpy expansion to use Align adds dc81923659c [InstCombine] Remove ExpensiveCombines option adds b76bbcc60db Verifier: Check bswap is supported size adds 2655d1b4578 Remove a dead function. adds b89ae50795d [X86] Remove maximum vector width restriction from combineL [...] adds ca04d0c8fd2 [libc] Add signal adds 314deab9af9 Add Triple::isAMDGPU adds 78957bab551 [NFC] Refactor handling of Xarch option adds 0e1e9b9a811 [libc][NFC] Fix typo in milliseconds adds bb621cac3d4 [mlir] Change include image to be toplevel adds 0f15ace018b [mips] Rename target feature Mips3D => HasMips3D. NFC adds ecc92fd018c [mips] Add HasMips3D to the list of features unsupported by [...] adds 862f120fdb0 [mips] Remove instructions related to "wired paired single" [...] adds dca9e40c0cf [mips] Implement sle/sleu pseudo instructions adds 9bbddfbeaab [mips] Implement sne pseudo instruction adds 2dc4eb08cd9 [mips] Implement .cpadd directive adds 7cfd5de61b8 clang/release notes: s/Subversion/git/ adds f4c67dfa925 [X86] More accurately model the cost of horizontal reductions. adds ea4ec172080 update of the llvm doc: we moved to git adds 006244152d6 [SCCP] Add a few more tests for conditional propagation,XOR. adds 72fd1033ea5 Doc: Links should use https adds 986051749cb doc: use the right url to bugzilla adds e2cb1213745 [X86] Remove maximum vector length limit from combineBasicS [...] adds 5d4c1c00e6b Roll an expression into an assert to remove the need for a [...] adds 0d0b90105f9 Revert "[FIX] Do not copy an llvm::function_ref if it has t [...] adds 56e1c20bfdf [MLIR][NFC] rename ConvertStandardToLLVM, ConvertLoopToStan [...] adds b8737614964 [MLIR][NFC] Move some of the affine transforms / tests to d [...] adds 196b48a2244 [NFC] [PowerPC] Prepare test for FMA negate check adds 5792c2236d5 Add test cases that are addressed by D76010 adds 2ec59a0a40f Buildbot debugging of 0d0b90105f92f6cd9cc7004d565834f442918 [...] adds a1762f9ceb9 [libc] Don't configure test and fuzzer when -DLLVM_INCLUDE_ [...] No new revisions were added by this update. Summary of changes: clang-tools-extra/docs/clang-rename.rst | 2 +- clang/docs/LibASTImporter.rst | 2 +- clang/docs/ReleaseNotes.rst | 2 +- clang/docs/analyzer/checkers.rst | 4 +- clang/include/clang/AST/OpenMPClause.h | 6 +- clang/include/clang/Driver/ToolChain.h | 6 + clang/lib/Driver/ToolChain.cpp | 30 + clang/lib/Driver/ToolChains/Cuda.cpp | 26 +- clang/lib/Driver/ToolChains/Darwin.cpp | 27 +- clang/lib/Driver/ToolChains/HIP.cpp | 26 +- libc/CMakeLists.txt | 6 +- libc/config/linux/api.td | 8 + libc/lib/CMakeLists.txt | 1 + libc/spec/stdc.td | 8 + libc/src/signal/linux/CMakeLists.txt | 12 + libc/src/signal/linux/signal.cpp | 26 + libc/src/signal/signal.h | 22 + libc/test/src/signal/CMakeLists.txt | 15 + libc/test/src/signal/signal_test.cpp | 41 + libc/utils/UnitTest/Test.cpp | 4 +- libc/utils/UnitTest/Test.h | 19 +- libcxx/docs/TestingLibcxx.rst | 2 +- libcxx/docs/UsingLibcxx.rst | 2 +- libcxx/docs/index.rst | 8 +- libunwind/docs/BuildingLibunwind.rst | 4 +- libunwind/docs/index.rst | 8 +- lld/docs/AtomLLD.rst | 2 +- lld/docs/NewLLD.rst | 2 +- lld/docs/design.rst | 2 +- lld/docs/development.rst | 2 +- lld/docs/getting_started.rst | 4 +- lld/docs/index.rst | 2 +- llvm/docs/AMDGPUUsage.rst | 2 +- llvm/docs/AliasAnalysis.rst | 8 +- llvm/docs/CMake.rst | 2 +- llvm/docs/CommandGuide/llvm-lipo.rst | 2 +- llvm/docs/CommandGuide/llvm-objcopy.rst | 2 +- llvm/docs/CommandGuide/llvm-objdump.rst | 2 +- llvm/docs/CommandGuide/llvm-size.rst | 2 +- llvm/docs/CommandGuide/llvm-strings.rst | 2 +- llvm/docs/CommandGuide/llvm-strip.rst | 2 +- llvm/docs/CompileCudaWithLLVM.rst | 14 +- llvm/docs/Docker.rst | 4 +- llvm/docs/FAQ.rst | 8 +- llvm/docs/Frontend/PerformanceTips.rst | 2 +- llvm/docs/GettingStarted.rst | 16 +- llvm/docs/GettingStartedVS.rst | 17 +- llvm/docs/GlobalISel/GMIR.rst | 2 +- llvm/docs/GlobalISel/IRTranslator.rst | 2 +- llvm/docs/GlobalISel/KnownBits.rst | 2 +- .../HistoricalNotes/2007-OriginalClangReadme.txt | 2 +- llvm/docs/HowToCrossCompileLLVM.rst | 4 +- llvm/docs/HowToSetUpLLVMStyleRTTI.rst | 6 +- llvm/docs/HowToSubmitABug.rst | 2 +- llvm/docs/LLVMBuild.txt | 2 +- llvm/docs/LangRef.rst | 6 +- llvm/docs/Lexicon.rst | 2 +- llvm/docs/LibFuzzer.rst | 24 +- llvm/docs/LoopTerminology.rst | 4 +- llvm/docs/MarkdownQuickstartTemplate.md | 2 +- llvm/docs/MergeFunctions.rst | 12 +- llvm/docs/Packaging.rst | 2 +- llvm/docs/ProgrammersManual.rst | 82 +- llvm/docs/Proposals/GitHubMove.rst | 14 +- llvm/docs/README.txt | 6 +- llvm/docs/Reference.rst | 4 +- llvm/docs/ReleaseProcess.rst | 6 +- llvm/docs/SphinxQuickstartTemplate.rst | 2 +- llvm/docs/TableGen/index.rst | 2 +- llvm/docs/TestSuiteGuide.md | 8 +- llvm/docs/TestingGuide.rst | 2 +- llvm/docs/TypeMetadata.rst | 4 +- llvm/docs/UserGuides.rst | 4 +- llvm/docs/Vectorizers.rst | 4 +- llvm/docs/WritingAnLLVMPass.rst | 38 +- llvm/docs/index.rst | 8 +- llvm/docs/tutorial/BuildingAJIT1.rst | 2 +- .../MyFirstLanguageFrontend/LangImpl02.rst | 2 +- .../MyFirstLanguageFrontend/LangImpl03.rst | 6 +- .../MyFirstLanguageFrontend/LangImpl04.rst | 2 +- .../MyFirstLanguageFrontend/LangImpl05.rst | 2 +- .../MyFirstLanguageFrontend/LangImpl08.rst | 2 +- .../MyFirstLanguageFrontend/LangImpl09.rst | 4 +- llvm/docs/tutorial/OCamlLangImpl3.rst | 4 +- llvm/docs/tutorial/OCamlLangImpl5.rst | 2 +- llvm/docs/tutorial/index.rst | 2 +- llvm/include/llvm/ADT/Triple.h | 4 + llvm/include/llvm/TextAPI/MachO/InterfaceFile.h | 5 - .../llvm/Transforms/IPO/PassManagerBuilder.h | 1 - .../llvm/Transforms/InstCombine/InstCombine.h | 16 +- .../llvm/Transforms/Utils/LowerMemIntrinsics.h | 6 +- llvm/lib/Analysis/LazyValueInfo.cpp | 8 +- llvm/lib/Analysis/TargetLibraryInfo.cpp | 6 +- llvm/lib/Analysis/ValueTracking.cpp | 19 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 15 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 3 +- llvm/lib/DebugInfo/CodeView/TypeStreamMerger.cpp | 4 +- llvm/lib/IR/Verifier.cpp | 6 + llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 218 ++++ .../Mips/MCTargetDesc/MipsTargetStreamer.cpp | 18 + llvm/lib/Target/Mips/Mips64InstrInfo.td | 14 + llvm/lib/Target/Mips/MipsInstrFPU.td | 4 +- llvm/lib/Target/Mips/MipsInstrInfo.td | 44 + llvm/lib/Target/Mips/MipsScheduleP5600.td | 5 +- llvm/lib/Target/Mips/MipsSubtarget.h | 1 + llvm/lib/Target/Mips/MipsTargetStreamer.h | 3 + llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 55 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 180 +-- llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 36 +- .../Transforms/InstCombine/InstCombineInternal.h | 7 +- .../InstCombine/InstructionCombining.cpp | 45 +- llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp | 85 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 7 +- llvm/test/Analysis/CostModel/X86/reduce-add.ll | 165 +-- llvm/test/Analysis/CostModel/X86/reduce-and.ll | 199 +--- llvm/test/Analysis/CostModel/X86/reduce-mul.ll | 138 +-- llvm/test/Analysis/CostModel/X86/reduce-or.ll | 199 +--- llvm/test/Analysis/CostModel/X86/reduce-xor.ll | 199 +--- llvm/test/Analysis/CostModel/X86/reduction.ll | 137 ++- .../known-bits-from-operator-constexpr.ll | 15 + llvm/test/CodeGen/AMDGPU/fma-combine.ll | 9 +- llvm/test/CodeGen/AMDGPU/mad-combine.ll | 9 +- llvm/test/CodeGen/PowerPC/fma-assoc.ll | 594 +++++++--- llvm/test/CodeGen/PowerPC/fma-negate.ll | 314 +++++ llvm/test/CodeGen/X86/avg.ll | 391 +++++++ llvm/test/CodeGen/X86/sad.ll | 1221 +++----------------- .../ExecutionEngine/OrcMCJIT/test-global-ctors.ll | 4 +- llvm/test/MC/Mips/cpadd-bad.s | 13 + llvm/test/MC/Mips/cpadd.s | 29 + llvm/test/MC/Mips/macro-sle.s | 31 + llvm/test/MC/Mips/macro-sle64.s | 29 + llvm/test/MC/Mips/macro-sne.s | 27 + llvm/test/Transforms/InstCombine/all-bits-shift.ll | 3 +- llvm/test/Transforms/InstCombine/assume.ll | 3 +- llvm/test/Transforms/InstCombine/call-returned.ll | 3 +- .../Transforms/InstCombine/expensive-combines.ll | 28 - llvm/test/Transforms/InstCombine/known-bits.ll | 3 +- .../Transforms/InstCombine/known-signbit-shift.ll | 3 +- .../InstCombine/out-of-bounds-indexes.ll | 3 +- llvm/test/Transforms/InstCombine/phi-shifts.ll | 3 +- llvm/test/Transforms/InstCombine/pr44541.ll | 2 +- llvm/test/Transforms/InstSimplify/freeze.ll | 254 ++++ llvm/test/Transforms/SCCP/apint-xor.ll | 39 + llvm/test/Transforms/SCCP/conditions-iter-order.ll | 79 ++ llvm/test/Transforms/SCCP/conditions-ranges.ll | 287 +++++ .../SLPVectorizer/X86/reduction_unrolled.ll | 70 +- llvm/test/Verifier/bswap.ll | 53 + mlir/docs/LangRef.md | 2 +- mlir/include/mlir/Analysis/Passes.h | 33 - mlir/include/mlir/Dialect/Affine/Passes.h | 27 +- mlir/include/mlir/InitAllPasses.h | 7 +- mlir/include/mlir/Transforms/Passes.h | 29 - .../GPUToCUDA/ConvertKernelFuncToCubin.cpp | 17 +- mlir/lib/Conversion/LoopToStandard/CMakeLists.txt | 2 +- ...onvertLoopToStandard.cpp => LoopToStandard.cpp} | 2 +- mlir/lib/Conversion/LoopsToGPU/LoopsToGPUPass.cpp | 79 +- mlir/lib/Conversion/StandardToLLVM/CMakeLists.txt | 2 +- ...onvertStandardToLLVM.cpp => StandardToLLVM.cpp} | 2 +- .../Transforms/AffineLoopInvariantCodeMotion.cpp | 2 +- mlir/lib/Dialect/Affine/Transforms/CMakeLists.txt | 4 + .../{ => Dialect/Affine}/Transforms/LoopTiling.cpp | 9 +- .../{ => Dialect/Affine}/Transforms/LoopUnroll.cpp | 3 +- .../Affine}/Transforms/LoopUnrollAndJam.cpp | 3 +- .../Affine/Transforms/SuperVectorize.cpp} | 70 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 8 - mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp | 20 +- mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp | 27 +- mlir/lib/Support/MlirOptMain.cpp | 1 - mlir/lib/Transforms/CMakeLists.txt | 4 - mlir/test/Conversion/LoopsToGPU/imperfect_2D.mlir | 2 +- mlir/test/Conversion/LoopsToGPU/imperfect_3D.mlir | 4 +- mlir/test/Conversion/LoopsToGPU/imperfect_4D.mlir | 4 +- .../Conversion/LoopsToGPU/imperfect_linalg.mlir | 2 +- .../LoopsToGPU/no_blocks_no_threads.mlir | 4 +- .../LoopsToGPU/perfect_1D_setlaunch.mlir | 4 +- mlir/test/Conversion/LoopsToGPU/step_one.mlir | 4 +- mlir/test/Conversion/LoopsToGPU/step_positive.mlir | 2 +- .../Affine/SuperVectorize}/compose_maps.mlir | 2 +- .../Affine/SuperVectorize}/normalize_maps.mlir | 2 +- .../Affine/SuperVectorize}/vector_utils.mlir | 4 +- .../Affine/SuperVectorize}/vectorize_1d.mlir | 2 +- .../Affine/SuperVectorize}/vectorize_2d.mlir | 4 +- .../Affine/SuperVectorize}/vectorize_3d.mlir | 2 +- .../SuperVectorize}/vectorize_outer_loop_2d.mlir | 2 +- .../vectorize_outer_loop_transpose_2d.mlir | 2 +- .../SuperVectorize}/vectorize_transpose_2d.mlir | 2 +- .../Affine}/affine-data-copy.mlir | 0 .../Affine}/affine-loop-invariant-code-motion.mlir | 0 .../Affine}/dma-generate.mlir | 0 .../Affine}/loop-tiling.mlir | 4 +- .../Affine}/parallelism-detection.mlir | 0 .../Affine}/simplify-affine-structures.mlir | 0 .../Affine}/slicing-utils.mlir | 6 +- .../{Transforms => Dialect/Affine}/unroll-jam.mlir | 0 .../{Transforms => Dialect/Affine}/unroll.mlir | 0 mlir/test/Dialect/Linalg/promote.mlir | 2 +- mlir/test/Dialect/Linalg/tile.mlir | 8 +- mlir/test/Dialect/Linalg/tile_conv.mlir | 2 +- mlir/test/Dialect/Linalg/tile_indexed_generic.mlir | 6 +- mlir/test/Dialect/Linalg/tile_parallel.mlir | 8 +- mlir/test/lib/Dialect/Affine/CMakeLists.txt | 2 + .../test/lib/Dialect/Affine/TestAffineDataCopy.cpp | 1 - .../Affine}/TestParallelismDetection.cpp | 2 - .../Affine}/TestVectorizationUtils.cpp | 5 +- mlir/test/lib/Transforms/CMakeLists.txt | 4 +- .../lib/Transforms/TestConvertGPUKernelToCubin.cpp | 34 + mlir/test/lib/Transforms/TestLoopFusion.cpp | 1 - mlir/test/lib/Transforms/TestMemRefBoundCheck.cpp | 5 - .../lib/Transforms/TestMemRefDependenceCheck.cpp | 6 - .../mlir-cpu-runner/linalg_integration_test.mlir | 4 +- mlir/tools/mlir-opt/mlir-opt.cpp | 13 +- mlir/tools/mlir-vulkan-runner/VulkanRuntime.h | 1 - openmp/README.rst | 2 +- polly/docs/TipsAndTricks.rst | 2 +- 215 files changed, 3767 insertions(+), 2829 deletions(-) create mode 100644 libc/src/signal/linux/signal.cpp create mode 100644 libc/src/signal/signal.h create mode 100644 libc/test/src/signal/signal_test.cpp create mode 100644 llvm/test/Analysis/ValueTracking/known-bits-from-operator-constexpr.ll create mode 100644 llvm/test/CodeGen/PowerPC/fma-negate.ll create mode 100644 llvm/test/MC/Mips/cpadd-bad.s create mode 100644 llvm/test/MC/Mips/cpadd.s create mode 100644 llvm/test/MC/Mips/macro-sle.s create mode 100644 llvm/test/MC/Mips/macro-sle64.s create mode 100644 llvm/test/MC/Mips/macro-sne.s delete mode 100644 llvm/test/Transforms/InstCombine/expensive-combines.ll create mode 100644 llvm/test/Transforms/SCCP/apint-xor.ll create mode 100644 llvm/test/Transforms/SCCP/conditions-iter-order.ll create mode 100644 llvm/test/Transforms/SCCP/conditions-ranges.ll create mode 100644 llvm/test/Verifier/bswap.ll delete mode 100644 mlir/include/mlir/Analysis/Passes.h rename mlir/lib/Conversion/LoopToStandard/{ConvertLoopToStandard.cpp => LoopToStan [...] rename mlir/lib/Conversion/StandardToLLVM/{ConvertStandardToLLVM.cpp => StandardTo [...] rename mlir/lib/{ => Dialect/Affine}/Transforms/LoopTiling.cpp (98%) rename mlir/lib/{ => Dialect/Affine}/Transforms/LoopUnroll.cpp (99%) rename mlir/lib/{ => Dialect/Affine}/Transforms/LoopUnrollAndJam.cpp (99%) rename mlir/lib/{Transforms/Vectorize.cpp => Dialect/Affine/Transforms/SuperVector [...] rename mlir/test/{Transforms/Vectorize => Dialect/Affine/SuperVectorize}/compose_m [...] rename mlir/test/{Transforms/Vectorize => Dialect/Affine/SuperVectorize}/normalize [...] rename mlir/test/{Transforms/Vectorize => Dialect/Affine/SuperVectorize}/vector_ut [...] rename mlir/test/{Transforms/Vectorize => Dialect/Affine/SuperVectorize}/vectorize [...] rename mlir/test/{Transforms/Vectorize => Dialect/Affine/SuperVectorize}/vectorize [...] rename mlir/test/{Transforms/Vectorize => Dialect/Affine/SuperVectorize}/vectorize [...] rename mlir/test/{Transforms/Vectorize => Dialect/Affine/SuperVectorize}/vectorize [...] rename mlir/test/{Transforms/Vectorize => Dialect/Affine/SuperVectorize}/vectorize [...] rename mlir/test/{Transforms/Vectorize => Dialect/Affine/SuperVectorize}/vectorize [...] rename mlir/test/{Transforms => Dialect/Affine}/affine-data-copy.mlir (100%) rename mlir/test/{Transforms => Dialect/Affine}/affine-loop-invariant-code-motion. [...] rename mlir/test/{Transforms => Dialect/Affine}/dma-generate.mlir (100%) rename mlir/test/{Transforms => Dialect/Affine}/loop-tiling.mlir (97%) rename mlir/test/{Transforms => Dialect/Affine}/parallelism-detection.mlir (100%) rename mlir/test/{Transforms => Dialect/Affine}/simplify-affine-structures.mlir (100%) rename mlir/test/{Transforms => Dialect/Affine}/slicing-utils.mlir (97%) rename mlir/test/{Transforms => Dialect/Affine}/unroll-jam.mlir (100%) rename mlir/test/{Transforms => Dialect/Affine}/unroll.mlir (100%) rename mlir/test/lib/{Transforms => Dialect/Affine}/TestParallelismDetection.cpp (97%) rename mlir/test/lib/{Transforms => Dialect/Affine}/TestVectorizationUtils.cpp (98%) create mode 100644 mlir/test/lib/Transforms/TestConvertGPUKernelToCubin.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig updated (78bfc89 -> 85cd0a2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig in repository toolchain/ci/base-artifacts. discards 78bfc89 0: update: llvm-linux: boot new 85cd0a2 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (78bfc89) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 182 +- 02-build_llvm/console.log | 12564 ++++++++++++------------ 03-build_linux/console.log | 2126 ++--- 04-boot_linux/console.log | 404 +- 05-check_regression/console.log | 33 +- 05-check_regression/results.regressions | 2 + 06-update_baseline/console.log | 13 +- 06-update_baseline/results.regressions | 2 + console.log | 15322 +++++++++++++++--------------- jenkins/manifest.sh | 10 +- regressions.txt | 2 - 11 files changed, 15333 insertions(+), 15327 deletions(-) create mode 100644 05-check_regression/results.regressions create mode 100644 06-update_baseline/results.regressions delete mode 100644 regressions.txt -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig updated (4a01f7b1e73 -> 6e00d8dcf32)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig in repository toolchain/ci/gcc. from 4a01f7b1e73 d: Fix missing dependencies in depfile for imported files ( [...] adds 88d7d0ce8fa testsuite: Fix lambda-vis.C for targets with user label pre [...] adds 85e10e4f0fa Darwin: Fix i686 bootstrap when the assembler supports GOTO [...] adds fbe60463bb8 d: Generate phony targets for content imported files (PR93038) adds 83aa5aa313a Daily bump. adds 6e00d8dcf32 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 7 +++++++ gcc/DATESTAMP | 2 +- gcc/config/i386/darwin.h | 10 +++++++++ gcc/config/i386/i386.h | 5 ++--- gcc/d/ChangeLog | 6 ++++++ gcc/d/d-lang.cc | 39 ++++++++++++++++------------------- gcc/testsuite/ChangeLog | 10 +++++++++ gcc/testsuite/g++.dg/abi/lambda-vis.C | 12 +++++------ gcc/testsuite/gdc.dg/pr93038b.d | 8 +++++++ 9 files changed, 68 insertions(+), 31 deletions(-) create mode 100644 gcc/testsuite/gdc.dg/pr93038b.d -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig updated (da2efc2050 -> 2957d8d054)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig in repository toolchain/ci/binutils-gdb. from da2efc2050 Automatic date update in version.in adds d1023b5d1e s12z disassembler tidy adds 03704c7704 NS32K arg_bufs uninitialised adds beea5cc1bc ARC: Use of uninitialised value adds 57cb32b3c3 H8300 use of uninitialised value adds c15a8f173e XCOFF64 uninitialised read adds 2957d8d054 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 5 + bfd/coff64-rs6000.c | 4 +- bfd/version.h | 2 +- gas/ChangeLog | 4 + gas/testsuite/gas/s12z/truncated.d | 6 +- opcodes/ChangeLog | 49 ++ opcodes/arc-dis.c | 7 +- opcodes/h8300-dis.c | 34 +- opcodes/ns32k-dis.c | 19 +- opcodes/s12z-dis.c | 14 +- opcodes/s12z-opc.c | 1030 +++++++++++++++++++++++++----------- 11 files changed, 833 insertions(+), 341 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig updated (f77ff63 -> 63815ab)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards f77ff63 0: update: binutils-gcc-linux: boot new 63815ab 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (f77ff63) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-st [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 216 +- 02-prepare_abe/console.log | 236 +- 03-build_abe-binutils/console.log | 11296 +++++----- 04-build_abe-stage1/console.log | 20256 +++++++++-------- 05-build_linux/console.log | 3316 ++- 06-boot_linux/console.log | 418 +- 07-check_regression/console.log | 13 +- 07-check_regression/results.regressions | 3 + 08-update_baseline/console.log | 13 +- 08-update_baseline/results.regressions | 4 + console.log | 35764 +++++++++++++++--------------- jenkins/manifest.sh | 14 +- regressions.txt | 4 - 13 files changed, 35762 insertions(+), 35791 deletions(-) create mode 100644 07-check_regression/results.regressions create mode 100644 08-update_baseline/results.regressions delete mode 100644 regressions.txt -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig updated (b74b991fb8b9 -> 16fbf79b0f83)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig in repository toolchain/ci/linux. from b74b991fb8b9 Merge tag 'block-5.6-20200320' of git://git.kernel.dk/linux-block adds 7d36665a5886 memcg: fix NULL pointer dereference in __mem_cgroup_usage_ [...] adds d41e2f3bd546 mm/hotplug: fix hot remove failure in SPARSEMEM|!VMEMMAP case adds d72520ad004a page-flags: fix a crash at SetPageError(THP_SWAP) adds d397a45fc741 mm, memcg: fix corruption on 64-bit divisor in memory.high [...] adds e26733e0d0ec mm, memcg: throttle allocators based on ancestral memory.high adds 12e967fd8e4e mm: do not allow MADV_PAGEOUT for CoW pages adds 1b53734bd0b2 epoll: fix possible lost wakeup on epoll_ctl() path adds 63886bad904b mm/mmu_notifier: silence PROVE_RCU_LIST warnings adds 0715e6c516f1 mm, slub: prevent kmalloc_node crashes and memory leaks adds 763802b53a42 x86/mm: split vmalloc_sync_all() adds b3c03db67e84 Merge branch 'akpm' (patches from Andrew) adds 236ebc20d9af btrfs: fix log context list corruption after rename whiteo [...] adds d8e6fd5c7991 btrfs: fix removal of raid[56|1c34} incompat flags after r [...] adds 67d584e33e54 Merge tag 'for-5.6-rc6-tag' of git://git.kernel.org/pub/sc [...] adds 16fbf79b0f83 Linux 5.6-rc7 No new revisions were added by this update. Summary of changes: Makefile | 2 +- arch/x86/mm/fault.c | 26 +++++++++++- drivers/acpi/apei/ghes.c | 2 +- fs/btrfs/block-group.c | 4 +- fs/btrfs/inode.c | 4 ++ fs/eventpoll.c | 8 ++-- include/linux/page-flags.h | 2 +- include/linux/vmalloc.h | 5 ++- kernel/notifier.c | 2 +- mm/madvise.c | 12 ++++-- mm/memcontrol.c | 103 +++++++++++++++++++++++++++++---------------- mm/mmu_notifier.c | 27 ++++++++---- mm/nommu.c | 10 +++-- mm/slub.c | 26 ++++++++---- mm/sparse.c | 8 +++- mm/vmalloc.c | 11 +++-- 16 files changed, 171 insertions(+), 81 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig updated (140d6245af2 -> a1762f9ceb9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig in repository toolchain/ci/llvm-project. from 140d6245af2 Delete TargetLoweringObjectFile::Ctx adds 71f8b78d897 [AsmPrinter] Simplify AsmPrinter::emitXXStructorList after D61547 adds dbf78ae1287 [LVI] Use SmallDenseMap for getValueFromCondition(); NFC adds e9482ed1942 [mlir] Move several static cl::opts to be pass options instead. adds e74961eee26 [mlir][NFC] Remove Analysis/Passes.h adds e8f5c072f6d [mlir] Move the testing pass for GpuKernelToCubin to the te [...] adds c1bc56bf4f2 [NFC] [PowerPC] Update FMA association test adds a63eaa5449f [SLP] Avoid repeated visitation in getVectorElementSize(); NFC adds d077d678d34 [ValueTracking] Avoid blind cast from Operator to Instruction adds 0105e9cd92b [X86][SSE] Add some additional irregular AVG tests adds 996dc13dc4c [NFC] [PowerPC] Remove unsafe-fp-math in FMA test adds 763871053cc [DAGCombiner] Require nsz for aggressive fma fold adds 830cfda19f7 Utils: Mostly convert memcpy expansion to use Align adds dc81923659c [InstCombine] Remove ExpensiveCombines option adds b76bbcc60db Verifier: Check bswap is supported size adds 2655d1b4578 Remove a dead function. adds b89ae50795d [X86] Remove maximum vector width restriction from combineL [...] adds ca04d0c8fd2 [libc] Add signal adds 314deab9af9 Add Triple::isAMDGPU adds 78957bab551 [NFC] Refactor handling of Xarch option adds 0e1e9b9a811 [libc][NFC] Fix typo in milliseconds adds bb621cac3d4 [mlir] Change include image to be toplevel adds 0f15ace018b [mips] Rename target feature Mips3D => HasMips3D. NFC adds ecc92fd018c [mips] Add HasMips3D to the list of features unsupported by [...] adds 862f120fdb0 [mips] Remove instructions related to "wired paired single" [...] adds dca9e40c0cf [mips] Implement sle/sleu pseudo instructions adds 9bbddfbeaab [mips] Implement sne pseudo instruction adds 2dc4eb08cd9 [mips] Implement .cpadd directive adds 7cfd5de61b8 clang/release notes: s/Subversion/git/ adds f4c67dfa925 [X86] More accurately model the cost of horizontal reductions. adds ea4ec172080 update of the llvm doc: we moved to git adds 006244152d6 [SCCP] Add a few more tests for conditional propagation,XOR. adds 72fd1033ea5 Doc: Links should use https adds 986051749cb doc: use the right url to bugzilla adds e2cb1213745 [X86] Remove maximum vector length limit from combineBasicS [...] adds 5d4c1c00e6b Roll an expression into an assert to remove the need for a [...] adds 0d0b90105f9 Revert "[FIX] Do not copy an llvm::function_ref if it has t [...] adds 56e1c20bfdf [MLIR][NFC] rename ConvertStandardToLLVM, ConvertLoopToStan [...] adds b8737614964 [MLIR][NFC] Move some of the affine transforms / tests to d [...] adds 196b48a2244 [NFC] [PowerPC] Prepare test for FMA negate check new 5792c2236d5 Add test cases that are addressed by D76010 new 2ec59a0a40f Buildbot debugging of 0d0b90105f92f6cd9cc7004d565834f442918 [...] new a1762f9ceb9 [libc] Don't configure test and fuzzer when -DLLVM_INCLUDE_ [...] The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/docs/clang-rename.rst | 2 +- clang/docs/LibASTImporter.rst | 2 +- clang/docs/ReleaseNotes.rst | 2 +- clang/docs/analyzer/checkers.rst | 4 +- clang/include/clang/AST/OpenMPClause.h | 6 +- clang/include/clang/Driver/ToolChain.h | 6 + clang/lib/Driver/ToolChain.cpp | 30 + clang/lib/Driver/ToolChains/Cuda.cpp | 26 +- clang/lib/Driver/ToolChains/Darwin.cpp | 27 +- clang/lib/Driver/ToolChains/HIP.cpp | 26 +- libc/CMakeLists.txt | 6 +- libc/config/linux/api.td | 8 + libc/lib/CMakeLists.txt | 1 + libc/spec/stdc.td | 8 + libc/src/signal/linux/CMakeLists.txt | 12 + libc/src/signal/linux/signal.cpp | 26 + libc/src/signal/signal.h | 22 + libc/test/src/signal/CMakeLists.txt | 15 + libc/test/src/signal/signal_test.cpp | 41 + libc/utils/UnitTest/Test.cpp | 4 +- libc/utils/UnitTest/Test.h | 19 +- libcxx/docs/TestingLibcxx.rst | 2 +- libcxx/docs/UsingLibcxx.rst | 2 +- libcxx/docs/index.rst | 8 +- libunwind/docs/BuildingLibunwind.rst | 4 +- libunwind/docs/index.rst | 8 +- lld/docs/AtomLLD.rst | 2 +- lld/docs/NewLLD.rst | 2 +- lld/docs/design.rst | 2 +- lld/docs/development.rst | 2 +- lld/docs/getting_started.rst | 4 +- lld/docs/index.rst | 2 +- llvm/docs/AMDGPUUsage.rst | 2 +- llvm/docs/AliasAnalysis.rst | 8 +- llvm/docs/CMake.rst | 2 +- llvm/docs/CommandGuide/llvm-lipo.rst | 2 +- llvm/docs/CommandGuide/llvm-objcopy.rst | 2 +- llvm/docs/CommandGuide/llvm-objdump.rst | 2 +- llvm/docs/CommandGuide/llvm-size.rst | 2 +- llvm/docs/CommandGuide/llvm-strings.rst | 2 +- llvm/docs/CommandGuide/llvm-strip.rst | 2 +- llvm/docs/CompileCudaWithLLVM.rst | 14 +- llvm/docs/Docker.rst | 4 +- llvm/docs/FAQ.rst | 8 +- llvm/docs/Frontend/PerformanceTips.rst | 2 +- llvm/docs/GettingStarted.rst | 16 +- llvm/docs/GettingStartedVS.rst | 17 +- llvm/docs/GlobalISel/GMIR.rst | 2 +- llvm/docs/GlobalISel/IRTranslator.rst | 2 +- llvm/docs/GlobalISel/KnownBits.rst | 2 +- .../HistoricalNotes/2007-OriginalClangReadme.txt | 2 +- llvm/docs/HowToCrossCompileLLVM.rst | 4 +- llvm/docs/HowToSetUpLLVMStyleRTTI.rst | 6 +- llvm/docs/HowToSubmitABug.rst | 2 +- llvm/docs/LLVMBuild.txt | 2 +- llvm/docs/LangRef.rst | 6 +- llvm/docs/Lexicon.rst | 2 +- llvm/docs/LibFuzzer.rst | 24 +- llvm/docs/LoopTerminology.rst | 4 +- llvm/docs/MarkdownQuickstartTemplate.md | 2 +- llvm/docs/MergeFunctions.rst | 12 +- llvm/docs/Packaging.rst | 2 +- llvm/docs/ProgrammersManual.rst | 82 +- llvm/docs/Proposals/GitHubMove.rst | 14 +- llvm/docs/README.txt | 6 +- llvm/docs/Reference.rst | 4 +- llvm/docs/ReleaseProcess.rst | 6 +- llvm/docs/SphinxQuickstartTemplate.rst | 2 +- llvm/docs/TableGen/index.rst | 2 +- llvm/docs/TestSuiteGuide.md | 8 +- llvm/docs/TestingGuide.rst | 2 +- llvm/docs/TypeMetadata.rst | 4 +- llvm/docs/UserGuides.rst | 4 +- llvm/docs/Vectorizers.rst | 4 +- llvm/docs/WritingAnLLVMPass.rst | 38 +- llvm/docs/index.rst | 8 +- llvm/docs/tutorial/BuildingAJIT1.rst | 2 +- .../MyFirstLanguageFrontend/LangImpl02.rst | 2 +- .../MyFirstLanguageFrontend/LangImpl03.rst | 6 +- .../MyFirstLanguageFrontend/LangImpl04.rst | 2 +- .../MyFirstLanguageFrontend/LangImpl05.rst | 2 +- .../MyFirstLanguageFrontend/LangImpl08.rst | 2 +- .../MyFirstLanguageFrontend/LangImpl09.rst | 4 +- llvm/docs/tutorial/OCamlLangImpl3.rst | 4 +- llvm/docs/tutorial/OCamlLangImpl5.rst | 2 +- llvm/docs/tutorial/index.rst | 2 +- llvm/include/llvm/ADT/Triple.h | 4 + llvm/include/llvm/TextAPI/MachO/InterfaceFile.h | 5 - .../llvm/Transforms/IPO/PassManagerBuilder.h | 1 - .../llvm/Transforms/InstCombine/InstCombine.h | 16 +- .../llvm/Transforms/Utils/LowerMemIntrinsics.h | 6 +- llvm/lib/Analysis/LazyValueInfo.cpp | 8 +- llvm/lib/Analysis/TargetLibraryInfo.cpp | 6 +- llvm/lib/Analysis/ValueTracking.cpp | 19 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 15 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 3 +- llvm/lib/DebugInfo/CodeView/TypeStreamMerger.cpp | 4 +- llvm/lib/IR/Verifier.cpp | 6 + llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 218 ++++ .../Mips/MCTargetDesc/MipsTargetStreamer.cpp | 18 + llvm/lib/Target/Mips/Mips64InstrInfo.td | 14 + llvm/lib/Target/Mips/MipsInstrFPU.td | 4 +- llvm/lib/Target/Mips/MipsInstrInfo.td | 44 + llvm/lib/Target/Mips/MipsScheduleP5600.td | 5 +- llvm/lib/Target/Mips/MipsSubtarget.h | 1 + llvm/lib/Target/Mips/MipsTargetStreamer.h | 3 + llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 55 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 180 +-- llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 36 +- .../Transforms/InstCombine/InstCombineInternal.h | 7 +- .../InstCombine/InstructionCombining.cpp | 45 +- llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp | 85 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 7 +- llvm/test/Analysis/CostModel/X86/reduce-add.ll | 165 +-- llvm/test/Analysis/CostModel/X86/reduce-and.ll | 199 +--- llvm/test/Analysis/CostModel/X86/reduce-mul.ll | 138 +-- llvm/test/Analysis/CostModel/X86/reduce-or.ll | 199 +--- llvm/test/Analysis/CostModel/X86/reduce-xor.ll | 199 +--- llvm/test/Analysis/CostModel/X86/reduction.ll | 137 ++- .../known-bits-from-operator-constexpr.ll | 15 + llvm/test/CodeGen/AMDGPU/fma-combine.ll | 9 +- llvm/test/CodeGen/AMDGPU/mad-combine.ll | 9 +- llvm/test/CodeGen/PowerPC/fma-assoc.ll | 594 +++++++--- llvm/test/CodeGen/PowerPC/fma-negate.ll | 314 +++++ llvm/test/CodeGen/X86/avg.ll | 391 +++++++ llvm/test/CodeGen/X86/sad.ll | 1221 +++----------------- .../ExecutionEngine/OrcMCJIT/test-global-ctors.ll | 4 +- llvm/test/MC/Mips/cpadd-bad.s | 13 + llvm/test/MC/Mips/cpadd.s | 29 + llvm/test/MC/Mips/macro-sle.s | 31 + llvm/test/MC/Mips/macro-sle64.s | 29 + llvm/test/MC/Mips/macro-sne.s | 27 + llvm/test/Transforms/InstCombine/all-bits-shift.ll | 3 +- llvm/test/Transforms/InstCombine/assume.ll | 3 +- llvm/test/Transforms/InstCombine/call-returned.ll | 3 +- .../Transforms/InstCombine/expensive-combines.ll | 28 - llvm/test/Transforms/InstCombine/known-bits.ll | 3 +- .../Transforms/InstCombine/known-signbit-shift.ll | 3 +- .../InstCombine/out-of-bounds-indexes.ll | 3 +- llvm/test/Transforms/InstCombine/phi-shifts.ll | 3 +- llvm/test/Transforms/InstCombine/pr44541.ll | 2 +- llvm/test/Transforms/InstSimplify/freeze.ll | 254 ++++ llvm/test/Transforms/SCCP/apint-xor.ll | 39 + llvm/test/Transforms/SCCP/conditions-iter-order.ll | 79 ++ llvm/test/Transforms/SCCP/conditions-ranges.ll | 287 +++++ .../SLPVectorizer/X86/reduction_unrolled.ll | 70 +- llvm/test/Verifier/bswap.ll | 53 + mlir/docs/LangRef.md | 2 +- mlir/include/mlir/Analysis/Passes.h | 33 - mlir/include/mlir/Dialect/Affine/Passes.h | 27 +- mlir/include/mlir/InitAllPasses.h | 7 +- mlir/include/mlir/Transforms/Passes.h | 29 - .../GPUToCUDA/ConvertKernelFuncToCubin.cpp | 17 +- mlir/lib/Conversion/LoopToStandard/CMakeLists.txt | 2 +- ...onvertLoopToStandard.cpp => LoopToStandard.cpp} | 2 +- mlir/lib/Conversion/LoopsToGPU/LoopsToGPUPass.cpp | 79 +- mlir/lib/Conversion/StandardToLLVM/CMakeLists.txt | 2 +- ...onvertStandardToLLVM.cpp => StandardToLLVM.cpp} | 2 +- .../Transforms/AffineLoopInvariantCodeMotion.cpp | 2 +- mlir/lib/Dialect/Affine/Transforms/CMakeLists.txt | 4 + .../{ => Dialect/Affine}/Transforms/LoopTiling.cpp | 9 +- .../{ => Dialect/Affine}/Transforms/LoopUnroll.cpp | 3 +- .../Affine}/Transforms/LoopUnrollAndJam.cpp | 3 +- .../Affine/Transforms/SuperVectorize.cpp} | 70 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 8 - mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp | 20 +- mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp | 27 +- mlir/lib/Support/MlirOptMain.cpp | 1 - mlir/lib/Transforms/CMakeLists.txt | 4 - mlir/test/Conversion/LoopsToGPU/imperfect_2D.mlir | 2 +- mlir/test/Conversion/LoopsToGPU/imperfect_3D.mlir | 4 +- mlir/test/Conversion/LoopsToGPU/imperfect_4D.mlir | 4 +- .../Conversion/LoopsToGPU/imperfect_linalg.mlir | 2 +- .../LoopsToGPU/no_blocks_no_threads.mlir | 4 +- .../LoopsToGPU/perfect_1D_setlaunch.mlir | 4 +- mlir/test/Conversion/LoopsToGPU/step_one.mlir | 4 +- mlir/test/Conversion/LoopsToGPU/step_positive.mlir | 2 +- .../Affine/SuperVectorize}/compose_maps.mlir | 2 +- .../Affine/SuperVectorize}/normalize_maps.mlir | 2 +- .../Affine/SuperVectorize}/vector_utils.mlir | 4 +- .../Affine/SuperVectorize}/vectorize_1d.mlir | 2 +- .../Affine/SuperVectorize}/vectorize_2d.mlir | 4 +- .../Affine/SuperVectorize}/vectorize_3d.mlir | 2 +- .../SuperVectorize}/vectorize_outer_loop_2d.mlir | 2 +- .../vectorize_outer_loop_transpose_2d.mlir | 2 +- .../SuperVectorize}/vectorize_transpose_2d.mlir | 2 +- .../Affine}/affine-data-copy.mlir | 0 .../Affine}/affine-loop-invariant-code-motion.mlir | 0 .../Affine}/dma-generate.mlir | 0 .../Affine}/loop-tiling.mlir | 4 +- .../Affine}/parallelism-detection.mlir | 0 .../Affine}/simplify-affine-structures.mlir | 0 .../Affine}/slicing-utils.mlir | 6 +- .../{Transforms => Dialect/Affine}/unroll-jam.mlir | 0 .../{Transforms => Dialect/Affine}/unroll.mlir | 0 mlir/test/Dialect/Linalg/promote.mlir | 2 +- mlir/test/Dialect/Linalg/tile.mlir | 8 +- mlir/test/Dialect/Linalg/tile_conv.mlir | 2 +- mlir/test/Dialect/Linalg/tile_indexed_generic.mlir | 6 +- mlir/test/Dialect/Linalg/tile_parallel.mlir | 8 +- mlir/test/lib/Dialect/Affine/CMakeLists.txt | 2 + .../test/lib/Dialect/Affine/TestAffineDataCopy.cpp | 1 - .../Affine}/TestParallelismDetection.cpp | 2 - .../Affine}/TestVectorizationUtils.cpp | 5 +- mlir/test/lib/Transforms/CMakeLists.txt | 4 +- .../lib/Transforms/TestConvertGPUKernelToCubin.cpp | 34 + mlir/test/lib/Transforms/TestLoopFusion.cpp | 1 - mlir/test/lib/Transforms/TestMemRefBoundCheck.cpp | 5 - .../lib/Transforms/TestMemRefDependenceCheck.cpp | 6 - .../mlir-cpu-runner/linalg_integration_test.mlir | 4 +- mlir/tools/mlir-opt/mlir-opt.cpp | 13 +- mlir/tools/mlir-vulkan-runner/VulkanRuntime.h | 1 - openmp/README.rst | 2 +- polly/docs/TipsAndTricks.rst | 2 +- 215 files changed, 3767 insertions(+), 2829 deletions(-) create mode 100644 libc/src/signal/linux/signal.cpp create mode 100644 libc/src/signal/signal.h create mode 100644 libc/test/src/signal/signal_test.cpp create mode 100644 llvm/test/Analysis/ValueTracking/known-bits-from-operator-constexpr.ll create mode 100644 llvm/test/CodeGen/PowerPC/fma-negate.ll create mode 100644 llvm/test/MC/Mips/cpadd-bad.s create mode 100644 llvm/test/MC/Mips/cpadd.s create mode 100644 llvm/test/MC/Mips/macro-sle.s create mode 100644 llvm/test/MC/Mips/macro-sle64.s create mode 100644 llvm/test/MC/Mips/macro-sne.s delete mode 100644 llvm/test/Transforms/InstCombine/expensive-combines.ll create mode 100644 llvm/test/Transforms/SCCP/apint-xor.ll create mode 100644 llvm/test/Transforms/SCCP/conditions-iter-order.ll create mode 100644 llvm/test/Transforms/SCCP/conditions-ranges.ll create mode 100644 llvm/test/Verifier/bswap.ll delete mode 100644 mlir/include/mlir/Analysis/Passes.h rename mlir/lib/Conversion/LoopToStandard/{ConvertLoopToStandard.cpp => LoopToStan [...] rename mlir/lib/Conversion/StandardToLLVM/{ConvertStandardToLLVM.cpp => StandardTo [...] rename mlir/lib/{ => Dialect/Affine}/Transforms/LoopTiling.cpp (98%) rename mlir/lib/{ => Dialect/Affine}/Transforms/LoopUnroll.cpp (99%) rename mlir/lib/{ => Dialect/Affine}/Transforms/LoopUnrollAndJam.cpp (99%) rename mlir/lib/{Transforms/Vectorize.cpp => Dialect/Affine/Transforms/SuperVector [...] rename mlir/test/{Transforms/Vectorize => Dialect/Affine/SuperVectorize}/compose_m [...] rename mlir/test/{Transforms/Vectorize => Dialect/Affine/SuperVectorize}/normalize [...] rename mlir/test/{Transforms/Vectorize => Dialect/Affine/SuperVectorize}/vector_ut [...] rename mlir/test/{Transforms/Vectorize => Dialect/Affine/SuperVectorize}/vectorize [...] rename mlir/test/{Transforms/Vectorize => Dialect/Affine/SuperVectorize}/vectorize [...] rename mlir/test/{Transforms/Vectorize => Dialect/Affine/SuperVectorize}/vectorize [...] rename mlir/test/{Transforms/Vectorize => Dialect/Affine/SuperVectorize}/vectorize [...] rename mlir/test/{Transforms/Vectorize => Dialect/Affine/SuperVectorize}/vectorize [...] rename mlir/test/{Transforms/Vectorize => Dialect/Affine/SuperVectorize}/vectorize [...] rename mlir/test/{Transforms => Dialect/Affine}/affine-data-copy.mlir (100%) rename mlir/test/{Transforms => Dialect/Affine}/affine-loop-invariant-code-motion. [...] rename mlir/test/{Transforms => Dialect/Affine}/dma-generate.mlir (100%) rename mlir/test/{Transforms => Dialect/Affine}/loop-tiling.mlir (97%) rename mlir/test/{Transforms => Dialect/Affine}/parallelism-detection.mlir (100%) rename mlir/test/{Transforms => Dialect/Affine}/simplify-affine-structures.mlir (100%) rename mlir/test/{Transforms => Dialect/Affine}/slicing-utils.mlir (97%) rename mlir/test/{Transforms => Dialect/Affine}/unroll-jam.mlir (100%) rename mlir/test/{Transforms => Dialect/Affine}/unroll.mlir (100%) rename mlir/test/lib/{Transforms => Dialect/Affine}/TestParallelismDetection.cpp (97%) rename mlir/test/lib/{Transforms => Dialect/Affine}/TestVectorizationUtils.cpp (98%) create mode 100644 mlir/test/lib/Transforms/TestConvertGPUKernelToCubin.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits March 2020