Tcwg-commits February 2020

tcwg-commits@lists.linaro.org

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[toolchain/ci/interesting-commits] branch linaro-local/ci/tcwg_kernel updated (8e9fe56 -> 6a66794)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel in repository toolchain/ci/interesting-commits. from 8e9fe56 Add regression 2fe4750e8506da0f23ab80390b762b0d44a04fc5 from [...] new 6a66794 Add last-good 322bf2d3446aabdaf5e8887775bd9ced80dbc0f0 from h [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: linux | 1 + 1 file changed, 1 insertion(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (3b70ee27a50 -> 103364b4b23)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/llvm-project. from 3b70ee27a50 [LoopExtractor] Convert LoopExtractor from LoopPass to ModulePass adds 644d56b432b [X86] Recognise ROTLI/ROTRI rotations as faux shuffles adds 3ec6de07e91 Fix signed/unsigned warning. adds 420a5180685 [lldb] [testsuite] TestGdbRemoteLibrariesSvr4Support: Fix s [...] adds 0ea4d18a288 [LLDB] [doc] Update the current status of pkgsrc (NetBSD) building adds 5a285f207e1 [LLDB] [doc] Remove note about libpanel(3) and NetBSD adds 8b37e1e5ac0 [lldb] [doc] Testing: Fix typos adds 74857b4260e [lldb] [doc] Status: Debugserver (remote debugging) is OK now adds a17f03bd939 [VectorCombine] new IR transform pass for partial vector ops adds 628462e30a7 [gn build] Port a17f03bd939 adds 273f638384d [LLDB] [doc] Document NetBSD status and sort OSs alphabetically adds 9d223a0106d [lldb] [doc] Status: Linux: Update the paragraph adds 29621b25346 [X86] Rename matchShuffleAsRotate - matchShuffleAsByteRotat [...] adds 22780731255 [X86][SSE] Add more tests showing failure to lower shuffles [...] adds 0ae119f8356 [X86][XOP] Add XOP target to vXi16/vXi8 shuffle tests adds 4b23a2e8e97 libclc: Move rsqrt implementation to a .cl file adds 85e2fa44c64 libclc/r600: Use target specific builtins to implement rsqr [...] adds dbcc1392b38 [X86] Remove isel patterns that include a vselect/X86select [...] adds dd262222b40 [X86] Use MVT::i32 for the type of a MOV32r0 created in X86 [...] adds e82e17d4d4c [X86] Add lowerShuffleAsBitRotate (PR44379) adds e1cbfecdb86 [X86] Add flag result VT to a MOV32r0 created in X86DAGToDA [...] adds 656d66f5fc5 [X86] Use custom isel for (X86sbb_flag 0, 0) so we can use [...] adds 29e646fe655 [X86] combineConcatVectorOps - combine VROTLI/VROTRI ops adds 6e1770821fb AMDGPU: Fix SI_IF lowering when the save exec reg has termi [...] adds 00115d767f3 AMDGPU: Remove dead kill handling adds f4a38c114e1 AMDGPU/GlobalISel: Look through casts when legalizing vecto [...] adds 2126c70e3a6 AMDGPU/GlobalISel: Don't mis-select vector index on a constant adds 6135f5eda48 GlobalISel: Fix narrowing of G_CTLZ/G_CTTZ adds c437f6c6873 AMDGPU/GlobalISel: Split 64-bit G_CTPOP in RegBankSelect adds 312a9d1b834 GlobalISel: Fix narrowScalar for G_{CTLZ|CTTZ}_ZERO_UNDEF adds 512c03bac44 [DebugInfo] Add a DWARFDataExtractor constructor that takes [...] adds 64f417200e1 [RISCV] Fix incorrect FP base CFI offset for variable argum [...] adds 05d44204fa1 [X86] Use MOVZX instead of MOVSX in f16_to_fp isel patterns. adds f24c43c0c50 [X86] Autogenerate complete checks. NFC adds a0678913898 [clang][codegen] Fix another lifetime emission on alloca on [...] adds ab3da5dd66c Fix `-Wparentheses` warning. NFC. new 06ba969c9dc [X86] Make (insert_vector_elt (v8i16 zerovec), i16 %x, 0) g [...] new d0749cc709d [Attributor][NFC] Use existing constant instead of magic one new 103364b4b23 [Attributor][Tests][NFC] Add more range tests The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang/lib/CodeGen/CGCall.cpp | 8 +- clang/lib/CodeGen/CodeGenFunction.h | 5 +- clang/test/CodeGenCXX/amdgcn-call-with-aggarg.cpp | 19 + libclc/generic/include/clc/math/rsqrt.h | 8 +- libclc/generic/lib/SOURCES | 1 + libclc/generic/lib/math/rsqrt.cl | 23 + libclc/r600/lib/SOURCES | 2 + libclc/r600/lib/math/native_rsqrt.cl | 10 + libclc/r600/lib/math/rsqrt.cl | 23 + lldb/docs/resources/build.rst | 8 - lldb/docs/resources/test.rst | 4 +- lldb/docs/status/releases.rst | 9 +- lldb/docs/status/status.rst | 75 +- .../TestGdbRemoteLibrariesSvr4Support.py | 2 +- .../SymbolFile/DWARF/DWARFDataExtractor.cpp | 3 +- lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 4 +- .../llvm/DebugInfo/DWARF/DWARFDataExtractor.h | 5 + llvm/include/llvm/InitializePasses.h | 1 + llvm/include/llvm/LinkAllPasses.h | 1 + llvm/include/llvm/Transforms/IPO/Attributor.h | 2 +- llvm/include/llvm/Transforms/Vectorize.h | 6 + .../llvm/Transforms/Vectorize/VectorCombine.h | 30 + llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 48 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp | 2 +- llvm/lib/Passes/PassBuilder.cpp | 6 +- llvm/lib/Passes/PassRegistry.def | 1 + llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 1 - llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 1 - llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | 3 - .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 6 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 24 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 41 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 11 - llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 26 +- llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 2 + llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 4 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 67 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 156 +- llvm/lib/Target/X86/X86InstrAVX512.td | 659 +++-- llvm/lib/Target/X86/X86InstrCompiler.td | 16 - llvm/lib/Target/X86/X86InstrSSE.td | 2 +- llvm/lib/Transforms/IPO/OpenMPOpt.cpp | 6 +- llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 8 +- llvm/lib/Transforms/Vectorize/CMakeLists.txt | 1 + llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 160 ++ llvm/lib/Transforms/Vectorize/Vectorize.cpp | 4 +- .../GlobalISel/inst-select-extract-vector-elt.mir | 55 + .../GlobalISel/inst-select-insert-vector-elt.mir | 63 + .../GlobalISel/legalize-extract-vector-elt.mir | 24 +- .../GlobalISel/legalize-insert-vector-elt.mir | 27 +- .../GlobalISel/regbankselect-ctlz-zero-undef.mir | 55 +- .../AMDGPU/GlobalISel/regbankselect-ctpop.mir | 55 +- .../GlobalISel/regbankselect-cttz-zero-undef.mir | 55 +- .../AMDGPU/si-if-lower-user-terminators.mir | 75 + .../CodeGen/Mips/GlobalISel/legalizer/ctlz.mir | 6 +- .../CodeGen/Mips/GlobalISel/legalizer/cttz.mir | 22 +- llvm/test/CodeGen/RISCV/vararg.ll | 8 +- llvm/test/CodeGen/X86/avx512-insert-extract.ll | 8 +- llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll | 166 +- llvm/test/CodeGen/X86/avx512-vec-cmp.ll | 12 +- .../CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll | 196 +- .../CodeGen/X86/avx512vl-intrinsics-upgrade.ll | 226 +- llvm/test/CodeGen/X86/broadcastm-lowering.ll | 14 +- llvm/test/CodeGen/X86/buildvec-insertvec.ll | 8 +- .../CodeGen/X86/fastmath-float-half-conversion.ll | 71 +- llvm/test/CodeGen/X86/half.ll | 28 +- .../CodeGen/X86/merge-consecutive-loads-256.ll | 12 +- llvm/test/CodeGen/X86/pr31088.ll | 12 +- llvm/test/CodeGen/X86/shl-crash-on-legalize.ll | 2 +- llvm/test/CodeGen/X86/vec_cast.ll | 9 +- llvm/test/CodeGen/X86/vec_fp_to_int.ll | 4 +- llvm/test/CodeGen/X86/vector-half-conversions.ll | 436 +-- llvm/test/CodeGen/X86/vector-mulfix-legalize.ll | 8 +- llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll | 377 ++- llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll | 378 ++- llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll | 2783 +++++++++++++++++++- llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll | 1829 ++++++++++++- llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll | 18 + llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll | 35 +- .../X86/vector-shuffle-combining-avx512bwvl.ll | 6 +- .../CodeGen/X86/vector-shuffle-combining-xop.ll | 6 +- .../CodeGen/X86/vector-shuffle-variable-128.ll | 12 +- llvm/test/Other/new-pm-defaults.ll | 4 + llvm/test/Other/new-pm-thinlto-defaults.ll | 4 + .../Other/new-pm-thinlto-postlink-pgo-defaults.ll | 4 + .../new-pm-thinlto-postlink-samplepgo-defaults.ll | 4 + llvm/test/Other/opt-O2-pipeline.ll | 4 + llvm/test/Other/opt-O3-pipeline.ll | 4 + llvm/test/Other/opt-Os-pipeline.ll | 4 + llvm/test/Transforms/Attributor/range.ll | 158 ++ .../Transforms/VectorCombine/X86/extract-cmp.ll | 87 + .../VectorCombine}/X86/lit.local.cfg | 0 llvm/tools/llvm-readobj/DwarfCFIEHPrinter.h | 9 +- .../CodeGen/GlobalISel/LegalizerHelperTest.cpp | 70 + .../llvm/lib/Transforms/Vectorize/BUILD.gn | 1 + 95 files changed, 7695 insertions(+), 1263 deletions(-) create mode 100644 clang/test/CodeGenCXX/amdgcn-call-with-aggarg.cpp create mode 100644 libclc/generic/lib/math/rsqrt.cl create mode 100644 libclc/r600/lib/math/native_rsqrt.cl create mode 100644 libclc/r600/lib/math/rsqrt.cl create mode 100644 llvm/include/llvm/Transforms/Vectorize/VectorCombine.h create mode 100644 llvm/lib/Transforms/Vectorize/VectorCombine.cpp create mode 100644 llvm/test/CodeGen/AMDGPU/si-if-lower-user-terminators.mir create mode 100644 llvm/test/Transforms/VectorCombine/X86/extract-cmp.ll copy llvm/test/{Analysis/CostModel => Transforms/VectorCombine}/X86/lit.local.cfg (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (b67dfd9 -> ae85428)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards b67dfd9 0: update: llvm-linux: 16 new ae85428 0: update: llvm-linux: 16 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b67dfd9) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-build_llvm/console.log | 12629 ++++++++++++++++++----------------- 03-build_linux/console.log | 846 +-- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 32 - console.log | 13675 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 7 files changed, 13638 insertions(+), 13720 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig updated (81958cd6adf -> a5f79f225e6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig in repository toolchain/ci/gcc. from 81958cd6adf c++: Fix ICE during constexpr virtual call evaluation [PR93633] adds dcda050e6c3 libstdc++: Fix BUILTIN-PTR-CMP helpers adds 97a7c229554 libstdc++: Fix non-ASCII characters in comment adds 38660e87f01 libstdc++: Fix names of types in comment adds f4777088c9f Improve splitX passes management adds 8686c4d8451 Fix target selector for pr91333.c adds 04c3a1f2c6e Daily bump. adds a0f6a8cb414 Generalized value pass-through for self-recusive function ( [...] adds a5f79f225e6 Update testcase ChangeLog for PR93203 No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 39 +++++ gcc/DATESTAMP | 2 +- gcc/config/nds32/nds32.c | 2 +- gcc/config/sh/sh.c | 2 +- gcc/ipa-cp.c | 194 +++++++++++++-------- gcc/recog.c | 98 +++++------ gcc/testsuite/ChangeLog | 10 ++ gcc/testsuite/g++.dg/ipa/pr93203.C | 95 ++++++++++ gcc/testsuite/gcc.dg/ipa/ipcp-1.c | 2 +- gcc/testsuite/gcc.target/i386/pr91333.c | 2 +- libstdc++-v3/ChangeLog | 15 ++ libstdc++-v3/include/bits/range_cmp.h | 6 +- libstdc++-v3/include/std/ranges | 4 +- .../20_util/function_objects/range.cmp/equal_to.cc | 9 + .../20_util/function_objects/range.cmp/less.cc | 9 + 15 files changed, 354 insertions(+), 135 deletions(-) create mode 100644 gcc/testsuite/g++.dg/ipa/pr93203.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig updated (2e9276136b -> 33176d912a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig in repository toolchain/ci/binutils-gdb. from 2e9276136b [gdb] Mention CU offset for <artifical> if verbose adds a6740d29a0 Automatic date update in version.in adds e1f85e11f5 z80 comments in archures.c adds 821948744f gas -Z flag adds 33176d912a gas: error for section type, attr, or entsize change No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 5 +++++ bfd/archures.c | 28 +++++++++++++++++++--------- bfd/bfd-in2.h | 30 ++++++++++++++++++++---------- bfd/version.h | 2 +- gas/ChangeLog | 14 ++++++++++++++ gas/config/obj-elf.c | 21 ++++++++++++++++++--- gas/output-file.c | 2 +- gas/testsuite/gas/elf/elf.exp | 2 +- gas/testsuite/gas/elf/section5.l | 9 +++++---- gas/write.c | 2 +- 10 files changed, 85 insertions(+), 30 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig updated (dda1f06 -> 517b34f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards dda1f06 0: update: binutils-gcc-linux: boot new 517b34f 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (dda1f06) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-st [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-prepare_abe/console.log | 438 +- 03-build_abe-binutils/console.log | 14649 +++++++------- 04-build_abe-stage1/console.log | 20173 +++++++++--------- 05-build_linux/console.log | 3346 +-- 06-boot_linux/console.log | 480 +- 07-check_regression/console.log | 10 +- 08-update_baseline/console.log | 10 +- console.log | 39332 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 10 files changed, 39281 insertions(+), 39389 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig updated (3b70ee27a50 -> ab3da5dd66c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig in repository toolchain/ci/llvm-project. from 3b70ee27a50 [LoopExtractor] Convert LoopExtractor from LoopPass to ModulePass adds 644d56b432b [X86] Recognise ROTLI/ROTRI rotations as faux shuffles adds 3ec6de07e91 Fix signed/unsigned warning. adds 420a5180685 [lldb] [testsuite] TestGdbRemoteLibrariesSvr4Support: Fix s [...] adds 0ea4d18a288 [LLDB] [doc] Update the current status of pkgsrc (NetBSD) building adds 5a285f207e1 [LLDB] [doc] Remove note about libpanel(3) and NetBSD adds 8b37e1e5ac0 [lldb] [doc] Testing: Fix typos adds 74857b4260e [lldb] [doc] Status: Debugserver (remote debugging) is OK now adds a17f03bd939 [VectorCombine] new IR transform pass for partial vector ops adds 628462e30a7 [gn build] Port a17f03bd939 adds 273f638384d [LLDB] [doc] Document NetBSD status and sort OSs alphabetically adds 9d223a0106d [lldb] [doc] Status: Linux: Update the paragraph adds 29621b25346 [X86] Rename matchShuffleAsRotate - matchShuffleAsByteRotat [...] adds 22780731255 [X86][SSE] Add more tests showing failure to lower shuffles [...] adds 0ae119f8356 [X86][XOP] Add XOP target to vXi16/vXi8 shuffle tests adds 4b23a2e8e97 libclc: Move rsqrt implementation to a .cl file adds 85e2fa44c64 libclc/r600: Use target specific builtins to implement rsqr [...] adds dbcc1392b38 [X86] Remove isel patterns that include a vselect/X86select [...] adds dd262222b40 [X86] Use MVT::i32 for the type of a MOV32r0 created in X86 [...] adds e82e17d4d4c [X86] Add lowerShuffleAsBitRotate (PR44379) adds e1cbfecdb86 [X86] Add flag result VT to a MOV32r0 created in X86DAGToDA [...] adds 656d66f5fc5 [X86] Use custom isel for (X86sbb_flag 0, 0) so we can use [...] adds 29e646fe655 [X86] combineConcatVectorOps - combine VROTLI/VROTRI ops adds 6e1770821fb AMDGPU: Fix SI_IF lowering when the save exec reg has termi [...] adds 00115d767f3 AMDGPU: Remove dead kill handling adds f4a38c114e1 AMDGPU/GlobalISel: Look through casts when legalizing vecto [...] adds 2126c70e3a6 AMDGPU/GlobalISel: Don't mis-select vector index on a constant adds 6135f5eda48 GlobalISel: Fix narrowing of G_CTLZ/G_CTTZ adds c437f6c6873 AMDGPU/GlobalISel: Split 64-bit G_CTPOP in RegBankSelect adds 312a9d1b834 GlobalISel: Fix narrowScalar for G_{CTLZ|CTTZ}_ZERO_UNDEF adds 512c03bac44 [DebugInfo] Add a DWARFDataExtractor constructor that takes [...] adds 64f417200e1 [RISCV] Fix incorrect FP base CFI offset for variable argum [...] adds 05d44204fa1 [X86] Use MOVZX instead of MOVSX in f16_to_fp isel patterns. adds f24c43c0c50 [X86] Autogenerate complete checks. NFC adds a0678913898 [clang][codegen] Fix another lifetime emission on alloca on [...] adds ab3da5dd66c Fix `-Wparentheses` warning. NFC. No new revisions were added by this update. Summary of changes: clang/lib/CodeGen/CGCall.cpp | 8 +- clang/lib/CodeGen/CodeGenFunction.h | 5 +- clang/test/CodeGenCXX/amdgcn-call-with-aggarg.cpp | 19 + libclc/generic/include/clc/math/rsqrt.h | 8 +- libclc/generic/lib/SOURCES | 1 + libclc/generic/lib/math/rsqrt.cl | 23 + libclc/r600/lib/SOURCES | 2 + libclc/r600/lib/math/native_rsqrt.cl | 10 + libclc/r600/lib/math/rsqrt.cl | 23 + lldb/docs/resources/build.rst | 8 - lldb/docs/resources/test.rst | 4 +- lldb/docs/status/releases.rst | 9 +- lldb/docs/status/status.rst | 75 +- .../TestGdbRemoteLibrariesSvr4Support.py | 2 +- .../SymbolFile/DWARF/DWARFDataExtractor.cpp | 3 +- lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 4 +- .../llvm/DebugInfo/DWARF/DWARFDataExtractor.h | 5 + llvm/include/llvm/InitializePasses.h | 1 + llvm/include/llvm/LinkAllPasses.h | 1 + llvm/include/llvm/Transforms/Vectorize.h | 6 + .../llvm/Transforms/Vectorize/VectorCombine.h | 30 + llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 48 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp | 2 +- llvm/lib/Passes/PassBuilder.cpp | 6 +- llvm/lib/Passes/PassRegistry.def | 1 + llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 1 - llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 1 - llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | 3 - .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 6 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 24 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 41 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 11 - llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 26 +- llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 2 + llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 4 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 67 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 135 +- llvm/lib/Target/X86/X86InstrAVX512.td | 659 +++-- llvm/lib/Target/X86/X86InstrCompiler.td | 16 - llvm/lib/Target/X86/X86InstrSSE.td | 2 +- llvm/lib/Transforms/IPO/OpenMPOpt.cpp | 6 +- llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 8 +- llvm/lib/Transforms/Vectorize/CMakeLists.txt | 1 + llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 160 ++ llvm/lib/Transforms/Vectorize/Vectorize.cpp | 4 +- .../GlobalISel/inst-select-extract-vector-elt.mir | 55 + .../GlobalISel/inst-select-insert-vector-elt.mir | 63 + .../GlobalISel/legalize-extract-vector-elt.mir | 24 +- .../GlobalISel/legalize-insert-vector-elt.mir | 27 +- .../GlobalISel/regbankselect-ctlz-zero-undef.mir | 55 +- .../AMDGPU/GlobalISel/regbankselect-ctpop.mir | 55 +- .../GlobalISel/regbankselect-cttz-zero-undef.mir | 55 +- .../AMDGPU/si-if-lower-user-terminators.mir | 75 + .../CodeGen/Mips/GlobalISel/legalizer/ctlz.mir | 6 +- .../CodeGen/Mips/GlobalISel/legalizer/cttz.mir | 22 +- llvm/test/CodeGen/RISCV/vararg.ll | 8 +- llvm/test/CodeGen/X86/avx512-insert-extract.ll | 8 +- llvm/test/CodeGen/X86/avx512-vec-cmp.ll | 12 +- .../CodeGen/X86/fastmath-float-half-conversion.ll | 71 +- llvm/test/CodeGen/X86/half.ll | 28 +- llvm/test/CodeGen/X86/pr31088.ll | 12 +- llvm/test/CodeGen/X86/shl-crash-on-legalize.ll | 2 +- llvm/test/CodeGen/X86/vec_fp_to_int.ll | 4 +- llvm/test/CodeGen/X86/vector-half-conversions.ll | 436 +-- llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll | 369 ++- llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll | 378 ++- llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll | 2783 +++++++++++++++++++- llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll | 1829 ++++++++++++- llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll | 18 + llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll | 35 +- .../X86/vector-shuffle-combining-avx512bwvl.ll | 6 +- .../CodeGen/X86/vector-shuffle-combining-xop.ll | 6 +- llvm/test/Other/new-pm-defaults.ll | 4 + llvm/test/Other/new-pm-thinlto-defaults.ll | 4 + .../Other/new-pm-thinlto-postlink-pgo-defaults.ll | 4 + .../new-pm-thinlto-postlink-samplepgo-defaults.ll | 4 + llvm/test/Other/opt-O2-pipeline.ll | 4 + llvm/test/Other/opt-O3-pipeline.ll | 4 + llvm/test/Other/opt-Os-pipeline.ll | 4 + .../Transforms/VectorCombine/X86/extract-cmp.ll | 87 + .../VectorCombine}/X86/lit.local.cfg | 0 llvm/tools/llvm-readobj/DwarfCFIEHPrinter.h | 9 +- .../CodeGen/GlobalISel/LegalizerHelperTest.cpp | 70 + .../llvm/lib/Transforms/Vectorize/BUILD.gn | 1 + 84 files changed, 7207 insertions(+), 911 deletions(-) create mode 100644 clang/test/CodeGenCXX/amdgcn-call-with-aggarg.cpp create mode 100644 libclc/generic/lib/math/rsqrt.cl create mode 100644 libclc/r600/lib/math/native_rsqrt.cl create mode 100644 libclc/r600/lib/math/rsqrt.cl create mode 100644 llvm/include/llvm/Transforms/Vectorize/VectorCombine.h create mode 100644 llvm/lib/Transforms/Vectorize/VectorCombine.cpp create mode 100644 llvm/test/CodeGen/AMDGPU/si-if-lower-user-terminators.mir create mode 100644 llvm/test/Transforms/VectorCombine/X86/extract-cmp.ll copy llvm/test/{Analysis/CostModel => Transforms/VectorCombine}/X86/lit.local.cfg (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig updated (53d6285 -> b53e5ad)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig in repository toolchain/ci/base-artifacts. discards 53d6285 0: update: llvm-linux: boot new b53e5ad 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (53d6285) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-build_llvm/console.log | 12743 ++++++++++++++++--------------- 03-build_linux/console.log | 1942 ++--- 04-boot_linux/console.log | 404 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 2 +- console.log | 15221 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 15216 insertions(+), 15234 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig updated (fdfa3a6778b1 -> bb6d3fb354c5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig in repository toolchain/ci/linux. from fdfa3a6778b1 Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linu [...] adds 59365cadfbcd efi/x86: Fix boot regression on systems with invalid memma [...] adds 6ff90aa2cfdd Merge tag 'efi-urgent-2020-02-09' of git://git.kernel.org/ [...] adds f9f21cea3113 genirq: Clarify that irq wake state is orthogonal to enabl [...] adds 926b5dfa6b8d irqchip/gic-v3: Only provision redistributors that are ena [...] adds 656b42deddea irqchip: Some Kconfig cleanup for C-SKY adds 107945227ac5 irqchip/gic-v3-its: Reference to its_invall_cmd descriptor [...] adds e88bd316e597 irqchip/gic-v4.1: Fix programming of GICR_VPROPBASER_4_1_SIZE adds 8b718d403c5c irqchip/gic-v4.1: Set vpe_l1_base for all redistributors adds 4e6437f12d6e irqchip/gic-v4.1: Ensure L2 vPE table is allocated at RD level adds 4bccf1d715fe irqchip/gic-v4.1: Drop 'tmp' in inherit_vpe_l1_table_from_rd() adds b46353250ba3 irqchip/gic-v3-its: Remove superfluous WARN_ON adds 5186a6cc3ef5 irqchip/gic-v3-its: Rename VPENDBASER/VPROPBASER accessors adds 2f86e45a7f42 Merge tag 'irqchip-fixes-5.6-1' of git://git.kernel.org/pu [...] adds f06bed87d7cd Merge tag 'irq-urgent-2020-02-09' of git://git.kernel.org/ [...] adds fcfd73452092 MAINTAINERS: Correct path to time namespace source file adds febac332a819 clocksource: Prevent double add_timer_on() for watchdog_timer adds 2fbc23c73835 Merge tag 'timers-urgent-2020-02-09' of git://git.kernel.o [...] adds 003461559ef7 perf/core: Fix mlock accounting in perf_mmap() adds 07c5972951f0 perf/cgroups: Install cgroup events to correct cpuctx adds f1ec3a517b43 kernel/events: Add a missing prototype for arch_perf_updat [...] adds fdff7c21ea00 Merge branch 'linus' into perf/urgent, to synchronize with [...] adds e884602b57c0 perf parse: Refactor 'struct perf_evsel_config_term' adds 3220fb8d5e59 perf parse: Copy string to perf_evsel_config_term adds 0dd1979f7f99 perf test: Fix test case Merge cpu map adds 0ada120c883d perf: Make perf able to build with latest libbfd adds 1873f1547dde perf probe: Add ustring support for perf probe command adds 85fc95d75970 perf maps: Add missing unlock to maps__insert() error case adds 45f035748b2a Merge tag 'perf-core-for-mingo-5.6-20200201' of git://git. [...] adds ca21b9b37059 Merge tag 'perf-urgent-2020-02-09' of git://git.kernel.org [...] adds 25a3a15417cf smp: Remove superfluous cond_func check in smp_call_functi [...] adds 1e474b28e788 smp/up: Make smp_call_function_single() match SMP semantics adds f41377609a72 Merge tag 'smp-urgent-2020-02-09' of git://git.kernel.org/ [...] adds 979923871f69 x86/timer: Don't skip PIT setup when APIC is disabled or i [...] adds 2b73ea379624 x86/boot: Handle malformed SRAT tables during early ACPI parsing adds 6f1a4891a592 x86/apic/msi: Plug non-maskable MSI affinity race adds 05bd330a7fd8 x86/hyperv: Suspend/resume the hypercall page for hibernation adds 0f378d73d429 x86/apic: Mask IOAPIC entries when disabling the local APIC adds 1a2a76c2685a Merge tag 'x86-urgent-2020-02-09' of git://git.kernel.org/ [...] adds 0fd169576648 fs: Add VirtualBox guest shared folder (vboxsf) support adds 5586c3c1e0eb Merge branch 'work.vboxsf' of git://git.kernel.org/pub/scm [...] adds 0f060936e490 SMB3: Backup intent flag missing from some more ops adds 87f93d82e095 smb3: fix problem with null cifs super block with previous patch adds b0dd940e582b cifs: fail i/o on soft mounts if sessionsetup errors out adds d6fd41905ec5 cifs: log warning message (once) if out of disk space adds f2bf09e97b47 cifs: Add tracepoints for errors on flush or fsync adds 09c40b15351c cifs: fix soft mounts hanging in the reconnect code adds 343a1b777a92 cifs: make multichannel warning more visible adds d26c2ddd3356 cifs: add SMB3 change notification support adds cc95b6772790 cifs: fix channel signing adds e3e056c35108 cifs: fix mode bits from dir listing when mounted with mod [...] adds 2391ca41b476 smb3: add one more dynamic tracepoint missing from strict [...] adds ab3459d8f0ef smb3: print warning once if posix context returned on open adds 51d92d69f77b smb3: Add defines for new information level, FileIdInformation adds d1ea35f4cdd4 Merge tag '5.6-rc-smb3-plugfest-patches' of git://git.samb [...] adds 490d332ea427 irqchip/gic-v4.1: Avoid 64bit division for the sake of 32bit ARM adds 8dcc1a9d90c1 fs: New zonefs file system adds fcb9c24bef3d zonefs: Add documentation adds 380a129eb2c2 Merge tag 'zonefs-5.6-rc1' of git://git.kernel.org/pub/scm [...] adds c8fb7d7e48d1 kconfig: fix broken dependency in randconfig-generated .config adds faa7bdd7e9e1 kbuild: fix the document to use extra-y for vmlinux.lds adds 5f2fb52fac15 kbuild: rename hostprogs-y/always to hostprogs/always-y adds be9f6133f877 scripts/kallsyms: rename local variables in read_symbol() adds 8d60526999aa scripts/kallsyms: change table to store (strcut sym_entry *) adds cde26a6e17ec kallsyms: fix type of kallsyms_token_table[] adds 089b7d890f97 kconfig: Invalidate all symbols after changing to y or m. adds f566e1fbadb6 kbuild: make multiple directory targets work adds 89a47dd1af8f Merge tag 'kbuild-v5.6-2' of git://git.kernel.org/pub/scm/ [...] adds bb6d3fb354c5 Linux 5.6-rc1 No new revisions were added by this update. Summary of changes: Documentation/filesystems/zonefs.txt | 404 ++++++++++ Documentation/kbuild/makefiles.rst | 53 +- Kbuild | 8 +- MAINTAINERS | 18 +- Makefile | 6 +- arch/alpha/boot/Makefile | 2 +- arch/arm/include/asm/arch_gicv3.h | 12 +- arch/arm/vdso/Makefile | 2 +- arch/arm64/include/asm/arch_gicv3.h | 8 +- arch/arm64/kernel/vdso32/Makefile | 4 +- arch/mips/boot/Makefile | 2 +- arch/mips/boot/compressed/Makefile | 4 +- arch/mips/boot/tools/Makefile | 2 +- arch/mips/tools/Makefile | 4 +- arch/mips/vdso/Makefile | 2 +- arch/powerpc/boot/Makefile | 4 +- arch/s390/tools/Makefile | 4 +- arch/sparc/boot/Makefile | 2 +- arch/sparc/vdso/Makefile | 2 +- arch/x86/boot/Makefile | 4 +- arch/x86/boot/compressed/Makefile | 2 +- arch/x86/boot/compressed/acpi.c | 6 + arch/x86/entry/vdso/Makefile | 2 +- arch/x86/hyperv/hv_init.c | 50 ++ arch/x86/include/asm/apic.h | 10 + arch/x86/include/asm/x86_init.h | 2 + arch/x86/kernel/apic/apic.c | 30 +- arch/x86/kernel/apic/msi.c | 128 ++- arch/x86/kernel/time.c | 12 +- arch/x86/kernel/x86_init.c | 1 + arch/x86/platform/efi/efi.c | 2 +- arch/x86/realmode/rm/Makefile | 2 +- arch/x86/tools/Makefile | 4 +- arch/x86/xen/enlighten_pv.c | 1 + drivers/gpu/drm/radeon/Makefile | 2 +- drivers/irqchip/Kconfig | 4 +- drivers/irqchip/irq-gic-v3-its.c | 120 ++- drivers/irqchip/irq-gic-v3.c | 9 +- drivers/tty/vt/Makefile | 2 +- drivers/video/logo/Makefile | 2 +- drivers/zorro/Makefile | 2 +- fs/Kconfig | 2 + fs/Makefile | 2 + fs/cifs/cifs_ioctl.h | 6 + fs/cifs/cifsacl.c | 14 +- fs/cifs/cifsfs.c | 2 +- fs/cifs/cifsglob.h | 8 +- fs/cifs/cifsproto.h | 8 + fs/cifs/cifssmb.c | 2 +- fs/cifs/connect.c | 2 +- fs/cifs/dir.c | 5 +- fs/cifs/file.c | 21 +- fs/cifs/inode.c | 8 +- fs/cifs/ioctl.c | 18 +- fs/cifs/link.c | 18 +- fs/cifs/readdir.c | 3 +- fs/cifs/sess.c | 2 +- fs/cifs/smb1ops.c | 19 +- fs/cifs/smb2inode.c | 9 +- fs/cifs/smb2ops.c | 145 ++-- fs/cifs/smb2pdu.c | 36 +- fs/cifs/smb2pdu.h | 16 + fs/cifs/smb2proto.h | 2 +- fs/cifs/smb2transport.c | 5 +- fs/cifs/trace.h | 27 + fs/unicode/Makefile | 2 +- fs/vboxsf/Kconfig | 10 + fs/vboxsf/Makefile | 5 + fs/vboxsf/dir.c | 427 ++++++++++ fs/vboxsf/file.c | 379 +++++++++ fs/vboxsf/shfl_hostintf.h | 901 +++++++++++++++++++++ fs/vboxsf/super.c | 491 ++++++++++++ fs/vboxsf/utils.c | 551 +++++++++++++ fs/vboxsf/vboxsf_wrappers.c | 371 +++++++++ fs/vboxsf/vfsmod.h | 137 ++++ fs/zonefs/Kconfig | 9 + fs/zonefs/Makefile | 4 + fs/zonefs/super.c | 1439 ++++++++++++++++++++++++++++++++++ fs/zonefs/zonefs.h | 189 +++++ include/linux/irq.h | 18 + include/linux/irqchip/arm-gic-v3.h | 2 +- include/linux/irqdomain.h | 7 + include/linux/perf_event.h | 4 + include/uapi/linux/magic.h | 1 + kernel/events/core.c | 17 +- kernel/irq/debugfs.c | 1 + kernel/irq/manage.c | 7 + kernel/irq/msi.c | 5 +- kernel/kallsyms.c | 5 +- kernel/smp.c | 2 +- kernel/time/clocksource.c | 11 +- kernel/up.c | 3 +- lib/Makefile | 4 +- lib/raid6/Makefile | 2 +- net/bpfilter/Makefile | 2 +- samples/bpf/Makefile | 118 +-- samples/connector/Makefile | 8 +- samples/hidraw/Makefile | 6 +- samples/mei/Makefile | 4 +- samples/pidfd/Makefile | 4 +- samples/seccomp/Makefile | 4 +- samples/uhid/Makefile | 4 +- samples/vfs/Makefile | 5 +- scripts/Makefile | 22 +- scripts/Makefile.build | 8 +- scripts/Makefile.clean | 4 +- scripts/Makefile.host | 8 +- scripts/Makefile.lib | 6 +- scripts/basic/Makefile | 4 +- scripts/dtc/Makefile | 4 +- scripts/gcc-plugins/Makefile | 2 +- scripts/genksyms/Makefile | 4 +- scripts/kallsyms.c | 133 ++-- scripts/kconfig/Makefile | 10 +- scripts/kconfig/confdata.c | 7 +- scripts/mod/Makefile | 4 +- scripts/selinux/genheaders/Makefile | 4 +- scripts/selinux/mdp/Makefile | 4 +- tools/perf/arch/arm/util/cs-etm.c | 2 +- tools/perf/tests/cpumap.c | 1 - tools/perf/util/evsel.c | 8 +- tools/perf/util/evsel_config.h | 5 +- tools/perf/util/map.c | 1 + tools/perf/util/parse-events.c | 67 +- tools/perf/util/probe-finder.c | 3 +- tools/perf/util/srcline.c | 16 +- usr/Makefile | 2 +- 127 files changed, 6328 insertions(+), 480 deletions(-) create mode 100644 Documentation/filesystems/zonefs.txt create mode 100644 fs/vboxsf/Kconfig create mode 100644 fs/vboxsf/Makefile create mode 100644 fs/vboxsf/dir.c create mode 100644 fs/vboxsf/file.c create mode 100644 fs/vboxsf/shfl_hostintf.h create mode 100644 fs/vboxsf/super.c create mode 100644 fs/vboxsf/utils.c create mode 100644 fs/vboxsf/vboxsf_wrappers.c create mode 100644 fs/vboxsf/vfsmod.h create mode 100644 fs/zonefs/Kconfig create mode 100644 fs/zonefs/Makefile create mode 100644 fs/zonefs/super.c create mode 100644 fs/zonefs/zonefs.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig updated (3b70ee27a50 -> ab3da5dd66c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig in repository toolchain/ci/llvm-project. from 3b70ee27a50 [LoopExtractor] Convert LoopExtractor from LoopPass to ModulePass adds 644d56b432b [X86] Recognise ROTLI/ROTRI rotations as faux shuffles adds 3ec6de07e91 Fix signed/unsigned warning. adds 420a5180685 [lldb] [testsuite] TestGdbRemoteLibrariesSvr4Support: Fix s [...] adds 0ea4d18a288 [LLDB] [doc] Update the current status of pkgsrc (NetBSD) building adds 5a285f207e1 [LLDB] [doc] Remove note about libpanel(3) and NetBSD adds 8b37e1e5ac0 [lldb] [doc] Testing: Fix typos adds 74857b4260e [lldb] [doc] Status: Debugserver (remote debugging) is OK now adds a17f03bd939 [VectorCombine] new IR transform pass for partial vector ops adds 628462e30a7 [gn build] Port a17f03bd939 adds 273f638384d [LLDB] [doc] Document NetBSD status and sort OSs alphabetically adds 9d223a0106d [lldb] [doc] Status: Linux: Update the paragraph adds 29621b25346 [X86] Rename matchShuffleAsRotate - matchShuffleAsByteRotat [...] adds 22780731255 [X86][SSE] Add more tests showing failure to lower shuffles [...] adds 0ae119f8356 [X86][XOP] Add XOP target to vXi16/vXi8 shuffle tests adds 4b23a2e8e97 libclc: Move rsqrt implementation to a .cl file adds 85e2fa44c64 libclc/r600: Use target specific builtins to implement rsqr [...] adds dbcc1392b38 [X86] Remove isel patterns that include a vselect/X86select [...] adds dd262222b40 [X86] Use MVT::i32 for the type of a MOV32r0 created in X86 [...] adds e82e17d4d4c [X86] Add lowerShuffleAsBitRotate (PR44379) adds e1cbfecdb86 [X86] Add flag result VT to a MOV32r0 created in X86DAGToDA [...] adds 656d66f5fc5 [X86] Use custom isel for (X86sbb_flag 0, 0) so we can use [...] adds 29e646fe655 [X86] combineConcatVectorOps - combine VROTLI/VROTRI ops adds 6e1770821fb AMDGPU: Fix SI_IF lowering when the save exec reg has termi [...] adds 00115d767f3 AMDGPU: Remove dead kill handling adds f4a38c114e1 AMDGPU/GlobalISel: Look through casts when legalizing vecto [...] adds 2126c70e3a6 AMDGPU/GlobalISel: Don't mis-select vector index on a constant adds 6135f5eda48 GlobalISel: Fix narrowing of G_CTLZ/G_CTTZ adds c437f6c6873 AMDGPU/GlobalISel: Split 64-bit G_CTPOP in RegBankSelect adds 312a9d1b834 GlobalISel: Fix narrowScalar for G_{CTLZ|CTTZ}_ZERO_UNDEF adds 512c03bac44 [DebugInfo] Add a DWARFDataExtractor constructor that takes [...] new 64f417200e1 [RISCV] Fix incorrect FP base CFI offset for variable argum [...] new 05d44204fa1 [X86] Use MOVZX instead of MOVSX in f16_to_fp isel patterns. new f24c43c0c50 [X86] Autogenerate complete checks. NFC new a0678913898 [clang][codegen] Fix another lifetime emission on alloca on [...] new ab3da5dd66c Fix `-Wparentheses` warning. NFC. The 5 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang/lib/CodeGen/CGCall.cpp | 8 +- clang/lib/CodeGen/CodeGenFunction.h | 5 +- clang/test/CodeGenCXX/amdgcn-call-with-aggarg.cpp | 19 + libclc/generic/include/clc/math/rsqrt.h | 8 +- libclc/generic/lib/SOURCES | 1 + libclc/generic/lib/math/rsqrt.cl | 23 + libclc/r600/lib/SOURCES | 2 + libclc/r600/lib/math/native_rsqrt.cl | 10 + libclc/r600/lib/math/rsqrt.cl | 23 + lldb/docs/resources/build.rst | 8 - lldb/docs/resources/test.rst | 4 +- lldb/docs/status/releases.rst | 9 +- lldb/docs/status/status.rst | 75 +- .../TestGdbRemoteLibrariesSvr4Support.py | 2 +- .../SymbolFile/DWARF/DWARFDataExtractor.cpp | 3 +- lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 4 +- .../llvm/DebugInfo/DWARF/DWARFDataExtractor.h | 5 + llvm/include/llvm/InitializePasses.h | 1 + llvm/include/llvm/LinkAllPasses.h | 1 + llvm/include/llvm/Transforms/Vectorize.h | 6 + .../llvm/Transforms/Vectorize/VectorCombine.h | 30 + llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 48 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp | 2 +- llvm/lib/Passes/PassBuilder.cpp | 6 +- llvm/lib/Passes/PassRegistry.def | 1 + llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 1 - llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 1 - llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | 3 - .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 6 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 24 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 41 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 11 - llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 26 +- llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 2 + llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 4 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 67 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 135 +- llvm/lib/Target/X86/X86InstrAVX512.td | 659 +++-- llvm/lib/Target/X86/X86InstrCompiler.td | 16 - llvm/lib/Target/X86/X86InstrSSE.td | 2 +- llvm/lib/Transforms/IPO/OpenMPOpt.cpp | 6 +- llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 8 +- llvm/lib/Transforms/Vectorize/CMakeLists.txt | 1 + llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 160 ++ llvm/lib/Transforms/Vectorize/Vectorize.cpp | 4 +- .../GlobalISel/inst-select-extract-vector-elt.mir | 55 + .../GlobalISel/inst-select-insert-vector-elt.mir | 63 + .../GlobalISel/legalize-extract-vector-elt.mir | 24 +- .../GlobalISel/legalize-insert-vector-elt.mir | 27 +- .../GlobalISel/regbankselect-ctlz-zero-undef.mir | 55 +- .../AMDGPU/GlobalISel/regbankselect-ctpop.mir | 55 +- .../GlobalISel/regbankselect-cttz-zero-undef.mir | 55 +- .../AMDGPU/si-if-lower-user-terminators.mir | 75 + .../CodeGen/Mips/GlobalISel/legalizer/ctlz.mir | 6 +- .../CodeGen/Mips/GlobalISel/legalizer/cttz.mir | 22 +- llvm/test/CodeGen/RISCV/vararg.ll | 8 +- llvm/test/CodeGen/X86/avx512-insert-extract.ll | 8 +- llvm/test/CodeGen/X86/avx512-vec-cmp.ll | 12 +- .../CodeGen/X86/fastmath-float-half-conversion.ll | 71 +- llvm/test/CodeGen/X86/half.ll | 28 +- llvm/test/CodeGen/X86/pr31088.ll | 12 +- llvm/test/CodeGen/X86/shl-crash-on-legalize.ll | 2 +- llvm/test/CodeGen/X86/vec_fp_to_int.ll | 4 +- llvm/test/CodeGen/X86/vector-half-conversions.ll | 436 +-- llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll | 369 ++- llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll | 378 ++- llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll | 2783 +++++++++++++++++++- llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll | 1829 ++++++++++++- llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll | 18 + llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll | 35 +- .../X86/vector-shuffle-combining-avx512bwvl.ll | 6 +- .../CodeGen/X86/vector-shuffle-combining-xop.ll | 6 +- llvm/test/Other/new-pm-defaults.ll | 4 + llvm/test/Other/new-pm-thinlto-defaults.ll | 4 + .../Other/new-pm-thinlto-postlink-pgo-defaults.ll | 4 + .../new-pm-thinlto-postlink-samplepgo-defaults.ll | 4 + llvm/test/Other/opt-O2-pipeline.ll | 4 + llvm/test/Other/opt-O3-pipeline.ll | 4 + llvm/test/Other/opt-Os-pipeline.ll | 4 + .../Transforms/VectorCombine/X86/extract-cmp.ll | 87 + .../VectorCombine}/X86/lit.local.cfg | 0 llvm/tools/llvm-readobj/DwarfCFIEHPrinter.h | 9 +- .../CodeGen/GlobalISel/LegalizerHelperTest.cpp | 70 + .../llvm/lib/Transforms/Vectorize/BUILD.gn | 1 + 84 files changed, 7207 insertions(+), 911 deletions(-) create mode 100644 clang/test/CodeGenCXX/amdgcn-call-with-aggarg.cpp create mode 100644 libclc/generic/lib/math/rsqrt.cl create mode 100644 libclc/r600/lib/math/native_rsqrt.cl create mode 100644 libclc/r600/lib/math/rsqrt.cl create mode 100644 llvm/include/llvm/Transforms/Vectorize/VectorCombine.h create mode 100644 llvm/lib/Transforms/Vectorize/VectorCombine.cpp create mode 100644 llvm/test/CodeGen/AMDGPU/si-if-lower-user-terminators.mir create mode 100644 llvm/test/Transforms/VectorCombine/X86/extract-cmp.ll copy llvm/test/{Analysis/CostModel => Transforms/VectorCombine}/X86/lit.local.cfg (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits February 2020