Tcwg-commits February 2020

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allyesconfig updated (41fa560b -> 439d842e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards 41fa560b 0: update: binutils-gcc-linux: all new 439d842e 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (41fa560b) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-prepare_abe/console.log | 96 +- 03-build_abe-binutils/console.log | 11490 ++++++------- 04-build_abe-stage1/console.log | 18086 +++++++++++---------- 05-build_linux/console.log | 1076 +- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 10 +- console.log | 31041 ++++++++++++++++++------------------ jenkins/manifest.sh | 8 +- 10 files changed, 30936 insertions(+), 31005 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allnoconfig updated (066184a282b -> 788483065b4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allnoconfig in repository toolchain/ci/gcc. from 066184a282b rs6000: Fix infinite loop building ghostscript and icu [PR93658] adds 8389fcc4c12 Avoid collect2 calling signal unsafe functions and/or unlin [...] adds ba740092516 fortran: ICE using SHAPE with FINDLOC PR93835 adds f9be6e10c96 vect: Fix offset calculation for -ve strides [PR93767] adds 788483065b4 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 16 ++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/collect2.c | 9 ++++++++- gcc/fortran/simplify.c | 12 ++++++++---- gcc/testsuite/ChangeLog | 17 +++++++++++++++++ gcc/testsuite/gcc.dg/vect/pr93767.c | 13 +++++++++++++ gcc/testsuite/gfortran.dg/pr77351.f90 | 6 ++++-- gcc/testsuite/gfortran.dg/pr93835.f08 | 8 ++++++++ gcc/tree-vect-data-refs.c | 4 ++-- 9 files changed, 77 insertions(+), 10 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/vect/pr93767.c create mode 100644 gcc/testsuite/gfortran.dg/pr93835.f08 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allnoconfig updated (0d7aef39 -> 4af0a091)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 0d7aef39 0: update: binutils-gcc-linux: boot new 4af0a091 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (0d7aef39) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 216 +- 02-prepare_abe/console.log | 441 +- 03-build_abe-binutils/console.log | 11554 ++++++++-------- 04-build_abe-stage1/console.log | 13475 +++++++++--------- 05-build_linux/console.log | 826 +- 07-check_regression/console.log | 10 +- 08-update_baseline/console.log | 10 +- console.log | 26547 ++++++++++++++++++------------------ jenkins/manifest.sh | 8 +- 9 files changed, 26517 insertions(+), 26570 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (0f7cfb25432 -> 84c3d3f37a2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig in repository toolchain/ci/llvm-project. from 0f7cfb25432 [lldb/DWARF] Don't index dwp file multiple times adds be3b448c2e3 [lldb/test] simplify basic-elf.yaml adds c131dfefe2b [lldb] Disable auto fix-its when evaluating expressions in [...] adds c3f36acc924 [MC] Widen the functional unit type from 32 to 64 bits. adds 9b23024c8b5 Use new FailedWithMessage matcher in DWARFDebugLineTest.cpp adds 8f46269f0c1 [profile] Don't dump counters when forking and don't reset [...] adds 6e561d1c94e [Intrinsic] Add fixed point saturating division intrinsics. adds bc1947a6f51 Add a basic tiling pass for parallel loops adds 3ac37eb9a93 Silence compiler warnings adds f2ff153401f [AArch64][SVE] Add intrinsics for SVE2 cryptographic instructions adds 8c893cac3f6 [ORC] Remove spammy debug print adds a4370b2ec46 Use temporary directory for tests in D74346 adds eaa41e103c5 [CostModel][X86] Try to check against common prefixes befor [...] adds f287bb8cf5e [ARM] FP16 bitcast test. NFC adds 12fed51c080 [ARM,MVE] Remove 64-bit variants of vbrsrq* intrinsics adds bd5b22070b6 Fix TryParsePtrOperatorSeq. adds a67eb221e22 [RDA][ARM][LowOverheadLoops] Iteration count IT blocks adds f87f23c81ca [AArch64][SVE] Add the SVE dupq_lane intrinsic adds 7efabe5c7de [MIR][ARM] MachineOperand comments adds b82438872b1 [CostModel][X86] We don't need a scale factor for SLM extra [...] adds c8dadac228b add release notes for ffp-model and ffp-exception-behavior adds 8bee52bdb54 [AIX][Frontend] C++ ABI customizations for AIX boilerplate adds d66d25f8382 [OpenMP] Refactor the analysis in checkMapClauseBaseExpress [...] adds 54fa9ecd308 [libc++] Implementation of C++20's P1135R6 for libcxx adds 80e73f22956 [libc++] Adapt a few things around the implementation of P1135R6 adds c0087164175 [libc++] Mark the C++03 version of std::function as deprecated adds c9c09ef836b [lldb/DWARF] Fix dwp search path in the separate-debug-file case adds 8efc2f5723b [PowerPC][AIX] Spill/restore the callee-saved condition reg [...] adds 59d8d13c7ba [X86] getTargetShuffleInputs - check that the source inputs [...] adds 406a54b65ff [gn build] (manually) merge 54fa9ecd308 adds b21405d1cd0 [libc++] Fix CI and Linux failures after landing D68480 adds 453d54865aa [gn build] remove -std=c++11 in libcxx build pending discus [...] adds 0414c569407 Revert "Rework go bindings so that validation works fine" adds 400b6c083f8 [NFC] Fix typo in error message adds a3d58fcc034 [libc++] Drop redundant check for -std=c++14 adds 3d65dd1e668 [ReleaseNotes] Mention the `vector-function-abi-variant` at [...] adds 6369b9bf311 [CMake] Default to static linking for subprojects. adds bee70bfff0f [XCOFF][AIX] Fix incorrect alignment for function descriptor csect adds a5424ded377 [AVR] Use correct register class for mul instructions adds d1af6011e56 [AVR] Don't assert on an undefined operand adds daac8dba770 [X86] combineX86ShuffleChain - select X86ISD::FAND/ISD::AND [...] adds 5b2046c95c6 [AVR] Disassemble register operands adds 00570c2f188 [bindings/go] Add RemoveFromParentAsInstruction adds 7b0a5683fa0 [MachO] Add cpu(sub)type tests and improve error handling adds 53b597cfa2c [SelectionDAG] Merge constant SDNode arithmetic into foldCo [...] adds 2a7a989c3ed [LLVM-C] Add bindings for addCoroutinePassesToExtensionPoints adds 8358ddbe5d3 [mlir][spirv] NFC: Move test passes to test/lib adds b61e83eb0e3 [libc++] Give headers that require C++14 a cplusplus14 requ [...] adds 4135077e269 [AMDGPU] use llvm_unreachable instead of default for rp set adds 727328433ad [X86] Add back fmaddsub intrinsics to work towards fixing t [...] adds 28e86957850 [MLIR] NFC - Fix indentation in examples in LoopOps.td adds c2e272f8cf7 [ms] [llvm-ml] Improve data support, adding names and compl [...] adds 77a2744fa50 [lldb/Debugger] Remove macros formerly used by property def [...] adds c4093db3dac [lldb] Color the current PC marker adds 9fe769a961d Revert "[ms] [llvm-ml] Improve data support, adding names a [...] adds a8a4f99afb7 [Hexagon] Lower bitcast of a vector predicate adds 6f87b162e63 [MachineVerifier] Doing ::calcRegsPassed in RPO: ~35% faste [...] adds 95291a0e34c Reland "[ms] [llvm-ml] Improve data support, adding names a [...] adds 820df6e6791 [Hexagon] Lower vector predicate store adds 7f9f027c626 [lldb/Test] Update TestDisassemblyFormat for new format adds df8dda67ed0 Add methods to data extractor for extracting bytes and fixe [...] adds c93112dc4f7 Validate argument passed to __builtin_frame_address and __b [...] adds cf9dae122e0 [NFC] [DA] Refactoring getIndexExpressionsFromGEP adds 69807825728 Revert "Validate argument passed to __builtin_frame_address [...] adds eefda18227a [lldb/Plugins] Move SBTarget::GetExtendedCrashInformation t [...] adds 0368997402a [libc] [UnitTest] Create death tests adds 0ed4744bb51 AMDGPU/GlobalISel: Lower 64-bit uaddo/usubo adds a5fa7788824 [LegalizeTypes] Scalarize non-byte sized loads in WidenRecR [...] adds 841be9854c4 [lldb] Color the line marker adds e6f9cb025cd [docs] dump_ast_matchers strips internal::(Bindable)?Matche [...] adds edc4f4c9c9d Unwind past an interrupt handler correctly on arm or at pc==0 adds 915e7699243 [arcconfig] Default base to previous revision adds e34ddc09f46 [arcconfig] Delete subproject arcconfigs adds 03dd205c151 Adjust max_align_t handling adds 4e45ef4d77b Prefer PATH_MAX to MAXPATHLEN adds fe210a1ff2e [MLIR] Add std.atomic_rmw op adds 888b12b270f [polly] Don't count scops in a global variable. adds 082f1a3b159 My prevous commit to RegisterContextLLDB is causing a test [...] adds 248eaff8237 [AArch64] SVE implies fullfp16 adds 5522e8296fc [NFC] Cleaned up ASTMatchersInternal Code adds 11e3dde6252 GlobalISel: Reimplement fewerElementsVectorBasic adds 0b46b078b65 AMDGPU/GlobalISel: Fix incorrect VOP3P fneg folding adds 226bddce458 [DebugInfo]: Refactored Macinfo section consumption part to [...] adds 23c2a5ce33f Allow "callbr" to return non-void values adds 50cac248773 Support output constraints on "asm goto" adds b3bce6a3ddb [MachineVerifier] Doing ::calcRegsPassed over faster sets: [...] adds d5a4fa05146 Revert "My prevous commit to RegisterContextLLDB is causing [...] adds 4fdd2edbdb4 Revert "Unwind past an interrupt handler correctly on arm o [...] adds fee41517fe0 AMDGPU/GlobalISel: Introduce post-legalize combiner adds 1612d382418 GlobalISel: Remove unneeded initialiation adds 2c0edbf19c1 [Attributor] Use AssumptionCache in AANonNullFloating::initialize adds 35a06145357 [lldb/Utility] Fix unspecified behavior. adds 84c3d3f37a2 [Sparc][NFC] Remove trailing space No new revisions were added by this update. Summary of changes: .arcconfig | 3 +- clang-tools-extra/.arcconfig | 4 - clang/.arcconfig | 4 - clang/docs/LanguageExtensions.rst | 28 + clang/docs/LibASTMatchersReference.html | 135 +- clang/docs/ReleaseNotes.rst | 7 + clang/docs/tools/dump_ast_matchers.py | 6 + clang/include/clang/AST/Stmt.h | 10 +- clang/include/clang/ASTMatchers/ASTMatchers.h | 2 +- clang/include/clang/Basic/Features.def | 1 + clang/include/clang/Basic/TargetCXXABI.h | 12 + clang/include/clang/Basic/arm_mve.td | 2 +- clang/include/clang/Parse/Parser.h | 4 + clang/lib/AST/ASTContext.cpp | 2 + clang/lib/AST/Stmt.cpp | 4 +- clang/lib/ASTMatchers/ASTMatchersInternal.cpp | 33 +- clang/lib/Analysis/UninitializedValues.cpp | 15 + clang/lib/Basic/Targets/OSTargets.h | 2 + clang/lib/CodeGen/CGBuiltin.cpp | 25 +- clang/lib/CodeGen/CGStmt.cpp | 21 +- clang/lib/CodeGen/CodeGenModule.cpp | 1 + clang/lib/CodeGen/ItaniumCXXABI.cpp | 21 + clang/lib/Driver/ToolChains/Darwin.cpp | 2 + clang/lib/Parse/ParseStmtAsm.cpp | 6 - clang/lib/Parse/ParseTentative.cpp | 50 +- clang/lib/Sema/SemaOpenMP.cpp | 454 ++++--- clang/lib/Sema/SemaStmtAsm.cpp | 4 +- clang/test/Analysis/uninit-asm-goto.cpp | 10 + clang/test/CXX/dcl.decl/p4-0x.cpp | 13 +- clang/test/CodeGen/asm-goto.c | 95 +- clang/test/CodeGen/avx512f-builtins.c | 80 +- clang/test/CodeGen/avx512vl-builtins.c | 132 +- clang/test/CodeGen/fma-builtins-constrained.c | 88 +- clang/test/CodeGen/fma-builtins.c | 42 +- clang/test/CodeGen/fma4-builtins.c | 40 +- clang/test/CodeGen/static-init.cpp | 12 + clang/test/OpenMP/target_messages.cpp | 14 + clang/test/Parser/asm-goto.c | 63 +- clang/test/Parser/asm-goto.cpp | 94 +- clang/test/Parser/cxx-ambig-decl-expr.cpp | 3 + clang/test/Parser/cxx-attributes.cpp | 12 + clang/test/Sema/asm-goto.cpp | 22 +- compiler-rt/.arcconfig | 4 - compiler-rt/lib/profile/GCDAProfiling.c | 94 +- debuginfo-tests/.arcconfig | 3 - libc/cmake/modules/LLVMLibCRules.cmake | 2 +- libc/test/src/signal/raise_test.cpp | 4 + libc/utils/CMakeLists.txt | 1 + libc/utils/UnitTest/Test.cpp | 59 + libc/utils/UnitTest/Test.h | 48 +- libc/utils/testutils/CMakeLists.txt | 8 + libc/utils/testutils/ExecuteFunction.h | 36 + libc/utils/testutils/ExecuteFunctionUnix.cpp | 52 + libcxx/.arcconfig | 4 - libcxx/include/CMakeLists.txt | 3 + libcxx/include/__config | 3 + libcxx/include/__functional_03 | 15 +- libcxx/include/__threading_support | 103 ++ libcxx/include/atomic | 334 ++++- libcxx/include/barrier | 322 +++++ libcxx/include/cstddef | 8 +- libcxx/include/latch | 104 ++ libcxx/include/module.modulemap | 15 + libcxx/include/new | 10 + libcxx/include/semaphore | 233 ++++ libcxx/include/stddef.h | 6 - libcxx/lib/abi/CHANGELOG.TXT | 28 + libcxx/lib/abi/x86_64-apple-darwin.v1.abilist | 11 + libcxx/lib/abi/x86_64-apple-darwin.v2.abilist | 11 + libcxx/lib/abi/x86_64-unknown-linux-gnu.v1.abilist | 11 + libcxx/src/CMakeLists.txt | 7 +- libcxx/src/atomic.cpp | 189 +++ libcxx/src/barrier.cpp | 95 ++ libcxx/src/include/apple_availability.h | 18 + libcxx/test/libcxx/double_include.sh.cpp | 3 + .../atomic_wait.pass.cpp | 65 + libcxx/test/std/atomics/types.pass.cpp | 127 ++ .../test/std/thread/thread.barrier/arrive.pass.cpp | 42 + .../thread/thread.barrier/arrive_and_drop.pass.cpp | 41 + .../thread/thread.barrier/arrive_and_wait.pass.cpp | 41 + .../std/thread/thread.barrier/completion.pass.cpp | 46 + .../test/std/thread/thread.barrier/max.pass.cpp | 26 +- .../std/thread/thread.barrier/version.pass.cpp | 25 +- .../thread/thread.latch/arrive_and_wait.pass.cpp | 39 + .../std/thread/thread.latch/count_down.pass.cpp | 40 + .../test/std/thread/thread.latch/max.pass.cpp | 21 +- .../test/std/thread/thread.latch/try_wait.pass.cpp | 37 + .../test/std/thread/thread.latch/version.pass.cpp | 23 +- .../std/thread/thread.semaphore/acquire.pass.cpp | 40 + .../std/thread/thread.semaphore/binary.pass.cpp | 47 + .../test/std/thread/thread.semaphore/max.pass.cpp | 28 + .../std/thread/thread.semaphore/release.pass.cpp | 43 + .../std/thread/thread.semaphore/timed.pass.cpp | 53 + .../thread/thread.semaphore/try_acquire.pass.cpp | 43 + .../std/thread/thread.semaphore/version.pass.cpp | 25 +- libcxx/www/cxx2a_status.html | 2 +- libcxxabi/.arcconfig | 4 - libunwind/.arcconfig | 4 - lld/.arcconfig | 4 - lldb/.arcconfig | 4 - lldb/bindings/interface/SBProcess.i | 5 + lldb/bindings/interface/SBTarget.i | 6 - lldb/include/lldb/API/SBProcess.h | 2 + lldb/include/lldb/API/SBStructuredData.h | 1 + lldb/include/lldb/API/SBTarget.h | 2 - lldb/include/lldb/Core/Debugger.h | 4 + lldb/include/lldb/Target/Platform.h | 6 +- lldb/packages/Python/lldbsuite/test/lldbtest.py | 15 +- lldb/source/API/SBProcess.cpp | 27 + lldb/source/API/SBTarget.cpp | 26 - lldb/source/Commands/CommandObjectProcess.cpp | 2 +- lldb/source/Core/CoreProperties.td | 10 +- lldb/source/Core/Debugger.cpp | 88 +- lldb/source/Core/SourceManager.cpp | 23 +- .../Plugins/Platform/MacOSX/PlatformDarwin.cpp | 18 +- .../Plugins/Platform/MacOSX/PlatformDarwin.h | 8 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 2 +- lldb/source/Utility/Stream.cpp | 5 +- .../process_crash_info/TestProcessCrashInfo.py | 32 +- .../API/functionalities/process_crash_info/main.c | 3 +- lldb/test/API/lang/cpp/operators/main.cpp | 2 +- lldb/test/API/source-manager/TestSourceManager.py | 2 +- lldb/test/CMakeLists.txt | 1 + .../test/Shell/Settings/TestDisassemblyFormat.test | 2 +- lldb/test/Shell/Settings/TestLineMarkerColor.test | 17 + .../SymbolFile/Breakpad/Inputs/basic-elf.yaml | 10 - .../SymbolFile/DWARF/dwp-separate-debug-file.cpp | 17 + lldb/test/Shell/helper/toolchain.py | 2 +- lldb/test/Shell/lit-lldb-init.in | 1 + llvm/.arcconfig | 4 - llvm/bindings/go/build.sh | 28 + llvm/bindings/go/{src => }/llvm/IRBindings.cpp | 0 llvm/bindings/go/{src => }/llvm/IRBindings.h | 0 .../go/{src => }/llvm/InstrumentationBindings.cpp | 0 .../go/{src => }/llvm/InstrumentationBindings.h | 0 .../bindings/go/{src => }/llvm/SupportBindings.cpp | 0 llvm/bindings/go/{src => }/llvm/SupportBindings.h | 0 llvm/bindings/go/{src => }/llvm/analysis.go | 0 llvm/bindings/go/{src => }/llvm/bitreader.go | 0 llvm/bindings/go/{src => }/llvm/bitwriter.go | 0 llvm/bindings/go/{src => }/llvm/dibuilder.go | 0 llvm/bindings/go/{src => }/llvm/executionengine.go | 0 .../go/{src => }/llvm/executionengine_test.go | 0 llvm/bindings/go/{src => }/llvm/ir.go | 1 + llvm/bindings/go/{src => }/llvm/ir_test.go | 0 llvm/bindings/go/{src => }/llvm/linker.go | 0 llvm/bindings/go/{src => }/llvm/llvm_config.go.in | 0 llvm/bindings/go/{src => }/llvm/llvm_dep.go | 2 + llvm/bindings/go/{src => }/llvm/string.go | 0 llvm/bindings/go/{src => }/llvm/string_test.go | 0 llvm/bindings/go/{src => }/llvm/support.go | 0 llvm/bindings/go/{src => }/llvm/target.go | 0 .../go/{src => }/llvm/transforms_coroutines.go | 0 .../{src => }/llvm/transforms_instrumentation.go | 0 llvm/bindings/go/{src => }/llvm/transforms_ipo.go | 0 .../go/{src => }/llvm/transforms_pmbuilder.go | 5 + .../go/{src => }/llvm/transforms_scalar.go | 0 llvm/bindings/go/{src => }/llvm/version.go | 0 llvm/cmake/modules/AddLLVM.cmake | 15 +- llvm/docs/LangRef.rst | 159 ++- llvm/docs/ReleaseNotes.rst | 6 + llvm/include/llvm-c/Transforms/Coroutines.h | 4 + llvm/include/llvm/Analysis/ScalarEvolution.h | 13 + .../include/llvm/CodeGen/GlobalISel/CallLowering.h | 2 +- llvm/include/llvm/CodeGen/ISDOpcodes.h | 5 + llvm/include/llvm/CodeGen/MachineBasicBlock.h | 33 + llvm/include/llvm/CodeGen/ReachingDefAnalysis.h | 4 + .../llvm/CodeGen/ScoreboardHazardRecognizer.h | 7 +- llvm/include/llvm/CodeGen/SelectionDAG.h | 4 - llvm/include/llvm/CodeGen/TargetInstrInfo.h | 7 + llvm/include/llvm/CodeGen/TargetLowering.h | 4 +- llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h | 10 +- llvm/include/llvm/IR/Intrinsics.td | 8 + llvm/include/llvm/IR/IntrinsicsAArch64.td | 40 + llvm/include/llvm/IR/IntrinsicsX86.td | 20 +- llvm/include/llvm/MC/MCInstrItineraries.h | 7 +- llvm/include/llvm/Support/DataExtractor.h | 56 + llvm/include/llvm/Target/TargetSelectionDAG.td | 2 + .../llvm/Transforms/IPO/PassManagerBuilder.h | 9 + llvm/lib/Analysis/ScalarEvolution.cpp | 45 + llvm/lib/AsmParser/LLParser.cpp | 3 - llvm/lib/BinaryFormat/MachO.cpp | 16 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 108 +- llvm/lib/CodeGen/MIRParser/MILexer.cpp | 16 + llvm/lib/CodeGen/MIRPrinter.cpp | 19 +- llvm/lib/CodeGen/MachineBasicBlock.cpp | 6 +- llvm/lib/CodeGen/MachinePipeliner.cpp | 11 +- llvm/lib/CodeGen/MachineVerifier.cpp | 240 +++- llvm/lib/CodeGen/ReachingDefAnalysis.cpp | 26 + llvm/lib/CodeGen/ScoreboardHazardRecognizer.cpp | 13 +- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 6 +- .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 130 +- .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 17 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 26 + .../CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 63 + llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 21 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 42 +- .../CodeGen/SelectionDAG/SelectionDAGDumper.cpp | 2 + llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 59 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 2 + llvm/lib/DebugInfo/DWARF/DWARFContext.cpp | 28 +- .../Orc/RTDyldObjectLinkingLayer.cpp | 3 +- llvm/lib/IR/AutoUpgrade.cpp | 39 +- llvm/lib/IR/Verifier.cpp | 8 +- llvm/lib/MC/MCParser/MasmParser.cpp | 213 ++- llvm/lib/Object/COFFObjectFile.cpp | 2 +- llvm/lib/Support/DataExtractor.cpp | 15 + llvm/lib/Support/Unix/Path.inc | 20 +- llvm/lib/Target/AArch64/AArch64.td | 2 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 50 + llvm/lib/Target/AArch64/AArch64ISelLowering.h | 1 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 14 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 21 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 2 + llvm/lib/Target/AMDGPU/AMDGPUCombine.td | 9 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 5 +- ...ombiner.cpp => AMDGPUPostLegalizerCombiner.cpp} | 81 +- .../Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp | 116 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 7 + llvm/lib/Target/AMDGPU/CMakeLists.txt | 5 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 18 + llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 5 + llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 108 +- llvm/lib/Target/AVR/AVRInstrInfo.td | 10 +- .../Target/AVR/Disassembler/AVRDisassembler.cpp | 23 + .../lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp | 20 + llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 17 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 4 +- llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 191 ++- llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.h | 2 +- llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp | 3 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 3 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 139 +- llvm/lib/Target/PowerPC/PPCFrameLowering.h | 4 - llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 17 +- llvm/lib/Target/Sparc/LeonFeatures.td | 16 +- llvm/lib/Target/Sparc/Sparc.td | 6 +- llvm/lib/Target/Sparc/SparcInstrAliases.td | 4 +- llvm/lib/Target/Sparc/SparcInstrFormats.td | 2 +- llvm/lib/Target/Sparc/SparcInstrInfo.td | 32 +- llvm/lib/Target/Sparc/SparcRegisterInfo.td | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 32 +- llvm/lib/Target/X86/X86IntrinsicsInfo.h | 4 + llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 2 +- llvm/lib/Transforms/Coroutines/Coroutines.cpp | 6 + llvm/lib/Transforms/IPO/Attributor.cpp | 7 +- llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 8 - .../Transforms/Instrumentation/GCOVProfiling.cpp | 143 +- .../CostModel/X86/alternate-shuffle-cost.ll | 130 +- llvm/test/Analysis/CostModel/X86/arith-fix.ll | 6 +- llvm/test/Analysis/CostModel/X86/arith-fp.ll | 61 +- llvm/test/Analysis/CostModel/X86/arith-overflow.ll | 6 +- llvm/test/Analysis/CostModel/X86/arith-ssat.ll | 6 +- llvm/test/Analysis/CostModel/X86/arith-usat.ll | 6 +- llvm/test/Analysis/CostModel/X86/arith.ll | 354 ++--- llvm/test/Analysis/CostModel/X86/div.ll | 40 +- llvm/test/Analysis/CostModel/X86/extend.ll | 2 +- llvm/test/Analysis/CostModel/X86/fcmp.ll | 214 +-- llvm/test/Analysis/CostModel/X86/fptosi.ll | 168 +-- llvm/test/Analysis/CostModel/X86/fptoui.ll | 216 +-- llvm/test/Analysis/CostModel/X86/fround.ll | 57 +- llvm/test/Analysis/CostModel/X86/fshl.ll | 4 +- llvm/test/Analysis/CostModel/X86/fshr.ll | 4 +- llvm/test/Analysis/CostModel/X86/icmp.ll | 6 +- llvm/test/Analysis/CostModel/X86/rem.ll | 78 +- .../Analysis/CostModel/X86/shuffle-broadcast.ll | 2 +- .../CostModel/X86/shuffle-extract_subvector.ll | 242 +--- .../CostModel/X86/shuffle-insert_subvector.ll | 30 +- .../test/Analysis/CostModel/X86/shuffle-reverse.ll | 2 +- .../Analysis/CostModel/X86/shuffle-single-src.ll | 8 +- .../Analysis/CostModel/X86/shuffle-transpose.ll | 14 +- .../test/Analysis/CostModel/X86/shuffle-two-src.ll | 16 +- llvm/test/Analysis/CostModel/X86/sitofp.ll | 59 +- llvm/test/Analysis/CostModel/X86/trunc.ll | 25 +- llvm/test/Analysis/CostModel/X86/uitofp.ll | 52 +- llvm/test/Analysis/CostModel/X86/vector-extract.ll | 305 ++--- llvm/test/Analysis/CostModel/X86/vector-insert.ll | 115 +- .../Analysis/CostModel/X86/vshift-ashr-cost.ll | 58 +- .../Analysis/CostModel/X86/vshift-lshr-cost.ll | 58 +- .../test/Analysis/CostModel/X86/vshift-shl-cost.ll | 66 +- llvm/test/Bindings/Go/go.test | 2 +- llvm/test/Bindings/Go/lit.local.cfg | 3 +- llvm/test/CMakeLists.txt | 4 + .../CodeGen/AArch64/sve-intrinsics-perm-select.ll | 181 +++ llvm/test/CodeGen/AArch64/sve-vector-splat.ll | 2 +- .../test/CodeGen/AArch64/sve2-intrinsics-crypto.ll | 99 ++ .../AMDGPU/GlobalISel/artifact-combiner-zext.mir | 23 +- .../AMDGPU/GlobalISel/combine-ashr-narrow.mir | 2 +- .../AMDGPU/GlobalISel/combine-lshr-narrow.mir | 2 +- .../AMDGPU/GlobalISel/combine-shl-narrow.mir | 2 +- llvm/test/CodeGen/AMDGPU/GlobalISel/fmax_legacy.ll | 21 + llvm/test/CodeGen/AMDGPU/GlobalISel/fmin_legacy.ll | 21 + .../CodeGen/AMDGPU/GlobalISel/inst-select-and.mir | 20 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-or.mir | 20 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir | 20 +- .../CodeGen/AMDGPU/GlobalISel/legalize-and.mir | 57 +- .../CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir | 35 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir | 118 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir | 49 +- .../AMDGPU/GlobalISel/legalize-fcanonicalize.mir | 34 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fma.mir | 64 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir | 49 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir | 118 +- .../test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir | 57 +- .../CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir | 326 +++++ .../CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir | 326 +++++ .../CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir | 269 ++++ .../CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir | 283 ++++ .../CodeGen/AMDGPU/GlobalISel/legalize-xor.mir | 57 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll | 6 +- .../GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll | 4 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll | 9 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll | 6 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll | 6 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll | 9 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll | 6 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll | 6 +- llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll | 61 +- llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll | 28 +- llvm/test/CodeGen/ARM/ARMLoadStoreDBG.mir | 34 +- .../CodeGen/ARM/GlobalISel/arm-call-lowering.ll | 73 +- .../ARM/GlobalISel/arm-instruction-select-cmp.mir | 484 +++---- .../GlobalISel/arm-instruction-select-combos.mir | 295 ++-- .../ARM/GlobalISel/arm-instruction-select.mir | 545 ++++---- .../CodeGen/ARM/GlobalISel/arm-irtranslator.ll | 48 +- .../CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir | 72 +- .../CodeGen/ARM/GlobalISel/arm-param-lowering.ll | 130 +- .../arm-select-copy_to_regclass-of-fptosi.mir | 4 +- .../ARM/GlobalISel/arm-select-globals-pic.mir | 16 +- .../GlobalISel/arm-select-globals-ropi-rwpi.mir | 32 +- .../ARM/GlobalISel/arm-select-globals-static.mir | 12 +- .../GlobalISel/irtranslator-varargs-lowering.ll | 30 +- llvm/test/CodeGen/ARM/GlobalISel/select-clz.mir | 6 +- .../CodeGen/ARM/GlobalISel/select-fp-const.mir | 28 +- llvm/test/CodeGen/ARM/GlobalISel/select-fp.mir | 108 +- llvm/test/CodeGen/ARM/GlobalISel/select-neon.mir | 27 +- llvm/test/CodeGen/ARM/GlobalISel/select-pkhbt.mir | 36 +- .../test/CodeGen/ARM/GlobalISel/select-pr35926.mir | 17 +- llvm/test/CodeGen/ARM/GlobalISel/select-revsh.mir | 4 +- .../GlobalISel/thumb-instruction-select-cmp.mir | 121 +- .../ARM/GlobalISel/thumb-select-arithmetic-ops.mir | 125 +- .../CodeGen/ARM/GlobalISel/thumb-select-br.mir | 26 +- .../CodeGen/ARM/GlobalISel/thumb-select-exts.mir | 259 ++-- .../ARM/GlobalISel/thumb-select-globals-pic.mir | 28 +- .../GlobalISel/thumb-select-globals-ropi-rwpi.mir | 32 +- .../ARM/GlobalISel/thumb-select-globals-static.mir | 12 +- .../CodeGen/ARM/GlobalISel/thumb-select-imm.mir | 28 +- .../ARM/GlobalISel/thumb-select-load-store.mir | 81 +- .../ARM/GlobalISel/thumb-select-logical-ops.mir | 81 +- .../CodeGen/ARM/GlobalISel/thumb-select-select.mir | 35 +- .../CodeGen/ARM/GlobalISel/thumb-select-shifts.mir | 38 +- llvm/test/CodeGen/ARM/cmp1-peephole-thumb.mir | 22 +- llvm/test/CodeGen/ARM/cmpxchg.mir | 33 +- llvm/test/CodeGen/ARM/codesize-ifcvt.mir | 94 +- llvm/test/CodeGen/ARM/constant-island-movwt.mir | 10 +- llvm/test/CodeGen/ARM/constant-islands-cfg.mir | 29 +- .../test/CodeGen/ARM/constant-islands-split-IT.mir | 53 +- llvm/test/CodeGen/ARM/expand-pseudos.mir | 29 +- llvm/test/CodeGen/ARM/fp16-bitcast.ll | 60 + llvm/test/CodeGen/ARM/fpoffset_overflow.mir | 99 +- .../ARM/ifcvt-diamond-unanalyzable-common.mir | 42 +- .../CodeGen/ARM/ifcvt_diamond_unanalyzable.mir | 20 +- .../ARM/ifcvt_forked_diamond_unanalyzable.mir | 36 +- .../ARM/ifcvt_simple_bad_zero_prob_succ.mir | 28 +- .../test/CodeGen/ARM/ifcvt_simple_unanalyzable.mir | 17 +- .../test/CodeGen/ARM/ifcvt_triangleSameCvtNext.mir | 30 +- .../CodeGen/ARM/ifcvt_triangleWoCvtToNextEdge.mir | 43 +- .../CodeGen/ARM/load_store_opt_clobber_cpsr.mir | 8 +- llvm/test/CodeGen/ARM/load_store_opt_kill.mir | 7 +- llvm/test/CodeGen/ARM/load_store_opt_reg_limit.mir | 6 +- llvm/test/CodeGen/ARM/machine-copyprop.mir | 15 +- llvm/test/CodeGen/ARM/peephole-phi.mir | 86 +- .../ARM/regcoal-invalid-subrange-update.mir | 2 +- .../CodeGen/ARM/register-scavenger-exceptions.mir | 22 +- llvm/test/CodeGen/ARM/tail-dup-bundle.mir | 39 +- llvm/test/CodeGen/ARM/tst-peephole.mir | 18 +- llvm/test/CodeGen/ARM/vldm-liveness.mir | 9 +- .../Hexagon/autohvx/isel-hvx-pred-bitcast.ll | 26 + llvm/test/CodeGen/Hexagon/hvx-bitcast-v64i1.ll | 51 + llvm/test/CodeGen/Hexagon/store-vector-pred.ll | 47 + llvm/test/CodeGen/MIR/ARM/bundled-instructions.mir | 35 +- llvm/test/CodeGen/MIR/ARM/thumb2-sub-sp-t3.mir | 18 +- llvm/test/CodeGen/PowerPC/aix-crspill.ll | 81 ++ llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll | 2 +- llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll | 2 +- llvm/test/CodeGen/PowerPC/aix32-crsave.mir | 66 + llvm/test/CodeGen/PowerPC/alloca-crspill.ll | 136 ++ llvm/test/CodeGen/PowerPC/ppc64-alloca-crspill.ll | 66 - llvm/test/CodeGen/PowerPC/ppc64-crsave.mir | 46 +- .../CodeGen/SystemZ/store_nonbytesized_vecs.ll | 26 +- llvm/test/CodeGen/Thumb/peephole-cmp.mir | 133 +- llvm/test/CodeGen/Thumb/peephole-mi.mir | 191 ++- .../CodeGen/Thumb2/LowOverheadLoops/add_reduce.mir | 28 +- .../CodeGen/Thumb2/LowOverheadLoops/cond-mov.mir | 14 +- .../Thumb2/LowOverheadLoops/disjoint-vcmp.mir | 38 +- .../Thumb2/LowOverheadLoops/dont-ignore-vctp.mir | 14 +- .../LowOverheadLoops/dont-remove-loop-update.mir | 26 +- .../LowOverheadLoops/dont-remove-loop-update2.mir | 12 +- .../LowOverheadLoops/end-positive-offset.mir | 76 +- .../Thumb2/LowOverheadLoops/extract-element.mir | 29 +- .../Thumb2/LowOverheadLoops/incorrect-sub-16.mir | 20 +- .../Thumb2/LowOverheadLoops/incorrect-sub-32.mir | 20 +- .../Thumb2/LowOverheadLoops/incorrect-sub-8.mir | 20 +- .../Thumb2/LowOverheadLoops/inloop-vpnot-1.mir | 30 +- .../Thumb2/LowOverheadLoops/inloop-vpnot-2.mir | 30 +- .../Thumb2/LowOverheadLoops/inloop-vpnot-3.mir | 30 +- .../Thumb2/LowOverheadLoops/inloop-vpsel-1.mir | 32 +- .../Thumb2/LowOverheadLoops/inloop-vpsel-2.mir | 32 +- .../Thumb2/LowOverheadLoops/it-block-chain.mir | 29 +- .../Thumb2/LowOverheadLoops/it-block-itercount.mir | 23 +- .../Thumb2/LowOverheadLoops/it-block-mov.mir | 218 +++ .../Thumb2/LowOverheadLoops/it-block-random.mir | 27 +- .../LowOverheadLoops/livereg-no-loop-def.mir | 10 +- .../LowOverheadLoops/loop-dec-copy-chain.mir | 162 +-- .../loop-dec-copy-prev-iteration.mir | 160 +-- .../Thumb2/LowOverheadLoops/loop-dec-liveout.mir | 158 +-- .../Thumb2/LowOverheadLoops/matrix-debug.mir | 52 +- .../CodeGen/Thumb2/LowOverheadLoops/matrix.mir | 130 +- .../Thumb2/LowOverheadLoops/mov-after-dls.mir | 14 +- .../Thumb2/LowOverheadLoops/mov-lr-terminator.mir | 20 +- .../LowOverheadLoops/move-def-before-start.mir | 22 +- .../LowOverheadLoops/move-start-after-def.mir | 26 +- .../Thumb2/LowOverheadLoops/multiple-do-loops.mir | 100 +- .../Thumb2/LowOverheadLoops/no-dec-cbnz.mir | 183 ++- .../Thumb2/LowOverheadLoops/no-vpsel-liveout.mir | 27 +- .../Thumb2/LowOverheadLoops/non-masked-load.mir | 34 +- .../Thumb2/LowOverheadLoops/non-masked-store.mir | 22 +- .../Thumb2/LowOverheadLoops/out-of-range-cbz.mir | 106 +- .../Thumb2/LowOverheadLoops/predicated-liveout.mir | 12 +- .../Thumb2/LowOverheadLoops/remove-elem-moves.mir | 80 +- .../Thumb2/LowOverheadLoops/revert-non-header.mir | 4 +- .../Thumb2/LowOverheadLoops/revert-while.mir | 26 +- .../Thumb2/LowOverheadLoops/safe-def-no-mov.mir | 16 +- .../CodeGen/Thumb2/LowOverheadLoops/size-limit.mir | 22 +- .../CodeGen/Thumb2/LowOverheadLoops/skip-debug.mir | 30 +- .../LowOverheadLoops/unrolled-and-vector.mir | 146 +- .../LowOverheadLoops/unsafe-cpsr-loop-def.mir | 30 +- .../LowOverheadLoops/unsafe-cpsr-loop-use.mir | 32 +- .../Thumb2/LowOverheadLoops/unsafe-use-after.mir | 22 +- .../LowOverheadLoops/vctp-add-operand-liveout.mir | 30 +- .../Thumb2/LowOverheadLoops/vctp-in-vpt-2.mir | 32 +- .../Thumb2/LowOverheadLoops/vctp-in-vpt.mir | 20 +- .../CodeGen/Thumb2/LowOverheadLoops/vctp-subi3.mir | 8 +- .../CodeGen/Thumb2/LowOverheadLoops/vctp-subri.mir | 8 +- .../Thumb2/LowOverheadLoops/vctp-subri12.mir | 8 +- .../Thumb2/LowOverheadLoops/vctp16-reduce.mir | 36 +- .../Thumb2/LowOverheadLoops/vmaxmin_vpred_r.mir | 12 +- .../Thumb2/LowOverheadLoops/vmldava_in_vpt.mir | 16 +- .../test/CodeGen/Thumb2/LowOverheadLoops/while.mir | 14 +- .../test/CodeGen/Thumb2/LowOverheadLoops/wlstp.mir | 56 +- .../LowOverheadLoops/wrong-liveout-lsr-shift.mir | 35 +- .../LowOverheadLoops/wrong-vctp-opcode-liveout.mir | 34 +- .../wrong-vctp-operand-liveout.mir | 28 +- llvm/test/CodeGen/Thumb2/constant-islands-cbz.mir | 108 +- llvm/test/CodeGen/Thumb2/fp16-stacksplot.mir | 10 +- llvm/test/CodeGen/Thumb2/high-reg-spill.mir | 15 +- llvm/test/CodeGen/Thumb2/ifcvt-cbz.mir | 48 +- llvm/test/CodeGen/Thumb2/mve-stacksplot.mir | 20 +- .../CodeGen/Thumb2/mve-vpt-2-blocks-1-pred.mir | 6 +- .../CodeGen/Thumb2/mve-vpt-2-blocks-2-preds.mir | 6 +- .../CodeGen/Thumb2/mve-vpt-2-blocks-ctrl-flow.mir | 4 +- .../mve-vpt-2-blocks-non-consecutive-ins.mir | 4 +- llvm/test/CodeGen/Thumb2/mve-vpt-2-blocks.mir | 4 +- .../CodeGen/Thumb2/mve-vpt-3-blocks-kill-vpr.mir | 4 +- llvm/test/CodeGen/Thumb2/mve-vpt-block-1-ins.mir | 4 +- llvm/test/CodeGen/Thumb2/mve-vpt-block-2-ins.mir | 4 +- llvm/test/CodeGen/Thumb2/mve-vpt-block-4-ins.mir | 4 +- .../CodeGen/Thumb2/mve-vpt-block-fold-vcmp.mir | 12 +- llvm/test/CodeGen/Thumb2/mve-vpt-block-optnone.mir | 4 +- llvm/test/CodeGen/Thumb2/mve-vpt-nots.mir | 12 +- llvm/test/CodeGen/Thumb2/mve-vpt-preuse.mir | 6 +- llvm/test/CodeGen/Thumb2/peephole-addsub.mir | 15 +- llvm/test/CodeGen/Thumb2/peephole-cmp.mir | 19 +- llvm/test/CodeGen/Thumb2/t2-teq-reduce.mir | 62 +- llvm/test/CodeGen/Thumb2/t2sizereduction.mir | 18 +- llvm/test/CodeGen/X86/callbr-asm-outputs.ll | 162 ++- llvm/test/CodeGen/X86/callbr-asm.ll | 2 +- llvm/test/CodeGen/X86/load-local-v3i1.ll | 28 +- llvm/test/CodeGen/X86/sdiv_fix_sat.ll | 1411 ++++++++++++++++++++ llvm/test/CodeGen/X86/udiv_fix_sat.ll | 528 ++++++++ .../MIR/ARM/live-debug-values-reg-copy.mir | 2 +- llvm/test/MC/AVR/inst-adc.s | 6 + llvm/test/MC/AVR/inst-add.s | 6 + llvm/test/MC/AVR/inst-adiw.s | 12 + llvm/test/MC/AVR/inst-and.s | 6 + llvm/test/MC/AVR/inst-andi.s | 8 + llvm/test/MC/AVR/inst-bld.s | 6 + llvm/test/MC/AVR/inst-bst.s | 6 + llvm/test/MC/AVR/inst-cbr.s | 6 + llvm/test/MC/AVR/inst-clr.s | 5 + llvm/test/MC/AVR/inst-cp.s | 6 + llvm/test/MC/AVR/inst-cpc.s | 6 + llvm/test/MC/AVR/inst-cpi.s | 6 + llvm/test/MC/AVR/inst-cpse.s | 6 + llvm/test/MC/AVR/inst-eor.s | 6 + llvm/test/MC/AVR/inst-ldi.s | 7 + llvm/test/MC/AVR/inst-lsl.s | 6 + llvm/test/MC/AVR/inst-mov.s | 6 + llvm/test/MC/AVR/inst-or.s | 6 + llvm/test/MC/AVR/inst-ori.s | 8 + llvm/test/MC/AVR/inst-rol.s | 6 + llvm/test/MC/AVR/inst-sbc.s | 6 + llvm/test/MC/AVR/inst-sbci.s | 7 + llvm/test/MC/AVR/inst-sbiw.s | 15 + llvm/test/MC/AVR/inst-sbr.s | 8 + llvm/test/MC/AVR/inst-ser.s | 6 + llvm/test/MC/AVR/inst-sub.s | 6 + llvm/test/MC/AVR/inst-subi.s | 8 + llvm/test/MC/AVR/inst-tst.s | 6 + llvm/test/Other/cfg_deopt_unreach.ll | 18 +- llvm/test/Transforms/Attributor/nonnull.ll | 4 +- .../Transforms/SLPVectorizer/X86/alternate-cast.ll | 49 +- llvm/test/lit.cfg.py | 2 +- llvm/test/tools/llvm-ml/basic_data.test | 38 + llvm/unittests/BinaryFormat/MachOTest.cpp | 76 ++ .../DebugInfo/DWARF/DWARFDebugLineTest.cpp | 228 ++-- llvm/unittests/Support/DataExtractorTest.cpp | 47 + llvm/utils/TableGen/SubtargetEmitter.cpp | 4 +- llvm/utils/gn/secondary/libcxx/src/BUILD.gn | 8 +- llvm/utils/lit/lit/llvm/subst.py | 2 +- mlir/include/mlir/Dialect/LoopOps/LoopOps.td | 16 +- mlir/include/mlir/Dialect/LoopOps/Passes.h | 5 + mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 63 + mlir/include/mlir/InitAllPasses.h | 1 + .../StandardToLLVM/ConvertStandardToLLVM.cpp | 184 ++- mlir/lib/Dialect/LoopOps/Transforms/CMakeLists.txt | 1 + .../LoopOps/Transforms/ParallelLoopTiling.cpp | 133 ++ mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 38 +- mlir/lib/Parser/Parser.cpp | 3 +- mlir/test/CMakeLists.txt | 1 - .../StandardToLLVM/convert-to-llvmir.mlir | 40 + mlir/test/Dialect/Loops/parallel-loop-tiling.mlir | 80 ++ mlir/test/IR/core-ops.mlir | 7 + mlir/test/IR/invalid-ops.mlir | 24 + mlir/test/lib/CMakeLists.txt | 1 + mlir/test/{ => lib}/Dialect/CMakeLists.txt | 0 mlir/test/{ => lib}/Dialect/SPIRV/CMakeLists.txt | 0 .../{ => lib}/Dialect/SPIRV/TestAvailability.cpp | 9 +- mlir/tools/mlir-opt/mlir-opt.cpp | 2 + openmp/.arcconfig | 4 - parallel-libs/.arcconfig | 4 - polly/.arcconfig | 4 - polly/include/polly/ScopDetection.h | 3 + polly/include/polly/ScopInfo.h | 12 +- polly/include/polly/Support/ScopHelper.h | 16 - polly/lib/Analysis/ScopBuilder.cpp | 9 +- polly/lib/Analysis/ScopInfo.cpp | 17 +- polly/lib/CMakeLists.txt | 1 + polly/lib/Support/ScopHelper.cpp | 49 - pstl/.arcconfig | 4 - 553 files changed, 15831 insertions(+), 7723 deletions(-) delete mode 100644 clang-tools-extra/.arcconfig delete mode 100644 clang/.arcconfig create mode 100644 clang/test/Analysis/uninit-asm-goto.cpp create mode 100644 clang/test/CodeGen/static-init.cpp delete mode 100644 compiler-rt/.arcconfig delete mode 100644 debuginfo-tests/.arcconfig create mode 100644 libc/utils/testutils/CMakeLists.txt create mode 100644 libc/utils/testutils/ExecuteFunction.h create mode 100644 libc/utils/testutils/ExecuteFunctionUnix.cpp delete mode 100644 libcxx/.arcconfig create mode 100644 libcxx/include/barrier create mode 100644 libcxx/include/latch create mode 100644 libcxx/include/semaphore create mode 100644 libcxx/src/atomic.cpp create mode 100644 libcxx/src/barrier.cpp create mode 100644 libcxx/test/std/atomics/atomics.types.operations/atomics.types. [...] create mode 100644 libcxx/test/std/atomics/types.pass.cpp create mode 100644 libcxx/test/std/thread/thread.barrier/arrive.pass.cpp create mode 100644 libcxx/test/std/thread/thread.barrier/arrive_and_drop.pass.cpp create mode 100644 libcxx/test/std/thread/thread.barrier/arrive_and_wait.pass.cpp create mode 100644 libcxx/test/std/thread/thread.barrier/completion.pass.cpp copy llvm/bindings/go/src/llvm/version.go => libcxx/test/std/thread/thread.barrier [...] copy llvm/bindings/go/src/llvm/version.go => libcxx/test/std/thread/thread.barrier [...] create mode 100644 libcxx/test/std/thread/thread.latch/arrive_and_wait.pass.cpp create mode 100644 libcxx/test/std/thread/thread.latch/count_down.pass.cpp copy llvm/bindings/go/src/llvm/llvm_dep.go => libcxx/test/std/thread/thread.latch/ [...] create mode 100644 libcxx/test/std/thread/thread.latch/try_wait.pass.cpp copy llvm/bindings/go/src/llvm/llvm_dep.go => libcxx/test/std/thread/thread.latch/ [...] create mode 100644 libcxx/test/std/thread/thread.semaphore/acquire.pass.cpp create mode 100644 libcxx/test/std/thread/thread.semaphore/binary.pass.cpp create mode 100644 libcxx/test/std/thread/thread.semaphore/max.pass.cpp create mode 100644 libcxx/test/std/thread/thread.semaphore/release.pass.cpp create mode 100644 libcxx/test/std/thread/thread.semaphore/timed.pass.cpp create mode 100644 libcxx/test/std/thread/thread.semaphore/try_acquire.pass.cpp copy llvm/bindings/go/src/llvm/version.go => libcxx/test/std/thread/thread.semapho [...] delete mode 100644 libcxxabi/.arcconfig delete mode 100644 libunwind/.arcconfig delete mode 100644 lld/.arcconfig delete mode 100644 lldb/.arcconfig create mode 100644 lldb/test/Shell/Settings/TestLineMarkerColor.test create mode 100644 lldb/test/Shell/SymbolFile/DWARF/dwp-separate-debug-file.cpp delete mode 100644 llvm/.arcconfig create mode 100755 llvm/bindings/go/build.sh rename llvm/bindings/go/{src => }/llvm/IRBindings.cpp (100%) rename llvm/bindings/go/{src => }/llvm/IRBindings.h (100%) rename llvm/bindings/go/{src => }/llvm/InstrumentationBindings.cpp (100%) rename llvm/bindings/go/{src => }/llvm/InstrumentationBindings.h (100%) rename llvm/bindings/go/{src => }/llvm/SupportBindings.cpp (100%) rename llvm/bindings/go/{src => }/llvm/SupportBindings.h (100%) rename llvm/bindings/go/{src => }/llvm/analysis.go (100%) rename llvm/bindings/go/{src => }/llvm/bitreader.go (100%) rename llvm/bindings/go/{src => }/llvm/bitwriter.go (100%) rename llvm/bindings/go/{src => }/llvm/dibuilder.go (100%) rename llvm/bindings/go/{src => }/llvm/executionengine.go (100%) rename llvm/bindings/go/{src => }/llvm/executionengine_test.go (100%) rename llvm/bindings/go/{src => }/llvm/ir.go (99%) rename llvm/bindings/go/{src => }/llvm/ir_test.go (100%) rename llvm/bindings/go/{src => }/llvm/linker.go (100%) rename llvm/bindings/go/{src => }/llvm/llvm_config.go.in (100%) rename llvm/bindings/go/{src => }/llvm/llvm_dep.go (96%) rename llvm/bindings/go/{src => }/llvm/string.go (100%) rename llvm/bindings/go/{src => }/llvm/string_test.go (100%) rename llvm/bindings/go/{src => }/llvm/support.go (100%) rename llvm/bindings/go/{src => }/llvm/target.go (100%) rename llvm/bindings/go/{src => }/llvm/transforms_coroutines.go (100%) rename llvm/bindings/go/{src => }/llvm/transforms_instrumentation.go (100%) rename llvm/bindings/go/{src => }/llvm/transforms_ipo.go (100%) rename llvm/bindings/go/{src => }/llvm/transforms_pmbuilder.go (92%) rename llvm/bindings/go/{src => }/llvm/transforms_scalar.go (100%) rename llvm/bindings/go/{src => }/llvm/version.go (100%) copy llvm/lib/Target/AMDGPU/{AMDGPUPreLegalizerCombiner.cpp => AMDGPUPostLegalizer [...] create mode 100644 llvm/test/CodeGen/AArch64/sve2-intrinsics-crypto.ll create mode 100644 llvm/test/CodeGen/ARM/fp16-bitcast.ll create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/isel-hvx-pred-bitcast.ll create mode 100644 llvm/test/CodeGen/Hexagon/hvx-bitcast-v64i1.ll create mode 100644 llvm/test/CodeGen/Hexagon/store-vector-pred.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-crspill.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix32-crsave.mir create mode 100644 llvm/test/CodeGen/PowerPC/alloca-crspill.ll delete mode 100644 llvm/test/CodeGen/PowerPC/ppc64-alloca-crspill.ll create mode 100644 llvm/test/CodeGen/Thumb2/LowOverheadLoops/it-block-mov.mir create mode 100644 llvm/test/CodeGen/X86/sdiv_fix_sat.ll create mode 100644 llvm/test/CodeGen/X86/udiv_fix_sat.ll create mode 100644 llvm/test/tools/llvm-ml/basic_data.test create mode 100644 mlir/lib/Dialect/LoopOps/Transforms/ParallelLoopTiling.cpp create mode 100644 mlir/test/Dialect/Loops/parallel-loop-tiling.mlir rename mlir/test/{ => lib}/Dialect/CMakeLists.txt (100%) rename mlir/test/{ => lib}/Dialect/SPIRV/CMakeLists.txt (100%) rename mlir/test/{ => lib}/Dialect/SPIRV/TestAvailability.cpp (97%) delete mode 100644 openmp/.arcconfig delete mode 100644 parallel-libs/.arcconfig delete mode 100644 polly/.arcconfig delete mode 100644 pstl/.arcconfig -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (8c509b51 -> 35eddf1a)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig in repository toolchain/ci/base-artifacts. discards 8c509b51 0: update: llvm-linux: all new 35eddf1a 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (8c509b51) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 12664 +++++++++++++++++----------------- 03-build_linux/console.log | 890 ++- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 16 +- console.log | 13802 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 13804 insertions(+), 13808 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[binutils-gdb] branch master updated (70d497007d0 -> 265b467340e)

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[gcc] branch master updated (103bc4db766 -> fe86f537f01)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 103bc4db766 testsuite: Fix recently added ipa testcases [PR93763] new fe86f537f01 Dead code in fortran/simplify.c The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/fortran/ChangeLog | 4 ++++ gcc/fortran/simplify.c | 5 ----- 2 files changed, 4 insertions(+), 5 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-defconfig updated (7f447b44f4e -> be9f8fdfd9a)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-defconfig in repository toolchain/ci/llvm-project. from 7f447b44f4e [docs] Add -Wmisleading-indentation to clang's release notes. adds c1547fe5bc3 ReleaseNotes: OpenMP adds 935ad4036ef ReleaseNotes: Attributor adds f5983993071 ReleaseNotes: ARM and AArch64 adds e82d1342bdf ReleaseNotes: Mention improved DWARF5 support in lldb adds be9f8fdfd9a Add -debug-info-kind=constructor to clang release notes No new revisions were added by this update. Summary of changes: clang/docs/ReleaseNotes.rst | 26 ++++++++++++++++++++++++-- llvm/docs/ReleaseNotes.rst | 23 +++++++++++++++++++++-- 2 files changed, 45 insertions(+), 4 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-defconfig updated (5eb4c9fa -> cce65b17)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards 5eb4c9fa 0: update: llvm-linux: boot new cce65b17 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (5eb4c9fa) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 106 +- 02-build_llvm/console.log | 12662 +++++++++++++++++----------------- 03-build_linux/console.log | 842 ++- 04-boot_linux/console.log | 480 +- 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 29 - console.log | 14129 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 14104 insertions(+), 14162 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig updated (f8788d86ab28 -> 63623fd44972)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig in repository toolchain/ci/linux. from f8788d86ab28 Linux 5.6-rc3 adds 2e90ca68b0d2 floppy: check FDC index for errors before assigning it adds bf4498ad3f9a tmpfs: deny and force are not huge mount options adds bc570c14b260 Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux [...] adds 872d92dec353 tee: amdtee: amdtee depends on CRYPTO_DEV_CCP_DD adds c9cc0517bba9 crypto: chacha20poly1305 - prevent integer overflow on lar [...] adds 7031ecffab86 Merge branch 'linus' of git://git.kernel.org/pub/scm/linux [...] adds ead68df94d24 KVM: x86: enable -Werror adds d970a325561d KVM: x86: fix missing prototypes adds 463bfeeead97 KVM: nVMX: Fix some obsolete comments and grammar error adds 147f1a1fe5d7 KVM: x86: fix incorrect comparison in trace event adds b78a8552d77f kvm/emulate: fix a -Werror=cast-function-type adds 7455a8327674 KVM: x86: don't notify userspace IOAPIC on edge-triggered [...] adds c9dfd3fb0835 KVM: nVMX: Hold KVM's srcu lock when syncing vmcs12->shadow adds 624e18f92f2e KVM: VMX: Add VMX_FEATURE_USR_WAIT_PAUSE adds 93fd9666c269 kvm: x86: svm: Fix NULL pointer dereference when AVIC not enabled adds 91a5f413af59 KVM: nVMX: handle nested posted interrupts when apicv is d [...] adds a4443267800a KVM: nVMX: clear PIN_BASED_POSTED_INTR from nested pinbase [...] adds 23520b2def95 KVM: apic: avoid calculating pending eoi from an uninitial [...] adds d80b64ff297e KVM: SVM: Fix potential memory leak in svm_cpu_init() adds dd58f3c95c98 KVM: fix error handling in svm_hardware_setup adds 5ef8acbdd687 KVM: nVMX: Emulate MTF when performing instruction emulation adds 07721feee46b KVM: nVMX: Don't emulate instructions in guest mode adds e71237d3ff1a KVM: nVMX: Refactor IO bitmap checks into helper function adds 35a571346a94 KVM: nVMX: Check IO instruction VM-exit conditions adds a93236fcbe1d KVM: s390: rstify new ioctls in api.rst adds 63623fd44972 Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt [...] No new revisions were added by this update. Summary of changes: Documentation/virt/kvm/api.rst | 33 +++++----- arch/x86/include/asm/kvm_emulate.h | 13 +++- arch/x86/include/asm/kvm_host.h | 3 +- arch/x86/include/asm/vmx.h | 2 +- arch/x86/include/asm/vmxfeatures.h | 1 + arch/x86/include/uapi/asm/kvm.h | 1 + arch/x86/kvm/Makefile | 1 + arch/x86/kvm/emulate.c | 36 ++++------ arch/x86/kvm/irq_comm.c | 2 +- arch/x86/kvm/lapic.c | 9 ++- arch/x86/kvm/mmutrace.h | 2 +- arch/x86/kvm/svm.c | 65 ++++++++++--------- arch/x86/kvm/vmx/capabilities.h | 1 + arch/x86/kvm/vmx/nested.c | 89 ++++++++++++++++++------- arch/x86/kvm/vmx/nested.h | 10 ++- arch/x86/kvm/vmx/vmx.c | 130 +++++++++++++++++++++++++++++++------ arch/x86/kvm/vmx/vmx.h | 3 + arch/x86/kvm/x86.c | 2 + drivers/block/floppy.c | 7 +- drivers/tee/amdtee/Kconfig | 2 +- include/linux/kvm_host.h | 2 + lib/crypto/chacha20poly1305.c | 3 + mm/shmem.c | 2 - 23 files changed, 293 insertions(+), 126 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

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