Tcwg-commits February 2020

tcwg-commits@lists.linaro.org

5 participants
12772 discussions

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-defconfig updated (0b002688979 -> 07a0e380d62)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-defconfig in repository toolchain/ci/gcc. from 0b002688979 Daily bump. adds 04c71707e03 Update gcc de.po. adds f2ca2088bc3 analyzer: fix -fdump-analyzer adds 267cca3d201 doc: properly describe --enable-checking behavior adds 71837f64ab0 Fix typo: paramter -> parameter [PR93864] adds 7b60f3ba766 c: Small diagnostics tweak - add missing ? after did you me [...] adds 103bc4db766 testsuite: Fix recently added ipa testcases [PR93763] adds fe86f537f01 Dead code in fortran/simplify.c adds 2473c81cb2d pass_manager: Fix ICE with -fdump-passes -fdisable-tree-* [ [...] adds 81c833b311b tree-optimization/93868 copy SLP tree before re-arranging stmts adds 8bc6d0a2da6 doc: minor --enable-checking wording fixes adds 81ef67c10a3 testcase for last_vuse in FRE adds 2877ad9ac28 Fix link failure with debug info in LTO mode adds 5b904f175ff libstdc++: Fix regression in std::move algorithm (PR 93872) adds 6de946e65c9 libstdc++: Add test accidentally left out of previous commit adds 73dc4ae4741 combine: Fix find_split_point handling of constant store in [...] adds a71f2193d0d [ARM] Fix -mpure-code for v6m adds dfb93d05246 Fix ChangeLog date adds 490350a11f8 libstdc++: Remove __memmove wrapper for constexpr algorithms adds eb7ba6c36b8 arm: ACLE intrinsics for bfloat16 dot product adds 7f0f108309a libstdc++: LWG 3292 iota_view is under-constrained adds 510bd1c178f libstdc++: LWG 3301 transform_view::iterator has incorrect [...] adds 55c4b3f4862 libstdc++: LWG 3313 join_view::iterator::operator-- is inco [...] adds ec15da7c330 libstdc++: LWG 3325 Constrain return type of transformation [...] adds 76a8c0f65e2 libstdc++: LWG 3397 basic_istream_view::iterator should not [...] adds 8ea6c1b89a2 aarch64: Add bfloat16 vdup and vreinterpret ACLE intrinsics adds e603cd43b14 aarch64: Add bfloat16 vldn/vstn intrinsics adds 68f8763d57a Correct an attribute access example. adds 9c3da8cc5d0 typo fix: Fix probablity, becuse, sucessor and destinarion [...] adds 07a0e380d62 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 181 + gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 5 + gcc/analyzer/engine.cc | 2 +- gcc/bb-reorder.c | 6 +- gcc/c-family/ChangeLog | 6 + gcc/c-family/c-pragma.c | 2 +- gcc/c/ChangeLog | 6 + gcc/c/gimple-parser.c | 7 +- gcc/cfghooks.c | 4 +- gcc/combine.c | 5 +- gcc/config/aarch64/aarch64-builtins.c | 9 + gcc/config/aarch64/aarch64.c | 2 +- gcc/config/aarch64/arm_neon.h | 980 +++++ gcc/config/aarch64/iterators.md | 32 +- gcc/config/arm/arm.md | 9 + gcc/config/arm/arm_neon.h | 52 + gcc/config/arm/arm_neon_builtins.def | 4 + gcc/config/arm/iterators.md | 2 + gcc/config/arm/neon.md | 48 + gcc/config/arm/thumb1.md | 16 +- gcc/config/lm32/lm32.c | 8 +- gcc/config/sh/sh.c | 2 +- gcc/doc/extend.texi | 2 +- gcc/doc/install.texi | 69 +- gcc/dwarf2out.c | 1 + gcc/fortran/ChangeLog | 13 +- gcc/fortran/intrinsic.texi | 2 +- gcc/fortran/simplify.c | 5 - gcc/fortran/trans-array.c | 6 +- gcc/ipa-prop.h | 2 +- gcc/omp-expand.c | 4 +- gcc/passes.c | 2 + gcc/po/ChangeLog | 4 + gcc/po/de.po | 4161 ++++++++------------ gcc/predict.c | 2 +- gcc/testsuite/ChangeLog | 52 + gcc/testsuite/g++.dg/ipa/pr93763.C | 2 +- gcc/testsuite/gcc.c-torture/execute/pr93908.c | 54 + gcc/testsuite/gcc.dg/decl-1.c | 2 +- gcc/testsuite/gcc.dg/ipa/pr93763.c | 28 +- gcc/testsuite/gcc.dg/pr93874.c | 6 + gcc/testsuite/gcc.dg/torture/pr93868.c | 31 + gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-86.c | 20 + .../aarch64/advsimd-intrinsics/bf16_dup.c | 85 + .../aarch64/advsimd-intrinsics/bf16_reinterpret.c | 466 +++ .../aarch64/advsimd-intrinsics/bf16_vldn.c | 150 + .../aarch64/advsimd-intrinsics/bf16_vstn.c | 107 + gcc/testsuite/gcc.target/arm/simd/bf16_dot_1.c | 100 + gcc/testsuite/gcc.target/arm/simd/bf16_dot_2.c | 33 + gcc/testsuite/gcc.target/arm/simd/bf16_dot_3.c | 33 + gcc/testsuite/gcc.target/s390/pr93908.c | 5 + gcc/testsuite/gfortran.dg/data_array_5.f90 | 2 +- gcc/testsuite/gnat.dg/lto24.adb | 10 + gcc/testsuite/gnat.dg/lto24_pkg1.ads | 17 + gcc/testsuite/gnat.dg/lto24_pkg2.adb | 8 + gcc/testsuite/gnat.dg/lto24_pkg2.ads | 5 + gcc/testsuite/obj-c++.dg/encode-4.mm | 4 +- gcc/testsuite/objc.dg/encode-2.m | 4 +- gcc/tree-ssa-loop-ch.c | 2 +- gcc/tree-vect-slp.c | 50 + libstdc++-v3/ChangeLog | 55 + libstdc++-v3/include/bits/ranges_algobase.h | 120 +- libstdc++-v3/include/bits/stl_algobase.h | 53 +- libstdc++-v3/include/std/ranges | 23 +- .../25_algorithms/copy_backward/constexpr.cc | 18 + .../{copy_backward/constexpr.cc => move/93872.cc} | 25 +- .../constexpr.cc => move_backward/93872.cc} | 25 +- .../ranges/adaptors/lwg3313_neg.cc} | 30 +- .../ranges/adaptors/lwg3325_neg.cc} | 25 +- .../testsuite/std/ranges/adaptors/transform.cc | 24 + .../ranges/iota/lwg3292_neg.cc} | 30 +- libstdc++-v3/testsuite/std/ranges/istream_view.cc | 16 + 73 files changed, 4601 insertions(+), 2782 deletions(-) create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr93908.c create mode 100644 gcc/testsuite/gcc.dg/pr93874.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr93868.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-86.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_dup.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_reinterpret.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vldn.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vstn.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/bf16_dot_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/bf16_dot_2.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/bf16_dot_3.c create mode 100644 gcc/testsuite/gcc.target/s390/pr93908.c create mode 100644 gcc/testsuite/gnat.dg/lto24.adb create mode 100644 gcc/testsuite/gnat.dg/lto24_pkg1.ads create mode 100644 gcc/testsuite/gnat.dg/lto24_pkg2.adb create mode 100644 gcc/testsuite/gnat.dg/lto24_pkg2.ads copy libstdc++-v3/testsuite/25_algorithms/{copy_backward/constexpr.cc => move/9387 [...] copy libstdc++-v3/testsuite/25_algorithms/{copy_backward/constexpr.cc => move_back [...] copy libstdc++-v3/testsuite/{25_algorithms/copy_backward/constexpr.cc => std/range [...] copy libstdc++-v3/testsuite/{25_algorithms/copy_backward/constexpr.cc => std/range [...] copy libstdc++-v3/testsuite/{25_algorithms/copy_backward/constexpr.cc => std/range [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-defconfig updated (a60419c8c9 -> dc1e8a474f)

by git＠git.linaro.org

5 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-defconfig updated (65e846f3 -> 57fd725e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-defconfig in repository toolchain/ci/base-artifacts. discards 65e846f3 0: update: binutils-gcc-linux: boot new 57fd725e 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (65e846f3) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 162 +- 02-prepare_abe/console.log | 438 +- 03-build_abe-binutils/console.log | 11897 +++++++------- 04-build_abe-stage1/console.log | 15796 +++++++++--------- 05-build_linux/console.log | 2826 ++-- 06-boot_linux/console.log | 400 +- 07-check_regression/console.log | 7 +- 08-update_baseline/console.log | 7 +- console.log | 31533 ++++++++++++++++++------------------ jenkins/manifest.sh | 18 +- regressions.txt | 4 + 11 files changed, 31645 insertions(+), 31443 deletions(-) create mode 100644 regressions.txt -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (63623fd44972 -> c5f86891185c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/linux. from 63623fd44972 Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt [...] adds d3f703c4359f mips: vdso: fix 'jalr t9' crash in vdso code adds 07015d7a103c MIPS: Disable VDSO time functionality on microMIPS adds 976c23af3ee5 mips: vdso: add build time check that no 'jalr t9' calls left adds 97e914b7de3c MIPS: cavium_octeon: Fix syncw generation. adds bef8e2dfceed MIPS: VPE: Fix a double free and a memory leak in 'release_vpe()' adds 72cf3b3df423 MIPS: vdso: Wrap -mexplicit-relocs in cc-option adds eb41113870c9 MIPS: X1000: Fix clock of watchdog node. adds 11479e8e3cd8 MIPS: ingenic: DTS: Fix watchdog nodes adds 3234f4ed3066 MAINTAINERS: Hand MIPS over to Thomas adds d67f250e9634 Merge branch 'mips-fixes' of git://git.kernel.org/pub/scm/ [...] adds c68a9032299e riscv: set pmp configuration if kernel is running in M-mode adds 6a1ce99dc4bd RISC-V: Don't enable all interrupts in trap_init() adds e7167043ee50 riscv: Fix gitignore adds a0a31fd84f8f riscv: allocate a complete page size for each page table adds 8458ca147c20 riscv: adjust the indent adds c5f86891185c Merge tag 'riscv-for-linux-5.6-rc4' of git://git.kernel.or [...] No new revisions were added by this update. Summary of changes: CREDITS | 5 ++++ MAINTAINERS | 6 ++-- arch/mips/boot/dts/ingenic/jz4740.dtsi | 17 ++++++----- arch/mips/boot/dts/ingenic/jz4780.dtsi | 17 ++++++----- arch/mips/boot/dts/ingenic/x1000.dtsi | 6 ++-- arch/mips/include/asm/sync.h | 4 ++- arch/mips/kernel/vpe.c | 2 +- arch/mips/vdso/Makefile | 28 ++++++++++++++++-- arch/riscv/boot/.gitignore | 2 ++ arch/riscv/include/asm/csr.h | 12 ++++++++ arch/riscv/kernel/head.S | 6 ++++ arch/riscv/kernel/traps.c | 4 +-- arch/riscv/mm/kasan_init.c | 53 ++++++++++++++++++++-------------- 13 files changed, 109 insertions(+), 53 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (e34ddc09f46 -> b653ab0e701)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/llvm-project. from e34ddc09f46 [arcconfig] Delete subproject arcconfigs adds 03dd205c151 Adjust max_align_t handling adds 4e45ef4d77b Prefer PATH_MAX to MAXPATHLEN adds fe210a1ff2e [MLIR] Add std.atomic_rmw op adds 888b12b270f [polly] Don't count scops in a global variable. adds 082f1a3b159 My prevous commit to RegisterContextLLDB is causing a test [...] adds 248eaff8237 [AArch64] SVE implies fullfp16 adds 5522e8296fc [NFC] Cleaned up ASTMatchersInternal Code adds 11e3dde6252 GlobalISel: Reimplement fewerElementsVectorBasic adds 0b46b078b65 AMDGPU/GlobalISel: Fix incorrect VOP3P fneg folding adds 226bddce458 [DebugInfo]: Refactored Macinfo section consumption part to [...] adds 23c2a5ce33f Allow "callbr" to return non-void values adds 50cac248773 Support output constraints on "asm goto" adds b3bce6a3ddb [MachineVerifier] Doing ::calcRegsPassed over faster sets: [...] adds d5a4fa05146 Revert "My prevous commit to RegisterContextLLDB is causing [...] adds 4fdd2edbdb4 Revert "Unwind past an interrupt handler correctly on arm o [...] adds fee41517fe0 AMDGPU/GlobalISel: Introduce post-legalize combiner adds 1612d382418 GlobalISel: Remove unneeded initialiation adds 2c0edbf19c1 [Attributor] Use AssumptionCache in AANonNullFloating::initialize adds 35a06145357 [lldb/Utility] Fix unspecified behavior. adds 84c3d3f37a2 [Sparc][NFC] Remove trailing space adds c08a1c7071c [lldb] Mark ObjectFileBreakpad test inputs as non-text adds 55d4b0d7dd7 [lldb] Fix that a crashing test is marked as unsupported wh [...] adds 3e9a7b2ba47 [ASTMatchers] Matcher macros with params move params instea [...] adds 6a0c066c610 [ASTMatchers] Adds a matcher called `hasAnyOperatorName` adds 9238dfb4d80 [X86] Remove mask output from X86 gather/scatter ISD opcodes. adds 89ba4acad6c [X86] Pass parameters into selectVectorAddr to remove depen [...] adds 29e2cb87491 [libc] [UnitTest] Give UnitTest gtest like colors adds ea6b95dc2f6 [lldb][NFC] Make ArrayRef initialization more obvious in ll [...] adds eefbff0082c [lldb] s/CHECK-NEXT/CHECK-DAG in dwp-debug-types.s adds 27c89ced811 [NFC][PowerPC] Add a new test case scalar_cmp.ll adds 05d174d3015 [lldb][NFC] Move namespace lookup in ClangASTSource to own [...] adds 814fb658ca2 libclc: cmake configure should depend on file list adds dc78190811b AMDGPU/GlobalISel: add legalize tests for s64 max/min adds ccee390767c GlobalISel: NFC minor cleanup to avoid a couple of fixed si [...] adds 62c7d840265 [profile] gcov_mutex must be static adds dcd89b3de6d Add llvm-cov to LLVM_TOOLCHAIN_TOOLS adds bd2df13ee0f [DebugInfo] Fix printing CIE offsets in EH FDEs. adds 9fd7ce7f444 [analyzer][MallocChecker][NFC] Communicate the allocation f [...] adds 72848f26b43 [AArch64][SVE] Add predicate reinterpret intrinsics adds 157b3d505f6 [yaml2obj] - Address post commit comments for D74764 adds 7a7eacc797f [MLIR][GPU] Implement a simple greedy loop mapper. adds decd021facb Don't generate libcalls for wide shift on Windows ARM (PR42711) adds 00d4814f499 [mlir] Generalize intrinsic builders in the LLVM dialect de [...] adds 3a1b34ff69b [mlir] Intrinsics generator: use TableGen-defined builder function adds 5f9b543e8e3 [mlir] simplify affine maps and operands in affine.min/max adds fc0d11c9042 [lldb][NFC] Modernize logging in ClangASTSource/ExpressionDeclMap adds cff90c938b7 [AArch64][SVE] Update names and comments for gathers/scatte [...] adds e4e122aa1d5 [MLIR][GPU] Fix forward declaration of Region class. adds 4486aa03c5f build_llvm_package.bat: Produce zip files in addition to th [...] adds 555d5ad85a4 [clangd] Disable ExtractVariable for C adds defd0e24aa0 [lldb][NFC] Move NameSearchContext to own header/source files adds 2ad7b6fba0e [lldb][NFC] Make NameSearchContext::m_found members bools i [...] adds 60a2db5986a Remove myself from CODE_OWNERS. adds 3950093951f [gn build] (manually) merge fee41517fe0f adds 93b6e192408 [lldb] Initialize NameSearchContext::m_namespace_map in con [...] adds bdb24faa2af [lldb][NFC] Move filling namespace map in ClangASTSource to [...] adds 0a3b0837915 [debuginfo-tests] Warn, not error, if we can't delete worki [...] adds 305320b0057 [mlir] NFC: move AffineOps tests from test/ to test/Dialect adds 5e6d7246335 [MLIR][GPU] Properly model step in parallel loop to gpu con [...] adds b8d638d337e [DSE,MSSA] Do not attempt to remove un-removable memdefs. adds 10ea01d80d6 [VectorCombine] make cost calc consistent for binops and cmps adds e0568ef2c5c [VectorCombine] add tests for possible extract->shuffle; NFC adds 7b6168e7bef [ASTImporter] Improved variable template redecl chain handling. adds 770ad9f55e6 [Analyzer] Fix for iterator modeling and checkers: handle n [...] adds f452f7b95a8 [PhaseOrdering] add test for missing vector/CSE transforms [...] adds 83f4372f3a7 [CodeGen] fix clang test that runs the optimizer pipeline; NFC adds 7d91fd23dfa [mlir] NFC: update documentation in ConvertLinalgToLLVM adds 91f7f0d8e3e [RISCV] Fix sysroot tests without GCC on RISC-V hosts with GCC adds edae4be8e21 Fix DfaEmitter::visitDfaState() crash in MSVC x86 debug bui [...] adds 2bd6974aaa6 [clang-format] Wrap lines for C# property accessors adds e16e267bb6e [OpenMP][cmake] ignore warning on unknown CUDA version adds dc383f07b08 Stop including sys/param.h from Unix.h adds e09754ccefc [clangd] Migrate Lexer usages in TypeHierarchy to TokenBuffers adds e5513336aee [analyzer][MallocChecker][NFC] Change the use of Identifier [...] adds bcda1269c4c clang-cl: Add a `/showIncludes:user` flag. adds ab96ec41ead [AMDGPU] Precommit some test updates for D68338 "Remove dub [...] adds fc466f87804 Make test not write to the source directory adds 425ef999385 [NFC][InstCombine] Add shift amount reassociation miscompil [...] adds 781d077afb0 [InstCombine] reassociateShiftAmtsOfTwoSameDirectionShifts( [...] adds 6f807ca00d9 [NFC][InstCombine] Add shift amount reassociation in bittes [...] adds 2855c8fed93 [InstCombine] foldShiftIntoShiftInAnotherHandOfAndInICmp(): [...] adds ec1efe71130 [LLDB] Let DataExtractor deal with two-byte addresses adds deb116ee0a5 [DWARFDebugLine] Avoid dumping prologue members we did not parse adds a82ffe9d93a [analyzer] Add support for CXXInheritedCtorInitExpr. adds e6d0bad843c [clang-rename] Add the USR of incomplete decl to the USRSet. adds 93331a17e8b [ELF] Support archive:file syntax in input section descriptions adds 33cbd5ee080 AMDGPU/GlobalISel: Legalize s64 min/max by lowering adds 7b65886ec2d Make builtbot happy. adds fa755d3e71e [Sema][C++] Propagate conversion kind to specialize the dia [...] adds 11857d49948 [remark][diagnostics] [codegen] Fix PR44896 adds 86e13ec194a AMDGPU/GlobalISel: Use packed for G_ADD/G_SUB/G_MUL v2s16 adds ab41129b1ee [libc++] Proper fix for libc++'s modulemap after D68480 adds 7c2f4a83708 [libc++] Revert 03dd205c151 "Adjust max_align_t handling" adds c66db211650 AMDGPU/GlobalISel: Un-XFAIL a test adds 69da4003310 Revert "[DWARFDebugLine] Avoid dumping prologue members we [...] adds 14845b2c459 Revert "[LICM] Support hosting of dynamic allocas out of loops" adds bf6d94f1598 [libc++] Remove incorrect XFAIL in modules test adds 342eca29749 [NFC][Codegen] Add miscompile test for constant store mergi [...] adds d20907d1de8 [Codegen] Revert rL354676/rL354677 and followups - introduc [...] adds eb1c040b413 [PowerPC][NFC] Remove comments mentioning Darwin and VRSAVE [...] adds a12f1d6a52a [MachineInstr] Add a dumpr method adds eee22ec3c37 [X86MCTargetDesc.h] Speculative fix for macro collision wit [...] adds a57d9652a0d Make __builtin_amdgcn_dispatch_ptr dereferenceable and align at 4 adds 7f3afd480d9 Emit register names in cfi assembly directives adds 915b4aa1392 Support emitting .cfi_undefined in CodeGen adds 481b1c83802 [AMDGPU] Implement wave64 DWARF register mapping adds 3cd13c4624b Fix a race between lldb's packet timeout and the profile th [...] adds 922558be9ec [PhaseOrdering] add tests for missed CSE; NFC adds e3add3e5a19 [libcxx] Fix building for windows after 54fa9ecd3088508 adds e11f9fb4508 Add 'l' constraint to goto label reference adds 0789f280483 [NFC][SCEV] Piping to pass TTI into SCEVExpander::isHighCos [...] adds b99c91a0872 [NFC][SCEV] Piping to pass new SCEVCheapExpansionBudget opt [...] adds 1622f3e074c [NFC][SCEV] SCEVExpander::isHighCostExpansionHelper(): chec [...] adds 2d8275d72e1 [SCEV] SCEVExpander::isHighCostExpansion(): assert if TTI i [...] adds f90973f4864 [SCEV] SCEVExpander::isHighCostExpansionHelper(): begin cos [...] adds b8793f0dabc [SCEV] SCEVExpander::isHighCostExpansionHelper(): cost-mode [...] adds b8abdf9a176 [NFC][IndVarSimplify] Adjust value names in IndVarSimplify/ [...] adds cc29600b908 [SCEV] SCEVExpander::isHighCostExpansionHelper(): cost-mode [...] adds 756af2f88bd [SCEV] SCEVExpander::isHighCostExpansionHelper(): cost-mode [...] adds 0f3c9b54e60 [SCEV] SCEVExpander::isHighCostExpansionHelper(): cost-mode [...] adds d6f47aeb519 [SCEV] SCEVExpander::isHighCostExpansionHelper(): cost-mode [...] adds 44edc6fd2c6 [SCEV] rewriteLoopExitValues(): even if have hard uses, sti [...] adds 400ceda425a [SCEV][IndVars] Always provide insertion point to the SCEVE [...] adds 6d0d1a63f2a Use "nop" to avoid size warnings. adds 6201f6601de Check args passed to __builtin_frame_address and __builtin_ [...] adds c5ce6d8b561 [X86] Add test to show incorrect ordering of flt.rounds int [...] adds 63cef621f95 [LIBOMPTARGET]Fix PR44933: fix crash because of the too ear [...] adds 430512ed7d7 [ObjC][ARC] Don't move a retain call living outside a loop [...] adds 9c54f6154f7 [libTooling] Add function to determine associated text of a [...] adds 0906dca493b [WebAssembly] Simplify extract_vector lowering adds 396b7253944 [OpenMP][Opt] Combine `struct ident_t*` during deduplication adds 6d2372ce584 [llvm][TextAPI] rename test vars, NFC adds b8fdafe68ce [Sema] Perform call checking when building CXXNewExpr adds 3dd5a298bff [clang] Annotating C++'s `operator new` with more attributes adds 8594f3d8990 Revert "[X86MCTargetDesc.h] Speculative fix for macro colli [...] adds 3b5530cf964 [libc++] Avoid including <semaphore.h> on Apple adds 4b2b8b96db2 Re-land Unwind past an interrupt handler correctly on arm o [...] adds b3e6487f02a [mlir][DenseElementsAttr] Fix storage size for bfloat16 whe [...] new b051cc93278 [NFC][libc++] Refactor some future tests to reduce code dup [...] new 3cefebc3fe1 [mlir] [VectorOps] Add vector.print to EDSC new 5bf0023b0d7 [GISel][KnownBits] Update a comment regarding the effect of [...] new 0e480b39c66 Revert "[libTooling] Add function to determine associated t [...] new 828fb0c51ad Fix a null dereference in the LLDB data formatters. new b7aa1cc3a43 [ORC] Remove the JITDylib::SymbolTableEntry::isInMaterializ [...] new 28d38a25e96 Remove std::shared_ptr::allocate_shared new 735d27dc406 [SelectionDAG][PowerPC][AArch64][X86][ARM] Add chain input [...] new 5517d3b80b1 [compiler-rt] Fix a typo in a comment in FuzzedDataProvider.h. new 8a310f40d0a Remove namespace lld { namespace coff { from COFF LLD cpp files new b653ab0e701 [docs] dump-ast-matchers removes const from Matcher args an [...] The 11 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/XRefs.cpp | 52 +- .../clangd/refactor/tweaks/ExtractVariable.cpp | 4 + clang-tools-extra/clangd/test/type-hierarchy.test | 6 +- clang-tools-extra/clangd/unittests/RenameTests.cpp | 7 + clang-tools-extra/clangd/unittests/TweakTests.cpp | 8 + clang/docs/LanguageExtensions.rst | 28 + clang/docs/LibASTMatchersReference.html | 126 ++- clang/docs/tools/dump_ast_matchers.py | 52 +- clang/include/clang/AST/Decl.h | 9 +- clang/include/clang/AST/Stmt.h | 10 +- clang/include/clang/ASTMatchers/ASTMatchers.h | 13 + .../clang/ASTMatchers/ASTMatchersInternal.h | 41 + .../include/clang/ASTMatchers/ASTMatchersMacros.h | 58 +- clang/include/clang/Analysis/AnyCall.h | 9 + clang/include/clang/Analysis/ConstructionContext.h | 5 +- clang/include/clang/Basic/DiagnosticDriverKinds.td | 3 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 148 +++ clang/include/clang/Basic/Features.def | 1 + clang/include/clang/Driver/CLCompatOptions.td | 5 +- clang/include/clang/Sema/Sema.h | 7 + .../StaticAnalyzer/Core/PathSensitive/CallEvent.h | 120 ++- .../StaticAnalyzer/Core/PathSensitive/ExprEngine.h | 10 +- clang/lib/AST/ASTImporter.cpp | 52 +- clang/lib/AST/Decl.cpp | 12 +- clang/lib/AST/Stmt.cpp | 4 +- clang/lib/ASTMatchers/ASTMatchersInternal.cpp | 41 +- clang/lib/ASTMatchers/Dynamic/Registry.cpp | 1 + clang/lib/Analysis/RetainSummaryManager.cpp | 1 + clang/lib/Analysis/UninitializedValues.cpp | 15 + clang/lib/CodeGen/CGBuiltin.cpp | 15 + clang/lib/CodeGen/CGCall.cpp | 7 + clang/lib/CodeGen/CGStmt.cpp | 21 +- clang/lib/CodeGen/CodeGenAction.cpp | 3 + clang/lib/CodeGen/CodeGenModule.cpp | 9 - clang/lib/Driver/ToolChains/Clang.cpp | 26 +- clang/lib/Format/UnwrappedLineFormatter.cpp | 65 ++ clang/lib/Frontend/DependencyFile.cpp | 11 +- clang/lib/Frontend/HeaderIncludeGen.cpp | 7 +- clang/lib/Parse/ParseStmtAsm.cpp | 6 - clang/lib/Sema/SemaChecking.cpp | 10 +- clang/lib/Sema/SemaDecl.cpp | 73 ++ clang/lib/Sema/SemaExpr.cpp | 94 +- clang/lib/Sema/SemaExprCXX.cpp | 88 +- clang/lib/Sema/SemaStmtAsm.cpp | 4 +- .../lib/StaticAnalyzer/Checkers/InterCheckerAPI.h | 12 +- clang/lib/StaticAnalyzer/Checkers/Iterator.cpp | 27 +- .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 645 +++++------- clang/lib/StaticAnalyzer/Core/CallEvent.cpp | 41 +- clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 8 +- clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp | 107 +- .../Core/ExprEngineCallAndReturn.cpp | 9 +- clang/lib/StaticAnalyzer/Core/SymbolManager.cpp | 5 + .../Refactoring/Rename/USRFindingAction.cpp | 8 +- clang/test/AST/ast-dump-stmt-json.cpp | 90 ++ .../test/Analysis/cxx-inherited-ctor-init-expr.cpp | 59 ++ clang/test/Analysis/iterator-modelling.cpp | 42 + clang/test/Analysis/kmalloc-linux.c | 55 +- clang/test/Analysis/malloc-annotations.cpp | 99 ++ clang/test/Analysis/new-ctor-malloc.cpp | 1 + clang/test/Analysis/new-ctor-null-throw.cpp | 2 + clang/test/Analysis/new-ctor-null.cpp | 2 + clang/test/Analysis/osobject-retain-release.cpp | 15 + clang/test/Analysis/uninit-asm-goto.cpp | 10 + clang/test/CXX/conv/conv.fctptr/p1.cpp | 2 +- clang/test/CXX/drs/dr3xx.cpp | 2 +- clang/test/CXX/except/except.handle/p16.cpp | 4 +- clang/test/CXX/expr/p13.cpp | 2 +- .../test/CXX/temp/temp.spec/temp.expl.spec/p19.cpp | 2 +- .../test/CXX/temp/temp.spec/temp.explicit/p10.cpp | 2 +- clang/test/CXX/temp/temp.spec/temp.explicit/p9.cpp | 8 +- clang/test/CodeGen/PR44896.ll | 15 + clang/test/CodeGen/asm-goto.c | 95 +- clang/test/CodeGen/complex-math.c | 5 +- clang/test/CodeGen/static-init.cpp | 4 +- clang/test/CodeGenCUDA/builtins-amdgcn.cu | 4 +- .../test/CodeGenCXX/align-avx-complete-objects.cpp | 4 +- clang/test/CodeGenCXX/arm.cpp | 18 +- clang/test/CodeGenCXX/builtin-calling-conv.cpp | 12 +- .../CodeGenCXX/builtin-is-constant-evaluated.cpp | 4 +- .../CodeGenCXX/builtin-operator-new-delete.cpp | 11 +- .../cxx0x-initializer-stdinitializerlist.cpp | 3 +- .../CodeGenCXX/cxx11-initializer-array-new.cpp | 7 +- clang/test/CodeGenCXX/cxx1z-aligned-allocation.cpp | 22 +- clang/test/CodeGenCXX/delete-two-arg.cpp | 8 +- clang/test/CodeGenCXX/dllexport.cpp | 4 +- clang/test/CodeGenCXX/dllimport.cpp | 4 +- clang/test/CodeGenCXX/exceptions.cpp | 22 +- clang/test/CodeGenCXX/goto.cpp | 2 +- .../CodeGenCXX/microsoft-abi-array-cookies.cpp | 6 +- clang/test/CodeGenCXX/mips-size_t-ptrdiff_t.cpp | 12 +- clang/test/CodeGenCXX/multi-dim-operator-new.cpp | 7 +- clang/test/CodeGenCXX/new-alias.cpp | 2 +- clang/test/CodeGenCXX/new-array-init.cpp | 14 +- clang/test/CodeGenCXX/new-overflow.cpp | 18 +- clang/test/CodeGenCXX/new.cpp | 62 +- clang/test/CodeGenCXX/operator-new.cpp | 24 +- clang/test/CodeGenCXX/runtime-dllstorage.cpp | 7 +- clang/test/CodeGenCXX/static-init.cpp | 2 +- clang/test/CodeGenCoroutines/coro-alloc.cpp | 10 +- clang/test/CodeGenCoroutines/coro-cleanup.cpp | 2 +- clang/test/CodeGenCoroutines/coro-gro-nrvo.cpp | 4 +- clang/test/CodeGenCoroutines/coro-gro.cpp | 2 +- clang/test/CodeGenCoroutines/coro-return.cpp | 4 +- clang/test/CodeGenObjCXX/arc-new-delete.mm | 16 +- clang/test/CodeGenObjCXX/copy.mm | 2 +- clang/test/CodeGenOpenCL/builtins-amdgcn.cl | 2 +- clang/test/Driver/cl-options.c | 10 +- clang/test/Driver/riscv32-toolchain-extra.c | 1 + clang/test/Driver/riscv64-toolchain-extra.c | 1 + clang/test/Frontend/print-header-includes.c | 27 +- clang/test/OpenMP/PR44893.c | 15 + clang/test/OpenMP/allocate_allocator_messages.cpp | 2 +- clang/test/Parser/asm-goto.c | 63 +- clang/test/Parser/asm-goto.cpp | 94 +- clang/test/Preprocessor/headermap-rel2.c | 7 +- clang/test/Sema/asm-goto.cpp | 22 +- clang/test/Sema/block-call.c | 2 +- clang/test/Sema/block-return.c | 2 +- clang/test/Sema/builtin-stackaddress.c | 26 +- clang/test/Sema/callingconv-ms_abi.c | 4 +- clang/test/Sema/callingconv-sysv_abi.c | 4 +- clang/test/Sema/callingconv.c | 2 +- clang/test/Sema/overloadable.c | 6 +- clang/test/Sema/pass-object-size.c | 4 +- clang/test/Sema/preserve-call-conv.c | 8 +- clang/test/SemaCXX/addr-of-overloaded-function.cpp | 6 +- clang/test/SemaCXX/builtin-operator-new-delete.cpp | 2 +- clang/test/SemaCXX/decl-microsoft-call-conv.cpp | 2 +- clang/test/SemaCXX/diagnose_if.cpp | 7 +- clang/test/SemaCXX/goto.cpp | 2 +- clang/test/SemaCXX/int-ptr-cast-SFINAE.cpp | 2 +- clang/test/SemaCXX/ms-property-error.cpp | 2 +- clang/test/SemaCXX/new-delete.cpp | 12 +- .../test/SemaCXX/operator-new-size-diagnose_if.cpp | 24 + .../SemaCXX/std-align-val-t-in-operator-new.cpp | 6 +- clang/test/SemaObjC/arc.m | 3 +- clang/test/SemaObjC/comptypes-legal.m | 2 +- clang/test/SemaObjCXX/arc-type-conversion.mm | 8 +- clang/test/SemaObjCXX/comptypes-1.mm | 24 +- clang/test/SemaObjCXX/comptypes-7.mm | 32 +- clang/test/SemaObjCXX/instantiate-expr.mm | 12 +- clang/test/SemaObjCXX/instantiate-stmt.mm | 2 +- clang/test/SemaObjCXX/noescape.mm | 2 +- clang/test/SemaObjCXX/nullability-pragmas.mm | 28 +- .../test/SemaObjCXX/objc-container-subscripting.mm | 2 +- .../test/SemaObjCXX/parameterized_classes_subst.mm | 106 +- clang/test/SemaObjCXX/property-invalid-type.mm | 2 +- .../SemaOpenCL/address-spaces-conversions-cl2.0.cl | 12 +- clang/test/SemaOpenCL/address-spaces.cl | 50 +- clang/test/SemaTemplate/extern-templates.cpp | 4 +- .../test/SemaTemplate/instantiate-member-class.cpp | 4 +- clang/test/SemaTemplate/member-access-expr.cpp | 2 +- clang/test/SemaTemplate/temp_arg_nontype.cpp | 2 +- .../unittests/AST/ASTImporterGenericRedeclTest.cpp | 40 + .../ASTMatchers/ASTMatchersTraversalTest.cpp | 25 + clang/unittests/Format/FormatTestCSharp.cpp | 37 +- clang/unittests/Rename/RenameClassTest.cpp | 3 +- compiler-rt/include/fuzzer/FuzzedDataProvider.h | 2 +- compiler-rt/lib/profile/GCDAProfiling.c | 4 +- .../dexter/dex/utils/WorkingDirectory.py | 10 +- libc/utils/UnitTest/Test.cpp | 9 +- libclc/CMakeLists.txt | 10 + libcxx/include/__threading_support | 77 +- libcxx/include/barrier | 6 +- libcxx/include/latch | 6 +- libcxx/include/memory | 39 +- libcxx/include/semaphore | 6 +- libcxx/test/libcxx/modules/stds_include.sh.cpp | 32 + .../futures/futures.unique_future/wait.pass.cpp | 66 +- .../futures.unique_future/wait_for.pass.cpp | 73 +- lld/COFF/DebugTypes.cpp | 25 +- lld/COFF/InputFiles.cpp | 15 +- lld/COFF/LTO.cpp | 8 +- lld/COFF/MapFile.cpp | 10 +- lld/COFF/MinGW.cpp | 10 +- lld/COFF/PDB.cpp | 18 +- lld/COFF/Writer.cpp | 10 +- lld/ELF/LinkerScript.cpp | 2 +- lld/test/ELF/eh-frame-hdr-augmentation.s | 2 +- lld/test/ELF/linkerscript/input-archive.s | 32 + lldb/include/lldb/lldb-forward.h | 1 - .../Plugins/ExpressionParser/Clang/CMakeLists.txt | 1 + .../ExpressionParser/Clang/ClangASTSource.cpp | 364 ++----- .../ExpressionParser/Clang/ClangASTSource.h | 115 +-- .../Clang/ClangExpressionDeclMap.cpp | 159 ++- .../ExpressionParser/Clang/NameSearchContext.cpp | 179 ++++ .../ExpressionParser/Clang/NameSearchContext.h | 124 +++ .../Process/Utility/RegisterContextLLDB.cpp | 37 +- lldb/source/Utility/DataExtractor.cpp | 14 +- lldb/source/Utility/Stream.cpp | 5 +- lldb/test/API/lldbtest.py | 8 +- .../profile_vrs_detach}/Makefile | 0 .../profile_vrs_detach/TestDetachVrsProfile.py | 76 ++ lldb/test/API/macosx/profile_vrs_detach/main.c | 11 + .../ObjectFile/Breakpad/Inputs/.gitattributes | 1 + lldb/test/Shell/SymbolFile/DWARF/dwp-debug-types.s | 12 +- lldb/tools/debugserver/source/MacOSX/MachProcess.h | 9 +- .../tools/debugserver/source/MacOSX/MachProcess.mm | 38 +- lldb/tools/lldb-test/lldb-test.cpp | 2 +- .../Expression/ClangExpressionDeclMapTest.cpp | 4 +- lldb/unittests/Utility/DataExtractorTest.cpp | 33 + llvm/CODE_OWNERS.TXT | 4 - llvm/cmake/modules/AddLLVM.cmake | 1 + llvm/docs/LangRef.rst | 29 +- .../llvm/Analysis/ScalarEvolutionExpander.h | 30 +- .../include/llvm/CodeGen/GlobalISel/CallLowering.h | 2 +- llvm/include/llvm/CodeGen/ISDOpcodes.h | 1 + llvm/include/llvm/CodeGen/MachineBasicBlock.h | 33 + llvm/include/llvm/CodeGen/MachineInstr.h | 8 + llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h | 10 +- .../include/llvm/DebugInfo/DWARF/DWARFDebugFrame.h | 11 +- llvm/include/llvm/ExecutionEngine/Orc/Core.h | 5 - llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h | 4 +- llvm/include/llvm/IR/IntrinsicsAArch64.td | 54 +- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 1 - llvm/include/llvm/Transforms/Utils/LoopUtils.h | 5 +- .../include/llvm/Transforms/Utils/SimplifyIndVar.h | 7 +- llvm/include/llvm/Transforms/Utils/UnrollLoop.h | 25 +- llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 207 +++- llvm/lib/AsmParser/LLParser.cpp | 3 - llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp | 3 + llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 10 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 108 +- llvm/lib/CodeGen/MachineBasicBlock.cpp | 6 +- llvm/lib/CodeGen/MachineInstr.cpp | 32 + llvm/lib/CodeGen/MachineVerifier.cpp | 197 +++- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 27 - llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 1 + .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 15 +- .../CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 63 ++ .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 19 +- llvm/lib/DebugInfo/DWARF/DWARFContext.cpp | 28 +- llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp | 12 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 19 +- llvm/lib/IR/Verifier.cpp | 2 - llvm/lib/MC/MCAsmStreamer.cpp | 11 +- llvm/lib/ObjectYAML/ELFEmitter.cpp | 2 - llvm/lib/Support/Unix/Path.inc | 20 +- llvm/lib/Support/Unix/Unix.h | 4 - llvm/lib/Target/AArch64/AArch64.td | 2 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 134 ++- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 2 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 77 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 2 + llvm/lib/Target/AMDGPU/AMDGPUCombine.td | 9 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 24 +- ...ombiner.cpp => AMDGPUPostLegalizerCombiner.cpp} | 81 +- .../Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp | 116 +-- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 7 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 1 + llvm/lib/Target/AMDGPU/CMakeLists.txt | 5 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 4 + .../Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h | 1 + .../AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp | 2 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 44 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 16 +- llvm/lib/Target/ARM/MVETailPredication.cpp | 2 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 21 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 3 +- llvm/lib/Target/Sparc/LeonFeatures.td | 16 +- llvm/lib/Target/Sparc/Sparc.td | 6 +- llvm/lib/Target/Sparc/SparcInstrAliases.td | 4 +- llvm/lib/Target/Sparc/SparcInstrFormats.td | 2 +- llvm/lib/Target/Sparc/SparcInstrInfo.td | 32 +- llvm/lib/Target/Sparc/SparcRegisterInfo.td | 4 +- .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 67 +- .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 106 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 48 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 50 +- llvm/lib/Transforms/IPO/Attributor.cpp | 7 +- llvm/lib/Transforms/IPO/OpenMPOpt.cpp | 71 ++ .../Transforms/InstCombine/InstCombineCompares.cpp | 20 +- .../Transforms/InstCombine/InstCombineShifts.cpp | 24 +- llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp | 9 + .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 6 + llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 12 +- llvm/lib/Transforms/Scalar/LICM.cpp | 45 - .../lib/Transforms/Scalar/LoopUnrollAndJamPass.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp | 2 +- llvm/lib/Transforms/Utils/LoopUnroll.cpp | 10 +- llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp | 17 +- llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp | 17 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 23 +- llvm/lib/Transforms/Utils/SimplifyIndVar.cpp | 23 +- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 8 +- llvm/test/CodeGen/AArch64/ldst-paired-aliasing.ll | 31 +- .../CodeGen/AArch64/sve-intrinsics-reinterpret.ll | 84 ++ llvm/test/CodeGen/AArch64/sve-vector-splat.ll | 2 +- .../AMDGPU/GlobalISel/artifact-combiner-zext.mir | 23 +- .../AMDGPU/GlobalISel/combine-ashr-narrow.mir | 2 +- .../AMDGPU/GlobalISel/combine-lshr-narrow.mir | 2 +- .../AMDGPU/GlobalISel/combine-shl-narrow.mir | 2 +- llvm/test/CodeGen/AMDGPU/GlobalISel/fmax_legacy.ll | 21 + llvm/test/CodeGen/AMDGPU/GlobalISel/fmin_legacy.ll | 21 + .../CodeGen/AMDGPU/GlobalISel/inst-select-and.mir | 20 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-or.mir | 20 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir | 20 +- .../CodeGen/AMDGPU/GlobalISel/legalize-add.mir | 212 +++- .../CodeGen/AMDGPU/GlobalISel/legalize-and.mir | 57 +- .../CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir | 35 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir | 118 ++- .../CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir | 49 +- .../AMDGPU/GlobalISel/legalize-fcanonicalize.mir | 34 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fma.mir | 64 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir | 49 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir | 118 ++- .../CodeGen/AMDGPU/GlobalISel/legalize-mul.mir | 212 +++- .../test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir | 57 +- .../CodeGen/AMDGPU/GlobalISel/legalize-smax.mir | 36 +- .../CodeGen/AMDGPU/GlobalISel/legalize-smin.mir | 36 +- .../CodeGen/AMDGPU/GlobalISel/legalize-sub.mir | 212 +++- .../CodeGen/AMDGPU/GlobalISel/legalize-umax.mir | 36 +- .../CodeGen/AMDGPU/GlobalISel/legalize-umin.mir | 36 +- .../CodeGen/AMDGPU/GlobalISel/legalize-xor.mir | 57 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll | 6 +- .../GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll | 4 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll | 9 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll | 6 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll | 6 +- .../GlobalISel/llvm.amdgcn.struct.buffer.load.ll | 1 - .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll | 9 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll | 6 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll | 6 +- llvm/test/CodeGen/AMDGPU/GlobalISel/mul.v2i16.ll | 88 ++ llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll | 61 +- llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll | 28 +- llvm/test/CodeGen/AMDGPU/add.v2i16.ll | 4 +- llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll | 4 +- llvm/test/CodeGen/AMDGPU/fneg-combines.ll | 22 +- llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll | 4 +- llvm/test/CodeGen/AMDGPU/global_smrd.ll | 8 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.ll | 2 +- llvm/test/CodeGen/AMDGPU/load-hi16.ll | 25 +- llvm/test/CodeGen/AMDGPU/mad_64_32.ll | 2 +- llvm/test/CodeGen/AMDGPU/sad.ll | 8 +- .../CodeGen/AMDGPU/select-fabs-fneg-extract.ll | 16 +- llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll | 12 +- llvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll | 4 +- llvm/test/CodeGen/AMDGPU/wave32.ll | 8 +- llvm/test/CodeGen/ARM/shift_minsize.ll | 8 +- llvm/test/CodeGen/PowerPC/constant-combines.ll | 8 +- llvm/test/CodeGen/PowerPC/scalar_cmp.ll | 1063 ++++++++++++++++++++ llvm/test/CodeGen/PowerPC/sjlj.ll | 3 +- llvm/test/CodeGen/SPARC/2013-05-17-CallFrame.ll | 4 +- llvm/test/CodeGen/SPARC/exception.ll | 8 +- llvm/test/CodeGen/SPARC/reserved-regs.ll | 2 + .../SPARC/umulo-128-legalisation-lowering.ll | 4 +- llvm/test/CodeGen/WebAssembly/simd-arith.ll | 32 +- llvm/test/CodeGen/WebAssembly/simd-sext-inreg.ll | 105 +- llvm/test/CodeGen/WebAssembly/simd.ll | 8 +- llvm/test/CodeGen/X86/callbr-asm-outputs.ll | 162 ++- llvm/test/CodeGen/X86/callbr-asm.ll | 2 +- llvm/test/CodeGen/X86/constant-combines.ll | 3 +- llvm/test/CodeGen/X86/flt-rounds.ll | 162 +++ llvm/test/CodeGen/X86/lifetime-alias.ll | 10 +- llvm/test/CodeGen/X86/pr40631_deadstore_elision.ll | 3 +- llvm/test/CodeGen/X86/stores-merging.ll | 25 +- llvm/test/DebugInfo/AMDGPU/print-reg-name.s | 10 + llvm/test/DebugInfo/AMDGPU/register-mapping.s | 37 + llvm/test/DebugInfo/AMDGPU/variable-locations.ll | 2 +- llvm/test/DebugInfo/RISCV/eh-frame.s | 2 +- .../DebugInfo/X86/debug_frame-invalid-cie-offset.s | 14 + llvm/test/MC/Mips/eh-frame.s | 6 +- llvm/test/MC/X86/return-column.s | 2 +- llvm/test/Transforms/Attributor/nonnull.ll | 4 +- .../MSSA/atomic-overlapping.ll | 25 + .../DeadStoreElimination/MSSA/atomic-todo.ll | 44 + .../Transforms/DeadStoreElimination/MSSA/atomic.ll | 33 - .../DeadStoreElimination/MSSA/memset-and-memcpy.ll | 3 +- ...{dont-recompute.ll => do-recompute-if-cheap.ll} | 33 +- llvm/test/Transforms/IndVarSimplify/elim-extend.ll | 20 +- .../IndVarSimplify/eliminate-comparison.ll | 17 +- .../Transforms/IndVarSimplify/eliminate-trunc.ll | 73 +- .../Transforms/IndVarSimplify/exit_value_test2.ll | 40 +- .../Transforms/IndVarSimplify/full_widening.ll | 8 +- llvm/test/Transforms/IndVarSimplify/iv-widen.ll | 16 +- .../Transforms/IndVarSimplify/lftr-multi-exit.ll | 12 +- llvm/test/Transforms/IndVarSimplify/lftr-reuse.ll | 8 +- .../IndVarSimplify/loop-invariant-conditions.ll | 22 +- .../IndVarSimplify/lrev-existing-umin.ll | 3 +- llvm/test/Transforms/IndVarSimplify/pr28705.ll | 6 +- llvm/test/Transforms/IndVarSimplify/pr39673.ll | 12 +- .../Transforms/IndVarSimplify/widen-loop-comp.ll | 75 +- .../shift-amount-reassociation-in-bittest.ll | 20 + .../InstCombine/shift-amount-reassociation.ll | 18 + llvm/test/Transforms/LICM/hoist-alloca.ll | 168 ---- .../LoopVectorize/X86/float-induction-x86.ll | 74 +- llvm/test/Transforms/ObjCARC/cfg-hazards.ll | 42 + llvm/test/Transforms/OpenMP/deduplication.ll | 223 ++++ llvm/test/Transforms/OpenMP/gtid.ll | 86 -- llvm/test/Transforms/PhaseOrdering/X86/addsub.ll | 119 +++ .../PhaseOrdering}/X86/lit.local.cfg | 0 .../Transforms/VectorCombine/X86/extract-binop.ll | 71 +- .../Transforms/VectorCombine/X86/extract-cmp.ll | 39 + .../llvm-dwarfdump/X86/debug_frame_GNU_args_size.s | 2 +- .../llvm-dwarfdump/X86/debug_frame_offset.test | 2 +- llvm/test/tools/llvm-objdump/eh_frame-arm64.test | 2 +- llvm/test/tools/llvm-objdump/eh_frame-coff.test | 2 +- llvm/test/tools/llvm-objdump/eh_frame-mipsel.test | 2 +- .../tools/yaml2obj/ELF/section-address-assign.yaml | 58 +- .../unittests/CodeGen/GlobalISel/KnownBitsTest.cpp | 45 + .../unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp | 2 +- llvm/unittests/TextAPI/TextStubV1Tests.cpp | 246 +++-- llvm/unittests/TextAPI/TextStubV2Tests.cpp | 238 +++-- llvm/unittests/TextAPI/TextStubV3Tests.cpp | 334 +++--- llvm/unittests/Transforms/Utils/UnrollLoopTest.cpp | 5 +- llvm/utils/TableGen/DFAEmitter.cpp | 11 +- llvm/utils/TableGen/DFAEmitter.h | 2 +- .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 15 +- llvm/utils/lldbDataFormatters.py | 4 +- llvm/utils/release/build_llvm_package.bat | 13 +- .../mlir/Conversion/LoopsToGPU/LoopsToGPUPass.h | 8 + mlir/include/mlir/Dialect/AffineOps/AffineOps.td | 12 + mlir/include/mlir/Dialect/GPU/ParallelLoopMapper.h | 50 + mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td | 130 ++- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 78 +- mlir/include/mlir/Dialect/LoopOps/LoopOps.td | 3 + mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 63 ++ .../mlir/Dialect/VectorOps/EDSC/Intrinsics.h | 1 + mlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp | 6 +- mlir/lib/Conversion/LoopsToGPU/LoopsToGPU.cpp | 126 +-- mlir/lib/Conversion/LoopsToGPU/LoopsToGPUPass.cpp | 25 + .../StandardToLLVM/ConvertStandardToLLVM.cpp | 184 +++- mlir/lib/Dialect/AffineOps/AffineOps.cpp | 24 +- mlir/lib/Dialect/GPU/CMakeLists.txt | 1 + .../Dialect/GPU/Transforms/ParallelLoopMapper.cpp | 89 ++ mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 38 +- mlir/lib/Parser/Parser.cpp | 6 +- mlir/test/Conversion/LoopsToGPU/parallel_loop.mlir | 287 +++--- .../StandardToLLVM/convert-to-llvmir.mlir | 40 + .../test/{ => Dialect}/AffineOps/canonicalize.mlir | 18 +- mlir/test/{ => Dialect}/AffineOps/dma.mlir | 0 mlir/test/{ => Dialect}/AffineOps/inlining.mlir | 0 mlir/test/{ => Dialect}/AffineOps/invalid.mlir | 0 .../AffineOps/load-store-invalid.mlir | 0 mlir/test/{ => Dialect}/AffineOps/load-store.mlir | 0 .../AffineOps/memref-stride-calculation.mlir | 0 mlir/test/{ => Dialect}/AffineOps/ops.mlir | 0 mlir/test/Dialect/GPU/mapping.mlir | 61 ++ mlir/test/IR/core-ops.mlir | 7 + mlir/test/IR/dense-elements-hex.mlir | 3 + mlir/test/IR/invalid-ops.mlir | 24 + mlir/test/lib/Transforms/CMakeLists.txt | 1 + .../lib/Transforms/TestGpuParallelLoopMapping.cpp | 38 + mlir/test/mlir-tblgen/llvm-intrinsics.td | 18 +- mlir/tools/mlir-opt/mlir-opt.cpp | 2 + mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp | 49 +- openmp/libomptarget/src/api.cpp | 10 +- openmp/libomptarget/src/device.cpp | 13 +- openmp/libomptarget/src/interface.cpp | 14 +- openmp/libomptarget/src/omptarget.cpp | 44 +- openmp/libomptarget/src/rtl.cpp | 75 +- openmp/libomptarget/src/rtl.h | 12 +- .../test/offloading/dynamic_module_load.c | 34 + openmp/runtime/cmake/LibompCheckLinkerFlag.cmake | 3 +- polly/include/polly/ScopDetection.h | 3 + polly/include/polly/ScopInfo.h | 12 +- polly/lib/Analysis/ScopBuilder.cpp | 3 +- polly/lib/Analysis/ScopInfo.cpp | 17 +- 461 files changed, 10491 insertions(+), 4766 deletions(-) create mode 100644 clang/test/Analysis/cxx-inherited-ctor-init-expr.cpp create mode 100644 clang/test/Analysis/malloc-annotations.cpp create mode 100644 clang/test/Analysis/uninit-asm-goto.cpp create mode 100644 clang/test/CodeGen/PR44896.ll create mode 100644 clang/test/OpenMP/PR44893.c create mode 100644 clang/test/SemaCXX/operator-new-size-diagnose_if.cpp create mode 100644 libcxx/test/libcxx/modules/stds_include.sh.cpp create mode 100644 lld/test/ELF/linkerscript/input-archive.s create mode 100644 lldb/source/Plugins/ExpressionParser/Clang/NameSearchContext.cpp create mode 100644 lldb/source/Plugins/ExpressionParser/Clang/NameSearchContext.h copy lldb/test/API/{commands/expression/dont_allow_jit => macosx/profile_vrs_detac [...] create mode 100644 lldb/test/API/macosx/profile_vrs_detach/TestDetachVrsProfile.py create mode 100644 lldb/test/API/macosx/profile_vrs_detach/main.c create mode 100644 lldb/test/Shell/ObjectFile/Breakpad/Inputs/.gitattributes copy llvm/lib/Target/AMDGPU/{AMDGPUPreLegalizerCombiner.cpp => AMDGPUPostLegalizer [...] create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-reinterpret.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/mul.v2i16.ll create mode 100644 llvm/test/CodeGen/PowerPC/scalar_cmp.ll create mode 100644 llvm/test/DebugInfo/AMDGPU/print-reg-name.s create mode 100644 llvm/test/DebugInfo/AMDGPU/register-mapping.s create mode 100644 llvm/test/DebugInfo/X86/debug_frame-invalid-cie-offset.s create mode 100644 llvm/test/Transforms/DeadStoreElimination/MSSA/atomic-overlapping.ll create mode 100644 llvm/test/Transforms/DeadStoreElimination/MSSA/atomic-todo.ll rename llvm/test/Transforms/IndVarSimplify/{dont-recompute.ll => do-recompute-if-c [...] delete mode 100644 llvm/test/Transforms/LICM/hoist-alloca.ll create mode 100644 llvm/test/Transforms/OpenMP/deduplication.ll delete mode 100644 llvm/test/Transforms/OpenMP/gtid.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/X86/addsub.ll copy llvm/test/{Analysis/CostModel => Transforms/PhaseOrdering}/X86/lit.local.cfg (100%) create mode 100644 mlir/include/mlir/Dialect/GPU/ParallelLoopMapper.h create mode 100644 mlir/lib/Dialect/GPU/Transforms/ParallelLoopMapper.cpp rename mlir/test/{ => Dialect}/AffineOps/canonicalize.mlir (98%) rename mlir/test/{ => Dialect}/AffineOps/dma.mlir (100%) rename mlir/test/{ => Dialect}/AffineOps/inlining.mlir (100%) rename mlir/test/{ => Dialect}/AffineOps/invalid.mlir (100%) rename mlir/test/{ => Dialect}/AffineOps/load-store-invalid.mlir (100%) rename mlir/test/{ => Dialect}/AffineOps/load-store.mlir (100%) rename mlir/test/{ => Dialect}/AffineOps/memref-stride-calculation.mlir (100%) rename mlir/test/{ => Dialect}/AffineOps/ops.mlir (100%) create mode 100644 mlir/test/Dialect/GPU/mapping.mlir create mode 100644 mlir/test/lib/Transforms/TestGpuParallelLoopMapping.cpp create mode 100644 openmp/libomptarget/test/offloading/dynamic_module_load.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (996023bf -> f1fade2d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards 996023bf 0: update: llvm-linux: all new f1fade2d 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (996023bf) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-build_llvm/console.log | 12662 +++++++++++++++++------------------ 03-build_linux/console.log | 684 +- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 7 +- 06-update_baseline/console.log | 7 +- console.log | 13528 +++++++++++++++++++------------------- jenkins/manifest.sh | 14 +- regressions.txt | 2 + 9 files changed, 13547 insertions(+), 13525 deletions(-) create mode 100644 regressions.txt -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allmodconfig updated (be9f8fdfd9a -> 668b8a4bcd0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allmodconfig in repository toolchain/ci/llvm-project. from be9f8fdfd9a Add -debug-info-kind=constructor to clang release notes adds c6f940b745c Add llvm-cov to LLVM_TOOLCHAIN_TOOLS adds 882720b7ce3 Don't generate libcalls for wide shift on Windows ARM (PR42711) adds 3a11c86849c Add Control Flow Guard in Clang release notes. adds bbfdf4b81d6 build_llvm_package.bat: Produce zip files in addition to th [...] adds 2905a48c879 Fix DfaEmitter::visitDfaState() crash in MSVC x86 debug bui [...] adds 1f6c9becd57 [docs] clangd release notes adds 668b8a4bcd0 [docs][WebAssembly] WebAssembly-specific release notes for 10.0. No new revisions were added by this update. Summary of changes: clang-tools-extra/docs/ReleaseNotes.rst | 45 ++++++++++++++++++++++++++++++- clang/docs/ReleaseNotes.rst | 9 +++++++ lld/docs/ReleaseNotes.rst | 1 + llvm/cmake/modules/AddLLVM.cmake | 1 + llvm/docs/ReleaseNotes.rst | 7 ++++- llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 +- llvm/test/CodeGen/ARM/shift_minsize.ll | 8 +++++- llvm/utils/TableGen/DFAEmitter.cpp | 11 +++++--- llvm/utils/TableGen/DFAEmitter.h | 2 +- llvm/utils/release/build_llvm_package.bat | 13 ++++++++- 10 files changed, 89 insertions(+), 10 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allmodconfig updated (1fd8278c -> 1eac78ed)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards 1fd8278c 0: update: llvm-linux: 16 new 1eac78ed 0: update: llvm-linux: 16 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1fd8278c) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 124 +- 02-build_llvm/console.log | 12678 +++++++++++++++++------------------ 03-build_linux/console.log | 844 ++- 05-check_regression/console.log | 51 +- 06-update_baseline/console.log | 67 +- console.log | 13764 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- regressions.txt | 11 + 8 files changed, 13788 insertions(+), 13761 deletions(-) create mode 100644 regressions.txt -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_O3 updated (066184a282b -> 7edf9fa1c5f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_O3 in repository toolchain/ci/gcc. from 066184a282b rs6000: Fix infinite loop building ghostscript and icu [PR93658] adds 8389fcc4c12 Avoid collect2 calling signal unsafe functions and/or unlin [...] adds ba740092516 fortran: ICE using SHAPE with FINDLOC PR93835 adds f9be6e10c96 vect: Fix offset calculation for -ve strides [PR93767] adds 788483065b4 Daily bump. adds 468664e1b78 doc: backport proper description of --enable-checking behavior adds a6b74eaedf6 Fix link failure with debug info in LTO mode adds eeb31391b7f combine: Fix find_split_point handling of constant store in [...] adds 9c5db942ca3 ARM: Add support for -mpure-code in thumb-1 (v6m) adds 7edf9fa1c5f ARM: Fix -mpure-code for v6m No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 63 ++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/collect2.c | 9 ++- gcc/combine.c | 5 +- gcc/config/arm/arm-protos.h | 1 + gcc/config/arm/arm.c | 88 +++++++++++++++++++--- gcc/config/arm/arm.h | 8 +- gcc/config/arm/arm.md | 9 +++ gcc/config/arm/thumb1.md | 85 +++++++++++++++++---- gcc/doc/install.texi | 69 +++++++++-------- gcc/doc/invoke.texi | 3 +- gcc/dwarf2out.c | 1 + gcc/fortran/simplify.c | 12 ++- gcc/testsuite/ChangeLog | 41 ++++++++++ gcc/testsuite/gcc.c-torture/execute/pr93908.c | 54 +++++++++++++ gcc/testsuite/gcc.dg/vect/pr93767.c | 13 ++++ gcc/testsuite/gcc.target/arm/pr45701-1.c | 2 +- gcc/testsuite/gcc.target/arm/pr45701-2.c | 2 +- .../gcc.target/arm/pure-code/no-literal-pool.c | 14 +++- .../gcc.target/arm/pure-code/pure-code.exp | 9 +-- gcc/testsuite/gcc.target/arm/thumb1-Os-mult.c | 1 + gcc/testsuite/gcc.target/s390/pr93908.c | 5 ++ gcc/testsuite/gfortran.dg/pr77351.f90 | 6 +- gcc/testsuite/gfortran.dg/pr93835.f08 | 8 ++ gcc/testsuite/gnat.dg/lto24.adb | 10 +++ gcc/testsuite/gnat.dg/lto24_pkg1.ads | 17 +++++ gcc/testsuite/gnat.dg/lto24_pkg2.adb | 8 ++ gcc/testsuite/gnat.dg/lto24_pkg2.ads | 5 ++ gcc/tree-vect-data-refs.c | 4 +- 29 files changed, 474 insertions(+), 80 deletions(-) create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr93908.c create mode 100644 gcc/testsuite/gcc.dg/vect/pr93767.c create mode 100644 gcc/testsuite/gcc.target/s390/pr93908.c create mode 100644 gcc/testsuite/gfortran.dg/pr93835.f08 create mode 100644 gcc/testsuite/gnat.dg/lto24.adb create mode 100644 gcc/testsuite/gnat.dg/lto24_pkg1.ads create mode 100644 gcc/testsuite/gnat.dg/lto24_pkg2.adb create mode 100644 gcc/testsuite/gnat.dg/lto24_pkg2.ads -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_O3 updated (72ce9cc0 -> c8a82bfd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_O3 in repository toolchain/ci/base-artifacts. discards 72ce9cc0 0: update: gcc-066184a282b622ac6880150eb4e42fe57881b606: 1 new c8a82bfd 0: update: gcc-7edf9fa1c5f0e05c22e1d719658ed903fe2b44f4: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (72ce9cc0) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-release-aarch64- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 129 +- 02-prepare_abe/console.log | 430 +- 03-build_abe-bootstrap_O3/console.log | 66228 +++++++++++++++---------------- 05-check_regression/console.log | 25 +- 06-update_baseline/console.log | 35 +- console.log | 66849 ++++++++++++++++---------------- jenkins/manifest.sh | 10 +- regressions.txt | 9 + 8 files changed, 66889 insertions(+), 66826 deletions(-) create mode 100644 regressions.txt -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits February 2020