Tcwg-commits February 2020

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig updated (42330a681a -> aa66aac47b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig in repository toolchain/ci/binutils-gdb. from 42330a681a gdb/tui: Disassembler scrolling of very small programs adds fd9faca826 Fix ravenscar-thread.c for multi-target adds c3036ed063 aarch64: Fix MOVPRFX markup for bf16 conversions adds 825bd36cea x86: drop unused EXVexWdq / vex_w_dq_mode adds 4102be5cf9 x86: replace EXxmm_mdq by EXVexWdqScalar adds 53943f32cc Updated translations for some of the binutils sub-directories adds 90e9955aef [ARM]: Add support for vldmia/vldmdb/vstmia/vstmdb instructi [...] adds d26cc8a9d6 Fix compile time build problem building the s390 assembler. adds 9216914510 arm: PR gas/25472 Enable DSP instructions with +mve adds d465d69579 Add missing ChangeLog for last patch adds 95441c43cc nios2: recognize %gotoff relocation in assembler adds e7cbe0c4a4 nios2: Add BFD support for GOT-relative DW_EH_PE_datarel encodings adds 195a8287c1 [gdb/testsuite] Fix typo in gdb.server/server-kill-python.exp adds 0ae34fc20a Automatic date update in version.in adds aa66aac47b gdb: Do not print empty-group regs when printing general ones No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 5 + bfd/elf-eh-frame.c | 1 + bfd/version.h | 2 +- binutils/ChangeLog | 4 + binutils/po/sv.po | 3994 +++++++------ gas/ChangeLog | 45 + gas/config/tc-arm.c | 24 +- gas/config/tc-nios2.c | 40 +- gas/config/tc-s390.c | 2 +- gas/po/fr.po | 6915 ++++++++++++---------- gas/po/ru.po | 6918 +++++++++++++---------- gas/testsuite/gas/aarch64/sve-bfloat-movprfx.d | 2 +- gas/testsuite/gas/aarch64/sve-bfloat-movprfx.s | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_28.d | 31 + gas/testsuite/gas/aarch64/sve-movprfx_28.l | 8 + gas/testsuite/gas/aarch64/sve-movprfx_28.s | 45 + gas/testsuite/gas/arm/mve-ldst.d | 43 + gas/testsuite/gas/arm/mve-ldst.s | 13 + gas/testsuite/gas/arm/mve_dsp.d | 140 + gdb/ChangeLog | 10 + gdb/ravenscar-thread.c | 3 +- gdb/target-descriptions.c | 13 +- gdb/testsuite/ChangeLog | 4 + gdb/testsuite/gdb.server/server-kill-python.exp | 2 +- opcodes/ChangeLog | 20 + opcodes/aarch64-tbl.h | 4 +- opcodes/i386-dis-evex-prefix.h | 40 +- opcodes/i386-dis.c | 18 +- 28 files changed, 10426 insertions(+), 7922 deletions(-) create mode 100644 gas/testsuite/gas/aarch64/sve-movprfx_28.d create mode 100644 gas/testsuite/gas/aarch64/sve-movprfx_28.l create mode 100644 gas/testsuite/gas/aarch64/sve-movprfx_28.s create mode 100644 gas/testsuite/gas/arm/mve-ldst.d create mode 100644 gas/testsuite/gas/arm/mve-ldst.s create mode 100644 gas/testsuite/gas/arm/mve_dsp.d -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig updated (d887e22c -> 77353a0f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards d887e22c 0: update: binutils-gcc-linux: all new 77353a0f 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (d887e22c) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-prepare_abe/console.log | 440 +- 03-build_abe-binutils/console.log | 11905 ++++++------- 04-build_abe-stage1/console.log | 14135 ++++++++-------- 05-build_linux/console.log | 5954 +++---- 06-boot_linux/console.log | 6 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 32608 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 10 files changed, 32649 insertions(+), 32581 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk_tk1/gnu-release-arm-spec2k6-Os_LTO updated (568968edb0c -> bf4ee21e21b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/gnu-release-arm-spec2k6-Os_LTO in repository toolchain/ci/gcc. from 568968edb0c Daily bump. adds a708cb25d92 [AArch64] Fix shrinkwrapping interactions with atomics (PR92692) adds 2ceb5aba64e c++: Bogus error using namespace alias [PR91826] adds 83f65674e78 Daily bump. adds 7db777843cc c++: Fix ICE with lambda in member operator (PR93279) adds dcb23017b1a c++: Fix array of char typedef in template (PR90966). adds 9d4d55a52d4 c++: Function declared with typedef with eh-specification. adds 1c7061c7c35 c++: Allow template rvalue-ref conv to bind to lvalue ref. adds 50a42922d35 Daily bump. adds a1f8dca201e [AArch64] PR92424: Fix -fpatchable-function-entry=N,M with BTI adds c6613dd33ce Daily bump. adds 9d9679132e0 c++: Drop alignas restriction for stack variables. adds afb84a42ad8 RISC-V: Disallow regrenme if the TO register never used bef [...] adds 6957d3e4eef Fix ICE in pa_elf_select_rtx_section. adds 6da4411d950 Daily bump. adds bf4ee21e21b Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 44 +++++++++++++++ gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 5 ++ gcc/c-family/c-attribs.c | 62 +--------------------- gcc/config/aarch64/aarch64.c | 37 +++++++++++++ gcc/config/aarch64/aarch64.h | 1 + gcc/config/aarch64/atomics.md | 18 +++---- gcc/config/pa/pa.c | 2 +- gcc/config/riscv/riscv-protos.h | 2 + gcc/config/riscv/riscv.c | 13 +++++ gcc/config/riscv/riscv.h | 2 + gcc/cp/ChangeLog | 21 ++++++++ gcc/cp/call.c | 2 + gcc/cp/decl.c | 1 + gcc/cp/name-lookup.c | 38 ++++++++----- gcc/cp/pt.c | 13 ++++- gcc/testsuite/ChangeLog | 17 ++++++ gcc/testsuite/g++.dg/cpp0x/alignas17.C | 14 +++++ gcc/testsuite/g++.dg/cpp0x/initlist-array10.C | 14 +++++ .../g++.dg/cpp0x/lambda/lambda-template16.C | 15 ++++++ gcc/testsuite/g++.dg/cpp0x/rv-conv3.C | 15 ++++++ gcc/testsuite/g++.dg/cpp1z/noexcept-type22.C | 6 +++ gcc/testsuite/g++.dg/lookup/pr91826.C | 16 ++++++ gcc/testsuite/gcc.target/aarch64/pr92424-2.c | 12 +++++ gcc/testsuite/gcc.target/aarch64/pr92424-3.c | 12 +++++ gcc/testsuite/gcc.target/riscv/pr93304.c | 19 +++++++ 26 files changed, 318 insertions(+), 85 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/alignas17.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/initlist-array10.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-template16.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/rv-conv3.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/noexcept-type22.C create mode 100644 gcc/testsuite/g++.dg/lookup/pr91826.C create mode 100644 gcc/testsuite/gcc.target/aarch64/pr92424-2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/pr92424-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/pr93304.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk_tk1/gnu-release-arm-spec2k6-Os_LTO updated (a00805ef97 -> 4dd834659f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/gnu-release-arm-spec2k6-Os_LTO in repository toolchain/ci/binutils-gdb. from a00805ef97 This is a series of backports for binutils 2.33 which addres [...] adds 2a8719fecd AArch64: Fix cfinv disassembly issues adds 4dd834659f arm: PR gas/25472 Enable DSP instructions with +mve No new revisions were added by this update. Summary of changes: gas/ChangeLog | 20 + gas/config/tc-arm.c | 14 +- gas/testsuite/gas/aarch64/armv8_4-a.d | 1 + gas/testsuite/gas/aarch64/armv8_4-a.s | 3 + gas/testsuite/gas/arm/{arch7em.d => mve_dsp.d} | 6 +- opcodes/ChangeLog | 11 + opcodes/aarch64-asm-2.c | 174 +- opcodes/aarch64-dis-2.c | 2364 ++++++++++++------------ opcodes/aarch64-opc-2.c | 16 +- opcodes/aarch64-tbl.h | 9 +- 10 files changed, 1332 insertions(+), 1286 deletions(-) copy gas/testsuite/gas/arm/{arch7em.d => mve_dsp.d} (98%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_tk1/gnu-release-arm-spec2k6-Os_LTO updated (ecb28a4f -> 8202ae96)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/gnu-release-arm-spec2k6-Os_LTO in repository toolchain/ci/base-artifacts. discards ecb28a4f 2: update: binutils-gcc-glibc: 1 new 8202ae96 2: update: binutils-gcc-glibc: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (ecb28a4f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk_tk1/gnu-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 139 +- 02-prepare_abe/console.log | 434 +- 03-build_abe-binutils/console.log | 11258 +- 04-build_abe-stage1/console.log | 17947 ++- 05-build_abe-linux/console.log | 292 +- 06-build_abe-glibc/console.log | 38199 +++---- 07-build_abe-stage2/console.log | 43942 ++++---- 09-benchmark--Os_LTO_mthumb/benchmark-start.log | 2 +- 09-benchmark--Os_LTO_mthumb/benchmark.log | 41 +- 09-benchmark--Os_LTO_mthumb/console.log | 139 +- 10-check_regression/console.log | 2825 +- 10-check_regression/results-0.csv | 2013 +- 10-check_regression/results-1.csv | 1978 +- 10-check_regression/results-brief.csv | 30 + 10-check_regression/results-compare.csv | 84 - 10-check_regression/results-full.csv | 1990 +- 10-check_regression/results.csv | 156 +- 10-check_regression/results.log | 4491 +- 11-update_baseline/console.log | 5655 +- 11-update_baseline/extra-bisect-params | 2 +- 11-update_baseline/results-0.csv | 1786 +- 11-update_baseline/results-1.csv | 1978 +- 11-update_baseline/results-brief.csv | 30 + 11-update_baseline/results-compare.csv | 63 - 11-update_baseline/results-full.csv | 1974 +- 11-update_baseline/results.csv | 154 +- 11-update_baseline/results.log | 2881 +- console.log | 120854 ++++++++++----------- jenkins/manifest.sh | 16 +- results_id | 2 +- 30 files changed, 120959 insertions(+), 140396 deletions(-) create mode 100644 10-check_regression/results-brief.csv create mode 100644 11-update_baseline/results-brief.csv -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu/gnu-release-arm-bootstrap_O1 updated (568968edb0c -> bf4ee21e21b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-arm-bootstrap_O1 in repository toolchain/ci/gcc. from 568968edb0c Daily bump. adds a708cb25d92 [AArch64] Fix shrinkwrapping interactions with atomics (PR92692) adds 2ceb5aba64e c++: Bogus error using namespace alias [PR91826] adds 83f65674e78 Daily bump. adds 7db777843cc c++: Fix ICE with lambda in member operator (PR93279) adds dcb23017b1a c++: Fix array of char typedef in template (PR90966). adds 9d4d55a52d4 c++: Function declared with typedef with eh-specification. adds 1c7061c7c35 c++: Allow template rvalue-ref conv to bind to lvalue ref. adds 50a42922d35 Daily bump. adds a1f8dca201e [AArch64] PR92424: Fix -fpatchable-function-entry=N,M with BTI adds c6613dd33ce Daily bump. adds 9d9679132e0 c++: Drop alignas restriction for stack variables. adds afb84a42ad8 RISC-V: Disallow regrenme if the TO register never used bef [...] adds 6957d3e4eef Fix ICE in pa_elf_select_rtx_section. adds 6da4411d950 Daily bump. adds bf4ee21e21b Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 44 +++++++++++++++ gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 5 ++ gcc/c-family/c-attribs.c | 62 +--------------------- gcc/config/aarch64/aarch64.c | 37 +++++++++++++ gcc/config/aarch64/aarch64.h | 1 + gcc/config/aarch64/atomics.md | 18 +++---- gcc/config/pa/pa.c | 2 +- gcc/config/riscv/riscv-protos.h | 2 + gcc/config/riscv/riscv.c | 13 +++++ gcc/config/riscv/riscv.h | 2 + gcc/cp/ChangeLog | 21 ++++++++ gcc/cp/call.c | 2 + gcc/cp/decl.c | 1 + gcc/cp/name-lookup.c | 38 ++++++++----- gcc/cp/pt.c | 13 ++++- gcc/testsuite/ChangeLog | 17 ++++++ gcc/testsuite/g++.dg/cpp0x/alignas17.C | 14 +++++ gcc/testsuite/g++.dg/cpp0x/initlist-array10.C | 14 +++++ .../g++.dg/cpp0x/lambda/lambda-template16.C | 15 ++++++ gcc/testsuite/g++.dg/cpp0x/rv-conv3.C | 15 ++++++ gcc/testsuite/g++.dg/cpp1z/noexcept-type22.C | 6 +++ gcc/testsuite/g++.dg/lookup/pr91826.C | 16 ++++++ gcc/testsuite/gcc.target/aarch64/pr92424-2.c | 12 +++++ gcc/testsuite/gcc.target/aarch64/pr92424-3.c | 12 +++++ gcc/testsuite/gcc.target/riscv/pr93304.c | 19 +++++++ 26 files changed, 318 insertions(+), 85 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/alignas17.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/initlist-array10.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-template16.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/rv-conv3.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/noexcept-type22.C create mode 100644 gcc/testsuite/g++.dg/lookup/pr91826.C create mode 100644 gcc/testsuite/gcc.target/aarch64/pr92424-2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/pr92424-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/pr93304.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-release-arm-bootstrap_O1 updated (8f1bb8a2 -> 460e373c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-arm-bootstrap_O1 in repository toolchain/ci/base-artifacts. discards 8f1bb8a2 0: update: gcc-568968edb0cc9d9c54d6f143cd47a3a11e3f0ddf: 1 new 460e373c 0: update: gcc-bf4ee21e21be13928c5c492959183f7bb6560b1c: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (8f1bb8a2) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-release-arm-boot [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 404 +- 03-build_abe-bootstrap_O1/console.log | 88032 +++++++++++++++---------------- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 2 +- console.log | 88566 ++++++++++++++++---------------- jenkins/manifest.sh | 10 +- 7 files changed, 88572 insertions(+), 88572 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig updated (42f36563ef6 -> 2d33dcfe9f0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig in repository toolchain/ci/gcc. from 42f36563ef6 analyzer: add extrinsic_state::dump adds 95607c12363 Zero-initialise masked load destinations adds 45eb3e4944b analyzer: further fixes for comparisons between uncomparabl [...] adds 182ce042e73 calls.c: refactor special_function_p for use by analyzer (v2) adds c63ae7f0b8b Fix fast-math-pr55281.c ICE adds e60b1e23626 middle-end: Fix logical shift truncation (PR rtl-optimizati [...] adds 6a97d9eae45 [Fortran] Disable front-end optimization for OpenACC atomic [...] adds 5a28e2727f7 [amdgcn] Scale number of threads/workers with VGPR usage adds 828573a5735 Fix TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling. adds b92709388b9 Fix conditional add LRA failure for amdgcn adds 6e5a196399d libstdc++: Always return a sentinel<I> from __gnu_test::tes [...] adds 2171a9207f5 aarch64: Fix SVE PCS failures for BE & ILP32 adds 3669677425f aarch64: Add Armv8.6 SVE matrix multiply support adds 02fcd8ac408 aarch64: Add svbfloat16_t support to arm_sve.h adds 896dff99e18 aarch64: Add Armv8.6 SVE bfloat16 support adds 5910b14503d testsuite: Fix up pr91838.C test [PR91838] adds 455f58ec504 analyzer: fix ICE with pointers between stack frames (PR 93438) adds f1c807e887d analyzer: fix ICE getting void return value (PR 93379) adds 2a07345c4f8 Fix for PR 91333 - suboptimal register allocation for i [...] adds 09bea5845a5 analyzer: fix ICE handling void-type (PR 93373) adds 6775172431a analyzer: fix ICE with 'const void *' (PR 93457) adds d2b9548f38c c++: Reduce memory consumption for large static arrays. adds e98ebda074b c++: Reduce memory consumption for arrays of non-aggregate type. adds 00a49cd840f c++: Fix sizeof VLA lambda capture. adds d1a80303866 Daily bump. adds 20fa702b32c Fixes after recent configure changes relating to static libraries adds 2d33dcfe9f0 nios2: Support for GOT-relative DW_EH_PE_datarel encoding. No new revisions were added by this update. Summary of changes: config/ChangeLog | 4 + config/lib-link.m4 | 2 +- gcc/ChangeLog | 244 +++++++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 51 +++ gcc/analyzer/analyzer.cc | 10 +- gcc/analyzer/constraint-manager.cc | 4 +- gcc/analyzer/function-set.cc | 2 + gcc/analyzer/region-model.cc | 136 +++++-- gcc/calls.c | 14 +- gcc/config.in | 6 + gcc/config/aarch64/aarch64-c.c | 7 +- gcc/config/aarch64/aarch64-modes.def | 13 +- gcc/config/aarch64/aarch64-option-extensions.def | 40 +- gcc/config/aarch64/aarch64-sve-builtins-base.cc | 90 ++++- gcc/config/aarch64/aarch64-sve-builtins-base.def | 75 +++- gcc/config/aarch64/aarch64-sve-builtins-base.h | 20 + gcc/config/aarch64/aarch64-sve-builtins-shapes.cc | 285 ++++++++++++- gcc/config/aarch64/aarch64-sve-builtins-shapes.h | 10 + gcc/config/aarch64/aarch64-sve-builtins-sve2.cc | 1 - gcc/config/aarch64/aarch64-sve-builtins-sve2.def | 6 +- gcc/config/aarch64/aarch64-sve-builtins-sve2.h | 1 - gcc/config/aarch64/aarch64-sve-builtins.cc | 49 ++- gcc/config/aarch64/aarch64-sve-builtins.def | 2 + gcc/config/aarch64/aarch64-sve-builtins.h | 1 + gcc/config/aarch64/aarch64-sve.md | 214 +++++++++- gcc/config/aarch64/aarch64-sve2.md | 14 +- gcc/config/aarch64/aarch64.c | 8 +- gcc/config/aarch64/aarch64.h | 15 +- gcc/config/aarch64/arm_sve.h | 1 + gcc/config/aarch64/iterators.md | 116 +++++- gcc/config/gcn/gcn-valu.md | 67 ++- gcc/config/gcn/gcn.c | 14 +- gcc/config/gcn/mkoffload.c | 67 ++- gcc/config/i386/i386.md | 65 ++- gcc/config/i386/mmx.md | 6 +- gcc/config/i386/sse.md | 88 ++-- gcc/config/i386/x86-tune.def | 8 +- gcc/config/nios2/nios2.h | 40 +- gcc/configure | 66 ++- gcc/configure.ac | 11 + gcc/cp/ChangeLog | 17 + gcc/cp/decl.c | 50 ++- gcc/cp/parser.c | 18 + gcc/cp/semantics.c | 11 +- gcc/doc/invoke.texi | 4 + gcc/fortran/ChangeLog | 16 +- gcc/fortran/frontend-passes.c | 1 + gcc/ira-color.c | 10 +- gcc/simplify-rtx.c | 18 +- gcc/testsuite/ChangeLog | 448 +++++++++++++++++++++ gcc/testsuite/g++.dg/cpp0x/lambda/lambda-vla5.C | 13 + gcc/testsuite/g++.dg/opt/pr91838.C | 11 + .../aarch64/sve/acle/general-c++/mangle_1.C | 2 + .../aarch64/sve/acle/general-c++/mangle_2.C | 2 + gcc/testsuite/g++.target/nios2/hello-pie.C | 14 + gcc/testsuite/g++.target/nios2/nios2.exp | 34 ++ gcc/testsuite/gcc.dg/analyzer/pr93457.c | 10 + gcc/testsuite/gcc.dg/analyzer/torture/pr93373.c | 3 + gcc/testsuite/gcc.dg/analyzer/torture/pr93379-2.c | 11 + gcc/testsuite/gcc.dg/analyzer/torture/pr93379.c | 2 + gcc/testsuite/gcc.dg/analyzer/torture/pr93438-2.c | 26 ++ gcc/testsuite/gcc.dg/analyzer/torture/pr93438.c | 13 + .../gcc.target/aarch64/pragma_cpp_predefs_2.c | 109 ++++- .../gcc.target/aarch64/sve/acle/asm/bfdot_f32.c | 67 +++ .../aarch64/sve/acle/asm/bfdot_lane_f32.c | 86 ++++ .../gcc.target/aarch64/sve/acle/asm/bfmlalb_f32.c | 67 +++ .../aarch64/sve/acle/asm/bfmlalb_lane_f32.c | 86 ++++ .../gcc.target/aarch64/sve/acle/asm/bfmlalt_f32.c | 67 +++ .../aarch64/sve/acle/asm/bfmlalt_lane_f32.c | 86 ++++ .../gcc.target/aarch64/sve/acle/asm/bfmmla_f32.c | 46 +++ .../gcc.target/aarch64/sve/acle/asm/clasta_bf16.c | 52 +++ .../gcc.target/aarch64/sve/acle/asm/clastb_bf16.c | 52 +++ .../gcc.target/aarch64/sve/acle/asm/cnt_bf16.c | 52 +++ .../gcc.target/aarch64/sve/acle/asm/create2_1.c | 10 + .../gcc.target/aarch64/sve/acle/asm/create3_1.c | 11 + .../gcc.target/aarch64/sve/acle/asm/create4_1.c | 12 + .../gcc.target/aarch64/sve/acle/asm/cvt_bf16.c | 96 +++++ .../gcc.target/aarch64/sve/acle/asm/cvtnt_bf16.c | 90 +++++ .../gcc.target/aarch64/sve/acle/asm/dup_bf16.c | 41 ++ .../aarch64/sve/acle/asm/dup_lane_bf16.c | 108 +++++ .../aarch64/sve/acle/asm/dupq_lane_bf16.c | 48 +++ .../gcc.target/aarch64/sve/acle/asm/ext_bf16.c | 73 ++++ .../gcc.target/aarch64/sve/acle/asm/get2_bf16.c | 55 +++ .../gcc.target/aarch64/sve/acle/asm/get3_bf16.c | 108 +++++ .../gcc.target/aarch64/sve/acle/asm/get4_bf16.c | 179 ++++++++ .../gcc.target/aarch64/sve/acle/asm/insr_bf16.c | 22 + .../gcc.target/aarch64/sve/acle/asm/lasta_bf16.c | 21 + .../gcc.target/aarch64/sve/acle/asm/lastb_bf16.c | 21 + .../gcc.target/aarch64/sve/acle/asm/ld1_bf16.c | 158 ++++++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_bf16.c | 120 ++++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1rq_bf16.c | 137 +++++++ .../gcc.target/aarch64/sve/acle/asm/ld2_bf16.c | 200 +++++++++ .../gcc.target/aarch64/sve/acle/asm/ld3_bf16.c | 242 +++++++++++ .../gcc.target/aarch64/sve/acle/asm/ld4_bf16.c | 286 +++++++++++++ .../gcc.target/aarch64/sve/acle/asm/ldff1_bf16.c | 86 ++++ .../gcc.target/aarch64/sve/acle/asm/ldnf1_bf16.c | 154 +++++++ .../gcc.target/aarch64/sve/acle/asm/ldnt1_bf16.c | 158 ++++++++ .../gcc.target/aarch64/sve/acle/asm/len_bf16.c | 12 + .../gcc.target/aarch64/sve/acle/asm/mmla_f32.c | 46 +++ .../gcc.target/aarch64/sve/acle/asm/mmla_f64.c | 46 +++ .../gcc.target/aarch64/sve/acle/asm/mmla_s32.c | 46 +++ .../gcc.target/aarch64/sve/acle/asm/mmla_u32.c | 46 +++ .../aarch64/sve/acle/asm/reinterpret_bf16.c | 207 ++++++++++ .../aarch64/sve/acle/asm/reinterpret_f16.c | 17 + .../aarch64/sve/acle/asm/reinterpret_f32.c | 17 + .../aarch64/sve/acle/asm/reinterpret_f64.c | 17 + .../aarch64/sve/acle/asm/reinterpret_s16.c | 17 + .../aarch64/sve/acle/asm/reinterpret_s32.c | 17 + .../aarch64/sve/acle/asm/reinterpret_s64.c | 17 + .../aarch64/sve/acle/asm/reinterpret_s8.c | 17 + .../aarch64/sve/acle/asm/reinterpret_u16.c | 17 + .../aarch64/sve/acle/asm/reinterpret_u32.c | 17 + .../aarch64/sve/acle/asm/reinterpret_u64.c | 17 + .../aarch64/sve/acle/asm/reinterpret_u8.c | 17 + .../gcc.target/aarch64/sve/acle/asm/rev_bf16.c | 21 + .../gcc.target/aarch64/sve/acle/asm/sel_bf16.c | 30 ++ .../gcc.target/aarch64/sve/acle/asm/set2_bf16.c | 41 ++ .../gcc.target/aarch64/sve/acle/asm/set3_bf16.c | 63 +++ .../gcc.target/aarch64/sve/acle/asm/set4_bf16.c | 87 ++++ .../gcc.target/aarch64/sve/acle/asm/splice_bf16.c | 33 ++ .../gcc.target/aarch64/sve/acle/asm/st1_bf16.c | 158 ++++++++ .../gcc.target/aarch64/sve/acle/asm/st2_bf16.c | 200 +++++++++ .../gcc.target/aarch64/sve/acle/asm/st3_bf16.c | 242 +++++++++++ .../gcc.target/aarch64/sve/acle/asm/st4_bf16.c | 286 +++++++++++++ .../gcc.target/aarch64/sve/acle/asm/stnt1_bf16.c | 158 ++++++++ .../aarch64/sve/acle/asm/sudot_lane_s32.c | 97 +++++ .../gcc.target/aarch64/sve/acle/asm/sudot_s32.c | 45 +++ .../gcc.target/aarch64/sve/acle/asm/tbl_bf16.c | 30 ++ .../aarch64/sve/acle/asm/test_sve_acle.h | 49 +++ .../gcc.target/aarch64/sve/acle/asm/trn1_bf16.c | 30 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_bf16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_f16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_f32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_f64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_s16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_s32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_s64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_s8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_u16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_u32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_u64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_u8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2_bf16.c | 30 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_bf16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_f16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_f32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_f64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_s16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_s32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_s64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_s8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_u16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_u32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_u64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_u8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/undef2_1.c | 7 + .../gcc.target/aarch64/sve/acle/asm/undef3_1.c | 7 + .../gcc.target/aarch64/sve/acle/asm/undef4_1.c | 7 + .../gcc.target/aarch64/sve/acle/asm/undef_1.c | 7 + .../aarch64/sve/acle/asm/usdot_lane_s32.c | 97 +++++ .../gcc.target/aarch64/sve/acle/asm/usdot_s32.c | 46 +++ .../gcc.target/aarch64/sve/acle/asm/usmmla_s32.c | 46 +++ .../gcc.target/aarch64/sve/acle/asm/uzp1_bf16.c | 30 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_bf16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_f16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_f32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_f64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_s16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_s32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_s64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_s8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_u16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_u32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_u64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_u8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2_bf16.c | 30 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_bf16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_f16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_f32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_f64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_s16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_s32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_s64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_s8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_u16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_u32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_u64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_u8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1_bf16.c | 30 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_bf16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_f16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_f32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_f64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_s16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_s32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_s64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_s8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_u16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_u32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_u64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_u8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2_bf16.c | 30 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_bf16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_f16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_f32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_f64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_s16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_s32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_s64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_s8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_u16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_u32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_u64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_u8.c | 32 ++ .../gcc.target/aarch64/sve/acle/general-c/mmla_1.c | 58 +++ .../gcc.target/aarch64/sve/acle/general-c/mmla_2.c | 10 + .../gcc.target/aarch64/sve/acle/general-c/mmla_3.c | 10 + .../gcc.target/aarch64/sve/acle/general-c/mmla_4.c | 10 + .../gcc.target/aarch64/sve/acle/general-c/mmla_5.c | 10 + .../gcc.target/aarch64/sve/acle/general-c/mmla_6.c | 10 + .../gcc.target/aarch64/sve/acle/general-c/mmla_7.c | 10 + .../sve/acle/general-c/ternary_bfloat16_1.c | 24 ++ .../sve/acle/general-c/ternary_bfloat16_lane_1.c | 30 ++ .../sve/acle/general-c/ternary_bfloat16_lanex2_1.c | 30 ++ .../sve/acle/general-c/ternary_bfloat16_opt_n_1.c | 24 ++ .../sve/acle/general-c/ternary_intq_uintq_lane_1.c | 32 ++ .../acle/general-c/ternary_intq_uintq_opt_n_1.c | 37 ++ .../sve/acle/general-c/ternary_uintq_intq_1.c | 37 ++ .../sve/acle/general-c/ternary_uintq_intq_lane_1.c | 32 ++ .../acle/general-c/ternary_uintq_intq_opt_n_1.c | 37 ++ .../gcc.target/aarch64/sve/pcs/annotate_1.c | 8 + .../gcc.target/aarch64/sve/pcs/annotate_2.c | 8 + .../gcc.target/aarch64/sve/pcs/annotate_3.c | 8 + .../gcc.target/aarch64/sve/pcs/annotate_4.c | 12 + .../gcc.target/aarch64/sve/pcs/annotate_5.c | 12 + .../gcc.target/aarch64/sve/pcs/annotate_6.c | 12 + .../gcc.target/aarch64/sve/pcs/annotate_7.c | 8 + gcc/testsuite/gcc.target/aarch64/sve/pcs/args_1.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_2.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_3.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_4.c | 2 +- .../sve/pcs/{args_5_be_u16.c => args_5_be_bf16.c} | 16 +- .../gcc.target/aarch64/sve/pcs/args_5_be_f16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_f32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_f64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s8.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u8.c | 2 +- .../sve/pcs/{args_5_le_f16.c => args_5_le_bf16.c} | 16 +- .../gcc.target/aarch64/sve/pcs/args_5_le_f16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_f32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_f64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_s16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_s32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_s64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_s8.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_u16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_u32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_u64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_u8.c | 2 +- .../sve/pcs/{args_6_be_u16.c => args_6_be_bf16.c} | 32 +- .../gcc.target/aarch64/sve/pcs/args_6_be_f16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_f32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_f64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_s16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_s32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_s64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_s8.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_u16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_u32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_u64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_u8.c | 2 +- .../sve/pcs/{args_6_le_u16.c => args_6_le_bf16.c} | 32 +- .../gcc.target/aarch64/sve/pcs/args_6_le_f16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_f32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_f64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_s16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_s32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_s64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_s8.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_u16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_u32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_u64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_u8.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_7.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_8.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_9.c | 2 +- .../gcc.target/aarch64/sve/pcs/gnu_vectors_1.c | 12 +- .../gcc.target/aarch64/sve/pcs/gnu_vectors_2.c | 10 +- .../gcc.target/aarch64/sve/pcs/return_1.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_1_1024.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_1_128.c | 4 +- .../gcc.target/aarch64/sve/pcs/return_1_2048.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_1_256.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_1_512.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_2.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_3.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_4.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_4_1024.c | 29 +- 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.../gcc.target/aarch64/sve/pcs/varargs_2_u32.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_u64.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_u8.c | 2 +- .../gcc.target/aarch64/sve2/acle/asm/tbl2_bf16.c | 30 ++ .../gcc.target/aarch64/sve2/acle/asm/tbx_bf16.c | 37 ++ .../aarch64/sve2/acle/asm/whilerw_bf16.c | 50 +++ .../aarch64/sve2/acle/asm/whilewr_bf16.c | 50 +++ gcc/testsuite/gcc.target/i386/pr91333.c | 14 + gcc/testsuite/gfortran.dg/goacc/atomic-1.f90 | 17 + gcc/testsuite/lib/target-supports.exp | 2 +- gcc/tree-ssa-loop-ivopts.c | 11 +- gcc/tree.h | 25 ++ intl/ChangeLog | 4 + intl/configure | 58 ++- libcpp/ChangeLog | 4 + libcpp/configure | 2 +- libgcc/ChangeLog | 9 + libgcc/config.host | 3 +- libgcc/config/nios2/elf-lib.h | 24 ++ libgcc/unwind-dw2-fde-dip.c | 2 +- libgomp/ChangeLog | 10 + libgomp/plugin/plugin-gcn.c | 23 ++ libstdc++-v3/ChangeLog | 13 + libstdc++-v3/configure | 2 +- .../24_iterators/range_operations/distance.cc | 30 +- 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gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/tbl2_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/tbx_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/whilerw_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/whilewr_bf16.c create mode 100644 gcc/testsuite/gcc.target/i386/pr91333.c create mode 100644 gcc/testsuite/gfortran.dg/goacc/atomic-1.f90 create mode 100644 libgcc/config/nios2/elf-lib.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig updated (42330a681a -> aa66aac47b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig in repository toolchain/ci/binutils-gdb. from 42330a681a gdb/tui: Disassembler scrolling of very small programs adds fd9faca826 Fix ravenscar-thread.c for multi-target adds c3036ed063 aarch64: Fix MOVPRFX markup for bf16 conversions adds 825bd36cea x86: drop unused EXVexWdq / vex_w_dq_mode adds 4102be5cf9 x86: replace EXxmm_mdq by EXVexWdqScalar adds 53943f32cc Updated translations for some of the binutils sub-directories adds 90e9955aef [ARM]: Add support for vldmia/vldmdb/vstmia/vstmdb instructi [...] adds d26cc8a9d6 Fix compile time build problem building the s390 assembler. adds 9216914510 arm: PR gas/25472 Enable DSP instructions with +mve adds d465d69579 Add missing ChangeLog for last patch adds 95441c43cc nios2: recognize %gotoff relocation in assembler adds e7cbe0c4a4 nios2: Add BFD support for GOT-relative DW_EH_PE_datarel encodings adds 195a8287c1 [gdb/testsuite] Fix typo in gdb.server/server-kill-python.exp adds 0ae34fc20a Automatic date update in version.in adds aa66aac47b gdb: Do not print empty-group regs when printing general ones No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 5 + bfd/elf-eh-frame.c | 1 + bfd/version.h | 2 +- binutils/ChangeLog | 4 + binutils/po/sv.po | 3994 +++++++------ gas/ChangeLog | 45 + gas/config/tc-arm.c | 24 +- gas/config/tc-nios2.c | 40 +- gas/config/tc-s390.c | 2 +- gas/po/fr.po | 6915 ++++++++++++---------- gas/po/ru.po | 6918 +++++++++++++---------- gas/testsuite/gas/aarch64/sve-bfloat-movprfx.d | 2 +- gas/testsuite/gas/aarch64/sve-bfloat-movprfx.s | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_28.d | 31 + gas/testsuite/gas/aarch64/sve-movprfx_28.l | 8 + gas/testsuite/gas/aarch64/sve-movprfx_28.s | 45 + gas/testsuite/gas/arm/mve-ldst.d | 43 + gas/testsuite/gas/arm/mve-ldst.s | 13 + gas/testsuite/gas/arm/mve_dsp.d | 140 + gdb/ChangeLog | 10 + gdb/ravenscar-thread.c | 3 +- gdb/target-descriptions.c | 13 +- gdb/testsuite/ChangeLog | 4 + gdb/testsuite/gdb.server/server-kill-python.exp | 2 +- opcodes/ChangeLog | 20 + opcodes/aarch64-tbl.h | 4 +- opcodes/i386-dis-evex-prefix.h | 40 +- opcodes/i386-dis.c | 18 +- 28 files changed, 10426 insertions(+), 7922 deletions(-) create mode 100644 gas/testsuite/gas/aarch64/sve-movprfx_28.d create mode 100644 gas/testsuite/gas/aarch64/sve-movprfx_28.l create mode 100644 gas/testsuite/gas/aarch64/sve-movprfx_28.s create mode 100644 gas/testsuite/gas/arm/mve-ldst.d create mode 100644 gas/testsuite/gas/arm/mve-ldst.s create mode 100644 gas/testsuite/gas/arm/mve_dsp.d -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig updated (e4a77785 -> 43ec6940)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards e4a77785 0: update: binutils-gcc-linux: boot new 43ec6940 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (e4a77785) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-prepare_abe/console.log | 350 +- 03-build_abe-binutils/console.log | 10218 +++++++------- 04-build_abe-stage1/console.log | 15763 ++++++++++----------- 05-build_linux/console.log | 726 +- 06-boot_linux/console.log | 4 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 27262 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 10 files changed, 27310 insertions(+), 27195 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 9 months

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Tcwg-commits February 2020