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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-next-allmodconfig
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discards ea2527dd 2: update: linux-14b549456391a8b8f812529896b2690c16349734: 20275
discards bd2cada7 1: reset: linux-2fe4750e8506da0f23ab80390b762b0d44a04fc5: 20090
discards 086ce6ef 0: update: llvm-211aa5bf59eb36cd40b38b596901b6ce7cc84ba2: all
new e16ca0aa 0: update: llvm-linux: all
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01-reset_artifacts/console.log | 129 +-
02-build_llvm/console.log | 12488 ++++++++++++++++++-----------------
03-build_linux/console.log | 856 ++-
04-boot_linux/console.log | 8 +
05-check_regression/console.log | 11 +-
06-update_baseline/console.log | 40 +-
console.log | 13532 +++++++++++++++++++-------------------
jenkins/manifest.sh | 13 +-
results | 4 +-
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create mode 100644 04-boot_linux/console.log
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig
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discards a5823f68 0: update: llvm-linux: all
new 0f1d0143 0: update: llvm-linux: all
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01-reset_artifacts/console.log | 35 +-
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04-boot_linux/console.log | 2 +-
05-check_regression/console.log | 2 +-
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allnoconfig
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from 211aa5bf59e [mlir] Mark the MLIR tools for installation in CMake
adds 0b8a540dff8 [AArch64][ARM] Always expand ordered vector reductions (PR44600)
adds 99c6a4ea920 [ARM] Expand vector reduction intrinsics on soft float
adds 8195a96595b [ARM][VecReduce] Force expand vector_reduce_fmin
adds b4efc29f1cc Update for Clang 10 release notes in order to have referenc [...]
adds 4c96b369a07 [X86] -fpatchable-function-entry=N,0: place patch label aft [...]
adds fd271fd64a2 Don't warn about missing declarations for partial template [...]
adds 5288d7af5bc [OpenMP][OMPT] fix reduction test for 32-bit x86
adds 424babb89ad [LLD] Add release notes for MinGW for the 10.x branch
adds 0f99f678feb [docs] Add LLVM/LLDB release notes for the 10.x branch for [...]
adds 7e518f3159b [clang] Add release notes for the 10.x branch for things I've done
adds d5361190993 [libcxx] Add release notes for the 10.x branch for things I [...]
adds c32d809e9ca [TSan] Ensure we can compile the runtime with older SDKs
adds d0104a59619 Make llvm::crc32() work also for input sizes larger than 32 bits.
adds cbec01fe058 [clangd] Add workaround for GCC5 host compilers. NFC.
new 22633f85bb7 [LLDB] Fix compilation with GCC 5
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Summary of changes:
clang-tools-extra/clangd/Hover.cpp | 8 +-
clang/docs/ReleaseNotes.rst | 25 +-
clang/lib/Sema/SemaDecl.cpp | 1 +
.../SemaCXX/warn-missing-variable-declarations.cpp | 2 +
compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp | 9 +-
libcxx/docs/ReleaseNotes.rst | 5 +
lld/docs/ReleaseNotes.rst | 28 +-
lldb/source/DataFormatters/FormatCache.cpp | 4 +
lldb/source/DataFormatters/LanguageCategory.cpp | 4 +
lldb/source/Interpreter/CommandAlias.cpp | 3 +-
lldb/source/Interpreter/Options.cpp | 4 +-
llvm/docs/ReleaseNotes.rst | 9 +
.../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 4 +-
llvm/lib/Support/CRC.cpp | 10 +-
.../Target/AArch64/AArch64TargetTransformInfo.h | 16 +-
llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 21 +-
llvm/lib/Target/X86/X86MCInstLower.cpp | 19 +
.../AArch64/patchable-function-entry-bti.ll | 6 +-
.../AArch64/vecreduce-fadd-legalization-strict.ll | 128 ++
...ation.ll => vecreduce-fmax-legalization-nan.ll} | 49 +-
.../CodeGen/AArch64/vecreduce-fmax-legalization.ll | 2 +-
.../AArch64/vecreduce-fmul-legalization-strict.ll | 114 +
.../ARM/vecreduce-fadd-legalization-soft-float.ll | 63 +
.../ARM/vecreduce-fadd-legalization-strict.ll | 166 ++
.../ARM/vecreduce-fmul-legalization-strict.ll | 166 ++
llvm/test/CodeGen/Thumb2/mve-vecreduce-fminmax.ll | 2264 ++++++++++++++++++++
.../CodeGen/X86/patchable-function-entry-ibt.ll | 68 +-
llvm/unittests/Support/CRCTest.cpp | 20 +
.../ompt/synchronization/reduction/tree_reduce.c | 10 +-
29 files changed, 3177 insertions(+), 51 deletions(-)
create mode 100644 llvm/test/CodeGen/AArch64/vecreduce-fadd-legalization-strict.ll
copy llvm/test/CodeGen/AArch64/{vecreduce-fmax-legalization.ll => vecreduce-fmax-l [...]
create mode 100644 llvm/test/CodeGen/AArch64/vecreduce-fmul-legalization-strict.ll
create mode 100644 llvm/test/CodeGen/ARM/vecreduce-fadd-legalization-soft-float.ll
create mode 100644 llvm/test/CodeGen/ARM/vecreduce-fadd-legalization-strict.ll
create mode 100644 llvm/test/CodeGen/ARM/vecreduce-fmul-legalization-strict.ll
create mode 100644 llvm/test/CodeGen/Thumb2/mve-vecreduce-fminmax.ll
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allnoconfig
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discards 05cad31d 0: update: llvm-linux: all
new 283befd1 0: update: llvm-linux: all
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01-reset_artifacts/console.log | 70 +-
02-build_llvm/console.log | 12558 ++++++++++++++++++------------------
03-build_linux/console.log | 478 +-
04-boot_linux/console.log | 2 +-
05-check_regression/console.log | 10 +-
06-update_baseline/console.log | 10 +-
console.log | 13147 +++++++++++++++++++-------------------
jenkins/manifest.sh | 12 +-
8 files changed, 13129 insertions(+), 13158 deletions(-)
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unknown user pushed a change to branch master
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from 65ad1c0ab Cygwin: pty: Remove meaningless pointer increment.
new cd78225a5 libgloss: Fix lseek semihosting bug on nios2 and m68k
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libgloss/m68k/io-lseek.c | 2 +-
libgloss/nios2/io-lseek.c | 2 +-
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unknown user pushed a change to branch master
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from cb3f06480a1 openmp: Fix handling of non-addressable shared scalars in p [...]
new 3f740c67dbb i386: Improve avx* vector concatenation [PR93594]
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gcc/ChangeLog | 5 +++++
gcc/config/i386/predicates.md | 13 +++++++++++
gcc/config/i386/sse.md | 18 ++++++++++++++++
gcc/testsuite/ChangeLog | 5 +++++
gcc/testsuite/gcc.target/i386/avx2-pr93594.c | 32 ++++++++++++++++++++++++++++
5 files changed, 73 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/i386/avx2-pr93594.c
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