Tcwg-commits February 2020

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-allnoconfig updated (cd7d57ab -> a65bcd6d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards cd7d57ab 0: update: llvm-linux: boot new a65bcd6d 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (cd7d57ab) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 16 +- 02-build_llvm/console.log | 12519 ++++++++++++++++++----------------- 03-build_linux/console.log | 896 ++- 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 2 +- console.log | 13443 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 7 files changed, 13444 insertions(+), 13450 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/binutils-gdb] branch linaro-local/non-contiguous-v4 created (now fbee3eca653)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. christophe.lyon pushed a change to branch linaro-local/non-contiguous-v4 in repository toolchain/binutils-gdb. at fbee3eca653 Add powerpc test for non-contiguous memory regions This branch includes the following new commits: new e780801dcb2 Add support for non-contiguous memory regions new 4fcd6a8bacd Add generic test for non-contiguous memory regions new 8e7650efc69 Add arm tests for non-contiguous memory regions new fbee3eca653 Add powerpc test for non-contiguous memory regions The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[binutils-gdb] branch master updated (22b6cd70430 -> 24ac169ac5a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 22b6cd70430 Fix latent bug in dwarf2_find_containing_comp_unit new 24ac169ac5a gdb/testsuite: Regenerate the testglue if it is not in The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gdb/testsuite/ChangeLog | 6 ++++++ gdb/testsuite/lib/gdb.exp | 13 +++++++++++-- 2 files changed, 17 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig updated (fdea9a4ec9b -> 97f11600e0b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig in repository toolchain/ci/llvm-project. from fdea9a4ec9b [lldb] Remove license headers from all test source files adds b6e5808b213 [Attributor][NFC] Prepare some tests to be used with update [...] adds 6185fb13d64 [Attributor][NFC] Refactor interface adds d95cb56649e [Attributor] Make sure abstract attributes are properly ini [...] adds 14d7b802db4 [LLD][ELF][ARM] Add test cases for R_ARM_THM_MOV*-type relocs adds ddf60ba09f2 [lldb/DWARF] Always construct a DWARFDebugInfo object adds 689f1e85ba6 [compiler-rt] [builtins] Fix logb / logbl tests adds def62c7f654 [NFC] Remove ar/ranlib test noise during cmake step adds f4fd7dbf85e [ARM,MVE] Add vqdmull[b,t]q intrinsic families adds c8f9e526bc5 [clang-tidy] misc-no-recursion: point to the function defs, [...] adds dbfc682e2ba SpeculativeExecution: fixed ingoring free execution adds 6085593c128 [AMDGPU] simplifyI24 - replace GetDemandedBits with Simplif [...] adds 0e417b034ad [AArch64][SVE] Re-arrange definitions in AArch64SVEInstrInf [...] adds 7b59ff2fa0a [lldb] Add boilerplate to recognize the .debug_tu_index section adds c7b7f76ae6a [lldb]: fix typo in lldb-gdb-remote.txt adds 9ea5d17cc95 [Sema] Demote call-site-based 'alignment is a power of two' [...] adds 2f215cf36ad Revert "Reland "[DebugInfo] Enable the debug entry values f [...] adds bb9e92bad55 [clang][Index] Fix the incomplete instantiations in libindex. adds fa221fc6b8a Regenerate rotate test. NFC. adds 977cd661cf0 [AMDGPU] Don’t marke the .note section as ALLOC adds 15e20dcb8f9 [Utils][x86] add an option to reduce scrubbing of shuffles [...] adds 083717cf499 AMDGPU: Fix v2i64<->v4f32 bitcast adds 659500c0c96 [NFC][RDA] Break-up initialization code adds 45f008704df [PowerPC][NFC] We do not save/restore vrsave for any remain [...] adds 216a6e05249 [x86] regenerate test checks with less shuffle scrubbing; NFC adds 1f984c83a41 Add #include <condition_variable> to fix build after 85fb997659b5 adds fc2b4a02b1a [DAGCombine] visitEXTRACT_VECTOR_ELT - add SimplifyDemanded [...] adds cb54c13c217 [clang][analyzer] Modify include AllocationState.h in Puten [...] adds 12cc105f806 [X86] Add DAG combines to form CVTPH2PS/CVTPS2PH from vXf16 [...] adds ce70e289987 [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations adds 914a97a4e61 [x86] add vector tests for splatted memory ops; NFC adds 9bbf271fc9d [AArch64] Move isOverflowIntrOpRes help function to the ISD [...] adds 3543ac9ab52 [X86] Rewrite LowerBRCOND to remove dead code and handle IS [...] adds e442f38395f [libc++] Fix unintended ADL inside ref(reference_wrapper<T> [...] adds 092a57f5082 [libc++] Fix unqualified call to 'ref' inside shared_ptr(un [...] adds db8911aad72 [clang-tidy] rename_check.py: maintain alphabetical order i [...] adds 0ed7a615438 [X86] Fix a -Wparentheses warning. NFC adds 6fa3894c4e7 [clang] Fix search path logic for C_INCLUDE_DIRS adds af64b31959f Add target.xml support for qXfer request. adds 0ffa6e1a7e1 [lldb] Fix version string when using LLDB_REVISION but not [...] adds f9c326364e7 [DAGCombiner] Use SDValue::getConstantOperandAPInt helper w [...] adds 726c342ce27 [macho][NFC] Extract all CPU_(SUB_)TYPE logic to libObject adds 70d8fec7c94 [mlir] Refactor the structure of the 'verifyConstructionInv [...] adds 3f785212e9c Revert "[macho][NFC] Extract all CPU_(SUB_)TYPE logic to li [...] adds da181d4ba0c [PowerPC][NFC] Cleanup some of the Darwin mentions in the R [...] adds 064cd2ecdb3 [x86] allow peeking through an extract_subvector to find a [...] adds 5d2baa956ac [libc] Add Initial Support for Signals adds 8928c6dbbf7 Fix some typos in the MLIR documentation. adds 6de21c556d1 [ORC][examples] Fix ThinLtoJIT example after changes in 85f [...] adds 813b1b9fd6c [ORC] Add a convenience method for setting the ExecutionSes [...] adds e2c2eb0a550 [X86] Fix NSW/NUW typo in avg test (PR44973) adds a11ff39ba2a [clang-format] Merge name and colon into a single token for [...] adds 7a7c753b0cc libclang: Make shared object symbol exporting by default adds 967eeb109be [AIX] Pack BasicBlockBits adds 2f56789c8fe [clang][doxygen] Fix false -Wdocumentation warning for tag [...] adds e4a9225f5d1 [GISel][KnownBits] Give up on PHI analysis as soon as we do [...] adds 6d34a87bae6 [cxx_status] Update -std= instructions for C++20. adds 0c8fa6db90a [llvm][build] Fix shared lib builds. [NFC] adds 3d0564c7e07 Revert "[NFCI][DebugInfo]: Corrected a Typo." adds 7ddbf802cf6 [ConstantFold] add/move tests for FP with undef operand; NFC adds 6f4d9d10293 Revert "[AArch64][SVE] Add intrinsics for SVE2 bitwise tern [...] adds e84444781aa Revert "libclang: Add static build support for Windows" and [...] adds 714265dabb6 [X86] Replace a bad use of MVT::getVectorVT with EVT::getVectorVT adds 1d8860f90bc Revert 714265dabb606bfef2f85694234f152edbfa91ac "[X86] Repl [...] adds c7b54a196e1 Recommit "[X86] Replace a bad use of MVT::getVectorVT with [...] adds 9e0c95572e5 [AIX] Improve 32/64-bit build configuration adds bf3f427ba23 [ASTImporter] Add linkage check to ASTNodeImporter::hasSame [...] adds 6123074d0c0 [Driver] Escape the program path for -frecord-command-line adds c767cf24e48 [SVE] Add support for lowering GEPs involving scalable vectors. adds 99809f98d7b [SCCP] Do not mark unknown loads as overdefined. adds ee260c1a0f1 [mlir] [VectorOps] Multi-dim reductions for lowering vector [...] adds 6d60d8695d2 [mlir] Use LLJIT::getMainJITDylib instead of hardcoding '<main>' adds 3ee28108273 [lldb/Plugin] Don't mark ProcessNetBSD as a plugin adds 577d9ce3553 Revert "[Driver] Escape the program path for -frecord-comma [...] adds 51bf5d3cc19 [mlir][Parser] Update DenseElementsAttr to print in hex whe [...] adds 0d19b016226 [lldb/Test] Remove stale README in test/API adds 07c559caef9 [libc++] Explain XFAILs with std::uncaught_exceptions test adds d95a10a7f97 [X86] Custom legalize v1i1 add/sub/mul to xor/xor/and with avx512. adds 5228a5544b2 [X86] Fix a couple copy mistakes in v4i1 or/and/xor isel patterns. adds b00ef8951b5 [X86] Custom legalize v1i1 UADDSAT/USUBSAT/SADDSAT/UADDSAT [...] adds 7e927698621 [X86] Expand vselect of v1i1 under avx512. adds e5782377f3f [X86] Add CMOV_VK1 pseudo so we don't crash on v1i1 ISD::SELECT adds 72ce0c8073b [libc++][regex] Validate backreferences in the constructor. adds d4ded05ba85 [libunwind][CMake] Treat S files as C to work around CMake bug. adds 2fe457690da Filter callbr insts from critical edge splitting adds 7593a480dbc [Dominators] Use Instruction::comesBefore for block-local q [...] adds e27b61c1ea3 [XCore] Add instruction pattern for bitrev adds 4b540fa8a1c [OpenMP][NFC] Remove leftover debug messages adds c32c8fd1437 [mlir] Use getOperation()->setAttr when generating attribut [...] adds d8969a1cb96 Split _LIBCPP_STRING_EXTERN_TEMPLATE_LIST up into a V1 and [...] adds 78be6187170 [X86] Add CMOV_VR64 pseudo instruction for MMX. Remove mmx [...] adds efeafa1bdaa libclc: Use acos implementation from amd_builtins adds 45766068315 [X86] Remove unnecessary isNullConstant in LowerSelect. NFC adds df74033ec9f [WebAssembly] Remove unneeded getWasmKindForNamedSection function new 3bc525af235 [X86] Autogenerate complete checks. NFC new 263bef2bbcb [X86] Make combineCMov not create unsupported FCMOVs when f [...] new 97f11600e0b [X86] Don't bother avoiding illegal FCMOVs if we don't have [...] The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clang-tidy/add_new_check.py | 10 +- .../clang-tidy/misc/NoRecursionCheck.cpp | 9 +- clang-tools-extra/clang-tidy/rename_check.py | 32 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 6 + clang-tools-extra/docs/ReleaseNotes.rst | 1 - .../test/clang-tidy/checkers/misc-no-recursion.cpp | 52 +- clang/include/clang-c/Platform.h | 20 +- clang/include/clang/AST/CommentSema.h | 3 + clang/include/clang/Analysis/CallGraph.h | 4 + clang/include/clang/Basic/CodeGenOptions.def | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 3 + clang/include/clang/Basic/arm_mve.td | 37 +- clang/include/clang/Driver/CC1Options.td | 2 + clang/lib/AST/ASTImporter.cpp | 26 +- clang/lib/AST/CommentSema.cpp | 48 +- clang/lib/CodeGen/BackendUtil.cpp | 1 + clang/lib/CodeGen/CGCall.cpp | 4 + clang/lib/CodeGen/CGDebugInfo.cpp | 3 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 2 - clang/lib/Driver/ToolChains/Darwin.cpp | 2 +- clang/lib/Driver/ToolChains/Fuchsia.cpp | 2 +- clang/lib/Driver/ToolChains/Hurd.cpp | 2 +- clang/lib/Driver/ToolChains/Linux.cpp | 2 +- clang/lib/Driver/ToolChains/Solaris.cpp | 2 +- clang/lib/Driver/ToolChains/WebAssembly.cpp | 2 +- clang/lib/Format/FormatToken.h | 1 + clang/lib/Format/FormatTokenLexer.cpp | 35 + clang/lib/Format/FormatTokenLexer.h | 1 + clang/lib/Frontend/CompilerInvocation.cpp | 10 + clang/lib/Index/IndexingContext.cpp | 11 +- clang/lib/Sema/SemaChecking.cpp | 6 +- .../Checkers/cert/PutenvWithAutoChecker.cpp | 2 +- clang/test/CodeGen/arm-mve-intrinsics/vqdmullbq.c | 125 ++ clang/test/CodeGen/arm-mve-intrinsics/vqdmulltq.c | 125 ++ clang/test/CodeGen/debug-info-extern-call.c | 2 +- .../CodeGen/non-power-of-2-alignment-assumptions.c | 46 + .../CodeGenCXX/dbg-info-all-calls-described.cpp | 12 +- .../test/Index/Core/index-instantiated-source.cpp | 34 + clang/test/Index/Core/index-source.cpp | 6 +- clang/test/Sema/alloc-align-attr.c | 2 +- clang/test/Sema/warn-documentation-tag-typedef.cpp | 13 + clang/test/SemaCXX/alloc-align-attr.cpp | 6 +- clang/tools/libclang/CMakeLists.txt | 5 +- clang/unittests/Format/FormatTestCSharp.cpp | 17 +- clang/www/cxx_status.html | 2 +- .../test/builtins/Unit/compiler_rt_logb_test.c | 6 +- .../test/builtins/Unit/compiler_rt_logbl_test.c | 12 +- libc/config/linux/api.td | 10 + libc/config/linux/signal.h.in | 11 + libc/include/CMakeLists.txt | 10 + libc/include/signal.h.def | 18 + libc/lib/CMakeLists.txt | 3 + libc/spec/linux.td | 45 + libc/spec/stdc.td | 24 + libc/src/CMakeLists.txt | 1 + libc/src/signal/CMakeLists.txt | 4 + libc/src/signal/linux/CMakeLists.txt | 14 + libc/src/signal/linux/raise.cpp | 26 + libc/src/signal/linux/signal.h | 49 + libc/src/signal/raise.h | 20 + libc/test/src/CMakeLists.txt | 1 + libc/test/src/signal/CMakeLists.txt | 12 + libc/test/src/signal/raise_test.cpp | 17 + libclc/generic/lib/math/acos.cl | 173 +- libclc/generic/lib/math/acos.inc | 36 - libcxx/include/__functional_base | 4 +- libcxx/include/__string | 66 +- libcxx/include/memory | 2 +- libcxx/include/regex | 2 + libcxx/include/string | 9 +- libcxx/src/string.cpp | 9 +- .../uncaught/uncaught_exceptions.pass.cpp | 16 +- .../re.regex.construct/bad_backref.pass.cpp | 56 +- .../refwrap/refwrap.helpers/cref_2.pass.cpp | 12 + .../refwrap/refwrap.helpers/ref_2.pass.cpp | 12 + .../util.smartptr.shared.const/unique_ptr.pass.cpp | 13 + libunwind/src/CMakeLists.txt | 4 +- lld/test/ELF/arm-mov-relocs.s | 76 +- lldb/docs/lldb-gdb-remote.txt | 2 +- lldb/include/lldb/lldb-enumerations.h | 1 + lldb/packages/Python/lldbsuite/test/decorators.py | 2 +- .../registers-target-xml-reading}/Makefile | 0 .../TestGdbRemoteTargetXmlPacket.py | 69 + .../registers-target-xml-reading/main.cpp} | 0 lldb/source/Core/Section.cpp | 2 + .../Plugins/ObjectFile/ELF/ObjectFileELF.cpp | 1 + .../Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp | 1 + lldb/source/Plugins/Process/NetBSD/CMakeLists.txt | 2 +- .../GDBRemoteCommunicationServerCommon.cpp | 1 + .../GDBRemoteCommunicationServerLLGS.cpp | 346 ++-- .../gdb-remote/GDBRemoteCommunicationServerLLGS.h | 2 + .../SymbolFile/DWARF/DWARFASTParserClang.cpp | 4 +- .../Plugins/SymbolFile/DWARF/DWARFFormValue.cpp | 4 +- .../SymbolFile/DWARF/DebugNamesDWARFIndex.cpp | 8 +- .../SymbolFile/DWARF/DebugNamesDWARFIndex.h | 4 +- .../Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp | 2 +- .../Plugins/SymbolFile/DWARF/ManualDWARFIndex.h | 4 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 322 ++-- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 2 +- .../SymbolFile/DWARF/SymbolFileDWARFDwo.cpp | 18 +- lldb/source/Symbol/ObjectFile.cpp | 1 + lldb/source/lldb.cpp | 4 +- lldb/test/API/README.md | 4 - .../basic_entry_values_x86_64/Makefile | 2 +- lldb/test/Shell/ObjectFile/ELF/section-types.yaml | 14 + llvm/CMakeLists.txt | 2 +- llvm/cmake/modules/GetHostTriple.cmake | 10 +- llvm/cmake/modules/HandleLLVMOptions.cmake | 25 +- llvm/examples/ThinLtoJIT/ThinLtoJIT.cpp | 2 +- llvm/include/llvm/CodeGen/CommandFlags.inc | 2 +- llvm/include/llvm/CodeGen/ReachingDefAnalysis.h | 10 + llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 10 + llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h | 7 + llvm/include/llvm/IR/BasicBlock.h | 15 + llvm/include/llvm/IR/IntrinsicsARM.td | 10 + llvm/include/llvm/Target/TargetMachine.h | 3 - llvm/include/llvm/Target/TargetOptions.h | 15 +- llvm/include/llvm/Transforms/IPO/Attributor.h | 20 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 15 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 9 - llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 4 + llvm/lib/CodeGen/LiveDebugValues.cpp | 4 +- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 4 +- llvm/lib/CodeGen/MachineFunction.cpp | 3 +- llvm/lib/CodeGen/ReachingDefAnalysis.cpp | 44 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 45 +- .../CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 2 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 89 +- llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 12 - llvm/lib/CodeGen/TargetOptionsImpl.cpp | 8 - .../DWARF/DWARFAbbreviationDeclaration.cpp | 2 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 1 + llvm/lib/IR/Dominators.cpp | 14 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 17 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 3 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 65 +- llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 3 - llvm/lib/Target/AArch64/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 12 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 2 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 2 + llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 6 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 +- llvm/lib/Target/ARM/ARMInstrMVE.td | 65 +- llvm/lib/Target/ARM/ARMTargetMachine.cpp | 3 - llvm/lib/Target/ARM/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/PowerPC/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/PowerPC/README.txt | 61 - llvm/lib/Target/X86/X86ISelLowering.cpp | 483 +++--- llvm/lib/Target/X86/X86InstrAVX512.td | 4 +- llvm/lib/Target/X86/X86InstrCompiler.td | 8 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 3 - llvm/lib/Target/XCore/XCoreISelLowering.cpp | 1 + llvm/lib/Target/XCore/XCoreInstrInfo.td | 3 + llvm/lib/Transforms/IPO/Attributor.cpp | 33 +- llvm/lib/Transforms/Scalar/LICM.cpp | 3 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 7 + .../lib/Transforms/Scalar/SpeculativeExecution.cpp | 3 - llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 3 +- .../ConstantFolding}/fp-undef.ll | 314 ++-- llvm/test/CodeGen/AArch64/arm64-anyregcc.ll | 2 +- llvm/test/CodeGen/AArch64/arm64-patchpoint.ll | 4 +- llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll | 2 +- llvm/test/CodeGen/AArch64/sve-gep.ll | 139 ++ .../CodeGen/AArch64/vecreduce-and-legalization.ll | 4 +- llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ll | 11 + llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll | 4 +- llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll | 4 +- llvm/test/CodeGen/AMDGPU/hsa.ll | 3 +- llvm/test/CodeGen/AMDGPU/idot4s.ll | 40 +- llvm/test/CodeGen/AMDGPU/idot4u.ll | 33 +- llvm/test/CodeGen/AMDGPU/idot8s.ll | 246 ++- llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll | 2 +- .../AMDGPU/speculative-execution-freecasts.ll | 30 + llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll | 44 +- llvm/test/CodeGen/ARM/rotate.ll | 11 +- llvm/test/CodeGen/ARM/smml.ll | 2 +- .../CodeGen/MIR/Hexagon/bundled-call-site-info.mir | 2 - .../test/CodeGen/MIR/X86/call-site-info-error1.mir | 2 +- .../test/CodeGen/MIR/X86/call-site-info-error2.mir | 2 +- .../test/CodeGen/MIR/X86/call-site-info-error3.mir | 2 +- .../test/CodeGen/MIR/X86/call-site-info-error4.mir | 4 +- llvm/test/CodeGen/PowerPC/unwind-dw2.ll | 16 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmull.ll | 221 +++ llvm/test/CodeGen/X86/avg.ll | 4 +- llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll | 2 +- llvm/test/CodeGen/X86/avx-splat.ll | 6 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 433 +++++ llvm/test/CodeGen/X86/avx512-select.ll | 178 ++ .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 92 +- .../CodeGen/X86/bitcast-int-to-vector-bool-sext.ll | 10 +- .../CodeGen/X86/bitcast-int-to-vector-bool-zext.ll | 10 +- llvm/test/CodeGen/X86/call-site-info-output.ll | 4 +- llvm/test/CodeGen/X86/cmov-fp.ll | 1608 ++++++++++++++---- llvm/test/CodeGen/X86/extractelement-load.ll | 38 +- llvm/test/CodeGen/X86/fma.ll | 40 +- llvm/test/CodeGen/X86/half.ll | 57 +- llvm/test/CodeGen/X86/hoist-invariant-load.ll | 2 +- llvm/test/CodeGen/X86/insertelement-var-index.ll | 2 +- llvm/test/CodeGen/X86/masked_gather.ll | 185 +-- llvm/test/CodeGen/X86/pr34653.ll | 123 +- llvm/test/CodeGen/X86/pr44976.ll | 85 + llvm/test/CodeGen/X86/psadbw.ll | 3 +- llvm/test/CodeGen/X86/select-mmx.ll | 35 +- .../X86/speculative-load-hardening-indirect.ll | 2 +- llvm/test/CodeGen/X86/statepoint-allocas.ll | 2 +- llvm/test/CodeGen/X86/tail-dup-repeat.ll | 2 +- llvm/test/CodeGen/X86/vector-half-conversions.ll | 1713 +------------------- llvm/test/CodeGen/X86/vector-reduce-mul.ll | 147 +- llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll | 3 +- llvm/test/CodeGen/X86/x86-interleaved-access.ll | 299 ++++ llvm/test/CodeGen/X86/xray-custom-log.ll | 4 +- llvm/test/CodeGen/X86/xray-typed-event-log.ll | 4 +- llvm/test/CodeGen/XCore/bitrev.ll | 55 + .../DebugInfo/AArch64/call-site-info-output.ll | 2 +- llvm/test/DebugInfo/ARM/call-site-info-output.ll | 2 +- .../DebugInfo/ARM/entry-value-multi-byte-expr.ll | 2 +- .../MIR/AArch64/dbgcall-site-interpret-movzxi.mir | 2 +- .../MIR/AArch64/dbgcall-site-interpretation.mir | 2 +- .../MIR/AArch64/dbgcall-site-orr-moves.mir | 2 +- .../MIR/ARM/dbgcall-site-interpretation.mir | 2 +- .../MIR/ARM/dbgcall-site-propagated-value.mir | 4 +- .../MIR/ARM/dbgcallsite-noreg-is-imm-check.mir | 76 - .../MIR/ARM/if-coverter-call-site-info.mir | 5 +- .../dbgcall-site-instr-before-bundled-call.mir | 4 +- .../live-debug-values-bundled-entry-values.mir | 2 - llvm/test/DebugInfo/MIR/SystemZ/call-site-lzer.mir | 2 - llvm/test/DebugInfo/MIR/X86/DW_OP_entry_value.mir | 2 +- .../MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir | 10 +- .../dbg-call-site-spilled-arg-multiple-defs.mir | 4 +- .../MIR/X86/dbg-call-site-spilled-arg.mir | 4 +- .../MIR/X86/dbgcall-site-copy-super-sub.mir | 2 +- .../MIR/X86/dbgcall-site-interpretation.mir | 2 +- .../MIR/X86/dbgcall-site-lea-interpretation.mir | 2 +- .../MIR/X86/dbgcall-site-partial-describe.mir | 2 +- .../DebugInfo/MIR/X86/dbgcall-site-reference.mir | 2 +- .../DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir | 2 +- .../MIR/X86/dbgcall-site-two-fwd-reg-defs.mir | 2 +- llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir | 2 +- .../DebugInfo/MIR/X86/debug-call-site-param.mir | 4 +- .../MIR/X86/entry-value-of-modified-param.mir | 2 +- .../DebugInfo/MIR/X86/entry-values-diamond-bbs.mir | 2 +- .../MIR/X86/kill-entry-value-after-diamond-bbs.mir | 2 +- .../MIR/X86/multiple-param-dbg-value-entry.mir | 2 +- .../MIR/X86/propagate-entry-value-cross-bbs.mir | 2 +- .../MIR/X86/unreachable-block-call-site.mir | 2 +- .../Sparc/entry-value-complex-reg-expr.ll | 2 - llvm/test/DebugInfo/X86/dbg-value-range.ll | 2 +- .../DebugInfo/X86/dbg-value-regmask-clobber.ll | 6 +- .../test/DebugInfo/X86/dbgcall-site-64-bit-imms.ll | 2 +- .../DebugInfo/X86/dbgcall-site-zero-valued-imms.ll | 2 +- llvm/test/DebugInfo/X86/loclists-dwp.ll | 6 +- llvm/test/DebugInfo/X86/no-entry-values-with-O0.ll | 88 - .../Transforms/Attributor/dereferenceable-1.ll | 44 +- llvm/test/Transforms/Attributor/nofree.ll | 5 +- llvm/test/Transforms/Attributor/nonnull.ll | 43 +- llvm/test/Transforms/IPConstantProp/PR26044.ll | 7 +- llvm/test/Transforms/InstSimplify/fp-undef.ll | 369 ----- llvm/test/Transforms/LICM/callbr-crash.ll | 18 + llvm/test/Transforms/SCCP/apint-bigint2.ll | 3 +- llvm/test/Transforms/SCCP/loadtest.ll | 2 +- llvm/test/Transforms/SCCP/loadtest2.ll | 14 + llvm/test/tools/llvm-dwarfdump/X86/locstats.ll | 2 +- .../llvm-dwarfdump/X86/stats-dbg-callsite-info.ll | 5 +- .../X86/valid-call-site-GNU-extensions.ll | 2 +- llvm/test/tools/llvm-locstats/locstats.ll | 6 +- .../unittests/CodeGen/GlobalISel/KnownBitsTest.cpp | 38 + llvm/unittests/IR/DominatorTreeTest.cpp | 31 + llvm/utils/UpdateTestChecks/asm.py | 13 +- llvm/utils/update_llc_test_checks.py | 3 + mlir/docs/DefiningAttributesAndTypes.md | 26 +- mlir/docs/Tutorials/Toy/Ch-4.md | 2 +- mlir/docs/Tutorials/Toy/Ch-5.md | 2 +- mlir/docs/Tutorials/Toy/Ch-6.md | 2 +- mlir/docs/WritingAPass.md | 2 +- mlir/include/mlir/Dialect/QuantOps/QuantTypes.h | 26 +- mlir/include/mlir/Dialect/SPIRV/TargetAndABI.h | 9 +- mlir/include/mlir/IR/Attributes.h | 30 +- mlir/include/mlir/IR/Location.h | 6 + mlir/include/mlir/IR/StandardTypes.h | 18 +- mlir/include/mlir/IR/StorageUniquerSupport.h | 20 +- mlir/include/mlir/IR/Types.h | 9 +- mlir/lib/Dialect/QuantOps/IR/QuantTypes.cpp | 69 +- mlir/lib/Dialect/SPIRV/TargetAndABI.cpp | 13 +- mlir/lib/Dialect/VectorOps/VectorTransforms.cpp | 101 +- mlir/lib/ExecutionEngine/ExecutionEngine.cpp | 16 +- mlir/lib/IR/AsmPrinter.cpp | 30 +- mlir/lib/IR/Attributes.cpp | 75 +- mlir/lib/IR/MLIRContext.cpp | 15 +- mlir/lib/IR/StandardTypes.cpp | 66 +- mlir/lib/IR/Types.cpp | 7 +- mlir/lib/Parser/Parser.cpp | 116 +- .../VectorOps/vector-contract-transforms.mlir | 81 + mlir/test/IR/dense-elements-hex.mlir | 28 + mlir/test/IR/invalid.mlir | 4 +- mlir/test/mlir-tblgen/op-attribute.td | 6 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 2 +- 297 files changed, 6722 insertions(+), 4740 deletions(-) create mode 100644 clang/test/CodeGen/arm-mve-intrinsics/vqdmullbq.c create mode 100644 clang/test/CodeGen/arm-mve-intrinsics/vqdmulltq.c create mode 100644 clang/test/CodeGen/non-power-of-2-alignment-assumptions.c create mode 100644 clang/test/Sema/warn-documentation-tag-typedef.cpp create mode 100644 libc/config/linux/signal.h.in create mode 100644 libc/include/signal.h.def create mode 100644 libc/src/signal/CMakeLists.txt create mode 100644 libc/src/signal/linux/CMakeLists.txt create mode 100644 libc/src/signal/linux/raise.cpp create mode 100644 libc/src/signal/linux/signal.h create mode 100644 libc/src/signal/raise.h create mode 100644 libc/test/src/signal/CMakeLists.txt create mode 100644 libc/test/src/signal/raise_test.cpp delete mode 100644 libclc/generic/lib/math/acos.inc copy lldb/{test/API/api/check_public_api_headers => packages/Python/lldbsuite/test [...] create mode 100644 lldb/packages/Python/lldbsuite/test/tools/lldb-server/registers [...] copy lldb/{test/Shell/SymbolFile/Inputs/target-symbols-add-unwind.c => packages/Py [...] delete mode 100644 lldb/test/API/README.md copy llvm/test/{Transforms/InstSimplify => Analysis/ConstantFolding}/fp-undef.ll (70%) create mode 100644 llvm/test/CodeGen/AArch64/sve-gep.ll create mode 100644 llvm/test/CodeGen/AMDGPU/speculative-execution-freecasts.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmull.ll create mode 100644 llvm/test/CodeGen/X86/pr44976.ll create mode 100644 llvm/test/CodeGen/XCore/bitrev.ll delete mode 100644 llvm/test/DebugInfo/MIR/ARM/dbgcallsite-noreg-is-imm-check.mir delete mode 100644 llvm/test/DebugInfo/X86/no-entry-values-with-O0.ll create mode 100644 llvm/test/Transforms/LICM/callbr-crash.ll create mode 100644 llvm/test/Transforms/SCCP/loadtest2.ll create mode 100644 mlir/test/IR/dense-elements-hex.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig updated (6ef87e3d -> 2e5bca3e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig in repository toolchain/ci/base-artifacts. discards 6ef87e3d 0: update: llvm-linux: boot new 2e5bca3e 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (6ef87e3d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 162 +- 02-build_llvm/console.log | 12697 +++++++++++++++++---------------- 03-build_linux/console.log | 964 ++- 04-boot_linux/console.log | 444 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 10 +- console.log | 14279 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 14280 insertions(+), 14286 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig updated (fdea9a4ec9b -> df74033ec9f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig in repository toolchain/ci/llvm-project. from fdea9a4ec9b [lldb] Remove license headers from all test source files adds b6e5808b213 [Attributor][NFC] Prepare some tests to be used with update [...] adds 6185fb13d64 [Attributor][NFC] Refactor interface adds d95cb56649e [Attributor] Make sure abstract attributes are properly ini [...] adds 14d7b802db4 [LLD][ELF][ARM] Add test cases for R_ARM_THM_MOV*-type relocs adds ddf60ba09f2 [lldb/DWARF] Always construct a DWARFDebugInfo object adds 689f1e85ba6 [compiler-rt] [builtins] Fix logb / logbl tests adds def62c7f654 [NFC] Remove ar/ranlib test noise during cmake step adds f4fd7dbf85e [ARM,MVE] Add vqdmull[b,t]q intrinsic families adds c8f9e526bc5 [clang-tidy] misc-no-recursion: point to the function defs, [...] adds dbfc682e2ba SpeculativeExecution: fixed ingoring free execution adds 6085593c128 [AMDGPU] simplifyI24 - replace GetDemandedBits with Simplif [...] adds 0e417b034ad [AArch64][SVE] Re-arrange definitions in AArch64SVEInstrInf [...] adds 7b59ff2fa0a [lldb] Add boilerplate to recognize the .debug_tu_index section adds c7b7f76ae6a [lldb]: fix typo in lldb-gdb-remote.txt adds 9ea5d17cc95 [Sema] Demote call-site-based 'alignment is a power of two' [...] adds 2f215cf36ad Revert "Reland "[DebugInfo] Enable the debug entry values f [...] adds bb9e92bad55 [clang][Index] Fix the incomplete instantiations in libindex. adds fa221fc6b8a Regenerate rotate test. NFC. adds 977cd661cf0 [AMDGPU] Don’t marke the .note section as ALLOC adds 15e20dcb8f9 [Utils][x86] add an option to reduce scrubbing of shuffles [...] adds 083717cf499 AMDGPU: Fix v2i64<->v4f32 bitcast adds 659500c0c96 [NFC][RDA] Break-up initialization code adds 45f008704df [PowerPC][NFC] We do not save/restore vrsave for any remain [...] adds 216a6e05249 [x86] regenerate test checks with less shuffle scrubbing; NFC adds 1f984c83a41 Add #include <condition_variable> to fix build after 85fb997659b5 adds fc2b4a02b1a [DAGCombine] visitEXTRACT_VECTOR_ELT - add SimplifyDemanded [...] adds cb54c13c217 [clang][analyzer] Modify include AllocationState.h in Puten [...] adds 12cc105f806 [X86] Add DAG combines to form CVTPH2PS/CVTPS2PH from vXf16 [...] adds ce70e289987 [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations adds 914a97a4e61 [x86] add vector tests for splatted memory ops; NFC adds 9bbf271fc9d [AArch64] Move isOverflowIntrOpRes help function to the ISD [...] adds 3543ac9ab52 [X86] Rewrite LowerBRCOND to remove dead code and handle IS [...] adds e442f38395f [libc++] Fix unintended ADL inside ref(reference_wrapper<T> [...] adds 092a57f5082 [libc++] Fix unqualified call to 'ref' inside shared_ptr(un [...] adds db8911aad72 [clang-tidy] rename_check.py: maintain alphabetical order i [...] adds 0ed7a615438 [X86] Fix a -Wparentheses warning. NFC adds 6fa3894c4e7 [clang] Fix search path logic for C_INCLUDE_DIRS adds af64b31959f Add target.xml support for qXfer request. adds 0ffa6e1a7e1 [lldb] Fix version string when using LLDB_REVISION but not [...] adds f9c326364e7 [DAGCombiner] Use SDValue::getConstantOperandAPInt helper w [...] adds 726c342ce27 [macho][NFC] Extract all CPU_(SUB_)TYPE logic to libObject adds 70d8fec7c94 [mlir] Refactor the structure of the 'verifyConstructionInv [...] adds 3f785212e9c Revert "[macho][NFC] Extract all CPU_(SUB_)TYPE logic to li [...] adds da181d4ba0c [PowerPC][NFC] Cleanup some of the Darwin mentions in the R [...] adds 064cd2ecdb3 [x86] allow peeking through an extract_subvector to find a [...] adds 5d2baa956ac [libc] Add Initial Support for Signals adds 8928c6dbbf7 Fix some typos in the MLIR documentation. adds 6de21c556d1 [ORC][examples] Fix ThinLtoJIT example after changes in 85f [...] adds 813b1b9fd6c [ORC] Add a convenience method for setting the ExecutionSes [...] adds e2c2eb0a550 [X86] Fix NSW/NUW typo in avg test (PR44973) adds a11ff39ba2a [clang-format] Merge name and colon into a single token for [...] adds 7a7c753b0cc libclang: Make shared object symbol exporting by default adds 967eeb109be [AIX] Pack BasicBlockBits adds 2f56789c8fe [clang][doxygen] Fix false -Wdocumentation warning for tag [...] adds e4a9225f5d1 [GISel][KnownBits] Give up on PHI analysis as soon as we do [...] adds 6d34a87bae6 [cxx_status] Update -std= instructions for C++20. adds 0c8fa6db90a [llvm][build] Fix shared lib builds. [NFC] adds 3d0564c7e07 Revert "[NFCI][DebugInfo]: Corrected a Typo." adds 7ddbf802cf6 [ConstantFold] add/move tests for FP with undef operand; NFC adds 6f4d9d10293 Revert "[AArch64][SVE] Add intrinsics for SVE2 bitwise tern [...] adds e84444781aa Revert "libclang: Add static build support for Windows" and [...] adds 714265dabb6 [X86] Replace a bad use of MVT::getVectorVT with EVT::getVectorVT adds 1d8860f90bc Revert 714265dabb606bfef2f85694234f152edbfa91ac "[X86] Repl [...] adds c7b54a196e1 Recommit "[X86] Replace a bad use of MVT::getVectorVT with [...] adds 9e0c95572e5 [AIX] Improve 32/64-bit build configuration adds bf3f427ba23 [ASTImporter] Add linkage check to ASTNodeImporter::hasSame [...] adds 6123074d0c0 [Driver] Escape the program path for -frecord-command-line adds c767cf24e48 [SVE] Add support for lowering GEPs involving scalable vectors. adds 99809f98d7b [SCCP] Do not mark unknown loads as overdefined. adds ee260c1a0f1 [mlir] [VectorOps] Multi-dim reductions for lowering vector [...] adds 6d60d8695d2 [mlir] Use LLJIT::getMainJITDylib instead of hardcoding '<main>' adds 3ee28108273 [lldb/Plugin] Don't mark ProcessNetBSD as a plugin adds 577d9ce3553 Revert "[Driver] Escape the program path for -frecord-comma [...] adds 51bf5d3cc19 [mlir][Parser] Update DenseElementsAttr to print in hex whe [...] adds 0d19b016226 [lldb/Test] Remove stale README in test/API adds 07c559caef9 [libc++] Explain XFAILs with std::uncaught_exceptions test adds d95a10a7f97 [X86] Custom legalize v1i1 add/sub/mul to xor/xor/and with avx512. adds 5228a5544b2 [X86] Fix a couple copy mistakes in v4i1 or/and/xor isel patterns. adds b00ef8951b5 [X86] Custom legalize v1i1 UADDSAT/USUBSAT/SADDSAT/UADDSAT [...] adds 7e927698621 [X86] Expand vselect of v1i1 under avx512. adds e5782377f3f [X86] Add CMOV_VK1 pseudo so we don't crash on v1i1 ISD::SELECT adds 72ce0c8073b [libc++][regex] Validate backreferences in the constructor. adds d4ded05ba85 [libunwind][CMake] Treat S files as C to work around CMake bug. adds 2fe457690da Filter callbr insts from critical edge splitting adds 7593a480dbc [Dominators] Use Instruction::comesBefore for block-local q [...] adds e27b61c1ea3 [XCore] Add instruction pattern for bitrev adds 4b540fa8a1c [OpenMP][NFC] Remove leftover debug messages adds c32c8fd1437 [mlir] Use getOperation()->setAttr when generating attribut [...] adds d8969a1cb96 Split _LIBCPP_STRING_EXTERN_TEMPLATE_LIST up into a V1 and [...] adds 78be6187170 [X86] Add CMOV_VR64 pseudo instruction for MMX. Remove mmx [...] adds efeafa1bdaa libclc: Use acos implementation from amd_builtins adds 45766068315 [X86] Remove unnecessary isNullConstant in LowerSelect. NFC adds df74033ec9f [WebAssembly] Remove unneeded getWasmKindForNamedSection function No new revisions were added by this update. Summary of changes: clang-tools-extra/clang-tidy/add_new_check.py | 10 +- .../clang-tidy/misc/NoRecursionCheck.cpp | 9 +- clang-tools-extra/clang-tidy/rename_check.py | 32 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 6 + clang-tools-extra/docs/ReleaseNotes.rst | 1 - .../test/clang-tidy/checkers/misc-no-recursion.cpp | 52 +- clang/include/clang-c/Platform.h | 20 +- clang/include/clang/AST/CommentSema.h | 3 + clang/include/clang/Analysis/CallGraph.h | 4 + clang/include/clang/Basic/CodeGenOptions.def | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 3 + clang/include/clang/Basic/arm_mve.td | 37 +- clang/include/clang/Driver/CC1Options.td | 2 + clang/lib/AST/ASTImporter.cpp | 26 +- clang/lib/AST/CommentSema.cpp | 48 +- clang/lib/CodeGen/BackendUtil.cpp | 1 + clang/lib/CodeGen/CGCall.cpp | 4 + clang/lib/CodeGen/CGDebugInfo.cpp | 3 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 2 - clang/lib/Driver/ToolChains/Darwin.cpp | 2 +- clang/lib/Driver/ToolChains/Fuchsia.cpp | 2 +- clang/lib/Driver/ToolChains/Hurd.cpp | 2 +- clang/lib/Driver/ToolChains/Linux.cpp | 2 +- clang/lib/Driver/ToolChains/Solaris.cpp | 2 +- clang/lib/Driver/ToolChains/WebAssembly.cpp | 2 +- clang/lib/Format/FormatToken.h | 1 + clang/lib/Format/FormatTokenLexer.cpp | 35 + clang/lib/Format/FormatTokenLexer.h | 1 + clang/lib/Frontend/CompilerInvocation.cpp | 10 + clang/lib/Index/IndexingContext.cpp | 11 +- clang/lib/Sema/SemaChecking.cpp | 6 +- .../Checkers/cert/PutenvWithAutoChecker.cpp | 2 +- clang/test/CodeGen/arm-mve-intrinsics/vqdmullbq.c | 125 ++ clang/test/CodeGen/arm-mve-intrinsics/vqdmulltq.c | 125 ++ clang/test/CodeGen/debug-info-extern-call.c | 2 +- .../CodeGen/non-power-of-2-alignment-assumptions.c | 46 + .../CodeGenCXX/dbg-info-all-calls-described.cpp | 12 +- .../test/Index/Core/index-instantiated-source.cpp | 34 + clang/test/Index/Core/index-source.cpp | 6 +- clang/test/Sema/alloc-align-attr.c | 2 +- clang/test/Sema/warn-documentation-tag-typedef.cpp | 13 + clang/test/SemaCXX/alloc-align-attr.cpp | 6 +- clang/tools/libclang/CMakeLists.txt | 5 +- clang/unittests/Format/FormatTestCSharp.cpp | 17 +- clang/www/cxx_status.html | 2 +- .../test/builtins/Unit/compiler_rt_logb_test.c | 6 +- .../test/builtins/Unit/compiler_rt_logbl_test.c | 12 +- libc/config/linux/api.td | 10 + libc/config/linux/signal.h.in | 11 + libc/include/CMakeLists.txt | 10 + libc/include/signal.h.def | 18 + libc/lib/CMakeLists.txt | 3 + libc/spec/linux.td | 45 + libc/spec/stdc.td | 24 + libc/src/CMakeLists.txt | 1 + libc/src/signal/CMakeLists.txt | 4 + libc/src/signal/linux/CMakeLists.txt | 14 + libc/src/signal/linux/raise.cpp | 26 + libc/src/signal/linux/signal.h | 49 + libc/src/signal/raise.h | 20 + libc/test/src/CMakeLists.txt | 1 + libc/test/src/signal/CMakeLists.txt | 12 + libc/test/src/signal/raise_test.cpp | 17 + libclc/generic/lib/math/acos.cl | 173 +- libclc/generic/lib/math/acos.inc | 36 - libcxx/include/__functional_base | 4 +- libcxx/include/__string | 66 +- libcxx/include/memory | 2 +- libcxx/include/regex | 2 + libcxx/include/string | 9 +- libcxx/src/string.cpp | 9 +- .../uncaught/uncaught_exceptions.pass.cpp | 16 +- .../re.regex.construct/bad_backref.pass.cpp | 56 +- .../refwrap/refwrap.helpers/cref_2.pass.cpp | 12 + .../refwrap/refwrap.helpers/ref_2.pass.cpp | 12 + .../util.smartptr.shared.const/unique_ptr.pass.cpp | 13 + libunwind/src/CMakeLists.txt | 4 +- lld/test/ELF/arm-mov-relocs.s | 76 +- lldb/docs/lldb-gdb-remote.txt | 2 +- lldb/include/lldb/lldb-enumerations.h | 1 + lldb/packages/Python/lldbsuite/test/decorators.py | 2 +- .../registers-target-xml-reading}/Makefile | 0 .../TestGdbRemoteTargetXmlPacket.py | 69 + .../registers-target-xml-reading/main.cpp} | 0 lldb/source/Core/Section.cpp | 2 + .../Plugins/ObjectFile/ELF/ObjectFileELF.cpp | 1 + .../Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp | 1 + lldb/source/Plugins/Process/NetBSD/CMakeLists.txt | 2 +- .../GDBRemoteCommunicationServerCommon.cpp | 1 + .../GDBRemoteCommunicationServerLLGS.cpp | 346 ++-- .../gdb-remote/GDBRemoteCommunicationServerLLGS.h | 2 + .../SymbolFile/DWARF/DWARFASTParserClang.cpp | 4 +- .../Plugins/SymbolFile/DWARF/DWARFFormValue.cpp | 4 +- .../SymbolFile/DWARF/DebugNamesDWARFIndex.cpp | 8 +- .../SymbolFile/DWARF/DebugNamesDWARFIndex.h | 4 +- .../Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp | 2 +- .../Plugins/SymbolFile/DWARF/ManualDWARFIndex.h | 4 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 322 ++-- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 2 +- .../SymbolFile/DWARF/SymbolFileDWARFDwo.cpp | 18 +- lldb/source/Symbol/ObjectFile.cpp | 1 + lldb/source/lldb.cpp | 4 +- lldb/test/API/README.md | 4 - .../basic_entry_values_x86_64/Makefile | 2 +- lldb/test/Shell/ObjectFile/ELF/section-types.yaml | 14 + llvm/CMakeLists.txt | 2 +- llvm/cmake/modules/GetHostTriple.cmake | 10 +- llvm/cmake/modules/HandleLLVMOptions.cmake | 25 +- llvm/examples/ThinLtoJIT/ThinLtoJIT.cpp | 2 +- llvm/include/llvm/CodeGen/CommandFlags.inc | 2 +- llvm/include/llvm/CodeGen/ReachingDefAnalysis.h | 10 + llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 10 + llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h | 7 + llvm/include/llvm/IR/BasicBlock.h | 15 + llvm/include/llvm/IR/IntrinsicsARM.td | 10 + llvm/include/llvm/Target/TargetMachine.h | 3 - llvm/include/llvm/Target/TargetOptions.h | 15 +- llvm/include/llvm/Transforms/IPO/Attributor.h | 20 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 15 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 9 - llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 4 + llvm/lib/CodeGen/LiveDebugValues.cpp | 4 +- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 4 +- llvm/lib/CodeGen/MachineFunction.cpp | 3 +- llvm/lib/CodeGen/ReachingDefAnalysis.cpp | 44 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 45 +- .../CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 2 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 89 +- llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 12 - llvm/lib/CodeGen/TargetOptionsImpl.cpp | 8 - .../DWARF/DWARFAbbreviationDeclaration.cpp | 2 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 1 + llvm/lib/IR/Dominators.cpp | 14 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 17 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 3 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 65 +- llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 3 - llvm/lib/Target/AArch64/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 12 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 2 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 2 + llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 6 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 +- llvm/lib/Target/ARM/ARMInstrMVE.td | 65 +- llvm/lib/Target/ARM/ARMTargetMachine.cpp | 3 - llvm/lib/Target/ARM/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/PowerPC/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/PowerPC/README.txt | 61 - llvm/lib/Target/X86/X86ISelLowering.cpp | 476 +++--- llvm/lib/Target/X86/X86InstrAVX512.td | 4 +- llvm/lib/Target/X86/X86InstrCompiler.td | 8 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 3 - llvm/lib/Target/XCore/XCoreISelLowering.cpp | 1 + llvm/lib/Target/XCore/XCoreInstrInfo.td | 3 + llvm/lib/Transforms/IPO/Attributor.cpp | 33 +- llvm/lib/Transforms/Scalar/LICM.cpp | 3 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 7 + .../lib/Transforms/Scalar/SpeculativeExecution.cpp | 3 - llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 3 +- .../ConstantFolding}/fp-undef.ll | 314 ++-- llvm/test/CodeGen/AArch64/arm64-anyregcc.ll | 2 +- llvm/test/CodeGen/AArch64/arm64-patchpoint.ll | 4 +- llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll | 2 +- llvm/test/CodeGen/AArch64/sve-gep.ll | 139 ++ .../CodeGen/AArch64/vecreduce-and-legalization.ll | 4 +- llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ll | 11 + llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll | 4 +- llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll | 4 +- llvm/test/CodeGen/AMDGPU/hsa.ll | 3 +- llvm/test/CodeGen/AMDGPU/idot4s.ll | 40 +- llvm/test/CodeGen/AMDGPU/idot4u.ll | 33 +- llvm/test/CodeGen/AMDGPU/idot8s.ll | 246 ++- llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll | 2 +- .../AMDGPU/speculative-execution-freecasts.ll | 30 + llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll | 44 +- llvm/test/CodeGen/ARM/rotate.ll | 11 +- llvm/test/CodeGen/ARM/smml.ll | 2 +- .../CodeGen/MIR/Hexagon/bundled-call-site-info.mir | 2 - .../test/CodeGen/MIR/X86/call-site-info-error1.mir | 2 +- .../test/CodeGen/MIR/X86/call-site-info-error2.mir | 2 +- .../test/CodeGen/MIR/X86/call-site-info-error3.mir | 2 +- .../test/CodeGen/MIR/X86/call-site-info-error4.mir | 4 +- llvm/test/CodeGen/PowerPC/unwind-dw2.ll | 16 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmull.ll | 221 +++ llvm/test/CodeGen/X86/avg.ll | 4 +- llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll | 2 +- llvm/test/CodeGen/X86/avx-splat.ll | 6 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 433 +++++ llvm/test/CodeGen/X86/avx512-select.ll | 178 ++ .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 92 +- .../CodeGen/X86/bitcast-int-to-vector-bool-sext.ll | 10 +- .../CodeGen/X86/bitcast-int-to-vector-bool-zext.ll | 10 +- llvm/test/CodeGen/X86/call-site-info-output.ll | 4 +- llvm/test/CodeGen/X86/extractelement-load.ll | 38 +- llvm/test/CodeGen/X86/fma.ll | 40 +- llvm/test/CodeGen/X86/half.ll | 57 +- llvm/test/CodeGen/X86/hoist-invariant-load.ll | 2 +- llvm/test/CodeGen/X86/insertelement-var-index.ll | 2 +- llvm/test/CodeGen/X86/masked_gather.ll | 185 +-- llvm/test/CodeGen/X86/pr34653.ll | 123 +- llvm/test/CodeGen/X86/pr44976.ll | 85 + llvm/test/CodeGen/X86/psadbw.ll | 3 +- llvm/test/CodeGen/X86/select-mmx.ll | 35 +- .../X86/speculative-load-hardening-indirect.ll | 2 +- llvm/test/CodeGen/X86/statepoint-allocas.ll | 2 +- llvm/test/CodeGen/X86/tail-dup-repeat.ll | 2 +- llvm/test/CodeGen/X86/vector-half-conversions.ll | 1713 +------------------- llvm/test/CodeGen/X86/vector-reduce-mul.ll | 147 +- llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll | 3 +- llvm/test/CodeGen/X86/x86-interleaved-access.ll | 299 ++++ llvm/test/CodeGen/X86/xray-custom-log.ll | 4 +- llvm/test/CodeGen/X86/xray-typed-event-log.ll | 4 +- llvm/test/CodeGen/XCore/bitrev.ll | 55 + .../DebugInfo/AArch64/call-site-info-output.ll | 2 +- llvm/test/DebugInfo/ARM/call-site-info-output.ll | 2 +- .../DebugInfo/ARM/entry-value-multi-byte-expr.ll | 2 +- .../MIR/AArch64/dbgcall-site-interpret-movzxi.mir | 2 +- .../MIR/AArch64/dbgcall-site-interpretation.mir | 2 +- .../MIR/AArch64/dbgcall-site-orr-moves.mir | 2 +- .../MIR/ARM/dbgcall-site-interpretation.mir | 2 +- .../MIR/ARM/dbgcall-site-propagated-value.mir | 4 +- .../MIR/ARM/dbgcallsite-noreg-is-imm-check.mir | 76 - .../MIR/ARM/if-coverter-call-site-info.mir | 5 +- .../dbgcall-site-instr-before-bundled-call.mir | 4 +- .../live-debug-values-bundled-entry-values.mir | 2 - llvm/test/DebugInfo/MIR/SystemZ/call-site-lzer.mir | 2 - llvm/test/DebugInfo/MIR/X86/DW_OP_entry_value.mir | 2 +- .../MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir | 10 +- .../dbg-call-site-spilled-arg-multiple-defs.mir | 4 +- .../MIR/X86/dbg-call-site-spilled-arg.mir | 4 +- .../MIR/X86/dbgcall-site-copy-super-sub.mir | 2 +- .../MIR/X86/dbgcall-site-interpretation.mir | 2 +- .../MIR/X86/dbgcall-site-lea-interpretation.mir | 2 +- .../MIR/X86/dbgcall-site-partial-describe.mir | 2 +- .../DebugInfo/MIR/X86/dbgcall-site-reference.mir | 2 +- .../DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir | 2 +- .../MIR/X86/dbgcall-site-two-fwd-reg-defs.mir | 2 +- llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir | 2 +- .../DebugInfo/MIR/X86/debug-call-site-param.mir | 4 +- .../MIR/X86/entry-value-of-modified-param.mir | 2 +- .../DebugInfo/MIR/X86/entry-values-diamond-bbs.mir | 2 +- .../MIR/X86/kill-entry-value-after-diamond-bbs.mir | 2 +- .../MIR/X86/multiple-param-dbg-value-entry.mir | 2 +- .../MIR/X86/propagate-entry-value-cross-bbs.mir | 2 +- .../MIR/X86/unreachable-block-call-site.mir | 2 +- .../Sparc/entry-value-complex-reg-expr.ll | 2 - llvm/test/DebugInfo/X86/dbg-value-range.ll | 2 +- .../DebugInfo/X86/dbg-value-regmask-clobber.ll | 6 +- .../test/DebugInfo/X86/dbgcall-site-64-bit-imms.ll | 2 +- .../DebugInfo/X86/dbgcall-site-zero-valued-imms.ll | 2 +- llvm/test/DebugInfo/X86/loclists-dwp.ll | 6 +- llvm/test/DebugInfo/X86/no-entry-values-with-O0.ll | 88 - .../Transforms/Attributor/dereferenceable-1.ll | 44 +- llvm/test/Transforms/Attributor/nofree.ll | 5 +- llvm/test/Transforms/Attributor/nonnull.ll | 43 +- llvm/test/Transforms/IPConstantProp/PR26044.ll | 7 +- llvm/test/Transforms/InstSimplify/fp-undef.ll | 369 ----- llvm/test/Transforms/LICM/callbr-crash.ll | 18 + llvm/test/Transforms/SCCP/apint-bigint2.ll | 3 +- llvm/test/Transforms/SCCP/loadtest.ll | 2 +- llvm/test/Transforms/SCCP/loadtest2.ll | 14 + llvm/test/tools/llvm-dwarfdump/X86/locstats.ll | 2 +- .../llvm-dwarfdump/X86/stats-dbg-callsite-info.ll | 5 +- .../X86/valid-call-site-GNU-extensions.ll | 2 +- llvm/test/tools/llvm-locstats/locstats.ll | 6 +- .../unittests/CodeGen/GlobalISel/KnownBitsTest.cpp | 38 + llvm/unittests/IR/DominatorTreeTest.cpp | 31 + llvm/utils/UpdateTestChecks/asm.py | 13 +- llvm/utils/update_llc_test_checks.py | 3 + mlir/docs/DefiningAttributesAndTypes.md | 26 +- mlir/docs/Tutorials/Toy/Ch-4.md | 2 +- mlir/docs/Tutorials/Toy/Ch-5.md | 2 +- mlir/docs/Tutorials/Toy/Ch-6.md | 2 +- mlir/docs/WritingAPass.md | 2 +- mlir/include/mlir/Dialect/QuantOps/QuantTypes.h | 26 +- mlir/include/mlir/Dialect/SPIRV/TargetAndABI.h | 9 +- mlir/include/mlir/IR/Attributes.h | 30 +- mlir/include/mlir/IR/Location.h | 6 + mlir/include/mlir/IR/StandardTypes.h | 18 +- mlir/include/mlir/IR/StorageUniquerSupport.h | 20 +- mlir/include/mlir/IR/Types.h | 9 +- mlir/lib/Dialect/QuantOps/IR/QuantTypes.cpp | 69 +- mlir/lib/Dialect/SPIRV/TargetAndABI.cpp | 13 +- mlir/lib/Dialect/VectorOps/VectorTransforms.cpp | 101 +- mlir/lib/ExecutionEngine/ExecutionEngine.cpp | 16 +- mlir/lib/IR/AsmPrinter.cpp | 30 +- mlir/lib/IR/Attributes.cpp | 75 +- mlir/lib/IR/MLIRContext.cpp | 15 +- mlir/lib/IR/StandardTypes.cpp | 66 +- mlir/lib/IR/Types.cpp | 7 +- mlir/lib/Parser/Parser.cpp | 116 +- .../VectorOps/vector-contract-transforms.mlir | 81 + mlir/test/IR/dense-elements-hex.mlir | 28 + mlir/test/IR/invalid.mlir | 4 +- mlir/test/mlir-tblgen/op-attribute.td | 6 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 2 +- 296 files changed, 5387 insertions(+), 4460 deletions(-) create mode 100644 clang/test/CodeGen/arm-mve-intrinsics/vqdmullbq.c create mode 100644 clang/test/CodeGen/arm-mve-intrinsics/vqdmulltq.c create mode 100644 clang/test/CodeGen/non-power-of-2-alignment-assumptions.c create mode 100644 clang/test/Sema/warn-documentation-tag-typedef.cpp create mode 100644 libc/config/linux/signal.h.in create mode 100644 libc/include/signal.h.def create mode 100644 libc/src/signal/CMakeLists.txt create mode 100644 libc/src/signal/linux/CMakeLists.txt create mode 100644 libc/src/signal/linux/raise.cpp create mode 100644 libc/src/signal/linux/signal.h create mode 100644 libc/src/signal/raise.h create mode 100644 libc/test/src/signal/CMakeLists.txt create mode 100644 libc/test/src/signal/raise_test.cpp delete mode 100644 libclc/generic/lib/math/acos.inc copy lldb/{test/API/api/check_public_api_headers => packages/Python/lldbsuite/test [...] create mode 100644 lldb/packages/Python/lldbsuite/test/tools/lldb-server/registers [...] copy lldb/{test/Shell/SymbolFile/Inputs/target-symbols-add-unwind.c => packages/Py [...] delete mode 100644 lldb/test/API/README.md copy llvm/test/{Transforms/InstSimplify => Analysis/ConstantFolding}/fp-undef.ll (70%) create mode 100644 llvm/test/CodeGen/AArch64/sve-gep.ll create mode 100644 llvm/test/CodeGen/AMDGPU/speculative-execution-freecasts.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmull.ll create mode 100644 llvm/test/CodeGen/X86/pr44976.ll create mode 100644 llvm/test/CodeGen/XCore/bitrev.ll delete mode 100644 llvm/test/DebugInfo/MIR/ARM/dbgcallsite-noreg-is-imm-check.mir delete mode 100644 llvm/test/DebugInfo/X86/no-entry-values-with-O0.ll create mode 100644 llvm/test/Transforms/LICM/callbr-crash.ll create mode 100644 llvm/test/Transforms/SCCP/loadtest2.ll create mode 100644 mlir/test/IR/dense-elements-hex.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig updated (5749cc64 -> 41c5b060)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig in repository toolchain/ci/base-artifacts. discards 5749cc64 0: update: llvm-linux: all new 41c5b060 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (5749cc64) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 24 +- 02-build_llvm/console.log | 12709 ++++++++++++++------------- 03-build_linux/console.log | 4686 +++++----- 04-boot_linux/console.log | 6 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 10 +- console.log | 17456 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 17462 insertions(+), 17439 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allyesconfig updated (2ee6afc2b45 -> 8b3c0979ea1)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allyesconfig in repository toolchain/ci/gcc. from 2ee6afc2b45 Daily bump. adds f55bf4ddbfa i386: Skip ENDBR32 at the target function entry adds bd2537ed5d4 i386: Fix *vec_extractv2sf_1 and *vec_extractv2sf_1 shufps [...] adds 8b3c0979ea1 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 16 ++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/i386/i386.c | 7 ++++++- gcc/config/i386/mmx.md | 8 ++++---- gcc/testsuite/ChangeLog | 8 ++++++++ gcc/testsuite/gcc.target/i386/pr93656.c | 4 ++++ 6 files changed, 39 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr93656.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allyesconfig updated (9021015b -> 9651e568)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards 9021015b 0: update: binutils-gcc-linux: all new 9651e568 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (9021015b) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 124 +- 02-prepare_abe/console.log | 134 +- 03-build_abe-binutils/console.log | 11652 ++++++++--------- 04-build_abe-stage1/console.log | 12412 +++++++++--------- 05-build_linux/console.log | 752 +- 06-boot_linux/console.log | 6 +- 07-check_regression/console.log | 10 +- 08-update_baseline/console.log | 10 +- console.log | 25102 ++++++++++++++++++------------------ jenkins/manifest.sh | 8 +- 10 files changed, 25105 insertions(+), 25105 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allyesconfig updated (2ee6afc2b45 -> 8b3c0979ea1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allyesconfig in repository toolchain/ci/gcc. from 2ee6afc2b45 Daily bump. adds f55bf4ddbfa i386: Skip ENDBR32 at the target function entry adds bd2537ed5d4 i386: Fix *vec_extractv2sf_1 and *vec_extractv2sf_1 shufps [...] adds 8b3c0979ea1 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 16 ++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/i386/i386.c | 7 ++++++- gcc/config/i386/mmx.md | 8 ++++---- gcc/testsuite/ChangeLog | 8 ++++++++ gcc/testsuite/gcc.target/i386/pr93656.c | 4 ++++ 6 files changed, 39 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr93656.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

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Tcwg-commits February 2020