Tcwg-commits February 2020

tcwg-commits@lists.linaro.org

5 participants
12772 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-defconfig updated (8246c6ff -> f836af7d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-defconfig in repository toolchain/ci/base-artifacts. discards 8246c6ff 0: update: binutils-gcc-linux: boot new f836af7d 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (8246c6ff) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-n [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 182 +- 02-prepare_abe/console.log | 402 +- 03-build_abe-binutils/console.log | 10301 ++++++------- 04-build_abe-stage1/console.log | 17929 +++++++++++---------- 05-build_linux/console.log | 576 +- 06-boot_linux/console.log | 484 +- 07-check_regression/console.log | 10 +- 08-update_baseline/console.log | 10 +- console.log | 29900 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 10 files changed, 29887 insertions(+), 29919 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[gcc] branch master updated (3abfd4f3410 -> 4d6bf96b583)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 3abfd4f3410 amdgcn: Align VGPR pairs new 4d6bf96b583 sra: Only verify sizes of scalar accesses (PR 93845) The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 6 ++++++ gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/g++.dg/tree-ssa/pr93845.C | 30 ++++++++++++++++++++++++++++++ gcc/tree-sra.c | 3 ++- 4 files changed, 43 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/g++.dg/tree-ssa/pr93845.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig updated (6085593c128 -> 32e4e719663)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig in repository toolchain/ci/llvm-project. from 6085593c128 [AMDGPU] simplifyI24 - replace GetDemandedBits with Simplif [...] adds 0e417b034ad [AArch64][SVE] Re-arrange definitions in AArch64SVEInstrInf [...] adds 7b59ff2fa0a [lldb] Add boilerplate to recognize the .debug_tu_index section adds c7b7f76ae6a [lldb]: fix typo in lldb-gdb-remote.txt adds 9ea5d17cc95 [Sema] Demote call-site-based 'alignment is a power of two' [...] adds 2f215cf36ad Revert "Reland "[DebugInfo] Enable the debug entry values f [...] adds bb9e92bad55 [clang][Index] Fix the incomplete instantiations in libindex. adds fa221fc6b8a Regenerate rotate test. NFC. adds 977cd661cf0 [AMDGPU] Don’t marke the .note section as ALLOC adds 15e20dcb8f9 [Utils][x86] add an option to reduce scrubbing of shuffles [...] adds 083717cf499 AMDGPU: Fix v2i64<->v4f32 bitcast adds 659500c0c96 [NFC][RDA] Break-up initialization code adds 45f008704df [PowerPC][NFC] We do not save/restore vrsave for any remain [...] adds 216a6e05249 [x86] regenerate test checks with less shuffle scrubbing; NFC adds 1f984c83a41 Add #include <condition_variable> to fix build after 85fb997659b5 adds fc2b4a02b1a [DAGCombine] visitEXTRACT_VECTOR_ELT - add SimplifyDemanded [...] adds cb54c13c217 [clang][analyzer] Modify include AllocationState.h in Puten [...] adds 12cc105f806 [X86] Add DAG combines to form CVTPH2PS/CVTPS2PH from vXf16 [...] adds ce70e289987 [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations adds 914a97a4e61 [x86] add vector tests for splatted memory ops; NFC adds 9bbf271fc9d [AArch64] Move isOverflowIntrOpRes help function to the ISD [...] adds 3543ac9ab52 [X86] Rewrite LowerBRCOND to remove dead code and handle IS [...] adds e442f38395f [libc++] Fix unintended ADL inside ref(reference_wrapper<T> [...] adds 092a57f5082 [libc++] Fix unqualified call to 'ref' inside shared_ptr(un [...] adds db8911aad72 [clang-tidy] rename_check.py: maintain alphabetical order i [...] adds 0ed7a615438 [X86] Fix a -Wparentheses warning. NFC adds 6fa3894c4e7 [clang] Fix search path logic for C_INCLUDE_DIRS adds af64b31959f Add target.xml support for qXfer request. adds 0ffa6e1a7e1 [lldb] Fix version string when using LLDB_REVISION but not [...] adds f9c326364e7 [DAGCombiner] Use SDValue::getConstantOperandAPInt helper w [...] adds 726c342ce27 [macho][NFC] Extract all CPU_(SUB_)TYPE logic to libObject adds 70d8fec7c94 [mlir] Refactor the structure of the 'verifyConstructionInv [...] adds 3f785212e9c Revert "[macho][NFC] Extract all CPU_(SUB_)TYPE logic to li [...] adds da181d4ba0c [PowerPC][NFC] Cleanup some of the Darwin mentions in the R [...] adds 064cd2ecdb3 [x86] allow peeking through an extract_subvector to find a [...] adds 5d2baa956ac [libc] Add Initial Support for Signals adds 8928c6dbbf7 Fix some typos in the MLIR documentation. adds 6de21c556d1 [ORC][examples] Fix ThinLtoJIT example after changes in 85f [...] adds 813b1b9fd6c [ORC] Add a convenience method for setting the ExecutionSes [...] adds e2c2eb0a550 [X86] Fix NSW/NUW typo in avg test (PR44973) adds a11ff39ba2a [clang-format] Merge name and colon into a single token for [...] adds 7a7c753b0cc libclang: Make shared object symbol exporting by default adds 967eeb109be [AIX] Pack BasicBlockBits adds 2f56789c8fe [clang][doxygen] Fix false -Wdocumentation warning for tag [...] adds e4a9225f5d1 [GISel][KnownBits] Give up on PHI analysis as soon as we do [...] adds 6d34a87bae6 [cxx_status] Update -std= instructions for C++20. adds 0c8fa6db90a [llvm][build] Fix shared lib builds. [NFC] adds 3d0564c7e07 Revert "[NFCI][DebugInfo]: Corrected a Typo." adds 7ddbf802cf6 [ConstantFold] add/move tests for FP with undef operand; NFC adds 6f4d9d10293 Revert "[AArch64][SVE] Add intrinsics for SVE2 bitwise tern [...] adds e84444781aa Revert "libclang: Add static build support for Windows" and [...] adds 714265dabb6 [X86] Replace a bad use of MVT::getVectorVT with EVT::getVectorVT adds 1d8860f90bc Revert 714265dabb606bfef2f85694234f152edbfa91ac "[X86] Repl [...] adds c7b54a196e1 Recommit "[X86] Replace a bad use of MVT::getVectorVT with [...] adds 9e0c95572e5 [AIX] Improve 32/64-bit build configuration adds bf3f427ba23 [ASTImporter] Add linkage check to ASTNodeImporter::hasSame [...] adds 6123074d0c0 [Driver] Escape the program path for -frecord-command-line adds c767cf24e48 [SVE] Add support for lowering GEPs involving scalable vectors. adds 99809f98d7b [SCCP] Do not mark unknown loads as overdefined. adds ee260c1a0f1 [mlir] [VectorOps] Multi-dim reductions for lowering vector [...] adds 6d60d8695d2 [mlir] Use LLJIT::getMainJITDylib instead of hardcoding '<main>' adds 3ee28108273 [lldb/Plugin] Don't mark ProcessNetBSD as a plugin adds 577d9ce3553 Revert "[Driver] Escape the program path for -frecord-comma [...] adds 51bf5d3cc19 [mlir][Parser] Update DenseElementsAttr to print in hex whe [...] adds 0d19b016226 [lldb/Test] Remove stale README in test/API adds 07c559caef9 [libc++] Explain XFAILs with std::uncaught_exceptions test adds d95a10a7f97 [X86] Custom legalize v1i1 add/sub/mul to xor/xor/and with avx512. adds 5228a5544b2 [X86] Fix a couple copy mistakes in v4i1 or/and/xor isel patterns. adds b00ef8951b5 [X86] Custom legalize v1i1 UADDSAT/USUBSAT/SADDSAT/UADDSAT [...] adds 7e927698621 [X86] Expand vselect of v1i1 under avx512. adds e5782377f3f [X86] Add CMOV_VK1 pseudo so we don't crash on v1i1 ISD::SELECT adds 72ce0c8073b [libc++][regex] Validate backreferences in the constructor. adds d4ded05ba85 [libunwind][CMake] Treat S files as C to work around CMake bug. adds 2fe457690da Filter callbr insts from critical edge splitting adds 7593a480dbc [Dominators] Use Instruction::comesBefore for block-local q [...] adds e27b61c1ea3 [XCore] Add instruction pattern for bitrev adds 4b540fa8a1c [OpenMP][NFC] Remove leftover debug messages adds c32c8fd1437 [mlir] Use getOperation()->setAttr when generating attribut [...] adds d8969a1cb96 Split _LIBCPP_STRING_EXTERN_TEMPLATE_LIST up into a V1 and [...] adds 78be6187170 [X86] Add CMOV_VR64 pseudo instruction for MMX. Remove mmx [...] adds efeafa1bdaa libclc: Use acos implementation from amd_builtins adds 45766068315 [X86] Remove unnecessary isNullConstant in LowerSelect. NFC adds df74033ec9f [WebAssembly] Remove unneeded getWasmKindForNamedSection function adds 3bc525af235 [X86] Autogenerate complete checks. NFC adds 263bef2bbcb [X86] Make combineCMov not create unsupported FCMOVs when f [...] adds 97f11600e0b [X86] Don't bother avoiding illegal FCMOVs if we don't have [...] adds e326f524304 [clangd] Fix the incomplete template specialization in findTarget. adds 0e5ed1b2626 [lldb][NFC] Split up ClangASTSource::FindExternalVisibleDecls adds bc498198b55 [clangd] Allow renaming class templates in cross-file rename. adds e5eeb8465f2 Make unittests include path relative new d0b09f89e0e [NFC][mlir] Adding more operators to EDSC TemplatedIndexedValue new 32e4e719663 test/CodeGen/AMDGPU: Add a test case that shows a miscompilation The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clang-tidy/add_new_check.py | 10 +- clang-tools-extra/clang-tidy/rename_check.py | 32 +- clang-tools-extra/clangd/FindTarget.cpp | 10 +- clang-tools-extra/clangd/refactor/Rename.cpp | 7 - .../clangd/unittests/FindTargetTests.cpp | 10 + clang-tools-extra/clangd/unittests/RenameTests.cpp | 17 + clang-tools-extra/clangd/unittests/XRefsTests.cpp | 12 + clang-tools-extra/docs/ReleaseNotes.rst | 1 - clang/include/clang-c/Platform.h | 20 +- clang/include/clang/AST/CommentSema.h | 3 + clang/include/clang/Basic/CodeGenOptions.def | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 3 + clang/include/clang/Driver/CC1Options.td | 2 + clang/lib/AST/ASTImporter.cpp | 26 +- clang/lib/AST/CommentSema.cpp | 48 +- clang/lib/CodeGen/BackendUtil.cpp | 1 + clang/lib/CodeGen/CGCall.cpp | 4 + clang/lib/CodeGen/CGDebugInfo.cpp | 3 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 2 - clang/lib/Driver/ToolChains/Darwin.cpp | 2 +- clang/lib/Driver/ToolChains/Fuchsia.cpp | 2 +- clang/lib/Driver/ToolChains/Hurd.cpp | 2 +- clang/lib/Driver/ToolChains/Linux.cpp | 2 +- clang/lib/Driver/ToolChains/Solaris.cpp | 2 +- clang/lib/Driver/ToolChains/WebAssembly.cpp | 2 +- clang/lib/Format/FormatToken.h | 1 + clang/lib/Format/FormatTokenLexer.cpp | 35 + clang/lib/Format/FormatTokenLexer.h | 1 + clang/lib/Frontend/CompilerInvocation.cpp | 10 + clang/lib/Index/IndexingContext.cpp | 11 +- clang/lib/Sema/SemaChecking.cpp | 6 +- .../Checkers/cert/PutenvWithAutoChecker.cpp | 2 +- clang/test/CodeGen/debug-info-extern-call.c | 2 +- .../CodeGen/non-power-of-2-alignment-assumptions.c | 46 + .../CodeGenCXX/dbg-info-all-calls-described.cpp | 12 +- .../test/Index/Core/index-instantiated-source.cpp | 34 + clang/test/Index/Core/index-source.cpp | 6 +- clang/test/Sema/alloc-align-attr.c | 2 +- clang/test/Sema/warn-documentation-tag-typedef.cpp | 13 + clang/test/SemaCXX/alloc-align-attr.cpp | 6 +- clang/tools/libclang/CMakeLists.txt | 5 +- clang/unittests/Format/FormatTestCSharp.cpp | 17 +- clang/www/cxx_status.html | 2 +- libc/config/linux/api.td | 10 + libc/config/linux/signal.h.in | 11 + libc/include/CMakeLists.txt | 10 + libc/include/signal.h.def | 18 + libc/lib/CMakeLists.txt | 3 + libc/spec/linux.td | 45 + libc/spec/stdc.td | 24 + libc/src/CMakeLists.txt | 1 + libc/src/signal/CMakeLists.txt | 4 + libc/src/signal/linux/CMakeLists.txt | 14 + libc/src/signal/linux/raise.cpp | 26 + libc/src/signal/linux/signal.h | 49 + libc/src/signal/raise.h | 20 + libc/test/src/CMakeLists.txt | 1 + libc/test/src/signal/CMakeLists.txt | 12 + libc/test/src/signal/raise_test.cpp | 17 + libclc/generic/lib/math/acos.cl | 173 +- libclc/generic/lib/math/acos.inc | 36 - libcxx/include/__functional_base | 4 +- libcxx/include/__string | 66 +- libcxx/include/memory | 2 +- libcxx/include/regex | 2 + libcxx/include/string | 9 +- libcxx/src/string.cpp | 9 +- .../uncaught/uncaught_exceptions.pass.cpp | 16 +- .../re.regex.construct/bad_backref.pass.cpp | 56 +- .../refwrap/refwrap.helpers/cref_2.pass.cpp | 12 + .../refwrap/refwrap.helpers/ref_2.pass.cpp | 12 + .../util.smartptr.shared.const/unique_ptr.pass.cpp | 13 + libunwind/src/CMakeLists.txt | 4 +- lldb/docs/lldb-gdb-remote.txt | 2 +- lldb/include/lldb/lldb-enumerations.h | 1 + lldb/packages/Python/lldbsuite/test/decorators.py | 2 +- .../registers-target-xml-reading}/Makefile | 0 .../TestGdbRemoteTargetXmlPacket.py | 69 + .../registers-target-xml-reading/main.cpp} | 0 lldb/source/Core/Section.cpp | 2 + .../ExpressionParser/Clang/ClangASTSource.cpp | 187 +-- .../ExpressionParser/Clang/ClangASTSource.h | 5 + .../Plugins/ObjectFile/ELF/ObjectFileELF.cpp | 1 + .../Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp | 1 + lldb/source/Plugins/Process/NetBSD/CMakeLists.txt | 2 +- .../GDBRemoteCommunicationServerCommon.cpp | 1 + .../GDBRemoteCommunicationServerLLGS.cpp | 346 ++-- .../gdb-remote/GDBRemoteCommunicationServerLLGS.h | 2 + lldb/source/Symbol/ObjectFile.cpp | 1 + lldb/source/lldb.cpp | 4 +- lldb/test/API/README.md | 4 - .../basic_entry_values_x86_64/Makefile | 2 +- lldb/test/Shell/ObjectFile/ELF/section-types.yaml | 14 + llvm/CMakeLists.txt | 2 +- llvm/cmake/modules/GetHostTriple.cmake | 10 +- llvm/cmake/modules/HandleLLVMOptions.cmake | 11 - llvm/examples/ThinLtoJIT/ThinLtoJIT.cpp | 2 +- llvm/include/llvm/CodeGen/CommandFlags.inc | 2 +- llvm/include/llvm/CodeGen/ReachingDefAnalysis.h | 10 + llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 10 + llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h | 7 + llvm/include/llvm/IR/BasicBlock.h | 15 + llvm/include/llvm/Target/TargetMachine.h | 3 - llvm/include/llvm/Target/TargetOptions.h | 15 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 15 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 9 - llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 4 + llvm/lib/CodeGen/LiveDebugValues.cpp | 4 +- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 4 +- llvm/lib/CodeGen/MachineFunction.cpp | 3 +- llvm/lib/CodeGen/ReachingDefAnalysis.cpp | 44 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 45 +- .../CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 2 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 89 +- llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 12 - llvm/lib/CodeGen/TargetOptionsImpl.cpp | 8 - .../DWARF/DWARFAbbreviationDeclaration.cpp | 2 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 1 + llvm/lib/IR/Dominators.cpp | 14 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 17 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 3 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 65 +- llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 3 - llvm/lib/Target/AArch64/MCTargetDesc/LLVMBuild.txt | 2 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 2 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 2 + llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 6 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 +- llvm/lib/Target/ARM/ARMTargetMachine.cpp | 3 - llvm/lib/Target/ARM/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/PowerPC/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/PowerPC/README.txt | 61 - llvm/lib/Target/X86/X86ISelLowering.cpp | 483 +++--- llvm/lib/Target/X86/X86InstrAVX512.td | 4 +- llvm/lib/Target/X86/X86InstrCompiler.td | 8 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 3 - llvm/lib/Target/XCore/XCoreISelLowering.cpp | 1 + llvm/lib/Target/XCore/XCoreInstrInfo.td | 3 + llvm/lib/Transforms/Scalar/LICM.cpp | 3 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 7 + llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 3 +- .../ConstantFolding}/fp-undef.ll | 314 ++-- llvm/test/CodeGen/AArch64/arm64-anyregcc.ll | 2 +- llvm/test/CodeGen/AArch64/arm64-patchpoint.ll | 4 +- llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll | 2 +- llvm/test/CodeGen/AArch64/sve-gep.ll | 139 ++ .../CodeGen/AArch64/vecreduce-and-legalization.ll | 4 +- llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ll | 11 + llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll | 4 +- llvm/test/CodeGen/AMDGPU/hsa.ll | 3 +- llvm/test/CodeGen/AMDGPU/idot4s.ll | 40 +- llvm/test/CodeGen/AMDGPU/idot4u.ll | 33 +- llvm/test/CodeGen/AMDGPU/idot8s.ll | 246 ++- llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 35 + llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll | 44 +- llvm/test/CodeGen/ARM/rotate.ll | 11 +- llvm/test/CodeGen/ARM/smml.ll | 2 +- .../CodeGen/MIR/Hexagon/bundled-call-site-info.mir | 2 - .../test/CodeGen/MIR/X86/call-site-info-error1.mir | 2 +- .../test/CodeGen/MIR/X86/call-site-info-error2.mir | 2 +- .../test/CodeGen/MIR/X86/call-site-info-error3.mir | 2 +- .../test/CodeGen/MIR/X86/call-site-info-error4.mir | 4 +- llvm/test/CodeGen/PowerPC/unwind-dw2.ll | 16 +- llvm/test/CodeGen/X86/avg.ll | 4 +- llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll | 2 +- llvm/test/CodeGen/X86/avx-splat.ll | 6 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 433 +++++ llvm/test/CodeGen/X86/avx512-select.ll | 178 ++ .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 92 +- .../CodeGen/X86/bitcast-int-to-vector-bool-sext.ll | 10 +- .../CodeGen/X86/bitcast-int-to-vector-bool-zext.ll | 10 +- llvm/test/CodeGen/X86/call-site-info-output.ll | 4 +- llvm/test/CodeGen/X86/cmov-fp.ll | 1608 ++++++++++++++---- llvm/test/CodeGen/X86/extractelement-load.ll | 38 +- llvm/test/CodeGen/X86/fma.ll | 40 +- llvm/test/CodeGen/X86/half.ll | 57 +- llvm/test/CodeGen/X86/hoist-invariant-load.ll | 2 +- llvm/test/CodeGen/X86/insertelement-var-index.ll | 2 +- llvm/test/CodeGen/X86/masked_gather.ll | 185 +-- llvm/test/CodeGen/X86/pr34653.ll | 123 +- llvm/test/CodeGen/X86/pr44976.ll | 85 + llvm/test/CodeGen/X86/psadbw.ll | 3 +- llvm/test/CodeGen/X86/select-mmx.ll | 35 +- .../X86/speculative-load-hardening-indirect.ll | 2 +- llvm/test/CodeGen/X86/statepoint-allocas.ll | 2 +- llvm/test/CodeGen/X86/tail-dup-repeat.ll | 2 +- llvm/test/CodeGen/X86/vector-half-conversions.ll | 1713 +------------------- llvm/test/CodeGen/X86/vector-reduce-mul.ll | 147 +- llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll | 3 +- llvm/test/CodeGen/X86/x86-interleaved-access.ll | 299 ++++ llvm/test/CodeGen/X86/xray-custom-log.ll | 4 +- llvm/test/CodeGen/X86/xray-typed-event-log.ll | 4 +- llvm/test/CodeGen/XCore/bitrev.ll | 55 + .../DebugInfo/AArch64/call-site-info-output.ll | 2 +- llvm/test/DebugInfo/ARM/call-site-info-output.ll | 2 +- .../DebugInfo/ARM/entry-value-multi-byte-expr.ll | 2 +- .../MIR/AArch64/dbgcall-site-interpret-movzxi.mir | 2 +- .../MIR/AArch64/dbgcall-site-interpretation.mir | 2 +- .../MIR/AArch64/dbgcall-site-orr-moves.mir | 2 +- .../MIR/ARM/dbgcall-site-interpretation.mir | 2 +- .../MIR/ARM/dbgcall-site-propagated-value.mir | 4 +- .../MIR/ARM/dbgcallsite-noreg-is-imm-check.mir | 76 - .../MIR/ARM/if-coverter-call-site-info.mir | 5 +- .../dbgcall-site-instr-before-bundled-call.mir | 4 +- .../live-debug-values-bundled-entry-values.mir | 2 - llvm/test/DebugInfo/MIR/SystemZ/call-site-lzer.mir | 2 - llvm/test/DebugInfo/MIR/X86/DW_OP_entry_value.mir | 2 +- .../MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir | 10 +- .../dbg-call-site-spilled-arg-multiple-defs.mir | 4 +- .../MIR/X86/dbg-call-site-spilled-arg.mir | 4 +- .../MIR/X86/dbgcall-site-copy-super-sub.mir | 2 +- .../MIR/X86/dbgcall-site-interpretation.mir | 2 +- .../MIR/X86/dbgcall-site-lea-interpretation.mir | 2 +- .../MIR/X86/dbgcall-site-partial-describe.mir | 2 +- .../DebugInfo/MIR/X86/dbgcall-site-reference.mir | 2 +- .../DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir | 2 +- .../MIR/X86/dbgcall-site-two-fwd-reg-defs.mir | 2 +- llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir | 2 +- .../DebugInfo/MIR/X86/debug-call-site-param.mir | 4 +- .../MIR/X86/entry-value-of-modified-param.mir | 2 +- .../DebugInfo/MIR/X86/entry-values-diamond-bbs.mir | 2 +- .../MIR/X86/kill-entry-value-after-diamond-bbs.mir | 2 +- .../MIR/X86/multiple-param-dbg-value-entry.mir | 2 +- .../MIR/X86/propagate-entry-value-cross-bbs.mir | 2 +- .../MIR/X86/unreachable-block-call-site.mir | 2 +- .../Sparc/entry-value-complex-reg-expr.ll | 2 - llvm/test/DebugInfo/X86/dbg-value-range.ll | 2 +- .../DebugInfo/X86/dbg-value-regmask-clobber.ll | 6 +- .../test/DebugInfo/X86/dbgcall-site-64-bit-imms.ll | 2 +- .../DebugInfo/X86/dbgcall-site-zero-valued-imms.ll | 2 +- llvm/test/DebugInfo/X86/loclists-dwp.ll | 6 +- llvm/test/DebugInfo/X86/no-entry-values-with-O0.ll | 88 - llvm/test/Transforms/IPConstantProp/PR26044.ll | 7 +- llvm/test/Transforms/InstSimplify/fp-undef.ll | 369 ----- llvm/test/Transforms/LICM/callbr-crash.ll | 18 + llvm/test/Transforms/SCCP/apint-bigint2.ll | 3 +- llvm/test/Transforms/SCCP/loadtest.ll | 2 +- llvm/test/Transforms/SCCP/loadtest2.ll | 14 + llvm/test/tools/llvm-dwarfdump/X86/locstats.ll | 2 +- .../llvm-dwarfdump/X86/stats-dbg-callsite-info.ll | 5 +- .../X86/valid-call-site-GNU-extensions.ll | 2 +- llvm/test/tools/llvm-locstats/locstats.ll | 6 +- .../unittests/CodeGen/GlobalISel/KnownBitsTest.cpp | 38 + llvm/unittests/IR/DominatorTreeTest.cpp | 31 + llvm/unittests/TableGen/CMakeLists.txt | 2 +- llvm/utils/UpdateTestChecks/asm.py | 13 +- llvm/utils/update_llc_test_checks.py | 3 + mlir/docs/DefiningAttributesAndTypes.md | 26 +- mlir/docs/Tutorials/Toy/Ch-4.md | 2 +- mlir/docs/Tutorials/Toy/Ch-5.md | 2 +- mlir/docs/Tutorials/Toy/Ch-6.md | 2 +- mlir/docs/WritingAPass.md | 2 +- .../include/mlir/Dialect/AffineOps/EDSC/Builders.h | 67 +- mlir/include/mlir/Dialect/QuantOps/QuantTypes.h | 26 +- mlir/include/mlir/Dialect/SPIRV/TargetAndABI.h | 9 +- mlir/include/mlir/EDSC/Builders.h | 64 +- mlir/include/mlir/IR/Attributes.h | 30 +- mlir/include/mlir/IR/Location.h | 6 + mlir/include/mlir/IR/StandardTypes.h | 18 +- mlir/include/mlir/IR/StorageUniquerSupport.h | 20 +- mlir/include/mlir/IR/Types.h | 9 +- mlir/lib/Dialect/QuantOps/IR/QuantTypes.cpp | 69 +- mlir/lib/Dialect/SPIRV/TargetAndABI.cpp | 13 +- mlir/lib/Dialect/VectorOps/VectorTransforms.cpp | 101 +- mlir/lib/ExecutionEngine/ExecutionEngine.cpp | 16 +- mlir/lib/IR/AsmPrinter.cpp | 30 +- mlir/lib/IR/Attributes.cpp | 75 +- mlir/lib/IR/MLIRContext.cpp | 15 +- mlir/lib/IR/StandardTypes.cpp | 66 +- mlir/lib/IR/Types.cpp | 7 +- mlir/lib/Parser/Parser.cpp | 116 +- .../VectorOps/vector-contract-transforms.mlir | 81 + mlir/test/IR/dense-elements-hex.mlir | 28 + mlir/test/IR/invalid.mlir | 4 +- mlir/test/mlir-tblgen/op-attribute.td | 6 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 2 +- 276 files changed, 6048 insertions(+), 4504 deletions(-) create mode 100644 clang/test/CodeGen/non-power-of-2-alignment-assumptions.c create mode 100644 clang/test/Sema/warn-documentation-tag-typedef.cpp create mode 100644 libc/config/linux/signal.h.in create mode 100644 libc/include/signal.h.def create mode 100644 libc/src/signal/CMakeLists.txt create mode 100644 libc/src/signal/linux/CMakeLists.txt create mode 100644 libc/src/signal/linux/raise.cpp create mode 100644 libc/src/signal/linux/signal.h create mode 100644 libc/src/signal/raise.h create mode 100644 libc/test/src/signal/CMakeLists.txt create mode 100644 libc/test/src/signal/raise_test.cpp delete mode 100644 libclc/generic/lib/math/acos.inc copy lldb/{test/API/api/check_public_api_headers => packages/Python/lldbsuite/test [...] create mode 100644 lldb/packages/Python/lldbsuite/test/tools/lldb-server/registers [...] copy lldb/{test/Shell/SymbolFile/Inputs/target-symbols-add-unwind.c => packages/Py [...] delete mode 100644 lldb/test/API/README.md copy llvm/test/{Transforms/InstSimplify => Analysis/ConstantFolding}/fp-undef.ll (70%) create mode 100644 llvm/test/CodeGen/AArch64/sve-gep.ll create mode 100644 llvm/test/CodeGen/X86/pr44976.ll create mode 100644 llvm/test/CodeGen/XCore/bitrev.ll delete mode 100644 llvm/test/DebugInfo/MIR/ARM/dbgcallsite-noreg-is-imm-check.mir delete mode 100644 llvm/test/DebugInfo/X86/no-entry-values-with-O0.ll create mode 100644 llvm/test/Transforms/LICM/callbr-crash.ll create mode 100644 llvm/test/Transforms/SCCP/loadtest2.ll create mode 100644 mlir/test/IR/dense-elements-hex.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig updated (e1e44d25 -> 5d7af858)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards e1e44d25 0: update: llvm-linux: boot new 5d7af858 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (e1e44d25) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 124 +- 02-build_llvm/console.log | 12606 +++++++++++++++++------------------ 03-build_linux/console.log | 896 ++- 04-boot_linux/console.log | 4 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 2 +- console.log | 13634 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 13638 insertions(+), 13638 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig updated (f004359106c -> 3a91c12e7aa)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig in repository toolchain/ci/llvm-project. from f004359106c [windows] Add /Gw to compiler flags adds 4bcdac8d762 [RISCV] Correct the CallPreservedMask for the function call [...] adds a572a8a147c [CMake] CheckAtomic.cmake: catch false positives in RISC-V adds 7a18790ae2f [libc++] Fix ABI break in __bit_reference. adds d75ce45777d Revert "[CMake] CheckAtomic.cmake: catch false positives in [...] adds da0fe2ade36 Filter callbr insts from critical edge splitting new 3a91c12e7aa [docs] Add some LLDB release notes The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: libcxx/include/__bit_reference | 15 +++++ .../trivial_for_purposes_of_call.pass.cpp | 57 ++++++++++++++++++ llvm/docs/ReleaseNotes.rst | 9 +++ llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 7 --- llvm/lib/Transforms/Scalar/LICM.cpp | 3 +- llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 3 +- llvm/test/CodeGen/RISCV/interrupt-attr-callee.ll | 70 ++++++++++++++++++++++ llvm/test/Transforms/LICM/callbr-crash.ll | 18 ++++++ 8 files changed, 173 insertions(+), 9 deletions(-) create mode 100644 libcxx/test/libcxx/containers/sequences/vector.bool/trivial_for [...] create mode 100644 llvm/test/CodeGen/RISCV/interrupt-attr-callee.ll create mode 100644 llvm/test/Transforms/LICM/callbr-crash.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig updated (6845ef33 -> 6746a316)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards 6845ef33 0: update: llvm-linux: 18068 new 6746a316 0: update: llvm-linux: 18068 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (6845ef33) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 24 +- 02-build_llvm/console.log | 12664 +++++++++++++++++------------------ 03-build_linux/console.log | 700 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 32 + console.log | 13422 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 7 files changed, 13456 insertions(+), 13396 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig updated (20fa41e61fd -> a0ee8352df6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig in repository toolchain/ci/gcc. from 20fa41e61fd libstdc++: Remove std::type_info::operator!= for C++20 adds 4be779f59b0 libstdc++: Define operator<=> for <system_error> types adds e817c23f680 libstdc++: Issues with range access CPOs (P2091R0) adds b82d4266624 rs6000: Fix infinite loop building ghostscript and icu [PR93658] adds 2c52b2884ba OpenACC's tile clause fix for implicit typing (PR93825) adds e6f24f824be rs6000: Fix infinite loop building ghostscript and icu [PR93658] adds 5586e5060fb libstdc++: Forward second argument of views::iota using the [...] adds 6e63438a0d7 libstdc++: Fix capturing of lvalue references in_RangeAdapt [...] adds f6088573d81 i386: Fix *vec_extractv2sf_1 and *vec_extractv2sf_1 shufps [...] adds d56779b8ae5 i386: Fix *vec_extractv2sf_1 and *vec_extractv2sf_1 shufps [...] adds 7004e09db1e testsuite: Do not run g++.target/i386/pr93828.C on 32bit targets. adds 96cbc56ed96 PR c++/93801 - False -Wmismatched-tags upon redundant typename adds 33fe984aca4 Daily bump. adds afbffe08646 Allow CONFIG_SHELL to override build-time shell in mkheaders adds 6f83ceb8cf6 MAINTAINERS: Change to my personal email address adds 902d28bd838 aarch64: Fix inverted approx_sqrt condition adds 0df28e68fd1 aarch64: Avoid creating an unused register adds d87778ed097 aarch64: Bump AARCH64_APPROX_MODE to 64 bits adds 04f307cbb9e aarch64: Add SVE support for -mlow-precision-div adds a0ee8352df6 aarch64: Add SVE support for -mlow-precision-sqrt No new revisions were added by this update. Summary of changes: ChangeLog | 4 + MAINTAINERS | 2 +- fixincludes/ChangeLog | 4 + fixincludes/mkheaders.in | 22 ++++- gcc/ChangeLog | 47 ++++++++++ gcc/DATESTAMP | 2 +- gcc/config/aarch64/aarch64-protos.h | 16 ++-- gcc/config/aarch64/aarch64-sve.md | 100 ++++++++++++++++++++- gcc/config/aarch64/aarch64.c | 96 +++++++++++++++----- gcc/config/aarch64/iterators.md | 24 +++++ gcc/config/i386/mmx.md | 8 +- gcc/config/rs6000/rs6000.c | 2 +- gcc/cp/ChangeLog | 5 ++ gcc/cp/parser.c | 7 ++ gcc/fortran/ChangeLog | 25 ++++-- gcc/fortran/openmp.c | 15 +++- gcc/testsuite/ChangeLog | 34 +++++++ gcc/testsuite/g++.dg/warn/Wredundant-tags-3.C | 45 ++++++++++ gcc/testsuite/g++.target/i386/pr93828.C | 17 ++++ gcc/testsuite/gcc.target/aarch64/sve/recip_1.c | 27 ++++++ gcc/testsuite/gcc.target/aarch64/sve/recip_1_run.c | 27 ++++++ gcc/testsuite/gcc.target/aarch64/sve/recip_2.c | 27 ++++++ gcc/testsuite/gcc.target/aarch64/sve/recip_2_run.c | 30 +++++++ gcc/testsuite/gcc.target/aarch64/sve/rsqrt_1.c | 27 ++++++ gcc/testsuite/gcc.target/aarch64/sve/rsqrt_1_run.c | 27 ++++++ gcc/testsuite/gcc.target/aarch64/sve/sqrt_1.c | 30 +++++++ gcc/testsuite/gcc.target/aarch64/sve/sqrt_1_run.c | 27 ++++++ gcc/testsuite/gcc.target/powerpc/pr93658.c | 20 +++++ gcc/testsuite/gfortran.dg/goacc/tile-3.f90 | 13 +++ libstdc++-v3/ChangeLog | 54 +++++++++++ libstdc++-v3/include/bits/range_access.h | 42 +++++---- libstdc++-v3/include/std/ranges | 62 +++++++++++-- libstdc++-v3/include/std/system_error | 79 +++++++++++----- .../error_category/operators/less.cc} | 22 ++--- .../operators/three_way.cc} | 36 ++++---- .../19_diagnostics/error_code/operators/equal.cc | 1 - .../error_code/operators/{equal.cc => less.cc} | 15 ++-- .../error_code/operators/not_equal.cc | 1 - .../operators/{equal.cc => three_way.cc} | 37 ++++++-- .../error_condition/operators/equal.cc | 1 - .../operators/{equal.cc => less.cc} | 20 ++--- .../error_condition/operators/not_equal.cc | 1 - .../operators/{equal.cc => three_way.cc} | 32 +++++-- libstdc++-v3/testsuite/std/ranges/access/begin.cc | 6 +- .../std/ranges/access/{end_neg.cc => begin_neg.cc} | 13 ++- .../testsuite/std/ranges/access/end_neg.cc | 5 +- .../testsuite/std/ranges/access/size_neg.cc | 3 +- libstdc++-v3/testsuite/std/ranges/access/ssize.cc | 7 +- .../testsuite/std/ranges/adaptors/split.cc | 18 ++++ .../{access/end_neg.cc => adaptors/split_neg.cc} | 31 ++++--- .../testsuite/std/ranges/iota/iota_view.cc | 17 ++++ 51 files changed, 1030 insertions(+), 203 deletions(-) create mode 100644 gcc/testsuite/g++.dg/warn/Wredundant-tags-3.C create mode 100644 gcc/testsuite/g++.target/i386/pr93828.C create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/recip_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/recip_1_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/recip_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/recip_2_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/rsqrt_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/rsqrt_1_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/sqrt_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/sqrt_1_run.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr93658.c create mode 100644 gcc/testsuite/gfortran.dg/goacc/tile-3.f90 copy libstdc++-v3/testsuite/{std/ranges/access/size_neg.cc => 19_diagnostics/error [...] copy libstdc++-v3/testsuite/19_diagnostics/{error_condition/operators/equal.cc => [...] copy libstdc++-v3/testsuite/19_diagnostics/error_code/operators/{equal.cc => less. [...] copy libstdc++-v3/testsuite/19_diagnostics/error_code/operators/{equal.cc => three [...] copy libstdc++-v3/testsuite/19_diagnostics/error_condition/operators/{equal.cc => [...] copy libstdc++-v3/testsuite/19_diagnostics/error_condition/operators/{equal.cc => [...] copy libstdc++-v3/testsuite/std/ranges/access/{end_neg.cc => begin_neg.cc} (77%) copy libstdc++-v3/testsuite/std/ranges/{access/end_neg.cc => adaptors/split_neg.cc} (52%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig updated (d13c7322fe -> c7adb09f35)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig in repository toolchain/ci/binutils-gdb. from d13c7322fe gdb: Allow more control over where to find python libraries adds 00e49dff20 Stop the BFD library from automatically converting OS and PR [...] adds 5ef9273d29 gdbserver: start turning the target ops vector into a class adds 15295543f9 gdbserver: turn target op 'create_inferior' into a method adds 6dee9afb0e gdbserver: turn target op 'post_create_inferior' into a method adds ef03dad808 gdbserver: turn target op 'attach' into a method adds c6885a575f gdbserver: turn target op 'kill' into a method adds 9061c9cfb3 gdbserver: turn target op 'detach' into a method adds 8adb37b9c0 gdbserver: turn target op 'mourn' into a method adds 95a49a3939 gdbserver: turn target op 'join' into a method adds 13d3d99b27 gdbserver: turn target op 'thread_alive' into a method adds 0e4d7e35fb gdbserver: turn target op 'resume' into a method adds 6532e7e378 gdbserver: turn target op 'wait' into a method adds a5a4d4cd0c gdbserver: turn target ops 'fetch_registers' and 'store_regi [...] adds 79b4408780 gdbserver: turn prepare_to_access_memory & done_accessing_me [...] adds e2558df32b gdbserver: turn target ops 'read_memory' and 'write_memory' [...] adds 2a31c7aa00 gdbserver: turn target op 'look_up_symbols' into a method adds eb497a2a77 gdbserver: turn target op 'request_interrupt' into a method adds eac215cc61 gdbserver: turn target op 'read_auxv' into a method adds a2b2297a20 gdbserver: turn target op 'supports_z_point_type' into a method adds 7e0bde70ca gdbserver: turn target ops 'insert_point' and 'remove_point' [...] adds 84320c4ea7 gdbserver: turn target op '{supports_}stopped_by_sw_breakpoi [...] adds 93fe88b24c gdbserver: turn target op '{supports_}stopped_by_hw_breakpoi [...] adds 22aa6223a0 gdbserver: turn target op 'supports_hardware_single_step' in [...] adds 6eeb5c5531 gdbserver: turn target ops 'stopped_by_watchpoint' and 'stop [...] adds 5203ae1e87 gdbserver: turn target op 'read_offsets' into a method adds 6e3fd7e948 gdbserver: turn target op 'get_tls_address' into a method adds ea06bbaaaa gdbserver: turn target op 'hostio_last_error' into a method adds 2d0795ee38 gdbserver: turn target op 'qxfer_osdata' into a method adds d7abedf7e7 gdbserver: turn target op 'qxfer_siginfo' into a method adds 0dc587d425 gdbserver: turn non-stop and async target ops into methods adds 652aef7792 gdbserver: turn target op 'supports_multi_process' into a method adds 9690a72ae5 gdbserver: turn target ops 'supports_{fork,vfork,exec}_event [...] adds fb00dfcef0 gdbserver: turn target op 'handle_new_gdb_connection' into a method adds 55cf302157 gdbserver: turn target op 'handle_monitor_command' into a method adds 95a45fc165 gdbserver: turn target op 'core_of_thread' into a method adds 9da41fdae0 gdbserver: turn target op 'read_loadmap' into a method adds 0df28b1b4b gdbserver: turn target op 'process_qsupported' into a method adds 290732bfb3 gdbserver: turn target op 'supports_tracepoints' into a method adds 770d8f6a51 gdbserver: turn target ops 'read_pc' and 'write_pc' into methods adds 68119632a0 gdbserver: turn target op 'thread_stopped' into a method adds 4e2e869cb3 gdbserver: turn target op 'get_tib_address' into a method adds 29e8dc09ff gdbserver: turn target ops 'pause_all' and 'unpause_all' int [...] adds 5c9eb2f2b5 gdbserver: turn target op 'stabilize_threads' into a method adds c23c939174 gdbserver: turn fast tracepoint target ops into methods adds 345dafadc2 gdbserver: turn target op 'emit_ops' into a method adds c756403b17 gdbserver: turn target op 'supports_disable_randomization' i [...] adds 974387bb25 gdbserver: turn target op 'qxfer_libraries_svr4' into a method adds c0245cb999 gdbserver: turn target op 'supports_agent' into a method adds 79597bdd56 gdbserver: turn btrace-related target ops into methods adds 2526e0cd95 gdbserver: turn target op 'supports_range_stepping' into a method adds 8247b8236b gdbserver: turn target op 'pid_to_exec_file' into a method adds c9b7b80460 gdbserver: turn target ops 'multifs_{open, readlink, unlink} [...] adds d367006fb7 gdbserver: turn breakpoint kind-related target ops into methods adds 7f63b89b3a gdbserver: turn target ops 'thread_name' and 'thread_handle' [...] adds 5303a34f90 gdbserver: turn target op 'supports_software_single_step' in [...] adds bc8d3ae432 gdbserver: turn target op 'supports_catch_syscall' into a method adds d633e83140 gdbserver: turn target op 'get_ipa_tdesc_idx' into a method adds 478f9adff5 gdbserver: simply copy the pointer in 'set_target_ops' adds 52405d85ec gdbserver: finish turning the target ops vector into a class adds a9c798035d [gdb/testsuite] Fix hello.go xpass adds 3f702acd7d Make '{putchar,fputc}_unfiltered' use 'fputs_unfiltered' adds 6565bf67ad Automatic date update in version.in adds dda2980f54 PR25569, PDP11 ld -s clobbers last data byte adds 10a95fcc1f pdp11 reloc processing adds bd0cf5a6ba RISC-V: Support the ISA-dependent CSR checking. adds 2ca89224b1 RISC-V: Disable the CSR checking by default. adds 54b2aec10d RISC-V: Support the read-only CSR checking. adds 22b6cd7043 Fix latent bug in dwarf2_find_containing_comp_unit adds 24ac169ac5 gdb/testsuite: Regenerate the testglue if it is not in adds c7adb09f35 Fix typo in gdb/testsuite/ChangeLog No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 23 + bfd/aoutx.h | 179 +- bfd/elf-bfd.h | 6 + bfd/elf.c | 19 +- bfd/elfxx-target.h | 5 + bfd/pdp11.c | 260 +-- bfd/version.h | 2 +- binutils/ChangeLog | 5 + binutils/dwarf.c | 2 +- gas/ChangeLog | 69 + gas/config/obj-aout.c | 48 +- gas/config/tc-pdp11.c | 30 +- gas/config/tc-riscv.c | 188 ++- gas/doc/c-riscv.texi | 13 + gas/testsuite/gas/riscv/csr-dw-regnums.d | 2 +- gas/testsuite/gas/riscv/priv-reg-fail-fext.d | 3 + gas/testsuite/gas/riscv/priv-reg-fail-fext.l | 4 + .../gas/riscv/priv-reg-fail-read-only-01.d | 3 + .../gas/riscv/priv-reg-fail-read-only-01.l | 69 + .../gas/riscv/priv-reg-fail-read-only-01.s | 269 +++ .../gas/riscv/priv-reg-fail-read-only-02.d | 3 + .../gas/riscv/priv-reg-fail-read-only-02.l | 25 + .../gas/riscv/priv-reg-fail-read-only-02.s | 90 + gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d | 3 + gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l | 66 + gas/testsuite/gas/riscv/priv-reg.d | 2 +- gdb/ChangeLog | 24 + gdb/dwarf2/read.c | 94 +- gdb/features/riscv/64bit-csr.xml | 65 - gdb/features/riscv/rebuild-csr-xml.sh | 10 +- gdb/riscv-tdep.c | 6 +- gdb/riscv-tdep.h | 2 +- gdb/testsuite/ChangeLog | 19 + .../{hello.exp => global-local-var-shadow.exp} | 17 +- .../{hello.go => global-local-var-shadow.go} | 3 +- gdb/testsuite/gdb.go/hello.exp | 7 - gdb/testsuite/gdb.go/hello.go | 5 +- gdb/testsuite/lib/gdb.exp | 13 +- gdb/utils.c | 25 +- gdbserver/ChangeLog | 1772 ++++++++++++++++++++ gdbserver/hostio.cc | 13 +- gdbserver/linux-aarch32-low.cc | 6 +- gdbserver/linux-aarch64-low.cc | 4 +- gdbserver/linux-arm-low.cc | 8 +- gdbserver/linux-cris-low.cc | 4 +- gdbserver/linux-crisv32-low.cc | 4 +- gdbserver/linux-low.cc | 658 ++++---- gdbserver/linux-low.h | 219 +++ gdbserver/linux-m32r-low.cc | 4 +- gdbserver/linux-mips-low.cc | 2 +- gdbserver/linux-nios2-low.cc | 4 +- gdbserver/linux-ppc-low.cc | 2 +- gdbserver/linux-sh-low.cc | 2 +- gdbserver/linux-sparc-low.cc | 6 +- gdbserver/linux-tic6x-low.cc | 2 +- gdbserver/linux-tile-low.cc | 2 +- gdbserver/linux-x86-low.cc | 2 +- gdbserver/linux-xtensa-low.cc | 4 +- gdbserver/lynx-low.cc | 139 +- gdbserver/lynx-low.h | 43 + gdbserver/mem-break.cc | 11 +- gdbserver/nto-low.cc | 208 +-- gdbserver/nto-low.h | 60 + gdbserver/regcache.cc | 16 +- gdbserver/remote-utils.cc | 13 +- gdbserver/server.cc | 77 +- gdbserver/target.cc | 570 ++++++- gdbserver/target.h | 554 +++--- gdbserver/tracepoint.cc | 54 +- gdbserver/win32-low.cc | 221 +-- gdbserver/win32-low.h | 69 + include/ChangeLog | 5 + include/opcode/riscv-opc.h | 488 +++--- opcodes/ChangeLog | 5 + opcodes/riscv-dis.c | 2 +- 75 files changed, 5162 insertions(+), 1769 deletions(-) create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-fext.d create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-fext.l create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.s create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.d create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.l create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.s create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l copy gdb/testsuite/gdb.go/{hello.exp => global-local-var-shadow.exp} (77%) copy gdb/testsuite/gdb.go/{hello.go => global-local-var-shadow.go} (81%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig updated (44160fce -> 7a78f56d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards 44160fce 0: update: binutils-gcc-linux: all new 7a78f56d 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (44160fce) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-lt [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 412 +- 03-build_abe-binutils/console.log | 11366 ++++++----- 04-build_abe-stage1/console.log | 20226 +++++++++---------- 05-build_linux/console.log | 5602 +++--- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 37742 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 10 files changed, 37699 insertions(+), 37795 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-allmodconfig updated (20fa41e61fd -> a0ee8352df6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-allmodconfig in repository toolchain/ci/gcc. from 20fa41e61fd libstdc++: Remove std::type_info::operator!= for C++20 adds 4be779f59b0 libstdc++: Define operator<=> for <system_error> types adds e817c23f680 libstdc++: Issues with range access CPOs (P2091R0) adds b82d4266624 rs6000: Fix infinite loop building ghostscript and icu [PR93658] adds 2c52b2884ba OpenACC's tile clause fix for implicit typing (PR93825) adds e6f24f824be rs6000: Fix infinite loop building ghostscript and icu [PR93658] adds 5586e5060fb libstdc++: Forward second argument of views::iota using the [...] adds 6e63438a0d7 libstdc++: Fix capturing of lvalue references in_RangeAdapt [...] adds f6088573d81 i386: Fix *vec_extractv2sf_1 and *vec_extractv2sf_1 shufps [...] adds d56779b8ae5 i386: Fix *vec_extractv2sf_1 and *vec_extractv2sf_1 shufps [...] adds 7004e09db1e testsuite: Do not run g++.target/i386/pr93828.C on 32bit targets. adds 96cbc56ed96 PR c++/93801 - False -Wmismatched-tags upon redundant typename adds 33fe984aca4 Daily bump. adds afbffe08646 Allow CONFIG_SHELL to override build-time shell in mkheaders adds 6f83ceb8cf6 MAINTAINERS: Change to my personal email address adds 902d28bd838 aarch64: Fix inverted approx_sqrt condition adds 0df28e68fd1 aarch64: Avoid creating an unused register adds d87778ed097 aarch64: Bump AARCH64_APPROX_MODE to 64 bits adds 04f307cbb9e aarch64: Add SVE support for -mlow-precision-div adds a0ee8352df6 aarch64: Add SVE support for -mlow-precision-sqrt No new revisions were added by this update. Summary of changes: ChangeLog | 4 + MAINTAINERS | 2 +- fixincludes/ChangeLog | 4 + fixincludes/mkheaders.in | 22 ++++- gcc/ChangeLog | 47 ++++++++++ gcc/DATESTAMP | 2 +- gcc/config/aarch64/aarch64-protos.h | 16 ++-- gcc/config/aarch64/aarch64-sve.md | 100 ++++++++++++++++++++- gcc/config/aarch64/aarch64.c | 96 +++++++++++++++----- gcc/config/aarch64/iterators.md | 24 +++++ gcc/config/i386/mmx.md | 8 +- gcc/config/rs6000/rs6000.c | 2 +- gcc/cp/ChangeLog | 5 ++ gcc/cp/parser.c | 7 ++ gcc/fortran/ChangeLog | 25 ++++-- gcc/fortran/openmp.c | 15 +++- gcc/testsuite/ChangeLog | 34 +++++++ gcc/testsuite/g++.dg/warn/Wredundant-tags-3.C | 45 ++++++++++ gcc/testsuite/g++.target/i386/pr93828.C | 17 ++++ gcc/testsuite/gcc.target/aarch64/sve/recip_1.c | 27 ++++++ gcc/testsuite/gcc.target/aarch64/sve/recip_1_run.c | 27 ++++++ gcc/testsuite/gcc.target/aarch64/sve/recip_2.c | 27 ++++++ gcc/testsuite/gcc.target/aarch64/sve/recip_2_run.c | 30 +++++++ gcc/testsuite/gcc.target/aarch64/sve/rsqrt_1.c | 27 ++++++ gcc/testsuite/gcc.target/aarch64/sve/rsqrt_1_run.c | 27 ++++++ gcc/testsuite/gcc.target/aarch64/sve/sqrt_1.c | 30 +++++++ gcc/testsuite/gcc.target/aarch64/sve/sqrt_1_run.c | 27 ++++++ gcc/testsuite/gcc.target/powerpc/pr93658.c | 20 +++++ gcc/testsuite/gfortran.dg/goacc/tile-3.f90 | 13 +++ libstdc++-v3/ChangeLog | 54 +++++++++++ libstdc++-v3/include/bits/range_access.h | 42 +++++---- libstdc++-v3/include/std/ranges | 62 +++++++++++-- libstdc++-v3/include/std/system_error | 79 +++++++++++----- .../error_category/operators/less.cc} | 22 ++--- .../operators/three_way.cc} | 36 ++++---- .../19_diagnostics/error_code/operators/equal.cc | 1 - .../error_code/operators/{equal.cc => less.cc} | 15 ++-- .../error_code/operators/not_equal.cc | 1 - .../operators/{equal.cc => three_way.cc} | 37 ++++++-- .../error_condition/operators/equal.cc | 1 - .../operators/{equal.cc => less.cc} | 20 ++--- .../error_condition/operators/not_equal.cc | 1 - .../operators/{equal.cc => three_way.cc} | 32 +++++-- libstdc++-v3/testsuite/std/ranges/access/begin.cc | 6 +- .../std/ranges/access/{end_neg.cc => begin_neg.cc} | 13 ++- .../testsuite/std/ranges/access/end_neg.cc | 5 +- .../testsuite/std/ranges/access/size_neg.cc | 3 +- libstdc++-v3/testsuite/std/ranges/access/ssize.cc | 7 +- .../testsuite/std/ranges/adaptors/split.cc | 18 ++++ .../{access/end_neg.cc => adaptors/split_neg.cc} | 31 ++++--- .../testsuite/std/ranges/iota/iota_view.cc | 17 ++++ 51 files changed, 1030 insertions(+), 203 deletions(-) create mode 100644 gcc/testsuite/g++.dg/warn/Wredundant-tags-3.C create mode 100644 gcc/testsuite/g++.target/i386/pr93828.C create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/recip_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/recip_1_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/recip_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/recip_2_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/rsqrt_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/rsqrt_1_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/sqrt_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/sqrt_1_run.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr93658.c create mode 100644 gcc/testsuite/gfortran.dg/goacc/tile-3.f90 copy libstdc++-v3/testsuite/{std/ranges/access/size_neg.cc => 19_diagnostics/error [...] copy libstdc++-v3/testsuite/19_diagnostics/{error_condition/operators/equal.cc => [...] copy libstdc++-v3/testsuite/19_diagnostics/error_code/operators/{equal.cc => less. [...] copy libstdc++-v3/testsuite/19_diagnostics/error_code/operators/{equal.cc => three [...] copy libstdc++-v3/testsuite/19_diagnostics/error_condition/operators/{equal.cc => [...] copy libstdc++-v3/testsuite/19_diagnostics/error_condition/operators/{equal.cc => [...] copy libstdc++-v3/testsuite/std/ranges/access/{end_neg.cc => begin_neg.cc} (77%) copy libstdc++-v3/testsuite/std/ranges/{access/end_neg.cc => adaptors/split_neg.cc} (52%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits February 2020