Tcwg-commits December 2020

tcwg-commits@lists.linaro.org

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11568 discussions

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig updated (e7f46bfe0b -> 23f34add74)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig in repository toolchain/ci/binutils-gdb. from e7f46bfe0b Automatic date update in version.in adds 23f34add74 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig updated (3fcd419e -> e9a06ca0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards 3fcd419e 0: update: binutils-gcc-linux-qemu: boot new e9a06ca0 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (3fcd419e) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 171 +- 02-prepare_abe/console.log | 434 +- 03-build_abe-binutils/console.log | 11574 +++++----- 04-build_abe-stage1/console.log | 18508 ++++++++------- 05-build_linux/console.log | 823 +- 06-build_abe-qemu/console.log | 4622 ++-- 07-boot_linux/console.log | 494 +- 08-check_regression/console.log | 6 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 2 +- 09-update_baseline/results.regressions | 2 +- console.log | 36634 +++++++++++++++--------------- jenkins/manifest.sh | 14 +- 13 files changed, 36631 insertions(+), 36655 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig updated (a24e049847 -> 3dc9a557a1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig in repository toolchain/ci/binutils-gdb. from a24e049847 Automatic date update in version.in adds 0455b7d325 Warn about static libs vs. source-highlight only when necessary adds fa639f555a Don't compare types of enum fields adds 60108e47b5 [gdb/testsuite] Introduce supports_scalar_storage_order_attribute adds 97aac4ec32 gold: Move sym declaration just before use adds 3dc9a557a1 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gdb/ChangeLog | 11 ++++++ gdb/configure | 12 +++--- gdb/configure.ac | 12 +++--- gdb/gdbtypes.c | 4 +- gdb/testsuite/ChangeLog | 16 ++++++++ gdb/testsuite/gdb.base/endianity.c | 2 +- gdb/testsuite/gdb.base/endianity.exp | 11 ++++-- .../compare-enum-type-a.c} | 11 +++--- .../compare-enum-type-b.c} | 9 +++-- .../compare-enum-type.exp} | 16 ++++---- .../compare-enum-type.h} | 5 ++- gdb/testsuite/lib/gdb.exp | 46 ++++++++++++++++++++++ gold/ChangeLog | 8 ++++ gold/incremental.cc | 4 +- gold/plugin.cc | 2 +- 16 files changed, 130 insertions(+), 41 deletions(-) copy gdb/testsuite/{gdb.base/share-psymtabs-bt.c => gdb.python/compare-enum-type-a [...] copy gdb/testsuite/{gdb.base/psym-external-decl.c => gdb.python/compare-enum-type- [...] copy gdb/testsuite/{gdb.cp/breakpoint-locs.exp => gdb.python/compare-enum-type.exp} (67%) copy gdb/testsuite/{gdb.cp/stub-array-size.h => gdb.python/compare-enum-type.h} (96%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig updated (e41d0e91 -> 99296c83)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards e41d0e91 0: update: linux-2c16816abfdf41e510c7208bf746dcb655345030: all new 99296c83 0: update: binutils-3dc9a557a1e2bdc89443ed91ae5a3cf6699ff97e: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (e41d0e91) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 98 +- 02-prepare_abe/console.log | 408 +- 03-build_abe-binutils/console.log | 11005 ++++---- 04-build_abe-stage1/console.log | 15798 ++++++------ 05-build_linux/console.log | 6224 +++-- 06-build_abe-qemu/console.log | 6478 ++--- 07-boot_linux/console.log | 6 +- 08-check_regression/console.log | 12 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 16 +- 09-update_baseline/results.regressions | 2 +- console.log | 40053 +++++++++++++++--------------- jenkins/manifest.sh | 10 +- 13 files changed, 40267 insertions(+), 39845 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig updated (b1a2242e24f -> eb460c5986b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig in repository toolchain/ci/gcc. from b1a2242e24f Daily bump. adds 9032d2b2414 bswap: Fix up a thinko with empty CONSTRUCTORs [PR98378] adds e9e4ddfc5ab d: Fix ICE in in force_decl_die, at dwarf2out.c with -gdwar [...] adds 69165332a91 expr: Fix up constant_byte_string bitfield handling [PR98366] adds eb460c5986b Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 25 ++++ gcc/DATESTAMP | 2 +- gcc/dwarf2out.c | 7 + gcc/expr.c | 150 ++++++--------------- gcc/fold-const.c | 63 +++++++-- gcc/gimple-ssa-store-merging.c | 2 + gcc/testsuite/ChangeLog | 16 +++ gcc/testsuite/gcc.c-torture/execute/pr98366.c | 13 ++ gcc/testsuite/gdc.dg/debug/debug.exp | 28 ++++ gcc/testsuite/gdc.dg/debug/dwarf2/dwarf2.exp | 31 +++++ .../gdc.dg/debug/dwarf2/imports/pr98067.d | 3 + gcc/testsuite/gdc.dg/debug/dwarf2/langdw2.d | 7 + gcc/testsuite/gdc.dg/debug/dwarf2/langdw3.d | 6 + gcc/testsuite/gdc.dg/debug/dwarf2/pr98067.d | 6 + gcc/testsuite/gdc.dg/debug/trivial.d | 6 + 15 files changed, 241 insertions(+), 124 deletions(-) create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr98366.c create mode 100644 gcc/testsuite/gdc.dg/debug/debug.exp create mode 100644 gcc/testsuite/gdc.dg/debug/dwarf2/dwarf2.exp create mode 100644 gcc/testsuite/gdc.dg/debug/dwarf2/imports/pr98067.d create mode 100644 gcc/testsuite/gdc.dg/debug/dwarf2/langdw2.d create mode 100644 gcc/testsuite/gdc.dg/debug/dwarf2/langdw3.d create mode 100644 gcc/testsuite/gdc.dg/debug/dwarf2/pr98067.d create mode 100644 gcc/testsuite/gdc.dg/debug/trivial.d -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig updated (a24e049847 -> 3dc9a557a1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig in repository toolchain/ci/binutils-gdb. from a24e049847 Automatic date update in version.in adds 0455b7d325 Warn about static libs vs. source-highlight only when necessary adds fa639f555a Don't compare types of enum fields adds 60108e47b5 [gdb/testsuite] Introduce supports_scalar_storage_order_attribute adds 97aac4ec32 gold: Move sym declaration just before use adds 3dc9a557a1 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gdb/ChangeLog | 11 ++++++ gdb/configure | 12 +++--- gdb/configure.ac | 12 +++--- gdb/gdbtypes.c | 4 +- gdb/testsuite/ChangeLog | 16 ++++++++ gdb/testsuite/gdb.base/endianity.c | 2 +- gdb/testsuite/gdb.base/endianity.exp | 11 ++++-- .../compare-enum-type-a.c} | 11 +++--- .../compare-enum-type-b.c} | 9 +++-- .../compare-enum-type.exp} | 16 ++++---- .../compare-enum-type.h} | 5 ++- gdb/testsuite/lib/gdb.exp | 46 ++++++++++++++++++++++ gold/ChangeLog | 8 ++++ gold/incremental.cc | 4 +- gold/plugin.cc | 2 +- 16 files changed, 130 insertions(+), 41 deletions(-) copy gdb/testsuite/{gdb.base/share-psymtabs-bt.c => gdb.python/compare-enum-type-a [...] copy gdb/testsuite/{gdb.base/psym-external-decl.c => gdb.python/compare-enum-type- [...] copy gdb/testsuite/{gdb.cp/breakpoint-locs.exp => gdb.python/compare-enum-type.exp} (67%) copy gdb/testsuite/{gdb.cp/stub-array-size.h => gdb.python/compare-enum-type.h} (96%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig updated (7dd03978 -> bddfe34f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 7dd03978 0: update: binutils-gcc-linux-qemu: all new bddfe34f 0: update: binutils-gcc-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (7dd03978) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-lt [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 138 +- 02-prepare_abe/console.log | 430 +- 03-build_abe-binutils/console.log | 11780 ++++----- 04-build_abe-stage1/console.log | 20806 +++++++-------- 05-build_linux/console.log | 793 +- 06-build_abe-qemu/console.log | 6602 +++-- 07-boot_linux/console.log | 2 +- 08-check_regression/console.log | 14 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 14 +- 09-update_baseline/results.regressions | 2 +- console.log | 40579 +++++++++++++++--------------- jenkins/manifest.sh | 14 +- 13 files changed, 40599 insertions(+), 40577 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig updated (805d59593f5 -> c1d6de41a9d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/llvm-project. from 805d59593f5 [Analysis, CodeGen, IR] Use contains (NFC) adds 195f44278c4 [ARM] Implement harden-sls-retbr for ARM mode adds c061cb521b9 [gn build] Port 195f44278c4 adds 320fd3314e3 [ARM] Implement harden-sls-retbr for Thumb mode adds a4c1f5160e6 [ARM] Harden indirect calls against SLS adds df8ed392837 [ARM] harden-sls-blr: avoid r12 and lr in indirect calls. adds 9c895aea118 [ARM] Add clang command line support for -mharden-sls= adds 9cf3b1b6665 [RISCV] Define vlxe/vsxe/vsuxe intrinsics. adds 5740f96d8ee [NFC][libc++] Fixes swapped comments. adds 1e785e92624 apply update_test_checks.py to a few files in llvm/test/Tra [...] adds 56edfcada90 [Target, Transforms] Use contains (NFC) adds a6516a820d3 [Analysis] Remove dead function getInstTypePair (NFC) adds f47b07315a3 [X86] Teach assembler to accept vmsave/vmload/vmrun/invlpga [...] adds c52bcf3a9b2 [IRSim][IROutliner] Limit to extracting regions that only r [...] adds b43b77ff9b8 [NFCI][SimlifyCFG] simplifyOnce(): also perform DomTree validation adds 4be8707e645 [SimplifyCFG] Teach FoldTwoEntryPHINode() to preserve DomTree adds 76e74d93950 [SimplifyCFG] Teach removeEmptyCleanup() to preserve DomTree adds c209b88dd43 [SimplifyCFG] Teach simplifyCommonResume() to preserve DomTree adds b7d00e29b77 [SimplifyCFG] Teach simplifySingleResume() to preserve DomTree adds 83659c70767 [SimplifyCFG] simplifySingleResume(): FoldReturnIntoUncondB [...] adds 4d87a6ad13c [NFCI][SimplifyCFG] SimplifyCondBranchToTwoReturns(): pull [...] adds b94520c9ee2 [SimplifyCFG] Teach SimplifyCondBranchToTwoReturns() to pre [...] adds 6a1617d67cc [SimplifyCFG] Teach SimplifyCondBranchToTwoReturns() to pre [...] adds 262ff9c23e7 [SimplifyCFG] Teach TryToMergeLandingPad() to preserve DomTree adds c043f5055e8 [SimplifyCFG] Teach FoldBranchToCommonDest() to preserve Do [...] adds 99930719c66 Handle overflow beyond the 127 common encodings limit adds 0cbceed27c4 [TableGen][ARM][X86] Detect combining IntrReadMem and IntrW [...] adds 5cdc4f57e50 [IROutliner] Deduplicating functions that only require inputs. adds b8a2b6af374 Revert "[IROutliner] Deduplicating functions that only requ [...] adds 7c6f28a438b [IROutliner] Deduplicating functions that only require inputs. adds 0985a8bfea4 Fix left shift overflow UB in PPC backend on LLP64 platforms new c1d6de41a9d [mlir][CAPI] Add the missing <stdbool.h> in Support.h The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang/include/clang/Basic/DiagnosticDriverKinds.td | 2 + clang/lib/Driver/ToolChains/Arch/ARM.cpp | 45 + clang/lib/Driver/ToolChains/Arch/ARM.h | 1 + clang/test/Driver/aarch64-sls-hardening-options.c | 45 - clang/test/Driver/sls-hardening-options.c | 97 + .../libcxx/iterators/trivial_iterators.pass.cpp | 4 +- lld/MachO/UnwindInfoSection.cpp | 213 +- lld/MachO/UnwindInfoSection.h | 31 +- lld/test/MachO/tools/generate-cfi-funcs.py | 2 +- lld/test/MachO/tools/validate-unwind-info.py | 13 +- llvm/include/llvm/IR/IntrinsicsARM.td | 4 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 43 +- llvm/include/llvm/IR/IntrinsicsX86.td | 7 +- llvm/include/llvm/Transforms/IPO/IROutliner.h | 57 +- llvm/include/llvm/Transforms/Utils/Local.h | 3 +- llvm/lib/Analysis/MemDepPrinter.cpp | 3 - llvm/lib/Target/ARM/ARM.h | 3 + llvm/lib/Target/ARM/ARM.td | 14 + llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 42 + llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 51 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 65 + llvm/lib/Target/ARM/ARMCallLowering.cpp | 9 +- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 11 + llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 5 +- llvm/lib/Target/ARM/ARMFastISel.cpp | 14 +- llvm/lib/Target/ARM/ARMFeatures.h | 1 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 +- llvm/lib/Target/ARM/ARMInstrInfo.td | 35 +- llvm/lib/Target/ARM/ARMInstrThumb.td | 13 +- llvm/lib/Target/ARM/ARMInstrThumb2.td | 9 + llvm/lib/Target/ARM/ARMPredicates.td | 3 + llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | 12 +- llvm/lib/Target/ARM/ARMRegisterInfo.td | 17 + llvm/lib/Target/ARM/ARMSLSHardening.cpp | 416 ++ llvm/lib/Target/ARM/ARMSubtarget.h | 10 + llvm/lib/Target/ARM/ARMTargetMachine.cpp | 4 + llvm/lib/Target/ARM/CMakeLists.txt | 1 + llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 +- llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp | 2 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 198 + llvm/lib/Target/X86/X86InstrSVM.td | 28 +- llvm/lib/Transforms/IPO/IROutliner.cpp | 472 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 3 +- llvm/lib/Transforms/Utils/LoopSimplify.cpp | 2 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 134 +- llvm/test/CodeGen/ARM/O3-pipeline.ll | 4 + llvm/test/CodeGen/ARM/speculation-hardening-sls.ll | 246 + llvm/test/CodeGen/RISCV/rvv/vlxe-rv32.ll | 3281 ++++++++++++ llvm/test/CodeGen/RISCV/rvv/vlxe-rv64.ll | 5361 +++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vsuxe-rv32.ll | 3445 ++++++++++++ llvm/test/CodeGen/RISCV/rvv/vsuxe-rv64.ll | 5629 ++++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vsxe-rv32.ll | 3445 ++++++++++++ llvm/test/CodeGen/RISCV/rvv/vsxe-rv64.ll | 5629 ++++++++++++++++++++ llvm/test/MC/Disassembler/X86/simple-tests.txt | 10 +- llvm/test/MC/X86/SVM-32.s | 30 +- llvm/test/MC/X86/SVM-64.s | 30 +- llvm/test/MC/X86/x86-32-coverage.s | 10 +- llvm/test/MC/X86/x86-32.s | 10 +- llvm/test/Transforms/Coroutines/coro-heap-elide.ll | 2 +- llvm/test/Transforms/GVNSink/indirect-call.ll | 2 +- llvm/test/Transforms/GVNSink/sink-common-code.ll | 2 +- llvm/test/Transforms/IROutliner/extraction.ll | 50 +- llvm/test/Transforms/IROutliner/illegal-assumes.ll | 38 +- .../test/Transforms/IROutliner/illegal-branches.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-callbr.ll | 8 +- llvm/test/Transforms/IROutliner/illegal-calls.ll | 8 +- .../test/Transforms/IROutliner/illegal-catchpad.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-cleanup.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-frozen.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-gep.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-invoke.ll | 4 +- .../Transforms/IROutliner/illegal-landingpad.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-memcpy.ll | 40 +- llvm/test/Transforms/IROutliner/illegal-memmove.ll | 40 +- llvm/test/Transforms/IROutliner/illegal-memset.ll | 4 +- .../Transforms/IROutliner/illegal-phi-nodes.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-vaarg.ll | 30 +- llvm/test/Transforms/IROutliner/legal-debug.ll | 4 +- .../IROutliner/outlining-address-taken.ll | 4 +- .../IROutliner/outlining-constants-vs-registers.ll | 78 + ...ructure.ll => outlining-different-constants.ll} | 30 +- .../IROutliner/outlining-different-globals.ll | 40 + .../IROutliner/outlining-different-structure.ll | 8 +- .../IROutliner/outlining-same-constants.ll | 11 +- .../IROutliner/outlining-same-globals.ll | 13 +- llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll | 18 +- llvm/test/Transforms/InstCombine/bitcast.ll | 12 +- .../Transforms/InstCombine/insert-const-shuf.ll | 20 +- .../SimplifyCFG/2004-12-10-SimplifyCFGCrash.ll | 2 +- .../Transforms/SimplifyCFG/2005-06-16-PHICrash.ll | 2 +- .../SimplifyCFG/2005-08-01-PHIUpdateFail.ll | 2 +- .../Transforms/SimplifyCFG/2006-08-03-Crash.ll | 2 +- .../Transforms/SimplifyCFG/2008-12-16-DCECond.ll | 2 +- .../SimplifyCFG/2011-09-05-TrivialLPad.ll | 2 +- .../SimplifyCFG/ARM/speculate-vector-ops.ll | 4 +- llvm/test/Transforms/SimplifyCFG/BrUnwind.ll | 2 +- llvm/test/Transforms/SimplifyCFG/DeadSetCC.ll | 2 +- llvm/test/Transforms/SimplifyCFG/HoistCode.ll | 2 +- .../Transforms/SimplifyCFG/UncondBranchToReturn.ll | 2 +- .../Transforms/SimplifyCFG/UnreachableEliminate.ll | 2 +- .../SimplifyCFG/X86/2010-03-30-InvokeCrash.ll | 2 +- .../SimplifyCFG/X86/CoveredLookupTable.ll | 2 +- llvm/test/Transforms/SimplifyCFG/X86/bug-25299.ll | 2 +- .../SimplifyCFG/X86/disable-lookup-table.ll | 2 +- llvm/test/Transforms/SimplifyCFG/X86/pr39187-g.ll | 2 +- .../SimplifyCFG/X86/switch-covered-bug.ll | 2 +- .../Transforms/SimplifyCFG/X86/switch-table-bug.ll | 2 +- llvm/test/Transforms/SimplifyCFG/branch-fold.ll | 2 +- .../Transforms/SimplifyCFG/branch-phi-thread.ll | 2 +- .../SimplifyCFG/debug-info-thread-phi.ll | 2 +- .../SimplifyCFG/duplicate-ret-into-uncond-br.ll | 31 + llvm/test/Transforms/SimplifyCFG/extract-cost.ll | 2 +- .../SimplifyCFG/fold-branch-to-common-dest.ll | 2 +- .../Transforms/SimplifyCFG/hoist-common-code.ll | 2 +- .../Transforms/SimplifyCFG/hoist-with-range.ll | 2 +- llvm/test/Transforms/SimplifyCFG/indirectbr.ll | 2 +- llvm/test/Transforms/SimplifyCFG/invoke_unwind.ll | 2 +- .../Transforms/SimplifyCFG/lifetime-landingpad.ll | 2 +- .../merge-duplicate-conditional-ret-val.ll | 21 + llvm/test/Transforms/SimplifyCFG/pr39807.ll | 2 +- llvm/test/Transforms/SimplifyCFG/pr46638.ll | 2 +- .../SimplifyCFG/preserve-branchweights-partial.ll | 4 +- .../SimplifyCFG/preserve-branchweights.ll | 2 +- llvm/test/Transforms/SimplifyCFG/rangereduce.ll | 2 +- .../Transforms/SimplifyCFG/switch-masked-bits.ll | 2 +- .../SimplifyCFG/switch-on-const-select.ll | 2 +- .../Transforms/SimplifyCFG/switch-range-to-icmp.ll | 2 +- .../SimplifyCFG/switch-simplify-crash.ll | 2 +- .../SimplifyCFG/switch-to-select-two-case.ll | 2 +- .../Transforms/SimplifyCFG/switch_switch_fold.ll | 2 +- llvm/test/Transforms/SimplifyCFG/switch_thread.ll | 2 +- .../test/Transforms/SimplifyCFG/unprofitable-pr.ll | 2 +- llvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Atom/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/Barcelona/resources-sse1.s | 2 +- .../llvm-mca/X86/Barcelona/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/BdVer2/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/BdVer2/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/BdVer2/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/Broadwell/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Broadwell/resources-sse1.s | 2 +- .../llvm-mca/X86/Broadwell/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/BtVer2/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/BtVer2/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/BtVer2/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/BtVer2/stmxcsr-ldmxcsr.s | 10 +- .../tools/llvm-mca/X86/Generic/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Generic/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Generic/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/Haswell/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Haswell/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Haswell/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/Haswell/stmxcsr-ldmxcsr.s | 26 +- llvm/test/tools/llvm-mca/X86/SLM/resources-sse1.s | 2 +- .../test/tools/llvm-mca/X86/SLM/resources-x86_64.s | 4 +- .../llvm-mca/X86/SandyBridge/resources-avx1.s | 2 +- .../llvm-mca/X86/SandyBridge/resources-sse1.s | 2 +- .../llvm-mca/X86/SandyBridge/resources-x86_64.s | 4 +- .../llvm-mca/X86/SkylakeClient/resources-avx1.s | 2 +- .../llvm-mca/X86/SkylakeClient/resources-sse1.s | 2 +- .../llvm-mca/X86/SkylakeClient/resources-x86_64.s | 4 +- .../llvm-mca/X86/SkylakeServer/resources-avx1.s | 2 +- .../llvm-mca/X86/SkylakeServer/resources-sse1.s | 2 +- .../llvm-mca/X86/SkylakeServer/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/Znver1/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Znver1/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Znver1/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/Znver2/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Znver2/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Znver2/resources-x86_64.s | 4 +- llvm/utils/TableGen/CodeGenTarget.cpp | 14 +- .../gn/secondary/llvm/lib/Target/ARM/BUILD.gn | 1 + mlir/include/mlir-c/Support.h | 1 + 173 files changed, 29444 insertions(+), 618 deletions(-) delete mode 100644 clang/test/Driver/aarch64-sls-hardening-options.c create mode 100644 clang/test/Driver/sls-hardening-options.c create mode 100644 llvm/lib/Target/ARM/ARMSLSHardening.cpp create mode 100644 llvm/test/CodeGen/ARM/speculation-hardening-sls.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vlxe-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vlxe-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsuxe-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsuxe-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsxe-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsxe-rv64.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-constants-vs-registers.ll copy llvm/test/Transforms/IROutliner/{outlining-different-structure.ll => outlinin [...] create mode 100644 llvm/test/Transforms/IROutliner/outlining-different-globals.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/duplicate-ret-into-uncond-br.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/merge-duplicate-conditional-re [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig updated (e3f92fe5 -> 7e1045e4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards e3f92fe5 0: update: llvm-linux-qemu: all new 7e1045e4 0: update: llvm-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (e3f92fe5) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 235 +- 02-prepare_abe/console.log | 436 +- 03-build_llvm/console.log | 13764 ++++++++++++------------ 04-build_linux/console.log | 807 +- 05-build_abe-qemu/console.log | 6592 ++++++------ 06-boot_linux/console.log | 6 +- 07-check_regression/console.log | 24 +- 08-update_baseline/console.log | 16 +- console.log | 21880 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 10 files changed, 21895 insertions(+), 21875 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-defconfig updated (af3f37319c -> a05f8ecd88)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-defconfig in repository toolchain/ci/qemu. from af3f37319c Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/fo [...] adds a9dc68d9b2 i386: move kvm accel files into kvm/ adds 1fc33bb9f0 i386: move whpx accel files into whpx/ adds 7fdef0d4f2 i386: move hax accel files into hax/ adds dbe59a1991 i386: hvf: remove stale MAINTAINERS entry for old hvf stubs adds 1b248f147e i386: move TCG accel files into tcg/ adds 0c36af8ce8 i386: move cpu dump out of helper.c into cpu-dump.c adds 088567713f i386: move hyperv_vendor_id initialization to x86_cpu_realizefn() adds 735db465b0 i386: move hyperv_interface_id initialization to x86_cpu_rea [...] adds fb7e31aa4f i386: move hyperv_version_id initialization to x86_cpu_realizefn() adds 23eb5d032f i386: move hyperv_limits initialization to x86_cpu_realizefn() adds 40399ecb69 x86/cpu: Add AVX512_FP16 cpu feature adds ed69e8314d i386: move TCG cpu class initialization to tcg/ adds 69483f3115 i386: tcg: remove inline from cpu_load_eflags adds 035ba06c2e tcg: cpu_exec_{enter,exit} helpers adds 80c4750ba8 tcg: make CPUClass.cpu_exec_* optional adds 710384d042 tcg: Make CPUClass.debug_excp_handler optional adds 9fb75013d8 cpu: Remove unnecessary noop methods adds 75ee62ac60 Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-n [...] adds 10b43754cf hw/riscv: sifive_u: Add UART1 DT node in the generated DTB adds dfc973ecc1 hw/riscv: microchip_pfsoc: add QSPI NOR flash adds b3d2a4296f hw/core/register.c: Don't use '#' flag of printf format adds c63ca4ff7f target/riscv: Fix the bug of HLVX/HLV/HSV adds 529577457c target/riscv: Fix definition of MSTATUS_TW and MSTATUS_TSR adds 54a581c228 intc/ibex_plic: Clear interrupts that occur during claim process adds 617448a46b hw/riscv: Expand the is 32-bit check to support more CPUs adds c0a635f397 target/riscv: Add a TYPE_RISCV_CPU_BASE CPU adds dc4d4aaee3 riscv: spike: Remove target macro conditionals adds 09fe17125e riscv: virt: Remove target macro conditionals adds 7893677184 hw/riscv: boot: Remove compile time XLEN checks adds 9d01143063 hw/riscv: virt: Remove compile time XLEN checks adds bd62c13ea8 hw/riscv: spike: Remove compile time XLEN checks adds 2206ffa68f hw/riscv: sifive_u: Remove compile time XLEN checks adds 5b6c291b8d target/riscv: fpu_helper: Match function defs in HELPER macros adds 51ae0cabc6 target/riscv: Add a riscv_cpu_is_32bit() helper function adds 114baaca51 target/riscv: Specify the XLEN for CPUs adds 5c5a47f10c target/riscv: cpu: Remove compile time XLEN checks adds f08c7ff3dc target/riscv: cpu_helper: Remove compile time XLEN checks adds 8987cdc481 target/riscv: csr: Remove compile time XLEN checks adds 094b072c68 target/riscv: cpu: Set XLEN independently from target adds 3ed2b8ac2d hw/riscv: Use the CPU to determine if 32-bit adds d31e970a01 riscv/opentitan: Update the OpenTitan memory layout adds a05f8ecd88 Merge remote-tracking branch 'remotes/alistair/tags/pull-ris [...] No new revisions were added by this update. Summary of changes: MAINTAINERS | 11 +- accel/tcg/cpu-exec.c | 34 +- hw/core/cpu.c | 13 - hw/core/register.c | 16 +- hw/i386/fw_cfg.c | 2 +- hw/i386/intel_iommu.c | 2 +- hw/i386/kvm/apic.c | 2 +- hw/i386/kvm/clock.c | 2 +- hw/i386/microvm.c | 2 +- hw/i386/pc.c | 2 +- hw/i386/x86.c | 2 +- hw/intc/ibex_plic.c | 13 +- hw/riscv/boot.c | 70 ++-- hw/riscv/microchip_pfsoc.c | 21 ++ hw/riscv/opentitan.c | 81 +++-- hw/riscv/sifive_u.c | 74 ++-- hw/riscv/spike.c | 52 +-- hw/riscv/virt.c | 39 ++- include/hw/riscv/boot.h | 14 +- include/hw/riscv/microchip_pfsoc.h | 3 + include/hw/riscv/opentitan.h | 23 +- include/hw/riscv/spike.h | 6 - include/hw/riscv/virt.h | 6 - meson.build | 1 + target/i386/cpu-dump.c | 537 ++++++++++++++++++++++++++++ target/i386/cpu.c | 75 ++-- target/i386/cpu.h | 97 +----- target/i386/{ => hax}/hax-all.c | 0 target/i386/{ => hax}/hax-cpus.c | 0 target/i386/{ => hax}/hax-cpus.h | 0 target/i386/{ => hax}/hax-i386.h | 6 +- target/i386/{ => hax}/hax-interface.h | 0 target/i386/{ => hax}/hax-mem.c | 0 target/i386/{ => hax}/hax-posix.c | 0 target/i386/{ => hax}/hax-posix.h | 0 target/i386/{ => hax}/hax-windows.c | 0 target/i386/{ => hax}/hax-windows.h | 0 target/i386/hax/meson.build | 7 + target/i386/helper.c | 539 +---------------------------- target/i386/{ => kvm}/hyperv-proto.h | 0 target/i386/{ => kvm}/hyperv-stub.c | 0 target/i386/{ => kvm}/hyperv.c | 0 target/i386/{ => kvm}/hyperv.h | 0 target/i386/{ => kvm}/kvm-stub.c | 0 target/i386/{ => kvm}/kvm.c | 70 ++-- target/i386/{ => kvm}/kvm_i386.h | 0 target/i386/kvm/meson.build | 3 + target/i386/kvm/trace-events | 7 + target/i386/kvm/trace.h | 1 + target/i386/machine.c | 4 +- target/i386/meson.build | 33 +- target/i386/{ => tcg}/bpt_helper.c | 1 + target/i386/{ => tcg}/cc_helper.c | 1 + target/i386/{ => tcg}/cc_helper_template.h | 0 target/i386/{ => tcg}/excp_helper.c | 1 + target/i386/{ => tcg}/fpu_helper.c | 39 ++- target/i386/tcg/helper-tcg.h | 95 +++++ target/i386/{ => tcg}/int_helper.c | 1 + target/i386/{ => tcg}/mem_helper.c | 1 + target/i386/tcg/meson.build | 14 + target/i386/{ => tcg}/misc_helper.c | 14 + target/i386/{ => tcg}/mpx_helper.c | 1 + target/i386/{ => tcg}/seg_helper.c | 1 + target/i386/{ => tcg}/smm_helper.c | 2 + target/i386/{ => tcg}/svm_helper.c | 1 + target/i386/tcg/tcg-cpu.c | 71 ++++ target/i386/tcg/tcg-cpu.h | 15 + target/i386/{ => tcg}/tcg-stub.c | 0 target/i386/{ => tcg}/translate.c | 1 + target/i386/trace-events | 6 - target/i386/whpx/meson.build | 5 + target/i386/{ => whpx}/whp-dispatch.h | 0 target/i386/{ => whpx}/whpx-all.c | 0 target/i386/{ => whpx}/whpx-apic.c | 0 target/i386/{ => whpx}/whpx-cpus.c | 0 target/i386/{ => whpx}/whpx-cpus.h | 0 target/riscv/cpu.c | 84 +++-- target/riscv/cpu.h | 8 + target/riscv/cpu_bits.h | 8 +- target/riscv/cpu_helper.c | 15 +- target/riscv/csr.c | 176 +++++----- target/riscv/fpu_helper.c | 8 - target/riscv/helper.h | 24 +- 83 files changed, 1390 insertions(+), 1073 deletions(-) create mode 100644 target/i386/cpu-dump.c rename target/i386/{ => hax}/hax-all.c (100%) rename target/i386/{ => hax}/hax-cpus.c (100%) rename target/i386/{ => hax}/hax-cpus.h (100%) rename target/i386/{ => hax}/hax-i386.h (95%) rename target/i386/{ => hax}/hax-interface.h (100%) rename target/i386/{ => hax}/hax-mem.c (100%) rename target/i386/{ => hax}/hax-posix.c (100%) rename target/i386/{ => hax}/hax-posix.h (100%) rename target/i386/{ => hax}/hax-windows.c (100%) rename target/i386/{ => hax}/hax-windows.h (100%) create mode 100644 target/i386/hax/meson.build rename target/i386/{ => kvm}/hyperv-proto.h (100%) rename target/i386/{ => kvm}/hyperv-stub.c (100%) rename target/i386/{ => kvm}/hyperv.c (100%) rename target/i386/{ => kvm}/hyperv.h (100%) rename target/i386/{ => kvm}/kvm-stub.c (100%) rename target/i386/{ => kvm}/kvm.c (98%) rename target/i386/{ => kvm}/kvm_i386.h (100%) create mode 100644 target/i386/kvm/meson.build create mode 100644 target/i386/kvm/trace-events create mode 100644 target/i386/kvm/trace.h rename target/i386/{ => tcg}/bpt_helper.c (99%) rename target/i386/{ => tcg}/cc_helper.c (99%) rename target/i386/{ => tcg}/cc_helper_template.h (100%) rename target/i386/{ => tcg}/excp_helper.c (99%) rename target/i386/{ => tcg}/fpu_helper.c (99%) create mode 100644 target/i386/tcg/helper-tcg.h rename target/i386/{ => tcg}/int_helper.c (99%) rename target/i386/{ => tcg}/mem_helper.c (99%) create mode 100644 target/i386/tcg/meson.build rename target/i386/{ => tcg}/misc_helper.c (97%) rename target/i386/{ => tcg}/mpx_helper.c (99%) rename target/i386/{ => tcg}/seg_helper.c (99%) rename target/i386/{ => tcg}/smm_helper.c (99%) rename target/i386/{ => tcg}/svm_helper.c (99%) create mode 100644 target/i386/tcg/tcg-cpu.c create mode 100644 target/i386/tcg/tcg-cpu.h rename target/i386/{ => tcg}/tcg-stub.c (100%) rename target/i386/{ => tcg}/translate.c (99%) create mode 100644 target/i386/whpx/meson.build rename target/i386/{ => whpx}/whp-dispatch.h (100%) rename target/i386/{ => whpx}/whpx-all.c (100%) rename target/i386/{ => whpx}/whpx-apic.c (100%) rename target/i386/{ => whpx}/whpx-cpus.c (100%) rename target/i386/{ => whpx}/whpx-cpus.h (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

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Tcwg-commits December 2020