Tcwg-commits December 2020

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_stm32/gnu_eabi-release-arm-eabi-coremark-O2 updated (986e8f64 -> 479ac2da)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-benchmark pushed a change to branch linaro-local/ci/tcwg_bmk_stm32/gnu_eabi-release-arm-eabi-coremark-O2 in repository toolchain/ci/base-artifacts. discards 986e8f64 0: update: binutils-gcc: -8 new 479ac2da 0: update: binutils-gcc: -8 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (986e8f64) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk_stm32/gnu_eabi-relea [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 16 +- 02-prepare_abe/console.log | 451 +- 03-build_abe-binutils/console.log | 11076 +++++++------- 04-build_abe-stage1/console.log | 18131 +++++++++++----------- 05-build_abe-newlib/console.log | 46 +- 09-check_regression/console.log | 6 +- 10-update_baseline/console.log | 6 +- console.log | 29732 ++++++++++++++++++------------------ jenkins/manifest.sh | 10 +- 9 files changed, 29711 insertions(+), 29763 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig updated (1e785e92624 -> d86a00d8feb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig in repository toolchain/ci/llvm-project. from 1e785e92624 apply update_test_checks.py to a few files in llvm/test/Tra [...] adds 56edfcada90 [Target, Transforms] Use contains (NFC) adds a6516a820d3 [Analysis] Remove dead function getInstTypePair (NFC) adds f47b07315a3 [X86] Teach assembler to accept vmsave/vmload/vmrun/invlpga [...] adds c52bcf3a9b2 [IRSim][IROutliner] Limit to extracting regions that only r [...] adds b43b77ff9b8 [NFCI][SimlifyCFG] simplifyOnce(): also perform DomTree validation adds 4be8707e645 [SimplifyCFG] Teach FoldTwoEntryPHINode() to preserve DomTree adds 76e74d93950 [SimplifyCFG] Teach removeEmptyCleanup() to preserve DomTree adds c209b88dd43 [SimplifyCFG] Teach simplifyCommonResume() to preserve DomTree adds b7d00e29b77 [SimplifyCFG] Teach simplifySingleResume() to preserve DomTree adds 83659c70767 [SimplifyCFG] simplifySingleResume(): FoldReturnIntoUncondB [...] adds 4d87a6ad13c [NFCI][SimplifyCFG] SimplifyCondBranchToTwoReturns(): pull [...] adds b94520c9ee2 [SimplifyCFG] Teach SimplifyCondBranchToTwoReturns() to pre [...] adds 6a1617d67cc [SimplifyCFG] Teach SimplifyCondBranchToTwoReturns() to pre [...] adds 262ff9c23e7 [SimplifyCFG] Teach TryToMergeLandingPad() to preserve DomTree adds c043f5055e8 [SimplifyCFG] Teach FoldBranchToCommonDest() to preserve Do [...] adds 99930719c66 Handle overflow beyond the 127 common encodings limit adds 0cbceed27c4 [TableGen][ARM][X86] Detect combining IntrReadMem and IntrW [...] adds 5cdc4f57e50 [IROutliner] Deduplicating functions that only require inputs. adds b8a2b6af374 Revert "[IROutliner] Deduplicating functions that only requ [...] adds 7c6f28a438b [IROutliner] Deduplicating functions that only require inputs. adds 0985a8bfea4 Fix left shift overflow UB in PPC backend on LLP64 platforms adds c1d6de41a9d [mlir][CAPI] Add the missing <stdbool.h> in Support.h adds 37974b493a4 [lldb/test] Enable reverse-connect on windows too adds 62c94f06781 [RISCV] Define vector vfmul/vfdiv/vfrdiv intrinsics. adds bd576ac8d4b [RISCV] Define vector vfsgnj/vfsgnjn/vfsgnjx intrinsics. adds f86e61d8862 [RISCV] Define vector vfwadd/vfwsub intrinsics. adds 41ab45d6624 [RISCV] Define vector vfwmul intrinsics. adds 99562332e3d [lldb] [test] Update test status for NetBSD adds 35f2c3a8b41 [clang-tidy] cppcoreguidelines-pro-type-member-init: suppre [...] adds 7e84aa1b81e Fix MSVC "not all control paths return a value" warnings. NFCI. adds d86a00d8feb [RISCV] Define vslideup/vslidedown intrinsics No new revisions were added by this update. Summary of changes: .../cppcoreguidelines/ProTypeMemberInitCheck.cpp | 4 + .../cppcoreguidelines-pro-type-member-init.cpp | 16 + clang/lib/Sema/SemaTemplate.cpp | 2 + lld/MachO/UnwindInfoSection.cpp | 213 +- lld/MachO/UnwindInfoSection.h | 31 +- lld/test/MachO/tools/generate-cfi-funcs.py | 2 +- lld/test/MachO/tools/validate-unwind-info.py | 13 +- .../test/tools/lldb-server/gdbremote_testcase.py | 4 - .../api/multiple-targets/TestMultipleTargets.py | 1 + .../call-restarts/TestCallThatRestarts.py | 2 +- .../expression/ir-interpreter/TestIRInterpreter.py | 1 - .../expression/radar_9531204/TestPrintfAfterUp.py | 1 - .../save_jit_objects/TestSaveJITObjects.py | 1 - .../test/API/commands/expression/test/TestExprs.py | 1 - .../API/commands/gui/viewlarge/TestGuiViewLarge.py | 1 + .../commands/process/attach/TestProcessAttach.py | 1 + .../cpp_exception/TestCPPExceptionBreakpoint.py | 2 - .../TestBreakpointInGlobalConstructor.py | 1 - .../functionalities/completion/TestCompletion.py | 1 + .../TestDlopenOtherExecutable.py | 1 + .../inferior-assert/TestInferiorAssert.py | 4 - .../TestRecursiveInferiorStep.py | 1 + ...ConcurrentBreakpointDelayBreakpointOneSignal.py | 1 - .../TestConcurrentSignalDelayBreak.py | 2 +- .../TestConcurrentTwoBreakpointsOneDelaySignal.py | 2 +- .../TestConcurrentTwoBreakpointsOneSignal.py | 2 +- .../TestExitDuringExpression.py | 2 + .../TestStateAfterExpression.py | 1 + .../TestThreadSpecificBpPlusCondition.py | 2 +- .../unwind/noreturn/TestNoreturnUnwind.py | 1 - .../c/conflicting-symbol/TestConflictingSymbol.py | 1 - .../lang/c/const_variables/TestConstVariables.py | 1 - .../API/lang/c/function_types/TestFunctionTypes.py | 1 - .../lang/c/global_variables/TestGlobalVariables.py | 1 - lldb/test/API/lang/c/shared_lib/TestSharedLib.py | 2 - .../cpp/exceptions/TestCPPExceptionBreakpoints.py | 1 - .../TestNamespaceDefinitions.py | 1 - .../test/API/lang/cpp/stl/TestStdCXXDisassembly.py | 1 - lldb/test/API/lang/cpp/this/TestCPPThis.py | 1 - lldb/test/API/python_api/event/TestEvents.py | 2 +- .../lldbutil/iter/TestRegistersIterator.py | 1 + lldb/test/API/python_api/thread/TestThreadAPI.py | 1 - .../lldb-server/TestGdbRemote_vContThreads.py | 2 + .../TestVSCode_setExceptionBreakpoints.py | 1 - .../disconnect/TestVSCode_disconnect.py | 1 + lldb/test/Shell/Recognizer/assert.test | 1 + .../Functionalities/TestExpressionEvaluation.test | 2 +- .../ScriptInterpreter/Lua/watchpoint_callback.test | 1 + llvm/include/llvm/IR/IntrinsicsARM.td | 4 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 33 + llvm/include/llvm/IR/IntrinsicsX86.td | 7 +- llvm/include/llvm/Transforms/IPO/IROutliner.h | 57 +- llvm/include/llvm/Transforms/Utils/Local.h | 3 +- llvm/lib/Analysis/MemDepPrinter.cpp | 3 - llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 +- llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp | 2 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 353 +++- llvm/lib/Target/X86/X86InstrSVM.td | 28 +- llvm/lib/Transforms/IPO/IROutliner.cpp | 472 ++++- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 3 +- llvm/lib/Transforms/Utils/LoopSimplify.cpp | 2 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 134 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll | 441 ++++ llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll | 601 ++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll | 1705 ++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll | 2131 ++++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll | 1705 ++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll | 2131 ++++++++++++++++++++ llvm/test/MC/Disassembler/X86/simple-tests.txt | 10 +- llvm/test/MC/X86/SVM-32.s | 30 +- llvm/test/MC/X86/SVM-64.s | 30 +- llvm/test/MC/X86/x86-32-coverage.s | 10 +- llvm/test/MC/X86/x86-32.s | 10 +- llvm/test/Transforms/Coroutines/coro-heap-elide.ll | 2 +- llvm/test/Transforms/GVNSink/indirect-call.ll | 2 +- llvm/test/Transforms/GVNSink/sink-common-code.ll | 2 +- llvm/test/Transforms/IROutliner/extraction.ll | 50 +- llvm/test/Transforms/IROutliner/illegal-assumes.ll | 38 +- .../test/Transforms/IROutliner/illegal-branches.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-callbr.ll | 8 +- llvm/test/Transforms/IROutliner/illegal-calls.ll | 8 +- .../test/Transforms/IROutliner/illegal-catchpad.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-cleanup.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-frozen.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-gep.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-invoke.ll | 4 +- .../Transforms/IROutliner/illegal-landingpad.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-memcpy.ll | 40 +- llvm/test/Transforms/IROutliner/illegal-memmove.ll | 40 +- llvm/test/Transforms/IROutliner/illegal-memset.ll | 4 +- .../Transforms/IROutliner/illegal-phi-nodes.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-vaarg.ll | 30 +- llvm/test/Transforms/IROutliner/legal-debug.ll | 4 +- .../IROutliner/outlining-address-taken.ll | 4 +- .../IROutliner/outlining-constants-vs-registers.ll | 78 + ...ructure.ll => outlining-different-constants.ll} | 30 +- .../IROutliner/outlining-different-globals.ll | 40 + .../IROutliner/outlining-different-structure.ll | 8 +- .../IROutliner/outlining-same-constants.ll | 11 +- .../IROutliner/outlining-same-globals.ll | 13 +- .../SimplifyCFG/2004-12-10-SimplifyCFGCrash.ll | 2 +- .../Transforms/SimplifyCFG/2005-06-16-PHICrash.ll | 2 +- .../SimplifyCFG/2005-08-01-PHIUpdateFail.ll | 2 +- .../Transforms/SimplifyCFG/2006-08-03-Crash.ll | 2 +- .../Transforms/SimplifyCFG/2008-12-16-DCECond.ll | 2 +- .../SimplifyCFG/2011-09-05-TrivialLPad.ll | 2 +- .../SimplifyCFG/ARM/speculate-vector-ops.ll | 4 +- llvm/test/Transforms/SimplifyCFG/BrUnwind.ll | 2 +- llvm/test/Transforms/SimplifyCFG/DeadSetCC.ll | 2 +- llvm/test/Transforms/SimplifyCFG/HoistCode.ll | 2 +- .../Transforms/SimplifyCFG/UncondBranchToReturn.ll | 2 +- .../Transforms/SimplifyCFG/UnreachableEliminate.ll | 2 +- .../SimplifyCFG/X86/2010-03-30-InvokeCrash.ll | 2 +- .../SimplifyCFG/X86/CoveredLookupTable.ll | 2 +- llvm/test/Transforms/SimplifyCFG/X86/bug-25299.ll | 2 +- .../SimplifyCFG/X86/disable-lookup-table.ll | 2 +- llvm/test/Transforms/SimplifyCFG/X86/pr39187-g.ll | 2 +- .../SimplifyCFG/X86/switch-covered-bug.ll | 2 +- .../Transforms/SimplifyCFG/X86/switch-table-bug.ll | 2 +- llvm/test/Transforms/SimplifyCFG/branch-fold.ll | 2 +- .../Transforms/SimplifyCFG/branch-phi-thread.ll | 2 +- .../SimplifyCFG/debug-info-thread-phi.ll | 2 +- .../SimplifyCFG/duplicate-ret-into-uncond-br.ll | 31 + llvm/test/Transforms/SimplifyCFG/extract-cost.ll | 2 +- .../SimplifyCFG/fold-branch-to-common-dest.ll | 2 +- .../Transforms/SimplifyCFG/hoist-common-code.ll | 2 +- .../Transforms/SimplifyCFG/hoist-with-range.ll | 2 +- llvm/test/Transforms/SimplifyCFG/indirectbr.ll | 2 +- llvm/test/Transforms/SimplifyCFG/invoke_unwind.ll | 2 +- .../Transforms/SimplifyCFG/lifetime-landingpad.ll | 2 +- .../merge-duplicate-conditional-ret-val.ll | 21 + llvm/test/Transforms/SimplifyCFG/pr39807.ll | 2 +- llvm/test/Transforms/SimplifyCFG/pr46638.ll | 2 +- .../SimplifyCFG/preserve-branchweights-partial.ll | 4 +- .../SimplifyCFG/preserve-branchweights.ll | 2 +- llvm/test/Transforms/SimplifyCFG/rangereduce.ll | 2 +- .../Transforms/SimplifyCFG/switch-masked-bits.ll | 2 +- .../SimplifyCFG/switch-on-const-select.ll | 2 +- .../Transforms/SimplifyCFG/switch-range-to-icmp.ll | 2 +- .../SimplifyCFG/switch-simplify-crash.ll | 2 +- .../SimplifyCFG/switch-to-select-two-case.ll | 2 +- .../Transforms/SimplifyCFG/switch_switch_fold.ll | 2 +- llvm/test/Transforms/SimplifyCFG/switch_thread.ll | 2 +- .../test/Transforms/SimplifyCFG/unprofitable-pr.ll | 2 +- llvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Atom/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/Barcelona/resources-sse1.s | 2 +- .../llvm-mca/X86/Barcelona/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/BdVer2/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/BdVer2/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/BdVer2/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/Broadwell/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Broadwell/resources-sse1.s | 2 +- .../llvm-mca/X86/Broadwell/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/BtVer2/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/BtVer2/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/BtVer2/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/BtVer2/stmxcsr-ldmxcsr.s | 10 +- .../tools/llvm-mca/X86/Generic/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Generic/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Generic/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/Haswell/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Haswell/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Haswell/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/Haswell/stmxcsr-ldmxcsr.s | 26 +- llvm/test/tools/llvm-mca/X86/SLM/resources-sse1.s | 2 +- .../test/tools/llvm-mca/X86/SLM/resources-x86_64.s | 4 +- .../llvm-mca/X86/SandyBridge/resources-avx1.s | 2 +- .../llvm-mca/X86/SandyBridge/resources-sse1.s | 2 +- .../llvm-mca/X86/SandyBridge/resources-x86_64.s | 4 +- .../llvm-mca/X86/SkylakeClient/resources-avx1.s | 2 +- .../llvm-mca/X86/SkylakeClient/resources-sse1.s | 2 +- .../llvm-mca/X86/SkylakeClient/resources-x86_64.s | 4 +- .../llvm-mca/X86/SkylakeServer/resources-avx1.s | 2 +- .../llvm-mca/X86/SkylakeServer/resources-sse1.s | 2 +- .../llvm-mca/X86/SkylakeServer/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/Znver1/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Znver1/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Znver1/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/Znver2/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Znver2/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Znver2/resources-x86_64.s | 4 +- llvm/utils/TableGen/CodeGenTarget.cpp | 14 +- mlir/include/mlir-c/Support.h | 1 + 204 files changed, 26391 insertions(+), 608 deletions(-) create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-constants-vs-registers.ll copy llvm/test/Transforms/IROutliner/{outlining-different-structure.ll => outlinin [...] create mode 100644 llvm/test/Transforms/IROutliner/outlining-different-globals.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/duplicate-ret-into-uncond-br.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/merge-duplicate-conditional-re [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig updated (b5600202 -> cfc3ce01)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig in repository toolchain/ci/base-artifacts. discards b5600202 0: update: llvm-linux-qemu: all new cfc3ce01 0: update: llvm-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b5600202) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-n [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 216 +- 02-prepare_abe/console.log | 390 +- 03-build_llvm/console.log | 13818 ++++++++++++------------ 04-build_linux/console.log | 649 +- 05-build_abe-qemu/console.log | 6733 ++++++------ 06-boot_linux/console.log | 6 +- 07-check_regression/console.log | 12 +- 08-update_baseline/console.log | 12 +- console.log | 21836 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 10 files changed, 21835 insertions(+), 21847 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allmodconfig updated (0c3cc58c3c7 -> 8005680351c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allmodconfig in repository toolchain/ci/gcc. from 0c3cc58c3c7 Daily bump. adds 4e9563cda3f PR fortran/98307 - Dependency check fails when using "allocatable" adds 8005680351c Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- gcc/fortran/ChangeLog | 9 +++++++++ gcc/fortran/trans-stmt.c | 5 +++-- gcc/testsuite/ChangeLog | 8 ++++++++ gcc/testsuite/gfortran.dg/forall_19.f90 | 32 ++++++++++++++++++++++++++++++++ 5 files changed, 53 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gfortran.dg/forall_19.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allmodconfig updated (e7f46bfe0b -> 23f34add74)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allmodconfig in repository toolchain/ci/binutils-gdb. from e7f46bfe0b Automatic date update in version.in adds 23f34add74 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allmodconfig updated (2f0c39e4 -> bfef5aee)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allmodconfig in repository toolchain/ci/base-artifacts. discards 2f0c39e4 0: update: binutils-gcc-linux-qemu: all new bfef5aee 0: update: binutils-gcc-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (2f0c39e4) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 160 +- 02-prepare_abe/console.log | 442 +- 03-build_abe-binutils/console.log | 11716 +++++----- 04-build_abe-stage1/console.log | 18531 +++++++-------- 05-build_linux/console.log | 929 +- 06-build_abe-qemu/console.log | 4582 ++-- 07-boot_linux/console.log | 6 +- 08-check_regression/console.log | 12 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 18 +- 09-update_baseline/results.regressions | 2 +- console.log | 36290 +++++++++++++++--------------- jenkins/manifest.sh | 14 +- 13 files changed, 36364 insertions(+), 36340 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig updated (5740f96d8ee -> d86a00d8feb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig in repository toolchain/ci/llvm-project. from 5740f96d8ee [NFC][libc++] Fixes swapped comments. adds 1e785e92624 apply update_test_checks.py to a few files in llvm/test/Tra [...] adds 56edfcada90 [Target, Transforms] Use contains (NFC) adds a6516a820d3 [Analysis] Remove dead function getInstTypePair (NFC) adds f47b07315a3 [X86] Teach assembler to accept vmsave/vmload/vmrun/invlpga [...] adds c52bcf3a9b2 [IRSim][IROutliner] Limit to extracting regions that only r [...] adds b43b77ff9b8 [NFCI][SimlifyCFG] simplifyOnce(): also perform DomTree validation adds 4be8707e645 [SimplifyCFG] Teach FoldTwoEntryPHINode() to preserve DomTree adds 76e74d93950 [SimplifyCFG] Teach removeEmptyCleanup() to preserve DomTree adds c209b88dd43 [SimplifyCFG] Teach simplifyCommonResume() to preserve DomTree adds b7d00e29b77 [SimplifyCFG] Teach simplifySingleResume() to preserve DomTree adds 83659c70767 [SimplifyCFG] simplifySingleResume(): FoldReturnIntoUncondB [...] adds 4d87a6ad13c [NFCI][SimplifyCFG] SimplifyCondBranchToTwoReturns(): pull [...] adds b94520c9ee2 [SimplifyCFG] Teach SimplifyCondBranchToTwoReturns() to pre [...] adds 6a1617d67cc [SimplifyCFG] Teach SimplifyCondBranchToTwoReturns() to pre [...] adds 262ff9c23e7 [SimplifyCFG] Teach TryToMergeLandingPad() to preserve DomTree adds c043f5055e8 [SimplifyCFG] Teach FoldBranchToCommonDest() to preserve Do [...] adds 99930719c66 Handle overflow beyond the 127 common encodings limit adds 0cbceed27c4 [TableGen][ARM][X86] Detect combining IntrReadMem and IntrW [...] adds 5cdc4f57e50 [IROutliner] Deduplicating functions that only require inputs. adds b8a2b6af374 Revert "[IROutliner] Deduplicating functions that only requ [...] adds 7c6f28a438b [IROutliner] Deduplicating functions that only require inputs. adds 0985a8bfea4 Fix left shift overflow UB in PPC backend on LLP64 platforms adds c1d6de41a9d [mlir][CAPI] Add the missing <stdbool.h> in Support.h adds 37974b493a4 [lldb/test] Enable reverse-connect on windows too adds 62c94f06781 [RISCV] Define vector vfmul/vfdiv/vfrdiv intrinsics. adds bd576ac8d4b [RISCV] Define vector vfsgnj/vfsgnjn/vfsgnjx intrinsics. adds f86e61d8862 [RISCV] Define vector vfwadd/vfwsub intrinsics. adds 41ab45d6624 [RISCV] Define vector vfwmul intrinsics. adds 99562332e3d [lldb] [test] Update test status for NetBSD adds 35f2c3a8b41 [clang-tidy] cppcoreguidelines-pro-type-member-init: suppre [...] adds 7e84aa1b81e Fix MSVC "not all control paths return a value" warnings. NFCI. adds d86a00d8feb [RISCV] Define vslideup/vslidedown intrinsics No new revisions were added by this update. Summary of changes: .../cppcoreguidelines/ProTypeMemberInitCheck.cpp | 4 + .../cppcoreguidelines-pro-type-member-init.cpp | 16 + clang/lib/Sema/SemaTemplate.cpp | 2 + lld/MachO/UnwindInfoSection.cpp | 213 +- lld/MachO/UnwindInfoSection.h | 31 +- lld/test/MachO/tools/generate-cfi-funcs.py | 2 +- lld/test/MachO/tools/validate-unwind-info.py | 13 +- .../test/tools/lldb-server/gdbremote_testcase.py | 4 - .../api/multiple-targets/TestMultipleTargets.py | 1 + .../call-restarts/TestCallThatRestarts.py | 2 +- .../expression/ir-interpreter/TestIRInterpreter.py | 1 - .../expression/radar_9531204/TestPrintfAfterUp.py | 1 - .../save_jit_objects/TestSaveJITObjects.py | 1 - .../test/API/commands/expression/test/TestExprs.py | 1 - .../API/commands/gui/viewlarge/TestGuiViewLarge.py | 1 + .../commands/process/attach/TestProcessAttach.py | 1 + .../cpp_exception/TestCPPExceptionBreakpoint.py | 2 - .../TestBreakpointInGlobalConstructor.py | 1 - .../functionalities/completion/TestCompletion.py | 1 + .../TestDlopenOtherExecutable.py | 1 + .../inferior-assert/TestInferiorAssert.py | 4 - .../TestRecursiveInferiorStep.py | 1 + ...ConcurrentBreakpointDelayBreakpointOneSignal.py | 1 - .../TestConcurrentSignalDelayBreak.py | 2 +- .../TestConcurrentTwoBreakpointsOneDelaySignal.py | 2 +- .../TestConcurrentTwoBreakpointsOneSignal.py | 2 +- .../TestExitDuringExpression.py | 2 + .../TestStateAfterExpression.py | 1 + .../TestThreadSpecificBpPlusCondition.py | 2 +- .../unwind/noreturn/TestNoreturnUnwind.py | 1 - .../c/conflicting-symbol/TestConflictingSymbol.py | 1 - .../lang/c/const_variables/TestConstVariables.py | 1 - .../API/lang/c/function_types/TestFunctionTypes.py | 1 - .../lang/c/global_variables/TestGlobalVariables.py | 1 - lldb/test/API/lang/c/shared_lib/TestSharedLib.py | 2 - .../cpp/exceptions/TestCPPExceptionBreakpoints.py | 1 - .../TestNamespaceDefinitions.py | 1 - .../test/API/lang/cpp/stl/TestStdCXXDisassembly.py | 1 - lldb/test/API/lang/cpp/this/TestCPPThis.py | 1 - lldb/test/API/python_api/event/TestEvents.py | 2 +- .../lldbutil/iter/TestRegistersIterator.py | 1 + lldb/test/API/python_api/thread/TestThreadAPI.py | 1 - .../lldb-server/TestGdbRemote_vContThreads.py | 2 + .../TestVSCode_setExceptionBreakpoints.py | 1 - .../disconnect/TestVSCode_disconnect.py | 1 + lldb/test/Shell/Recognizer/assert.test | 1 + .../Functionalities/TestExpressionEvaluation.test | 2 +- .../ScriptInterpreter/Lua/watchpoint_callback.test | 1 + llvm/include/llvm/IR/IntrinsicsARM.td | 4 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 33 + llvm/include/llvm/IR/IntrinsicsX86.td | 7 +- llvm/include/llvm/Transforms/IPO/IROutliner.h | 57 +- llvm/include/llvm/Transforms/Utils/Local.h | 3 +- llvm/lib/Analysis/MemDepPrinter.cpp | 3 - llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 +- llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp | 2 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 353 +++- llvm/lib/Target/X86/X86InstrSVM.td | 28 +- llvm/lib/Transforms/IPO/IROutliner.cpp | 472 ++++- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 3 +- llvm/lib/Transforms/Utils/LoopSimplify.cpp | 2 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 134 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll | 441 ++++ llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll | 601 ++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll | 1705 ++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll | 2131 ++++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll | 1705 ++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll | 2131 ++++++++++++++++++++ llvm/test/MC/Disassembler/X86/simple-tests.txt | 10 +- llvm/test/MC/X86/SVM-32.s | 30 +- llvm/test/MC/X86/SVM-64.s | 30 +- llvm/test/MC/X86/x86-32-coverage.s | 10 +- llvm/test/MC/X86/x86-32.s | 10 +- llvm/test/Transforms/Coroutines/coro-heap-elide.ll | 2 +- llvm/test/Transforms/GVNSink/indirect-call.ll | 2 +- llvm/test/Transforms/GVNSink/sink-common-code.ll | 2 +- llvm/test/Transforms/IROutliner/extraction.ll | 50 +- llvm/test/Transforms/IROutliner/illegal-assumes.ll | 38 +- .../test/Transforms/IROutliner/illegal-branches.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-callbr.ll | 8 +- llvm/test/Transforms/IROutliner/illegal-calls.ll | 8 +- .../test/Transforms/IROutliner/illegal-catchpad.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-cleanup.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-frozen.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-gep.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-invoke.ll | 4 +- .../Transforms/IROutliner/illegal-landingpad.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-memcpy.ll | 40 +- llvm/test/Transforms/IROutliner/illegal-memmove.ll | 40 +- llvm/test/Transforms/IROutliner/illegal-memset.ll | 4 +- .../Transforms/IROutliner/illegal-phi-nodes.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-vaarg.ll | 30 +- llvm/test/Transforms/IROutliner/legal-debug.ll | 4 +- .../IROutliner/outlining-address-taken.ll | 4 +- .../IROutliner/outlining-constants-vs-registers.ll | 78 + ...ructure.ll => outlining-different-constants.ll} | 30 +- .../IROutliner/outlining-different-globals.ll | 40 + .../IROutliner/outlining-different-structure.ll | 8 +- .../IROutliner/outlining-same-constants.ll | 11 +- .../IROutliner/outlining-same-globals.ll | 13 +- llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll | 18 +- llvm/test/Transforms/InstCombine/bitcast.ll | 12 +- .../Transforms/InstCombine/insert-const-shuf.ll | 20 +- .../SimplifyCFG/2004-12-10-SimplifyCFGCrash.ll | 2 +- .../Transforms/SimplifyCFG/2005-06-16-PHICrash.ll | 2 +- .../SimplifyCFG/2005-08-01-PHIUpdateFail.ll | 2 +- .../Transforms/SimplifyCFG/2006-08-03-Crash.ll | 2 +- .../Transforms/SimplifyCFG/2008-12-16-DCECond.ll | 2 +- .../SimplifyCFG/2011-09-05-TrivialLPad.ll | 2 +- .../SimplifyCFG/ARM/speculate-vector-ops.ll | 4 +- llvm/test/Transforms/SimplifyCFG/BrUnwind.ll | 2 +- llvm/test/Transforms/SimplifyCFG/DeadSetCC.ll | 2 +- llvm/test/Transforms/SimplifyCFG/HoistCode.ll | 2 +- .../Transforms/SimplifyCFG/UncondBranchToReturn.ll | 2 +- .../Transforms/SimplifyCFG/UnreachableEliminate.ll | 2 +- .../SimplifyCFG/X86/2010-03-30-InvokeCrash.ll | 2 +- .../SimplifyCFG/X86/CoveredLookupTable.ll | 2 +- llvm/test/Transforms/SimplifyCFG/X86/bug-25299.ll | 2 +- .../SimplifyCFG/X86/disable-lookup-table.ll | 2 +- llvm/test/Transforms/SimplifyCFG/X86/pr39187-g.ll | 2 +- .../SimplifyCFG/X86/switch-covered-bug.ll | 2 +- .../Transforms/SimplifyCFG/X86/switch-table-bug.ll | 2 +- llvm/test/Transforms/SimplifyCFG/branch-fold.ll | 2 +- .../Transforms/SimplifyCFG/branch-phi-thread.ll | 2 +- .../SimplifyCFG/debug-info-thread-phi.ll | 2 +- .../SimplifyCFG/duplicate-ret-into-uncond-br.ll | 31 + llvm/test/Transforms/SimplifyCFG/extract-cost.ll | 2 +- .../SimplifyCFG/fold-branch-to-common-dest.ll | 2 +- .../Transforms/SimplifyCFG/hoist-common-code.ll | 2 +- .../Transforms/SimplifyCFG/hoist-with-range.ll | 2 +- llvm/test/Transforms/SimplifyCFG/indirectbr.ll | 2 +- llvm/test/Transforms/SimplifyCFG/invoke_unwind.ll | 2 +- .../Transforms/SimplifyCFG/lifetime-landingpad.ll | 2 +- .../merge-duplicate-conditional-ret-val.ll | 21 + llvm/test/Transforms/SimplifyCFG/pr39807.ll | 2 +- llvm/test/Transforms/SimplifyCFG/pr46638.ll | 2 +- .../SimplifyCFG/preserve-branchweights-partial.ll | 4 +- .../SimplifyCFG/preserve-branchweights.ll | 2 +- llvm/test/Transforms/SimplifyCFG/rangereduce.ll | 2 +- .../Transforms/SimplifyCFG/switch-masked-bits.ll | 2 +- .../SimplifyCFG/switch-on-const-select.ll | 2 +- .../Transforms/SimplifyCFG/switch-range-to-icmp.ll | 2 +- .../SimplifyCFG/switch-simplify-crash.ll | 2 +- .../SimplifyCFG/switch-to-select-two-case.ll | 2 +- .../Transforms/SimplifyCFG/switch_switch_fold.ll | 2 +- llvm/test/Transforms/SimplifyCFG/switch_thread.ll | 2 +- .../test/Transforms/SimplifyCFG/unprofitable-pr.ll | 2 +- llvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Atom/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/Barcelona/resources-sse1.s | 2 +- .../llvm-mca/X86/Barcelona/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/BdVer2/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/BdVer2/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/BdVer2/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/Broadwell/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Broadwell/resources-sse1.s | 2 +- .../llvm-mca/X86/Broadwell/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/BtVer2/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/BtVer2/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/BtVer2/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/BtVer2/stmxcsr-ldmxcsr.s | 10 +- .../tools/llvm-mca/X86/Generic/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Generic/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Generic/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/Haswell/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Haswell/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Haswell/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/Haswell/stmxcsr-ldmxcsr.s | 26 +- llvm/test/tools/llvm-mca/X86/SLM/resources-sse1.s | 2 +- .../test/tools/llvm-mca/X86/SLM/resources-x86_64.s | 4 +- .../llvm-mca/X86/SandyBridge/resources-avx1.s | 2 +- .../llvm-mca/X86/SandyBridge/resources-sse1.s | 2 +- .../llvm-mca/X86/SandyBridge/resources-x86_64.s | 4 +- .../llvm-mca/X86/SkylakeClient/resources-avx1.s | 2 +- .../llvm-mca/X86/SkylakeClient/resources-sse1.s | 2 +- .../llvm-mca/X86/SkylakeClient/resources-x86_64.s | 4 +- .../llvm-mca/X86/SkylakeServer/resources-avx1.s | 2 +- .../llvm-mca/X86/SkylakeServer/resources-sse1.s | 2 +- .../llvm-mca/X86/SkylakeServer/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/Znver1/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Znver1/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Znver1/resources-x86_64.s | 4 +- .../tools/llvm-mca/X86/Znver2/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Znver2/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Znver2/resources-x86_64.s | 4 +- llvm/utils/TableGen/CodeGenTarget.cpp | 14 +- mlir/include/mlir-c/Support.h | 1 + 207 files changed, 26418 insertions(+), 631 deletions(-) create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-constants-vs-registers.ll copy llvm/test/Transforms/IROutliner/{outlining-different-structure.ll => outlinin [...] create mode 100644 llvm/test/Transforms/IROutliner/outlining-different-globals.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/duplicate-ret-into-uncond-br.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/merge-duplicate-conditional-re [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig updated (e9f48737 -> dd9f65c1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig in repository toolchain/ci/base-artifacts. discards e9f48737 0: update: llvm-linux-qemu: boot new dd9f65c1 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (e9f48737) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 235 +- 02-prepare_abe/console.log | 420 +- 03-build_llvm/console.log | 13794 ++++++++++++----------- 04-build_linux/console.log | 951 +- 05-build_abe-qemu/console.log | 6805 ++++++------ 06-boot_linux/console.log | 502 +- 07-check_regression/console.log | 12 +- 08-update_baseline/console.log | 18 +- console.log | 22737 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 10 files changed, 22745 insertions(+), 22739 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-defconfig updated (bd6c48ac -> dac53677)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-defconfig in repository toolchain/ci/base-artifacts. discards bd6c48ac 0: update: llvm-linux-qemu: boot new dac53677 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (bd6c48ac) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 77 +- 02-prepare_abe/console.log | 430 +- 03-build_llvm/console.log | 13220 +++++++++++++------------ 04-build_linux/console.log | 833 +- 05-build_abe-qemu/console.log | 4670 ++++----- 06-boot_linux/console.log | 482 +- 07-check_regression/console.log | 12 +- 08-update_baseline/console.log | 18 +- console.log | 19742 +++++++++++++++++++------------------- jenkins/manifest.sh | 6 +- 10 files changed, 19749 insertions(+), 19741 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[gcc] branch master updated (bebf930dd2b -> 8d76c007afe)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from bebf930dd2b Correct coarray indices for test case. new 8d76c007afe Set DECL_ARTIFICIAL on gfortran internal variables. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/fortran/trans.c | 3 +++ 1 file changed, 3 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

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Tcwg-commits December 2020