Tcwg-commits December 2020

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[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig updated (c52bcf3a9b2 -> 64e47572002)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig in repository toolchain/ci/llvm-project. from c52bcf3a9b2 [IRSim][IROutliner] Limit to extracting regions that only r [...] adds b43b77ff9b8 [NFCI][SimlifyCFG] simplifyOnce(): also perform DomTree validation adds 4be8707e645 [SimplifyCFG] Teach FoldTwoEntryPHINode() to preserve DomTree adds 76e74d93950 [SimplifyCFG] Teach removeEmptyCleanup() to preserve DomTree adds c209b88dd43 [SimplifyCFG] Teach simplifyCommonResume() to preserve DomTree adds b7d00e29b77 [SimplifyCFG] Teach simplifySingleResume() to preserve DomTree adds 83659c70767 [SimplifyCFG] simplifySingleResume(): FoldReturnIntoUncondB [...] adds 4d87a6ad13c [NFCI][SimplifyCFG] SimplifyCondBranchToTwoReturns(): pull [...] adds b94520c9ee2 [SimplifyCFG] Teach SimplifyCondBranchToTwoReturns() to pre [...] adds 6a1617d67cc [SimplifyCFG] Teach SimplifyCondBranchToTwoReturns() to pre [...] adds 262ff9c23e7 [SimplifyCFG] Teach TryToMergeLandingPad() to preserve DomTree adds c043f5055e8 [SimplifyCFG] Teach FoldBranchToCommonDest() to preserve Do [...] adds 99930719c66 Handle overflow beyond the 127 common encodings limit adds 0cbceed27c4 [TableGen][ARM][X86] Detect combining IntrReadMem and IntrW [...] adds 5cdc4f57e50 [IROutliner] Deduplicating functions that only require inputs. adds b8a2b6af374 Revert "[IROutliner] Deduplicating functions that only requ [...] adds 7c6f28a438b [IROutliner] Deduplicating functions that only require inputs. adds 0985a8bfea4 Fix left shift overflow UB in PPC backend on LLP64 platforms adds c1d6de41a9d [mlir][CAPI] Add the missing <stdbool.h> in Support.h adds 37974b493a4 [lldb/test] Enable reverse-connect on windows too adds 62c94f06781 [RISCV] Define vector vfmul/vfdiv/vfrdiv intrinsics. adds bd576ac8d4b [RISCV] Define vector vfsgnj/vfsgnjn/vfsgnjx intrinsics. adds f86e61d8862 [RISCV] Define vector vfwadd/vfwsub intrinsics. adds 41ab45d6624 [RISCV] Define vector vfwmul intrinsics. adds 99562332e3d [lldb] [test] Update test status for NetBSD adds 35f2c3a8b41 [clang-tidy] cppcoreguidelines-pro-type-member-init: suppre [...] adds 7e84aa1b81e Fix MSVC "not all control paths return a value" warnings. NFCI. adds d86a00d8feb [RISCV] Define vslideup/vslidedown intrinsics adds 6fa1230594e [MemLoc] Fix debug print for LocationSize adds 3285ee143b7 [Analysis, IR, CodeGen] Use llvm::erase_if (NFC) adds 5d24935f220 [PGO] Remove dead member variable InstrumentFuncEntry (NFC) adds 43327ba98da [Object] Fix LFFile<ELFT>::getEntry on sizeof(size_t)==4 platforms adds e2863357de7 [lld-macho][nfc] Use split-file in order file test adds 5f9896d3b23 [lld-macho] Support Obj-C symbols in order files adds 64e47572002 [lld-macho] Have order files support filtering by archive m [...] No new revisions were added by this update. Summary of changes: .../cppcoreguidelines/ProTypeMemberInitCheck.cpp | 4 + .../cppcoreguidelines-pro-type-member-init.cpp | 16 + clang/lib/Sema/SemaTemplate.cpp | 2 + lld/MachO/Driver.cpp | 94 +- lld/MachO/UnwindInfoSection.cpp | 213 +- lld/MachO/UnwindInfoSection.h | 31 +- lld/MachO/Writer.cpp | 18 +- lld/test/MachO/invalid/order-file-bad-arch.test | 9 - lld/test/MachO/invalid/order-file-bad-objfile.test | 10 - lld/test/MachO/order-file.s | 184 +- lld/test/MachO/tools/generate-cfi-funcs.py | 2 +- lld/test/MachO/tools/validate-unwind-info.py | 13 +- .../test/tools/lldb-server/gdbremote_testcase.py | 4 - .../api/multiple-targets/TestMultipleTargets.py | 1 + .../call-restarts/TestCallThatRestarts.py | 2 +- .../expression/ir-interpreter/TestIRInterpreter.py | 1 - .../expression/radar_9531204/TestPrintfAfterUp.py | 1 - .../save_jit_objects/TestSaveJITObjects.py | 1 - .../test/API/commands/expression/test/TestExprs.py | 1 - .../API/commands/gui/viewlarge/TestGuiViewLarge.py | 1 + .../commands/process/attach/TestProcessAttach.py | 1 + .../cpp_exception/TestCPPExceptionBreakpoint.py | 2 - .../TestBreakpointInGlobalConstructor.py | 1 - .../functionalities/completion/TestCompletion.py | 1 + .../TestDlopenOtherExecutable.py | 1 + .../inferior-assert/TestInferiorAssert.py | 4 - .../TestRecursiveInferiorStep.py | 1 + ...ConcurrentBreakpointDelayBreakpointOneSignal.py | 1 - .../TestConcurrentSignalDelayBreak.py | 2 +- .../TestConcurrentTwoBreakpointsOneDelaySignal.py | 2 +- .../TestConcurrentTwoBreakpointsOneSignal.py | 2 +- .../TestExitDuringExpression.py | 2 + .../TestStateAfterExpression.py | 1 + .../TestThreadSpecificBpPlusCondition.py | 2 +- .../unwind/noreturn/TestNoreturnUnwind.py | 1 - .../c/conflicting-symbol/TestConflictingSymbol.py | 1 - .../lang/c/const_variables/TestConstVariables.py | 1 - .../API/lang/c/function_types/TestFunctionTypes.py | 1 - .../lang/c/global_variables/TestGlobalVariables.py | 1 - lldb/test/API/lang/c/shared_lib/TestSharedLib.py | 2 - .../cpp/exceptions/TestCPPExceptionBreakpoints.py | 1 - .../TestNamespaceDefinitions.py | 1 - .../test/API/lang/cpp/stl/TestStdCXXDisassembly.py | 1 - lldb/test/API/lang/cpp/this/TestCPPThis.py | 1 - lldb/test/API/python_api/event/TestEvents.py | 2 +- .../lldbutil/iter/TestRegistersIterator.py | 1 + lldb/test/API/python_api/thread/TestThreadAPI.py | 1 - .../lldb-server/TestGdbRemote_vContThreads.py | 2 + .../TestVSCode_setExceptionBreakpoints.py | 1 - .../disconnect/TestVSCode_disconnect.py | 1 + lldb/test/Shell/Recognizer/assert.test | 1 + .../Functionalities/TestExpressionEvaluation.test | 2 +- .../ScriptInterpreter/Lua/watchpoint_callback.test | 1 + llvm/include/llvm/IR/IntrinsicsARM.td | 4 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 33 + llvm/include/llvm/IR/IntrinsicsX86.td | 7 +- llvm/include/llvm/IR/PassManager.h | 6 +- llvm/include/llvm/Object/ELF.h | 9 +- llvm/include/llvm/Transforms/IPO/IROutliner.h | 35 + llvm/include/llvm/Transforms/Utils/Local.h | 3 +- llvm/lib/Analysis/CGSCCPassManager.cpp | 31 +- llvm/lib/Analysis/MemoryLocation.cpp | 2 +- llvm/lib/Analysis/ScalarEvolution.cpp | 4 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 4 +- llvm/lib/CodeGen/RDFLiveness.cpp | 2 +- llvm/lib/CodeGen/StackMaps.cpp | 5 +- llvm/lib/IR/LLVMContextImpl.h | 3 +- llvm/lib/IR/Metadata.cpp | 9 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 353 +++- llvm/lib/Transforms/IPO/IROutliner.cpp | 264 ++- .../Instrumentation/PGOInstrumentation.cpp | 3 - llvm/lib/Transforms/Utils/LoopSimplify.cpp | 2 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 134 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll | 441 ++++ llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll | 601 ++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll | 1705 ++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll | 2131 ++++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll | 1705 ++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll | 2131 ++++++++++++++++++++ llvm/test/Transforms/Coroutines/coro-heap-elide.ll | 2 +- llvm/test/Transforms/GVNSink/indirect-call.ll | 2 +- llvm/test/Transforms/GVNSink/sink-common-code.ll | 2 +- llvm/test/Transforms/IROutliner/extraction.ll | 8 +- llvm/test/Transforms/IROutliner/illegal-assumes.ll | 16 +- .../test/Transforms/IROutliner/illegal-branches.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-callbr.ll | 8 +- llvm/test/Transforms/IROutliner/illegal-calls.ll | 8 +- .../test/Transforms/IROutliner/illegal-catchpad.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-cleanup.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-frozen.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-gep.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-invoke.ll | 4 +- .../Transforms/IROutliner/illegal-landingpad.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-memset.ll | 4 +- .../Transforms/IROutliner/illegal-phi-nodes.ll | 4 +- llvm/test/Transforms/IROutliner/legal-debug.ll | 4 +- .../IROutliner/outlining-address-taken.ll | 4 +- .../IROutliner/outlining-different-constants.ll | 2 +- .../IROutliner/outlining-different-structure.ll | 2 +- .../IROutliner/outlining-same-constants.ll | 2 +- .../IROutliner/outlining-same-globals.ll | 13 +- .../SimplifyCFG/2004-12-10-SimplifyCFGCrash.ll | 2 +- .../Transforms/SimplifyCFG/2005-06-16-PHICrash.ll | 2 +- .../SimplifyCFG/2005-08-01-PHIUpdateFail.ll | 2 +- .../Transforms/SimplifyCFG/2006-08-03-Crash.ll | 2 +- .../Transforms/SimplifyCFG/2008-12-16-DCECond.ll | 2 +- .../SimplifyCFG/2011-09-05-TrivialLPad.ll | 2 +- .../SimplifyCFG/ARM/speculate-vector-ops.ll | 4 +- llvm/test/Transforms/SimplifyCFG/BrUnwind.ll | 2 +- llvm/test/Transforms/SimplifyCFG/DeadSetCC.ll | 2 +- llvm/test/Transforms/SimplifyCFG/HoistCode.ll | 2 +- .../Transforms/SimplifyCFG/UncondBranchToReturn.ll | 2 +- .../Transforms/SimplifyCFG/UnreachableEliminate.ll | 2 +- .../SimplifyCFG/X86/2010-03-30-InvokeCrash.ll | 2 +- .../SimplifyCFG/X86/CoveredLookupTable.ll | 2 +- llvm/test/Transforms/SimplifyCFG/X86/bug-25299.ll | 2 +- .../SimplifyCFG/X86/disable-lookup-table.ll | 2 +- llvm/test/Transforms/SimplifyCFG/X86/pr39187-g.ll | 2 +- .../SimplifyCFG/X86/switch-covered-bug.ll | 2 +- .../Transforms/SimplifyCFG/X86/switch-table-bug.ll | 2 +- llvm/test/Transforms/SimplifyCFG/branch-fold.ll | 2 +- .../Transforms/SimplifyCFG/branch-phi-thread.ll | 2 +- .../SimplifyCFG/debug-info-thread-phi.ll | 2 +- .../SimplifyCFG/duplicate-ret-into-uncond-br.ll | 31 + llvm/test/Transforms/SimplifyCFG/extract-cost.ll | 2 +- .../SimplifyCFG/fold-branch-to-common-dest.ll | 2 +- .../Transforms/SimplifyCFG/hoist-common-code.ll | 2 +- .../Transforms/SimplifyCFG/hoist-with-range.ll | 2 +- llvm/test/Transforms/SimplifyCFG/indirectbr.ll | 2 +- llvm/test/Transforms/SimplifyCFG/invoke_unwind.ll | 2 +- .../Transforms/SimplifyCFG/lifetime-landingpad.ll | 2 +- .../merge-duplicate-conditional-ret-val.ll | 21 + llvm/test/Transforms/SimplifyCFG/pr39807.ll | 2 +- llvm/test/Transforms/SimplifyCFG/pr46638.ll | 2 +- .../SimplifyCFG/preserve-branchweights-partial.ll | 4 +- .../SimplifyCFG/preserve-branchweights.ll | 2 +- llvm/test/Transforms/SimplifyCFG/rangereduce.ll | 2 +- .../Transforms/SimplifyCFG/switch-masked-bits.ll | 2 +- .../SimplifyCFG/switch-on-const-select.ll | 2 +- .../Transforms/SimplifyCFG/switch-range-to-icmp.ll | 2 +- .../SimplifyCFG/switch-simplify-crash.ll | 2 +- .../SimplifyCFG/switch-to-select-two-case.ll | 2 +- .../Transforms/SimplifyCFG/switch_switch_fold.ll | 2 +- llvm/test/Transforms/SimplifyCFG/switch_thread.ll | 2 +- .../test/Transforms/SimplifyCFG/unprofitable-pr.ll | 2 +- llvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Barcelona/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/BdVer2/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/BdVer2/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Broadwell/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Broadwell/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/BtVer2/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/BtVer2/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/BtVer2/stmxcsr-ldmxcsr.s | 10 +- .../tools/llvm-mca/X86/Generic/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Generic/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Haswell/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Haswell/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Haswell/stmxcsr-ldmxcsr.s | 26 +- llvm/test/tools/llvm-mca/X86/SLM/resources-sse1.s | 2 +- .../llvm-mca/X86/SandyBridge/resources-avx1.s | 2 +- .../llvm-mca/X86/SandyBridge/resources-sse1.s | 2 +- .../llvm-mca/X86/SkylakeClient/resources-avx1.s | 2 +- .../llvm-mca/X86/SkylakeClient/resources-sse1.s | 2 +- .../llvm-mca/X86/SkylakeServer/resources-avx1.s | 2 +- .../llvm-mca/X86/SkylakeServer/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Znver1/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Znver1/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Znver2/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Znver2/resources-sse1.s | 2 +- llvm/utils/TableGen/CodeGenTarget.cpp | 14 +- mlir/include/mlir-c/Support.h | 1 + 193 files changed, 26061 insertions(+), 588 deletions(-) delete mode 100644 lld/test/MachO/invalid/order-file-bad-arch.test delete mode 100644 lld/test/MachO/invalid/order-file-bad-objfile.test create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/duplicate-ret-into-uncond-br.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/merge-duplicate-conditional-re [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig updated (c9b2848e -> ef028b1a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig in repository toolchain/ci/base-artifacts. discards c9b2848e 2: update: llvm-linux-qemu: 19339 new ef028b1a 2: update: llvm-linux-qemu: 19356 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (c9b2848e) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 216 +- 02-prepare_abe/console.log | 434 +- 03-build_llvm/console.log | 13782 +++++++++++++-------------- 04-build_linux/console.log | 809 +- 07-check_regression/console.log | 26 +- 07-check_regression/results.regressions | 10 +- 08-update_baseline/console.log | 102 +- 08-update_baseline/results.regressions | 10 +- console.log | 15369 +++++++++++++++--------------- jenkins/manifest.sh | 14 +- results | 2 +- 11 files changed, 15392 insertions(+), 15382 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (c52bcf3a9b2 -> bfa95b4ac79)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/llvm-project. from c52bcf3a9b2 [IRSim][IROutliner] Limit to extracting regions that only r [...] adds b43b77ff9b8 [NFCI][SimlifyCFG] simplifyOnce(): also perform DomTree validation adds 4be8707e645 [SimplifyCFG] Teach FoldTwoEntryPHINode() to preserve DomTree adds 76e74d93950 [SimplifyCFG] Teach removeEmptyCleanup() to preserve DomTree adds c209b88dd43 [SimplifyCFG] Teach simplifyCommonResume() to preserve DomTree adds b7d00e29b77 [SimplifyCFG] Teach simplifySingleResume() to preserve DomTree adds 83659c70767 [SimplifyCFG] simplifySingleResume(): FoldReturnIntoUncondB [...] adds 4d87a6ad13c [NFCI][SimplifyCFG] SimplifyCondBranchToTwoReturns(): pull [...] adds b94520c9ee2 [SimplifyCFG] Teach SimplifyCondBranchToTwoReturns() to pre [...] adds 6a1617d67cc [SimplifyCFG] Teach SimplifyCondBranchToTwoReturns() to pre [...] adds 262ff9c23e7 [SimplifyCFG] Teach TryToMergeLandingPad() to preserve DomTree adds c043f5055e8 [SimplifyCFG] Teach FoldBranchToCommonDest() to preserve Do [...] adds 99930719c66 Handle overflow beyond the 127 common encodings limit adds 0cbceed27c4 [TableGen][ARM][X86] Detect combining IntrReadMem and IntrW [...] adds 5cdc4f57e50 [IROutliner] Deduplicating functions that only require inputs. adds b8a2b6af374 Revert "[IROutliner] Deduplicating functions that only requ [...] adds 7c6f28a438b [IROutliner] Deduplicating functions that only require inputs. adds 0985a8bfea4 Fix left shift overflow UB in PPC backend on LLP64 platforms adds c1d6de41a9d [mlir][CAPI] Add the missing <stdbool.h> in Support.h adds 37974b493a4 [lldb/test] Enable reverse-connect on windows too adds 62c94f06781 [RISCV] Define vector vfmul/vfdiv/vfrdiv intrinsics. adds bd576ac8d4b [RISCV] Define vector vfsgnj/vfsgnjn/vfsgnjx intrinsics. adds f86e61d8862 [RISCV] Define vector vfwadd/vfwsub intrinsics. adds 41ab45d6624 [RISCV] Define vector vfwmul intrinsics. adds 99562332e3d [lldb] [test] Update test status for NetBSD adds 35f2c3a8b41 [clang-tidy] cppcoreguidelines-pro-type-member-init: suppre [...] adds 7e84aa1b81e Fix MSVC "not all control paths return a value" warnings. NFCI. adds d86a00d8feb [RISCV] Define vslideup/vslidedown intrinsics adds 6fa1230594e [MemLoc] Fix debug print for LocationSize adds 3285ee143b7 [Analysis, IR, CodeGen] Use llvm::erase_if (NFC) adds 5d24935f220 [PGO] Remove dead member variable InstrumentFuncEntry (NFC) adds 43327ba98da [Object] Fix LFFile<ELFT>::getEntry on sizeof(size_t)==4 platforms adds e2863357de7 [lld-macho][nfc] Use split-file in order file test adds 5f9896d3b23 [lld-macho] Support Obj-C symbols in order files adds 64e47572002 [lld-macho] Have order files support filtering by archive m [...] new bfa95b4ac79 [BasicAA] Add test for byval argument (NFC) The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../cppcoreguidelines/ProTypeMemberInitCheck.cpp | 4 + .../cppcoreguidelines-pro-type-member-init.cpp | 16 + clang/lib/Sema/SemaTemplate.cpp | 2 + lld/MachO/Driver.cpp | 94 +- lld/MachO/UnwindInfoSection.cpp | 213 +- lld/MachO/UnwindInfoSection.h | 31 +- lld/MachO/Writer.cpp | 18 +- lld/test/MachO/invalid/order-file-bad-arch.test | 9 - lld/test/MachO/invalid/order-file-bad-objfile.test | 10 - lld/test/MachO/order-file.s | 184 +- lld/test/MachO/tools/generate-cfi-funcs.py | 2 +- lld/test/MachO/tools/validate-unwind-info.py | 13 +- .../test/tools/lldb-server/gdbremote_testcase.py | 4 - .../api/multiple-targets/TestMultipleTargets.py | 1 + .../call-restarts/TestCallThatRestarts.py | 2 +- .../expression/ir-interpreter/TestIRInterpreter.py | 1 - .../expression/radar_9531204/TestPrintfAfterUp.py | 1 - .../save_jit_objects/TestSaveJITObjects.py | 1 - .../test/API/commands/expression/test/TestExprs.py | 1 - .../API/commands/gui/viewlarge/TestGuiViewLarge.py | 1 + .../commands/process/attach/TestProcessAttach.py | 1 + .../cpp_exception/TestCPPExceptionBreakpoint.py | 2 - .../TestBreakpointInGlobalConstructor.py | 1 - .../functionalities/completion/TestCompletion.py | 1 + .../TestDlopenOtherExecutable.py | 1 + .../inferior-assert/TestInferiorAssert.py | 4 - .../TestRecursiveInferiorStep.py | 1 + ...ConcurrentBreakpointDelayBreakpointOneSignal.py | 1 - .../TestConcurrentSignalDelayBreak.py | 2 +- .../TestConcurrentTwoBreakpointsOneDelaySignal.py | 2 +- .../TestConcurrentTwoBreakpointsOneSignal.py | 2 +- .../TestExitDuringExpression.py | 2 + .../TestStateAfterExpression.py | 1 + .../TestThreadSpecificBpPlusCondition.py | 2 +- .../unwind/noreturn/TestNoreturnUnwind.py | 1 - .../c/conflicting-symbol/TestConflictingSymbol.py | 1 - .../lang/c/const_variables/TestConstVariables.py | 1 - .../API/lang/c/function_types/TestFunctionTypes.py | 1 - .../lang/c/global_variables/TestGlobalVariables.py | 1 - lldb/test/API/lang/c/shared_lib/TestSharedLib.py | 2 - .../cpp/exceptions/TestCPPExceptionBreakpoints.py | 1 - .../TestNamespaceDefinitions.py | 1 - .../test/API/lang/cpp/stl/TestStdCXXDisassembly.py | 1 - lldb/test/API/lang/cpp/this/TestCPPThis.py | 1 - lldb/test/API/python_api/event/TestEvents.py | 2 +- .../lldbutil/iter/TestRegistersIterator.py | 1 + lldb/test/API/python_api/thread/TestThreadAPI.py | 1 - .../lldb-server/TestGdbRemote_vContThreads.py | 2 + .../TestVSCode_setExceptionBreakpoints.py | 1 - .../disconnect/TestVSCode_disconnect.py | 1 + lldb/test/Shell/Recognizer/assert.test | 1 + .../Functionalities/TestExpressionEvaluation.test | 2 +- .../ScriptInterpreter/Lua/watchpoint_callback.test | 1 + llvm/include/llvm/IR/IntrinsicsARM.td | 4 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 33 + llvm/include/llvm/IR/IntrinsicsX86.td | 7 +- llvm/include/llvm/IR/PassManager.h | 6 +- llvm/include/llvm/Object/ELF.h | 9 +- llvm/include/llvm/Transforms/IPO/IROutliner.h | 35 + llvm/include/llvm/Transforms/Utils/Local.h | 3 +- llvm/lib/Analysis/CGSCCPassManager.cpp | 31 +- llvm/lib/Analysis/MemoryLocation.cpp | 2 +- llvm/lib/Analysis/ScalarEvolution.cpp | 4 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 4 +- llvm/lib/CodeGen/RDFLiveness.cpp | 2 +- llvm/lib/CodeGen/StackMaps.cpp | 5 +- llvm/lib/IR/LLVMContextImpl.h | 3 +- llvm/lib/IR/Metadata.cpp | 9 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 353 +++- llvm/lib/Transforms/IPO/IROutliner.cpp | 264 ++- .../Instrumentation/PGOInstrumentation.cpp | 3 - llvm/lib/Transforms/Utils/LoopSimplify.cpp | 2 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 134 +- llvm/test/Analysis/BasicAA/noalias-param.ll | 19 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll | 441 ++++ llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll | 601 ++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll | 881 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll | 1201 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll | 401 ++++ llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll | 721 +++++++ llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll | 1705 ++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll | 2131 ++++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll | 1705 ++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll | 2131 ++++++++++++++++++++ llvm/test/Transforms/Coroutines/coro-heap-elide.ll | 2 +- llvm/test/Transforms/GVNSink/indirect-call.ll | 2 +- llvm/test/Transforms/GVNSink/sink-common-code.ll | 2 +- llvm/test/Transforms/IROutliner/extraction.ll | 8 +- llvm/test/Transforms/IROutliner/illegal-assumes.ll | 16 +- .../test/Transforms/IROutliner/illegal-branches.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-callbr.ll | 8 +- llvm/test/Transforms/IROutliner/illegal-calls.ll | 8 +- .../test/Transforms/IROutliner/illegal-catchpad.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-cleanup.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-frozen.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-gep.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-invoke.ll | 4 +- .../Transforms/IROutliner/illegal-landingpad.ll | 4 +- llvm/test/Transforms/IROutliner/illegal-memset.ll | 4 +- .../Transforms/IROutliner/illegal-phi-nodes.ll | 4 +- llvm/test/Transforms/IROutliner/legal-debug.ll | 4 +- .../IROutliner/outlining-address-taken.ll | 4 +- .../IROutliner/outlining-different-constants.ll | 2 +- .../IROutliner/outlining-different-structure.ll | 2 +- .../IROutliner/outlining-same-constants.ll | 2 +- .../IROutliner/outlining-same-globals.ll | 13 +- .../SimplifyCFG/2004-12-10-SimplifyCFGCrash.ll | 2 +- .../Transforms/SimplifyCFG/2005-06-16-PHICrash.ll | 2 +- .../SimplifyCFG/2005-08-01-PHIUpdateFail.ll | 2 +- .../Transforms/SimplifyCFG/2006-08-03-Crash.ll | 2 +- .../Transforms/SimplifyCFG/2008-12-16-DCECond.ll | 2 +- .../SimplifyCFG/2011-09-05-TrivialLPad.ll | 2 +- .../SimplifyCFG/ARM/speculate-vector-ops.ll | 4 +- llvm/test/Transforms/SimplifyCFG/BrUnwind.ll | 2 +- llvm/test/Transforms/SimplifyCFG/DeadSetCC.ll | 2 +- llvm/test/Transforms/SimplifyCFG/HoistCode.ll | 2 +- .../Transforms/SimplifyCFG/UncondBranchToReturn.ll | 2 +- .../Transforms/SimplifyCFG/UnreachableEliminate.ll | 2 +- .../SimplifyCFG/X86/2010-03-30-InvokeCrash.ll | 2 +- .../SimplifyCFG/X86/CoveredLookupTable.ll | 2 +- llvm/test/Transforms/SimplifyCFG/X86/bug-25299.ll | 2 +- .../SimplifyCFG/X86/disable-lookup-table.ll | 2 +- llvm/test/Transforms/SimplifyCFG/X86/pr39187-g.ll | 2 +- .../SimplifyCFG/X86/switch-covered-bug.ll | 2 +- .../Transforms/SimplifyCFG/X86/switch-table-bug.ll | 2 +- llvm/test/Transforms/SimplifyCFG/branch-fold.ll | 2 +- .../Transforms/SimplifyCFG/branch-phi-thread.ll | 2 +- .../SimplifyCFG/debug-info-thread-phi.ll | 2 +- .../SimplifyCFG/duplicate-ret-into-uncond-br.ll | 31 + llvm/test/Transforms/SimplifyCFG/extract-cost.ll | 2 +- .../SimplifyCFG/fold-branch-to-common-dest.ll | 2 +- .../Transforms/SimplifyCFG/hoist-common-code.ll | 2 +- .../Transforms/SimplifyCFG/hoist-with-range.ll | 2 +- llvm/test/Transforms/SimplifyCFG/indirectbr.ll | 2 +- llvm/test/Transforms/SimplifyCFG/invoke_unwind.ll | 2 +- .../Transforms/SimplifyCFG/lifetime-landingpad.ll | 2 +- .../merge-duplicate-conditional-ret-val.ll | 21 + llvm/test/Transforms/SimplifyCFG/pr39807.ll | 2 +- llvm/test/Transforms/SimplifyCFG/pr46638.ll | 2 +- .../SimplifyCFG/preserve-branchweights-partial.ll | 4 +- .../SimplifyCFG/preserve-branchweights.ll | 2 +- llvm/test/Transforms/SimplifyCFG/rangereduce.ll | 2 +- .../Transforms/SimplifyCFG/switch-masked-bits.ll | 2 +- .../SimplifyCFG/switch-on-const-select.ll | 2 +- .../Transforms/SimplifyCFG/switch-range-to-icmp.ll | 2 +- .../SimplifyCFG/switch-simplify-crash.ll | 2 +- .../SimplifyCFG/switch-to-select-two-case.ll | 2 +- .../Transforms/SimplifyCFG/switch_switch_fold.ll | 2 +- llvm/test/Transforms/SimplifyCFG/switch_thread.ll | 2 +- .../test/Transforms/SimplifyCFG/unprofitable-pr.ll | 2 +- llvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Barcelona/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/BdVer2/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/BdVer2/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Broadwell/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Broadwell/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/BtVer2/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/BtVer2/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/BtVer2/stmxcsr-ldmxcsr.s | 10 +- .../tools/llvm-mca/X86/Generic/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Generic/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Haswell/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Haswell/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Haswell/stmxcsr-ldmxcsr.s | 26 +- llvm/test/tools/llvm-mca/X86/SLM/resources-sse1.s | 2 +- .../llvm-mca/X86/SandyBridge/resources-avx1.s | 2 +- .../llvm-mca/X86/SandyBridge/resources-sse1.s | 2 +- .../llvm-mca/X86/SkylakeClient/resources-avx1.s | 2 +- .../llvm-mca/X86/SkylakeClient/resources-sse1.s | 2 +- .../llvm-mca/X86/SkylakeServer/resources-avx1.s | 2 +- .../llvm-mca/X86/SkylakeServer/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Znver1/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Znver1/resources-sse1.s | 2 +- .../tools/llvm-mca/X86/Znver2/resources-avx1.s | 2 +- .../tools/llvm-mca/X86/Znver2/resources-sse1.s | 2 +- llvm/utils/TableGen/CodeGenTarget.cpp | 14 +- mlir/include/mlir-c/Support.h | 1 + 194 files changed, 26076 insertions(+), 592 deletions(-) delete mode 100644 lld/test/MachO/invalid/order-file-bad-arch.test delete mode 100644 lld/test/MachO/invalid/order-file-bad-objfile.test create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/duplicate-ret-into-uncond-br.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/merge-duplicate-conditional-re [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (67e96d1c -> 38d12689)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards 67e96d1c 0: update: llvm-linux-qemu: boot new 38d12689 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (67e96d1c) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 245 +- 02-prepare_abe/console.log | 430 +- 03-build_llvm/console.log | 13738 ++++++++++++----------- 04-build_linux/console.log | 956 +- 05-build_abe-qemu/console.log | 6702 +++++------ 06-boot_linux/console.log | 498 +- 07-check_regression/console.log | 16 +- 08-update_baseline/console.log | 18 +- console.log | 22603 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 10 files changed, 22606 insertions(+), 22608 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allyesconfig updated (384c643d -> 394c0393)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards 384c643d 2: update: binutils-gcc-linux-qemu: 18959 new 394c0393 2: update: linux-d12091db2b17e59751c4995f096259ef66a35a72: 18959 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (384c643d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 171 +- 02-prepare_abe/console.log | 446 +- 03-build_abe-binutils/console.log | 11285 +++++---- 04-build_abe-stage1/console.log | 16166 +++++++------ 05-build_linux/console.log | 9520 ++++---- 08-check_regression/console.log | 2 +- 08-check_regression/results.regressions | 4 +- 09-update_baseline/console.log | 64 +- 09-update_baseline/results.regressions | 4 +- console.log | 37666 +++++++++++++++--------------- jenkins/manifest.sh | 14 +- 11 files changed, 37082 insertions(+), 38260 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allyesconfig updated (af3f37319c -> a05f8ecd88)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allyesconfig in repository toolchain/ci/qemu. from af3f37319c Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/fo [...] adds a9dc68d9b2 i386: move kvm accel files into kvm/ adds 1fc33bb9f0 i386: move whpx accel files into whpx/ adds 7fdef0d4f2 i386: move hax accel files into hax/ adds dbe59a1991 i386: hvf: remove stale MAINTAINERS entry for old hvf stubs adds 1b248f147e i386: move TCG accel files into tcg/ adds 0c36af8ce8 i386: move cpu dump out of helper.c into cpu-dump.c adds 088567713f i386: move hyperv_vendor_id initialization to x86_cpu_realizefn() adds 735db465b0 i386: move hyperv_interface_id initialization to x86_cpu_rea [...] adds fb7e31aa4f i386: move hyperv_version_id initialization to x86_cpu_realizefn() adds 23eb5d032f i386: move hyperv_limits initialization to x86_cpu_realizefn() adds 40399ecb69 x86/cpu: Add AVX512_FP16 cpu feature adds ed69e8314d i386: move TCG cpu class initialization to tcg/ adds 69483f3115 i386: tcg: remove inline from cpu_load_eflags adds 035ba06c2e tcg: cpu_exec_{enter,exit} helpers adds 80c4750ba8 tcg: make CPUClass.cpu_exec_* optional adds 710384d042 tcg: Make CPUClass.debug_excp_handler optional adds 9fb75013d8 cpu: Remove unnecessary noop methods adds 75ee62ac60 Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-n [...] adds 10b43754cf hw/riscv: sifive_u: Add UART1 DT node in the generated DTB adds dfc973ecc1 hw/riscv: microchip_pfsoc: add QSPI NOR flash adds b3d2a4296f hw/core/register.c: Don't use '#' flag of printf format adds c63ca4ff7f target/riscv: Fix the bug of HLVX/HLV/HSV adds 529577457c target/riscv: Fix definition of MSTATUS_TW and MSTATUS_TSR adds 54a581c228 intc/ibex_plic: Clear interrupts that occur during claim process adds 617448a46b hw/riscv: Expand the is 32-bit check to support more CPUs adds c0a635f397 target/riscv: Add a TYPE_RISCV_CPU_BASE CPU adds dc4d4aaee3 riscv: spike: Remove target macro conditionals adds 09fe17125e riscv: virt: Remove target macro conditionals adds 7893677184 hw/riscv: boot: Remove compile time XLEN checks adds 9d01143063 hw/riscv: virt: Remove compile time XLEN checks adds bd62c13ea8 hw/riscv: spike: Remove compile time XLEN checks adds 2206ffa68f hw/riscv: sifive_u: Remove compile time XLEN checks adds 5b6c291b8d target/riscv: fpu_helper: Match function defs in HELPER macros adds 51ae0cabc6 target/riscv: Add a riscv_cpu_is_32bit() helper function adds 114baaca51 target/riscv: Specify the XLEN for CPUs adds 5c5a47f10c target/riscv: cpu: Remove compile time XLEN checks adds f08c7ff3dc target/riscv: cpu_helper: Remove compile time XLEN checks adds 8987cdc481 target/riscv: csr: Remove compile time XLEN checks adds 094b072c68 target/riscv: cpu: Set XLEN independently from target adds 3ed2b8ac2d hw/riscv: Use the CPU to determine if 32-bit adds d31e970a01 riscv/opentitan: Update the OpenTitan memory layout adds a05f8ecd88 Merge remote-tracking branch 'remotes/alistair/tags/pull-ris [...] No new revisions were added by this update. Summary of changes: MAINTAINERS | 11 +- accel/tcg/cpu-exec.c | 34 +- hw/core/cpu.c | 13 - hw/core/register.c | 16 +- hw/i386/fw_cfg.c | 2 +- hw/i386/intel_iommu.c | 2 +- hw/i386/kvm/apic.c | 2 +- hw/i386/kvm/clock.c | 2 +- hw/i386/microvm.c | 2 +- hw/i386/pc.c | 2 +- hw/i386/x86.c | 2 +- hw/intc/ibex_plic.c | 13 +- hw/riscv/boot.c | 70 ++-- hw/riscv/microchip_pfsoc.c | 21 ++ hw/riscv/opentitan.c | 81 +++-- hw/riscv/sifive_u.c | 74 ++-- hw/riscv/spike.c | 52 +-- hw/riscv/virt.c | 39 ++- include/hw/riscv/boot.h | 14 +- include/hw/riscv/microchip_pfsoc.h | 3 + include/hw/riscv/opentitan.h | 23 +- include/hw/riscv/spike.h | 6 - include/hw/riscv/virt.h | 6 - meson.build | 1 + target/i386/cpu-dump.c | 537 ++++++++++++++++++++++++++++ target/i386/cpu.c | 75 ++-- target/i386/cpu.h | 97 +----- target/i386/{ => hax}/hax-all.c | 0 target/i386/{ => hax}/hax-cpus.c | 0 target/i386/{ => hax}/hax-cpus.h | 0 target/i386/{ => hax}/hax-i386.h | 6 +- target/i386/{ => hax}/hax-interface.h | 0 target/i386/{ => hax}/hax-mem.c | 0 target/i386/{ => hax}/hax-posix.c | 0 target/i386/{ => hax}/hax-posix.h | 0 target/i386/{ => hax}/hax-windows.c | 0 target/i386/{ => hax}/hax-windows.h | 0 target/i386/hax/meson.build | 7 + target/i386/helper.c | 539 +---------------------------- target/i386/{ => kvm}/hyperv-proto.h | 0 target/i386/{ => kvm}/hyperv-stub.c | 0 target/i386/{ => kvm}/hyperv.c | 0 target/i386/{ => kvm}/hyperv.h | 0 target/i386/{ => kvm}/kvm-stub.c | 0 target/i386/{ => kvm}/kvm.c | 70 ++-- target/i386/{ => kvm}/kvm_i386.h | 0 target/i386/kvm/meson.build | 3 + target/i386/kvm/trace-events | 7 + target/i386/kvm/trace.h | 1 + target/i386/machine.c | 4 +- target/i386/meson.build | 33 +- target/i386/{ => tcg}/bpt_helper.c | 1 + target/i386/{ => tcg}/cc_helper.c | 1 + target/i386/{ => tcg}/cc_helper_template.h | 0 target/i386/{ => tcg}/excp_helper.c | 1 + target/i386/{ => tcg}/fpu_helper.c | 39 ++- target/i386/tcg/helper-tcg.h | 95 +++++ target/i386/{ => tcg}/int_helper.c | 1 + target/i386/{ => tcg}/mem_helper.c | 1 + target/i386/tcg/meson.build | 14 + target/i386/{ => tcg}/misc_helper.c | 14 + target/i386/{ => tcg}/mpx_helper.c | 1 + target/i386/{ => tcg}/seg_helper.c | 1 + target/i386/{ => tcg}/smm_helper.c | 2 + target/i386/{ => tcg}/svm_helper.c | 1 + target/i386/tcg/tcg-cpu.c | 71 ++++ target/i386/tcg/tcg-cpu.h | 15 + target/i386/{ => tcg}/tcg-stub.c | 0 target/i386/{ => tcg}/translate.c | 1 + target/i386/trace-events | 6 - target/i386/whpx/meson.build | 5 + target/i386/{ => whpx}/whp-dispatch.h | 0 target/i386/{ => whpx}/whpx-all.c | 0 target/i386/{ => whpx}/whpx-apic.c | 0 target/i386/{ => whpx}/whpx-cpus.c | 0 target/i386/{ => whpx}/whpx-cpus.h | 0 target/riscv/cpu.c | 84 +++-- target/riscv/cpu.h | 8 + target/riscv/cpu_bits.h | 8 +- target/riscv/cpu_helper.c | 15 +- target/riscv/csr.c | 176 +++++----- target/riscv/fpu_helper.c | 8 - target/riscv/helper.h | 24 +- 83 files changed, 1390 insertions(+), 1073 deletions(-) create mode 100644 target/i386/cpu-dump.c rename target/i386/{ => hax}/hax-all.c (100%) rename target/i386/{ => hax}/hax-cpus.c (100%) rename target/i386/{ => hax}/hax-cpus.h (100%) rename target/i386/{ => hax}/hax-i386.h (95%) rename target/i386/{ => hax}/hax-interface.h (100%) rename target/i386/{ => hax}/hax-mem.c (100%) rename target/i386/{ => hax}/hax-posix.c (100%) rename target/i386/{ => hax}/hax-posix.h (100%) rename target/i386/{ => hax}/hax-windows.c (100%) rename target/i386/{ => hax}/hax-windows.h (100%) create mode 100644 target/i386/hax/meson.build rename target/i386/{ => kvm}/hyperv-proto.h (100%) rename target/i386/{ => kvm}/hyperv-stub.c (100%) rename target/i386/{ => kvm}/hyperv.c (100%) rename target/i386/{ => kvm}/hyperv.h (100%) rename target/i386/{ => kvm}/kvm-stub.c (100%) rename target/i386/{ => kvm}/kvm.c (98%) rename target/i386/{ => kvm}/kvm_i386.h (100%) create mode 100644 target/i386/kvm/meson.build create mode 100644 target/i386/kvm/trace-events create mode 100644 target/i386/kvm/trace.h rename target/i386/{ => tcg}/bpt_helper.c (99%) rename target/i386/{ => tcg}/cc_helper.c (99%) rename target/i386/{ => tcg}/cc_helper_template.h (100%) rename target/i386/{ => tcg}/excp_helper.c (99%) rename target/i386/{ => tcg}/fpu_helper.c (99%) create mode 100644 target/i386/tcg/helper-tcg.h rename target/i386/{ => tcg}/int_helper.c (99%) rename target/i386/{ => tcg}/mem_helper.c (99%) create mode 100644 target/i386/tcg/meson.build rename target/i386/{ => tcg}/misc_helper.c (97%) rename target/i386/{ => tcg}/mpx_helper.c (99%) rename target/i386/{ => tcg}/seg_helper.c (99%) rename target/i386/{ => tcg}/smm_helper.c (99%) rename target/i386/{ => tcg}/svm_helper.c (99%) create mode 100644 target/i386/tcg/tcg-cpu.c create mode 100644 target/i386/tcg/tcg-cpu.h rename target/i386/{ => tcg}/tcg-stub.c (100%) rename target/i386/{ => tcg}/translate.c (99%) create mode 100644 target/i386/whpx/meson.build rename target/i386/{ => whpx}/whp-dispatch.h (100%) rename target/i386/{ => whpx}/whpx-all.c (100%) rename target/i386/{ => whpx}/whpx-apic.c (100%) rename target/i386/{ => whpx}/whpx-cpus.c (100%) rename target/i386/{ => whpx}/whpx-cpus.h (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allyesconfig updated (4d00d90e -> ea78dc35)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allyesconfig in repository toolchain/ci/base-artifacts. discards 4d00d90e 4: update: binutils-97aac4ec3293dc4a3fdb45a744a2991ae56514c2: 19189 new ea78dc35 4: update: qemu-a05f8ecd88f15273d033b6f044b850a8af84a5b8: 19189 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4d00d90e) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-ma [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 234 +- 02-prepare_abe/console.log | 440 +- 03-build_abe-binutils/console.log | 11245 ++++---- 04-build_abe-stage1/console.log | 20030 ++++++++------- 05-build_linux/console.log | 9290 +++---- 08-check_regression/console.log | 12 +- 08-check_regression/results.regressions | 20 +- 09-update_baseline/console.log | 90 +- 09-update_baseline/results.regressions | 20 +- console.log | 41341 +++++++++++++++--------------- jenkins/manifest.sh | 8 +- 11 files changed, 40974 insertions(+), 41756 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig updated (0c3cc58c3c7 -> 8005680351c)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig in repository toolchain/ci/gcc. from 0c3cc58c3c7 Daily bump. adds 4e9563cda3f PR fortran/98307 - Dependency check fails when using "allocatable" adds 8005680351c Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- gcc/fortran/ChangeLog | 9 +++++++++ gcc/fortran/trans-stmt.c | 5 +++-- gcc/testsuite/ChangeLog | 8 ++++++++ gcc/testsuite/gfortran.dg/forall_19.f90 | 32 ++++++++++++++++++++++++++++++++ 5 files changed, 53 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gfortran.dg/forall_19.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig updated (e7f46bfe0b -> 23f34add74)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig in repository toolchain/ci/binutils-gdb. from e7f46bfe0b Automatic date update in version.in adds 23f34add74 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig updated (e24c3698 -> bed2da17)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig in repository toolchain/ci/base-artifacts. discards e24c3698 0: update: binutils-gcc-linux-qemu: boot new bed2da17 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (e24c3698) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 420 +- 03-build_abe-binutils/console.log | 10616 +++++------ 04-build_abe-stage1/console.log | 13923 +++++++------- 05-build_linux/console.log | 670 +- 06-build_abe-qemu/console.log | 4577 +++-- 07-boot_linux/console.log | 400 +- 08-check_regression/console.log | 2 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 10 +- 09-update_baseline/results.regressions | 2 +- console.log | 30752 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- 13 files changed, 30749 insertions(+), 30765 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

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Tcwg-commits December 2020