Tcwg-commits December 2020

tcwg-commits@lists.linaro.org

4 participants
11568 discussions

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig updated (0af42d3dc73 -> e4df6a40dad)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig in repository toolchain/ci/llvm-project. from 0af42d3dc73 [PatternMatch][LVI] Handle select-form and/or in LVI adds 079923309c6 [llvm-cov] Use is_contained (NFC) adds 789d2506136 [CodeGen, Transforms] Use *Map::lookup (NFC) adds 8299fb8f256 [Transforms] Use llvm::append_range (NFC) adds 0ea3749b3cd [LV] Set up branch from middle block earlier. adds 0d05c1f40d6 [GVN] Add tests for select form of and/or (NFC) adds 0060f101345 [EarlyCSE] Add tests for select form of and/or (NFC) adds f1d648b973d [GVN] Use m_LogicalAnd/Or to propagate equality from branch [...] adds d3f1f7b6bca [EarlyCSE] Use m_LogicalAnd/Or matchers to handle branch co [...] adds eca40c36ef1 [ValueTracking] Add unit tests for isKnownNonZero, isImplie [...] adds 4ad41902e8c [GVN] Correctly set modified status when doing PRE on indices. adds 860199dfbe6 [ValueTracking] Use m_LogicalAnd/Or to look into conditions adds 9d70dbdc2bf [InstCombine] use poison as placeholder for undemanded elems adds d76c1d2247a [RS4GC] Lazily set changed flag when folding single entry phis adds 31c2b93d83f [MachineSink] add threshold in machinesink pass to reduce c [...] adds fde3ae88ee4 [asan][memprof] Declare _DYNAMIC and fix -Wparentheses adds 0b56e3cdda5 [sanitizer] Defined SANITIZER_TEST_HAS_PVALLOC only on glibc adds 99d650b3699 [compiler-rt][test] Make glibc-* feature detection work on [...] adds 60afb58bfee [msan] Delete unused glibc header <execinfo.h> adds d85a198e852 [RISCV] Pattern-match more vector-splatted constants adds a485a59d217 [benchmark] Fixed a build error when using CMake 3.15.1 + NDK-R20 adds 5b17263b6b9 [AMDGPU][MC][NFC] Parser refactoring adds 8c25bb3d0d5 [AMDGPU][MC] Improved errors handling for v_interp* operands adds e673d401994 [RISCV] Define vmsbf.m/vmsif.m/vmsof.m/viota.m/vid.v intrinsics. adds 644da789e36 [AMDGPU] Split edge to make si_if dominate end_cf adds 0999408aea7 [clangd] Add error handling (elog) in code completion. adds c3b9d85bd4b [clang-tidy][NFC] Remove unnecessary headers adds e73f885c988 [PowerPC] Remove redundant COPY_TO_REGCLASS introduced by 8 [...] adds 496fb70b141 [MachO] Fix enum-int mismatch warning adds d55627d221b [flang] Fix bugs in .mod file for abstract interface adds b9a7c89d432 [MIRPrinter] Fix incorrect output of unnamed stack names adds d4ccef38d0b [InstCombine] 'hoist xor-by-constant from xor-by-value': ig [...] adds 4820af99ddc [TableGen] Fix bug in !interleave operator adds 38bfa25387f Revert "[benchmark] Fixed a build error when using CMake 3. [...] adds c7ff2c0da1a [AMDGPU][MC][NFC] Split large asm tests into smaller chunks adds dcd21572f97 [ValueTracking] Fix isKnownNonEqual() with constexpr mul adds e4df6a40dad [LV] Vectorize (some) early and multiple exit loops No new revisions were added by this update. Summary of changes: clang-tools-extra/clang-tidy/ClangTidy.cpp | 4 - clang-tools-extra/clang-tidy/ClangTidyCheck.cpp | 2 - .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 6 +- clang-tools-extra/clang-tidy/ClangTidyModule.h | 2 - clang-tools-extra/clang-tidy/ClangTidyOptions.cpp | 1 - .../clang-tidy/ClangTidyProfiling.cpp | 2 - clang-tools-extra/clangd/CodeComplete.cpp | 12 +- .../SystemZ/builtins-systemz-zvector-constrained.c | 2 +- .../CodeGen/SystemZ/builtins-systemz-zvector.c | 18 +- .../builtins-systemz-zvector2-constrained.c | 4 +- .../CodeGen/SystemZ/builtins-systemz-zvector2.c | 4 +- compiler-rt/lib/asan/asan_linux.cpp | 3 +- compiler-rt/lib/memprof/memprof_linux.cpp | 4 +- compiler-rt/lib/memprof/memprof_mapping.h | 2 +- compiler-rt/lib/msan/msan_linux.cpp | 1 - .../sanitizer_common/tests/sanitizer_test_utils.h | 4 +- compiler-rt/test/lit.common.cfg.py | 12 +- flang/lib/Semantics/mod-file.cpp | 11 +- flang/lib/Semantics/resolve-names.cpp | 5 +- flang/test/Semantics/modfile10.f90 | 37 + flang/test/Semantics/procinterface01.f90 | 2 +- flang/test/Semantics/symbol15.f90 | 2 +- .../MachO/MachONormalizedFileFromAtoms.cpp | 2 +- llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h | 5 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 49 + .../llvm/Transforms/Utils/BasicBlockUtils.h | 2 +- llvm/lib/Analysis/ValueTracking.cpp | 57 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 3 +- llvm/lib/CodeGen/MIRParser/MIParser.cpp | 10 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineSink.cpp | 36 + llvm/lib/TableGen/Record.cpp | 37 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 194 +- llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 13 +- llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 8 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 23 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 288 +- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 4 +- llvm/lib/Transforms/IPO/LowerTypeTests.cpp | 2 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 2 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 10 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 7 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 23 +- .../Instrumentation/ControlHeightReduction.cpp | 2 +- .../Instrumentation/DataFlowSanitizer.cpp | 3 +- llvm/lib/Transforms/Scalar/EarlyCSE.cpp | 16 +- llvm/lib/Transforms/Scalar/GVN.cpp | 15 +- llvm/lib/Transforms/Scalar/GuardWidening.cpp | 3 +- llvm/lib/Transforms/Scalar/LoopSink.cpp | 3 +- llvm/lib/Transforms/Scalar/LoopUnswitch.cpp | 4 +- llvm/lib/Transforms/Scalar/PlaceSafepoints.cpp | 3 +- .../Transforms/Scalar/RewriteStatepointsForGC.cpp | 9 +- llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 6 +- llvm/lib/Transforms/Utils/BuildLibCalls.cpp | 4 +- llvm/lib/Transforms/Utils/Evaluator.cpp | 6 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 7 +- llvm/lib/Transforms/Utils/LoopVersioning.cpp | 4 +- llvm/lib/Transforms/Utils/SSAUpdater.cpp | 3 +- .../Vectorize/LoopVectorizationLegality.cpp | 25 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 84 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 12 +- llvm/lib/Transforms/Vectorize/VPlan.h | 4 +- .../test/Analysis/ValueTracking/known-non-equal.ll | 12 + .../AMDGPU/unstructured-cfg-def-use-issue.ll | 333 + llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll | 2 +- llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll | 23 + llvm/test/CodeGen/PowerPC/alloca-crspill.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll | 545 + llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll | 673 + llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll | 722 + llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll | 882 + llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 239 + llvm/test/MC/AMDGPU/gfx10_asm_all.s | 126143 ------------------ llvm/test/MC/AMDGPU/gfx10_asm_ds.s | 6987 + llvm/test/MC/AMDGPU/gfx10_asm_flat.s | 128 + llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s | 2289 + llvm/test/MC/AMDGPU/gfx10_asm_smem.s | 1194 + llvm/test/MC/AMDGPU/gfx10_asm_sop.s | 10072 ++ llvm/test/MC/AMDGPU/gfx10_asm_vop1.s | 16229 +++ llvm/test/MC/AMDGPU/gfx10_asm_vop2.s | 13092 ++ llvm/test/MC/AMDGPU/gfx10_asm_vop3.s | 13141 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopc.s | 11576 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s | 21692 +++ llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s | 13816 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s | 15975 +++ llvm/test/MC/AMDGPU/gfx10_err_pos.s | 51 +- llvm/test/MC/AMDGPU/gfx7_asm_all.s | 86860 ------------ llvm/test/MC/AMDGPU/gfx7_asm_ds.s | 3055 + llvm/test/MC/AMDGPU/gfx7_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx7_asm_flat.s | 691 + llvm/test/MC/AMDGPU/gfx7_asm_mimg.s | 6661 + llvm/test/MC/AMDGPU/gfx7_asm_mtbuf.s | 1369 + llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s | 5371 + llvm/test/MC/AMDGPU/gfx7_asm_smrd.s | 751 + llvm/test/MC/AMDGPU/gfx7_asm_sop1.s | 4096 + llvm/test/MC/AMDGPU/gfx7_asm_sop2.s | 6832 + llvm/test/MC/AMDGPU/gfx7_asm_sopc.s | 2266 + llvm/test/MC/AMDGPU/gfx7_asm_sopk.s | 850 + llvm/test/MC/AMDGPU/gfx7_asm_sopp.s | 145 + llvm/test/MC/AMDGPU/gfx7_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx7_asm_vop1.s | 4576 + llvm/test/MC/AMDGPU/gfx7_asm_vop2.s | 3796 + llvm/test/MC/AMDGPU/gfx7_asm_vop3.s | 41875 ++++++ llvm/test/MC/AMDGPU/gfx7_asm_vop3_e64.s | 10534 ++ llvm/test/MC/AMDGPU/gfx7_asm_vopc.s | 14113 ++ llvm/test/MC/AMDGPU/gfx8_asm_all.s | 119543 ----------------- llvm/test/MC/AMDGPU/gfx8_asm_ds.s | 3160 + llvm/test/MC/AMDGPU/gfx8_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx8_asm_flat.s | 601 + llvm/test/MC/AMDGPU/gfx8_asm_mimg.s | 6865 + llvm/test/MC/AMDGPU/gfx8_asm_mtbuf.s | 2689 + llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s | 5488 + llvm/test/MC/AMDGPU/gfx8_asm_smem.s | 1165 + llvm/test/MC/AMDGPU/gfx8_asm_sop1.s | 4153 + llvm/test/MC/AMDGPU/gfx8_asm_sop2.s | 6952 + llvm/test/MC/AMDGPU/gfx8_asm_sopc.s | 2545 + llvm/test/MC/AMDGPU/gfx8_asm_sopk.s | 850 + llvm/test/MC/AMDGPU/gfx8_asm_sopp.s | 163 + llvm/test/MC/AMDGPU/gfx8_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx8_asm_vop1.s | 13768 ++ llvm/test/MC/AMDGPU/gfx8_asm_vop2.s | 12568 ++ llvm/test/MC/AMDGPU/gfx8_asm_vop3.s | 43843 ++++++ llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s | 13501 ++ llvm/test/MC/AMDGPU/gfx8_asm_vopc.s | 22963 ++++ llvm/test/MC/AMDGPU/gfx9_asm_all.s | 119325 ----------------- llvm/test/MC/AMDGPU/gfx9_asm_ds.s | 3364 + llvm/test/MC/AMDGPU/gfx9_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx9_asm_flat.s | 4303 + llvm/test/MC/AMDGPU/gfx9_asm_mimg.s | 7108 + llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s | 2497 + llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s | 5638 + llvm/test/MC/AMDGPU/gfx9_asm_smem.s | 4477 + llvm/test/MC/AMDGPU/gfx9_asm_sop1.s | 3634 + llvm/test/MC/AMDGPU/gfx9_asm_sop2.s | 6880 + llvm/test/MC/AMDGPU/gfx9_asm_sopc.s | 2113 + llvm/test/MC/AMDGPU/gfx9_asm_sopk.s | 652 + llvm/test/MC/AMDGPU/gfx9_asm_sopp.s | 166 + llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx9_asm_vop1.s | 17017 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop2.s | 14962 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop3.s | 37702 ++++++ llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s | 16642 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s | 3484 + llvm/test/MC/AMDGPU/gfx9_asm_vopc.s | 29311 ++++ llvm/test/MC/AMDGPU/vintrp-err.s | 53 +- llvm/test/TableGen/interleave.td | 9 + llvm/test/Transforms/EarlyCSE/and_or.ll | 116 + llvm/test/Transforms/GVN/PRE/modified-status.ll | 60 + llvm/test/Transforms/GVN/PRE/pre-gep-load.ll | 13 +- llvm/test/Transforms/GVN/condprop.ll | 66 + llvm/test/Transforms/InstCombine/AArch64/tbl1.ll | 2 +- llvm/test/Transforms/InstCombine/ARM/tbl1.ll | 2 +- llvm/test/Transforms/InstCombine/X86/clmulqdq.ll | 18 +- .../InstCombine/X86/x86-addsub-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-addsub.ll | 4 +- .../InstCombine/X86/x86-avx512-inseltpoison.ll | 40 +- llvm/test/Transforms/InstCombine/X86/x86-avx512.ll | 40 +- .../Transforms/InstCombine/X86/x86-insertps.ll | 4 +- .../InstCombine/X86/x86-masked-memops.ll | 16 +- llvm/test/Transforms/InstCombine/X86/x86-muldq.ll | 4 +- .../InstCombine/X86/x86-pack-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-pack.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-pshufb.ll | 72 +- .../InstCombine/X86/x86-sse-inseltpoison.ll | 70 +- llvm/test/Transforms/InstCombine/X86/x86-sse.ll | 70 +- .../InstCombine/X86/x86-sse2-inseltpoison.ll | 66 +- llvm/test/Transforms/InstCombine/X86/x86-sse2.ll | 66 +- .../InstCombine/X86/x86-sse41-inseltpoison.ll | 18 +- llvm/test/Transforms/InstCombine/X86/x86-sse41.ll | 18 +- llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll | 18 +- .../X86/x86-vec_demanded_elts-inseltpoison.ll | 22 +- .../InstCombine/X86/x86-vec_demanded_elts.ll | 43 +- .../X86/x86-vector-shifts-inseltpoison.ll | 20 +- .../InstCombine/X86/x86-vector-shifts.ll | 20 +- .../test/Transforms/InstCombine/X86/x86-vpermil.ll | 2 +- .../InstCombine/X86/x86-xop-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-xop.ll | 4 +- .../Transforms/InstCombine/bitcast-bigendian.ll | 6 +- .../Transforms/InstCombine/bitcast-inseltpoison.ll | 6 +- .../InstCombine/bitcast-vec-canon-inseltpoison.ll | 2 +- .../Transforms/InstCombine/bitcast-vec-canon.ll | 4 +- llvm/test/Transforms/InstCombine/bitcast.ll | 6 +- .../InstCombine/broadcast-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/broadcast.ll | 4 +- llvm/test/Transforms/InstCombine/cast.ll | 8 +- llvm/test/Transforms/InstCombine/getelementptr.ll | 4 +- .../hoist-xor-by-constant-from-xor-by-value.ll | 14 + .../Transforms/InstCombine/insert-const-shuf.ll | 18 +- .../insert-extract-shuffle-inseltpoison.ll | 14 +- .../InstCombine/insert-extract-shuffle.ll | 14 +- .../InstCombine/masked_intrinsics-inseltpoison.ll | 8 +- .../Transforms/InstCombine/masked_intrinsics.ll | 8 +- llvm/test/Transforms/InstCombine/minmax-fold.ll | 2 +- llvm/test/Transforms/InstCombine/pr2645-0.ll | 3 +- llvm/test/Transforms/InstCombine/shuffle_select.ll | 22 +- .../shufflevector-div-rem-inseltpoison.ll | 2 +- .../InstCombine/shufflevector-div-rem.ll | 2 +- .../Transforms/InstCombine/sub-of-negatible.ll | 2 +- llvm/test/Transforms/InstCombine/trunc.ll | 2 +- .../InstCombine/vec_demanded_elts-inseltpoison.ll | 44 +- .../Transforms/InstCombine/vec_demanded_elts.ll | 44 +- .../InstCombine/vec_shuffle-inseltpoison.ll | 55 +- llvm/test/Transforms/InstCombine/vec_shuffle.ll | 52 +- .../InstCombine/vector-casts-inseltpoison.ll | 2 +- llvm/test/Transforms/InstCombine/vector-casts.ll | 2 +- .../vector_insertelt_shuffle-inseltpoison.ll | 4 +- .../InstCombine/vector_insertelt_shuffle.ll | 22 +- .../SystemZ/predicated-first-order-recurrence.ll | 6 +- .../LoopVectorize/X86/invariant-load-gather.ll | 4 +- llvm/test/Transforms/LoopVectorize/control-flow.ll | 2 +- .../LoopVectorize/first-order-recurrence.ll | 6 +- llvm/test/Transforms/LoopVectorize/induction.ll | 2 +- llvm/test/Transforms/LoopVectorize/loop-form.ll | 455 +- .../LoopVectorize/loop-legality-checks.ll | 23 +- .../LoopVectorize/reduction-inloop-pred.ll | 2 +- .../Transforms/LoopVectorize/reduction-inloop.ll | 2 +- .../LoopVectorize/skeleton-lcssa-crash.ll | 137 + .../PhaseOrdering/X86/horiz-math-inseltpoison.ll | 2 +- .../Transforms/PhaseOrdering/X86/horiz-math.ll | 2 +- .../SLPVectorizer/AArch64/getelementptr.ll | 6 +- .../X86/alternate-cast-inseltpoison.ll | 4 +- .../Transforms/SLPVectorizer/X86/alternate-cast.ll | 4 +- .../X86/alternate-int-inseltpoison.ll | 2 +- .../X86/blending-shuffle-inseltpoison.ll | 2 +- llvm/tools/llvm-size/llvm-size.cpp | 4 +- llvm/unittests/Analysis/ValueTrackingTest.cpp | 129 + 231 files changed, 541889 insertions(+), 452840 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll create mode 100644 llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll delete mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_smem.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_sop.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s delete mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_exp.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_mimg.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_mtbuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_smrd.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sopk.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sopp.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vintrp.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vop3_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vopc.s delete mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_exp.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_mimg.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_mtbuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_smem.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sopk.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sopp.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vintrp.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vopc.s delete mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_exp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mimg.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_smem.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopk.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vopc.s create mode 100644 llvm/test/Transforms/GVN/PRE/modified-status.ll create mode 100644 llvm/test/Transforms/LoopVectorize/skeleton-lcssa-crash.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig updated (925285018 -> 22c5a332f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig in repository toolchain/ci/base-artifacts. discards 925285018 0: update: llvm-linux-qemu: boot new 22c5a332f 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (925285018) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 226 +- 02-prepare_abe/console.log | 442 +- 03-build_llvm/console.log | 13746 ++++++++++++----------- 04-build_linux/console.log | 800 +- 05-build_abe-qemu/console.log | 6776 ++++++------ 06-boot_linux/console.log | 492 +- 07-check_regression/console.log | 14 +- 08-update_baseline/console.log | 18 +- console.log | 22514 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 10 files changed, 22514 insertions(+), 22522 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allnoconfig updated (0af42d3dc73 -> e4df6a40dad)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allnoconfig in repository toolchain/ci/llvm-project. from 0af42d3dc73 [PatternMatch][LVI] Handle select-form and/or in LVI adds 079923309c6 [llvm-cov] Use is_contained (NFC) adds 789d2506136 [CodeGen, Transforms] Use *Map::lookup (NFC) adds 8299fb8f256 [Transforms] Use llvm::append_range (NFC) adds 0ea3749b3cd [LV] Set up branch from middle block earlier. adds 0d05c1f40d6 [GVN] Add tests for select form of and/or (NFC) adds 0060f101345 [EarlyCSE] Add tests for select form of and/or (NFC) adds f1d648b973d [GVN] Use m_LogicalAnd/Or to propagate equality from branch [...] adds d3f1f7b6bca [EarlyCSE] Use m_LogicalAnd/Or matchers to handle branch co [...] adds eca40c36ef1 [ValueTracking] Add unit tests for isKnownNonZero, isImplie [...] adds 4ad41902e8c [GVN] Correctly set modified status when doing PRE on indices. adds 860199dfbe6 [ValueTracking] Use m_LogicalAnd/Or to look into conditions adds 9d70dbdc2bf [InstCombine] use poison as placeholder for undemanded elems adds d76c1d2247a [RS4GC] Lazily set changed flag when folding single entry phis adds 31c2b93d83f [MachineSink] add threshold in machinesink pass to reduce c [...] adds fde3ae88ee4 [asan][memprof] Declare _DYNAMIC and fix -Wparentheses adds 0b56e3cdda5 [sanitizer] Defined SANITIZER_TEST_HAS_PVALLOC only on glibc adds 99d650b3699 [compiler-rt][test] Make glibc-* feature detection work on [...] adds 60afb58bfee [msan] Delete unused glibc header <execinfo.h> adds d85a198e852 [RISCV] Pattern-match more vector-splatted constants adds a485a59d217 [benchmark] Fixed a build error when using CMake 3.15.1 + NDK-R20 adds 5b17263b6b9 [AMDGPU][MC][NFC] Parser refactoring adds 8c25bb3d0d5 [AMDGPU][MC] Improved errors handling for v_interp* operands adds e673d401994 [RISCV] Define vmsbf.m/vmsif.m/vmsof.m/viota.m/vid.v intrinsics. adds 644da789e36 [AMDGPU] Split edge to make si_if dominate end_cf adds 0999408aea7 [clangd] Add error handling (elog) in code completion. adds c3b9d85bd4b [clang-tidy][NFC] Remove unnecessary headers adds e73f885c988 [PowerPC] Remove redundant COPY_TO_REGCLASS introduced by 8 [...] adds 496fb70b141 [MachO] Fix enum-int mismatch warning adds d55627d221b [flang] Fix bugs in .mod file for abstract interface adds b9a7c89d432 [MIRPrinter] Fix incorrect output of unnamed stack names adds d4ccef38d0b [InstCombine] 'hoist xor-by-constant from xor-by-value': ig [...] adds 4820af99ddc [TableGen] Fix bug in !interleave operator adds 38bfa25387f Revert "[benchmark] Fixed a build error when using CMake 3. [...] adds c7ff2c0da1a [AMDGPU][MC][NFC] Split large asm tests into smaller chunks new dcd21572f97 [ValueTracking] Fix isKnownNonEqual() with constexpr mul new e4df6a40dad [LV] Vectorize (some) early and multiple exit loops The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clang-tidy/ClangTidy.cpp | 4 - clang-tools-extra/clang-tidy/ClangTidyCheck.cpp | 2 - .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 6 +- clang-tools-extra/clang-tidy/ClangTidyModule.h | 2 - clang-tools-extra/clang-tidy/ClangTidyOptions.cpp | 1 - .../clang-tidy/ClangTidyProfiling.cpp | 2 - clang-tools-extra/clangd/CodeComplete.cpp | 12 +- .../SystemZ/builtins-systemz-zvector-constrained.c | 2 +- .../CodeGen/SystemZ/builtins-systemz-zvector.c | 18 +- .../builtins-systemz-zvector2-constrained.c | 4 +- .../CodeGen/SystemZ/builtins-systemz-zvector2.c | 4 +- compiler-rt/lib/asan/asan_linux.cpp | 3 +- compiler-rt/lib/memprof/memprof_linux.cpp | 4 +- compiler-rt/lib/memprof/memprof_mapping.h | 2 +- compiler-rt/lib/msan/msan_linux.cpp | 1 - .../sanitizer_common/tests/sanitizer_test_utils.h | 4 +- compiler-rt/test/lit.common.cfg.py | 12 +- flang/lib/Semantics/mod-file.cpp | 11 +- flang/lib/Semantics/resolve-names.cpp | 5 +- flang/test/Semantics/modfile10.f90 | 37 + flang/test/Semantics/procinterface01.f90 | 2 +- flang/test/Semantics/symbol15.f90 | 2 +- .../MachO/MachONormalizedFileFromAtoms.cpp | 2 +- llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h | 5 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 49 + .../llvm/Transforms/Utils/BasicBlockUtils.h | 2 +- llvm/lib/Analysis/ValueTracking.cpp | 57 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 3 +- llvm/lib/CodeGen/MIRParser/MIParser.cpp | 10 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineSink.cpp | 36 + llvm/lib/TableGen/Record.cpp | 37 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 194 +- llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 13 +- llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 8 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 23 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 288 +- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 4 +- llvm/lib/Transforms/IPO/LowerTypeTests.cpp | 2 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 2 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 10 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 7 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 23 +- .../Instrumentation/ControlHeightReduction.cpp | 2 +- .../Instrumentation/DataFlowSanitizer.cpp | 3 +- llvm/lib/Transforms/Scalar/EarlyCSE.cpp | 16 +- llvm/lib/Transforms/Scalar/GVN.cpp | 15 +- llvm/lib/Transforms/Scalar/GuardWidening.cpp | 3 +- llvm/lib/Transforms/Scalar/LoopSink.cpp | 3 +- llvm/lib/Transforms/Scalar/LoopUnswitch.cpp | 4 +- llvm/lib/Transforms/Scalar/PlaceSafepoints.cpp | 3 +- .../Transforms/Scalar/RewriteStatepointsForGC.cpp | 9 +- llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 6 +- llvm/lib/Transforms/Utils/BuildLibCalls.cpp | 4 +- llvm/lib/Transforms/Utils/Evaluator.cpp | 6 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 7 +- llvm/lib/Transforms/Utils/LoopVersioning.cpp | 4 +- llvm/lib/Transforms/Utils/SSAUpdater.cpp | 3 +- .../Vectorize/LoopVectorizationLegality.cpp | 25 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 84 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 12 +- llvm/lib/Transforms/Vectorize/VPlan.h | 4 +- .../test/Analysis/ValueTracking/known-non-equal.ll | 12 + .../AMDGPU/unstructured-cfg-def-use-issue.ll | 333 + llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll | 2 +- llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll | 23 + llvm/test/CodeGen/PowerPC/alloca-crspill.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll | 545 + llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll | 673 + llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll | 722 + llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll | 882 + llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 239 + llvm/test/MC/AMDGPU/gfx10_asm_all.s | 126143 ------------------ llvm/test/MC/AMDGPU/gfx10_asm_ds.s | 6987 + llvm/test/MC/AMDGPU/gfx10_asm_flat.s | 128 + llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s | 2289 + llvm/test/MC/AMDGPU/gfx10_asm_smem.s | 1194 + llvm/test/MC/AMDGPU/gfx10_asm_sop.s | 10072 ++ llvm/test/MC/AMDGPU/gfx10_asm_vop1.s | 16229 +++ llvm/test/MC/AMDGPU/gfx10_asm_vop2.s | 13092 ++ llvm/test/MC/AMDGPU/gfx10_asm_vop3.s | 13141 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopc.s | 11576 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s | 21692 +++ llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s | 13816 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s | 15975 +++ llvm/test/MC/AMDGPU/gfx10_err_pos.s | 51 +- llvm/test/MC/AMDGPU/gfx7_asm_all.s | 86860 ------------ llvm/test/MC/AMDGPU/gfx7_asm_ds.s | 3055 + llvm/test/MC/AMDGPU/gfx7_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx7_asm_flat.s | 691 + llvm/test/MC/AMDGPU/gfx7_asm_mimg.s | 6661 + llvm/test/MC/AMDGPU/gfx7_asm_mtbuf.s | 1369 + llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s | 5371 + llvm/test/MC/AMDGPU/gfx7_asm_smrd.s | 751 + llvm/test/MC/AMDGPU/gfx7_asm_sop1.s | 4096 + llvm/test/MC/AMDGPU/gfx7_asm_sop2.s | 6832 + llvm/test/MC/AMDGPU/gfx7_asm_sopc.s | 2266 + llvm/test/MC/AMDGPU/gfx7_asm_sopk.s | 850 + llvm/test/MC/AMDGPU/gfx7_asm_sopp.s | 145 + llvm/test/MC/AMDGPU/gfx7_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx7_asm_vop1.s | 4576 + llvm/test/MC/AMDGPU/gfx7_asm_vop2.s | 3796 + llvm/test/MC/AMDGPU/gfx7_asm_vop3.s | 41875 ++++++ llvm/test/MC/AMDGPU/gfx7_asm_vop3_e64.s | 10534 ++ llvm/test/MC/AMDGPU/gfx7_asm_vopc.s | 14113 ++ llvm/test/MC/AMDGPU/gfx8_asm_all.s | 119543 ----------------- llvm/test/MC/AMDGPU/gfx8_asm_ds.s | 3160 + llvm/test/MC/AMDGPU/gfx8_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx8_asm_flat.s | 601 + llvm/test/MC/AMDGPU/gfx8_asm_mimg.s | 6865 + llvm/test/MC/AMDGPU/gfx8_asm_mtbuf.s | 2689 + llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s | 5488 + llvm/test/MC/AMDGPU/gfx8_asm_smem.s | 1165 + llvm/test/MC/AMDGPU/gfx8_asm_sop1.s | 4153 + llvm/test/MC/AMDGPU/gfx8_asm_sop2.s | 6952 + llvm/test/MC/AMDGPU/gfx8_asm_sopc.s | 2545 + llvm/test/MC/AMDGPU/gfx8_asm_sopk.s | 850 + llvm/test/MC/AMDGPU/gfx8_asm_sopp.s | 163 + llvm/test/MC/AMDGPU/gfx8_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx8_asm_vop1.s | 13768 ++ llvm/test/MC/AMDGPU/gfx8_asm_vop2.s | 12568 ++ llvm/test/MC/AMDGPU/gfx8_asm_vop3.s | 43843 ++++++ llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s | 13501 ++ llvm/test/MC/AMDGPU/gfx8_asm_vopc.s | 22963 ++++ llvm/test/MC/AMDGPU/gfx9_asm_all.s | 119325 ----------------- llvm/test/MC/AMDGPU/gfx9_asm_ds.s | 3364 + llvm/test/MC/AMDGPU/gfx9_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx9_asm_flat.s | 4303 + llvm/test/MC/AMDGPU/gfx9_asm_mimg.s | 7108 + llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s | 2497 + llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s | 5638 + llvm/test/MC/AMDGPU/gfx9_asm_smem.s | 4477 + llvm/test/MC/AMDGPU/gfx9_asm_sop1.s | 3634 + llvm/test/MC/AMDGPU/gfx9_asm_sop2.s | 6880 + llvm/test/MC/AMDGPU/gfx9_asm_sopc.s | 2113 + llvm/test/MC/AMDGPU/gfx9_asm_sopk.s | 652 + llvm/test/MC/AMDGPU/gfx9_asm_sopp.s | 166 + llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx9_asm_vop1.s | 17017 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop2.s | 14962 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop3.s | 37702 ++++++ llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s | 16642 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s | 3484 + llvm/test/MC/AMDGPU/gfx9_asm_vopc.s | 29311 ++++ llvm/test/MC/AMDGPU/vintrp-err.s | 53 +- llvm/test/TableGen/interleave.td | 9 + llvm/test/Transforms/EarlyCSE/and_or.ll | 116 + llvm/test/Transforms/GVN/PRE/modified-status.ll | 60 + llvm/test/Transforms/GVN/PRE/pre-gep-load.ll | 13 +- llvm/test/Transforms/GVN/condprop.ll | 66 + llvm/test/Transforms/InstCombine/AArch64/tbl1.ll | 2 +- llvm/test/Transforms/InstCombine/ARM/tbl1.ll | 2 +- llvm/test/Transforms/InstCombine/X86/clmulqdq.ll | 18 +- .../InstCombine/X86/x86-addsub-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-addsub.ll | 4 +- .../InstCombine/X86/x86-avx512-inseltpoison.ll | 40 +- llvm/test/Transforms/InstCombine/X86/x86-avx512.ll | 40 +- .../Transforms/InstCombine/X86/x86-insertps.ll | 4 +- .../InstCombine/X86/x86-masked-memops.ll | 16 +- llvm/test/Transforms/InstCombine/X86/x86-muldq.ll | 4 +- .../InstCombine/X86/x86-pack-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-pack.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-pshufb.ll | 72 +- .../InstCombine/X86/x86-sse-inseltpoison.ll | 70 +- llvm/test/Transforms/InstCombine/X86/x86-sse.ll | 70 +- .../InstCombine/X86/x86-sse2-inseltpoison.ll | 66 +- llvm/test/Transforms/InstCombine/X86/x86-sse2.ll | 66 +- .../InstCombine/X86/x86-sse41-inseltpoison.ll | 18 +- llvm/test/Transforms/InstCombine/X86/x86-sse41.ll | 18 +- llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll | 18 +- .../X86/x86-vec_demanded_elts-inseltpoison.ll | 22 +- .../InstCombine/X86/x86-vec_demanded_elts.ll | 43 +- .../X86/x86-vector-shifts-inseltpoison.ll | 20 +- .../InstCombine/X86/x86-vector-shifts.ll | 20 +- .../test/Transforms/InstCombine/X86/x86-vpermil.ll | 2 +- .../InstCombine/X86/x86-xop-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-xop.ll | 4 +- .../Transforms/InstCombine/bitcast-bigendian.ll | 6 +- .../Transforms/InstCombine/bitcast-inseltpoison.ll | 6 +- .../InstCombine/bitcast-vec-canon-inseltpoison.ll | 2 +- .../Transforms/InstCombine/bitcast-vec-canon.ll | 4 +- llvm/test/Transforms/InstCombine/bitcast.ll | 6 +- .../InstCombine/broadcast-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/broadcast.ll | 4 +- llvm/test/Transforms/InstCombine/cast.ll | 8 +- llvm/test/Transforms/InstCombine/getelementptr.ll | 4 +- .../hoist-xor-by-constant-from-xor-by-value.ll | 14 + .../Transforms/InstCombine/insert-const-shuf.ll | 18 +- .../insert-extract-shuffle-inseltpoison.ll | 14 +- .../InstCombine/insert-extract-shuffle.ll | 14 +- .../InstCombine/masked_intrinsics-inseltpoison.ll | 8 +- .../Transforms/InstCombine/masked_intrinsics.ll | 8 +- llvm/test/Transforms/InstCombine/minmax-fold.ll | 2 +- llvm/test/Transforms/InstCombine/pr2645-0.ll | 3 +- llvm/test/Transforms/InstCombine/shuffle_select.ll | 22 +- .../shufflevector-div-rem-inseltpoison.ll | 2 +- .../InstCombine/shufflevector-div-rem.ll | 2 +- .../Transforms/InstCombine/sub-of-negatible.ll | 2 +- llvm/test/Transforms/InstCombine/trunc.ll | 2 +- .../InstCombine/vec_demanded_elts-inseltpoison.ll | 44 +- .../Transforms/InstCombine/vec_demanded_elts.ll | 44 +- .../InstCombine/vec_shuffle-inseltpoison.ll | 55 +- llvm/test/Transforms/InstCombine/vec_shuffle.ll | 52 +- .../InstCombine/vector-casts-inseltpoison.ll | 2 +- llvm/test/Transforms/InstCombine/vector-casts.ll | 2 +- .../vector_insertelt_shuffle-inseltpoison.ll | 4 +- .../InstCombine/vector_insertelt_shuffle.ll | 22 +- .../SystemZ/predicated-first-order-recurrence.ll | 6 +- .../LoopVectorize/X86/invariant-load-gather.ll | 4 +- llvm/test/Transforms/LoopVectorize/control-flow.ll | 2 +- .../LoopVectorize/first-order-recurrence.ll | 6 +- llvm/test/Transforms/LoopVectorize/induction.ll | 2 +- llvm/test/Transforms/LoopVectorize/loop-form.ll | 455 +- .../LoopVectorize/loop-legality-checks.ll | 23 +- .../LoopVectorize/reduction-inloop-pred.ll | 2 +- .../Transforms/LoopVectorize/reduction-inloop.ll | 2 +- .../LoopVectorize/skeleton-lcssa-crash.ll | 137 + .../PhaseOrdering/X86/horiz-math-inseltpoison.ll | 2 +- .../Transforms/PhaseOrdering/X86/horiz-math.ll | 2 +- .../SLPVectorizer/AArch64/getelementptr.ll | 6 +- .../X86/alternate-cast-inseltpoison.ll | 4 +- .../Transforms/SLPVectorizer/X86/alternate-cast.ll | 4 +- .../X86/alternate-int-inseltpoison.ll | 2 +- .../X86/blending-shuffle-inseltpoison.ll | 2 +- llvm/tools/llvm-size/llvm-size.cpp | 4 +- llvm/unittests/Analysis/ValueTrackingTest.cpp | 129 + 231 files changed, 541889 insertions(+), 452840 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll create mode 100644 llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll delete mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_smem.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_sop.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s delete mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_exp.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_mimg.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_mtbuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_smrd.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sopk.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sopp.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vintrp.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vop3_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vopc.s delete mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_exp.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_mimg.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_mtbuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_smem.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sopk.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sopp.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vintrp.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vopc.s delete mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_exp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mimg.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_smem.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopk.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vopc.s create mode 100644 llvm/test/Transforms/GVN/PRE/modified-status.ll create mode 100644 llvm/test/Transforms/LoopVectorize/skeleton-lcssa-crash.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allnoconfig updated (e486b7374 -> d9d74c885)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allnoconfig in repository toolchain/ci/base-artifacts. discards e486b7374 0: update: llvm-linux-qemu: boot new d9d74c885 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (e486b7374) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 254 +- 03-build_llvm/console.log | 13746 ++++++++++++------------ 04-build_linux/console.log | 638 +- 05-build_abe-qemu/console.log | 6568 ++++++------ 06-boot_linux/console.log | 4 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 21342 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 10 files changed, 21344 insertions(+), 21348 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (0af42d3dc73 -> b9a7c89d432)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig in repository toolchain/ci/llvm-project. from 0af42d3dc73 [PatternMatch][LVI] Handle select-form and/or in LVI adds 079923309c6 [llvm-cov] Use is_contained (NFC) adds 789d2506136 [CodeGen, Transforms] Use *Map::lookup (NFC) adds 8299fb8f256 [Transforms] Use llvm::append_range (NFC) adds 0ea3749b3cd [LV] Set up branch from middle block earlier. adds 0d05c1f40d6 [GVN] Add tests for select form of and/or (NFC) adds 0060f101345 [EarlyCSE] Add tests for select form of and/or (NFC) adds f1d648b973d [GVN] Use m_LogicalAnd/Or to propagate equality from branch [...] adds d3f1f7b6bca [EarlyCSE] Use m_LogicalAnd/Or matchers to handle branch co [...] adds eca40c36ef1 [ValueTracking] Add unit tests for isKnownNonZero, isImplie [...] adds 4ad41902e8c [GVN] Correctly set modified status when doing PRE on indices. adds 860199dfbe6 [ValueTracking] Use m_LogicalAnd/Or to look into conditions adds 9d70dbdc2bf [InstCombine] use poison as placeholder for undemanded elems adds d76c1d2247a [RS4GC] Lazily set changed flag when folding single entry phis adds 31c2b93d83f [MachineSink] add threshold in machinesink pass to reduce c [...] adds fde3ae88ee4 [asan][memprof] Declare _DYNAMIC and fix -Wparentheses adds 0b56e3cdda5 [sanitizer] Defined SANITIZER_TEST_HAS_PVALLOC only on glibc adds 99d650b3699 [compiler-rt][test] Make glibc-* feature detection work on [...] adds 60afb58bfee [msan] Delete unused glibc header <execinfo.h> adds d85a198e852 [RISCV] Pattern-match more vector-splatted constants adds a485a59d217 [benchmark] Fixed a build error when using CMake 3.15.1 + NDK-R20 adds 5b17263b6b9 [AMDGPU][MC][NFC] Parser refactoring adds 8c25bb3d0d5 [AMDGPU][MC] Improved errors handling for v_interp* operands adds e673d401994 [RISCV] Define vmsbf.m/vmsif.m/vmsof.m/viota.m/vid.v intrinsics. adds 644da789e36 [AMDGPU] Split edge to make si_if dominate end_cf adds 0999408aea7 [clangd] Add error handling (elog) in code completion. adds c3b9d85bd4b [clang-tidy][NFC] Remove unnecessary headers adds e73f885c988 [PowerPC] Remove redundant COPY_TO_REGCLASS introduced by 8 [...] adds 496fb70b141 [MachO] Fix enum-int mismatch warning adds d55627d221b [flang] Fix bugs in .mod file for abstract interface adds b9a7c89d432 [MIRPrinter] Fix incorrect output of unnamed stack names No new revisions were added by this update. Summary of changes: clang-tools-extra/clang-tidy/ClangTidy.cpp | 4 - clang-tools-extra/clang-tidy/ClangTidyCheck.cpp | 2 - .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 6 +- clang-tools-extra/clang-tidy/ClangTidyModule.h | 2 - clang-tools-extra/clang-tidy/ClangTidyOptions.cpp | 1 - .../clang-tidy/ClangTidyProfiling.cpp | 2 - clang-tools-extra/clangd/CodeComplete.cpp | 12 +- .../SystemZ/builtins-systemz-zvector-constrained.c | 2 +- .../CodeGen/SystemZ/builtins-systemz-zvector.c | 18 +- .../builtins-systemz-zvector2-constrained.c | 4 +- .../CodeGen/SystemZ/builtins-systemz-zvector2.c | 4 +- compiler-rt/lib/asan/asan_linux.cpp | 3 +- compiler-rt/lib/memprof/memprof_linux.cpp | 4 +- compiler-rt/lib/memprof/memprof_mapping.h | 2 +- compiler-rt/lib/msan/msan_linux.cpp | 1 - .../sanitizer_common/tests/sanitizer_test_utils.h | 4 +- compiler-rt/test/lit.common.cfg.py | 12 +- flang/lib/Semantics/mod-file.cpp | 11 +- flang/lib/Semantics/resolve-names.cpp | 5 +- flang/test/Semantics/modfile10.f90 | 37 + flang/test/Semantics/procinterface01.f90 | 2 +- flang/test/Semantics/symbol15.f90 | 2 +- .../MachO/MachONormalizedFileFromAtoms.cpp | 2 +- llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h | 5 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 49 ++ .../llvm/Transforms/Utils/BasicBlockUtils.h | 2 +- llvm/lib/Analysis/ValueTracking.cpp | 46 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 3 +- llvm/lib/CodeGen/MIRParser/MIParser.cpp | 10 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineSink.cpp | 36 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 194 +++-- llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 13 +- llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 8 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 23 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 288 ++++++- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 4 +- llvm/lib/Transforms/IPO/LowerTypeTests.cpp | 2 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 2 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 7 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 23 +- .../Instrumentation/ControlHeightReduction.cpp | 2 +- .../Instrumentation/DataFlowSanitizer.cpp | 3 +- llvm/lib/Transforms/Scalar/EarlyCSE.cpp | 16 +- llvm/lib/Transforms/Scalar/GVN.cpp | 15 +- llvm/lib/Transforms/Scalar/GuardWidening.cpp | 3 +- llvm/lib/Transforms/Scalar/LoopSink.cpp | 3 +- llvm/lib/Transforms/Scalar/LoopUnswitch.cpp | 4 +- llvm/lib/Transforms/Scalar/PlaceSafepoints.cpp | 3 +- .../Transforms/Scalar/RewriteStatepointsForGC.cpp | 9 +- llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 6 +- llvm/lib/Transforms/Utils/BuildLibCalls.cpp | 4 +- llvm/lib/Transforms/Utils/Evaluator.cpp | 6 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 7 +- llvm/lib/Transforms/Utils/LoopVersioning.cpp | 4 +- llvm/lib/Transforms/Utils/SSAUpdater.cpp | 3 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 25 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 12 +- llvm/lib/Transforms/Vectorize/VPlan.h | 4 +- .../AMDGPU/unstructured-cfg-def-use-issue.ll | 333 ++++++++ llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll | 2 +- llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll | 23 + llvm/test/CodeGen/PowerPC/alloca-crspill.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll | 545 +++++++++++++ llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll | 673 ++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll | 722 +++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll | 882 +++++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 239 ++++++ llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 239 ++++++ llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll | 239 ++++++ llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 239 ++++++ llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll | 239 ++++++ llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 239 ++++++ llvm/test/MC/AMDGPU/gfx10_err_pos.s | 51 +- llvm/test/MC/AMDGPU/vintrp-err.s | 53 +- llvm/test/Transforms/EarlyCSE/and_or.ll | 116 +++ llvm/test/Transforms/GVN/PRE/modified-status.ll | 60 ++ llvm/test/Transforms/GVN/PRE/pre-gep-load.ll | 13 +- llvm/test/Transforms/GVN/condprop.ll | 66 ++ llvm/test/Transforms/InstCombine/AArch64/tbl1.ll | 2 +- llvm/test/Transforms/InstCombine/ARM/tbl1.ll | 2 +- llvm/test/Transforms/InstCombine/X86/clmulqdq.ll | 18 +- .../InstCombine/X86/x86-addsub-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-addsub.ll | 4 +- .../InstCombine/X86/x86-avx512-inseltpoison.ll | 40 +- llvm/test/Transforms/InstCombine/X86/x86-avx512.ll | 40 +- .../Transforms/InstCombine/X86/x86-insertps.ll | 4 +- .../InstCombine/X86/x86-masked-memops.ll | 16 +- llvm/test/Transforms/InstCombine/X86/x86-muldq.ll | 4 +- .../InstCombine/X86/x86-pack-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-pack.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-pshufb.ll | 72 +- .../InstCombine/X86/x86-sse-inseltpoison.ll | 70 +- llvm/test/Transforms/InstCombine/X86/x86-sse.ll | 70 +- .../InstCombine/X86/x86-sse2-inseltpoison.ll | 66 +- llvm/test/Transforms/InstCombine/X86/x86-sse2.ll | 66 +- .../InstCombine/X86/x86-sse41-inseltpoison.ll | 18 +- llvm/test/Transforms/InstCombine/X86/x86-sse41.ll | 18 +- llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll | 18 +- .../X86/x86-vec_demanded_elts-inseltpoison.ll | 22 +- .../InstCombine/X86/x86-vec_demanded_elts.ll | 43 +- .../X86/x86-vector-shifts-inseltpoison.ll | 20 +- .../InstCombine/X86/x86-vector-shifts.ll | 20 +- .../test/Transforms/InstCombine/X86/x86-vpermil.ll | 2 +- .../InstCombine/X86/x86-xop-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-xop.ll | 4 +- .../Transforms/InstCombine/bitcast-bigendian.ll | 6 +- .../Transforms/InstCombine/bitcast-inseltpoison.ll | 6 +- .../InstCombine/bitcast-vec-canon-inseltpoison.ll | 2 +- .../Transforms/InstCombine/bitcast-vec-canon.ll | 4 +- llvm/test/Transforms/InstCombine/bitcast.ll | 6 +- .../InstCombine/broadcast-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/broadcast.ll | 4 +- llvm/test/Transforms/InstCombine/cast.ll | 8 +- llvm/test/Transforms/InstCombine/getelementptr.ll | 4 +- .../Transforms/InstCombine/insert-const-shuf.ll | 18 +- .../insert-extract-shuffle-inseltpoison.ll | 14 +- .../InstCombine/insert-extract-shuffle.ll | 14 +- .../InstCombine/masked_intrinsics-inseltpoison.ll | 8 +- .../Transforms/InstCombine/masked_intrinsics.ll | 8 +- llvm/test/Transforms/InstCombine/minmax-fold.ll | 2 +- llvm/test/Transforms/InstCombine/pr2645-0.ll | 3 +- llvm/test/Transforms/InstCombine/shuffle_select.ll | 22 +- .../shufflevector-div-rem-inseltpoison.ll | 2 +- .../InstCombine/shufflevector-div-rem.ll | 2 +- .../Transforms/InstCombine/sub-of-negatible.ll | 2 +- llvm/test/Transforms/InstCombine/trunc.ll | 2 +- .../InstCombine/vec_demanded_elts-inseltpoison.ll | 44 +- .../Transforms/InstCombine/vec_demanded_elts.ll | 44 +- .../InstCombine/vec_shuffle-inseltpoison.ll | 55 +- llvm/test/Transforms/InstCombine/vec_shuffle.ll | 52 +- .../InstCombine/vector-casts-inseltpoison.ll | 2 +- llvm/test/Transforms/InstCombine/vector-casts.ll | 2 +- .../vector_insertelt_shuffle-inseltpoison.ll | 4 +- .../InstCombine/vector_insertelt_shuffle.ll | 22 +- .../SystemZ/predicated-first-order-recurrence.ll | 6 +- .../LoopVectorize/X86/invariant-load-gather.ll | 4 +- .../LoopVectorize/first-order-recurrence.ll | 6 +- llvm/test/Transforms/LoopVectorize/induction.ll | 2 +- .../LoopVectorize/reduction-inloop-pred.ll | 2 +- .../Transforms/LoopVectorize/reduction-inloop.ll | 2 +- .../LoopVectorize/skeleton-lcssa-crash.ll | 137 ++++ .../PhaseOrdering/X86/horiz-math-inseltpoison.ll | 2 +- .../Transforms/PhaseOrdering/X86/horiz-math.ll | 2 +- .../SLPVectorizer/AArch64/getelementptr.ll | 6 +- .../X86/alternate-cast-inseltpoison.ll | 4 +- .../Transforms/SLPVectorizer/X86/alternate-cast.ll | 4 +- .../X86/alternate-int-inseltpoison.ll | 2 +- .../X86/blending-shuffle-inseltpoison.ll | 2 +- llvm/tools/llvm-size/llvm-size.cpp | 4 +- llvm/unittests/Analysis/ValueTrackingTest.cpp | 129 +++ llvm/utils/benchmark/include/benchmark/benchmark.h | 2 +- 152 files changed, 6407 insertions(+), 899 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll create mode 100644 llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll create mode 100644 llvm/test/Transforms/GVN/PRE/modified-status.ll create mode 100644 llvm/test/Transforms/LoopVectorize/skeleton-lcssa-crash.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (af06dc10a -> 24d8f5ef8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig in repository toolchain/ci/base-artifacts. discards af06dc10a 0: update: llvm-linux-qemu: all new 24d8f5ef8 0: update: llvm-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (af06dc10a) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 236 +- 03-build_llvm/console.log | 13714 ++++++++++++------------ 04-build_linux/console.log | 886 +- 05-build_abe-qemu/console.log | 6476 ++++++------ 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 21446 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 10 files changed, 21444 insertions(+), 21456 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-defconfig updated (52cd5f9c22ee -> 5c8fe583cce5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-defconfig in repository toolchain/ci/linux. from 52cd5f9c22ee Merge tag 'ntb-5.11' of git://github.com/jonmason/ntb adds 14e3e989f6a5 proc mountinfo: make splice available again adds 5c8fe583cce5 Linux 5.11-rc1 No new revisions were added by this update. Summary of changes: Makefile | 4 ++-- fs/proc_namespace.c | 9 ++++++--- 2 files changed, 8 insertions(+), 5 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-defconfig updated (07891e53ba9 -> 47c1d976146)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-defconfig in repository toolchain/ci/gcc. from 07891e53ba9 Daily bump. adds 435e0cd4a06 PR fortran/93685 - ICE in gfc_constructor_append_expr, at f [...] adds 329583535d8 Daily bump. adds 5ddff4204bf rs6000: Add support for powerpc64le-unknown-freebsd adds c2840cf16aa This patch fixes PR96320. See the explanatory comment in th [...] adds 47c1d976146 This patch fixes PRs 96100 and 96101. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- gcc/config.gcc | 4 ++ gcc/config/rs6000/freebsd64.h | 12 +++-- gcc/configure | 3 ++ gcc/configure.ac | 3 ++ gcc/fortran/ChangeLog | 11 +++++ gcc/fortran/data.c | 7 ++- gcc/fortran/interface.c | 19 +++++-- gcc/fortran/trans-array.c | 21 +++++++- gcc/fortran/trans-expr.c | 12 +++-- gcc/testsuite/ChangeLog | 8 +++ gcc/testsuite/gfortran.dg/char_length_23.f90 | 25 ++++++++++ gcc/testsuite/gfortran.dg/module_procedure_4.f90 | 63 ++++++++++++++++++++++++ gcc/testsuite/gfortran.dg/pr93685_1.f90 | 20 ++++++++ gcc/testsuite/gfortran.dg/pr93685_2.f90 | 18 +++++++ 15 files changed, 210 insertions(+), 18 deletions(-) create mode 100644 gcc/testsuite/gfortran.dg/char_length_23.f90 create mode 100644 gcc/testsuite/gfortran.dg/module_procedure_4.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr93685_1.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr93685_2.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-defconfig updated (9003b4a1c3 -> 3e4abbda9c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-defconfig in repository toolchain/ci/binutils-gdb. from 9003b4a1c3 Automatic date update in version.in adds 3e4abbda9c Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-defconfig updated (958ac86c6 -> 1e2a536cf)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-defconfig in repository toolchain/ci/base-artifacts. discards 958ac86c6 0: update: binutils-gcc-linux-qemu: boot new 1e2a536cf 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (958ac86c6) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 14 +- 02-prepare_abe/console.log | 266 +- 03-build_abe-binutils/console.log | 11608 +++++------ 04-build_abe-stage1/console.log | 13894 ++++++------- 05-build_linux/console.log | 568 +- 06-build_abe-qemu/console.log | 4653 +++-- 07-boot_linux/console.log | 484 +- 08-check_regression/console.log | 2 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 10 +- 09-update_baseline/results.regressions | 2 +- console.log | 31499 +++++++++++++++--------------- jenkins/manifest.sh | 16 +- 13 files changed, 31520 insertions(+), 31498 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits December 2020