Tcwg-commits December 2020

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig updated (9003b4a1c3 -> 3e4abbda9c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig in repository toolchain/ci/binutils-gdb. from 9003b4a1c3 Automatic date update in version.in adds 3e4abbda9c Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig updated (b64d23875 -> d11221f26)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig in repository toolchain/ci/base-artifacts. discards b64d23875 0: update: binutils-gcc-linux-qemu: boot new d11221f26 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b64d23875) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 440 +- 03-build_abe-binutils/console.log | 11490 +++++------ 04-build_abe-stage1/console.log | 13206 ++++++------- 05-build_linux/console.log | 814 +- 06-build_abe-qemu/console.log | 4271 +++-- 07-boot_linux/console.log | 482 +- 08-check_regression/console.log | 2 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 2 +- 09-update_baseline/results.regressions | 2 +- console.log | 30835 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- 13 files changed, 30846 insertions(+), 30840 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig updated (eca40c36ef1 -> 44ee14f993f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig in repository toolchain/ci/llvm-project. from eca40c36ef1 [ValueTracking] Add unit tests for isKnownNonZero, isImplie [...] adds 4ad41902e8c [GVN] Correctly set modified status when doing PRE on indices. adds 860199dfbe6 [ValueTracking] Use m_LogicalAnd/Or to look into conditions adds 9d70dbdc2bf [InstCombine] use poison as placeholder for undemanded elems adds d76c1d2247a [RS4GC] Lazily set changed flag when folding single entry phis adds 31c2b93d83f [MachineSink] add threshold in machinesink pass to reduce c [...] adds fde3ae88ee4 [asan][memprof] Declare _DYNAMIC and fix -Wparentheses adds 0b56e3cdda5 [sanitizer] Defined SANITIZER_TEST_HAS_PVALLOC only on glibc adds 99d650b3699 [compiler-rt][test] Make glibc-* feature detection work on [...] adds 60afb58bfee [msan] Delete unused glibc header <execinfo.h> adds d85a198e852 [RISCV] Pattern-match more vector-splatted constants adds a485a59d217 [benchmark] Fixed a build error when using CMake 3.15.1 + NDK-R20 adds 5b17263b6b9 [AMDGPU][MC][NFC] Parser refactoring adds 8c25bb3d0d5 [AMDGPU][MC] Improved errors handling for v_interp* operands adds e673d401994 [RISCV] Define vmsbf.m/vmsif.m/vmsof.m/viota.m/vid.v intrinsics. adds 644da789e36 [AMDGPU] Split edge to make si_if dominate end_cf adds 0999408aea7 [clangd] Add error handling (elog) in code completion. adds c3b9d85bd4b [clang-tidy][NFC] Remove unnecessary headers adds e73f885c988 [PowerPC] Remove redundant COPY_TO_REGCLASS introduced by 8 [...] adds 496fb70b141 [MachO] Fix enum-int mismatch warning adds d55627d221b [flang] Fix bugs in .mod file for abstract interface adds b9a7c89d432 [MIRPrinter] Fix incorrect output of unnamed stack names adds d4ccef38d0b [InstCombine] 'hoist xor-by-constant from xor-by-value': ig [...] adds 4820af99ddc [TableGen] Fix bug in !interleave operator adds 38bfa25387f Revert "[benchmark] Fixed a build error when using CMake 3. [...] adds c7ff2c0da1a [AMDGPU][MC][NFC] Split large asm tests into smaller chunks adds dcd21572f97 [ValueTracking] Fix isKnownNonEqual() with constexpr mul adds e4df6a40dad [LV] Vectorize (some) early and multiple exit loops adds 4ffcd4fe9ac Revert "[LV] Vectorize (some) early and multiple exit loops" adds 4b33b238778 Reapply "[LV] Vectorize (some) early and multiple exit loop [...] adds 30f589c9121 [libc++] Constexpr-proof some machinery in not_fn.pass.cpp. NFCI. adds 7b00e9fae38 [libc++] [P1065] Constexpr invoke, reference_wrapper, mem_f [...] adds 9abc457724b [NewPM][AMDGPU] Port amdgpu-simplifylib/amdgpu-usenative adds dd756e3e848 [libc++] Fix a test failure in 7b00e9fae3 (D93815). adds 76a718ee939 [lldb] Deduplicate some lldb-server tests adds cf8f682c2dd [RISCV] Adjust tested vor ops for more stable tests. NFC. adds 34405b41d61 [CodeGen][ObjC] Destroy callee-destroyed arguments in the c [...] adds 6d02d12e172 [AMDGPU][MC][NFC] Added more tests for flat_global adds f931290308a [PowerPC] Parse and ignore .machine adds ef93f7a11c3 [SimplifyCFG] FoldBranchToCommonDest: gracefully handle unr [...] adds 87c032f7b44 [IR] Make Value::getType() work better with invalid IR. adds 1351f719d49 [InstSimplify] add tests for ctpop; NFC (PR48608) adds 236c4524a7c [InstSimplify] remove ctpop of 1 (low) bit adds b4655a0815d [NFC][sanitizer] Remove unused typedef adds 4a16c507cb6 [InstCombine] Disable unsafe select transform behind a flag adds 0f2c180163a [ValueTracking] Implement impliesPoison adds 44ee14f993f [WebAssembly][NFC] Finish cleaning up SIMD tablegen No new revisions were added by this update. Summary of changes: clang-tools-extra/clang-tidy/ClangTidy.cpp | 4 - clang-tools-extra/clang-tidy/ClangTidyCheck.cpp | 2 - .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 6 +- clang-tools-extra/clang-tidy/ClangTidyModule.h | 2 - clang-tools-extra/clang-tidy/ClangTidyOptions.cpp | 1 - .../clang-tidy/ClangTidyProfiling.cpp | 2 - clang-tools-extra/clangd/CodeComplete.cpp | 12 +- clang/include/clang/AST/Decl.h | 3 + clang/lib/AST/Decl.cpp | 11 + clang/lib/CodeGen/CGObjCMac.cpp | 22 +- .../SystemZ/builtins-systemz-zvector-constrained.c | 2 +- .../CodeGen/SystemZ/builtins-systemz-zvector.c | 18 +- .../builtins-systemz-zvector2-constrained.c | 4 +- .../CodeGen/SystemZ/builtins-systemz-zvector2.c | 4 +- clang/test/CodeGenObjC/objc-dispatch-null-check.m | 34 + clang/test/CodeGenObjC/strong-in-c-struct.m | 18 + clang/test/CodeGenObjC/weak-in-c-struct.m | 19 + clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm | 53 + compiler-rt/lib/asan/asan_linux.cpp | 3 +- compiler-rt/lib/memprof/memprof_linux.cpp | 4 +- compiler-rt/lib/memprof/memprof_mapping.h | 2 +- compiler-rt/lib/msan/msan_linux.cpp | 1 - .../lib/sanitizer_common/sanitizer_stacktrace.h | 2 - .../sanitizer_common/tests/sanitizer_test_utils.h | 4 +- compiler-rt/test/lit.common.cfg.py | 12 +- flang/lib/Semantics/mod-file.cpp | 11 +- flang/lib/Semantics/resolve-names.cpp | 5 +- flang/test/Semantics/modfile10.f90 | 37 + flang/test/Semantics/procinterface01.f90 | 2 +- flang/test/Semantics/symbol15.f90 | 2 +- libcxx/docs/Cxx2aStatusPaperStatus.csv | 2 +- libcxx/docs/FeatureTestMacroTable.rst | 2 +- libcxx/include/__functional_base | 19 +- libcxx/include/functional | 54 +- libcxx/include/type_traits | 14 +- libcxx/include/version | 5 +- .../support.limits.general/array.version.pass.cpp | 26 - .../functional.version.pass.cpp | 30 +- .../iterator.version.pass.cpp | 26 - .../string_view.version.pass.cpp | 32 +- .../support.limits.general/tuple.version.pass.cpp | 26 - .../utility.version.pass.cpp | 26 - .../version.version.pass.cpp | 30 +- .../func.invoke/invoke_constexpr.pass.cpp | 279 + .../func.memfn/member_data.pass.cpp | 11 +- .../func.memfn/member_function.pass.cpp | 23 +- .../func.memfn/member_function_const.pass.cpp | 23 +- .../function.objects/func.not_fn/not_fn.pass.cpp | 248 +- .../func.search.default/default.pass.cpp | 21 +- .../func.search.default/default.pred.pass.cpp | 75 +- .../generate_feature_test_macro_components.py | 7 +- .../MachO/MachONormalizedFileFromAtoms.cpp | 2 +- .../API/tools/lldb-server/TestGdbRemoteAttach.py | 20 +- .../tools/lldb-server/TestGdbRemoteCompletion.py | 2 +- .../lldb-server/TestGdbRemoteExpeditedRegisters.py | 106 +- .../API/tools/lldb-server/TestGdbRemoteHostInfo.py | 18 +- .../lldb-server/TestGdbRemote_qThreadStopInfo.py | 80 +- .../commandline/TestGdbRemoteConnection.py | 17 - .../signal-filtering/TestGdbRemote_QPassSignals.py | 4 - llvm/include/llvm/Analysis/ValueTracking.h | 5 + llvm/include/llvm/IR/IntrinsicsRISCV.td | 49 + .../llvm/Transforms/InstCombine/InstCombiner.h | 13 + .../llvm/Transforms/Utils/BasicBlockUtils.h | 2 +- llvm/lib/Analysis/InstructionSimplify.cpp | 9 + llvm/lib/Analysis/ValueTracking.cpp | 115 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineSink.cpp | 36 + llvm/lib/TableGen/Record.cpp | 37 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 11 +- llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp | 64 + llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 30 + llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h | 3 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 194 +- llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 13 +- llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 6 +- llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 8 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 23 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 288 +- .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 837 +- .../Target/WebAssembly/WebAssemblyRegStackify.cpp | 2 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 10 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 47 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 23 +- llvm/lib/Transforms/Scalar/GVN.cpp | 11 +- .../Transforms/Scalar/RewriteStatepointsForGC.cpp | 6 +- llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 6 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 7 + .../Vectorize/LoopVectorizationLegality.cpp | 25 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 59 +- .../test/Analysis/ValueTracking/known-non-equal.ll | 12 + llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll | 3 + llvm/test/CodeGen/AMDGPU/simplify-libcalls2.ll | 1 + .../AMDGPU/unstructured-cfg-def-use-issue.ll | 333 + llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll | 2 +- llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll | 23 + llvm/test/CodeGen/PowerPC/alloca-crspill.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll | 545 + llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll | 673 + llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll | 722 + llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll | 882 + llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv32.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv64.ll | 88 +- llvm/test/MC/AMDGPU/flat-global.s | 40 + llvm/test/MC/AMDGPU/gfx10_asm_all.s | 126143 ------------------ llvm/test/MC/AMDGPU/gfx10_asm_ds.s | 6987 + llvm/test/MC/AMDGPU/gfx10_asm_flat.s | 128 + llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s | 2289 + llvm/test/MC/AMDGPU/gfx10_asm_smem.s | 1194 + llvm/test/MC/AMDGPU/gfx10_asm_sop.s | 10072 ++ llvm/test/MC/AMDGPU/gfx10_asm_vop1.s | 16229 +++ llvm/test/MC/AMDGPU/gfx10_asm_vop2.s | 13092 ++ llvm/test/MC/AMDGPU/gfx10_asm_vop3.s | 13141 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopc.s | 11576 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s | 21692 +++ llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s | 13816 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s | 15975 +++ llvm/test/MC/AMDGPU/gfx10_err_pos.s | 51 +- llvm/test/MC/AMDGPU/gfx7_asm_all.s | 86860 ------------ llvm/test/MC/AMDGPU/gfx7_asm_ds.s | 3055 + llvm/test/MC/AMDGPU/gfx7_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx7_asm_flat.s | 691 + llvm/test/MC/AMDGPU/gfx7_asm_mimg.s | 6661 + llvm/test/MC/AMDGPU/gfx7_asm_mtbuf.s | 1369 + llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s | 5371 + llvm/test/MC/AMDGPU/gfx7_asm_smrd.s | 751 + llvm/test/MC/AMDGPU/gfx7_asm_sop1.s | 4096 + llvm/test/MC/AMDGPU/gfx7_asm_sop2.s | 6832 + llvm/test/MC/AMDGPU/gfx7_asm_sopc.s | 2266 + llvm/test/MC/AMDGPU/gfx7_asm_sopk.s | 850 + llvm/test/MC/AMDGPU/gfx7_asm_sopp.s | 145 + llvm/test/MC/AMDGPU/gfx7_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx7_asm_vop1.s | 4576 + llvm/test/MC/AMDGPU/gfx7_asm_vop2.s | 3796 + llvm/test/MC/AMDGPU/gfx7_asm_vop3.s | 41875 ++++++ llvm/test/MC/AMDGPU/gfx7_asm_vop3_e64.s | 10534 ++ llvm/test/MC/AMDGPU/gfx7_asm_vopc.s | 14113 ++ llvm/test/MC/AMDGPU/gfx8_asm_all.s | 119543 ----------------- llvm/test/MC/AMDGPU/gfx8_asm_ds.s | 3160 + llvm/test/MC/AMDGPU/gfx8_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx8_asm_flat.s | 601 + llvm/test/MC/AMDGPU/gfx8_asm_mimg.s | 6865 + llvm/test/MC/AMDGPU/gfx8_asm_mtbuf.s | 2689 + llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s | 5488 + llvm/test/MC/AMDGPU/gfx8_asm_smem.s | 1165 + llvm/test/MC/AMDGPU/gfx8_asm_sop1.s | 4153 + llvm/test/MC/AMDGPU/gfx8_asm_sop2.s | 6952 + llvm/test/MC/AMDGPU/gfx8_asm_sopc.s | 2545 + llvm/test/MC/AMDGPU/gfx8_asm_sopk.s | 850 + llvm/test/MC/AMDGPU/gfx8_asm_sopp.s | 163 + llvm/test/MC/AMDGPU/gfx8_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx8_asm_vop1.s | 13768 ++ llvm/test/MC/AMDGPU/gfx8_asm_vop2.s | 12568 ++ llvm/test/MC/AMDGPU/gfx8_asm_vop3.s | 43843 ++++++ llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s | 13501 ++ llvm/test/MC/AMDGPU/gfx8_asm_vopc.s | 22963 ++++ llvm/test/MC/AMDGPU/gfx9_asm_all.s | 119325 ----------------- llvm/test/MC/AMDGPU/gfx9_asm_ds.s | 3364 + llvm/test/MC/AMDGPU/gfx9_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx9_asm_flat.s | 4303 + llvm/test/MC/AMDGPU/gfx9_asm_mimg.s | 7108 + llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s | 2497 + llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s | 5638 + llvm/test/MC/AMDGPU/gfx9_asm_smem.s | 4477 + llvm/test/MC/AMDGPU/gfx9_asm_sop1.s | 3634 + llvm/test/MC/AMDGPU/gfx9_asm_sop2.s | 6880 + llvm/test/MC/AMDGPU/gfx9_asm_sopc.s | 2113 + llvm/test/MC/AMDGPU/gfx9_asm_sopk.s | 652 + llvm/test/MC/AMDGPU/gfx9_asm_sopp.s | 166 + llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx9_asm_vop1.s | 17017 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop2.s | 14962 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop3.s | 37702 ++++++ llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s | 16642 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s | 3484 + llvm/test/MC/AMDGPU/gfx9_asm_vopc.s | 29311 ++++ llvm/test/MC/AMDGPU/vintrp-err.s | 53 +- llvm/test/MC/PowerPC/ppc-machine.s | 5 + llvm/test/TableGen/interleave.td | 9 + llvm/test/Transforms/GVN/PRE/modified-status.ll | 60 + llvm/test/Transforms/GVN/PRE/pre-gep-load.ll | 13 +- llvm/test/Transforms/InstCombine/AArch64/tbl1.ll | 2 +- llvm/test/Transforms/InstCombine/ARM/tbl1.ll | 2 +- llvm/test/Transforms/InstCombine/X86/clmulqdq.ll | 18 +- .../InstCombine/X86/x86-addsub-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-addsub.ll | 4 +- .../InstCombine/X86/x86-avx512-inseltpoison.ll | 40 +- llvm/test/Transforms/InstCombine/X86/x86-avx512.ll | 40 +- .../Transforms/InstCombine/X86/x86-insertps.ll | 4 +- .../InstCombine/X86/x86-masked-memops.ll | 16 +- llvm/test/Transforms/InstCombine/X86/x86-muldq.ll | 4 +- .../InstCombine/X86/x86-pack-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-pack.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-pshufb.ll | 72 +- .../InstCombine/X86/x86-sse-inseltpoison.ll | 70 +- llvm/test/Transforms/InstCombine/X86/x86-sse.ll | 70 +- .../InstCombine/X86/x86-sse2-inseltpoison.ll | 66 +- llvm/test/Transforms/InstCombine/X86/x86-sse2.ll | 66 +- .../InstCombine/X86/x86-sse41-inseltpoison.ll | 18 +- llvm/test/Transforms/InstCombine/X86/x86-sse41.ll | 18 +- llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll | 18 +- .../X86/x86-vec_demanded_elts-inseltpoison.ll | 22 +- .../InstCombine/X86/x86-vec_demanded_elts.ll | 43 +- .../X86/x86-vector-shifts-inseltpoison.ll | 20 +- .../InstCombine/X86/x86-vector-shifts.ll | 20 +- .../test/Transforms/InstCombine/X86/x86-vpermil.ll | 2 +- .../InstCombine/X86/x86-xop-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-xop.ll | 4 +- .../Transforms/InstCombine/bitcast-bigendian.ll | 6 +- .../Transforms/InstCombine/bitcast-inseltpoison.ll | 6 +- .../InstCombine/bitcast-vec-canon-inseltpoison.ll | 2 +- .../Transforms/InstCombine/bitcast-vec-canon.ll | 4 +- llvm/test/Transforms/InstCombine/bitcast.ll | 6 +- .../InstCombine/broadcast-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/broadcast.ll | 4 +- llvm/test/Transforms/InstCombine/cast.ll | 8 +- llvm/test/Transforms/InstCombine/ctpop.ll | 6 +- llvm/test/Transforms/InstCombine/getelementptr.ll | 4 +- .../hoist-xor-by-constant-from-xor-by-value.ll | 14 + .../Transforms/InstCombine/insert-const-shuf.ll | 18 +- .../insert-extract-shuffle-inseltpoison.ll | 14 +- .../InstCombine/insert-extract-shuffle.ll | 14 +- .../InstCombine/masked_intrinsics-inseltpoison.ll | 8 +- .../Transforms/InstCombine/masked_intrinsics.ll | 8 +- llvm/test/Transforms/InstCombine/minmax-fold.ll | 2 +- llvm/test/Transforms/InstCombine/pr2645-0.ll | 3 +- llvm/test/Transforms/InstCombine/select-and-or.ll | 87 + llvm/test/Transforms/InstCombine/shuffle_select.ll | 22 +- .../shufflevector-div-rem-inseltpoison.ll | 2 +- .../InstCombine/shufflevector-div-rem.ll | 2 +- .../Transforms/InstCombine/sub-of-negatible.ll | 2 +- llvm/test/Transforms/InstCombine/trunc.ll | 2 +- .../InstCombine/vec_demanded_elts-inseltpoison.ll | 44 +- .../Transforms/InstCombine/vec_demanded_elts.ll | 44 +- .../InstCombine/vec_shuffle-inseltpoison.ll | 55 +- llvm/test/Transforms/InstCombine/vec_shuffle.ll | 52 +- .../InstCombine/vector-casts-inseltpoison.ll | 2 +- llvm/test/Transforms/InstCombine/vector-casts.ll | 2 +- .../vector_insertelt_shuffle-inseltpoison.ll | 4 +- .../InstCombine/vector_insertelt_shuffle.ll | 22 +- llvm/test/Transforms/InstSimplify/call.ll | 62 +- .../LoopVectorize/X86/invariant-load-gather.ll | 4 +- llvm/test/Transforms/LoopVectorize/control-flow.ll | 2 +- llvm/test/Transforms/LoopVectorize/induction.ll | 2 +- llvm/test/Transforms/LoopVectorize/loop-form.ll | 455 +- .../LoopVectorize/loop-legality-checks.ll | 23 +- .../LoopVectorize/reduction-inloop-pred.ll | 2 +- .../Transforms/LoopVectorize/reduction-inloop.ll | 2 +- .../PhaseOrdering/X86/horiz-math-inseltpoison.ll | 2 +- .../Transforms/PhaseOrdering/X86/horiz-math.ll | 2 +- .../SLPVectorizer/AArch64/getelementptr.ll | 6 +- .../X86/alternate-cast-inseltpoison.ll | 4 +- .../Transforms/SLPVectorizer/X86/alternate-cast.ll | 4 +- .../X86/alternate-int-inseltpoison.ll | 2 +- .../X86/blending-shuffle-inseltpoison.ll | 2 +- .../SimplifyCFG/fold-branch-to-common-dest.ll | 54 + llvm/unittests/Analysis/ValueTrackingTest.cpp | 115 + .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 1 + mlir/lib/IR/Value.cpp | 5 + 265 files changed, 543260 insertions(+), 453902 deletions(-) create mode 100644 clang/test/CodeGenObjC/objc-dispatch-null-check.m create mode 100644 libcxx/test/std/utilities/function.objects/func.invoke/invoke_c [...] create mode 100644 llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll create mode 100644 llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll delete mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_smem.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_sop.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s delete mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_exp.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_mimg.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_mtbuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_smrd.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sopk.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sopp.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vintrp.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vop3_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vopc.s delete mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_exp.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_mimg.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_mtbuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_smem.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sopk.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sopp.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vintrp.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vopc.s delete mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_exp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mimg.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_smem.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopk.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vopc.s create mode 100644 llvm/test/Transforms/GVN/PRE/modified-status.ll create mode 100644 llvm/test/Transforms/InstCombine/select-and-or.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig updated (b164ccde3 -> 0837ef43f)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig in repository toolchain/ci/base-artifacts. discards b164ccde3 2: update: llvm-linux-qemu: 19388 new 0837ef43f 2: update: llvm-linux-qemu: 19388 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b164ccde3) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 174 +- 02-prepare_abe/console.log | 440 +- 03-build_llvm/console.log | 13860 ++++++++++++++------------- 04-build_linux/console.log | 756 +- 07-check_regression/console.log | 12 +- 07-check_regression/results.regressions | 6 +- 08-update_baseline/console.log | 96 +- 08-update_baseline/results.regressions | 6 +- console.log | 15338 +++++++++++++++--------------- jenkins/manifest.sh | 8 +- 10 files changed, 15334 insertions(+), 15362 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig updated (4ad41902e8c -> 85af1d6257f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/llvm-project. from 4ad41902e8c [GVN] Correctly set modified status when doing PRE on indices. adds 860199dfbe6 [ValueTracking] Use m_LogicalAnd/Or to look into conditions adds 9d70dbdc2bf [InstCombine] use poison as placeholder for undemanded elems adds d76c1d2247a [RS4GC] Lazily set changed flag when folding single entry phis adds 31c2b93d83f [MachineSink] add threshold in machinesink pass to reduce c [...] adds fde3ae88ee4 [asan][memprof] Declare _DYNAMIC and fix -Wparentheses adds 0b56e3cdda5 [sanitizer] Defined SANITIZER_TEST_HAS_PVALLOC only on glibc adds 99d650b3699 [compiler-rt][test] Make glibc-* feature detection work on [...] adds 60afb58bfee [msan] Delete unused glibc header <execinfo.h> adds d85a198e852 [RISCV] Pattern-match more vector-splatted constants adds a485a59d217 [benchmark] Fixed a build error when using CMake 3.15.1 + NDK-R20 adds 5b17263b6b9 [AMDGPU][MC][NFC] Parser refactoring adds 8c25bb3d0d5 [AMDGPU][MC] Improved errors handling for v_interp* operands adds e673d401994 [RISCV] Define vmsbf.m/vmsif.m/vmsof.m/viota.m/vid.v intrinsics. adds 644da789e36 [AMDGPU] Split edge to make si_if dominate end_cf adds 0999408aea7 [clangd] Add error handling (elog) in code completion. adds c3b9d85bd4b [clang-tidy][NFC] Remove unnecessary headers adds e73f885c988 [PowerPC] Remove redundant COPY_TO_REGCLASS introduced by 8 [...] adds 496fb70b141 [MachO] Fix enum-int mismatch warning adds d55627d221b [flang] Fix bugs in .mod file for abstract interface adds b9a7c89d432 [MIRPrinter] Fix incorrect output of unnamed stack names adds d4ccef38d0b [InstCombine] 'hoist xor-by-constant from xor-by-value': ig [...] adds 4820af99ddc [TableGen] Fix bug in !interleave operator adds 38bfa25387f Revert "[benchmark] Fixed a build error when using CMake 3. [...] adds c7ff2c0da1a [AMDGPU][MC][NFC] Split large asm tests into smaller chunks adds dcd21572f97 [ValueTracking] Fix isKnownNonEqual() with constexpr mul adds e4df6a40dad [LV] Vectorize (some) early and multiple exit loops adds 4ffcd4fe9ac Revert "[LV] Vectorize (some) early and multiple exit loops" adds 4b33b238778 Reapply "[LV] Vectorize (some) early and multiple exit loop [...] adds 30f589c9121 [libc++] Constexpr-proof some machinery in not_fn.pass.cpp. NFCI. adds 7b00e9fae38 [libc++] [P1065] Constexpr invoke, reference_wrapper, mem_f [...] adds 9abc457724b [NewPM][AMDGPU] Port amdgpu-simplifylib/amdgpu-usenative adds dd756e3e848 [libc++] Fix a test failure in 7b00e9fae3 (D93815). adds 76a718ee939 [lldb] Deduplicate some lldb-server tests adds cf8f682c2dd [RISCV] Adjust tested vor ops for more stable tests. NFC. adds 34405b41d61 [CodeGen][ObjC] Destroy callee-destroyed arguments in the c [...] adds 6d02d12e172 [AMDGPU][MC][NFC] Added more tests for flat_global adds f931290308a [PowerPC] Parse and ignore .machine adds ef93f7a11c3 [SimplifyCFG] FoldBranchToCommonDest: gracefully handle unr [...] adds 87c032f7b44 [IR] Make Value::getType() work better with invalid IR. adds 1351f719d49 [InstSimplify] add tests for ctpop; NFC (PR48608) adds 236c4524a7c [InstSimplify] remove ctpop of 1 (low) bit adds b4655a0815d [NFC][sanitizer] Remove unused typedef adds 4a16c507cb6 [InstCombine] Disable unsafe select transform behind a flag adds 0f2c180163a [ValueTracking] Implement impliesPoison adds 44ee14f993f [WebAssembly][NFC] Finish cleaning up SIMD tablegen adds 6c36286a2e1 [NewPM] Fix CGSCCOptimizerLateEPCallbacks place in pipeline adds 5e09e9979bc [WebAssembly] Prototype extending pairwise add instructions adds 25007b4d7e0 [MLIR][NFC] Change FunctionLike::setAllArgAttrs/setAllResul [...] adds e6ae623314b [IROutliner] Adding support for consolidating functions wit [...] new 85af1d6257f [test] Fix pr45360.ll under NPM The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clang-tidy/ClangTidy.cpp | 4 - clang-tools-extra/clang-tidy/ClangTidyCheck.cpp | 2 - .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 6 +- clang-tools-extra/clang-tidy/ClangTidyModule.h | 2 - clang-tools-extra/clang-tidy/ClangTidyOptions.cpp | 1 - .../clang-tidy/ClangTidyProfiling.cpp | 2 - clang-tools-extra/clangd/CodeComplete.cpp | 12 +- clang/include/clang/AST/Decl.h | 3 + clang/include/clang/Basic/BuiltinsWebAssembly.def | 6 + clang/lib/AST/Decl.cpp | 11 + clang/lib/CodeGen/CGBuiltin.cpp | 22 + clang/lib/CodeGen/CGObjCMac.cpp | 22 +- .../SystemZ/builtins-systemz-zvector-constrained.c | 2 +- .../CodeGen/SystemZ/builtins-systemz-zvector.c | 18 +- .../builtins-systemz-zvector2-constrained.c | 4 +- .../CodeGen/SystemZ/builtins-systemz-zvector2.c | 4 +- clang/test/CodeGen/builtins-wasm.c | 28 + clang/test/CodeGenObjC/objc-dispatch-null-check.m | 34 + clang/test/CodeGenObjC/strong-in-c-struct.m | 18 + clang/test/CodeGenObjC/weak-in-c-struct.m | 19 + clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm | 53 + compiler-rt/lib/asan/asan_linux.cpp | 3 +- compiler-rt/lib/memprof/memprof_linux.cpp | 4 +- compiler-rt/lib/memprof/memprof_mapping.h | 2 +- compiler-rt/lib/msan/msan_linux.cpp | 1 - .../lib/sanitizer_common/sanitizer_stacktrace.h | 2 - .../sanitizer_common/tests/sanitizer_test_utils.h | 4 +- compiler-rt/test/lit.common.cfg.py | 12 +- flang/lib/Semantics/mod-file.cpp | 11 +- flang/lib/Semantics/resolve-names.cpp | 5 +- flang/test/Semantics/modfile10.f90 | 37 + flang/test/Semantics/procinterface01.f90 | 2 +- flang/test/Semantics/symbol15.f90 | 2 +- libcxx/docs/Cxx2aStatusPaperStatus.csv | 2 +- libcxx/docs/FeatureTestMacroTable.rst | 2 +- libcxx/include/__functional_base | 19 +- libcxx/include/functional | 54 +- libcxx/include/type_traits | 14 +- libcxx/include/version | 5 +- .../support.limits.general/array.version.pass.cpp | 26 - .../functional.version.pass.cpp | 30 +- .../iterator.version.pass.cpp | 26 - .../string_view.version.pass.cpp | 32 +- .../support.limits.general/tuple.version.pass.cpp | 26 - .../utility.version.pass.cpp | 26 - .../version.version.pass.cpp | 30 +- .../func.invoke/invoke_constexpr.pass.cpp | 279 + .../func.memfn/member_data.pass.cpp | 11 +- .../func.memfn/member_function.pass.cpp | 23 +- .../func.memfn/member_function_const.pass.cpp | 23 +- .../function.objects/func.not_fn/not_fn.pass.cpp | 248 +- .../func.search.default/default.pass.cpp | 21 +- .../func.search.default/default.pred.pass.cpp | 75 +- .../generate_feature_test_macro_components.py | 7 +- .../MachO/MachONormalizedFileFromAtoms.cpp | 2 +- .../API/tools/lldb-server/TestGdbRemoteAttach.py | 20 +- .../tools/lldb-server/TestGdbRemoteCompletion.py | 2 +- .../lldb-server/TestGdbRemoteExpeditedRegisters.py | 106 +- .../API/tools/lldb-server/TestGdbRemoteHostInfo.py | 18 +- .../lldb-server/TestGdbRemote_qThreadStopInfo.py | 80 +- .../commandline/TestGdbRemoteConnection.py | 17 - .../signal-filtering/TestGdbRemote_QPassSignals.py | 4 - llvm/include/llvm/Analysis/ValueTracking.h | 5 + llvm/include/llvm/IR/IntrinsicsRISCV.td | 49 + llvm/include/llvm/IR/IntrinsicsWebAssembly.td | 9 + llvm/include/llvm/Transforms/IPO/IROutliner.h | 23 + .../llvm/Transforms/InstCombine/InstCombiner.h | 13 + .../llvm/Transforms/Utils/BasicBlockUtils.h | 2 +- llvm/lib/Analysis/InstructionSimplify.cpp | 9 + llvm/lib/Analysis/ValueTracking.cpp | 115 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineSink.cpp | 36 + llvm/lib/Passes/PassBuilder.cpp | 20 +- llvm/lib/TableGen/Record.cpp | 37 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 11 +- llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp | 64 + llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 30 + llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h | 3 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 194 +- llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 13 +- llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 6 +- llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 8 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 23 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 288 +- .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 848 +- .../Target/WebAssembly/WebAssemblyRegStackify.cpp | 2 +- llvm/lib/Transforms/IPO/IROutliner.cpp | 441 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 10 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 47 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 23 +- .../Transforms/Scalar/RewriteStatepointsForGC.cpp | 6 +- llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 6 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 7 + .../Vectorize/LoopVectorizationLegality.cpp | 25 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 59 +- .../test/Analysis/ValueTracking/known-non-equal.ll | 12 + llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll | 3 + llvm/test/CodeGen/AMDGPU/simplify-libcalls2.ll | 1 + .../AMDGPU/unstructured-cfg-def-use-issue.ll | 333 + llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll | 2 +- llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll | 23 + llvm/test/CodeGen/PowerPC/alloca-crspill.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll | 545 + llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll | 673 + llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll | 722 + llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll | 882 + llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv32.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv64.ll | 88 +- llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll | 41 + llvm/test/MC/AMDGPU/flat-global.s | 40 + llvm/test/MC/AMDGPU/gfx10_asm_all.s | 126143 ------------------ llvm/test/MC/AMDGPU/gfx10_asm_ds.s | 6987 + llvm/test/MC/AMDGPU/gfx10_asm_flat.s | 128 + llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s | 2289 + llvm/test/MC/AMDGPU/gfx10_asm_smem.s | 1194 + llvm/test/MC/AMDGPU/gfx10_asm_sop.s | 10072 ++ llvm/test/MC/AMDGPU/gfx10_asm_vop1.s | 16229 +++ llvm/test/MC/AMDGPU/gfx10_asm_vop2.s | 13092 ++ llvm/test/MC/AMDGPU/gfx10_asm_vop3.s | 13141 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopc.s | 11576 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s | 21692 +++ llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s | 13816 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s | 15975 +++ llvm/test/MC/AMDGPU/gfx10_err_pos.s | 51 +- llvm/test/MC/AMDGPU/gfx7_asm_all.s | 86860 ------------ llvm/test/MC/AMDGPU/gfx7_asm_ds.s | 3055 + llvm/test/MC/AMDGPU/gfx7_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx7_asm_flat.s | 691 + llvm/test/MC/AMDGPU/gfx7_asm_mimg.s | 6661 + llvm/test/MC/AMDGPU/gfx7_asm_mtbuf.s | 1369 + llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s | 5371 + llvm/test/MC/AMDGPU/gfx7_asm_smrd.s | 751 + llvm/test/MC/AMDGPU/gfx7_asm_sop1.s | 4096 + llvm/test/MC/AMDGPU/gfx7_asm_sop2.s | 6832 + llvm/test/MC/AMDGPU/gfx7_asm_sopc.s | 2266 + llvm/test/MC/AMDGPU/gfx7_asm_sopk.s | 850 + llvm/test/MC/AMDGPU/gfx7_asm_sopp.s | 145 + llvm/test/MC/AMDGPU/gfx7_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx7_asm_vop1.s | 4576 + llvm/test/MC/AMDGPU/gfx7_asm_vop2.s | 3796 + llvm/test/MC/AMDGPU/gfx7_asm_vop3.s | 41875 ++++++ llvm/test/MC/AMDGPU/gfx7_asm_vop3_e64.s | 10534 ++ llvm/test/MC/AMDGPU/gfx7_asm_vopc.s | 14113 ++ llvm/test/MC/AMDGPU/gfx8_asm_all.s | 119543 ----------------- llvm/test/MC/AMDGPU/gfx8_asm_ds.s | 3160 + llvm/test/MC/AMDGPU/gfx8_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx8_asm_flat.s | 601 + llvm/test/MC/AMDGPU/gfx8_asm_mimg.s | 6865 + llvm/test/MC/AMDGPU/gfx8_asm_mtbuf.s | 2689 + llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s | 5488 + llvm/test/MC/AMDGPU/gfx8_asm_smem.s | 1165 + llvm/test/MC/AMDGPU/gfx8_asm_sop1.s | 4153 + llvm/test/MC/AMDGPU/gfx8_asm_sop2.s | 6952 + llvm/test/MC/AMDGPU/gfx8_asm_sopc.s | 2545 + llvm/test/MC/AMDGPU/gfx8_asm_sopk.s | 850 + llvm/test/MC/AMDGPU/gfx8_asm_sopp.s | 163 + llvm/test/MC/AMDGPU/gfx8_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx8_asm_vop1.s | 13768 ++ llvm/test/MC/AMDGPU/gfx8_asm_vop2.s | 12568 ++ llvm/test/MC/AMDGPU/gfx8_asm_vop3.s | 43843 ++++++ llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s | 13501 ++ llvm/test/MC/AMDGPU/gfx8_asm_vopc.s | 22963 ++++ llvm/test/MC/AMDGPU/gfx9_asm_all.s | 119325 ----------------- llvm/test/MC/AMDGPU/gfx9_asm_ds.s | 3364 + llvm/test/MC/AMDGPU/gfx9_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx9_asm_flat.s | 4303 + llvm/test/MC/AMDGPU/gfx9_asm_mimg.s | 7108 + llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s | 2497 + llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s | 5638 + llvm/test/MC/AMDGPU/gfx9_asm_smem.s | 4477 + llvm/test/MC/AMDGPU/gfx9_asm_sop1.s | 3634 + llvm/test/MC/AMDGPU/gfx9_asm_sop2.s | 6880 + llvm/test/MC/AMDGPU/gfx9_asm_sopc.s | 2113 + llvm/test/MC/AMDGPU/gfx9_asm_sopk.s | 652 + llvm/test/MC/AMDGPU/gfx9_asm_sopp.s | 166 + llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx9_asm_vop1.s | 17017 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop2.s | 14962 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop3.s | 37702 ++++++ llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s | 16642 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s | 3484 + llvm/test/MC/AMDGPU/gfx9_asm_vopc.s | 29311 ++++ llvm/test/MC/AMDGPU/vintrp-err.s | 53 +- llvm/test/MC/PowerPC/ppc-machine.s | 5 + llvm/test/MC/WebAssembly/simd-encodings.s | 12 + llvm/test/Other/new-pm-defaults.ll | 2 +- llvm/test/TableGen/interleave.td | 9 + llvm/test/Transforms/IROutliner/extraction.ll | 46 +- llvm/test/Transforms/IROutliner/illegal-assumes.ll | 22 +- llvm/test/Transforms/IROutliner/illegal-memcpy.ll | 40 +- llvm/test/Transforms/IROutliner/illegal-memmove.ll | 40 +- llvm/test/Transforms/IROutliner/illegal-vaarg.ll | 30 +- .../outlining-different-output-blocks.ll | 110 + .../IROutliner/outlining-remapped-outputs.ll | 74 + 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.../X86/alternate-cast-inseltpoison.ll | 4 +- .../Transforms/SLPVectorizer/X86/alternate-cast.ll | 4 +- .../X86/alternate-int-inseltpoison.ll | 2 +- .../X86/blending-shuffle-inseltpoison.ll | 2 +- .../SimplifyCFG/fold-branch-to-common-dest.ll | 54 + llvm/unittests/Analysis/ValueTrackingTest.cpp | 115 + .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 1 + mlir/include/mlir/IR/FunctionSupport.h | 52 +- mlir/lib/IR/Value.cpp | 5 + 282 files changed, 544203 insertions(+), 454014 deletions(-) create mode 100644 clang/test/CodeGenObjC/objc-dispatch-null-check.m create mode 100644 libcxx/test/std/utilities/function.objects/func.invoke/invoke_c [...] create mode 100644 llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll create mode 100644 llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll delete mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_smem.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_sop.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vopc.s create mode 100644 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llvm/test/MC/AMDGPU/gfx8_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vopc.s delete mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_exp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mimg.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_smem.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopk.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vopc.s create mode 100644 llvm/test/Transforms/IROutliner/outlining-different-output-blocks.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-remapped-outputs.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-same-output-blocks.ll create mode 100644 llvm/test/Transforms/InstCombine/select-and-or.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig updated (71488a4dc -> 8aa3adb81)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/base-artifacts. discards 71488a4dc 0: update: llvm-linux-qemu: boot new 8aa3adb81 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (71488a4dc) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 440 +- 03-build_llvm/console.log | 13690 ++++++++++++----------- 04-build_linux/console.log | 804 +- 05-build_abe-qemu/console.log | 6728 ++++++------ 06-boot_linux/console.log | 492 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 10 +- console.log | 22294 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 10 files changed, 22294 insertions(+), 22302 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (4ad41902e8c -> e6ae623314b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/llvm-project. from 4ad41902e8c [GVN] Correctly set modified status when doing PRE on indices. adds 860199dfbe6 [ValueTracking] Use m_LogicalAnd/Or to look into conditions adds 9d70dbdc2bf [InstCombine] use poison as placeholder for undemanded elems adds d76c1d2247a [RS4GC] Lazily set changed flag when folding single entry phis adds 31c2b93d83f [MachineSink] add threshold in machinesink pass to reduce c [...] adds fde3ae88ee4 [asan][memprof] Declare _DYNAMIC and fix -Wparentheses adds 0b56e3cdda5 [sanitizer] Defined SANITIZER_TEST_HAS_PVALLOC only on glibc adds 99d650b3699 [compiler-rt][test] Make glibc-* feature detection work on [...] adds 60afb58bfee [msan] Delete unused glibc header <execinfo.h> adds d85a198e852 [RISCV] Pattern-match more vector-splatted constants adds a485a59d217 [benchmark] Fixed a build error when using CMake 3.15.1 + NDK-R20 adds 5b17263b6b9 [AMDGPU][MC][NFC] Parser refactoring adds 8c25bb3d0d5 [AMDGPU][MC] Improved errors handling for v_interp* operands adds e673d401994 [RISCV] Define vmsbf.m/vmsif.m/vmsof.m/viota.m/vid.v intrinsics. adds 644da789e36 [AMDGPU] Split edge to make si_if dominate end_cf adds 0999408aea7 [clangd] Add error handling (elog) in code completion. adds c3b9d85bd4b [clang-tidy][NFC] Remove unnecessary headers adds e73f885c988 [PowerPC] Remove redundant COPY_TO_REGCLASS introduced by 8 [...] adds 496fb70b141 [MachO] Fix enum-int mismatch warning adds d55627d221b [flang] Fix bugs in .mod file for abstract interface adds b9a7c89d432 [MIRPrinter] Fix incorrect output of unnamed stack names adds d4ccef38d0b [InstCombine] 'hoist xor-by-constant from xor-by-value': ig [...] adds 4820af99ddc [TableGen] Fix bug in !interleave operator adds 38bfa25387f Revert "[benchmark] Fixed a build error when using CMake 3. [...] adds c7ff2c0da1a [AMDGPU][MC][NFC] Split large asm tests into smaller chunks adds dcd21572f97 [ValueTracking] Fix isKnownNonEqual() with constexpr mul adds e4df6a40dad [LV] Vectorize (some) early and multiple exit loops adds 4ffcd4fe9ac Revert "[LV] Vectorize (some) early and multiple exit loops" adds 4b33b238778 Reapply "[LV] Vectorize (some) early and multiple exit loop [...] adds 30f589c9121 [libc++] Constexpr-proof some machinery in not_fn.pass.cpp. NFCI. adds 7b00e9fae38 [libc++] [P1065] Constexpr invoke, reference_wrapper, mem_f [...] adds 9abc457724b [NewPM][AMDGPU] Port amdgpu-simplifylib/amdgpu-usenative adds dd756e3e848 [libc++] Fix a test failure in 7b00e9fae3 (D93815). adds 76a718ee939 [lldb] Deduplicate some lldb-server tests adds cf8f682c2dd [RISCV] Adjust tested vor ops for more stable tests. NFC. adds 34405b41d61 [CodeGen][ObjC] Destroy callee-destroyed arguments in the c [...] adds 6d02d12e172 [AMDGPU][MC][NFC] Added more tests for flat_global adds f931290308a [PowerPC] Parse and ignore .machine adds ef93f7a11c3 [SimplifyCFG] FoldBranchToCommonDest: gracefully handle unr [...] adds 87c032f7b44 [IR] Make Value::getType() work better with invalid IR. adds 1351f719d49 [InstSimplify] add tests for ctpop; NFC (PR48608) adds 236c4524a7c [InstSimplify] remove ctpop of 1 (low) bit new b4655a0815d [NFC][sanitizer] Remove unused typedef new 4a16c507cb6 [InstCombine] Disable unsafe select transform behind a flag new 0f2c180163a [ValueTracking] Implement impliesPoison new 44ee14f993f [WebAssembly][NFC] Finish cleaning up SIMD tablegen new 6c36286a2e1 [NewPM] Fix CGSCCOptimizerLateEPCallbacks place in pipeline new 5e09e9979bc [WebAssembly] Prototype extending pairwise add instructions new 25007b4d7e0 [MLIR][NFC] Change FunctionLike::setAllArgAttrs/setAllResul [...] new e6ae623314b [IROutliner] Adding support for consolidating functions wit [...] The 8 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clang-tidy/ClangTidy.cpp | 4 - clang-tools-extra/clang-tidy/ClangTidyCheck.cpp | 2 - .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 6 +- clang-tools-extra/clang-tidy/ClangTidyModule.h | 2 - clang-tools-extra/clang-tidy/ClangTidyOptions.cpp | 1 - .../clang-tidy/ClangTidyProfiling.cpp | 2 - clang-tools-extra/clangd/CodeComplete.cpp | 12 +- clang/include/clang/AST/Decl.h | 3 + clang/include/clang/Basic/BuiltinsWebAssembly.def | 6 + clang/lib/AST/Decl.cpp | 11 + clang/lib/CodeGen/CGBuiltin.cpp | 22 + clang/lib/CodeGen/CGObjCMac.cpp | 22 +- .../SystemZ/builtins-systemz-zvector-constrained.c | 2 +- .../CodeGen/SystemZ/builtins-systemz-zvector.c | 18 +- .../builtins-systemz-zvector2-constrained.c | 4 +- .../CodeGen/SystemZ/builtins-systemz-zvector2.c | 4 +- clang/test/CodeGen/builtins-wasm.c | 28 + clang/test/CodeGenObjC/objc-dispatch-null-check.m | 34 + clang/test/CodeGenObjC/strong-in-c-struct.m | 18 + clang/test/CodeGenObjC/weak-in-c-struct.m | 19 + clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm | 53 + compiler-rt/lib/asan/asan_linux.cpp | 3 +- compiler-rt/lib/memprof/memprof_linux.cpp | 4 +- compiler-rt/lib/memprof/memprof_mapping.h | 2 +- compiler-rt/lib/msan/msan_linux.cpp | 1 - .../lib/sanitizer_common/sanitizer_stacktrace.h | 2 - .../sanitizer_common/tests/sanitizer_test_utils.h | 4 +- compiler-rt/test/lit.common.cfg.py | 12 +- flang/lib/Semantics/mod-file.cpp | 11 +- flang/lib/Semantics/resolve-names.cpp | 5 +- flang/test/Semantics/modfile10.f90 | 37 + flang/test/Semantics/procinterface01.f90 | 2 +- flang/test/Semantics/symbol15.f90 | 2 +- libcxx/docs/Cxx2aStatusPaperStatus.csv | 2 +- libcxx/docs/FeatureTestMacroTable.rst | 2 +- libcxx/include/__functional_base | 19 +- libcxx/include/functional | 54 +- libcxx/include/type_traits | 14 +- libcxx/include/version | 5 +- .../support.limits.general/array.version.pass.cpp | 26 - .../functional.version.pass.cpp | 30 +- .../iterator.version.pass.cpp | 26 - .../string_view.version.pass.cpp | 32 +- .../support.limits.general/tuple.version.pass.cpp | 26 - .../utility.version.pass.cpp | 26 - .../version.version.pass.cpp | 30 +- .../func.invoke/invoke_constexpr.pass.cpp | 279 + .../func.memfn/member_data.pass.cpp | 11 +- .../func.memfn/member_function.pass.cpp | 23 +- .../func.memfn/member_function_const.pass.cpp | 23 +- .../function.objects/func.not_fn/not_fn.pass.cpp | 248 +- .../func.search.default/default.pass.cpp | 21 +- .../func.search.default/default.pred.pass.cpp | 75 +- .../generate_feature_test_macro_components.py | 7 +- .../MachO/MachONormalizedFileFromAtoms.cpp | 2 +- .../API/tools/lldb-server/TestGdbRemoteAttach.py | 20 +- .../tools/lldb-server/TestGdbRemoteCompletion.py | 2 +- .../lldb-server/TestGdbRemoteExpeditedRegisters.py | 106 +- .../API/tools/lldb-server/TestGdbRemoteHostInfo.py | 18 +- .../lldb-server/TestGdbRemote_qThreadStopInfo.py | 80 +- .../commandline/TestGdbRemoteConnection.py | 17 - .../signal-filtering/TestGdbRemote_QPassSignals.py | 4 - llvm/include/llvm/Analysis/ValueTracking.h | 5 + llvm/include/llvm/IR/IntrinsicsRISCV.td | 49 + llvm/include/llvm/IR/IntrinsicsWebAssembly.td | 9 + llvm/include/llvm/Transforms/IPO/IROutliner.h | 23 + .../llvm/Transforms/InstCombine/InstCombiner.h | 13 + .../llvm/Transforms/Utils/BasicBlockUtils.h | 2 +- llvm/lib/Analysis/InstructionSimplify.cpp | 9 + llvm/lib/Analysis/ValueTracking.cpp | 115 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineSink.cpp | 36 + llvm/lib/Passes/PassBuilder.cpp | 20 +- llvm/lib/TableGen/Record.cpp | 37 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 11 +- llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp | 64 + llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 30 + llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h | 3 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 194 +- llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 13 +- llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 6 +- llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 8 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 23 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 288 +- .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 848 +- .../Target/WebAssembly/WebAssemblyRegStackify.cpp | 2 +- llvm/lib/Transforms/IPO/IROutliner.cpp | 441 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 10 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 47 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 23 +- .../Transforms/Scalar/RewriteStatepointsForGC.cpp | 6 +- llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 6 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 7 + .../Vectorize/LoopVectorizationLegality.cpp | 25 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 59 +- .../test/Analysis/ValueTracking/known-non-equal.ll | 12 + llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll | 3 + llvm/test/CodeGen/AMDGPU/simplify-libcalls2.ll | 1 + .../AMDGPU/unstructured-cfg-def-use-issue.ll | 333 + llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll | 2 +- llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll | 23 + llvm/test/CodeGen/PowerPC/alloca-crspill.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll | 545 + llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll | 673 + llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll | 722 + llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll | 882 + llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv32.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv64.ll | 88 +- llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll | 41 + llvm/test/MC/AMDGPU/flat-global.s | 40 + llvm/test/MC/AMDGPU/gfx10_asm_all.s | 126143 ------------------ llvm/test/MC/AMDGPU/gfx10_asm_ds.s | 6987 + llvm/test/MC/AMDGPU/gfx10_asm_flat.s | 128 + llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s | 2289 + llvm/test/MC/AMDGPU/gfx10_asm_smem.s | 1194 + llvm/test/MC/AMDGPU/gfx10_asm_sop.s | 10072 ++ llvm/test/MC/AMDGPU/gfx10_asm_vop1.s | 16229 +++ llvm/test/MC/AMDGPU/gfx10_asm_vop2.s | 13092 ++ llvm/test/MC/AMDGPU/gfx10_asm_vop3.s | 13141 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopc.s | 11576 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s | 21692 +++ llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s | 13816 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s | 15975 +++ llvm/test/MC/AMDGPU/gfx10_err_pos.s | 51 +- llvm/test/MC/AMDGPU/gfx7_asm_all.s | 86860 ------------ llvm/test/MC/AMDGPU/gfx7_asm_ds.s | 3055 + llvm/test/MC/AMDGPU/gfx7_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx7_asm_flat.s | 691 + llvm/test/MC/AMDGPU/gfx7_asm_mimg.s | 6661 + llvm/test/MC/AMDGPU/gfx7_asm_mtbuf.s | 1369 + llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s | 5371 + llvm/test/MC/AMDGPU/gfx7_asm_smrd.s | 751 + llvm/test/MC/AMDGPU/gfx7_asm_sop1.s | 4096 + llvm/test/MC/AMDGPU/gfx7_asm_sop2.s | 6832 + llvm/test/MC/AMDGPU/gfx7_asm_sopc.s | 2266 + llvm/test/MC/AMDGPU/gfx7_asm_sopk.s | 850 + llvm/test/MC/AMDGPU/gfx7_asm_sopp.s | 145 + llvm/test/MC/AMDGPU/gfx7_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx7_asm_vop1.s | 4576 + llvm/test/MC/AMDGPU/gfx7_asm_vop2.s | 3796 + llvm/test/MC/AMDGPU/gfx7_asm_vop3.s | 41875 ++++++ llvm/test/MC/AMDGPU/gfx7_asm_vop3_e64.s | 10534 ++ llvm/test/MC/AMDGPU/gfx7_asm_vopc.s | 14113 ++ llvm/test/MC/AMDGPU/gfx8_asm_all.s | 119543 ----------------- llvm/test/MC/AMDGPU/gfx8_asm_ds.s | 3160 + llvm/test/MC/AMDGPU/gfx8_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx8_asm_flat.s | 601 + llvm/test/MC/AMDGPU/gfx8_asm_mimg.s | 6865 + llvm/test/MC/AMDGPU/gfx8_asm_mtbuf.s | 2689 + llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s | 5488 + llvm/test/MC/AMDGPU/gfx8_asm_smem.s | 1165 + llvm/test/MC/AMDGPU/gfx8_asm_sop1.s | 4153 + llvm/test/MC/AMDGPU/gfx8_asm_sop2.s | 6952 + llvm/test/MC/AMDGPU/gfx8_asm_sopc.s | 2545 + llvm/test/MC/AMDGPU/gfx8_asm_sopk.s | 850 + llvm/test/MC/AMDGPU/gfx8_asm_sopp.s | 163 + llvm/test/MC/AMDGPU/gfx8_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx8_asm_vop1.s | 13768 ++ llvm/test/MC/AMDGPU/gfx8_asm_vop2.s | 12568 ++ llvm/test/MC/AMDGPU/gfx8_asm_vop3.s | 43843 ++++++ llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s | 13501 ++ llvm/test/MC/AMDGPU/gfx8_asm_vopc.s | 22963 ++++ llvm/test/MC/AMDGPU/gfx9_asm_all.s | 119325 ----------------- llvm/test/MC/AMDGPU/gfx9_asm_ds.s | 3364 + llvm/test/MC/AMDGPU/gfx9_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx9_asm_flat.s | 4303 + llvm/test/MC/AMDGPU/gfx9_asm_mimg.s | 7108 + llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s | 2497 + llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s | 5638 + llvm/test/MC/AMDGPU/gfx9_asm_smem.s | 4477 + llvm/test/MC/AMDGPU/gfx9_asm_sop1.s | 3634 + llvm/test/MC/AMDGPU/gfx9_asm_sop2.s | 6880 + llvm/test/MC/AMDGPU/gfx9_asm_sopc.s | 2113 + llvm/test/MC/AMDGPU/gfx9_asm_sopk.s | 652 + llvm/test/MC/AMDGPU/gfx9_asm_sopp.s | 166 + llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx9_asm_vop1.s | 17017 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop2.s | 14962 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop3.s | 37702 ++++++ llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s | 16642 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s | 3484 + llvm/test/MC/AMDGPU/gfx9_asm_vopc.s | 29311 ++++ llvm/test/MC/AMDGPU/vintrp-err.s | 53 +- llvm/test/MC/PowerPC/ppc-machine.s | 5 + llvm/test/MC/WebAssembly/simd-encodings.s | 12 + llvm/test/Other/new-pm-defaults.ll | 2 +- llvm/test/TableGen/interleave.td | 9 + llvm/test/Transforms/IROutliner/extraction.ll | 46 +- llvm/test/Transforms/IROutliner/illegal-assumes.ll | 22 +- llvm/test/Transforms/IROutliner/illegal-memcpy.ll | 40 +- llvm/test/Transforms/IROutliner/illegal-memmove.ll | 40 +- llvm/test/Transforms/IROutliner/illegal-vaarg.ll | 30 +- .../outlining-different-output-blocks.ll | 110 + .../IROutliner/outlining-remapped-outputs.ll | 74 + .../IROutliner/outlining-same-output-blocks.ll | 107 + llvm/test/Transforms/InstCombine/AArch64/tbl1.ll | 2 +- llvm/test/Transforms/InstCombine/ARM/tbl1.ll | 2 +- llvm/test/Transforms/InstCombine/X86/clmulqdq.ll | 18 +- .../InstCombine/X86/x86-addsub-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-addsub.ll | 4 +- .../InstCombine/X86/x86-avx512-inseltpoison.ll | 40 +- llvm/test/Transforms/InstCombine/X86/x86-avx512.ll | 40 +- .../Transforms/InstCombine/X86/x86-insertps.ll | 4 +- .../InstCombine/X86/x86-masked-memops.ll | 16 +- llvm/test/Transforms/InstCombine/X86/x86-muldq.ll | 4 +- .../InstCombine/X86/x86-pack-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-pack.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-pshufb.ll | 72 +- .../InstCombine/X86/x86-sse-inseltpoison.ll | 70 +- llvm/test/Transforms/InstCombine/X86/x86-sse.ll | 70 +- .../InstCombine/X86/x86-sse2-inseltpoison.ll | 66 +- llvm/test/Transforms/InstCombine/X86/x86-sse2.ll | 66 +- .../InstCombine/X86/x86-sse41-inseltpoison.ll | 18 +- llvm/test/Transforms/InstCombine/X86/x86-sse41.ll | 18 +- llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll | 18 +- .../X86/x86-vec_demanded_elts-inseltpoison.ll | 22 +- .../InstCombine/X86/x86-vec_demanded_elts.ll | 43 +- .../X86/x86-vector-shifts-inseltpoison.ll | 20 +- .../InstCombine/X86/x86-vector-shifts.ll | 20 +- .../test/Transforms/InstCombine/X86/x86-vpermil.ll | 2 +- .../InstCombine/X86/x86-xop-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/X86/x86-xop.ll | 4 +- .../Transforms/InstCombine/bitcast-bigendian.ll | 6 +- .../Transforms/InstCombine/bitcast-inseltpoison.ll | 6 +- .../InstCombine/bitcast-vec-canon-inseltpoison.ll | 2 +- .../Transforms/InstCombine/bitcast-vec-canon.ll | 4 +- llvm/test/Transforms/InstCombine/bitcast.ll | 6 +- .../InstCombine/broadcast-inseltpoison.ll | 4 +- llvm/test/Transforms/InstCombine/broadcast.ll | 4 +- llvm/test/Transforms/InstCombine/cast.ll | 8 +- llvm/test/Transforms/InstCombine/ctpop.ll | 6 +- llvm/test/Transforms/InstCombine/getelementptr.ll | 4 +- .../hoist-xor-by-constant-from-xor-by-value.ll | 14 + .../Transforms/InstCombine/insert-const-shuf.ll | 18 +- .../insert-extract-shuffle-inseltpoison.ll | 14 +- .../InstCombine/insert-extract-shuffle.ll | 14 +- .../InstCombine/masked_intrinsics-inseltpoison.ll | 8 +- .../Transforms/InstCombine/masked_intrinsics.ll | 8 +- llvm/test/Transforms/InstCombine/minmax-fold.ll | 2 +- llvm/test/Transforms/InstCombine/pr2645-0.ll | 3 +- llvm/test/Transforms/InstCombine/select-and-or.ll | 87 + llvm/test/Transforms/InstCombine/shuffle_select.ll | 22 +- .../shufflevector-div-rem-inseltpoison.ll | 2 +- .../InstCombine/shufflevector-div-rem.ll | 2 +- .../Transforms/InstCombine/sub-of-negatible.ll | 2 +- llvm/test/Transforms/InstCombine/trunc.ll | 2 +- .../InstCombine/vec_demanded_elts-inseltpoison.ll | 44 +- .../Transforms/InstCombine/vec_demanded_elts.ll | 44 +- .../InstCombine/vec_shuffle-inseltpoison.ll | 55 +- llvm/test/Transforms/InstCombine/vec_shuffle.ll | 52 +- .../InstCombine/vector-casts-inseltpoison.ll | 2 +- llvm/test/Transforms/InstCombine/vector-casts.ll | 2 +- .../vector_insertelt_shuffle-inseltpoison.ll | 4 +- .../InstCombine/vector_insertelt_shuffle.ll | 22 +- llvm/test/Transforms/InstSimplify/call.ll | 62 +- .../LoopVectorize/X86/invariant-load-gather.ll | 4 +- llvm/test/Transforms/LoopVectorize/control-flow.ll | 2 +- llvm/test/Transforms/LoopVectorize/induction.ll | 2 +- llvm/test/Transforms/LoopVectorize/loop-form.ll | 455 +- .../LoopVectorize/loop-legality-checks.ll | 23 +- .../LoopVectorize/reduction-inloop-pred.ll | 2 +- .../Transforms/LoopVectorize/reduction-inloop.ll | 2 +- .../PhaseOrdering/X86/horiz-math-inseltpoison.ll | 2 +- .../Transforms/PhaseOrdering/X86/horiz-math.ll | 2 +- .../SLPVectorizer/AArch64/getelementptr.ll | 6 +- .../X86/alternate-cast-inseltpoison.ll | 4 +- .../Transforms/SLPVectorizer/X86/alternate-cast.ll | 4 +- .../X86/alternate-int-inseltpoison.ll | 2 +- .../X86/blending-shuffle-inseltpoison.ll | 2 +- .../SimplifyCFG/fold-branch-to-common-dest.ll | 54 + llvm/unittests/Analysis/ValueTrackingTest.cpp | 115 + .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 1 + mlir/include/mlir/IR/FunctionSupport.h | 52 +- mlir/lib/IR/Value.cpp | 5 + 281 files changed, 544201 insertions(+), 454013 deletions(-) create mode 100644 clang/test/CodeGenObjC/objc-dispatch-null-check.m create mode 100644 libcxx/test/std/utilities/function.objects/func.invoke/invoke_c [...] create mode 100644 llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll create mode 100644 llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll create 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llvm/test/MC/AMDGPU/gfx8_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vopc.s delete mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_exp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mimg.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_smem.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopk.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vopc.s create mode 100644 llvm/test/Transforms/IROutliner/outlining-different-output-blocks.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-remapped-outputs.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-same-output-blocks.ll create mode 100644 llvm/test/Transforms/InstCombine/select-and-or.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (9b968d7fc -> be1a5fccb)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards 9b968d7fc 0: update: llvm-linux-qemu: 19158 new be1a5fccb 0: update: llvm-linux-qemu: 19158 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (9b968d7fc) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 14 +- 02-prepare_abe/console.log | 38 +- 03-build_llvm/console.log | 13716 ++++++++++++++-------------- 04-build_linux/console.log | 894 +- 07-check_regression/console.log | 2 +- 07-check_regression/results.regressions | 2 +- 08-update_baseline/console.log | 2 +- 08-update_baseline/results.regressions | 2 +- console.log | 14666 +++++++++++++++--------------- jenkins/manifest.sh | 8 +- 10 files changed, 14668 insertions(+), 14676 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[gcc] branch releases/gcc-9 updated (9db58db5b39 -> 5012380fe15)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch releases/gcc-9 in repository gcc. from 9db58db5b39 This patch fixes PRs 96100 and 96101. new 5012380fe15 i386: Fix __builtin_rint with FE_DOWNWARD rounding directio [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/config/i386/i386.c | 16 +++++++++------- .../gcc.target/i386/{pr96793-1.c => pr96793-2.c} | 2 +- 2 files changed, 10 insertions(+), 8 deletions(-) copy gcc/testsuite/gcc.target/i386/{pr96793-1.c => pr96793-2.c} (92%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[gcc] branch master updated (7e999bd84f4 -> c33fd160762)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 7e999bd84f4 doc: Remove HSAIL from Language Standards new c33fd160762 libgomp: Avoid bad "up" link in libgomp docs The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: libgomp/libgomp.texi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

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