Tcwg-commits December 2020

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig updated (3c1cdd8d0 -> 9f1358b08)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 3c1cdd8d0 0: update: binutils-gcc-linux-qemu: all new 9f1358b08 0: update: binutils-gcc-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (3c1cdd8d0) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-lt [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-prepare_abe/console.log | 424 +- 03-build_abe-binutils/console.log | 11092 ++++----- 04-build_abe-stage1/console.log | 20666 ++++++++-------- 05-build_linux/console.log | 704 +- 06-build_abe-qemu/console.log | 6735 +++-- 07-boot_linux/console.log | 2 +- 08-check_regression/console.log | 8 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 20 +- 09-update_baseline/results.regressions | 2 +- console.log | 39901 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- 13 files changed, 39874 insertions(+), 39860 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O2_LTO updated (d5c45041f14 -> bb7d3af1139)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O2_LTO in repository toolchain/ci/llvm-project. from d5c45041f14 [machinesink] add testcase for more sinking - NFC adds 69f2c79f2ad [ELF] Add a new e_machine value EM_CSKY and add some CSKY r [...] adds 9bee13f8908 Move targetHasSVE function to lldbtest.py adds 1fd7dc40748 When dumping results of StackLifetime, it will print the fo [...] adds 76953321666 Move NativeRegisterContextLinux/RegisterContextPOSIX*_arm t [...] adds 7403e3ee324 Extend PyConcreteType to support intermediate base classes. adds 70523ecfaca [Sparc] Select the UltraSPARC instruction set with the exte [...] adds b3205e2ace4 [scan-view] Explicitly use utf-8 in send_string adds 80186e4efc9 [CMake][TableGen] Simplify code by using list(TRANSFORM) adds 098130fa403 [CMake][Polly] Remove dead CMake code adds 21c0e74c9e7 [CMake][OpenMP] Remove old dead CMake code adds f4835b94f2c [CMake][TableGen] Remove dead CMake version checks adds 04ea680a8cc [cmake] Fix build of attribute plugin example on Windows adds 5350e1b5096 [KnownBits] Implement accurate unsigned and signed max and min adds a98b126696e Add BinaryFormat/ELFRelocs/CSKY.def to LLVM modulemap adds 40f4131fce7 [DWARFYAML] Make the debug_addr section optional. adds 0af4147804a [ARM][CostModel] CodeSize costs for i1 arith ops adds 713c2ad60c1 [GlobalISel] Extend not_cmp_fold to work on conditional exp [...] adds 65f78e73ad5 [SimplifyCFG] Consider cost of combining predicates. adds e7bd058c7e2 [clang-format] Allow configuring list of macros that map to [...] adds 8aa3b8da5db [clang-format] Handle typename macros inside cast expressions adds cd01eec14bc [clang-format] Check that */& after typename macros are poi [...] adds 56fa7d1dc6a [clang-format] Fix formatting of _Atomic() qualifier adds 9a22eba1509 [clang-format] Parse __underlying_type(T) as a type adds 05147d33091 [clang-format] Correctly parse function declarations with T [...] adds 7634c64b612 [OpenMP][AMDGPU] Use DS_Max_Warp_Number instead of WARPSIZE adds 8d64df9f139 [mlir][Vector] Revisit VectorToSCF. adds 81aa66f65f5 Extract infrastructure to ignore intermediate expressions i [...] adds 1a7a2cd7474 [Ignore Expressions][NFC] Refactor to better use `IgnoreExp [...] adds 0dbe2504af8 [X86] Use Register instead of unsigned. NFCI. adds 22fa6b20d92 [X86] Use Register instead of unsigned. NFCI. adds ee68b66d94b [NFC][PowerPC] Add tests for `mul` with big constants. adds 9ad261540da [X86] Use Register instead of unsigned. NFCI. adds aa3fcb96711 [X86][AVX] Add extra vperm2f128+vpermilvar combine coverage adds 71dfdbe2c73 [X86] getFauxShuffleMask - handle insert_subvector(zero, sub, C) adds 7ba0f81934c [X86] Unbreak the build after 22fa6b20d92e adds 56d1f3138b5 [gn build] Port 81aa66f65f5 adds 0478720157f [clang] Prevent that Decl::dump on a CXXRecordDecl deserial [...] adds 9764eb9212c [gn build] Port 0478720157f adds 928c4b4b498 [SCEV] Refactor isHighCostExpansionHelper adds 136eb79a884 [MLIR][Standard] Add `dynamic_tensor_from_elements` operation adds 3097427f93d [obj2yaml] Add support for dumping the .debug_str section. adds 9b645ebfff1 [X86][AVX] Use lowerShuffleWithPERMV in shuffle combining t [...] adds 5bb27e735d3 X86AvoidStoreForwardingBlocks.cpp - use unsigned for Opcode [...] adds 3a86eb03d54 [llvm-readobj/elf] - Introduce Relocation<ELFT> helper. adds e57cbcbdc18 LegalizeTypes.h - remove orphan SplitVSETCC declaration. NFCI. adds 15acdd75439 [MLIR][Shape] Merge `shape` to `std`/`scf` lowerings. adds 1c849ec40a5 [MLIR] Fix Win test due to partial order of CHECK directives adds 3ca8b9a560a [InstCombine] give a name to an intermediate value for easi [...] adds 28aa60aae25 [InstCombine] add test with more unreachable insts; NFC adds 79ea83e104e [SelectionDAG] memcpy expansion of const volatile struct ig [...] adds a8a91533dd6 [X86] Replace EmitX86AddSubSatExpr with EmitX86BinaryIntrin [...] adds 6670f5d1e66 MachineStableHash.h - remove MachineInstr.h include. NFC. adds dbb81881955 [llvm-readobj/elf] - Generalize the code for printing dynam [...] adds 973800dc7cb Revert "[MLIR][Shape] Merge `shape` to `std`/`scf` lowerings." adds 23f700c785a Revert "[clang] Prevent that Decl::dump on a CXXRecordDecl [...] adds bb73fcfd070 [gn build] Port 23f700c785a adds 2853ae3c1b8 [X86] Update SSE/AVX ABS intrinsics to emit llvm.abs.* (PR46851) adds f6db681a789 [X86][SSE] Move llvm.x86.ssse3.pabs.*.128 intrinsics to sss [...] adds 6b954f1b796 [KillTheDoctor/CMake] Add missing keyword PRIVATE in target [...] adds 4368739941e [llvm-readobj] - Remove code duplication when printing dyna [...] adds a5046f7acec [NFC][PowerPC] Add tests in constants-i64.ll. adds 1e1a4a48198 [mlir] Take ValueRange instead of ArrayRef<Value> in Struct [...] adds 4b530f75199 [X86][SSE] Use llvm.abs.* vector intrinsics instead of old [...] adds 96e0f34be79 [X86] Auto upgrade SSE/AVX PABS intrinsics to generic Intri [...] adds 288c582fc93 Follow up of rG5f1cad4d296a, slightly reduced test case. NFC. adds a70f2eb3e39 [MLIR][Shape] Merge `shape` to `std`/`scf` lowerings. adds b22910daab9 [InstCombine] erase instructions leading up to unreachable adds 60162626a5c [X86] Replace UpgradeX86AddSubSatIntrinsics with UpgradeX86 [...] adds 7993431dad0 [X86][SSE] Add test cases for PR47448 adds 9de0a3da6a7 [X86][SSE] Don't use LowerVSETCCWithSUBUS for unsigned comp [...] adds c4056f84282 [Sparc] Add reduced funnel shift test case for PR47303 adds 783d7116dc8 AntiDepBreaker.h - remove unnecessary ScheduleDAG.h include. NFCI. adds 2e1827271cb [flang] Fix link to old repo location in doxygen mainpage. NFC. adds d01280587d9 [analyzer][StdLibraryFunctionsChecker] Add POSIX pthread ha [...] adds 7e5dab5fca4 [flang] Spelling and format edits to README.txt. NFC. adds 8248c2af949 [analyzer][StdLibraryFunctionsChecker] Have proper weak dep [...] adds eb482afaf5b Reduce the number of memory allocations when displaying a w [...] adds 2480a31e5d6 [AMDGPU] SILowerControlFlow::optimizeEndCF should remove em [...] adds 11d8eedfa5b [InstCombine] move/add tests for icmp with mul operands; NFC adds 7a6d6f0f704 [InstCombine] improve folds for icmp with multiply operands [...] adds 1c34ac03a2d LeonPasses.h - remove orphan function declarations. NFCI. adds dfc333050b5 LeonPasses.h - remove unnecessary includes. NFCI. adds 95ca3aacf0f BTFDebug.h - reduce MachineInstr.h include to forward decla [...] adds 4e89a0ab021 MipsISelLowering.h - remove CCState/CCValAssign forward dec [...] adds 5ea9e655efd VPlan.h - remove unnecessary forward declarations. NFCI. adds e52e7ad54de [ms] [llvm-ml] Add support for bitwise named operators (AND [...] adds 2feb6e9b841 [ms] [llvm-ml] Fix STRUCT field alignment adds a3ec4a3158f [ms] [llvm-ml] Allow use of locally-defined variables in ex [...] adds 7a06b166b1a [DAGCombiner] allow more store merging for non-i8 truncated ops adds f3a6f6ccfdd [X86] Pre-commit new test case for D87214. NFC adds 01b3e167575 [X86] Use the same sequence for i128 ISD::ABS on 64-bit tar [...] adds 70207816e35 [InstCombine] add ptr difference tests; NFC adds 8b300679192 [InstCombine] improve fold of pointer differences adds da79b1eecc6 [SelectionDAG][X86][ARM] Teach ExpandIntRes_ABS to use sra+ [...] adds 9fb46a452d4 [SCCP] Compute ranges for supported intrinsics adds ddab4cd83ea [KnownBits] Avoid some copies (NFC) adds bb7d3af1139 Reland [SimplifyCFG][LoopRotate] SimplifyCFG: disable commo [...] No new revisions were added by this update. Summary of changes: .../clang-tidy/modernize/UseAutoCheck.cpp | 2 +- .../readability/SimplifyBooleanExprCheck.cpp | 2 +- clang/docs/ClangFormatStyleOptions.rst | 17 + clang/examples/Attribute/CMakeLists.txt | 2 +- clang/include/clang/AST/Expr.h | 12 +- clang/include/clang/AST/IgnoreExpr.h | 61 ++++ clang/include/clang/Format/Format.h | 19 + .../clang/StaticAnalyzer/Checkers/Checkers.td | 3 +- clang/lib/AST/CMakeLists.txt | 1 + clang/lib/AST/Expr.cpp | 233 +++--------- clang/lib/AST/IgnoreExpr.cpp | 129 +++++++ clang/lib/CodeGen/CGBuiltin.cpp | 35 +- clang/lib/CodeGen/CGExprCXX.cpp | 2 +- clang/lib/Driver/ToolChains/Arch/Sparc.cpp | 9 +- clang/lib/Format/Format.cpp | 2 + clang/lib/Format/FormatToken.cpp | 1 + clang/lib/Format/FormatToken.h | 7 +- clang/lib/Format/FormatTokenLexer.cpp | 2 + clang/lib/Format/TokenAnnotator.cpp | 70 ++-- clang/lib/Sema/SemaExpr.cpp | 2 +- .../Checkers/StdLibraryFunctionsChecker.cpp | 95 +++++ clang/lib/StaticAnalyzer/Core/CallEvent.cpp | 2 +- clang/test/Analysis/analyzer-enabled-checkers.c | 2 +- .../test/Analysis/std-c-library-functions-POSIX.c | 42 +++ ...std-c-library-functions-arg-enabled-checkers.c} | 15 +- .../std-c-library-functions-arg-weakdeps.c | 64 ++++ clang/test/CodeGen/avx2-builtins.c | 12 +- clang/test/CodeGen/avx512bw-builtins.c | 32 +- clang/test/CodeGen/avx512f-builtins.c | 32 +- clang/test/CodeGen/avx512vl-builtins.c | 74 ++-- clang/test/CodeGen/avx512vlbw-builtins.c | 80 ++--- clang/test/CodeGen/ssse3-builtins.c | 12 +- clang/test/Driver/freebsd.c | 2 +- clang/test/Driver/linux-as.c | 4 +- clang/test/Driver/openbsd.c | 2 +- clang/tools/scan-view/share/ScanView.py | 2 +- clang/unittests/Format/FormatTest.cpp | 191 +++++++++- flang/README.md | 11 +- flang/docs/doxygen-mainpage.dox | 2 +- lldb/packages/Python/lldbsuite/test/lldbtest.py | 23 ++ .../Plugins/Process/FreeBSD/FreeBSDThread.cpp | 5 +- .../RegisterContextPOSIXProcessMonitor_arm.cpp | 6 +- .../RegisterContextPOSIXProcessMonitor_arm.h | 4 +- .../Linux/NativeRegisterContextLinux_arm.cpp | 94 +---- .../Process/Linux/NativeRegisterContextLinux_arm.h | 34 +- .../Process/Utility/RegisterContextPOSIX_arm.cpp | 131 ++----- .../Process/Utility/RegisterContextPOSIX_arm.h | 51 +-- .../Process/Utility/RegisterInfoPOSIX_arm.cpp | 104 +++++- .../Process/Utility/RegisterInfoPOSIX_arm.h | 15 +- .../elf-core/RegisterContextPOSIXCore_arm.cpp | 4 +- .../elf-core/RegisterContextPOSIXCore_arm.h | 2 +- .../Plugins/Process/elf-core/ThreadElfCore.cpp | 14 +- .../rw_access_static_config/TestSVERegisters.py | 27 +- llvm/cmake/modules/TableGen.cmake | 20 +- llvm/include/llvm/BinaryFormat/ELF.h | 7 + llvm/include/llvm/BinaryFormat/ELFRelocs/CSKY.def | 74 ++++ llvm/include/llvm/CodeGen/AntiDepBreaker.h | 1 - .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 4 +- llvm/include/llvm/CodeGen/MachineStableHash.h | 4 +- llvm/include/llvm/Object/ELFObjectFile.h | 4 + llvm/include/llvm/ObjectYAML/DWARFYAML.h | 2 +- llvm/include/llvm/Support/KnownBits.h | 16 + llvm/include/llvm/Target/GlobalISel/Combine.td | 2 +- llvm/include/llvm/Transforms/Utils/Local.h | 1 + .../Transforms/Utils/ScalarEvolutionExpander.h | 33 +- .../llvm/Transforms/Utils/SimplifyCFGOptions.h | 2 +- llvm/include/llvm/module.modulemap | 1 + llvm/lib/Analysis/StackLifetime.cpp | 2 +- llvm/lib/Analysis/ValueTracking.cpp | 70 ++-- .../lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp | 35 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 93 +++-- llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 36 +- llvm/lib/CodeGen/MachineStableHash.cpp | 1 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 18 +- .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 28 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 2 - llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 30 +- llvm/lib/IR/AutoUpgrade.cpp | 38 +- llvm/lib/MC/MCParser/MasmParser.cpp | 88 +++-- llvm/lib/Object/ELF.cpp | 9 + llvm/lib/ObjectYAML/DWARFEmitter.cpp | 2 +- llvm/lib/ObjectYAML/DWARFYAML.cpp | 2 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 4 + llvm/lib/Passes/PassBuilder.cpp | 13 +- llvm/lib/Support/KnownBits.cpp | 62 ++++ llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 1 + llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 47 ++- llvm/lib/Target/ARM/ARMTargetMachine.cpp | 3 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 17 +- llvm/lib/Target/BPF/BTFDebug.h | 8 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 1 + llvm/lib/Target/Mips/MipsISelLowering.h | 2 - llvm/lib/Target/Sparc/LeonPasses.cpp | 7 +- llvm/lib/Target/Sparc/LeonPasses.h | 9 +- llvm/lib/Target/X86/X86AsmPrinter.cpp | 2 +- .../Target/X86/X86AvoidStoreForwardingBlocks.cpp | 4 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 8 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 142 ++++---- llvm/lib/Target/X86/X86InstrInfo.cpp | 10 +- llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 3 + .../Transforms/InstCombine/InstCombineAddSub.cpp | 36 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 17 +- .../Transforms/InstCombine/InstCombineInternal.h | 1 + .../InstCombine/InstructionCombining.cpp | 13 + llvm/lib/Transforms/Scalar/SCCP.cpp | 19 + llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp | 4 +- .../Transforms/Utils/ScalarEvolutionExpander.cpp | 289 ++++++++------- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 28 +- llvm/lib/Transforms/Vectorize/VPlan.h | 2 - llvm/test/Analysis/CostModel/ARM/arith.ll | 6 +- .../GlobalISel/prelegalizercombiner-invert-cmp.mir | 118 +++++++ llvm/test/CodeGen/AArch64/merge-trunc-store.ll | 49 ++- llvm/test/CodeGen/AMDGPU/collapse-endcf.mir | 32 +- llvm/test/CodeGen/ARM/memcpy-const-vol-struct.ll | 18 + llvm/test/CodeGen/ARM/pr45824.ll | 57 ++- llvm/test/CodeGen/PowerPC/constants-i64.ll | 45 ++- llvm/test/CodeGen/PowerPC/mulli.ll | 70 ++++ llvm/test/CodeGen/SPARC/fshl.ll | 48 +++ llvm/test/CodeGen/Thumb2/mve-abs.ll | 35 +- llvm/test/CodeGen/X86/abs.ll | 51 ++- llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll | 24 +- llvm/test/CodeGen/X86/combine-abs.ll | 160 +++++++-- llvm/test/CodeGen/X86/iabs.ll | 47 +++ llvm/test/CodeGen/X86/insertelement-ones.ll | 10 +- .../CodeGen/X86/shuffle-strided-with-offset-256.ll | 52 ++- .../CodeGen/X86/shuffle-strided-with-offset-512.ll | 23 +- .../test/CodeGen/X86/ssse3-intrinsics-fast-isel.ll | 24 +- .../CodeGen/X86/ssse3-intrinsics-x86-upgrade.ll | 69 ++++ llvm/test/CodeGen/X86/ssse3-intrinsics-x86.ll | 63 ---- llvm/test/CodeGen/X86/stores-merging.ll | 22 +- llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll | 9 +- llvm/test/CodeGen/X86/vector-shuffle-avx512.ll | 35 +- .../CodeGen/X86/vector-shuffle-combining-avx.ll | 35 +- .../CodeGen/X86/vector-shuffle-combining-avx2.ll | 29 +- llvm/test/CodeGen/X86/vector-unsigned-cmp.ll | 95 ++++- llvm/test/CodeGen/X86/vector-zext.ll | 19 +- llvm/test/Transforms/InstCombine/assume.ll | 45 ++- llvm/test/Transforms/InstCombine/icmp-mul.ll | 303 ++++++++++++++++ llvm/test/Transforms/InstCombine/icmp.ll | 52 --- .../InstCombine/pr33689_same_bitwidth.ll | 2 - llvm/test/Transforms/InstCombine/sub-gep.ll | 58 ++- llvm/test/Transforms/InstCombine/sub.ll | 35 +- llvm/test/Transforms/PGOProfile/chr.ll | 7 + .../loop-rotation-vs-common-code-hoisting.ll | 29 +- llvm/test/Transforms/SCCP/intrinsics.ll | 18 +- .../SimplifyCFG/ARM/branch-fold-threshold.ll | 162 ++++++--- .../Transforms/SimplifyCFG/common-code-hoisting.ll | 2 +- .../tools/llvm-ml/named_bitwise_operators.test | 20 ++ llvm/test/tools/llvm-ml/struct.test | 32 +- llvm/test/tools/llvm-ml/variable.test | 13 + llvm/test/tools/obj2yaml/ELF/DWARF/debug-str.yaml | 101 ++++++ llvm/test/tools/yaml2obj/ELF/DWARF/debug-addr.yaml | 15 + llvm/tools/llvm-readobj/ELFDumper.cpp | 296 ++++++---------- llvm/tools/obj2yaml/elf2yaml.cpp | 33 +- .../unittests/CodeGen/GlobalISel/KnownBitsTest.cpp | 4 +- llvm/unittests/Object/ELFObjectFileTest.cpp | 15 + llvm/unittests/Support/KnownBitsTest.cpp | 44 ++- llvm/utils/KillTheDoctor/CMakeLists.txt | 1 + llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn | 1 + mlir/include/mlir/Conversion/Passes.h | 1 - mlir/include/mlir/Conversion/Passes.td | 12 +- .../mlir/Conversion/ShapeToSCF/ShapeToSCF.h | 27 -- mlir/include/mlir/Dialect/SCF/SCFOps.td | 8 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 49 +++ mlir/include/mlir/Dialect/Vector/EDSC/Intrinsics.h | 17 +- mlir/include/mlir/Dialect/Vector/VectorOps.td | 29 +- mlir/include/mlir/EDSC/Builders.h | 4 +- .../Dialect/Vector/CPU/test-transfer-to-loops.mlir | 81 +++++ mlir/lib/Bindings/Python/IRModules.cpp | 306 ++++++++-------- mlir/lib/Conversion/CMakeLists.txt | 1 - mlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp | 3 +- .../lib/Conversion/SCFToStandard/SCFToStandard.cpp | 4 +- mlir/lib/Conversion/ShapeToSCF/CMakeLists.txt | 19 - mlir/lib/Conversion/ShapeToSCF/ShapeToSCF.cpp | 337 ------------------ .../Conversion/ShapeToStandard/ShapeToStandard.cpp | 391 +++++++++++++++++---- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 14 +- mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp | 35 +- mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 7 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 2 +- mlir/lib/Dialect/Linalg/Transforms/Loops.cpp | 2 +- .../Dialect/Linalg/Transforms/Vectorization.cpp | 16 +- mlir/lib/Dialect/SCF/SCF.cpp | 8 +- mlir/lib/Dialect/Shape/IR/Shape.cpp | 2 +- .../Shape/Transforms/ShapeToShapeLowering.cpp | 2 +- mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 62 +++- mlir/lib/Dialect/Vector/VectorOps.cpp | 24 ++ mlir/test/Bindings/Python/ir_types.py | 29 +- mlir/test/Conversion/ShapeToSCF/shape-to-scf.mlir | 132 ------- .../ShapeToStandard/shape-to-standard.mlir | 211 ++++++++--- .../StandardToLLVM/convert-static-memref-ops.mlir | 6 +- .../Conversion/VectorToSCF/vector-to-loops.mlir | 33 +- mlir/test/Dialect/Standard/invalid.mlir | 66 ++++ mlir/test/Dialect/Standard/ops.mlir | 14 +- mlir/test/EDSC/builder-api-test.cpp | 2 +- openmp/cmake/OpenMPTesting.cmake | 9 +- openmp/libomptarget/deviceRTLs/common/omptarget.h | 2 +- .../deviceRTLs/common/src/data_sharing.cu | 2 +- openmp/runtime/cmake/LibompCheckFortranFlag.cmake | 47 +-- polly/cmake/polly_macros.cmake | 15 - polly/lib/External/CMakeLists.txt | 3 +- 200 files changed, 4787 insertions(+), 2958 deletions(-) create mode 100644 clang/include/clang/AST/IgnoreExpr.h create mode 100644 clang/lib/AST/IgnoreExpr.cpp copy clang/test/Analysis/{analyzer-enabled-checkers.c => std-c-library-functions-a [...] create mode 100644 clang/test/Analysis/std-c-library-functions-arg-weakdeps.c create mode 100644 llvm/include/llvm/BinaryFormat/ELFRelocs/CSKY.def create mode 100644 llvm/test/CodeGen/ARM/memcpy-const-vol-struct.ll create mode 100644 llvm/test/CodeGen/PowerPC/mulli.ll create mode 100644 llvm/test/CodeGen/SPARC/fshl.ll create mode 100644 llvm/test/CodeGen/X86/ssse3-intrinsics-x86-upgrade.ll create mode 100644 llvm/test/tools/llvm-ml/named_bitwise_operators.test create mode 100644 llvm/test/tools/llvm-ml/variable.test create mode 100644 llvm/test/tools/obj2yaml/ELF/DWARF/debug-str.yaml delete mode 100644 mlir/include/mlir/Conversion/ShapeToSCF/ShapeToSCF.h create mode 100644 mlir/integration_test/Dialect/Vector/CPU/test-transfer-to-loops.mlir delete mode 100644 mlir/lib/Conversion/ShapeToSCF/CMakeLists.txt delete mode 100644 mlir/lib/Conversion/ShapeToSCF/ShapeToSCF.cpp delete mode 100644 mlir/test/Conversion/ShapeToSCF/shape-to-scf.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O2_LTO updated (011a20f05 -> fec75340f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O2_LTO in repository toolchain/ci/base-artifacts. from 011a20f05 2: update: binutils-gcc-glibc: 1 new fec75340f 3: reset: llvm-bb7d3af1139c36270bc9948605e06f40e4c51541: 1 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 18 +- 02-prepare_abe/console.log | 138 +- 03-build_abe-binutils/console.log | 11511 ++- 04-build_abe-stage1/console.log | 16293 ++-- 05-build_abe-linux/console.log | 310 +- 06-build_abe-glibc/console.log | 39993 +++++---- 07-build_abe-stage2/console.log | 37069 +++++---- 08-build_llvm-true/console.log | 13298 +-- 10-benchmark--O2_LTO/benchmark-start.log | 2 +- 10-benchmark--O2_LTO/benchmark.log | 4 +- 10-benchmark--O2_LTO/console.log | 174 +- 11-check_regression/console.log | 839 +- 11-check_regression/extra-bisect-params | 2 +- 11-check_regression/results-0.csv | 105 +- 11-check_regression/results-1.csv | 97 +- 11-check_regression/results-brief.csv | 38 +- 11-check_regression/results-compare.csv | 4 +- 11-check_regression/results-full.csv | 107 +- 11-check_regression/results.csv | 48 +- 11-check_regression/results.log | 2494 +- 11-check_regression/results.regressions | 2 + 11-check_regression/trigger-bisect | 4 + 12-update_baseline/console.log | 1609 +- 12-update_baseline/extra-bisect-params | 2 +- 12-update_baseline/results-0.csv | 111 +- 12-update_baseline/results-1.csv | 97 +- 12-update_baseline/results-brief.csv | 38 +- 12-update_baseline/results-compare.csv | 13 +- 12-update_baseline/results-full.csv | 109 +- 12-update_baseline/results.csv | 48 +- 12-update_baseline/results.log | 2596 +- 12-update_baseline/results.regressions | 4 +- console.log | 121252 ++++++++++++++-------------- jenkins/manifest.sh | 18 +- reset-baseline | 0 results | 2 + results_id | 2 +- 37 files changed, 122553 insertions(+), 125898 deletions(-) create mode 100644 11-check_regression/results.regressions create mode 100644 11-check_regression/trigger-bisect create mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-defconfig updated (fde3ae88ee4 -> a8970dff1ae)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-defconfig in repository toolchain/ci/llvm-project. from fde3ae88ee4 [asan][memprof] Declare _DYNAMIC and fix -Wparentheses adds 0b56e3cdda5 [sanitizer] Defined SANITIZER_TEST_HAS_PVALLOC only on glibc adds 99d650b3699 [compiler-rt][test] Make glibc-* feature detection work on [...] adds 60afb58bfee [msan] Delete unused glibc header <execinfo.h> adds d85a198e852 [RISCV] Pattern-match more vector-splatted constants adds a485a59d217 [benchmark] Fixed a build error when using CMake 3.15.1 + NDK-R20 adds 5b17263b6b9 [AMDGPU][MC][NFC] Parser refactoring adds 8c25bb3d0d5 [AMDGPU][MC] Improved errors handling for v_interp* operands adds e673d401994 [RISCV] Define vmsbf.m/vmsif.m/vmsof.m/viota.m/vid.v intrinsics. adds 644da789e36 [AMDGPU] Split edge to make si_if dominate end_cf adds 0999408aea7 [clangd] Add error handling (elog) in code completion. adds c3b9d85bd4b [clang-tidy][NFC] Remove unnecessary headers adds e73f885c988 [PowerPC] Remove redundant COPY_TO_REGCLASS introduced by 8 [...] adds 496fb70b141 [MachO] Fix enum-int mismatch warning adds d55627d221b [flang] Fix bugs in .mod file for abstract interface adds b9a7c89d432 [MIRPrinter] Fix incorrect output of unnamed stack names adds d4ccef38d0b [InstCombine] 'hoist xor-by-constant from xor-by-value': ig [...] adds 4820af99ddc [TableGen] Fix bug in !interleave operator adds 38bfa25387f Revert "[benchmark] Fixed a build error when using CMake 3. [...] adds c7ff2c0da1a [AMDGPU][MC][NFC] Split large asm tests into smaller chunks adds dcd21572f97 [ValueTracking] Fix isKnownNonEqual() with constexpr mul adds e4df6a40dad [LV] Vectorize (some) early and multiple exit loops adds 4ffcd4fe9ac Revert "[LV] Vectorize (some) early and multiple exit loops" adds 4b33b238778 Reapply "[LV] Vectorize (some) early and multiple exit loop [...] adds 30f589c9121 [libc++] Constexpr-proof some machinery in not_fn.pass.cpp. NFCI. adds 7b00e9fae38 [libc++] [P1065] Constexpr invoke, reference_wrapper, mem_f [...] adds 9abc457724b [NewPM][AMDGPU] Port amdgpu-simplifylib/amdgpu-usenative adds dd756e3e848 [libc++] Fix a test failure in 7b00e9fae3 (D93815). adds 76a718ee939 [lldb] Deduplicate some lldb-server tests adds cf8f682c2dd [RISCV] Adjust tested vor ops for more stable tests. NFC. adds 34405b41d61 [CodeGen][ObjC] Destroy callee-destroyed arguments in the c [...] adds 6d02d12e172 [AMDGPU][MC][NFC] Added more tests for flat_global adds f931290308a [PowerPC] Parse and ignore .machine adds ef93f7a11c3 [SimplifyCFG] FoldBranchToCommonDest: gracefully handle unr [...] adds 87c032f7b44 [IR] Make Value::getType() work better with invalid IR. adds 1351f719d49 [InstSimplify] add tests for ctpop; NFC (PR48608) adds 236c4524a7c [InstSimplify] remove ctpop of 1 (low) bit adds b4655a0815d [NFC][sanitizer] Remove unused typedef adds 4a16c507cb6 [InstCombine] Disable unsafe select transform behind a flag adds 0f2c180163a [ValueTracking] Implement impliesPoison adds 44ee14f993f [WebAssembly][NFC] Finish cleaning up SIMD tablegen adds 6c36286a2e1 [NewPM] Fix CGSCCOptimizerLateEPCallbacks place in pipeline adds 5e09e9979bc [WebAssembly] Prototype extending pairwise add instructions adds 25007b4d7e0 [MLIR][NFC] Change FunctionLike::setAllArgAttrs/setAllResul [...] adds e6ae623314b [IROutliner] Adding support for consolidating functions wit [...] adds 85af1d6257f [test] Fix pr45360.ll under NPM adds 4ddf140c004 Fix PR35902: incorrect alignment used for ubsan check. adds c0a2d3b90b3 [libc++] Fix a test failure in 7b00e9fae3 (D93815). adds f782d5ea86f [flang] Detect call to abstract interface adds 4646de5d75c [NewPM][CodeGen] Introduce CodeGenPassBuilder to help build [...] adds 94427af60c6 Revert "[NewPM][CodeGen] Introduce CodeGenPassBuilder to he [...] adds 0e9abcfc192 [AMDGPU][NewPM] Port amdgpu-promote-alloca(-to-vector) adds 4f568fbd216 [PowerPC] Do not emit HW loop when TLS var accessed in PHI [...] adds 8b67c98c477 [UpdateTestChecks] Fix update_analyze_test_checks.py failure adds f3f9ce3b794 [RISCV] Define vmclr.m/vmset.m intrinsics. adds 1e23802507d [IROutliner] Merging identical output blocks for extracted [...] adds 1e3ed09165c [CodeGen] Use llvm::append_range (NFC) adds 5d2529f28f9 [Scalar] Construct SmallVector with iterator ranges (NFC) adds 2883cd98f3c [CFGPrinter] Use succ_empty (NFC) adds 55d13e6a867 [asan][test] Annotate glibc specific tests with REQUIRES: g [...] adds c2ef06d3dd0 [NewPM] Port infer-address-spaces adds c5d100fdf2d [test] Fix conditional-temporaries.cpp adds a8970dff1ae [ubsan][test] FLush stdout before checking interleaved stdo [...] No new revisions were added by this update. Summary of changes: clang-tools-extra/clang-tidy/ClangTidy.cpp | 4 - clang-tools-extra/clang-tidy/ClangTidyCheck.cpp | 2 - .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 6 +- clang-tools-extra/clang-tidy/ClangTidyModule.h | 2 - clang-tools-extra/clang-tidy/ClangTidyOptions.cpp | 1 - .../clang-tidy/ClangTidyProfiling.cpp | 2 - clang-tools-extra/clangd/CodeComplete.cpp | 12 +- clang/include/clang/AST/Decl.h | 3 + clang/include/clang/Basic/BuiltinsWebAssembly.def | 6 + clang/lib/AST/Decl.cpp | 11 + clang/lib/CodeGen/CGBuiltin.cpp | 22 + clang/lib/CodeGen/CGCXXABI.cpp | 4 +- clang/lib/CodeGen/CGObjCMac.cpp | 22 +- clang/lib/CodeGen/CodeGenFunction.cpp | 8 +- clang/test/CodeGen/builtins-wasm.c | 28 + clang/test/CodeGenCXX/catch-undef-behavior.cpp | 13 +- clang/test/CodeGenCXX/conditional-temporaries.cpp | 25 +- clang/test/CodeGenObjC/objc-dispatch-null-check.m | 34 + clang/test/CodeGenObjC/strong-in-c-struct.m | 18 + clang/test/CodeGenObjC/weak-in-c-struct.m | 19 + clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm | 53 + compiler-rt/lib/msan/msan_linux.cpp | 1 - .../lib/sanitizer_common/sanitizer_stacktrace.h | 2 - .../sanitizer_common/tests/sanitizer_test_utils.h | 4 +- .../test/asan/TestCases/Linux/printf-fortify-1.c | 2 +- .../test/asan/TestCases/Linux/printf-fortify-2.c | 2 +- .../test/asan/TestCases/Linux/printf-fortify-3.c | 2 +- .../test/asan/TestCases/Linux/printf-fortify-4.c | 2 +- .../test/asan/TestCases/Linux/printf-fortify-5.c | 2 +- .../TestCases/Linux/swapcontext_annotation.cpp | 4 +- .../test/asan/TestCases/Linux/swapcontext_test.cpp | 4 +- .../test/asan/TestCases/malloc-no-intercept.c | 2 +- compiler-rt/test/lit.common.cfg.py | 12 +- compiler-rt/test/ubsan/TestCases/Misc/monitor.cpp | 1 + flang/lib/Semantics/mod-file.cpp | 11 +- flang/lib/Semantics/resolve-names.cpp | 10 +- flang/test/Semantics/modfile10.f90 | 37 + flang/test/Semantics/procinterface01.f90 | 2 +- flang/test/Semantics/resolve20.f90 | 11 + flang/test/Semantics/symbol15.f90 | 2 +- libcxx/docs/Cxx2aStatusPaperStatus.csv | 2 +- libcxx/docs/FeatureTestMacroTable.rst | 2 +- libcxx/include/__functional_base | 19 +- libcxx/include/functional | 54 +- libcxx/include/type_traits | 14 +- libcxx/include/version | 5 +- .../support.limits.general/array.version.pass.cpp | 26 - .../functional.version.pass.cpp | 30 +- .../iterator.version.pass.cpp | 26 - .../string_view.version.pass.cpp | 32 +- .../support.limits.general/tuple.version.pass.cpp | 26 - .../utility.version.pass.cpp | 26 - .../version.version.pass.cpp | 30 +- .../func.invoke/invoke_constexpr.pass.cpp | 279 + .../func.memfn/member_data.pass.cpp | 11 +- .../func.memfn/member_function.pass.cpp | 23 +- .../func.memfn/member_function_const.pass.cpp | 23 +- .../function.objects/func.not_fn/not_fn.pass.cpp | 248 +- .../func.search.default/default.pass.cpp | 21 +- .../func.search.default/default.pred.pass.cpp | 75 +- .../generate_feature_test_macro_components.py | 7 +- .../MachO/MachONormalizedFileFromAtoms.cpp | 2 +- .../API/tools/lldb-server/TestGdbRemoteAttach.py | 20 +- .../tools/lldb-server/TestGdbRemoteCompletion.py | 2 +- .../lldb-server/TestGdbRemoteExpeditedRegisters.py | 106 +- .../API/tools/lldb-server/TestGdbRemoteHostInfo.py | 18 +- .../lldb-server/TestGdbRemote_qThreadStopInfo.py | 80 +- .../commandline/TestGdbRemoteConnection.py | 17 - .../signal-filtering/TestGdbRemote_QPassSignals.py | 4 - llvm/include/llvm/Analysis/ValueTracking.h | 5 + llvm/include/llvm/IR/IntrinsicsRISCV.td | 56 + llvm/include/llvm/IR/IntrinsicsWebAssembly.td | 9 + llvm/include/llvm/Transforms/IPO/IROutliner.h | 23 + .../llvm/Transforms/InstCombine/InstCombiner.h | 13 + .../llvm/Transforms/Scalar/InferAddressSpaces.h | 27 + llvm/lib/Analysis/CFGPrinter.cpp | 2 +- llvm/lib/Analysis/InstructionSimplify.cpp | 9 + llvm/lib/Analysis/ValueTracking.cpp | 69 +- llvm/lib/CodeGen/AsmPrinter/WinCFGuard.cpp | 3 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 2 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineFunction.cpp | 2 +- llvm/lib/CodeGen/MachineModuleInfo.cpp | 3 +- llvm/lib/CodeGen/MachineOutliner.cpp | 6 +- llvm/lib/CodeGen/MachinePipeliner.cpp | 2 +- llvm/lib/CodeGen/RDFLiveness.cpp | 4 +- llvm/lib/CodeGen/ReachingDefAnalysis.cpp | 3 +- llvm/lib/CodeGen/RegAllocPBQP.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 4 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 2 +- .../CodeGen/SelectionDAG/StatepointLowering.cpp | 2 +- llvm/lib/Passes/PassBuilder.cpp | 23 +- llvm/lib/Passes/PassRegistry.def | 1 + llvm/lib/TableGen/Record.cpp | 37 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 28 +- llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp | 64 + llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp | 160 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 59 + llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h | 3 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 194 +- llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 13 +- llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 6 +- llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 8 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 68 +- llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp | 33 + llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 23 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 330 +- .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 848 +- .../Target/WebAssembly/WebAssemblyRegStackify.cpp | 2 +- llvm/lib/Transforms/IPO/IROutliner.cpp | 558 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 10 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 47 +- llvm/lib/Transforms/Scalar/GVN.cpp | 2 +- llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp | 94 +- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp | 8 +- llvm/lib/Transforms/Scalar/Reassociate.cpp | 4 +- llvm/lib/Transforms/Scalar/SROA.cpp | 4 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 7 + .../Vectorize/LoopVectorizationLegality.cpp | 25 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 59 +- .../test/Analysis/ValueTracking/known-non-equal.ll | 12 + .../test/CodeGen/AMDGPU/infer-addrpace-pipeline.ll | 15 +- llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll | 3 + llvm/test/CodeGen/AMDGPU/simplify-libcalls2.ll | 1 + llvm/test/CodeGen/AMDGPU/sroa-before-unroll.ll | 2 + .../AMDGPU/unstructured-cfg-def-use-issue.ll | 333 + llvm/test/CodeGen/AMDGPU/vector-alloca.ll | 1 + llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll | 23 + llvm/test/CodeGen/PowerPC/alloca-crspill.ll | 8 +- llvm/test/CodeGen/PowerPC/pr48527.ll | 70 + llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll | 545 + llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll | 673 + llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll | 722 + llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll | 882 + llvm/test/CodeGen/RISCV/rvv/vmclr-rv32.ll | 99 + llvm/test/CodeGen/RISCV/rvv/vmclr-rv64.ll | 99 + llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmset-rv32.ll | 99 + llvm/test/CodeGen/RISCV/rvv/vmset-rv64.ll | 99 + llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv32.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv64.ll | 88 +- llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll | 41 + llvm/test/MC/AMDGPU/flat-global.s | 40 + llvm/test/MC/AMDGPU/gfx10_asm_all.s | 126143 ------------------ llvm/test/MC/AMDGPU/gfx10_asm_ds.s | 6987 + llvm/test/MC/AMDGPU/gfx10_asm_flat.s | 128 + llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s | 2289 + llvm/test/MC/AMDGPU/gfx10_asm_smem.s | 1194 + llvm/test/MC/AMDGPU/gfx10_asm_sop.s | 10072 ++ llvm/test/MC/AMDGPU/gfx10_asm_vop1.s | 16229 +++ llvm/test/MC/AMDGPU/gfx10_asm_vop2.s | 13092 ++ llvm/test/MC/AMDGPU/gfx10_asm_vop3.s | 13141 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopc.s | 11576 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s | 21692 +++ llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s | 13816 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s | 15975 +++ llvm/test/MC/AMDGPU/gfx10_err_pos.s | 51 +- llvm/test/MC/AMDGPU/gfx7_asm_all.s | 86860 ------------ llvm/test/MC/AMDGPU/gfx7_asm_ds.s | 3055 + llvm/test/MC/AMDGPU/gfx7_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx7_asm_flat.s | 691 + llvm/test/MC/AMDGPU/gfx7_asm_mimg.s | 6661 + llvm/test/MC/AMDGPU/gfx7_asm_mtbuf.s | 1369 + llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s | 5371 + llvm/test/MC/AMDGPU/gfx7_asm_smrd.s | 751 + llvm/test/MC/AMDGPU/gfx7_asm_sop1.s | 4096 + llvm/test/MC/AMDGPU/gfx7_asm_sop2.s | 6832 + llvm/test/MC/AMDGPU/gfx7_asm_sopc.s | 2266 + llvm/test/MC/AMDGPU/gfx7_asm_sopk.s | 850 + llvm/test/MC/AMDGPU/gfx7_asm_sopp.s | 145 + llvm/test/MC/AMDGPU/gfx7_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx7_asm_vop1.s | 4576 + llvm/test/MC/AMDGPU/gfx7_asm_vop2.s | 3796 + llvm/test/MC/AMDGPU/gfx7_asm_vop3.s | 41875 ++++++ llvm/test/MC/AMDGPU/gfx7_asm_vop3_e64.s | 10534 ++ llvm/test/MC/AMDGPU/gfx7_asm_vopc.s | 14113 ++ llvm/test/MC/AMDGPU/gfx8_asm_all.s | 119543 ----------------- llvm/test/MC/AMDGPU/gfx8_asm_ds.s | 3160 + llvm/test/MC/AMDGPU/gfx8_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx8_asm_flat.s | 601 + llvm/test/MC/AMDGPU/gfx8_asm_mimg.s | 6865 + llvm/test/MC/AMDGPU/gfx8_asm_mtbuf.s | 2689 + llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s | 5488 + llvm/test/MC/AMDGPU/gfx8_asm_smem.s | 1165 + llvm/test/MC/AMDGPU/gfx8_asm_sop1.s | 4153 + llvm/test/MC/AMDGPU/gfx8_asm_sop2.s | 6952 + llvm/test/MC/AMDGPU/gfx8_asm_sopc.s | 2545 + llvm/test/MC/AMDGPU/gfx8_asm_sopk.s | 850 + llvm/test/MC/AMDGPU/gfx8_asm_sopp.s | 163 + llvm/test/MC/AMDGPU/gfx8_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx8_asm_vop1.s | 13768 ++ llvm/test/MC/AMDGPU/gfx8_asm_vop2.s | 12568 ++ llvm/test/MC/AMDGPU/gfx8_asm_vop3.s | 43843 ++++++ llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s | 13501 ++ llvm/test/MC/AMDGPU/gfx8_asm_vopc.s | 22963 ++++ llvm/test/MC/AMDGPU/gfx9_asm_all.s | 119325 ----------------- llvm/test/MC/AMDGPU/gfx9_asm_ds.s | 3364 + llvm/test/MC/AMDGPU/gfx9_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx9_asm_flat.s | 4303 + llvm/test/MC/AMDGPU/gfx9_asm_mimg.s | 7108 + llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s | 2497 + llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s | 5638 + llvm/test/MC/AMDGPU/gfx9_asm_smem.s | 4477 + llvm/test/MC/AMDGPU/gfx9_asm_sop1.s | 3634 + llvm/test/MC/AMDGPU/gfx9_asm_sop2.s | 6880 + llvm/test/MC/AMDGPU/gfx9_asm_sopc.s | 2113 + llvm/test/MC/AMDGPU/gfx9_asm_sopk.s | 652 + llvm/test/MC/AMDGPU/gfx9_asm_sopp.s | 166 + llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx9_asm_vop1.s | 17017 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop2.s | 14962 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop3.s | 37702 ++++++ llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s | 16642 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s | 3484 + llvm/test/MC/AMDGPU/gfx9_asm_vopc.s | 29311 ++++ llvm/test/MC/AMDGPU/vintrp-err.s | 53 +- llvm/test/MC/PowerPC/ppc-machine.s | 5 + llvm/test/MC/WebAssembly/simd-encodings.s | 12 + llvm/test/Other/new-pm-defaults.ll | 2 +- llvm/test/TableGen/interleave.td | 9 + llvm/test/Transforms/IROutliner/extraction.ll | 46 +- llvm/test/Transforms/IROutliner/illegal-assumes.ll | 22 +- llvm/test/Transforms/IROutliner/illegal-memcpy.ll | 40 +- llvm/test/Transforms/IROutliner/illegal-memmove.ll | 40 +- llvm/test/Transforms/IROutliner/illegal-vaarg.ll | 30 +- .../outlining-different-output-blocks.ll | 110 + .../IROutliner/outlining-remapped-outputs.ll | 74 + .../IROutliner/outlining-same-output-blocks.ll | 98 + llvm/test/Transforms/IndVarSimplify/X86/pr45360.ll | 3 +- .../AMDGPU/infer-address-space.ll | 1 + llvm/test/Transforms/InstCombine/ctpop.ll | 6 +- .../hoist-xor-by-constant-from-xor-by-value.ll | 14 + llvm/test/Transforms/InstCombine/select-and-or.ll | 87 + llvm/test/Transforms/InstSimplify/call.ll | 62 +- llvm/test/Transforms/LoopVectorize/control-flow.ll | 2 +- llvm/test/Transforms/LoopVectorize/loop-form.ll | 455 +- .../LoopVectorize/loop-legality-checks.ll | 23 +- .../SimplifyCFG/fold-branch-to-common-dest.ll | 54 + llvm/tools/opt/opt.cpp | 8 +- llvm/unittests/Analysis/ValueTrackingTest.cpp | 53 + .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 1 + llvm/utils/update_analyze_test_checks.py | 5 +- mlir/include/mlir/IR/FunctionSupport.h | 52 +- mlir/lib/IR/Value.cpp | 5 + 251 files changed, 544543 insertions(+), 453632 deletions(-) create mode 100644 clang/test/CodeGenObjC/objc-dispatch-null-check.m create mode 100644 libcxx/test/std/utilities/function.objects/func.invoke/invoke_c [...] create mode 100644 llvm/include/llvm/Transforms/Scalar/InferAddressSpaces.h create mode 100644 llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll create mode 100644 llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll create mode 100644 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llvm/test/MC/AMDGPU/gfx9_asm_mimg.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_smem.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopk.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vopc.s create mode 100644 llvm/test/Transforms/IROutliner/outlining-different-output-blocks.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-remapped-outputs.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-same-output-blocks.ll create mode 100644 llvm/test/Transforms/InstCombine/select-and-or.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-defconfig updated (a086cc0c4 -> 6b917fa18)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-defconfig in repository toolchain/ci/base-artifacts. discards a086cc0c4 0: update: llvm-linux-qemu: boot new 6b917fa18 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a086cc0c4) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 68 +- 02-prepare_abe/console.log | 436 +- 03-build_llvm/console.log | 13503 ++++++++++++----------- 04-build_linux/console.log | 752 +- 05-build_abe-qemu/console.log | 6792 ++++++------ 06-boot_linux/console.log | 494 +- 07-check_regression/console.log | 12 +- 08-update_baseline/console.log | 18 +- console.log | 22075 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 10 files changed, 22076 insertions(+), 22082 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig updated (fde3ae88ee4 -> a8970dff1ae)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/llvm-project. from fde3ae88ee4 [asan][memprof] Declare _DYNAMIC and fix -Wparentheses adds 0b56e3cdda5 [sanitizer] Defined SANITIZER_TEST_HAS_PVALLOC only on glibc adds 99d650b3699 [compiler-rt][test] Make glibc-* feature detection work on [...] adds 60afb58bfee [msan] Delete unused glibc header <execinfo.h> adds d85a198e852 [RISCV] Pattern-match more vector-splatted constants adds a485a59d217 [benchmark] Fixed a build error when using CMake 3.15.1 + NDK-R20 adds 5b17263b6b9 [AMDGPU][MC][NFC] Parser refactoring adds 8c25bb3d0d5 [AMDGPU][MC] Improved errors handling for v_interp* operands adds e673d401994 [RISCV] Define vmsbf.m/vmsif.m/vmsof.m/viota.m/vid.v intrinsics. adds 644da789e36 [AMDGPU] Split edge to make si_if dominate end_cf adds 0999408aea7 [clangd] Add error handling (elog) in code completion. adds c3b9d85bd4b [clang-tidy][NFC] Remove unnecessary headers adds e73f885c988 [PowerPC] Remove redundant COPY_TO_REGCLASS introduced by 8 [...] adds 496fb70b141 [MachO] Fix enum-int mismatch warning adds d55627d221b [flang] Fix bugs in .mod file for abstract interface adds b9a7c89d432 [MIRPrinter] Fix incorrect output of unnamed stack names adds d4ccef38d0b [InstCombine] 'hoist xor-by-constant from xor-by-value': ig [...] adds 4820af99ddc [TableGen] Fix bug in !interleave operator adds 38bfa25387f Revert "[benchmark] Fixed a build error when using CMake 3. [...] adds c7ff2c0da1a [AMDGPU][MC][NFC] Split large asm tests into smaller chunks adds dcd21572f97 [ValueTracking] Fix isKnownNonEqual() with constexpr mul adds e4df6a40dad [LV] Vectorize (some) early and multiple exit loops adds 4ffcd4fe9ac Revert "[LV] Vectorize (some) early and multiple exit loops" adds 4b33b238778 Reapply "[LV] Vectorize (some) early and multiple exit loop [...] adds 30f589c9121 [libc++] Constexpr-proof some machinery in not_fn.pass.cpp. NFCI. adds 7b00e9fae38 [libc++] [P1065] Constexpr invoke, reference_wrapper, mem_f [...] adds 9abc457724b [NewPM][AMDGPU] Port amdgpu-simplifylib/amdgpu-usenative adds dd756e3e848 [libc++] Fix a test failure in 7b00e9fae3 (D93815). adds 76a718ee939 [lldb] Deduplicate some lldb-server tests adds cf8f682c2dd [RISCV] Adjust tested vor ops for more stable tests. NFC. adds 34405b41d61 [CodeGen][ObjC] Destroy callee-destroyed arguments in the c [...] adds 6d02d12e172 [AMDGPU][MC][NFC] Added more tests for flat_global adds f931290308a [PowerPC] Parse and ignore .machine adds ef93f7a11c3 [SimplifyCFG] FoldBranchToCommonDest: gracefully handle unr [...] adds 87c032f7b44 [IR] Make Value::getType() work better with invalid IR. adds 1351f719d49 [InstSimplify] add tests for ctpop; NFC (PR48608) adds 236c4524a7c [InstSimplify] remove ctpop of 1 (low) bit adds b4655a0815d [NFC][sanitizer] Remove unused typedef adds 4a16c507cb6 [InstCombine] Disable unsafe select transform behind a flag adds 0f2c180163a [ValueTracking] Implement impliesPoison adds 44ee14f993f [WebAssembly][NFC] Finish cleaning up SIMD tablegen adds 6c36286a2e1 [NewPM] Fix CGSCCOptimizerLateEPCallbacks place in pipeline adds 5e09e9979bc [WebAssembly] Prototype extending pairwise add instructions adds 25007b4d7e0 [MLIR][NFC] Change FunctionLike::setAllArgAttrs/setAllResul [...] adds e6ae623314b [IROutliner] Adding support for consolidating functions wit [...] adds 85af1d6257f [test] Fix pr45360.ll under NPM adds 4ddf140c004 Fix PR35902: incorrect alignment used for ubsan check. adds c0a2d3b90b3 [libc++] Fix a test failure in 7b00e9fae3 (D93815). adds f782d5ea86f [flang] Detect call to abstract interface adds 4646de5d75c [NewPM][CodeGen] Introduce CodeGenPassBuilder to help build [...] adds 94427af60c6 Revert "[NewPM][CodeGen] Introduce CodeGenPassBuilder to he [...] adds 0e9abcfc192 [AMDGPU][NewPM] Port amdgpu-promote-alloca(-to-vector) adds 4f568fbd216 [PowerPC] Do not emit HW loop when TLS var accessed in PHI [...] adds 8b67c98c477 [UpdateTestChecks] Fix update_analyze_test_checks.py failure adds f3f9ce3b794 [RISCV] Define vmclr.m/vmset.m intrinsics. adds 1e23802507d [IROutliner] Merging identical output blocks for extracted [...] new 1e3ed09165c [CodeGen] Use llvm::append_range (NFC) new 5d2529f28f9 [Scalar] Construct SmallVector with iterator ranges (NFC) new 2883cd98f3c [CFGPrinter] Use succ_empty (NFC) new 55d13e6a867 [asan][test] Annotate glibc specific tests with REQUIRES: g [...] new c2ef06d3dd0 [NewPM] Port infer-address-spaces new c5d100fdf2d [test] Fix conditional-temporaries.cpp new a8970dff1ae [ubsan][test] FLush stdout before checking interleaved stdo [...] The 7 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clang-tidy/ClangTidy.cpp | 4 - clang-tools-extra/clang-tidy/ClangTidyCheck.cpp | 2 - .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 6 +- clang-tools-extra/clang-tidy/ClangTidyModule.h | 2 - clang-tools-extra/clang-tidy/ClangTidyOptions.cpp | 1 - .../clang-tidy/ClangTidyProfiling.cpp | 2 - clang-tools-extra/clangd/CodeComplete.cpp | 12 +- clang/include/clang/AST/Decl.h | 3 + clang/include/clang/Basic/BuiltinsWebAssembly.def | 6 + clang/lib/AST/Decl.cpp | 11 + clang/lib/CodeGen/CGBuiltin.cpp | 22 + clang/lib/CodeGen/CGCXXABI.cpp | 4 +- clang/lib/CodeGen/CGObjCMac.cpp | 22 +- clang/lib/CodeGen/CodeGenFunction.cpp | 8 +- clang/test/CodeGen/builtins-wasm.c | 28 + clang/test/CodeGenCXX/catch-undef-behavior.cpp | 13 +- clang/test/CodeGenCXX/conditional-temporaries.cpp | 25 +- clang/test/CodeGenObjC/objc-dispatch-null-check.m | 34 + clang/test/CodeGenObjC/strong-in-c-struct.m | 18 + clang/test/CodeGenObjC/weak-in-c-struct.m | 19 + clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm | 53 + compiler-rt/lib/msan/msan_linux.cpp | 1 - .../lib/sanitizer_common/sanitizer_stacktrace.h | 2 - .../sanitizer_common/tests/sanitizer_test_utils.h | 4 +- .../test/asan/TestCases/Linux/printf-fortify-1.c | 2 +- .../test/asan/TestCases/Linux/printf-fortify-2.c | 2 +- .../test/asan/TestCases/Linux/printf-fortify-3.c | 2 +- .../test/asan/TestCases/Linux/printf-fortify-4.c | 2 +- .../test/asan/TestCases/Linux/printf-fortify-5.c | 2 +- .../TestCases/Linux/swapcontext_annotation.cpp | 4 +- .../test/asan/TestCases/Linux/swapcontext_test.cpp | 4 +- .../test/asan/TestCases/malloc-no-intercept.c | 2 +- compiler-rt/test/lit.common.cfg.py | 12 +- compiler-rt/test/ubsan/TestCases/Misc/monitor.cpp | 1 + flang/lib/Semantics/mod-file.cpp | 11 +- flang/lib/Semantics/resolve-names.cpp | 10 +- flang/test/Semantics/modfile10.f90 | 37 + flang/test/Semantics/procinterface01.f90 | 2 +- flang/test/Semantics/resolve20.f90 | 11 + flang/test/Semantics/symbol15.f90 | 2 +- libcxx/docs/Cxx2aStatusPaperStatus.csv | 2 +- libcxx/docs/FeatureTestMacroTable.rst | 2 +- libcxx/include/__functional_base | 19 +- libcxx/include/functional | 54 +- libcxx/include/type_traits | 14 +- libcxx/include/version | 5 +- .../support.limits.general/array.version.pass.cpp | 26 - .../functional.version.pass.cpp | 30 +- .../iterator.version.pass.cpp | 26 - .../string_view.version.pass.cpp | 32 +- .../support.limits.general/tuple.version.pass.cpp | 26 - .../utility.version.pass.cpp | 26 - .../version.version.pass.cpp | 30 +- .../func.invoke/invoke_constexpr.pass.cpp | 279 + .../func.memfn/member_data.pass.cpp | 11 +- .../func.memfn/member_function.pass.cpp | 23 +- .../func.memfn/member_function_const.pass.cpp | 23 +- .../function.objects/func.not_fn/not_fn.pass.cpp | 248 +- .../func.search.default/default.pass.cpp | 21 +- .../func.search.default/default.pred.pass.cpp | 75 +- .../generate_feature_test_macro_components.py | 7 +- .../MachO/MachONormalizedFileFromAtoms.cpp | 2 +- .../API/tools/lldb-server/TestGdbRemoteAttach.py | 20 +- .../tools/lldb-server/TestGdbRemoteCompletion.py | 2 +- .../lldb-server/TestGdbRemoteExpeditedRegisters.py | 106 +- .../API/tools/lldb-server/TestGdbRemoteHostInfo.py | 18 +- .../lldb-server/TestGdbRemote_qThreadStopInfo.py | 80 +- .../commandline/TestGdbRemoteConnection.py | 17 - .../signal-filtering/TestGdbRemote_QPassSignals.py | 4 - llvm/include/llvm/Analysis/ValueTracking.h | 5 + llvm/include/llvm/IR/IntrinsicsRISCV.td | 56 + llvm/include/llvm/IR/IntrinsicsWebAssembly.td | 9 + llvm/include/llvm/Transforms/IPO/IROutliner.h | 23 + .../llvm/Transforms/InstCombine/InstCombiner.h | 13 + .../llvm/Transforms/Scalar/InferAddressSpaces.h | 27 + llvm/lib/Analysis/CFGPrinter.cpp | 2 +- llvm/lib/Analysis/InstructionSimplify.cpp | 9 + llvm/lib/Analysis/ValueTracking.cpp | 69 +- llvm/lib/CodeGen/AsmPrinter/WinCFGuard.cpp | 3 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 2 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineFunction.cpp | 2 +- llvm/lib/CodeGen/MachineModuleInfo.cpp | 3 +- llvm/lib/CodeGen/MachineOutliner.cpp | 6 +- llvm/lib/CodeGen/MachinePipeliner.cpp | 2 +- llvm/lib/CodeGen/RDFLiveness.cpp | 4 +- llvm/lib/CodeGen/ReachingDefAnalysis.cpp | 3 +- llvm/lib/CodeGen/RegAllocPBQP.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 4 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 2 +- .../CodeGen/SelectionDAG/StatepointLowering.cpp | 2 +- llvm/lib/Passes/PassBuilder.cpp | 23 +- llvm/lib/Passes/PassRegistry.def | 1 + llvm/lib/TableGen/Record.cpp | 37 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 28 +- llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp | 64 + llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp | 160 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 59 + llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h | 3 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 194 +- llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 13 +- llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 6 +- llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 8 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 68 +- llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp | 33 + llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 23 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 330 +- .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 848 +- .../Target/WebAssembly/WebAssemblyRegStackify.cpp | 2 +- llvm/lib/Transforms/IPO/IROutliner.cpp | 558 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 10 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 47 +- llvm/lib/Transforms/Scalar/GVN.cpp | 2 +- llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp | 94 +- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp | 8 +- llvm/lib/Transforms/Scalar/Reassociate.cpp | 4 +- llvm/lib/Transforms/Scalar/SROA.cpp | 4 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 7 + .../Vectorize/LoopVectorizationLegality.cpp | 25 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 59 +- .../test/Analysis/ValueTracking/known-non-equal.ll | 12 + .../test/CodeGen/AMDGPU/infer-addrpace-pipeline.ll | 15 +- llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll | 3 + llvm/test/CodeGen/AMDGPU/simplify-libcalls2.ll | 1 + llvm/test/CodeGen/AMDGPU/sroa-before-unroll.ll | 2 + .../AMDGPU/unstructured-cfg-def-use-issue.ll | 333 + llvm/test/CodeGen/AMDGPU/vector-alloca.ll | 1 + llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll | 23 + llvm/test/CodeGen/PowerPC/alloca-crspill.ll | 8 +- llvm/test/CodeGen/PowerPC/pr48527.ll | 70 + llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll | 545 + llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll | 673 + llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll | 722 + llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll | 882 + llvm/test/CodeGen/RISCV/rvv/vmclr-rv32.ll | 99 + llvm/test/CodeGen/RISCV/rvv/vmclr-rv64.ll | 99 + llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmset-rv32.ll | 99 + llvm/test/CodeGen/RISCV/rvv/vmset-rv64.ll | 99 + llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 239 + llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv32.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv64.ll | 88 +- llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll | 41 + llvm/test/MC/AMDGPU/flat-global.s | 40 + llvm/test/MC/AMDGPU/gfx10_asm_all.s | 126143 ------------------ llvm/test/MC/AMDGPU/gfx10_asm_ds.s | 6987 + llvm/test/MC/AMDGPU/gfx10_asm_flat.s | 128 + llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s | 2289 + llvm/test/MC/AMDGPU/gfx10_asm_smem.s | 1194 + llvm/test/MC/AMDGPU/gfx10_asm_sop.s | 10072 ++ llvm/test/MC/AMDGPU/gfx10_asm_vop1.s | 16229 +++ llvm/test/MC/AMDGPU/gfx10_asm_vop2.s | 13092 ++ llvm/test/MC/AMDGPU/gfx10_asm_vop3.s | 13141 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopc.s | 11576 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s | 21692 +++ llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s | 13816 ++ llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s | 15975 +++ llvm/test/MC/AMDGPU/gfx10_err_pos.s | 51 +- llvm/test/MC/AMDGPU/gfx7_asm_all.s | 86860 ------------ llvm/test/MC/AMDGPU/gfx7_asm_ds.s | 3055 + llvm/test/MC/AMDGPU/gfx7_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx7_asm_flat.s | 691 + llvm/test/MC/AMDGPU/gfx7_asm_mimg.s | 6661 + llvm/test/MC/AMDGPU/gfx7_asm_mtbuf.s | 1369 + llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s | 5371 + llvm/test/MC/AMDGPU/gfx7_asm_smrd.s | 751 + llvm/test/MC/AMDGPU/gfx7_asm_sop1.s | 4096 + llvm/test/MC/AMDGPU/gfx7_asm_sop2.s | 6832 + llvm/test/MC/AMDGPU/gfx7_asm_sopc.s | 2266 + llvm/test/MC/AMDGPU/gfx7_asm_sopk.s | 850 + llvm/test/MC/AMDGPU/gfx7_asm_sopp.s | 145 + llvm/test/MC/AMDGPU/gfx7_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx7_asm_vop1.s | 4576 + llvm/test/MC/AMDGPU/gfx7_asm_vop2.s | 3796 + llvm/test/MC/AMDGPU/gfx7_asm_vop3.s | 41875 ++++++ llvm/test/MC/AMDGPU/gfx7_asm_vop3_e64.s | 10534 ++ llvm/test/MC/AMDGPU/gfx7_asm_vopc.s | 14113 ++ llvm/test/MC/AMDGPU/gfx8_asm_all.s | 119543 ----------------- llvm/test/MC/AMDGPU/gfx8_asm_ds.s | 3160 + llvm/test/MC/AMDGPU/gfx8_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx8_asm_flat.s | 601 + llvm/test/MC/AMDGPU/gfx8_asm_mimg.s | 6865 + llvm/test/MC/AMDGPU/gfx8_asm_mtbuf.s | 2689 + llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s | 5488 + llvm/test/MC/AMDGPU/gfx8_asm_smem.s | 1165 + llvm/test/MC/AMDGPU/gfx8_asm_sop1.s | 4153 + llvm/test/MC/AMDGPU/gfx8_asm_sop2.s | 6952 + llvm/test/MC/AMDGPU/gfx8_asm_sopc.s | 2545 + llvm/test/MC/AMDGPU/gfx8_asm_sopk.s | 850 + llvm/test/MC/AMDGPU/gfx8_asm_sopp.s | 163 + llvm/test/MC/AMDGPU/gfx8_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx8_asm_vop1.s | 13768 ++ llvm/test/MC/AMDGPU/gfx8_asm_vop2.s | 12568 ++ llvm/test/MC/AMDGPU/gfx8_asm_vop3.s | 43843 ++++++ llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s | 13501 ++ llvm/test/MC/AMDGPU/gfx8_asm_vopc.s | 22963 ++++ llvm/test/MC/AMDGPU/gfx9_asm_all.s | 119325 ----------------- llvm/test/MC/AMDGPU/gfx9_asm_ds.s | 3364 + llvm/test/MC/AMDGPU/gfx9_asm_exp.s | 82 + llvm/test/MC/AMDGPU/gfx9_asm_flat.s | 4303 + llvm/test/MC/AMDGPU/gfx9_asm_mimg.s | 7108 + llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s | 2497 + llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s | 5638 + llvm/test/MC/AMDGPU/gfx9_asm_smem.s | 4477 + llvm/test/MC/AMDGPU/gfx9_asm_sop1.s | 3634 + llvm/test/MC/AMDGPU/gfx9_asm_sop2.s | 6880 + llvm/test/MC/AMDGPU/gfx9_asm_sopc.s | 2113 + llvm/test/MC/AMDGPU/gfx9_asm_sopk.s | 652 + llvm/test/MC/AMDGPU/gfx9_asm_sopp.s | 166 + llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s | 85 + llvm/test/MC/AMDGPU/gfx9_asm_vop1.s | 17017 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop2.s | 14962 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop3.s | 37702 ++++++ llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s | 16642 +++ llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s | 3484 + llvm/test/MC/AMDGPU/gfx9_asm_vopc.s | 29311 ++++ llvm/test/MC/AMDGPU/vintrp-err.s | 53 +- llvm/test/MC/PowerPC/ppc-machine.s | 5 + llvm/test/MC/WebAssembly/simd-encodings.s | 12 + llvm/test/Other/new-pm-defaults.ll | 2 +- llvm/test/TableGen/interleave.td | 9 + llvm/test/Transforms/IROutliner/extraction.ll | 46 +- llvm/test/Transforms/IROutliner/illegal-assumes.ll | 22 +- llvm/test/Transforms/IROutliner/illegal-memcpy.ll | 40 +- llvm/test/Transforms/IROutliner/illegal-memmove.ll | 40 +- llvm/test/Transforms/IROutliner/illegal-vaarg.ll | 30 +- .../outlining-different-output-blocks.ll | 110 + .../IROutliner/outlining-remapped-outputs.ll | 74 + .../IROutliner/outlining-same-output-blocks.ll | 98 + llvm/test/Transforms/IndVarSimplify/X86/pr45360.ll | 3 +- .../AMDGPU/infer-address-space.ll | 1 + llvm/test/Transforms/InstCombine/ctpop.ll | 6 +- .../hoist-xor-by-constant-from-xor-by-value.ll | 14 + llvm/test/Transforms/InstCombine/select-and-or.ll | 87 + llvm/test/Transforms/InstSimplify/call.ll | 62 +- llvm/test/Transforms/LoopVectorize/control-flow.ll | 2 +- llvm/test/Transforms/LoopVectorize/loop-form.ll | 455 +- .../LoopVectorize/loop-legality-checks.ll | 23 +- .../SimplifyCFG/fold-branch-to-common-dest.ll | 54 + llvm/tools/opt/opt.cpp | 8 +- llvm/unittests/Analysis/ValueTrackingTest.cpp | 53 + .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 1 + llvm/utils/update_analyze_test_checks.py | 5 +- mlir/include/mlir/IR/FunctionSupport.h | 52 +- mlir/lib/IR/Value.cpp | 5 + 251 files changed, 544543 insertions(+), 453632 deletions(-) create mode 100644 clang/test/CodeGenObjC/objc-dispatch-null-check.m create mode 100644 libcxx/test/std/utilities/function.objects/func.invoke/invoke_c [...] create mode 100644 llvm/include/llvm/Transforms/Scalar/InferAddressSpaces.h create mode 100644 llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll create mode 100644 llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll create mode 100644 llvm/test/CodeGen/PowerPC/pr48527.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmclr-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmclr-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmset-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmset-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll delete mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_smem.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_sop.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s create mode 100644 llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s delete mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_exp.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_mimg.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_mtbuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_smrd.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sopk.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_sopp.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vintrp.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vop3_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx7_asm_vopc.s delete mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_exp.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_mimg.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_mtbuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_smem.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sopk.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_sopp.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vintrp.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx8_asm_vopc.s delete mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_all.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_ds.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_exp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_flat.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mimg.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_smem.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopc.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopk.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_sopp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop1.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop2.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s create mode 100644 llvm/test/MC/AMDGPU/gfx9_asm_vopc.s create mode 100644 llvm/test/Transforms/IROutliner/outlining-different-output-blocks.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-remapped-outputs.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-same-output-blocks.ll create mode 100644 llvm/test/Transforms/InstCombine/select-and-or.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig updated (6df87c26d -> e768a2cb7)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 6df87c26d 0: update: llvm-linux-qemu: all new e768a2cb7 0: update: llvm-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (6df87c26d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 114 +- 02-prepare_abe/console.log | 446 +- 03-build_llvm/console.log | 13817 ++++++++++++------------ 04-build_linux/console.log | 744 +- 05-build_abe-qemu/console.log | 6734 ++++++------ 06-boot_linux/console.log | 6 +- 07-check_regression/console.log | 12 +- 08-update_baseline/console.log | 20 +- console.log | 21893 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 10 files changed, 21896 insertions(+), 21898 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig updated (5c8fe583cce5 -> dea8dcf2a9fa)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig in repository toolchain/ci/linux. from 5c8fe583cce5 Linux 5.11-rc1 adds 58315c966511 kernel: cgroup: Mundane spelling fixes throughout the file adds 5a7b5f32c5aa cgroup/cgroup.c: replace 'of->kn->priv' with of_cft() adds 2d18e54dd866 cgroup: Fix memory leak when parsing multiple source parameters adds 91afe604c154 Merge branch 'for-5.11' of git://git.kernel.org/pub/scm/li [...] adds 01341fbd0d8d workqueue: Kick a worker based on the actual activation of [...] adds c76e02c59e13 Merge branch 'for-5.11' of git://git.kernel.org/pub/scm/li [...] adds 48b0777cd93d Revert "dm crypt: export sysfs of kcryptd workqueue" adds dea8dcf2a9fa Merge tag 'for-5.11/dm-fix' of git://git.kernel.org/pub/sc [...] No new revisions were added by this update. Summary of changes: drivers/md/dm-crypt.c | 7 +++---- kernel/cgroup/cgroup-v1.c | 2 ++ kernel/cgroup/cgroup.c | 30 +++++++++++++++--------------- kernel/workqueue.c | 13 ++++++++++--- 4 files changed, 30 insertions(+), 22 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig updated (adfe99ad8fa -> 2d3425a52f3)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig in repository toolchain/ci/gcc. from adfe99ad8fa Daily bump. adds 12ae2bc7084 Fix standard name for zero/sign extend expanders adds 97d3ddcfc9c i386: Use existing temporary register in rounding functions adds 81615bb072c i386: Fix __builtin_rint with FE_DOWNWARD rounding directio [...] adds 7e999bd84f4 doc: Remove HSAIL from Language Standards adds c33fd160762 libgomp: Avoid bad "up" link in libgomp docs adds 2d3425a52f3 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 38 +++ gcc/DATESTAMP | 2 +- gcc/config/i386/i386-expand.c | 28 ++- gcc/config/i386/i386.md | 4 + gcc/config/i386/sse.md | 36 +-- gcc/doc/standards.texi | 8 - gcc/testsuite/ChangeLog | 11 + gcc/testsuite/gcc.target/i386/pr92658-avx2-2.c | 192 ++++++++++++++ gcc/testsuite/gcc.target/i386/pr92658-avx512bw-2.c | 280 +++++++++++++++++++++ gcc/testsuite/gcc.target/i386/pr92658-sse4-2.c | 148 +++++++++++ gcc/testsuite/gcc.target/i386/pr96793-2.c | 28 +++ libgomp/ChangeLog | 4 + libgomp/libgomp.texi | 2 +- 13 files changed, 741 insertions(+), 40 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr92658-avx2-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr92658-avx512bw-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr92658-sse4-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr96793-2.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig updated (adf6c633a3 -> e2e3422ce1)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig in repository toolchain/ci/binutils-gdb. from adf6c633a3 Automatic date update in version.in adds 3e9373fcaf binutils: Use the newly built assembler and linker adds e2e3422ce1 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- binutils/ChangeLog | 5 +++++ binutils/testsuite/binutils-all/compress.exp | 11 ++++++++++- 3 files changed, 16 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

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