Tcwg-commits September 2019

tcwg-commits@lists.linaro.org

5 participants
14312 discussions

[llvm] branch master updated (3025de43485 -> 8285d84d24c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 3025de43485 LiveIntervals: Split live intervals on multiple dead defs new 8285d84d24c [IRMover] Don't map globals if their types are the same The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Linker/IRMover.cpp | 12 +++++++- test/LTO/X86/Inputs/type-mapping-bug3.ll | 26 ++++++++++++++++++ test/LTO/X86/type-mapping-bug3.ll | 47 ++++++++++++++++++++++++++++++++ 3 files changed, 84 insertions(+), 1 deletion(-) create mode 100644 test/LTO/X86/Inputs/type-mapping-bug3.ll create mode 100644 test/LTO/X86/type-mapping-bug3.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[gcc] branch master updated (45c13053b60 -> c71b2642d0e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 45c13053b60 compiler: suppress type descriptor generation for aliases new 4e858fb59f9 Simplify the code. new c71b2642d0e 2019-09-11 Steven G. Kargl <kargl(a)gcc.gnu.org> The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 5 +++++ gcc/config/rs6000/predicates.md | 3 +-- gcc/fortran/ChangeLog | 6 ++++++ gcc/fortran/io.c | 11 +++++++++++ gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gfortran.dg/pr91642.f90 | 19 +++++++++++++++++++ 6 files changed, 47 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gfortran.dg/pr91642.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-next-allnoconfig updated (d509a22bd -> bc859bc2f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-next-allnoconfig in repository toolchain/ci/base-artifacts. discards d509a22bd 0: update: llvm-linux: all new bc859bc2f 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (d509a22bd) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 184 +- 02-build_llvm/console.log | 11954 ++++++++++++++++++----------------- 03-build_linux/console.log | 760 +-- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 8 +- 06-update_baseline/console.log | 25 - console.log | 12905 +++++++++++++++++++------------------- jenkins/manifest.sh | 6 +- 8 files changed, 12895 insertions(+), 12949 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-allmodconfig updated (97d8e47d137 -> f539f18a218)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-allmodconfig in repository toolchain/ci/gcc. from 97d8e47d137 Daily bump. adds 28af642dfd4 go/internal/gccgoimporter: support embedded field in po [...] adds a1c2f23d2e3 PR go/91621 mksysinfo: change test == to test = adds b2366b03ff0 PR c++/91705 - constexpr evaluation rejects ++/-- on float [...] adds 76b3231f798 Daily bump. adds 99f8fa968d7 PR rtl-optimization/89795 * rtlanal.c (nonzero_bits1) <SU [...] adds f539f18a218 Fix Xmethod for shared_ptr::use_count() No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 6 ++ gcc/DATESTAMP | 2 +- gcc/cp/ChangeLog | 9 +++ gcc/cp/constexpr.c | 4 ++ gcc/rtlanal.c | 2 +- gcc/testsuite/ChangeLog | 4 ++ gcc/testsuite/g++.dg/cpp1y/constexpr-incr2.C | 66 ++++++++++++++++++++++ gcc/testsuite/gcc.target/sparc/20161111-1.c | 2 +- .../go/go/internal/gccgoimporter/importer_test.go | 1 + libgo/go/go/internal/gccgoimporter/parser.go | 64 +++++++++++++-------- .../internal/gccgoimporter/testdata/issue34182.go | 17 ++++++ .../internal/gccgoimporter/testdata/issue34182.gox | 13 +++++ libgo/mksysinfo.sh | 2 +- libstdc++-v3/ChangeLog | 5 ++ libstdc++-v3/python/libstdcxx/v6/xmethods.py | 2 +- 15 files changed, 171 insertions(+), 28 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-incr2.C create mode 100644 libgo/go/go/internal/gccgoimporter/testdata/issue34182.go create mode 100644 libgo/go/go/internal/gccgoimporter/testdata/issue34182.gox -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-allmodconfig updated (ab2427028d -> cb664337b4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-allmodconfig in repository toolchain/ci/binutils-gdb. from ab2427028d Automatic date update in version.in adds cb664337b4 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-allmodconfig updated (469c093e6 -> c33f9fb4d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-allmodconfig in repository toolchain/ci/base-artifacts. discards 469c093e6 2: update: binutils-gcc-linux: 19850 new c33f9fb4d 2: update: binutils-gcc-linux: 19850 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (469c093e6) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-n [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-prepare_abe/console.log | 444 +- 03-build_abe-binutils/console.log | 10984 ++++++------- 04-build_abe-stage1/console.log | 18497 ++++++++++----------- 05-build_linux/console.log | 942 +- 08-update_baseline/console.log | 32 +- console.log | 31065 ++++++++++++++++++------------------ jenkins/manifest.sh | 14 +- 8 files changed, 31081 insertions(+), 31063 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (b329e0728b3 -> b51d5605b18)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/llvm-project. from b329e0728b3 [BPI] Adjust the probability for floating point unordered c [...] adds 4a23ae5e787 GlobalISel/TableGen: Handle REG_SEQUENCE patterns adds ff02109ad47 [Function] Factor out GetCallEdgeForReturnAddress, NFC adds 3ef7dbd6650 [lldbtest] Add an "expected_cmd_failure" option to the file [...] adds 870ffe3cee6 [NFC][InstSimplify] rewrite test added in r371537 to use no [...] adds a9beacbac8d [X86] Updated target specific selection dag code to conserv [...] adds b5890a329a0 Fix for PR43175: compiler crash when trying to emit noncapt [...] adds 16f5605382d [NFC][InstCombine] rewrite test added in r371537 to use non [...] adds 4d2b4077e70 [x86] add test for false dependency with AVX; NFC adds 38e033bf33e Re-land Remove REQUIRES:shell from tests that pass for me o [...] adds 7a54d76fa54 [OPENMP5.0]Allow teams directive outside of the target directives. adds 6c6f5a99845 [mips] Allow PT_LOAD to have overlapping p_offset ranges on [...] adds 699bea494c0 llvm-reduce: Simplify testing using -implicit-check-not adds 1e1db800487 [ValueTracking] Factor our common speculation suppression l [...] adds 045b2270ceb When evaluating a __builtin_constant_p conditional, always [...] adds cffa630c809 [Loads] Move generic code out of vectorizer into a location [...] adds c9f5aa99acb Actually reorder not and env in crash-recovery-modules.m adds 6ca76ceb63b Fix a thinko in handling the QSetLogging packet. adds 5fc4bee355a Move LLVM_ENABLE_ABI_BREAKING_CHECKS variables to their own [...] adds 477c1df4b9d llvm-reduce: Add pass to reduce Metadata adds 345fbfd7499 llvm-remove: Remove "using namespace" in header. adds aac114ca140 llvm-reduce: Remove some unused headers/more narrowly include them adds f7b4022db17 [MemorySSA] Do not create memoryaccesses for debug info int [...] adds 244e7384854 Adding support for overriding LLVM_ENABLE_RUNTIMES for runt [...] adds 6a2603c0633 llvm-reduce: Add pass to reduce parameters adds 7b1d793713c Reland "Change the X86 datalayout to add three address spac [...] adds a6e0bef3124 Update ReleaseNotes: add enabling of MemorySSA. adds 2af5b193d5e [AArch64][GlobalISel] Support sibling calls with mismatched [...] adds d40ddb9df26 [clang-format] Apply BAS_AlwaysBreak to C++11 braced lists adds 469d42fcf6b [GlobalISel] When a tail call is emitted in a block, stop t [...] adds f9cc0393b34 [MemorySSA] MemorySSA should not model debuginfo, and need [...] adds 0910a03bc25 Remove xfail NetBSD mark from ignored-interceptors-mmap.cpp adds 8b83f50c034 Remove xfail i386 NetBSD mark in vptr-non-unique-typeinfo.cpp adds f88f46358db [llvm-nm] Add tapi file support adds b2b0ccab2f7 [Object][TextAPI] NFC, fix tapi lit tests adds 9607f5d8020 [clang-scan-deps][NFC] Fix tests - prevent FileCheck matchi [...] adds c856eb0b76b Revert "Adding support for overriding LLVM_ENABLE_RUNTIMES [...] adds 068b3628149 Revert "llvm-reduce: Add pass to reduce parameters" adds 7b4237d3ccb Emit -Wmicrosoft-enum-value warning instead of error in MS ABI adds f0321c094d9 Skip a test in TestProcessIO.py when running against ios devices. adds 9b27586e834 Ah, only skip this for embedded darwin targets. adds 394a8ed8f1a clang-misexpect: Profile Guided Validation of Performance A [...] adds 56a34f4541c [llvm-nm] Fix -DBUILD_SHARED_LIBS=ON builds after D66160/r371576 adds 9ca1b94a6d3 [CodeGen] Add alias for cpu_dispatch function with IFunc & [...] adds 6b1c6c1287d [Debuginfo][Instcombiner] Do not clone dbg.declare. adds 2aace1ea226 [ELF][test] Make tests more tolerant to exact symbol addresses adds 37367646578 [Attributor][Fix] Manifest nocapture only in CSArgument or [...] adds 1d68ed8c24e [Attributor] Implement "noalias" callsite argument deduction adds 27f2b81b6b7 [llvm-objcopy] Simplify --prefix-alloc-sections adds c26b3940c32 [TLI][AMDGPU] AMDPAL does not have library functions adds 6b9df910d04 [LTO] Avoid calling GlobalValue::getGUID (MD5) twice adds 17ea9b463c6 [NFC][ARM] Add and modify tests adds e4961218fd5 [LoopInterchange] Properly move condition, induction increm [...] adds b250d5ff5e7 [LLDB] Do not try to canonicalize gethostname() result adds 73ec745793a [ARM] Take into account -mcpu and -mfpu options while handl [...] adds 57256af307a Revert "clang-misexpect: Profile Guided Validation of Perfo [...] adds 3a4781bbf4f [LLDB][ELF] Load both, .symtab and .dynsym sections adds 813f05915d2 [LLDB][ELF] Fixup for comments in D67390 adds e79381c3f7a [LoopInterchange] Drop unused splitInnerLoopHeader declaration. adds 4dae283cd3e [InstCombine] Fixed handling of isOpNewLike (PR11748) adds 57ebb50a0ad [NFC] Fixed test adds af5ba2873f5 [NFC] Updated objsize-64.ll test adds 3240ad4ced0 [Diagnostics] Add -Wsizeof-array-div adds e0d9a0bd59d Fix -Wdocumentation warning - void function doesn't need a [...] adds d811d9115b0 [mips][msa] Fix infinite loop for mips.nori.b intrinsic adds 48904e9452d [Alignment] Use llvm::Align in MachineFunction and TargetLo [...] adds 80bea345d11 [InstCombine] fold sign-bit compares of srem adds f78474ba8ae gn build: add include_dir that's necessary after r371564 adds b3b2064c518 [LangRef] fix punctuation; NFC adds 9703f46fc1b [lldb][NFC] Sort files in unittests/Expression/CMakeLists.txt adds 3183466aa60 [LangRef] add link for fma intrinsic adds 97264366fba [Alignment][NFC] use llvm::Align for AsmPrinter::EmitAlignment adds 29ba5e0817a [InstSimplify] regenerate test CHECKs; NFC adds 1761f6fc42d [lldb][NFC] Remove dead code in SBAddress::GetDescription adds 9c4047f2672 [ConstProp] move test file from InstSimplify; NFC adds f054067f276 [libFuzzer] Make -merge=1 to reuse coverage information fro [...] adds ede0905c1fb [ConstProp] add tests for fma that produce NaN; NFC adds 1ccba7c1a10 LLVM: Optimization Pass: Remove conflicting attribute, if a [...] adds 3ad8278737d [lldb][NFC] Make include directories in Clang expression pa [...] adds d44c4a71df9 Revert "[LLDB][ELF] Fixup for comments in D67390" adds 2f3884ca1d8 Revert "[LLDB][ELF] Load both, .symtab and .dynsym sections" adds b42565f2fc7 gn build: Merge r371562 adds 5957a61ff8e [OPENMP]Updated status page, NFC. adds 161cca266a9 [scudo][standalone] Android related improvements adds 8aeb7bb013a [NFC][InstSimplify] Add extra test for D67411 with @llvm.assume adds 00c1ee48e4c [InstSimplify] Pass SimplifyQuery into simplifyUnsignedRang [...] adds 1be634044dd [OPENMP] Update the diagnosis message for canonical loop fo [...] adds 0c1257f517e [Clang][Bundler] Fix for a potential memory leak [NFC] adds 51de22c8ee6 Revert [InstCombine] Use SimplifyFMulInst to simplify multi [...] adds 7bdad084294 Reland "clang-misexpect: Profile Guided Validation of Perfo [...] adds 85eff49d748 gn build: Merge r371635 adds e39b5710c92 [Clang][Bundler] Replace std::vector by SmallVector [NFC] adds 340b7252029 [libc++] Add a CMake cache for Apple-specific configuration [...] adds b51d5605b18 Consolidate swap, swap_ranges, and iter_swap in <type_traits>. No new revisions were added by this update. Summary of changes: clang/docs/OpenMPSupport.rst | 6 +- clang/include/clang/Basic/DiagnosticDriverKinds.td | 3 + .../include/clang/Basic/DiagnosticFrontendKinds.td | 7 +- clang/include/clang/Basic/DiagnosticGroups.td | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 6 +- clang/lib/AST/ExprConstant.cpp | 104 ++- clang/lib/Basic/Targets/OSTargets.h | 6 +- clang/lib/Basic/Targets/X86.h | 32 +- clang/lib/CodeGen/CGExpr.cpp | 5 + clang/lib/CodeGen/CodeGenAction.cpp | 26 + clang/lib/CodeGen/CodeGenModule.cpp | 27 +- clang/lib/Driver/ToolChains/Arch/ARM.cpp | 33 +- clang/lib/Format/ContinuationIndenter.cpp | 4 +- clang/lib/Frontend/CompilerInvocation.cpp | 3 + clang/lib/Sema/SemaDecl.cpp | 23 +- clang/lib/Sema/SemaExpr.cpp | 31 +- clang/lib/Sema/SemaOpenMP.cpp | 36 +- clang/test/Analysis/crash-trace.c | 7 +- .../Inputs/header_stat_before_open_cdb.json | 4 +- clang/test/ClangScanDeps/Inputs/no-werror.json | 2 +- clang/test/ClangScanDeps/Inputs/regular_cdb.json | 8 +- .../subframework_header_dir_symlink_cdb.json | 4 +- clang/test/ClangScanDeps/Inputs/symlink_cdb.json | 4 +- .../test/ClangScanDeps/Inputs/vfsoverlay_cdb.json | 2 +- clang/test/ClangScanDeps/error.cpp | 2 +- clang/test/ClangScanDeps/header_stat_before_open.m | 4 +- clang/test/ClangScanDeps/no-werror.cpp | 4 +- clang/test/ClangScanDeps/regular_cdb.cpp | 12 +- .../subframework_header_dir_symlink.m | 10 +- clang/test/ClangScanDeps/symlink.cpp | 8 +- clang/test/ClangScanDeps/vfsoverlay.cpp | 4 +- clang/test/CodeGen/Inputs/thinlto-multi-module.ll | 2 +- clang/test/CodeGen/Inputs/thinlto_backend.ll | 2 +- .../Inputs/thinlto_backend_local_name_conflict1.ll | 2 +- .../Inputs/thinlto_backend_local_name_conflict2.ll | 2 +- clang/test/CodeGen/attr-cpuspecific.c | 62 +- clang/test/CodeGen/attr-target-mv-func-ptrs.c | 2 +- clang/test/CodeGen/attr-target-mv-va-args.c | 6 +- clang/test/CodeGen/attr-target-mv.c | 36 +- clang/test/CodeGen/iamcu-abi.c | 3 +- clang/test/CodeGen/target-data.c | 14 +- ...nlto-diagnostic-handler-remarks-with-hotness.ll | 2 +- .../CodeGen/thinlto-distributed-backend-skip.ll | 2 +- .../test/CodeGen/thinlto-distributed-cfi-devirt.ll | 2 +- clang/test/CodeGen/thinlto-distributed-cfi.ll | 2 +- clang/test/CodeGen/thinlto-distributed.ll | 2 +- clang/test/CodeGen/thinlto-multi-module.ll | 2 +- clang/test/CodeGen/thinlto_backend.ll | 13 +- .../CodeGen/thinlto_backend_local_name_conflict.ll | 2 +- clang/test/CodeGenCXX/attr-cpuspecific.cpp | 6 +- clang/test/CodeGenCXX/attr-target-mv-diff-ns.cpp | 12 +- clang/test/CodeGenCXX/attr-target-mv-inalloca.cpp | 4 +- .../CodeGenCXX/attr-target-mv-member-funcs.cpp | 36 +- clang/test/CodeGenCXX/attr-target-mv-modules.cpp | 2 +- .../CodeGenCXX/attr-target-mv-out-of-line-defs.cpp | 6 +- clang/test/CodeGenCXX/attr-target-mv-overloads.cpp | 12 +- clang/test/Driver/arm-features.c | 25 +- clang/test/Driver/check-time-trace-sections.cpp | 1 - clang/test/Driver/check-time-trace.cpp | 1 - clang/test/Driver/clang-offload-bundler.c | 3 +- clang/test/Driver/crash-report-crashfile.m | 2 +- clang/test/Driver/rewrite-map-in-diagnostics.c | 7 +- clang/test/Format/style-on-command-line.cpp | 2 +- clang/test/Frontend/dependency-gen-has-include.c | 14 +- clang/test/Index/crash-recovery-modules.m | 9 +- clang/test/Modules/at-import-in-framework-header.m | 2 - clang/test/Modules/builtins.m | 1 - .../Modules/dependency-dump-dependent-module.m | 2 - clang/test/Modules/dependency-dump.m | 2 - clang/test/Modules/implicit-invalidate-common.c | 1 - clang/test/OpenMP/constexpr_partial_array.cpp | 10 + .../distribute_parallel_for_simd_loop_messages.cpp | 30 +- .../test/OpenMP/distribute_simd_loop_messages.cpp | 26 +- clang/test/OpenMP/for_loop_messages.cpp | 22 +- clang/test/OpenMP/for_simd_loop_messages.cpp | 30 +- clang/test/OpenMP/parallel_for_ast_print.cpp | 12 +- clang/test/OpenMP/parallel_for_codegen.cpp | 127 ++-- clang/test/OpenMP/parallel_for_loop_messages.cpp | 22 +- .../OpenMP/parallel_for_simd_loop_messages.cpp | 30 +- clang/test/OpenMP/simd_loop_messages.cpp | 24 +- .../OpenMP/target_parallel_for_loop_messages.cpp | 22 +- .../target_parallel_for_simd_loop_messages.cpp | 30 +- clang/test/OpenMP/target_simd_loop_messages.cpp | 30 +- .../target_teams_distribute_loop_messages.cpp | 22 +- ...teams_distribute_parallel_for_loop_messages.cpp | 22 +- ..._distribute_parallel_for_simd_loop_messages.cpp | 30 +- .../target_teams_distribute_simd_loop_messages.cpp | 20 +- clang/test/OpenMP/task_firstprivate_codegen.cpp | 2 - clang/test/OpenMP/task_private_codegen.cpp | 2 - .../test/OpenMP/taskloop_firstprivate_codegen.cpp | 3 +- clang/test/OpenMP/taskloop_lastprivate_codegen.cpp | 3 +- clang/test/OpenMP/taskloop_loop_messages.cpp | 21 +- clang/test/OpenMP/taskloop_private_codegen.cpp | 2 - .../OpenMP/taskloop_simd_firstprivate_codegen.cpp | 3 +- .../OpenMP/taskloop_simd_lastprivate_codegen.cpp | 3 +- clang/test/OpenMP/taskloop_simd_loop_messages.cpp | 30 +- .../test/OpenMP/taskloop_simd_private_codegen.cpp | 2 - clang/test/OpenMP/teams_ast_print.cpp | 13 + clang/test/OpenMP/teams_codegen.cpp | 27 + .../test/OpenMP/teams_distribute_loop_messages.cpp | 22 +- ...teams_distribute_parallel_for_loop_messages.cpp | 22 +- ..._distribute_parallel_for_simd_loop_messages.cpp | 30 +- .../OpenMP/teams_distribute_simd_loop_messages.cpp | 30 +- clang/test/OpenMP/teams_messages.cpp | 7 +- clang/test/PCH/modified-header-error.c | 4 +- clang/test/Parser/crash-report.c | 3 +- .../misexpect-branch-nonconst-expect-arg.proftext | 9 + .../test/Profile/Inputs/misexpect-branch.proftext | 9 + .../Inputs/misexpect-switch-default-only.proftext | 12 + .../Inputs/misexpect-switch-default.proftext | 16 + .../Inputs/misexpect-switch-nonconst.proftext | 17 + .../test/Profile/Inputs/misexpect-switch.proftext | 16 + clang/test/Profile/misexpect-branch-cold.c | 26 + .../misexpect-branch-nonconst-expected-val.c | 23 + .../test/Profile/misexpect-branch-unpredictable.c | 25 + clang/test/Profile/misexpect-branch.c | 28 + clang/test/Profile/misexpect-switch-default.c | 40 ++ clang/test/Profile/misexpect-switch-nonconst.c | 43 ++ .../Profile/misexpect-switch-only-default-case.c | 35 + clang/test/Profile/misexpect-switch.c | 41 ++ clang/test/Sema/MicrosoftCompatibility.c | 14 +- clang/test/Sema/div-sizeof-array.cpp | 28 + clang/test/Sema/i-c-e.c | 3 + .../clang-offload-bundler/ClangOffloadBundler.cpp | 33 +- clang/unittests/Format/FormatTest.cpp | 10 + compiler-rt/lib/fuzzer/FuzzerDefs.h | 5 +- compiler-rt/lib/fuzzer/FuzzerMerge.cpp | 73 +- .../lib/scudo/standalone/allocator_config.h | 4 +- compiler-rt/lib/scudo/standalone/combined.h | 33 +- compiler-rt/lib/scudo/standalone/size_class_map.h | 6 +- .../lib/scudo/standalone/tests/combined_test.cpp | 15 + .../lib/scudo/standalone/tests/wrappers_c_test.cpp | 1 + compiler-rt/test/fuzzer/merge.test | 2 - compiler-rt/test/fuzzer/merge_two_step.test | 31 + .../test/tsan/ignored-interceptors-mmap.cpp | 1 - .../TypeCheck/vptr-non-unique-typeinfo.cpp | 1 - libcxx/cmake/caches/Apple.cmake | 15 + libcxx/include/type_traits | 24 +- libcxx/include/utility | 24 +- libcxx/utils/ci/macos-backdeployment.sh | 7 +- libcxx/utils/ci/macos-trunk.sh | 9 +- lld/ELF/Writer.cpp | 1 - lld/test/COFF/Inputs/bar.ll | 2 +- lld/test/COFF/Inputs/conflict.ll | 2 +- lld/test/COFF/Inputs/constant-export.ll | 2 +- lld/test/COFF/Inputs/entry-mangled.ll | 2 +- lld/test/COFF/Inputs/export.ll | 2 +- lld/test/COFF/Inputs/libcall-archive.ll | 2 +- lld/test/COFF/Inputs/lto-cache.ll | 2 +- lld/test/COFF/Inputs/lto-comdat1.ll | 2 +- lld/test/COFF/Inputs/lto-comdat2.ll | 2 +- lld/test/COFF/Inputs/lto-dep.ll | 2 +- lld/test/COFF/Inputs/lto-lazy-reference-dummy.ll | 2 +- .../COFF/Inputs/lto-lazy-reference-quadruple.ll | 2 +- lld/test/COFF/Inputs/msvclto-order-a.ll | 2 +- lld/test/COFF/Inputs/msvclto-order-b.ll | 2 +- lld/test/COFF/Inputs/thinlto-empty.ll | 2 +- lld/test/COFF/Inputs/thinlto-mangled-qux.ll | 2 +- lld/test/COFF/Inputs/thinlto.ll | 2 +- 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llvm/lib/CodeGen/PatchableFunction.cpp | 2 +- llvm/lib/IR/DiagnosticInfo.cpp | 11 + llvm/lib/IR/MDBuilder.cpp | 12 + llvm/lib/LTO/LTO.cpp | 3 +- llvm/lib/Object/TapiFile.cpp | 2 +- llvm/lib/Support/ABIBreak.cpp | 24 + llvm/lib/Support/CMakeLists.txt | 1 + llvm/lib/Support/Error.cpp | 15 - llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 2 +- llvm/lib/Target/AArch64/AArch64CallLowering.cpp | 72 +- llvm/lib/Target/AArch64/AArch64CallLowering.h | 11 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 2 +- llvm/lib/Target/AMDGPU/R600AsmPrinter.cpp | 2 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 50 +- llvm/lib/Target/ARC/ARCMachineFunctionInfo.h | 4 +- llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 14 +- llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 11 +- llvm/lib/Target/Mips/MCTargetDesc/MipsMCNaCl.h | 5 +- .../Mips/MCTargetDesc/MipsNaClELFStreamer.cpp | 2 +- llvm/lib/Target/Mips/MipsAsmPrinter.cpp | 6 +- llvm/lib/Target/Mips/MipsBranchExpansion.cpp | 2 +- llvm/lib/Target/Mips/MipsConstantIslandPass.cpp | 4 +- llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 1 + llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 7 +- llvm/lib/Target/PowerPC/PPCBranchSelector.cpp | 13 +- llvm/lib/Target/SystemZ/SystemZLongBranch.cpp | 6 +- llvm/lib/Target/X86/X86AsmPrinter.cpp | 4 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 6 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 28 +- llvm/lib/Target/X86/X86InstrInfo.td | 6 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 17 +- llvm/lib/Target/X86/X86TargetMachine.h | 3 + llvm/lib/Target/XCore/XCoreAsmPrinter.cpp | 4 +- llvm/lib/TextAPI/MachO/Architecture.cpp | 25 +- llvm/lib/TextAPI/MachO/TextStubCommon.cpp | 2 +- llvm/lib/Transforms/IPO/Attributor.cpp | 64 +- llvm/lib/Transforms/IPO/FunctionAttrs.cpp | 33 +- llvm/lib/Transforms/IPO/SampleProfile.cpp | 3 + .../Transforms/InstCombine/InstCombineCalls.cpp | 23 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 42 ++ .../Transforms/InstCombine/InstCombineInternal.h | 2 + .../InstCombine/InstructionCombining.cpp | 15 + .../Instrumentation/PGOInstrumentation.cpp | 4 + llvm/lib/Transforms/Scalar/LoopInterchange.cpp | 62 +- .../lib/Transforms/Scalar/LowerExpectIntrinsic.cpp | 31 +- llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 5 +- llvm/lib/Transforms/Utils/CMakeLists.txt | 1 + llvm/lib/Transforms/Utils/MisExpect.cpp | 177 +++++ .../Vectorize/LoopVectorizationLegality.cpp | 66 -- llvm/test/Analysis/MemorySSA/debugvalue2.ll | 54 ++ .../AArch64/GlobalISel/arm64-regbankselect.mir | 10 +- .../GlobalISel/call-translator-tail-call.ll | 37 +- .../AArch64/GlobalISel/combine-anyext-crash.mir | 2 +- .../CodeGen/AArch64/GlobalISel/fold-fp-select.mir | 22 +- .../CodeGen/AArch64/GlobalISel/fold-select.mir | 4 +- .../GlobalISel/fp128-legalize-crash-pr35690.mir | 2 +- .../CodeGen/AArch64/GlobalISel/fp16-copy-gpr.mir | 6 +- .../CodeGen/AArch64/GlobalISel/inline-memcpy.mir | 6 +- .../CodeGen/AArch64/GlobalISel/inline-memmove.mir | 8 +- .../CodeGen/AArch64/GlobalISel/inline-memset.mir | 8 +- .../AArch64/GlobalISel/inline-small-memcpy.mir | 4 +- .../CodeGen/AArch64/GlobalISel/legalize-add.mir | 4 +- .../AArch64/GlobalISel/legalize-blockaddress.mir | 2 +- .../CodeGen/AArch64/GlobalISel/legalize-ceil.mir | 4 +- .../CodeGen/AArch64/GlobalISel/legalize-cmp.mir | 2 +- .../CodeGen/AArch64/GlobalISel/legalize-cos.mir | 12 +- .../CodeGen/AArch64/GlobalISel/legalize-div.mir | 2 +- .../AArch64/GlobalISel/legalize-dyn-alloca.mir | 6 +- .../CodeGen/AArch64/GlobalISel/legalize-exp.mir | 12 +- .../CodeGen/AArch64/GlobalISel/legalize-ext.mir | 18 +- .../CodeGen/AArch64/GlobalISel/legalize-fexp2.mir | 12 +- .../CodeGen/AArch64/GlobalISel/legalize-fma.mir | 10 +- .../CodeGen/AArch64/GlobalISel/legalize-frint.mir | 16 +- .../GlobalISel/legalize-intrinsic-round.mir | 16 +- .../GlobalISel/legalize-intrinsic-trunc.mir | 12 +- .../GlobalISel/legalize-inttoptr-xfail-1.mir | 2 +- .../GlobalISel/legalize-inttoptr-xfail-2.mir | 2 +- .../legalize-load-store-vector-of-ptr.mir | 6 +- .../AArch64/GlobalISel/legalize-load-store.mir | 18 +- .../CodeGen/AArch64/GlobalISel/legalize-log.mir | 12 +- .../CodeGen/AArch64/GlobalISel/legalize-log10.mir | 12 +- .../CodeGen/AArch64/GlobalISel/legalize-log2.mir | 12 +- .../AArch64/GlobalISel/legalize-nearbyint.mir | 14 +- .../GlobalISel/legalize-non-pow2-load-store.mir | 2 +- .../CodeGen/AArch64/GlobalISel/legalize-phi.mir | 14 +- .../CodeGen/AArch64/GlobalISel/legalize-pow.mir | 10 +- .../AArch64/GlobalISel/legalize-s128-div.mir | 4 +- .../CodeGen/AArch64/GlobalISel/legalize-select.mir | 4 +- .../AArch64/GlobalISel/legalize-shuffle-vector.mir | 6 +- .../CodeGen/AArch64/GlobalISel/legalize-sin.mir | 12 +- .../CodeGen/AArch64/GlobalISel/legalize-sqrt.mir | 4 +- .../AArch64/GlobalISel/legalize-vector-icmp.mir | 128 ++-- .../legalizer-combiner-zext-trunc-crash.mir | 2 +- .../AArch64/GlobalISel/load-addressing-modes.mir | 42 +- .../GlobalISel/localizer-in-O0-pipeline.mir | 2 +- llvm/test/CodeGen/AArch64/GlobalISel/localizer.mir | 2 +- .../GlobalISel/machine-cse-mid-pipeline.mir | 2 +- .../GlobalISel/non-pow-2-extload-combine.mir | 2 +- .../AArch64/GlobalISel/observer-change-crash.mir | 2 +- .../AArch64/GlobalISel/opt-fold-compare.mir | 30 +- .../AArch64/GlobalISel/opt-shuffle-splat.mir | 12 +- .../prelegalizercombiner-extending-loads-s1.mir | 2 +- .../GlobalISel/regbank-extract-vector-elt.mir | 8 +- .../CodeGen/AArch64/GlobalISel/regbank-extract.mir | 2 +- .../CodeGen/AArch64/GlobalISel/regbank-fma.mir | 4 +- .../GlobalISel/regbank-insert-vector-elt.mir | 12 +- .../AArch64/GlobalISel/regbank-intrinsic-round.mir | 16 +- .../AArch64/GlobalISel/regbank-intrinsic-trunc.mir | 4 +- .../AArch64/GlobalISel/regbank-nearbyint.mir | 14 +- .../CodeGen/AArch64/GlobalISel/regbank-select.mir | 12 +- .../AArch64/GlobalISel/regbank-trunc-s128.mir | 2 +- .../GlobalISel/regbankselect-build-vector.mir | 2 +- .../GlobalISel/regbankselect-unmerge-vec.mir | 4 +- .../GlobalISel/select-arith-extended-reg.mir | 50 +- .../GlobalISel/select-atomic-load-store.mir | 2 +- .../CodeGen/AArch64/GlobalISel/select-binop.mir | 4 +- .../AArch64/GlobalISel/select-blockaddress.mir | 2 +- .../CodeGen/AArch64/GlobalISel/select-bswap.mir | 6 +- .../AArch64/GlobalISel/select-build-vector.mir | 10 +- .../test/CodeGen/AArch64/GlobalISel/select-cbz.mir | 4 +- .../AArch64/GlobalISel/select-concat-vectors.mir | 4 +- .../CodeGen/AArch64/GlobalISel/select-ctlz.mir | 18 +- .../GlobalISel/select-extract-vector-elt.mir | 16 +- .../CodeGen/AArch64/GlobalISel/select-fcmp.mir | 4 +- .../AArch64/GlobalISel/select-frint-nofp16.mir | 6 +- .../CodeGen/AArch64/GlobalISel/select-frint.mir | 16 +- .../GlobalISel/select-insert-vector-elt.mir | 12 +- .../CodeGen/AArch64/GlobalISel/select-int-ext.mir | 18 +- .../AArch64/GlobalISel/select-intrinsic-round.mir | 16 +- .../AArch64/GlobalISel/select-intrinsic-trunc.mir | 16 +- .../AArch64/GlobalISel/select-jump-table-brjt.mir | 2 +- .../AArch64/GlobalISel/select-ldaxr-intrin.mir | 8 +- .../AArch64/GlobalISel/select-ldxr-intrin.mir | 8 +- .../GlobalISel/select-load-store-vector-of-ptr.mir | 4 +- .../CodeGen/AArch64/GlobalISel/select-load.mir | 8 +- .../AArch64/GlobalISel/select-nearbyint.mir | 14 +- .../test/CodeGen/AArch64/GlobalISel/select-phi.mir | 4 +- .../CodeGen/AArch64/GlobalISel/select-pr32733.mir | 2 +- .../CodeGen/AArch64/GlobalISel/select-select.mir | 4 +- .../AArch64/GlobalISel/select-shuffle-vector.mir | 8 +- .../select-shufflevec-undef-mask-elt.mir | 2 +- .../AArch64/GlobalISel/select-stlxr-intrin.mir | 8 +- .../CodeGen/AArch64/GlobalISel/select-store.mir | 8 +- .../test/CodeGen/AArch64/GlobalISel/select-stx.mir | 8 +- .../CodeGen/AArch64/GlobalISel/select-trap.mir | 2 +- .../CodeGen/AArch64/GlobalISel/select-uaddo.mir | 4 +- .../CodeGen/AArch64/GlobalISel/select-unmerge.mir | 14 +- .../AArch64/GlobalISel/select-vector-icmp.mir | 160 ++--- .../AArch64/GlobalISel/select-vector-shift.mir | 8 +- .../GlobalISel/select-with-no-legality-check.mir | 304 ++++----- .../AArch64/GlobalISel/store-addressing-modes.mir | 14 +- .../CodeGen/AArch64/aarch64-mov-debug-locs.mir | 2 +- llvm/test/CodeGen/AArch64/aarch64-vector-pcs.mir | 2 +- .../CodeGen/AArch64/branch-relax-block-size.mir | 2 +- .../dont-shrink-wrap-stack-mayloadorstore.mir | 4 +- llvm/test/CodeGen/AArch64/irg-nomem.mir | 2 +- llvm/test/CodeGen/AArch64/jump-table-compress.mir | 2 +- .../AArch64/machine-outliner-inline-asm-adrp.mir | 6 +- llvm/test/CodeGen/AArch64/movimm-wzr.mir | 2 +- .../CodeGen/AArch64/reverse-csr-restore-seq.mir | 2 +- llvm/test/CodeGen/AArch64/spill-undef.mir | 2 +- llvm/test/CodeGen/AArch64/tailcall-ccmismatch.ll | 1 + llvm/test/CodeGen/AArch64/wineh-frame0.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame1.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame2.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame3.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame4.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame5.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame6.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame7.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame8.mir | 2 +- llvm/test/CodeGen/AArch64/wineh1.mir | 2 +- llvm/test/CodeGen/AArch64/wineh2.mir | 2 +- llvm/test/CodeGen/AArch64/wineh3.mir | 2 +- llvm/test/CodeGen/AArch64/wineh4.mir | 2 +- llvm/test/CodeGen/AArch64/wineh5.mir | 2 +- llvm/test/CodeGen/AArch64/wineh6.mir | 2 +- llvm/test/CodeGen/AArch64/wineh7.mir | 2 +- llvm/test/CodeGen/AArch64/wineh8.mir | 2 +- llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir | 2 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir | 10 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir | 31 +- .../AMDGPU/GlobalISel/legalize-block-addr.mir | 2 +- .../AMDGPU/GlobalISel/regbankselect-block-addr.mir | 2 +- llvm/test/CodeGen/AMDGPU/coalescer-subreg-join.mir | 2 +- .../CodeGen/AMDGPU/constant-fold-imm-immreg.mir | 22 +- .../CodeGen/AMDGPU/couldnt-join-subrange-3.mir | 2 +- llvm/test/CodeGen/AMDGPU/fix-vgpr-copies.mir | 2 +- llvm/test/CodeGen/AMDGPU/flat-load-clustering.mir | 2 +- llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir | 18 +- llvm/test/CodeGen/AMDGPU/hazard.mir | 4 +- llvm/test/CodeGen/AMDGPU/insert-waitcnts-exp.mir | 2 +- llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir | 2 +- llvm/test/CodeGen/AMDGPU/invert-br-undef-vcc.mir | 2 +- llvm/test/CodeGen/AMDGPU/limit-coalesce.mir | 2 +- .../AMDGPU/memory-legalizer-atomic-insert-end.mir | 2 +- ...galizer-multiple-mem-operands-nontemporal-1.mir | 2 +- ...galizer-multiple-mem-operands-nontemporal-2.mir | 2 +- .../CodeGen/AMDGPU/merge-load-store-physreg.mir | 4 +- llvm/test/CodeGen/AMDGPU/merge-load-store.mir | 2 +- llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir | 6 +- .../rename-independent-subregs-mac-operands.mir | 4 +- llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir | 2 +- llvm/test/CodeGen/AMDGPU/schedule-regpressure.mir | 2 +- llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir | 4 +- llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir | 12 +- .../CodeGen/AMDGPU/smem-no-clause-coalesced.mir | 2 +- .../AMDGPU/undefined-physreg-sgpr-spill.mir | 4 +- .../CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir | 4 +- llvm/test/CodeGen/AMDGPU/wqm.mir | 2 +- llvm/test/CodeGen/ARM/ARMLoadStoreDBG.mir | 2 +- .../CodeGen/ARM/ParallelDSP/complex_dot_prod.ll | 120 ++++ .../CodeGen/ARM/ParallelDSP/unroll-n-jam-smlad.ll | 16 +- llvm/test/CodeGen/ARM/cmp1-peephole-thumb.mir | 2 +- llvm/test/CodeGen/ARM/cmp2-peephole-thumb.mir | 2 +- llvm/test/CodeGen/ARM/constant-island-movwt.mir | 2 +- llvm/test/CodeGen/ARM/constant-islands-cfg.mir | 2 +- .../test/CodeGen/ARM/constant-islands-split-IT.mir | 2 +- llvm/test/CodeGen/ARM/dbg-range-extension.mir | 2 +- llvm/test/CodeGen/ARM/expand-pseudos.mir | 6 +- llvm/test/CodeGen/ARM/fp16-litpool-arm.mir | 2 +- llvm/test/CodeGen/ARM/fp16-litpool-thumb.mir | 2 +- llvm/test/CodeGen/ARM/fp16-litpool2-arm.mir | 2 +- llvm/test/CodeGen/ARM/fp16-litpool3-arm.mir | 2 +- .../ARM/ifcvt-diamond-unanalyzable-common.mir | 2 +- llvm/test/CodeGen/ARM/misched-int-basic-thumb2.mir | 2 +- llvm/test/CodeGen/ARM/misched-int-basic.mir | 2 +- llvm/test/CodeGen/ARM/prera-ldst-aliasing.mir | 2 +- llvm/test/CodeGen/ARM/prera-ldst-insertpt.mir | 4 +- llvm/test/CodeGen/ARM/sched-it-debug-nodes.mir | 2 +- llvm/test/CodeGen/ARM/single-issue-r52.mir | 2 +- llvm/test/CodeGen/ARM/v6-jumptable-clobber.mir | 4 +- llvm/test/CodeGen/ARM/vldm-liveness.mir | 2 +- llvm/test/CodeGen/ARM/vldmia-sched.mir | 2 +- llvm/test/CodeGen/Hexagon/bank-conflict.mir | 2 +- .../CodeGen/Hexagon/early-if-conv-lifetime.mir | 2 +- llvm/test/CodeGen/Hexagon/early-if-predicator.mir | 2 +- llvm/test/CodeGen/Hexagon/ifcvt-live-subreg.mir | 2 +- .../CodeGen/Hexagon/pipeliner/swp-phi-start.mir | 2 +- llvm/test/CodeGen/Hexagon/regalloc-bad-undef.mir | 2 +- llvm/test/CodeGen/Lanai/peephole-compare.mir | 18 +- .../print-parse-verify-failedISel-property.mir | 2 +- .../CodeGen/MIR/AArch64/return-address-signing.mir | 4 +- llvm/test/CodeGen/MIR/AArch64/swp.mir | 2 +- llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir | 2 +- llvm/test/CodeGen/MIR/Generic/machine-function.mir | 8 +- .../MIR/PowerPC/peephole-miscompile-extswsli.mir | 2 +- .../test/CodeGen/MIR/PowerPC/prolog_vec_spills.mir | 4 +- .../CodeGen/MIR/X86/branch-folder-with-label.mir | 6 +- llvm/test/CodeGen/MIR/X86/diexpr-win32.mir | 4 +- .../test/CodeGen/MIR/X86/expected-stack-object.mir | 2 +- llvm/test/CodeGen/MIR/X86/fixed-stack-di.mir | 2 +- .../MIR/X86/fixed-stack-memory-operands.mir | 2 +- .../MIR/X86/frame-info-stack-references.mir | 2 +- .../Mips/GlobalISel/instruction-select/add.mir | 2 +- .../Mips/GlobalISel/instruction-select/bitwise.mir | 18 +- .../Mips/GlobalISel/instruction-select/branch.mir | 4 +- .../GlobalISel/instruction-select/constants.mir | 8 +- .../Mips/GlobalISel/instruction-select/fabs.mir | 4 +- .../Mips/GlobalISel/instruction-select/fcmp.mir | 64 +- .../Mips/GlobalISel/instruction-select/fence.mir | 2 +- .../GlobalISel/instruction-select/float_args.mir | 16 +- .../float_arithmetic_operations.mir | 16 +- .../instruction-select/float_constants.mir | 4 +- .../instruction-select/fpext_and_fptrunc.mir | 4 +- .../instruction-select/fptosi_and_fptoui.mir | 4 +- .../Mips/GlobalISel/instruction-select/fsqrt.mir | 4 +- .../instruction-select/gloal_address.mir | 2 +- .../instruction-select/gloal_address_pic.mir | 10 +- .../Mips/GlobalISel/instruction-select/icmp.mir | 22 +- .../instruction-select/inttoptr_and_ptrtoint.mir | 4 +- .../instruction-select/jump_table_and_brjt.mir | 2 +- .../Mips/GlobalISel/instruction-select/load.mir | 6 +- .../instruction-select/load_store_fold.mir | 16 +- .../Mips/GlobalISel/instruction-select/mul.mir | 4 +- .../Mips/GlobalISel/instruction-select/phi.mir | 8 +- .../GlobalISel/instruction-select/pointers.mir | 6 +- .../GlobalISel/instruction-select/rem_and_div.mir | 8 +- .../Mips/GlobalISel/instruction-select/select.mir | 8 +- .../instruction-select/sitofp_and_uitofp.mir | 4 +- .../GlobalISel/instruction-select/stack_args.mir | 2 +- .../Mips/GlobalISel/instruction-select/store.mir | 6 +- .../Mips/GlobalISel/instruction-select/sub.mir | 2 +- .../instruction-select/truncStore_and_aExtLoad.mir | 6 +- .../instruction-select/zextLoad_and_sextLoad.mir | 8 +- .../test/CodeGen/Mips/GlobalISel/legalizer/add.mir | 20 +- .../CodeGen/Mips/GlobalISel/legalizer/bitwise.mir | 56 +- .../CodeGen/Mips/GlobalISel/legalizer/branch.mir | 4 +- .../Mips/GlobalISel/legalizer/ceil_and_floor.mir | 8 +- .../Mips/GlobalISel/legalizer/constants.mir | 16 +- .../CodeGen/Mips/GlobalISel/legalizer/fabs.mir | 4 +- .../CodeGen/Mips/GlobalISel/legalizer/fcmp.mir | 4 +- .../CodeGen/Mips/GlobalISel/legalizer/fence.mir | 2 +- .../legalizer/float_arithmetic_operations.mir | 16 +- .../Mips/GlobalISel/legalizer/float_constants.mir | 4 +- .../GlobalISel/legalizer/fpext_and_fptrunc.mir | 4 +- .../GlobalISel/legalizer/fptosi_and_fptoui.mir | 32 +- .../CodeGen/Mips/GlobalISel/legalizer/fsqrt.mir | 4 +- .../Mips/GlobalISel/legalizer/global_address.mir | 2 +- .../CodeGen/Mips/GlobalISel/legalizer/icmp.mir | 28 +- .../GlobalISel/legalizer/inttoptr_and_ptrtoint.mir | 4 +- .../GlobalISel/legalizer/jump_table_and_brjt.mir | 2 +- .../CodeGen/Mips/GlobalISel/legalizer/load.mir | 8 +- .../test/CodeGen/Mips/GlobalISel/legalizer/mul.mir | 22 +- .../test/CodeGen/Mips/GlobalISel/legalizer/phi.mir | 14 +- .../CodeGen/Mips/GlobalISel/legalizer/pointers.mir | 6 +- .../Mips/GlobalISel/legalizer/rem_and_div.mir | 32 +- .../CodeGen/Mips/GlobalISel/legalizer/select.mir | 16 +- .../GlobalISel/legalizer/sitofp_and_uitofp.mir | 32 +- .../Mips/GlobalISel/legalizer/stack_args.mir | 2 +- .../CodeGen/Mips/GlobalISel/legalizer/store.mir | 8 +- .../test/CodeGen/Mips/GlobalISel/legalizer/sub.mir | 18 +- .../CodeGen/Mips/GlobalISel/legalizer/trap.mir | 2 +- .../CodeGen/Mips/GlobalISel/legalizer/trunc.mir | 2 +- .../legalizer/truncStore_and_aExtLoad.mir | 12 +- .../GlobalISel/legalizer/zextLoad_and_sextLoad.mir | 20 +- .../Mips/GlobalISel/legalizer/zext_and_sext.mir | 4 +- .../truncStore_and_aExtLoad.mir | 4 +- .../mips-prelegalizer-combiner/tryCombine.mir | 2 +- .../zextLoad_and_sextLoad.mir | 20 +- .../regbankselect/TypeInfoforMF_skipCopies.mir | 4 +- .../CodeGen/Mips/GlobalISel/regbankselect/add.mir | 2 +- .../Mips/GlobalISel/regbankselect/bitwise.mir | 18 +- .../Mips/GlobalISel/regbankselect/branch.mir | 4 +- .../CodeGen/Mips/GlobalISel/regbankselect/fabs.mir | 4 +- .../CodeGen/Mips/GlobalISel/regbankselect/fcmp.mir | 4 +- .../Mips/GlobalISel/regbankselect/fence.mir | 2 +- .../Mips/GlobalISel/regbankselect/float_args.mir | 16 +- .../regbankselect/float_arithmetic_operations.mir | 16 +- .../GlobalISel/regbankselect/float_constants.mir | 4 +- .../GlobalISel/regbankselect/fpext_and_fptrunc.mir | 4 +- .../GlobalISel/regbankselect/fptosi_and_fptoui.mir | 4 +- .../Mips/GlobalISel/regbankselect/fsqrt.mir | 4 +- .../GlobalISel/regbankselect/global_address.mir | 2 +- .../regbankselect/global_address_pic.mir | 2 +- .../CodeGen/Mips/GlobalISel/regbankselect/icmp.mir | 4 +- .../regbankselect/inttoptr_and_ptrtoint.mir | 4 +- .../regbankselect/jump_table_and_brjt.mir | 2 +- .../CodeGen/Mips/GlobalISel/regbankselect/load.mir | 12 +- .../regbankselect/long_ambiguous_chain_s32.mir | 8 +- .../regbankselect/long_ambiguous_chain_s64.mir | 8 +- .../CodeGen/Mips/GlobalISel/regbankselect/mul.mir | 4 +- .../CodeGen/Mips/GlobalISel/regbankselect/phi.mir | 12 +- .../Mips/GlobalISel/regbankselect/pointers.mir | 6 +- .../Mips/GlobalISel/regbankselect/rem_and_div.mir | 8 +- .../Mips/GlobalISel/regbankselect/select.mir | 14 +- .../GlobalISel/regbankselect/sitofp_and_uitofp.mir | 4 +- .../Mips/GlobalISel/regbankselect/stack_args.mir | 2 +- .../Mips/GlobalISel/regbankselect/store.mir | 8 +- .../CodeGen/Mips/GlobalISel/regbankselect/sub.mir | 2 +- .../regbankselect/test_TypeInfoforMF.mir | 16 +- .../regbankselect/truncStore_and_aExtLoad.mir | 6 +- .../regbankselect/zextLoad_and_sextLoad.mir | 12 +- .../GlobalISel/regbankselect/zext_and_sext.mir | 4 +- llvm/test/CodeGen/Mips/cconv/vector.ll | 732 +++++++++------------ .../compact-branch-implicit-def.mir | 2 +- .../CodeGen/Mips/compactbranches/empty-block.mir | 2 +- .../indirect-jump-hazard/guards-verify-call.mir | 2 +- .../guards-verify-tailcall.mir | 2 +- llvm/test/CodeGen/Mips/instverify/dext-pos.mir | 2 +- llvm/test/CodeGen/Mips/instverify/dext-size.mir | 2 +- .../CodeGen/Mips/instverify/dextm-pos-size.mir | 2 +- llvm/test/CodeGen/Mips/instverify/dextm-pos.mir | 2 +- llvm/test/CodeGen/Mips/instverify/dextm-size.mir | 2 +- .../CodeGen/Mips/instverify/dextu-pos-size.mir | 2 +- llvm/test/CodeGen/Mips/instverify/dextu-pos.mir | 2 +- .../CodeGen/Mips/instverify/dextu-size-valid.mir | 2 +- llvm/test/CodeGen/Mips/instverify/dextu-size.mir | 2 +- .../test/CodeGen/Mips/instverify/dins-pos-size.mir | 2 +- llvm/test/CodeGen/Mips/instverify/dins-pos.mir | 2 +- llvm/test/CodeGen/Mips/instverify/dins-size.mir | 2 +- .../CodeGen/Mips/instverify/dinsm-pos-size.mir | 2 +- llvm/test/CodeGen/Mips/instverify/dinsm-pos.mir | 2 +- llvm/test/CodeGen/Mips/instverify/dinsm-size.mir | 2 +- .../CodeGen/Mips/instverify/dinsu-pos-size.mir | 2 +- llvm/test/CodeGen/Mips/instverify/dinsu-pos.mir | 2 +- llvm/test/CodeGen/Mips/instverify/dinsu-size.mir | 2 +- llvm/test/CodeGen/Mips/instverify/ext-pos-size.mir | 2 +- llvm/test/CodeGen/Mips/instverify/ext-pos.mir | 2 +- llvm/test/CodeGen/Mips/instverify/ext-size.mir | 2 +- llvm/test/CodeGen/Mips/instverify/ins-pos-size.mir | 2 +- llvm/test/CodeGen/Mips/instverify/ins-pos.mir | 2 +- llvm/test/CodeGen/Mips/instverify/ins-size.mir | 2 +- .../Mips/longbranch/branch-limits-fp-micromips.mir | 4 +- .../longbranch/branch-limits-fp-micromipsr6.mir | 4 +- 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| 2 +- .../X86/Inputs/cache-typeid-resolutions1.ll | 2 +- .../X86/Inputs/cache-typeid-resolutions2.ll | 2 +- .../X86/Inputs/cache-typeid-resolutions3.ll | 2 +- llvm/test/ThinLTO/X86/Inputs/cache.ll | 2 +- llvm/test/ThinLTO/X86/Inputs/callees-metadata.ll | 2 +- llvm/test/ThinLTO/X86/Inputs/cfi-distributed.ll | 2 +- .../ThinLTO/X86/Inputs/cfi-icall-only-bazqux.ll | 2 +- llvm/test/ThinLTO/X86/Inputs/crash_debuginfo.ll | 2 +- llvm/test/ThinLTO/X86/Inputs/deadstrip.ll | 2 +- .../X86/Inputs/debuginfo-compositetype-import.ll | 2 +- .../test/ThinLTO/X86/Inputs/debuginfo-cu-import.ll | 2 +- llvm/test/ThinLTO/X86/Inputs/devirt2.ll | 2 +- .../X86/Inputs/diagnostic-handler-remarks.ll | 2 +- .../X86/Inputs/dicompositetype-unique-alias.ll | 2 +- .../ThinLTO/X86/Inputs/dicompositetype-unique.ll | 2 +- .../ThinLTO/X86/Inputs/dicompositetype-unique2.ll | 2 +- llvm/test/ThinLTO/X86/Inputs/dot-dumper.ll | 2 +- llvm/test/ThinLTO/X86/Inputs/dot-dumper2.ll | 2 +- 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llvm/test/ThinLTO/X86/index-const-prop-dead.ll | 2 +- llvm/test/ThinLTO/X86/index-const-prop-full-lto.ll | 2 +- llvm/test/ThinLTO/X86/index-const-prop-gvref.ll | 2 +- llvm/test/ThinLTO/X86/index-const-prop-ldst.ll | 2 +- llvm/test/ThinLTO/X86/index-const-prop-linkage.ll | 2 +- llvm/test/ThinLTO/X86/index-const-prop.ll | 2 +- llvm/test/ThinLTO/X86/index-const-prop2.ll | 2 +- llvm/test/ThinLTO/X86/internalize.ll | 2 +- llvm/test/ThinLTO/X86/lazyload_metadata.ll | 6 +- .../ThinLTO/X86/linkonce_aliasee_ref_import.ll | 2 +- llvm/test/ThinLTO/X86/linkonce_odr_unnamed_addr.ll | 2 +- .../test/ThinLTO/X86/linkonce_resolution_comdat.ll | 2 +- llvm/test/ThinLTO/X86/llvm.used.ll | 2 +- llvm/test/ThinLTO/X86/load-store-caching.ll | 2 +- llvm/test/ThinLTO/X86/local_name_conflict.ll | 2 +- llvm/test/ThinLTO/X86/local_name_conflict_var.ll | 2 +- llvm/test/ThinLTO/X86/merge-triple.ll | 2 +- llvm/test/ThinLTO/X86/module_asm2.ll | 2 +- llvm/test/ThinLTO/X86/module_asm_glob.ll | 2 +- .../ThinLTO/X86/module_summary_graph_traits.ll | 2 +- llvm/test/ThinLTO/X86/newpm-basic.ll | 2 +- .../ThinLTO/X86/nodevirt-nonpromoted-typeid.ll | 2 +- llvm/test/ThinLTO/X86/noinline.ll | 2 +- llvm/test/ThinLTO/X86/personality-local.ll | 2 +- llvm/test/ThinLTO/X86/personality.ll | 2 +- llvm/test/ThinLTO/X86/pr35472.ll | 2 +- llvm/test/ThinLTO/X86/reference_non_importable.ll | 2 +- llvm/test/ThinLTO/X86/referenced_by_constant.ll | 2 +- llvm/test/ThinLTO/X86/save_objects.ll | 2 +- llvm/test/ThinLTO/X86/strong_non_prevailing.ll | 2 +- llvm/test/ThinLTO/X86/thinlto-internalize-used.ll | 2 +- llvm/test/ThinLTO/X86/tli-nobuiltin.ll | 2 +- llvm/test/ThinLTO/X86/weak_externals.ll | 2 +- llvm/test/ThinLTO/X86/weak_resolution.ll | 2 +- llvm/test/ThinLTO/X86/writeonly.ll | 2 +- llvm/test/ThinLTO/X86/writeonly2.ll | 2 +- llvm/test/Transforms/ConstProp/fma.ll | 259 ++++++++ .../Transforms/FunctionAttrs/noalias_returned.ll | 76 +++ llvm/test/Transforms/FunctionAttrs/writeonly.ll | 30 + .../Transforms/FunctionImport/Inputs/comdat.ll | 2 +- .../FunctionImport/Inputs/funcimport_debug.ll | 2 +- .../FunctionImport/Inputs/funcimport_resolved1.ll | 2 +- .../FunctionImport/Inputs/funcimport_resolved2.ll | 2 +- .../FunctionImport/Inputs/funcimport_var2.ll | 2 +- .../FunctionImport/Inputs/hotness_based_import.ll | 2 +- .../FunctionImport/Inputs/import_stats.ll | 2 +- .../FunctionImport/Inputs/not-prevailing.ll | 2 +- llvm/test/Transforms/FunctionImport/comdat.ll | 2 +- .../Transforms/FunctionImport/funcimport_debug.ll | 2 +- .../FunctionImport/funcimport_resolved.ll | 2 +- .../Transforms/FunctionImport/funcimport_var.ll | 2 +- .../FunctionImport/hotness_based_import.ll | 2 +- .../test/Transforms/FunctionImport/import_stats.ll | 2 +- .../Transforms/FunctionImport/not-prevailing.ll | 2 +- llvm/test/Transforms/InstCombine/AMDGPU/tan.ll | 21 + .../test/Transforms/InstCombine/deref-alloc-fns.ll | 12 +- .../InstCombine/do-not-clone-dbg-declare.ll | 144 ++++ llvm/test/Transforms/InstCombine/fma.ll | 15 +- .../Transforms/InstCombine/icmp-div-constant.ll | 28 +- .../Transforms/InstCombine/malloc-free-delete.ll | 4 +- llvm/test/Transforms/InstCombine/objsize-64.ll | 2 +- .../result-of-usub-is-non-zero-and-no-overflow.ll | 118 +++- .../Transforms/InstSimplify/fold-builtin-fma.ll | 119 ---- ...l-check-in-uadd_with_overflow-of-nonnull-ptr.ll | 19 + ...-usub-by-nonzero-is-non-zero-and-no-overflow.ll | 96 +-- .../Transforms/LoopInterchange/interchangeable.ll | 58 +- .../Transforms/LoopInterchange/perserve-lcssa.ll | 33 +- .../Transforms/LoopInterchange/phi-ordering.ll | 10 +- .../LoopInterchange/pr43176-move-to-new-latch.ll | 140 ++++ .../reductions-across-inner-and-outer-loop.ll | 2 + llvm/test/Transforms/LowerExpectIntrinsic/basic.ll | 31 +- .../Inputs/misexpect-branch-correct.proftext | 38 ++ .../PGOProfile/Inputs/misexpect-branch.proftext | 38 ++ .../Inputs/misexpect-switch-correct.proftext | 16 + .../PGOProfile/Inputs/misexpect-switch.proftext | 16 + .../PGOProfile/Inputs/thinlto_cspgo_bar_gen.ll | 2 +- .../PGOProfile/Inputs/thinlto_cspgo_bar_use.ll | 2 +- .../Inputs/thinlto_indirect_call_promotion.ll | 2 +- .../PGOProfile/Inputs/thinlto_samplepgo_icp.ll | 2 +- .../PGOProfile/Inputs/thinlto_samplepgo_icp2a.ll | 2 +- .../PGOProfile/Inputs/thinlto_samplepgo_icp2b.ll | 2 +- .../PGOProfile/Inputs/thinlto_samplepgo_icp3.ll | 2 +- llvm/test/Transforms/PGOProfile/X86/macho.ll | 2 +- llvm/test/Transforms/PGOProfile/branch1.ll | 2 +- llvm/test/Transforms/PGOProfile/branch2.ll | 2 +- llvm/test/Transforms/PGOProfile/comdat_internal.ll | 2 +- llvm/test/Transforms/PGOProfile/criticaledge.ll | 2 +- .../Transforms/PGOProfile/cspgo_profile_summary.ll | 2 +- llvm/test/Transforms/PGOProfile/diag_FE_profile.ll | 2 +- llvm/test/Transforms/PGOProfile/diag_mismatch.ll | 2 +- .../Transforms/PGOProfile/diag_no_funcprofdata.ll | 2 +- llvm/test/Transforms/PGOProfile/diag_no_profile.ll | 2 +- .../Transforms/PGOProfile/diag_no_value_sites.ll | 2 +- .../Transforms/PGOProfile/do-not-instrument.ll | 2 +- llvm/test/Transforms/PGOProfile/func_entry.ll | 2 +- .../PGOProfile/icp_covariant_call_return.ll | 2 +- .../PGOProfile/icp_covariant_invoke_return.ll | 2 +- llvm/test/Transforms/PGOProfile/icp_invoke.ll | 2 +- .../test/Transforms/PGOProfile/icp_invoke_nouse.ll | 2 +- .../test/Transforms/PGOProfile/icp_mismatch_msg.ll | 2 +- llvm/test/Transforms/PGOProfile/icp_vararg.ll | 2 +- .../PGOProfile/indirect_call_annotation.ll | 2 +- .../Transforms/PGOProfile/indirect_call_profile.ll | 2 +- .../PGOProfile/indirect_call_promotion.ll | 2 +- .../PGOProfile/indirect_call_promotion_vla.ll | 2 +- llvm/test/Transforms/PGOProfile/indirectbr.ll | 2 +- llvm/test/Transforms/PGOProfile/landingpad.ll | 2 +- .../Transforms/PGOProfile/large_count_remarks.ll | 2 +- llvm/test/Transforms/PGOProfile/loop1.ll | 2 +- llvm/test/Transforms/PGOProfile/loop2.ll | 2 +- llvm/test/Transforms/PGOProfile/memcpy.ll | 2 +- .../Transforms/PGOProfile/memop_size_annotation.ll | 2 +- llvm/test/Transforms/PGOProfile/memop_size_opt.ll | 2 +- .../Transforms/PGOProfile/memop_size_opt_zero.ll | 2 +- .../PGOProfile/misexpect-branch-correct.ll | 94 +++ .../PGOProfile/misexpect-branch-stripped.ll | 115 ++++ .../PGOProfile/misexpect-branch-unpredictable.ll | 89 +++ .../test/Transforms/PGOProfile/misexpect-branch.ll | 130 ++++ .../PGOProfile/misexpect-switch-default.ll | 196 ++++++ .../test/Transforms/PGOProfile/misexpect-switch.ll | 293 +++++++++ .../Transforms/PGOProfile/multiple_hash_profile.ll | 2 +- llvm/test/Transforms/PGOProfile/noreturncall.ll | 2 +- llvm/test/Transforms/PGOProfile/preinline.ll | 2 +- llvm/test/Transforms/PGOProfile/remap.ll | 2 +- llvm/test/Transforms/PGOProfile/select1.ll | 2 +- llvm/test/Transforms/PGOProfile/select2.ll | 2 +- .../Transforms/PGOProfile/select_hash_conflict.ll | 2 +- llvm/test/Transforms/PGOProfile/single_bb.ll | 2 +- .../PGOProfile/statics_counter_naming.ll | 2 +- llvm/test/Transforms/PGOProfile/switch.ll | 2 +- .../Transforms/PGOProfile/thinlto_cspgo_gen.ll | 2 +- .../Transforms/PGOProfile/thinlto_cspgo_use.ll | 2 +- .../PGOProfile/thinlto_indirect_call_promotion.ll | 2 +- .../Transforms/PGOProfile/thinlto_samplepgo_icp.ll | 2 +- .../PGOProfile/thinlto_samplepgo_icp2.ll | 2 +- .../PGOProfile/thinlto_samplepgo_icp3.ll | 2 +- .../thinlto_samplepgo_icp_droppeddead.ll | 2 +- llvm/test/Transforms/PGOProfile/unreachable_bb.ll | 2 +- llvm/test/tools/llvm-lto2/X86/pipeline.ll | 2 +- llvm/test/tools/llvm-lto2/X86/stats-file-option.ll | 2 +- llvm/tools/llvm-nm/CMakeLists.txt | 1 + llvm/tools/llvm-nm/llvm-nm.cpp | 30 + llvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp | 96 ++- llvm/tools/llvm-reduce/CMakeLists.txt | 1 + llvm/tools/llvm-reduce/DeltaManager.h | 4 +- llvm/tools/llvm-reduce/deltas/Delta.cpp | 8 +- llvm/tools/llvm-reduce/deltas/Delta.h | 16 +- llvm/tools/llvm-reduce/deltas/ReduceFunctions.cpp | 6 +- llvm/tools/llvm-reduce/deltas/ReduceGlobalVars.cpp | 3 + llvm/tools/llvm-reduce/deltas/ReduceMetadata.cpp | 138 ++++ llvm/tools/llvm-reduce/deltas/ReduceMetadata.h | 18 + llvm/tools/llvm-reduce/llvm-reduce.cpp | 2 - llvm/utils/TableGen/GlobalISelEmitter.cpp | 74 ++- llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn | 1 + .../secondary/llvm/lib/Transforms/Utils/BUILD.gn | 1 + .../gn/secondary/llvm/tools/llvm-reduce/BUILD.gn | 2 + 1452 files changed, 8914 insertions(+), 5104 deletions(-) create mode 100644 clang/test/OpenMP/constexpr_partial_array.cpp create mode 100644 clang/test/Profile/Inputs/misexpect-branch-nonconst-expect-arg. [...] create mode 100644 clang/test/Profile/Inputs/misexpect-branch.proftext create mode 100644 clang/test/Profile/Inputs/misexpect-switch-default-only.proftext create mode 100644 clang/test/Profile/Inputs/misexpect-switch-default.proftext create mode 100644 clang/test/Profile/Inputs/misexpect-switch-nonconst.proftext create mode 100644 clang/test/Profile/Inputs/misexpect-switch.proftext create mode 100644 clang/test/Profile/misexpect-branch-cold.c create mode 100644 clang/test/Profile/misexpect-branch-nonconst-expected-val.c create mode 100644 clang/test/Profile/misexpect-branch-unpredictable.c create mode 100644 clang/test/Profile/misexpect-branch.c create mode 100644 clang/test/Profile/misexpect-switch-default.c create mode 100644 clang/test/Profile/misexpect-switch-nonconst.c create mode 100644 clang/test/Profile/misexpect-switch-only-default-case.c create mode 100644 clang/test/Profile/misexpect-switch.c create mode 100644 clang/test/Sema/div-sizeof-array.cpp create mode 100644 compiler-rt/test/fuzzer/merge_two_step.test create mode 100644 libcxx/cmake/caches/Apple.cmake create mode 100644 llvm/include/llvm/Transforms/Utils/MisExpect.h create mode 100644 llvm/lib/Support/ABIBreak.cpp create mode 100644 llvm/lib/Transforms/Utils/MisExpect.cpp create mode 100644 llvm/test/Analysis/MemorySSA/debugvalue2.ll create mode 100644 llvm/test/CodeGen/ARM/ParallelDSP/complex_dot_prod.ll create mode 100644 llvm/test/CodeGen/Mips/msa/nori.b.ll create mode 100644 llvm/test/Object/Inputs/tapi-invalid-v1.tbd create mode 100644 llvm/test/Object/Inputs/tapi-invalid-v2.tbd create mode 100644 llvm/test/Object/Inputs/tapi-invalid-v3.tbd create mode 100644 llvm/test/Object/Inputs/tapi-v1.tbd create mode 100644 llvm/test/Object/Inputs/tapi-v2.tbd create mode 100644 llvm/test/Object/Inputs/tapi-v3.tbd create mode 100644 llvm/test/Object/nm-tapi-invalids.test create mode 100644 llvm/test/Object/nm-tapi.test create mode 100755 llvm/test/Reduce/Inputs/remove-metadata.py create mode 100644 llvm/test/Reduce/remove-metadata.ll create mode 100644 llvm/test/TableGen/GlobalISelEmitterRegSequence.td create mode 100644 llvm/test/Transforms/ConstProp/fma.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/writeonly.ll create mode 100644 llvm/test/Transforms/InstCombine/AMDGPU/tan.ll create mode 100644 llvm/test/Transforms/InstCombine/do-not-clone-dbg-declare.ll delete mode 100644 llvm/test/Transforms/InstSimplify/fold-builtin-fma.ll create mode 100644 llvm/test/Transforms/LoopInterchange/pr43176-move-to-new-latch.ll create mode 100644 llvm/test/Transforms/PGOProfile/Inputs/misexpect-branch-correct [...] create mode 100644 llvm/test/Transforms/PGOProfile/Inputs/misexpect-branch.proftext create mode 100644 llvm/test/Transforms/PGOProfile/Inputs/misexpect-switch-correct [...] create mode 100644 llvm/test/Transforms/PGOProfile/Inputs/misexpect-switch.proftext create mode 100644 llvm/test/Transforms/PGOProfile/misexpect-branch-correct.ll create mode 100644 llvm/test/Transforms/PGOProfile/misexpect-branch-stripped.ll create mode 100644 llvm/test/Transforms/PGOProfile/misexpect-branch-unpredictable.ll create mode 100644 llvm/test/Transforms/PGOProfile/misexpect-branch.ll create mode 100644 llvm/test/Transforms/PGOProfile/misexpect-switch-default.ll create mode 100644 llvm/test/Transforms/PGOProfile/misexpect-switch.ll create mode 100644 llvm/tools/llvm-reduce/deltas/ReduceMetadata.cpp create mode 100644 llvm/tools/llvm-reduce/deltas/ReduceMetadata.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (6cd136318 -> 4b89a11af)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards 6cd136318 0: update: llvm-linux: boot new 4b89a11af 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (6cd136318) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-build_llvm/console.log | 12180 ++++++++++++++++---------------- 03-build_linux/console.log | 1784 +++-- 04-boot_linux/console.log | 472 +- console.log | 14602 ++++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 6 files changed, 14609 insertions(+), 14605 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allnoconfig updated (4a23ae5e787 -> abcc2a879c9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allnoconfig in repository toolchain/ci/llvm-project. from 4a23ae5e787 GlobalISel/TableGen: Handle REG_SEQUENCE patterns adds ff02109ad47 [Function] Factor out GetCallEdgeForReturnAddress, NFC adds 3ef7dbd6650 [lldbtest] Add an "expected_cmd_failure" option to the file [...] adds 870ffe3cee6 [NFC][InstSimplify] rewrite test added in r371537 to use no [...] adds a9beacbac8d [X86] Updated target specific selection dag code to conserv [...] adds b5890a329a0 Fix for PR43175: compiler crash when trying to emit noncapt [...] adds 16f5605382d [NFC][InstCombine] rewrite test added in r371537 to use non [...] adds 4d2b4077e70 [x86] add test for false dependency with AVX; NFC adds 38e033bf33e Re-land Remove REQUIRES:shell from tests that pass for me o [...] adds 7a54d76fa54 [OPENMP5.0]Allow teams directive outside of the target directives. adds 6c6f5a99845 [mips] Allow PT_LOAD to have overlapping p_offset ranges on [...] adds 699bea494c0 llvm-reduce: Simplify testing using -implicit-check-not adds 1e1db800487 [ValueTracking] Factor our common speculation suppression l [...] adds 045b2270ceb When evaluating a __builtin_constant_p conditional, always [...] adds cffa630c809 [Loads] Move generic code out of vectorizer into a location [...] adds c9f5aa99acb Actually reorder not and env in crash-recovery-modules.m adds 6ca76ceb63b Fix a thinko in handling the QSetLogging packet. adds 5fc4bee355a Move LLVM_ENABLE_ABI_BREAKING_CHECKS variables to their own [...] adds 477c1df4b9d llvm-reduce: Add pass to reduce Metadata adds 345fbfd7499 llvm-remove: Remove "using namespace" in header. adds aac114ca140 llvm-reduce: Remove some unused headers/more narrowly include them adds f7b4022db17 [MemorySSA] Do not create memoryaccesses for debug info int [...] adds 244e7384854 Adding support for overriding LLVM_ENABLE_RUNTIMES for runt [...] adds 6a2603c0633 llvm-reduce: Add pass to reduce parameters adds 7b1d793713c Reland "Change the X86 datalayout to add three address spac [...] adds a6e0bef3124 Update ReleaseNotes: add enabling of MemorySSA. adds 2af5b193d5e [AArch64][GlobalISel] Support sibling calls with mismatched [...] adds d40ddb9df26 [clang-format] Apply BAS_AlwaysBreak to C++11 braced lists adds 469d42fcf6b [GlobalISel] When a tail call is emitted in a block, stop t [...] adds f9cc0393b34 [MemorySSA] MemorySSA should not model debuginfo, and need [...] adds 0910a03bc25 Remove xfail NetBSD mark from ignored-interceptors-mmap.cpp adds 8b83f50c034 Remove xfail i386 NetBSD mark in vptr-non-unique-typeinfo.cpp adds f88f46358db [llvm-nm] Add tapi file support adds b2b0ccab2f7 [Object][TextAPI] NFC, fix tapi lit tests adds 9607f5d8020 [clang-scan-deps][NFC] Fix tests - prevent FileCheck matchi [...] adds c856eb0b76b Revert "Adding support for overriding LLVM_ENABLE_RUNTIMES [...] adds 068b3628149 Revert "llvm-reduce: Add pass to reduce parameters" adds 7b4237d3ccb Emit -Wmicrosoft-enum-value warning instead of error in MS ABI adds f0321c094d9 Skip a test in TestProcessIO.py when running against ios devices. adds 9b27586e834 Ah, only skip this for embedded darwin targets. adds 394a8ed8f1a clang-misexpect: Profile Guided Validation of Performance A [...] adds 56a34f4541c [llvm-nm] Fix -DBUILD_SHARED_LIBS=ON builds after D66160/r371576 adds 9ca1b94a6d3 [CodeGen] Add alias for cpu_dispatch function with IFunc & [...] adds 6b1c6c1287d [Debuginfo][Instcombiner] Do not clone dbg.declare. adds 2aace1ea226 [ELF][test] Make tests more tolerant to exact symbol addresses adds 37367646578 [Attributor][Fix] Manifest nocapture only in CSArgument or [...] adds 1d68ed8c24e [Attributor] Implement "noalias" callsite argument deduction adds 27f2b81b6b7 [llvm-objcopy] Simplify --prefix-alloc-sections adds c26b3940c32 [TLI][AMDGPU] AMDPAL does not have library functions adds 6b9df910d04 [LTO] Avoid calling GlobalValue::getGUID (MD5) twice adds 17ea9b463c6 [NFC][ARM] Add and modify tests adds e4961218fd5 [LoopInterchange] Properly move condition, induction increm [...] adds b250d5ff5e7 [LLDB] Do not try to canonicalize gethostname() result adds 73ec745793a [ARM] Take into account -mcpu and -mfpu options while handl [...] adds 57256af307a Revert "clang-misexpect: Profile Guided Validation of Perfo [...] adds 3a4781bbf4f [LLDB][ELF] Load both, .symtab and .dynsym sections adds 813f05915d2 [LLDB][ELF] Fixup for comments in D67390 adds e79381c3f7a [LoopInterchange] Drop unused splitInnerLoopHeader declaration. adds 4dae283cd3e [InstCombine] Fixed handling of isOpNewLike (PR11748) adds 57ebb50a0ad [NFC] Fixed test adds af5ba2873f5 [NFC] Updated objsize-64.ll test adds 3240ad4ced0 [Diagnostics] Add -Wsizeof-array-div adds e0d9a0bd59d Fix -Wdocumentation warning - void function doesn't need a [...] adds d811d9115b0 [mips][msa] Fix infinite loop for mips.nori.b intrinsic adds 48904e9452d [Alignment] Use llvm::Align in MachineFunction and TargetLo [...] adds 80bea345d11 [InstCombine] fold sign-bit compares of srem adds f78474ba8ae gn build: add include_dir that's necessary after r371564 adds b3b2064c518 [LangRef] fix punctuation; NFC adds 9703f46fc1b [lldb][NFC] Sort files in unittests/Expression/CMakeLists.txt adds 3183466aa60 [LangRef] add link for fma intrinsic adds 97264366fba [Alignment][NFC] use llvm::Align for AsmPrinter::EmitAlignment adds 29ba5e0817a [InstSimplify] regenerate test CHECKs; NFC adds 1761f6fc42d [lldb][NFC] Remove dead code in SBAddress::GetDescription adds 9c4047f2672 [ConstProp] move test file from InstSimplify; NFC adds f054067f276 [libFuzzer] Make -merge=1 to reuse coverage information fro [...] adds ede0905c1fb [ConstProp] add tests for fma that produce NaN; NFC adds 1ccba7c1a10 LLVM: Optimization Pass: Remove conflicting attribute, if a [...] adds 3ad8278737d [lldb][NFC] Make include directories in Clang expression pa [...] adds d44c4a71df9 Revert "[LLDB][ELF] Fixup for comments in D67390" adds 2f3884ca1d8 Revert "[LLDB][ELF] Load both, .symtab and .dynsym sections" adds b42565f2fc7 gn build: Merge r371562 adds 5957a61ff8e [OPENMP]Updated status page, NFC. adds 161cca266a9 [scudo][standalone] Android related improvements adds 8aeb7bb013a [NFC][InstSimplify] Add extra test for D67411 with @llvm.assume adds 00c1ee48e4c [InstSimplify] Pass SimplifyQuery into simplifyUnsignedRang [...] adds 1be634044dd [OPENMP] Update the diagnosis message for canonical loop fo [...] adds 0c1257f517e [Clang][Bundler] Fix for a potential memory leak [NFC] adds 51de22c8ee6 Revert [InstCombine] Use SimplifyFMulInst to simplify multi [...] adds 7bdad084294 Reland "clang-misexpect: Profile Guided Validation of Perfo [...] adds 85eff49d748 gn build: Merge r371635 adds e39b5710c92 [Clang][Bundler] Replace std::vector by SmallVector [NFC] adds 340b7252029 [libc++] Add a CMake cache for Apple-specific configuration [...] new b51d5605b18 Consolidate swap, swap_ranges, and iter_swap in <type_traits>. new 81196a595c6 LiveIntervals: Split live intervals on multiple dead defs new abcc2a879c9 [MS] Consder constexpr globals to be inline, as in C++17 The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang/docs/OpenMPSupport.rst | 6 +- clang/include/clang/Basic/DiagnosticDriverKinds.td | 3 + .../include/clang/Basic/DiagnosticFrontendKinds.td | 7 +- clang/include/clang/Basic/DiagnosticGroups.td | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 6 +- clang/lib/AST/ExprConstant.cpp | 104 ++- clang/lib/Basic/Targets/OSTargets.h | 6 +- clang/lib/Basic/Targets/X86.h | 32 +- clang/lib/CodeGen/CGExpr.cpp | 5 + clang/lib/CodeGen/CodeGenAction.cpp | 26 + clang/lib/CodeGen/CodeGenModule.cpp | 27 +- clang/lib/Driver/ToolChains/Arch/ARM.cpp | 33 +- clang/lib/Format/ContinuationIndenter.cpp | 4 +- clang/lib/Frontend/CompilerInvocation.cpp | 3 + clang/lib/Sema/SemaDecl.cpp | 30 +- clang/lib/Sema/SemaExpr.cpp | 31 +- clang/lib/Sema/SemaOpenMP.cpp | 36 +- clang/test/Analysis/crash-trace.c | 7 +- .../test/CXX/dcl.dcl/dcl.spec/dcl.constexpr/p1.cpp | 12 +- clang/test/CXX/drs/dr7xx.cpp | 10 +- .../Inputs/header_stat_before_open_cdb.json | 4 +- clang/test/ClangScanDeps/Inputs/no-werror.json | 2 +- clang/test/ClangScanDeps/Inputs/regular_cdb.json | 8 +- .../subframework_header_dir_symlink_cdb.json | 4 +- clang/test/ClangScanDeps/Inputs/symlink_cdb.json | 4 +- .../test/ClangScanDeps/Inputs/vfsoverlay_cdb.json | 2 +- clang/test/ClangScanDeps/error.cpp | 2 +- clang/test/ClangScanDeps/header_stat_before_open.m | 4 +- clang/test/ClangScanDeps/no-werror.cpp | 4 +- clang/test/ClangScanDeps/regular_cdb.cpp | 12 +- .../subframework_header_dir_symlink.m | 10 +- clang/test/ClangScanDeps/symlink.cpp | 8 +- clang/test/ClangScanDeps/vfsoverlay.cpp | 4 +- clang/test/CodeGen/Inputs/thinlto-multi-module.ll | 2 +- clang/test/CodeGen/Inputs/thinlto_backend.ll | 2 +- .../Inputs/thinlto_backend_local_name_conflict1.ll | 2 +- .../Inputs/thinlto_backend_local_name_conflict2.ll | 2 +- clang/test/CodeGen/attr-cpuspecific.c | 62 +- clang/test/CodeGen/attr-target-mv-func-ptrs.c | 2 +- clang/test/CodeGen/attr-target-mv-va-args.c | 6 +- clang/test/CodeGen/attr-target-mv.c | 36 +- clang/test/CodeGen/iamcu-abi.c | 3 +- clang/test/CodeGen/target-data.c | 14 +- ...nlto-diagnostic-handler-remarks-with-hotness.ll | 2 +- .../CodeGen/thinlto-distributed-backend-skip.ll | 2 +- .../test/CodeGen/thinlto-distributed-cfi-devirt.ll | 2 +- clang/test/CodeGen/thinlto-distributed-cfi.ll | 2 +- clang/test/CodeGen/thinlto-distributed.ll | 2 +- clang/test/CodeGen/thinlto-multi-module.ll | 2 +- clang/test/CodeGen/thinlto_backend.ll | 13 +- .../CodeGen/thinlto_backend_local_name_conflict.ll | 2 +- clang/test/CodeGenCXX/attr-cpuspecific.cpp | 6 +- clang/test/CodeGenCXX/attr-target-mv-diff-ns.cpp | 12 +- clang/test/CodeGenCXX/attr-target-mv-inalloca.cpp | 4 +- .../CodeGenCXX/attr-target-mv-member-funcs.cpp | 36 +- clang/test/CodeGenCXX/attr-target-mv-modules.cpp | 2 +- .../CodeGenCXX/attr-target-mv-out-of-line-defs.cpp | 6 +- clang/test/CodeGenCXX/attr-target-mv-overloads.cpp | 12 +- .../CodeGenCXX/ms-constexpr-static-data-member.cpp | 26 + .../ms-integer-static-data-members-exported.cpp | 2 +- .../CodeGenCXX/ms-integer-static-data-members.cpp | 3 +- clang/test/Driver/arm-features.c | 25 +- clang/test/Driver/check-time-trace-sections.cpp | 1 - clang/test/Driver/check-time-trace.cpp | 1 - clang/test/Driver/clang-offload-bundler.c | 3 +- clang/test/Driver/crash-report-crashfile.m | 2 +- clang/test/Driver/rewrite-map-in-diagnostics.c | 7 +- clang/test/Format/style-on-command-line.cpp | 2 +- clang/test/Frontend/dependency-gen-has-include.c | 14 +- clang/test/Index/crash-recovery-modules.m | 9 +- clang/test/Modules/at-import-in-framework-header.m | 2 - clang/test/Modules/builtins.m | 1 - .../Modules/dependency-dump-dependent-module.m | 2 - clang/test/Modules/dependency-dump.m | 2 - clang/test/Modules/implicit-invalidate-common.c | 1 - clang/test/OpenMP/constexpr_partial_array.cpp | 10 + .../distribute_parallel_for_simd_loop_messages.cpp | 30 +- .../test/OpenMP/distribute_simd_loop_messages.cpp | 26 +- clang/test/OpenMP/for_loop_messages.cpp | 22 +- clang/test/OpenMP/for_simd_loop_messages.cpp | 30 +- clang/test/OpenMP/parallel_for_ast_print.cpp | 12 +- clang/test/OpenMP/parallel_for_codegen.cpp | 127 ++-- clang/test/OpenMP/parallel_for_loop_messages.cpp | 22 +- .../OpenMP/parallel_for_simd_loop_messages.cpp | 30 +- clang/test/OpenMP/simd_loop_messages.cpp | 24 +- .../OpenMP/target_parallel_for_loop_messages.cpp | 22 +- .../target_parallel_for_simd_loop_messages.cpp | 30 +- clang/test/OpenMP/target_simd_loop_messages.cpp | 30 +- .../target_teams_distribute_loop_messages.cpp | 22 +- ...teams_distribute_parallel_for_loop_messages.cpp | 22 +- ..._distribute_parallel_for_simd_loop_messages.cpp | 30 +- .../target_teams_distribute_simd_loop_messages.cpp | 20 +- clang/test/OpenMP/task_firstprivate_codegen.cpp | 2 - clang/test/OpenMP/task_private_codegen.cpp | 2 - .../test/OpenMP/taskloop_firstprivate_codegen.cpp | 3 +- clang/test/OpenMP/taskloop_lastprivate_codegen.cpp | 3 +- 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llvm/lib/Target/AMDGPU/R600AsmPrinter.cpp | 2 +- llvm/lib/Target/ARC/ARCMachineFunctionInfo.h | 4 +- llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 14 +- llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 11 +- llvm/lib/Target/Mips/MCTargetDesc/MipsMCNaCl.h | 5 +- .../Mips/MCTargetDesc/MipsNaClELFStreamer.cpp | 2 +- llvm/lib/Target/Mips/MipsAsmPrinter.cpp | 6 +- llvm/lib/Target/Mips/MipsBranchExpansion.cpp | 2 +- llvm/lib/Target/Mips/MipsConstantIslandPass.cpp | 4 +- llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 1 + llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 7 +- llvm/lib/Target/PowerPC/PPCBranchSelector.cpp | 13 +- llvm/lib/Target/SystemZ/SystemZLongBranch.cpp | 6 +- llvm/lib/Target/X86/X86AsmPrinter.cpp | 4 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 6 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 28 +- llvm/lib/Target/X86/X86InstrInfo.td | 6 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 17 +- llvm/lib/Target/X86/X86TargetMachine.h | 3 + llvm/lib/Target/XCore/XCoreAsmPrinter.cpp | 4 +- llvm/lib/TextAPI/MachO/Architecture.cpp | 25 +- llvm/lib/TextAPI/MachO/TextStubCommon.cpp | 2 +- llvm/lib/Transforms/IPO/Attributor.cpp | 64 +- llvm/lib/Transforms/IPO/FunctionAttrs.cpp | 33 +- llvm/lib/Transforms/IPO/SampleProfile.cpp | 3 + .../Transforms/InstCombine/InstCombineCalls.cpp | 23 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 42 ++ .../Transforms/InstCombine/InstCombineInternal.h | 2 + .../InstCombine/InstructionCombining.cpp | 15 + .../Instrumentation/PGOInstrumentation.cpp | 4 + llvm/lib/Transforms/Scalar/LoopInterchange.cpp | 62 +- .../lib/Transforms/Scalar/LowerExpectIntrinsic.cpp | 31 +- llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 5 +- llvm/lib/Transforms/Utils/CMakeLists.txt | 1 + llvm/lib/Transforms/Utils/MisExpect.cpp | 177 +++++ .../Vectorize/LoopVectorizationLegality.cpp | 66 -- llvm/test/Analysis/MemorySSA/debugvalue2.ll | 54 ++ .../AArch64/GlobalISel/arm64-regbankselect.mir | 10 +- .../GlobalISel/call-translator-tail-call.ll | 37 +- .../AArch64/GlobalISel/combine-anyext-crash.mir | 2 +- .../CodeGen/AArch64/GlobalISel/fold-fp-select.mir | 22 +- .../CodeGen/AArch64/GlobalISel/fold-select.mir | 4 +- .../GlobalISel/fp128-legalize-crash-pr35690.mir | 2 +- .../CodeGen/AArch64/GlobalISel/fp16-copy-gpr.mir | 6 +- .../CodeGen/AArch64/GlobalISel/inline-memcpy.mir | 6 +- .../CodeGen/AArch64/GlobalISel/inline-memmove.mir | 8 +- .../CodeGen/AArch64/GlobalISel/inline-memset.mir | 8 +- .../AArch64/GlobalISel/inline-small-memcpy.mir | 4 +- .../CodeGen/AArch64/GlobalISel/legalize-add.mir | 4 +- .../AArch64/GlobalISel/legalize-blockaddress.mir | 2 +- .../CodeGen/AArch64/GlobalISel/legalize-ceil.mir | 4 +- .../CodeGen/AArch64/GlobalISel/legalize-cmp.mir | 2 +- .../CodeGen/AArch64/GlobalISel/legalize-cos.mir | 12 +- .../CodeGen/AArch64/GlobalISel/legalize-div.mir | 2 +- .../AArch64/GlobalISel/legalize-dyn-alloca.mir | 6 +- .../CodeGen/AArch64/GlobalISel/legalize-exp.mir | 12 +- .../CodeGen/AArch64/GlobalISel/legalize-ext.mir | 18 +- .../CodeGen/AArch64/GlobalISel/legalize-fexp2.mir | 12 +- .../CodeGen/AArch64/GlobalISel/legalize-fma.mir | 10 +- .../CodeGen/AArch64/GlobalISel/legalize-frint.mir | 16 +- .../GlobalISel/legalize-intrinsic-round.mir | 16 +- .../GlobalISel/legalize-intrinsic-trunc.mir | 12 +- .../GlobalISel/legalize-inttoptr-xfail-1.mir | 2 +- .../GlobalISel/legalize-inttoptr-xfail-2.mir | 2 +- .../legalize-load-store-vector-of-ptr.mir | 6 +- .../AArch64/GlobalISel/legalize-load-store.mir | 18 +- .../CodeGen/AArch64/GlobalISel/legalize-log.mir | 12 +- .../CodeGen/AArch64/GlobalISel/legalize-log10.mir | 12 +- .../CodeGen/AArch64/GlobalISel/legalize-log2.mir | 12 +- .../AArch64/GlobalISel/legalize-nearbyint.mir | 14 +- .../GlobalISel/legalize-non-pow2-load-store.mir | 2 +- .../CodeGen/AArch64/GlobalISel/legalize-phi.mir | 14 +- .../CodeGen/AArch64/GlobalISel/legalize-pow.mir | 10 +- .../AArch64/GlobalISel/legalize-s128-div.mir | 4 +- .../CodeGen/AArch64/GlobalISel/legalize-select.mir | 4 +- .../AArch64/GlobalISel/legalize-shuffle-vector.mir | 6 +- .../CodeGen/AArch64/GlobalISel/legalize-sin.mir | 12 +- .../CodeGen/AArch64/GlobalISel/legalize-sqrt.mir | 4 +- .../AArch64/GlobalISel/legalize-vector-icmp.mir | 128 ++-- .../legalizer-combiner-zext-trunc-crash.mir | 2 +- .../AArch64/GlobalISel/load-addressing-modes.mir | 42 +- .../GlobalISel/localizer-in-O0-pipeline.mir | 2 +- llvm/test/CodeGen/AArch64/GlobalISel/localizer.mir | 2 +- .../GlobalISel/machine-cse-mid-pipeline.mir | 2 +- .../GlobalISel/non-pow-2-extload-combine.mir | 2 +- .../AArch64/GlobalISel/observer-change-crash.mir | 2 +- .../AArch64/GlobalISel/opt-fold-compare.mir | 30 +- .../AArch64/GlobalISel/opt-shuffle-splat.mir | 12 +- .../prelegalizercombiner-extending-loads-s1.mir | 2 +- .../GlobalISel/regbank-extract-vector-elt.mir | 8 +- .../CodeGen/AArch64/GlobalISel/regbank-extract.mir | 2 +- .../CodeGen/AArch64/GlobalISel/regbank-fma.mir | 4 +- .../GlobalISel/regbank-insert-vector-elt.mir | 12 +- .../AArch64/GlobalISel/regbank-intrinsic-round.mir | 16 +- .../AArch64/GlobalISel/regbank-intrinsic-trunc.mir | 4 +- .../AArch64/GlobalISel/regbank-nearbyint.mir | 14 +- .../CodeGen/AArch64/GlobalISel/regbank-select.mir | 12 +- .../AArch64/GlobalISel/regbank-trunc-s128.mir | 2 +- .../GlobalISel/regbankselect-build-vector.mir | 2 +- .../GlobalISel/regbankselect-unmerge-vec.mir | 4 +- .../GlobalISel/select-arith-extended-reg.mir | 50 +- .../GlobalISel/select-atomic-load-store.mir | 2 +- .../CodeGen/AArch64/GlobalISel/select-binop.mir | 4 +- .../AArch64/GlobalISel/select-blockaddress.mir | 2 +- .../CodeGen/AArch64/GlobalISel/select-bswap.mir | 6 +- .../AArch64/GlobalISel/select-build-vector.mir | 10 +- .../test/CodeGen/AArch64/GlobalISel/select-cbz.mir | 4 +- .../AArch64/GlobalISel/select-concat-vectors.mir | 4 +- .../CodeGen/AArch64/GlobalISel/select-ctlz.mir | 18 +- .../GlobalISel/select-extract-vector-elt.mir | 16 +- .../CodeGen/AArch64/GlobalISel/select-fcmp.mir | 4 +- .../AArch64/GlobalISel/select-frint-nofp16.mir | 6 +- .../CodeGen/AArch64/GlobalISel/select-frint.mir | 16 +- .../GlobalISel/select-insert-vector-elt.mir | 12 +- .../CodeGen/AArch64/GlobalISel/select-int-ext.mir | 18 +- .../AArch64/GlobalISel/select-intrinsic-round.mir | 16 +- .../AArch64/GlobalISel/select-intrinsic-trunc.mir | 16 +- .../AArch64/GlobalISel/select-jump-table-brjt.mir | 2 +- .../AArch64/GlobalISel/select-ldaxr-intrin.mir | 8 +- .../AArch64/GlobalISel/select-ldxr-intrin.mir | 8 +- .../GlobalISel/select-load-store-vector-of-ptr.mir | 4 +- .../CodeGen/AArch64/GlobalISel/select-load.mir | 8 +- .../AArch64/GlobalISel/select-nearbyint.mir | 14 +- .../test/CodeGen/AArch64/GlobalISel/select-phi.mir | 4 +- .../CodeGen/AArch64/GlobalISel/select-pr32733.mir | 2 +- .../CodeGen/AArch64/GlobalISel/select-select.mir | 4 +- .../AArch64/GlobalISel/select-shuffle-vector.mir | 8 +- .../select-shufflevec-undef-mask-elt.mir | 2 +- .../AArch64/GlobalISel/select-stlxr-intrin.mir | 8 +- .../CodeGen/AArch64/GlobalISel/select-store.mir | 8 +- .../test/CodeGen/AArch64/GlobalISel/select-stx.mir | 8 +- .../CodeGen/AArch64/GlobalISel/select-trap.mir | 2 +- .../CodeGen/AArch64/GlobalISel/select-uaddo.mir | 4 +- .../CodeGen/AArch64/GlobalISel/select-unmerge.mir | 14 +- .../AArch64/GlobalISel/select-vector-icmp.mir | 160 ++--- .../AArch64/GlobalISel/select-vector-shift.mir | 8 +- .../GlobalISel/select-with-no-legality-check.mir | 304 ++++----- .../AArch64/GlobalISel/store-addressing-modes.mir | 14 +- .../CodeGen/AArch64/aarch64-mov-debug-locs.mir | 2 +- llvm/test/CodeGen/AArch64/aarch64-vector-pcs.mir | 2 +- .../CodeGen/AArch64/branch-relax-block-size.mir | 2 +- .../dont-shrink-wrap-stack-mayloadorstore.mir | 4 +- llvm/test/CodeGen/AArch64/irg-nomem.mir | 2 +- llvm/test/CodeGen/AArch64/jump-table-compress.mir | 2 +- .../AArch64/machine-outliner-inline-asm-adrp.mir | 6 +- llvm/test/CodeGen/AArch64/movimm-wzr.mir | 2 +- .../CodeGen/AArch64/reverse-csr-restore-seq.mir | 2 +- llvm/test/CodeGen/AArch64/spill-undef.mir | 2 +- llvm/test/CodeGen/AArch64/tailcall-ccmismatch.ll | 1 + llvm/test/CodeGen/AArch64/wineh-frame0.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame1.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame2.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame3.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame4.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame5.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame6.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame7.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame8.mir | 2 +- llvm/test/CodeGen/AArch64/wineh1.mir | 2 +- llvm/test/CodeGen/AArch64/wineh2.mir | 2 +- llvm/test/CodeGen/AArch64/wineh3.mir | 2 +- llvm/test/CodeGen/AArch64/wineh4.mir | 2 +- llvm/test/CodeGen/AArch64/wineh5.mir | 2 +- llvm/test/CodeGen/AArch64/wineh6.mir | 2 +- llvm/test/CodeGen/AArch64/wineh7.mir | 2 +- llvm/test/CodeGen/AArch64/wineh8.mir | 2 +- llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir | 2 +- .../AMDGPU/GlobalISel/legalize-block-addr.mir | 2 +- .../AMDGPU/GlobalISel/regbankselect-block-addr.mir | 2 +- llvm/test/CodeGen/AMDGPU/coalescer-subreg-join.mir | 2 +- .../CodeGen/AMDGPU/constant-fold-imm-immreg.mir | 22 +- .../CodeGen/AMDGPU/couldnt-join-subrange-3.mir | 2 +- llvm/test/CodeGen/AMDGPU/fix-vgpr-copies.mir | 2 +- llvm/test/CodeGen/AMDGPU/flat-load-clustering.mir | 2 +- llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir | 18 +- llvm/test/CodeGen/AMDGPU/hazard.mir | 4 +- llvm/test/CodeGen/AMDGPU/insert-waitcnts-exp.mir | 2 +- llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir | 2 +- llvm/test/CodeGen/AMDGPU/invert-br-undef-vcc.mir | 2 +- llvm/test/CodeGen/AMDGPU/limit-coalesce.mir | 2 +- .../AMDGPU/live-intervals-multiple-dead-defs.mir | 18 + .../AMDGPU/memory-legalizer-atomic-insert-end.mir | 2 +- ...galizer-multiple-mem-operands-nontemporal-1.mir | 2 +- ...galizer-multiple-mem-operands-nontemporal-2.mir | 2 +- .../CodeGen/AMDGPU/merge-load-store-physreg.mir | 4 +- llvm/test/CodeGen/AMDGPU/merge-load-store.mir | 2 +- llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir | 6 +- .../rename-independent-subregs-mac-operands.mir | 4 +- llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir | 2 +- llvm/test/CodeGen/AMDGPU/schedule-regpressure.mir | 2 +- llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir | 4 +- llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir | 12 +- .../CodeGen/AMDGPU/smem-no-clause-coalesced.mir | 2 +- .../AMDGPU/undefined-physreg-sgpr-spill.mir | 4 +- .../CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir | 4 +- llvm/test/CodeGen/AMDGPU/wqm.mir | 2 +- llvm/test/CodeGen/ARM/ARMLoadStoreDBG.mir | 2 +- .../CodeGen/ARM/ParallelDSP/complex_dot_prod.ll | 120 ++++ .../CodeGen/ARM/ParallelDSP/unroll-n-jam-smlad.ll | 16 +- llvm/test/CodeGen/ARM/cmp1-peephole-thumb.mir | 2 +- llvm/test/CodeGen/ARM/cmp2-peephole-thumb.mir | 2 +- llvm/test/CodeGen/ARM/constant-island-movwt.mir | 2 +- llvm/test/CodeGen/ARM/constant-islands-cfg.mir | 2 +- .../test/CodeGen/ARM/constant-islands-split-IT.mir | 2 +- llvm/test/CodeGen/ARM/dbg-range-extension.mir | 2 +- llvm/test/CodeGen/ARM/expand-pseudos.mir | 6 +- llvm/test/CodeGen/ARM/fp16-litpool-arm.mir | 2 +- llvm/test/CodeGen/ARM/fp16-litpool-thumb.mir | 2 +- llvm/test/CodeGen/ARM/fp16-litpool2-arm.mir | 2 +- llvm/test/CodeGen/ARM/fp16-litpool3-arm.mir | 2 +- .../ARM/ifcvt-diamond-unanalyzable-common.mir | 2 +- llvm/test/CodeGen/ARM/misched-int-basic-thumb2.mir | 2 +- llvm/test/CodeGen/ARM/misched-int-basic.mir | 2 +- llvm/test/CodeGen/ARM/prera-ldst-aliasing.mir | 2 +- llvm/test/CodeGen/ARM/prera-ldst-insertpt.mir | 4 +- llvm/test/CodeGen/ARM/sched-it-debug-nodes.mir | 2 +- llvm/test/CodeGen/ARM/single-issue-r52.mir | 2 +- llvm/test/CodeGen/ARM/v6-jumptable-clobber.mir | 4 +- llvm/test/CodeGen/ARM/vldm-liveness.mir | 2 +- llvm/test/CodeGen/ARM/vldmia-sched.mir | 2 +- llvm/test/CodeGen/Hexagon/bank-conflict.mir | 2 +- .../CodeGen/Hexagon/early-if-conv-lifetime.mir | 2 +- llvm/test/CodeGen/Hexagon/early-if-predicator.mir | 2 +- llvm/test/CodeGen/Hexagon/ifcvt-live-subreg.mir | 2 +- .../CodeGen/Hexagon/pipeliner/swp-phi-start.mir | 2 +- llvm/test/CodeGen/Hexagon/regalloc-bad-undef.mir | 2 +- llvm/test/CodeGen/Lanai/peephole-compare.mir | 18 +- .../print-parse-verify-failedISel-property.mir | 2 +- .../CodeGen/MIR/AArch64/return-address-signing.mir | 4 +- llvm/test/CodeGen/MIR/AArch64/swp.mir | 2 +- llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir | 2 +- llvm/test/CodeGen/MIR/Generic/machine-function.mir | 8 +- .../MIR/PowerPC/peephole-miscompile-extswsli.mir | 2 +- .../test/CodeGen/MIR/PowerPC/prolog_vec_spills.mir | 4 +- .../CodeGen/MIR/X86/branch-folder-with-label.mir | 6 +- llvm/test/CodeGen/MIR/X86/diexpr-win32.mir | 4 +- .../test/CodeGen/MIR/X86/expected-stack-object.mir | 2 +- llvm/test/CodeGen/MIR/X86/fixed-stack-di.mir | 2 +- .../MIR/X86/fixed-stack-memory-operands.mir | 2 +- .../MIR/X86/frame-info-stack-references.mir | 2 +- .../Mips/GlobalISel/instruction-select/add.mir | 2 +- .../Mips/GlobalISel/instruction-select/bitwise.mir | 18 +- .../Mips/GlobalISel/instruction-select/branch.mir | 4 +- .../GlobalISel/instruction-select/constants.mir | 8 +- .../Mips/GlobalISel/instruction-select/fabs.mir | 4 +- .../Mips/GlobalISel/instruction-select/fcmp.mir | 64 +- .../Mips/GlobalISel/instruction-select/fence.mir | 2 +- .../GlobalISel/instruction-select/float_args.mir | 16 +- .../float_arithmetic_operations.mir | 16 +- .../instruction-select/float_constants.mir | 4 +- .../instruction-select/fpext_and_fptrunc.mir | 4 +- .../instruction-select/fptosi_and_fptoui.mir | 4 +- .../Mips/GlobalISel/instruction-select/fsqrt.mir | 4 +- .../instruction-select/gloal_address.mir | 2 +- .../instruction-select/gloal_address_pic.mir | 10 +- .../Mips/GlobalISel/instruction-select/icmp.mir | 22 +- .../instruction-select/inttoptr_and_ptrtoint.mir | 4 +- .../instruction-select/jump_table_and_brjt.mir | 2 +- .../Mips/GlobalISel/instruction-select/load.mir | 6 +- .../instruction-select/load_store_fold.mir | 16 +- .../Mips/GlobalISel/instruction-select/mul.mir | 4 +- .../Mips/GlobalISel/instruction-select/phi.mir | 8 +- .../GlobalISel/instruction-select/pointers.mir | 6 +- .../GlobalISel/instruction-select/rem_and_div.mir | 8 +- .../Mips/GlobalISel/instruction-select/select.mir | 8 +- .../instruction-select/sitofp_and_uitofp.mir | 4 +- .../GlobalISel/instruction-select/stack_args.mir | 2 +- .../Mips/GlobalISel/instruction-select/store.mir | 6 +- .../Mips/GlobalISel/instruction-select/sub.mir | 2 +- .../instruction-select/truncStore_and_aExtLoad.mir | 6 +- .../instruction-select/zextLoad_and_sextLoad.mir | 8 +- .../test/CodeGen/Mips/GlobalISel/legalizer/add.mir | 20 +- .../CodeGen/Mips/GlobalISel/legalizer/bitwise.mir | 56 +- .../CodeGen/Mips/GlobalISel/legalizer/branch.mir | 4 +- .../Mips/GlobalISel/legalizer/ceil_and_floor.mir | 8 +- .../Mips/GlobalISel/legalizer/constants.mir | 16 +- .../CodeGen/Mips/GlobalISel/legalizer/fabs.mir | 4 +- .../CodeGen/Mips/GlobalISel/legalizer/fcmp.mir | 4 +- .../CodeGen/Mips/GlobalISel/legalizer/fence.mir | 2 +- .../legalizer/float_arithmetic_operations.mir | 16 +- .../Mips/GlobalISel/legalizer/float_constants.mir | 4 +- .../GlobalISel/legalizer/fpext_and_fptrunc.mir | 4 +- .../GlobalISel/legalizer/fptosi_and_fptoui.mir | 32 +- .../CodeGen/Mips/GlobalISel/legalizer/fsqrt.mir | 4 +- .../Mips/GlobalISel/legalizer/global_address.mir | 2 +- .../CodeGen/Mips/GlobalISel/legalizer/icmp.mir | 28 +- .../GlobalISel/legalizer/inttoptr_and_ptrtoint.mir | 4 +- .../GlobalISel/legalizer/jump_table_and_brjt.mir | 2 +- .../CodeGen/Mips/GlobalISel/legalizer/load.mir | 8 +- .../test/CodeGen/Mips/GlobalISel/legalizer/mul.mir | 22 +- .../test/CodeGen/Mips/GlobalISel/legalizer/phi.mir | 14 +- .../CodeGen/Mips/GlobalISel/legalizer/pointers.mir | 6 +- .../Mips/GlobalISel/legalizer/rem_and_div.mir | 32 +- .../CodeGen/Mips/GlobalISel/legalizer/select.mir | 16 +- .../GlobalISel/legalizer/sitofp_and_uitofp.mir | 32 +- .../Mips/GlobalISel/legalizer/stack_args.mir | 2 +- .../CodeGen/Mips/GlobalISel/legalizer/store.mir | 8 +- .../test/CodeGen/Mips/GlobalISel/legalizer/sub.mir | 18 +- .../CodeGen/Mips/GlobalISel/legalizer/trap.mir | 2 +- .../CodeGen/Mips/GlobalISel/legalizer/trunc.mir | 2 +- .../legalizer/truncStore_and_aExtLoad.mir | 12 +- .../GlobalISel/legalizer/zextLoad_and_sextLoad.mir | 20 +- .../Mips/GlobalISel/legalizer/zext_and_sext.mir | 4 +- .../truncStore_and_aExtLoad.mir | 4 +- .../mips-prelegalizer-combiner/tryCombine.mir | 2 +- .../zextLoad_and_sextLoad.mir | 20 +- .../regbankselect/TypeInfoforMF_skipCopies.mir | 4 +- .../CodeGen/Mips/GlobalISel/regbankselect/add.mir | 2 +- .../Mips/GlobalISel/regbankselect/bitwise.mir | 18 +- .../Mips/GlobalISel/regbankselect/branch.mir | 4 +- .../CodeGen/Mips/GlobalISel/regbankselect/fabs.mir | 4 +- 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llvm/test/ThinLTO/X86/writeonly.ll | 2 +- llvm/test/ThinLTO/X86/writeonly2.ll | 2 +- llvm/test/Transforms/ConstProp/fma.ll | 259 ++++++++ .../Transforms/FunctionAttrs/noalias_returned.ll | 76 +++ llvm/test/Transforms/FunctionAttrs/writeonly.ll | 30 + .../Transforms/FunctionImport/Inputs/comdat.ll | 2 +- .../FunctionImport/Inputs/funcimport_debug.ll | 2 +- .../FunctionImport/Inputs/funcimport_resolved1.ll | 2 +- .../FunctionImport/Inputs/funcimport_resolved2.ll | 2 +- .../FunctionImport/Inputs/funcimport_var2.ll | 2 +- .../FunctionImport/Inputs/hotness_based_import.ll | 2 +- .../FunctionImport/Inputs/import_stats.ll | 2 +- .../FunctionImport/Inputs/not-prevailing.ll | 2 +- llvm/test/Transforms/FunctionImport/comdat.ll | 2 +- .../Transforms/FunctionImport/funcimport_debug.ll | 2 +- .../FunctionImport/funcimport_resolved.ll | 2 +- .../Transforms/FunctionImport/funcimport_var.ll | 2 +- .../FunctionImport/hotness_based_import.ll | 2 +- .../test/Transforms/FunctionImport/import_stats.ll | 2 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llvm/test/Transforms/LowerExpectIntrinsic/basic.ll | 31 +- .../Inputs/misexpect-branch-correct.proftext | 38 ++ .../PGOProfile/Inputs/misexpect-branch.proftext | 38 ++ .../Inputs/misexpect-switch-correct.proftext | 16 + .../PGOProfile/Inputs/misexpect-switch.proftext | 16 + .../PGOProfile/Inputs/thinlto_cspgo_bar_gen.ll | 2 +- .../PGOProfile/Inputs/thinlto_cspgo_bar_use.ll | 2 +- .../Inputs/thinlto_indirect_call_promotion.ll | 2 +- .../PGOProfile/Inputs/thinlto_samplepgo_icp.ll | 2 +- .../PGOProfile/Inputs/thinlto_samplepgo_icp2a.ll | 2 +- .../PGOProfile/Inputs/thinlto_samplepgo_icp2b.ll | 2 +- .../PGOProfile/Inputs/thinlto_samplepgo_icp3.ll | 2 +- llvm/test/Transforms/PGOProfile/X86/macho.ll | 2 +- llvm/test/Transforms/PGOProfile/branch1.ll | 2 +- llvm/test/Transforms/PGOProfile/branch2.ll | 2 +- llvm/test/Transforms/PGOProfile/comdat_internal.ll | 2 +- llvm/test/Transforms/PGOProfile/criticaledge.ll | 2 +- .../Transforms/PGOProfile/cspgo_profile_summary.ll | 2 +- llvm/test/Transforms/PGOProfile/diag_FE_profile.ll | 2 +- llvm/test/Transforms/PGOProfile/diag_mismatch.ll | 2 +- .../Transforms/PGOProfile/diag_no_funcprofdata.ll | 2 +- llvm/test/Transforms/PGOProfile/diag_no_profile.ll | 2 +- .../Transforms/PGOProfile/diag_no_value_sites.ll | 2 +- .../Transforms/PGOProfile/do-not-instrument.ll | 2 +- llvm/test/Transforms/PGOProfile/func_entry.ll | 2 +- .../PGOProfile/icp_covariant_call_return.ll | 2 +- .../PGOProfile/icp_covariant_invoke_return.ll | 2 +- llvm/test/Transforms/PGOProfile/icp_invoke.ll | 2 +- .../test/Transforms/PGOProfile/icp_invoke_nouse.ll | 2 +- .../test/Transforms/PGOProfile/icp_mismatch_msg.ll | 2 +- llvm/test/Transforms/PGOProfile/icp_vararg.ll | 2 +- .../PGOProfile/indirect_call_annotation.ll | 2 +- .../Transforms/PGOProfile/indirect_call_profile.ll | 2 +- .../PGOProfile/indirect_call_promotion.ll | 2 +- .../PGOProfile/indirect_call_promotion_vla.ll | 2 +- llvm/test/Transforms/PGOProfile/indirectbr.ll | 2 +- llvm/test/Transforms/PGOProfile/landingpad.ll | 2 +- .../Transforms/PGOProfile/large_count_remarks.ll | 2 +- llvm/test/Transforms/PGOProfile/loop1.ll | 2 +- llvm/test/Transforms/PGOProfile/loop2.ll | 2 +- llvm/test/Transforms/PGOProfile/memcpy.ll | 2 +- .../Transforms/PGOProfile/memop_size_annotation.ll | 2 +- llvm/test/Transforms/PGOProfile/memop_size_opt.ll | 2 +- .../Transforms/PGOProfile/memop_size_opt_zero.ll | 2 +- .../PGOProfile/misexpect-branch-correct.ll | 94 +++ .../PGOProfile/misexpect-branch-stripped.ll | 115 ++++ .../PGOProfile/misexpect-branch-unpredictable.ll | 89 +++ .../test/Transforms/PGOProfile/misexpect-branch.ll | 130 ++++ .../PGOProfile/misexpect-switch-default.ll | 196 ++++++ .../test/Transforms/PGOProfile/misexpect-switch.ll | 293 +++++++++ .../Transforms/PGOProfile/multiple_hash_profile.ll | 2 +- llvm/test/Transforms/PGOProfile/noreturncall.ll | 2 +- llvm/test/Transforms/PGOProfile/preinline.ll | 2 +- llvm/test/Transforms/PGOProfile/remap.ll | 2 +- llvm/test/Transforms/PGOProfile/select1.ll | 2 +- llvm/test/Transforms/PGOProfile/select2.ll | 2 +- .../Transforms/PGOProfile/select_hash_conflict.ll | 2 +- llvm/test/Transforms/PGOProfile/single_bb.ll | 2 +- .../PGOProfile/statics_counter_naming.ll | 2 +- llvm/test/Transforms/PGOProfile/switch.ll | 2 +- .../Transforms/PGOProfile/thinlto_cspgo_gen.ll | 2 +- .../Transforms/PGOProfile/thinlto_cspgo_use.ll | 2 +- .../PGOProfile/thinlto_indirect_call_promotion.ll | 2 +- .../Transforms/PGOProfile/thinlto_samplepgo_icp.ll | 2 +- .../PGOProfile/thinlto_samplepgo_icp2.ll | 2 +- .../PGOProfile/thinlto_samplepgo_icp3.ll | 2 +- .../thinlto_samplepgo_icp_droppeddead.ll | 2 +- llvm/test/Transforms/PGOProfile/unreachable_bb.ll | 2 +- llvm/test/tools/llvm-lto2/X86/pipeline.ll | 2 +- llvm/test/tools/llvm-lto2/X86/stats-file-option.ll | 2 +- llvm/tools/llvm-nm/CMakeLists.txt | 1 + llvm/tools/llvm-nm/llvm-nm.cpp | 30 + llvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp | 96 ++- llvm/tools/llvm-reduce/CMakeLists.txt | 1 + llvm/tools/llvm-reduce/DeltaManager.h | 4 +- llvm/tools/llvm-reduce/deltas/Delta.cpp | 8 +- llvm/tools/llvm-reduce/deltas/Delta.h | 16 +- llvm/tools/llvm-reduce/deltas/ReduceFunctions.cpp | 6 +- llvm/tools/llvm-reduce/deltas/ReduceGlobalVars.cpp | 3 + llvm/tools/llvm-reduce/deltas/ReduceMetadata.cpp | 138 ++++ llvm/tools/llvm-reduce/deltas/ReduceMetadata.h | 18 + llvm/tools/llvm-reduce/llvm-reduce.cpp | 2 - llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn | 1 + .../secondary/llvm/lib/Transforms/Utils/BUILD.gn | 1 + .../gn/secondary/llvm/tools/llvm-reduce/BUILD.gn | 2 + 1457 files changed, 8897 insertions(+), 5118 deletions(-) create mode 100644 clang/test/CodeGenCXX/ms-constexpr-static-data-member.cpp create mode 100644 clang/test/OpenMP/constexpr_partial_array.cpp create mode 100644 clang/test/Profile/Inputs/misexpect-branch-nonconst-expect-arg. [...] create mode 100644 clang/test/Profile/Inputs/misexpect-branch.proftext create mode 100644 clang/test/Profile/Inputs/misexpect-switch-default-only.proftext create mode 100644 clang/test/Profile/Inputs/misexpect-switch-default.proftext create mode 100644 clang/test/Profile/Inputs/misexpect-switch-nonconst.proftext create mode 100644 clang/test/Profile/Inputs/misexpect-switch.proftext create mode 100644 clang/test/Profile/misexpect-branch-cold.c create mode 100644 clang/test/Profile/misexpect-branch-nonconst-expected-val.c create mode 100644 clang/test/Profile/misexpect-branch-unpredictable.c create mode 100644 clang/test/Profile/misexpect-branch.c create mode 100644 clang/test/Profile/misexpect-switch-default.c create mode 100644 clang/test/Profile/misexpect-switch-nonconst.c create mode 100644 clang/test/Profile/misexpect-switch-only-default-case.c create mode 100644 clang/test/Profile/misexpect-switch.c create mode 100644 clang/test/Sema/div-sizeof-array.cpp create mode 100644 compiler-rt/test/fuzzer/merge_two_step.test create mode 100644 libcxx/cmake/caches/Apple.cmake create mode 100644 llvm/include/llvm/Transforms/Utils/MisExpect.h create mode 100644 llvm/lib/Support/ABIBreak.cpp create mode 100644 llvm/lib/Transforms/Utils/MisExpect.cpp create mode 100644 llvm/test/Analysis/MemorySSA/debugvalue2.ll create mode 100644 llvm/test/CodeGen/AMDGPU/live-intervals-multiple-dead-defs.mir create mode 100644 llvm/test/CodeGen/ARM/ParallelDSP/complex_dot_prod.ll create mode 100644 llvm/test/CodeGen/Mips/msa/nori.b.ll create mode 100644 llvm/test/Object/Inputs/tapi-invalid-v1.tbd create mode 100644 llvm/test/Object/Inputs/tapi-invalid-v2.tbd create mode 100644 llvm/test/Object/Inputs/tapi-invalid-v3.tbd create mode 100644 llvm/test/Object/Inputs/tapi-v1.tbd create mode 100644 llvm/test/Object/Inputs/tapi-v2.tbd create mode 100644 llvm/test/Object/Inputs/tapi-v3.tbd create mode 100644 llvm/test/Object/nm-tapi-invalids.test create mode 100644 llvm/test/Object/nm-tapi.test create mode 100755 llvm/test/Reduce/Inputs/remove-metadata.py create mode 100644 llvm/test/Reduce/remove-metadata.ll create mode 100644 llvm/test/Transforms/ConstProp/fma.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/writeonly.ll create mode 100644 llvm/test/Transforms/InstCombine/AMDGPU/tan.ll create mode 100644 llvm/test/Transforms/InstCombine/do-not-clone-dbg-declare.ll delete mode 100644 llvm/test/Transforms/InstSimplify/fold-builtin-fma.ll create mode 100644 llvm/test/Transforms/LoopInterchange/pr43176-move-to-new-latch.ll create mode 100644 llvm/test/Transforms/PGOProfile/Inputs/misexpect-branch-correct [...] create mode 100644 llvm/test/Transforms/PGOProfile/Inputs/misexpect-branch.proftext create mode 100644 llvm/test/Transforms/PGOProfile/Inputs/misexpect-switch-correct [...] create mode 100644 llvm/test/Transforms/PGOProfile/Inputs/misexpect-switch.proftext create mode 100644 llvm/test/Transforms/PGOProfile/misexpect-branch-correct.ll create mode 100644 llvm/test/Transforms/PGOProfile/misexpect-branch-stripped.ll create mode 100644 llvm/test/Transforms/PGOProfile/misexpect-branch-unpredictable.ll create mode 100644 llvm/test/Transforms/PGOProfile/misexpect-branch.ll create mode 100644 llvm/test/Transforms/PGOProfile/misexpect-switch-default.ll create mode 100644 llvm/test/Transforms/PGOProfile/misexpect-switch.ll create mode 100644 llvm/tools/llvm-reduce/deltas/ReduceMetadata.cpp create mode 100644 llvm/tools/llvm-reduce/deltas/ReduceMetadata.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allnoconfig updated (e16a5c12f -> 19d6fe437)

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