Tcwg-commits September 2019

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-defconfig updated (76a986c4dd6 -> 514ffb4c006)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-defconfig in repository toolchain/ci/gcc. from 76a986c4dd6 PR rtl-optimization/89795 * rtlanal.c (nonzero_bits1) <SU [...] adds d7bb8e5b975 2019-09-11 Richard Biener <rguenther(a)suse.de> adds 3e0fb9b8feb 2019-09-11 Richard Biener <rguenther(a)suse.de> adds b33daee6bc7 [PATCH] some tree struct marking adds 7da48f4c2f8 PR rtl-optimization/89435 PR rtl-optimization/89795 PR r [...] adds 25f120f074c Fix libstdc++ tests for -Wvolatile warnings in C++2a mode adds 0f5caaa9b5f Fix Xmethod for shared_ptr::use_count() adds 5499c2e2fae gotest: force test package to be imported first adds f29c4dee815 golang.org/x/sys/cpu: define doinit when needed adds 45c13053b60 compiler: suppress type descriptor generation for aliases adds 4e858fb59f9 Simplify the code. adds c71b2642d0e 2019-09-11 Steven G. Kargl <kargl(a)gcc.gnu.org> adds 019d91b023f 2019-09-11 Steven G. Kargl <kargl(a)gcc.gnu.org> adds 3854208c417 2019-09-11 Sandra Loosemore <sandra(a)codesourcery.com> adds 91aa9af966d Daily bump. new 514ffb4c006 Vectorise multiply high with scaling operations (PR 89386) The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 57 +++++++ gcc/DATESTAMP | 2 +- gcc/config/aarch64/aarch64-sve2.md | 60 ++++++++ gcc/config/aarch64/iterators.md | 35 ++++- gcc/config/rs6000/predicates.md | 3 +- gcc/cp/ChangeLog | 6 + gcc/cp/cp-objcp-common.c | 153 ++++++++++--------- gcc/cp/decl.c | 16 +- gcc/doc/invoke.texi | 8 + gcc/doc/md.texi | 27 ++++ gcc/doc/sourcebuild.texi | 4 + gcc/fortran/ChangeLog | 12 ++ gcc/fortran/io.c | 11 ++ gcc/fortran/simplify.c | 6 + gcc/go/gofrontend/MERGE | 2 +- gcc/go/gofrontend/gogo.cc | 8 +- gcc/internal-fn.c | 2 + gcc/internal-fn.def | 5 + gcc/lto-opts.c | 4 + gcc/lto-wrapper.c | 6 + gcc/optabs.def | 4 + gcc/testsuite/ChangeLog | 40 +++++ gcc/testsuite/gcc.dg/Warray-bounds-44.c | 23 +++ gcc/testsuite/gcc.dg/pr89435.c | 21 +++ gcc/testsuite/gcc.dg/pr89795.c | 25 +++ gcc/testsuite/gcc.dg/pr91720.c | 22 +++ gcc/testsuite/gcc.dg/vect/pr81740-1.c | 1 - gcc/testsuite/gcc.dg/vect/pr81740-2.c | 1 - gcc/testsuite/gcc.dg/vect/pr88598-1.c | 1 - gcc/testsuite/gcc.dg/vect/pr88598-2.c | 1 - gcc/testsuite/gcc.dg/vect/pr88598-3.c | 1 - gcc/testsuite/gcc.dg/vect/pr88598-4.c | 1 - gcc/testsuite/gcc.dg/vect/pr88598-5.c | 1 - gcc/testsuite/gcc.dg/vect/pr88598-6.c | 1 - gcc/testsuite/gcc.dg/vect/pr89440.c | 1 - gcc/testsuite/gcc.dg/vect/pr90018.c | 1 - gcc/testsuite/gcc.dg/vect/pr91293-1.c | 1 - gcc/testsuite/gcc.dg/vect/pr91293-2.c | 1 - gcc/testsuite/gcc.dg/vect/pr91293-3.c | 1 - gcc/testsuite/gcc.dg/vect/vect-mulhrs-1.c | 49 ++++++ gcc/testsuite/gcc.dg/vect/vect-mulhrs-2.c | 9 ++ gcc/testsuite/gcc.dg/vect/vect-mulhrs-3.c | 9 ++ gcc/testsuite/gcc.dg/vect/vect-mulhrs-4.c | 10 ++ gcc/testsuite/gcc.target/aarch64/sve2/mulhrs_1.c | 63 ++++++++ gcc/testsuite/gfortran.dg/pr91553.f90 | 8 + gcc/testsuite/gfortran.dg/pr91642.f90 | 19 +++ gcc/testsuite/lib/target-supports.exp | 9 ++ gcc/tree-vect-patterns.c | 170 +++++++++++++++++++++ gcc/tree.c | 82 +++++----- gcc/tree.h | 4 + gcc/vr-values.c | 11 +- libgo/go/golang.org/x/sys/cpu/cpu_linux_other.go | 9 ++ libgo/testsuite/gotest | 13 +- libstdc++-v3/ChangeLog | 10 ++ libstdc++-v3/python/libstdcxx/v6/xmethods.py | 2 +- .../20_util/result_of/sfinae_friendly_1.cc | 11 +- .../testsuite/tr1/3_function_objects/result_of.cc | 2 + 57 files changed, 903 insertions(+), 162 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/Warray-bounds-44.c create mode 100644 gcc/testsuite/gcc.dg/pr89435.c create mode 100644 gcc/testsuite/gcc.dg/pr89795.c create mode 100644 gcc/testsuite/gcc.dg/pr91720.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-mulhrs-1.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-mulhrs-2.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-mulhrs-3.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-mulhrs-4.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/mulhrs_1.c create mode 100644 gcc/testsuite/gfortran.dg/pr91553.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr91642.f90 create mode 100644 libgo/go/golang.org/x/sys/cpu/cpu_linux_other.go -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig updated (99f8fa968d7 -> b904b392bca)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig in repository toolchain/ci/gcc. from 99f8fa968d7 PR rtl-optimization/89795 * rtlanal.c (nonzero_bits1) <SU [...] adds f539f18a218 Fix Xmethod for shared_ptr::use_count() adds b904b392bca Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- libstdc++-v3/ChangeLog | 5 +++++ libstdc++-v3/python/libstdcxx/v6/xmethods.py | 2 +- 3 files changed, 7 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-defconfig updated (075a2b89c7 -> 7a28970742)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-defconfig in repository toolchain/ci/binutils-gdb. from 075a2b89c7 Rename elf32.em to elf.em adds 0a4632b563 Re: Enhance the disassembler adds 1ff5d5c463 Constify argument to make_tempname and make_tempdir adds 64b2d4a0a4 Introduce bfd_set_filename adds 67547d896b Change the type of copy_names from int to bool adds 9cab7ecda2 Fix float to LONGEST conversion. adds f48cd8368b Refactor get_init_files to use std::string adds 9224a01377 Factor out the code to do the datadir-relocation for gdbinit adds f2aec7f6d1 Make relocate_{path,gdb_directory} return std::string adds 19d16d8789 Automatic date update in version.in adds 7a28970742 Fix signals reported for faults on Solaris No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 5 ++ bfd/bfd-in2.h | 2 + bfd/opncls.c | 20 +++++ bfd/version.h | 2 +- binutils/ChangeLog | 12 +++ binutils/bucomm.c | 4 +- binutils/bucomm.h | 4 +- binutils/objcopy.c | 2 +- binutils/objdump.c | 11 ++- gdb/ChangeLog | 64 +++++++++++++++ gdb/auto-load.c | 2 +- gdb/dbxread.c | 18 ++--- gdb/defs.h | 8 +- gdb/dwarf2read.c | 4 +- gdb/guile/guile.c | 5 +- gdb/jit.c | 4 +- gdb/main.c | 219 +++++++++++++++++++++++++++------------------------- gdb/mdebugread.c | 32 ++++---- gdb/procfs.c | 38 ++------- gdb/psympriv.h | 2 +- gdb/psymtab.c | 4 +- gdb/python/python.c | 2 +- gdb/solib-aix.c | 8 +- gdb/solib-darwin.c | 3 +- gdb/symfile-mem.c | 6 +- gdb/symtab.c | 2 +- gdb/symtab.h | 2 +- gdb/target-float.c | 17 ++-- gdb/top.c | 2 +- gdb/xcoffread.c | 18 ++--- gdb/xml-syscall.c | 7 +- 31 files changed, 309 insertions(+), 220 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig updated (cb664337b4 -> 66b64412b8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig in repository toolchain/ci/binutils-gdb. from cb664337b4 Automatic date update in version.in adds 66b64412b8 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig updated (34f86fc96 -> 5adca68db)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig in repository toolchain/ci/base-artifacts. discards 34f86fc96 0: update: binutils-gcc-linux: boot new 5adca68db 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (34f86fc96) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 18 +- 02-prepare_abe/console.log | 429 +- 03-build_abe-binutils/console.log | 11168 +++++++-------- 04-build_abe-stage1/console.log | 13962 +++++++++---------- 05-build_linux/console.log | 720 +- 06-boot_linux/console.log | 408 +- 07-check_regression/console.log | 8 +- console.log | 26713 ++++++++++++++++++------------------ jenkins/manifest.sh | 14 +- 9 files changed, 26723 insertions(+), 26717 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-defconfig updated (9b5c293ba -> ffb1553da)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-defconfig in repository toolchain/ci/base-artifacts. discards 9b5c293ba 0: update: binutils-gcc-linux: boot new ffb1553da 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (9b5c293ba) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-ma [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-prepare_abe/console.log | 435 +- 03-build_abe-binutils/console.log | 11693 ++++++------- 04-build_abe-stage1/console.log | 20201 ++++++++++----------- 05-build_linux/console.log | 1008 +- 06-boot_linux/console.log | 414 +- console.log | 33917 ++++++++++++++++++------------------ jenkins/manifest.sh | 18 +- 8 files changed, 33783 insertions(+), 34069 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years

[clang] branch master updated (0e4f349383 -> c7234bb35d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang. from 0e4f349383 [clang-format] [PR43100] clang-format C# support does not a [...] new c7234bb35d Removed dead code from DiagnosticBuilder The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/clang/Basic/Diagnostic.h | 5 ----- 1 file changed, 5 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allyesconfig updated (300803b35 -> 0cbabe0fe)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allyesconfig in repository toolchain/ci/base-artifacts. discards 300803b35 0: update: llvm-linux: all new 0cbabe0fe 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (300803b35) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 68 +- 02-build_llvm/console.log | 11960 +++++++++++++++++------------------ 03-build_linux/console.log | 636 +- 04-boot_linux/console.log | 6 +- 05-check_regression/console.log | 8 +- 06-update_baseline/console.log | 8 +- console.log | 12686 +++++++++++++++++++------------------- jenkins/manifest.sh | 6 +- 8 files changed, 12687 insertions(+), 12691 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years

[llvm] branch master updated (03dc1837d35 -> a8e37d1bbba)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 03dc1837d35 CodeGenPrep: add separate hook say when GEPs should be used [...] new a8e37d1bbba AArch64: support arm64_32, an ILP32 slice for watchOS. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/llvm/CodeGen/CallingConvLower.h | 1 + include/llvm/Target/TargetCallingConv.td | 6 + lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 4 + lib/CodeGen/TargetLoweringBase.cpp | 1 + lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 1 + lib/ExecutionEngine/Orc/IndirectionUtils.cpp | 4 +- lib/ExecutionEngine/Orc/LazyReexports.cpp | 1 + lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp | 3 +- .../RuntimeDyld/RuntimeDyldMachO.cpp | 2 + lib/LTO/LTOCodeGenerator.cpp | 3 +- lib/LTO/LTOModule.cpp | 3 +- lib/LTO/ThinLTOCodeGenerator.cpp | 3 +- lib/MC/MCObjectFileInfo.cpp | 7 +- lib/Target/AArch64/AArch64AsmPrinter.cpp | 2 + lib/Target/AArch64/AArch64CallLowering.cpp | 10 +- lib/Target/AArch64/AArch64CallingConvention.cpp | 30 +- lib/Target/AArch64/AArch64CallingConvention.h | 3 + lib/Target/AArch64/AArch64CallingConvention.td | 34 + lib/Target/AArch64/AArch64CollectLOH.cpp | 22 +- lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp | 22 +- lib/Target/AArch64/AArch64FastISel.cpp | 55 +- lib/Target/AArch64/AArch64ISelLowering.cpp | 174 +++-- lib/Target/AArch64/AArch64ISelLowering.h | 8 + lib/Target/AArch64/AArch64InstrInfo.cpp | 39 +- lib/Target/AArch64/AArch64SelectionDAGInfo.cpp | 2 +- lib/Target/AArch64/AArch64Subtarget.h | 8 + lib/Target/AArch64/AArch64TargetMachine.cpp | 10 +- .../AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp | 5 +- lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h | 2 +- .../AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp | 2 +- lib/Target/X86/X86FastISel.cpp | 1 + test/CodeGen/AArch64/arm64-aapcs.ll | 2 +- .../AArch64/arm64-collect-loh-garbage-crash.ll | 1 + test/CodeGen/AArch64/arm64-collect-loh-str.ll | 1 + test/CodeGen/AArch64/arm64-collect-loh.ll | 115 ++-- test/CodeGen/AArch64/arm64-indexed-memory.ll | 1 + test/CodeGen/AArch64/arm64-stacksave.ll | 4 +- test/CodeGen/AArch64/arm64_32-addrs.ll | 44 ++ test/CodeGen/AArch64/arm64_32-atomics.ll | 261 ++++++++ test/CodeGen/AArch64/arm64_32-fastisel.ll | 28 + test/CodeGen/AArch64/arm64_32-frame-pointers.ll | 26 + test/CodeGen/AArch64/arm64_32-gep-sink.ll | 61 ++ test/CodeGen/AArch64/arm64_32-memcpy.ll | 66 ++ test/CodeGen/AArch64/arm64_32-neon.ll | 198 ++++++ test/CodeGen/AArch64/arm64_32-null.ll | 28 + test/CodeGen/AArch64/arm64_32-pointer-extend.ll | 49 ++ test/CodeGen/AArch64/arm64_32-stack-pointers.ll | 13 + test/CodeGen/AArch64/arm64_32-tls.ll | 22 + test/CodeGen/AArch64/arm64_32-va.ll | 56 ++ test/CodeGen/AArch64/arm64_32.ll | 715 +++++++++++++++++++++ test/CodeGen/AArch64/fastcc-reserved.ll | 8 +- test/CodeGen/AArch64/fastcc.ll | 22 +- test/CodeGen/AArch64/jump-table-32.ll | 42 ++ test/CodeGen/AArch64/sibling-call.ll | 24 +- test/CodeGen/AArch64/swift-return.ll | 4 +- test/CodeGen/AArch64/swiftcc.ll | 2 + test/CodeGen/AArch64/swifterror.ll | 127 ++-- test/CodeGen/AArch64/swiftself.ll | 29 +- test/CodeGen/AArch64/tail-call.ll | 24 +- .../AArch64/umulo-128-legalisation-lowering.ll | 4 +- test/CodeGen/AArch64/win64_vararg.ll | 2 +- test/MC/AArch64/arm64_32-compact-unwind.s | 15 + utils/TableGen/CallingConvEmitter.cpp | 4 + 63 files changed, 2224 insertions(+), 242 deletions(-) create mode 100644 test/CodeGen/AArch64/arm64_32-addrs.ll create mode 100644 test/CodeGen/AArch64/arm64_32-atomics.ll create mode 100644 test/CodeGen/AArch64/arm64_32-fastisel.ll create mode 100644 test/CodeGen/AArch64/arm64_32-frame-pointers.ll create mode 100644 test/CodeGen/AArch64/arm64_32-gep-sink.ll create mode 100644 test/CodeGen/AArch64/arm64_32-memcpy.ll create mode 100644 test/CodeGen/AArch64/arm64_32-neon.ll create mode 100644 test/CodeGen/AArch64/arm64_32-null.ll create mode 100644 test/CodeGen/AArch64/arm64_32-pointer-extend.ll create mode 100644 test/CodeGen/AArch64/arm64_32-stack-pointers.ll create mode 100644 test/CodeGen/AArch64/arm64_32-tls.ll create mode 100644 test/CodeGen/AArch64/arm64_32-va.ll create mode 100644 test/CodeGen/AArch64/arm64_32.ll create mode 100644 test/CodeGen/AArch64/jump-table-32.ll create mode 100644 test/MC/AArch64/arm64_32-compact-unwind.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig updated (57256af307a -> f1286621eb9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig in repository toolchain/ci/llvm-project. from 57256af307a Revert "clang-misexpect: Profile Guided Validation of Perfo [...] adds 3a4781bbf4f [LLDB][ELF] Load both, .symtab and .dynsym sections adds 813f05915d2 [LLDB][ELF] Fixup for comments in D67390 adds e79381c3f7a [LoopInterchange] Drop unused splitInnerLoopHeader declaration. adds 4dae283cd3e [InstCombine] Fixed handling of isOpNewLike (PR11748) adds 57ebb50a0ad [NFC] Fixed test adds af5ba2873f5 [NFC] Updated objsize-64.ll test adds 3240ad4ced0 [Diagnostics] Add -Wsizeof-array-div adds e0d9a0bd59d Fix -Wdocumentation warning - void function doesn't need a [...] adds d811d9115b0 [mips][msa] Fix infinite loop for mips.nori.b intrinsic adds 48904e9452d [Alignment] Use llvm::Align in MachineFunction and TargetLo [...] adds 80bea345d11 [InstCombine] fold sign-bit compares of srem adds f78474ba8ae gn build: add include_dir that's necessary after r371564 adds b3b2064c518 [LangRef] fix punctuation; NFC adds 9703f46fc1b [lldb][NFC] Sort files in unittests/Expression/CMakeLists.txt adds 3183466aa60 [LangRef] add link for fma intrinsic adds 97264366fba [Alignment][NFC] use llvm::Align for AsmPrinter::EmitAlignment adds 29ba5e0817a [InstSimplify] regenerate test CHECKs; NFC adds 1761f6fc42d [lldb][NFC] Remove dead code in SBAddress::GetDescription adds 9c4047f2672 [ConstProp] move test file from InstSimplify; NFC adds f054067f276 [libFuzzer] Make -merge=1 to reuse coverage information fro [...] adds ede0905c1fb [ConstProp] add tests for fma that produce NaN; NFC adds 1ccba7c1a10 LLVM: Optimization Pass: Remove conflicting attribute, if a [...] adds 3ad8278737d [lldb][NFC] Make include directories in Clang expression pa [...] adds d44c4a71df9 Revert "[LLDB][ELF] Fixup for comments in D67390" adds 2f3884ca1d8 Revert "[LLDB][ELF] Load both, .symtab and .dynsym sections" adds b42565f2fc7 gn build: Merge r371562 adds 5957a61ff8e [OPENMP]Updated status page, NFC. adds 161cca266a9 [scudo][standalone] Android related improvements adds 8aeb7bb013a [NFC][InstSimplify] Add extra test for D67411 with @llvm.assume adds 00c1ee48e4c [InstSimplify] Pass SimplifyQuery into simplifyUnsignedRang [...] adds 1be634044dd [OPENMP] Update the diagnosis message for canonical loop fo [...] adds 0c1257f517e [Clang][Bundler] Fix for a potential memory leak [NFC] adds 51de22c8ee6 Revert [InstCombine] Use SimplifyFMulInst to simplify multi [...] adds 7bdad084294 Reland "clang-misexpect: Profile Guided Validation of Perfo [...] adds 85eff49d748 gn build: Merge r371635 adds e39b5710c92 [Clang][Bundler] Replace std::vector by SmallVector [NFC] adds 340b7252029 [libc++] Add a CMake cache for Apple-specific configuration [...] adds b51d5605b18 Consolidate swap, swap_ranges, and iter_swap in <type_traits>. adds 81196a595c6 LiveIntervals: Split live intervals on multiple dead defs adds abcc2a879c9 [MS] Consder constexpr globals to be inline, as in C++17 adds 8b46544641e [IRMover] Don't map globals if their types are the same adds 403e08d4cf3 [ConstantHoisting] Fix non-determinism. adds f5c3bb60b39 Fix test failures after r371640 adds 82d9e0e1221 [NFC] Added triple to test file to avoid arm buildbots failures adds aff633f68df [libFuzzer] Remove hardcoded number of new features in merg [...] adds 4a5dd4a8816 Update documentation. adds 7957d4c015a [AMDGPU] Fix crash in phi-elimination hook. adds 09f320ad341 Update link to the DWARF spec. adds 6d5f0029fc0 [llvm-reduce] Fix a bug, improve error handling when running test adds 1b385a18025 [Plugins/Process] Remove direct use of ClangASTContext from [...] adds 2f843616849 Fix -Wnonportable-include-path suppression for header maps [...] adds ca6e60971e9 [clang-scan-deps] add skip excluded conditional preprocesso [...] adds 7fcc2c2b5a9 Add a LineTable class to GSYM and test it. adds 8535b8ecf29 [analyzer] NFC: Re-implement stack hints as a side map in B [...] adds 6b85f8e99b3 [analyzer] NFC: Move getStmt() and createEndOfPath() out of [...] adds 2bce23a4f8a [analyzer] NFC: Move resetDiagnosticLocationToMainFile() to [...] adds f0bb45fac35 [analyzer] NFC: Move PathDiagnostic classes to libAnalysis. adds 393b4eac495 All Errors must be checked adds a685f5161db Start porting ivfsoverlay tests to Windows adds 428d92832c5 [clang-scan-deps] cast Result to ErrorOr<unique_ptr<vfs::Fi [...] adds fdb83b50559 Fix up a test updated in r371655 - require case-insensitive [...] adds 0b91333d59f [DWARF] Emit call site parameter info when tuning for lldb adds bb581185257 [Status] Add a LLDB_ERRORF macro for error reporting (simil [...] adds 21d417dc18a [DWARF] Evaluate DW_OP_entry_value adds efbd7371a02 gn build: Merge r371657 adds 9769a5e7d57 gn build: Merge r371661 adds 666af6714c8 AMDGPU: Move m0 initializations earlier adds 08474ca091f [X86] Move x86_64 fp128 conversion to libcalls from type le [...] adds 5278b0a04e8 [X86] Add test case for v16i64->v16i32 truncate on min-lega [...] adds aeeb9e3895e Revert [Object][TextAPI] NFC, fix tapi lit tests adds 48eb4a27d1d Update compiler-rt cpplint.py https://github.com/cpplint/cp [...] adds bc40836a433 Revert [llvm-nm] Add tapi file support adds ed5f4526455 [ConstantFolding] Refactor math functions to use LLVM ones (NFC) adds ff45955fc86 [X86] Fix latent bugs in 32-bit CMPXCHG8B inserter adds d79cc148227 PR43278: Temporarily disable llvm-reduce tests due to exhau [...] adds 92002bd75ba Fix mac build adds ffe5466c791 Add some missing changes to GSYM that was addressing a gcc [...] adds 2bfb955c51f [InstCombine] rename variable for readability; NFC adds e78a7a0ecdd [TableGen] Skip CRLF conversion when writing output adds bcc24e46ba3 [Reproducer] Move GDB Remote Provider into Reproducer (NFC) adds c0fa6322363 Remove NOLINTs from compiler-rt adds d9aec34b978 [NFC] Reformat SBDebugger before making changes adds 4a491ec4916 [Reproducer] Move the command loader into the reproducer (NFC) adds 33f01663f7a [dfsan] Revert dfsan_set_label removal adds e297ad1bd96 [GlobalISel][AArch64] Check caller for swifterror params in [...] adds 55d86f04c73 [AArch64][GlobalISel] Fall back on attempts to allocate spl [...] adds 635d383fad2 [X86] Enable -mprefer-vector-width=256 by default for Skyla [...] adds aaef97a55e4 PR43278: llvm-reduce: Use temporary file names (and ToolOut [...] adds b51a285c4c8 [clang-scan-deps] Add dependency targets adds 5adb3d2ac0a Reapply llvm-reduce: Add pass to reduce parameters"" adds 52f6131cc7e gn build: Merge r371700 adds a3cd67c0078 [compiler-rt] Better lint output for .inc files adds 6e8c21857ec [compiler-rt] Run cpplint only for check-sanitizer adds d2af368aee5 [compiler-rt] Remove some cpplint filters adds 23bbeb52f39 [compiler-rt] cpplint of inc files in background adds 4f0245fd98b [clang-tidy] Fix build with -DBUILD_SHARED_LIB=ON adds bdfe84ad110 Make SwitchInstProfUpdateWrapper strict permanently adds e8b2b8868d2 [WebAssembly] Add -fwasm-exceptions for wasm EH adds b8dd0752756 [LegalizeTypes] Remove code for softening a float type to itself. adds c167402183a [WebAssembly] Add REQUIRES to test adds c4712fda7c6 [WebAssembly] Make wasm-eh.cpp requires WebAssembly adds 75f65fe8d31 [WebAssembly] Delete duplicate REQUIRES line adds b7fb5d0f6f2 [DAGCombiner] Improve division estimation of floating points. adds 60ff4dd9cd8 [ELF] Support -z undefs adds 786ce3fbd62 [ELF] Fix a common-page-size typo adds cfaf2b6cfa2 [PowerPC][MCP][NFC] Pre-commit test cases for https://revie [...] adds f1286621eb9 [InstSimplify] simplifyUnsignedRangeCheck(): handle more ca [...] No new revisions were added by this update. Summary of changes: clang-tools-extra/clang-tidy/CMakeLists.txt | 1 + clang-tools-extra/clang-tidy/ClangTidy.cpp | 9 +- clang/docs/OpenMPSupport.rst | 6 +- clang/docs/ReleaseNotes.rst | 8 +- .../Core/BugReporter => Analysis}/PathDiagnostic.h | 114 +- .../include/clang/Basic/DiagnosticFrontendKinds.td | 7 +- clang/include/clang/Basic/DiagnosticGroups.td | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 6 +- clang/include/clang/Basic/LangOptions.def | 1 + clang/include/clang/Driver/Options.td | 2 + .../Lex/DependencyDirectivesSourceMinimizer.h | 18 + clang/include/clang/Lex/DirectoryLookup.h | 2 +- clang/include/clang/Lex/Lexer.h | 15 + clang/include/clang/Lex/Preprocessor.h | 10 + ...cessorExcludedConditionalDirectiveSkipMapping.h | 31 + clang/include/clang/Lex/PreprocessorOptions.h | 9 + .../StaticAnalyzer/Core/BugReporter/BugReporter.h | 74 +- .../Core/PathSensitive/AnalysisManager.h | 2 +- .../Core/PathSensitive/ExplodedGraph.h | 24 + .../DependencyScanningFilesystem.h | 18 +- .../DependencyScanning/DependencyScanningService.h | 9 +- .../DependencyScanning/DependencyScanningWorker.h | 2 + clang/lib/Analysis/CMakeLists.txt | 1 + .../Core => Analysis}/PathDiagnostic.cpp | 257 +- clang/lib/CodeGen/BackendUtil.cpp | 2 + clang/lib/CodeGen/CGException.cpp | 5 +- clang/lib/CodeGen/CodeGenAction.cpp | 26 + clang/lib/Driver/ToolChains/Clang.cpp | 8 +- clang/lib/Driver/ToolChains/WebAssembly.cpp | 20 + clang/lib/Frontend/CompilerInvocation.cpp | 10 +- .../Lex/DependencyDirectivesSourceMinimizer.cpp | 48 + clang/lib/Lex/HeaderSearch.cpp | 25 +- clang/lib/Lex/Lexer.cpp | 9 + clang/lib/Lex/PPDirectives.cpp | 36 + clang/lib/Lex/Preprocessor.cpp | 5 + clang/lib/Sema/SemaDecl.cpp | 7 +- clang/lib/Sema/SemaExpr.cpp | 31 +- clang/lib/Sema/SemaOpenMP.cpp | 31 +- .../StaticAnalyzer/Checkers/CheckObjCDealloc.cpp | 2 +- .../Checkers/CheckObjCInstMethSignature.cpp | 2 +- .../Checkers/DeleteWithNonVirtualDtorChecker.cpp | 5 +- .../StaticAnalyzer/Checkers/DynamicTypeChecker.cpp | 5 +- .../Checkers/DynamicTypePropagation.cpp | 5 +- .../Checkers/InnerPointerChecker.cpp | 5 +- .../Checkers/MacOSKeychainAPIChecker.cpp | 2 +- .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 42 +- clang/lib/StaticAnalyzer/Checkers/MoveChecker.cpp | 4 +- .../StaticAnalyzer/Checkers/NullabilityChecker.cpp | 5 +- .../Checkers/ObjCMissingSuperCallChecker.cpp | 2 +- .../Checkers/ObjCUnusedIVarsChecker.cpp | 2 +- .../RetainCountChecker/RetainCountChecker.h | 2 +- .../RetainCountChecker/RetainCountDiagnostics.cpp | 8 +- .../RetainCountChecker/RetainCountDiagnostics.h | 7 +- clang/lib/StaticAnalyzer/Checkers/Taint.cpp | 2 +- .../lib/StaticAnalyzer/Checkers/ValistChecker.cpp | 7 +- clang/lib/StaticAnalyzer/Core/BugReporter.cpp | 227 +- .../StaticAnalyzer/Core/BugReporterVisitors.cpp | 10 +- clang/lib/StaticAnalyzer/Core/CMakeLists.txt | 1 - clang/lib/StaticAnalyzer/Core/CallEvent.cpp | 2 +- clang/lib/StaticAnalyzer/Core/ExplodedGraph.cpp | 90 +- clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp | 2 +- clang/lib/StaticAnalyzer/Core/LoopUnrolling.cpp | 4 +- clang/lib/StaticAnalyzer/Core/PlistDiagnostics.cpp | 2 +- clang/lib/StaticAnalyzer/Core/SarifDiagnostics.cpp | 2 +- .../StaticAnalyzer/Frontend/AnalysisConsumer.cpp | 2 +- .../DependencyScanningFilesystem.cpp | 33 +- .../DependencyScanningService.cpp | 6 +- .../DependencyScanningWorker.cpp | 23 +- .../test/CXX/dcl.dcl/dcl.spec/dcl.constexpr/p1.cpp | 12 +- clang/test/CXX/drs/dr7xx.cpp | 10 +- .../subframework_header_dir_symlink_cdb.json | 4 +- clang/test/ClangScanDeps/Inputs/symlink_cdb.json | 4 +- .../test/ClangScanDeps/Inputs/vfsoverlay_cdb.json | 2 +- clang/test/ClangScanDeps/header_stat_before_open.m | 2 +- clang/test/ClangScanDeps/regular_cdb.cpp | 3 + .../subframework_header_dir_symlink.m | 4 +- clang/test/ClangScanDeps/vfsoverlay.cpp | 2 +- .../CodeGenCXX/ms-constexpr-static-data-member.cpp | 26 + .../ms-integer-static-data-members-exported.cpp | 2 +- .../CodeGenCXX/ms-integer-static-data-members.cpp | 3 +- clang/test/CodeGenCXX/wasm-eh.cpp | 14 +- clang/test/Driver/wasm-toolchain.c | 19 + clang/test/Index/index-module-with-vfs.m | 8 +- clang/test/Modules/crash-vfs-ivfsoverlay.m | 4 +- clang/test/Modules/double-quotes.m | 5 +- .../Modules/framework-public-includes-private.m | 5 +- .../distribute_parallel_for_simd_loop_messages.cpp | 30 +- .../test/OpenMP/distribute_simd_loop_messages.cpp | 26 +- clang/test/OpenMP/for_loop_messages.cpp | 22 +- clang/test/OpenMP/for_simd_loop_messages.cpp | 30 +- clang/test/OpenMP/parallel_for_ast_print.cpp | 12 +- clang/test/OpenMP/parallel_for_codegen.cpp | 127 +- clang/test/OpenMP/parallel_for_loop_messages.cpp | 22 +- .../OpenMP/parallel_for_simd_loop_messages.cpp | 30 +- clang/test/OpenMP/simd_loop_messages.cpp | 24 +- .../OpenMP/target_parallel_for_loop_messages.cpp | 22 +- .../target_parallel_for_simd_loop_messages.cpp | 30 +- clang/test/OpenMP/target_simd_loop_messages.cpp | 30 +- .../target_teams_distribute_loop_messages.cpp | 22 +- ...teams_distribute_parallel_for_loop_messages.cpp | 22 +- ..._distribute_parallel_for_simd_loop_messages.cpp | 30 +- .../target_teams_distribute_simd_loop_messages.cpp | 20 +- clang/test/OpenMP/taskloop_loop_messages.cpp | 21 +- clang/test/OpenMP/taskloop_simd_loop_messages.cpp | 30 +- .../test/OpenMP/teams_distribute_loop_messages.cpp | 22 +- ...teams_distribute_parallel_for_loop_messages.cpp | 22 +- ..._distribute_parallel_for_simd_loop_messages.cpp | 30 +- .../OpenMP/teams_distribute_simd_loop_messages.cpp | 30 +- .../Inputs/nonportable-hmaps/foo.hmap.json | 5 +- .../Inputs/nonportable-hmaps/headers/foo/Bar.h | 0 .../Inputs/nonportable-hmaps/headers/foo/Baz.h | 0 .../Preprocessor/nonportable-include-with-hmap.c | 21 +- .../misexpect-branch-nonconst-expect-arg.proftext | 9 + .../test/Profile/Inputs/misexpect-branch.proftext | 9 + .../Inputs/misexpect-switch-default-only.proftext | 12 + .../Inputs/misexpect-switch-default.proftext | 16 + .../Inputs/misexpect-switch-nonconst.proftext | 17 + .../test/Profile/Inputs/misexpect-switch.proftext | 16 + clang/test/Profile/misexpect-branch-cold.c | 26 + .../misexpect-branch-nonconst-expected-val.c | 23 + .../test/Profile/misexpect-branch-unpredictable.c | 25 + clang/test/Profile/misexpect-branch.c | 28 + clang/test/Profile/misexpect-switch-default.c | 40 + clang/test/Profile/misexpect-switch-nonconst.c | 43 + .../Profile/misexpect-switch-only-default-case.c | 35 + clang/test/Profile/misexpect-switch.c | 41 + clang/test/Sema/div-sizeof-array.cpp | 29 + .../SemaCXX/cxx1y-variable-templates_in_class.cpp | 6 +- clang/test/SemaCXX/dllexport.cpp | 37 +- clang/test/SemaCXX/dllimport.cpp | 91 +- clang/test/VFS/external-names.c | 8 +- clang/test/VFS/framework-import.m | 6 +- clang/test/VFS/implicit-include.c | 6 +- clang/test/VFS/include-mixed-real-and-virtual.c | 6 +- clang/test/VFS/include-real-from-virtual.c | 6 +- clang/test/VFS/include-virtual-from-real.c | 6 +- clang/test/VFS/include.c | 6 +- clang/test/VFS/incomplete-umbrella.m | 6 +- clang/test/VFS/module-import.m | 8 +- clang/test/VFS/module_missing_vfs.m | 3 +- clang/test/VFS/real-path-found-first.m | 6 +- clang/test/VFS/relative-path.c | 6 +- clang/test/VFS/subframework-symlink.m | 5 +- clang/test/VFS/test_nonmodular.c | 4 +- .../VFS/umbrella-framework-import-skipnonexist.m | 8 +- clang/test/VFS/vfsroot-include.c | 6 +- clang/test/VFS/vfsroot-module.m | 6 +- clang/test/VFS/vfsroot-with-overlay.c | 8 +- .../clang-offload-bundler/ClangOffloadBundler.cpp | 33 +- clang/tools/clang-scan-deps/ClangScanDeps.cpp | 55 +- .../DependencyDirectivesSourceMinimizerTest.cpp | 42 + compiler-rt/include/fuzzer/FuzzedDataProvider.h | 6 +- compiler-rt/include/sanitizer/dfsan_interface.h | 2 +- .../include/sanitizer/tsan_interface_atomic.h | 8 +- compiler-rt/lib/asan/asan_allocator.cpp | 2 +- compiler-rt/lib/asan/asan_debugging.cpp | 8 +- compiler-rt/lib/asan/asan_descriptions.h | 2 +- compiler-rt/lib/asan/asan_errors.cpp | 2 +- compiler-rt/lib/asan/asan_flags.inc | 13 +- compiler-rt/lib/asan/asan_globals.cpp | 8 +- compiler-rt/lib/asan/asan_globals_win.cpp | 8 +- compiler-rt/lib/asan/asan_interceptors.cpp | 71 +- .../lib/asan/asan_interceptors_memintrinsics.cpp | 2 +- compiler-rt/lib/asan/asan_mac.cpp | 2 +- compiler-rt/lib/asan/asan_malloc_linux.cpp | 2 +- compiler-rt/lib/asan/asan_malloc_win.cpp | 11 +- compiler-rt/lib/asan/asan_new_delete.cpp | 2 +- compiler-rt/lib/asan/asan_poisoning.cpp | 2 +- compiler-rt/lib/asan/asan_report.cpp | 10 +- compiler-rt/lib/asan/asan_rtems.cpp | 4 +- compiler-rt/lib/asan/asan_rtl.cpp | 4 +- compiler-rt/lib/asan/asan_scariness_score.h | 2 +- compiler-rt/lib/asan/asan_stats.cpp | 2 +- compiler-rt/lib/asan/asan_suppressions.cpp | 2 +- compiler-rt/lib/asan/asan_thread.cpp | 5 +- compiler-rt/lib/asan/asan_win.cpp | 10 +- compiler-rt/lib/asan/asan_win_dll_thunk.cpp | 8 +- .../lib/asan/asan_win_dynamic_runtime_thunk.cpp | 12 +- compiler-rt/lib/dfsan/dfsan_custom.cpp | 2 +- compiler-rt/lib/fuzzer/FuzzerDefs.h | 5 +- compiler-rt/lib/fuzzer/FuzzerMerge.cpp | 73 +- compiler-rt/lib/hwasan/hwasan_flags.inc | 2 +- compiler-rt/lib/hwasan/hwasan_new_delete.cpp | 2 +- compiler-rt/lib/interception/interception.h | 4 +- compiler-rt/lib/interception/interception_win.cpp | 8 +- compiler-rt/lib/lsan/lsan.cpp | 2 +- compiler-rt/lib/lsan/lsan_common.cpp | 10 +- compiler-rt/lib/lsan/lsan_mac.cpp | 2 +- compiler-rt/lib/msan/msan.cpp | 4 +- compiler-rt/lib/msan/msan.h | 9 +- compiler-rt/lib/msan/msan_interceptors.cpp | 67 +- compiler-rt/lib/msan/msan_linux.cpp | 2 +- compiler-rt/lib/msan/msan_new_delete.cpp | 2 +- compiler-rt/lib/msan/tests/msan_test.cpp | 44 +- .../sanitizer_common/sanitizer_allocator_checks.h | 2 +- .../sanitizer_allocator_report.cpp | 9 +- compiler-rt/lib/sanitizer_common/sanitizer_asm.h | 4 +- .../lib/sanitizer_common/sanitizer_atomic_msvc.h | 63 +- .../lib/sanitizer_common/sanitizer_common.cpp | 2 +- .../lib/sanitizer_common/sanitizer_common.h | 14 +- .../sanitizer_common_interceptors.inc | 59 +- .../sanitizer_coverage_fuchsia.cpp | 6 +- .../sanitizer_coverage_libcdep_new.cpp | 4 +- .../sanitizer_coverage_win_sections.cpp | 12 +- .../lib/sanitizer_common/sanitizer_file.cpp | 2 +- .../lib/sanitizer_common/sanitizer_flag_parser.cpp | 3 +- .../lib/sanitizer_common/sanitizer_flag_parser.h | 4 +- .../lib/sanitizer_common/sanitizer_flags.cpp | 4 +- .../lib/sanitizer_common/sanitizer_fuchsia.cpp | 2 +- .../lib/sanitizer_common/sanitizer_getauxval.h | 3 +- .../sanitizer_interceptors_ioctl_netbsd.inc | 2 +- .../lib/sanitizer_common/sanitizer_internal_defs.h | 75 +- .../lib/sanitizer_common/sanitizer_libc.cpp | 11 +- .../sanitizer_platform_interceptors.h | 7 +- .../sanitizer_platform_limits_freebsd.h | 1084 ++--- .../sanitizer_platform_limits_posix.h | 2158 +++++----- .../sanitizer_platform_limits_solaris.h | 5 +- .../lib/sanitizer_common/sanitizer_procmaps.h | 2 +- .../sanitizer_common/sanitizer_procmaps_mac.cpp | 25 +- .../sanitizer_stacktrace_libcdep.cpp | 5 +- .../sanitizer_stoptheworld_linux_libcdep.cpp | 5 +- .../sanitizer_common/sanitizer_symbolizer_mac.cpp | 2 +- .../sanitizer_symbolizer_report.cpp | 3 +- .../lib/sanitizer_common/sanitizer_termination.cpp | 2 +- .../lib/sanitizer_common/sanitizer_vector.h | 6 +- compiler-rt/lib/sanitizer_common/sanitizer_win.cpp | 2 +- .../sanitizer_common/sanitizer_win_dll_thunk.cpp | 8 +- .../sanitizer_win_weak_interception.cpp | 8 +- .../lib/sanitizer_common/scripts/check_lint.sh | 49 +- .../lib/sanitizer_common/scripts/cpplint.py | 4316 +++++++++++++++----- .../tests/sanitizer_allocator_test.cpp | 4 +- .../sanitizer_common/tests/sanitizer_libc_test.cpp | 4 +- .../tests/sanitizer_printf_test.cpp | 23 +- .../tests/sanitizer_suppressions_test.cpp | 42 +- compiler-rt/lib/scudo/scudo_allocator_secondary.h | 28 +- compiler-rt/lib/scudo/scudo_errors.cpp | 5 +- .../lib/scudo/standalone/allocator_config.h | 4 +- compiler-rt/lib/scudo/standalone/combined.h | 33 +- compiler-rt/lib/scudo/standalone/size_class_map.h | 6 +- .../lib/scudo/standalone/tests/combined_test.cpp | 15 + .../lib/scudo/standalone/tests/wrappers_c_test.cpp | 1 + compiler-rt/lib/tsan/rtl/tsan_dispatch_defs.h | 14 +- compiler-rt/lib/tsan/rtl/tsan_external.cpp | 2 +- compiler-rt/lib/tsan/rtl/tsan_fd.cpp | 3 +- compiler-rt/lib/tsan/rtl/tsan_interceptors.cpp | 20 +- compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp | 2 +- compiler-rt/lib/tsan/rtl/tsan_interface.cpp | 2 +- compiler-rt/lib/tsan/rtl/tsan_interface.h | 8 +- compiler-rt/lib/tsan/rtl/tsan_interface_ann.cpp | 4 +- compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp | 2 +- compiler-rt/lib/tsan/rtl/tsan_interface_inl.h | 2 +- compiler-rt/lib/tsan/rtl/tsan_interface_java.cpp | 2 +- compiler-rt/lib/tsan/rtl/tsan_interface_java.h | 2 +- compiler-rt/lib/tsan/rtl/tsan_md5.cpp | 2 +- compiler-rt/lib/tsan/rtl/tsan_mman.h | 5 +- compiler-rt/lib/tsan/rtl/tsan_new_delete.cpp | 2 +- compiler-rt/lib/tsan/rtl/tsan_rtl.h | 2 +- compiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp | 5 +- compiler-rt/lib/tsan/rtl/tsan_suppressions.cpp | 2 +- compiler-rt/lib/tsan/tests/rtl/tsan_posix.cpp | 3 +- .../lib/tsan/tests/rtl/tsan_test_util_posix.cpp | 19 +- compiler-rt/lib/ubsan/ubsan_diag.cpp | 2 +- compiler-rt/test/CMakeLists.txt | 3 - .../asan/TestCases/alloca_loop_unpoisoning.cpp | 4 +- .../test/asan/TestCases/default_options.cpp | 2 +- .../asan/TestCases/initialization-constexpr.cpp | 6 +- .../test/asan/TestCases/scariness_score_test.cpp | 4 +- .../test/asan/TestCases/time_interceptor.cpp | 2 +- .../asan/TestCases/use-after-scope-conversion.cpp | 4 +- .../test/asan/TestCases/vla_chrome_testcase.cpp | 2 +- .../test/asan/TestCases/vla_loop_overfow.cpp | 2 +- compiler-rt/test/fuzzer/merge.test | 2 - compiler-rt/test/fuzzer/merge_two_step.test | 31 + .../test/lsan/TestCases/Linux/use_tls_dynamic.cpp | 2 +- compiler-rt/test/sanitizer_common/CMakeLists.txt | 5 + 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llvm/test/CodeGen/MIR/X86/fixed-stack-di.mir | 2 +- .../MIR/X86/fixed-stack-memory-operands.mir | 2 +- .../MIR/X86/frame-info-stack-references.mir | 2 +- .../Mips/GlobalISel/instruction-select/add.mir | 2 +- .../Mips/GlobalISel/instruction-select/bitwise.mir | 18 +- .../Mips/GlobalISel/instruction-select/branch.mir | 4 +- .../GlobalISel/instruction-select/constants.mir | 8 +- .../Mips/GlobalISel/instruction-select/fabs.mir | 4 +- .../Mips/GlobalISel/instruction-select/fcmp.mir | 64 +- .../Mips/GlobalISel/instruction-select/fence.mir | 2 +- .../GlobalISel/instruction-select/float_args.mir | 16 +- .../float_arithmetic_operations.mir | 16 +- .../instruction-select/float_constants.mir | 4 +- .../instruction-select/fpext_and_fptrunc.mir | 4 +- .../instruction-select/fptosi_and_fptoui.mir | 4 +- .../Mips/GlobalISel/instruction-select/fsqrt.mir | 4 +- .../instruction-select/gloal_address.mir | 2 +- .../instruction-select/gloal_address_pic.mir | 10 +- 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+- .../CodeGen/PowerPC/remove-redundant-load-imm.mir | 28 +- llvm/test/CodeGen/PowerPC/remove-self-copies.mir | 2 +- .../test/CodeGen/PowerPC/rlwinm_rldicl_to_andi.mir | 12 +- llvm/test/CodeGen/PowerPC/schedule-addi-load.mir | 2 +- llvm/test/CodeGen/PowerPC/setcr_bc.mir | 2 +- llvm/test/CodeGen/PowerPC/setcr_bc2.mir | 2 +- llvm/test/CodeGen/PowerPC/setcr_bc3.mir | 2 +- llvm/test/CodeGen/PowerPC/shrink-wrap.mir | 2 +- llvm/test/CodeGen/PowerPC/tls_get_addr_fence1.mir | 2 +- llvm/test/CodeGen/PowerPC/tls_get_addr_fence2.mir | 2 +- .../CodeGen/RISCV/select-optimize-multiple.mir | 4 +- .../CodeGen/SystemZ/RAbasic-invalid-LR-update.mir | 2 +- .../CodeGen/SystemZ/clear-liverange-spillreg.mir | 2 +- llvm/test/CodeGen/SystemZ/cond-move-04.mir | 2 +- llvm/test/CodeGen/SystemZ/cond-move-05.mir | 2 +- llvm/test/CodeGen/SystemZ/cond-move-08.mir | 2 +- .../CodeGen/SystemZ/cond-move-regalloc-hints.mir | 2 +- llvm/test/CodeGen/SystemZ/debuginstr-00.mir | 2 +- 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+- llvm/test/CodeGen/X86/GlobalISel/select-brcond.mir | 2 +- llvm/test/CodeGen/X86/GlobalISel/select-cmp.mir | 26 +- .../CodeGen/X86/GlobalISel/select-constant.mir | 4 +- llvm/test/CodeGen/X86/GlobalISel/select-copy.mir | 12 +- .../CodeGen/X86/GlobalISel/select-ext-x86-64.mir | 14 +- llvm/test/CodeGen/X86/GlobalISel/select-ext.mir | 26 +- .../X86/GlobalISel/select-extract-vec256.mir | 4 +- .../X86/GlobalISel/select-extract-vec512.mir | 8 +- .../CodeGen/X86/GlobalISel/select-fadd-scalar.mir | 4 +- .../CodeGen/X86/GlobalISel/select-fconstant.mir | 4 +- .../CodeGen/X86/GlobalISel/select-fdiv-scalar.mir | 4 +- .../CodeGen/X86/GlobalISel/select-fmul-scalar.mir | 4 +- .../CodeGen/X86/GlobalISel/select-fpext-scalar.mir | 2 +- .../X86/GlobalISel/select-fptrunc-scalar.mir | 2 +- .../CodeGen/X86/GlobalISel/select-fsub-scalar.mir | 4 +- llvm/test/CodeGen/X86/GlobalISel/select-gep.mir | 2 +- .../X86/GlobalISel/select-insert-vec256.mir | 8 +- .../X86/GlobalISel/select-insert-vec512.mir | 16 +- .../CodeGen/X86/GlobalISel/select-lshr-scalar.mir | 24 +- .../GlobalISel/select-memop-scalar-unordered.mir | 36 +- .../X86/GlobalISel/select-memop-scalar-x32.mir | 16 +- .../CodeGen/X86/GlobalISel/select-memop-scalar.mir | 36 +- .../CodeGen/X86/GlobalISel/select-memop-v128.mir | 8 +- .../CodeGen/X86/GlobalISel/select-memop-v256.mir | 8 +- .../CodeGen/X86/GlobalISel/select-memop-v512.mir | 8 +- .../CodeGen/X86/GlobalISel/select-merge-vec256.mir | 2 +- .../CodeGen/X86/GlobalISel/select-merge-vec512.mir | 4 +- .../CodeGen/X86/GlobalISel/select-mul-scalar.mir | 6 +- .../test/CodeGen/X86/GlobalISel/select-mul-vec.mir | 30 +- .../CodeGen/X86/GlobalISel/select-or-scalar.mir | 8 +- llvm/test/CodeGen/X86/GlobalISel/select-phi.mir | 12 +- .../CodeGen/X86/GlobalISel/select-shl-scalar.mir | 24 +- .../CodeGen/X86/GlobalISel/select-sub-v128.mir | 8 +- .../CodeGen/X86/GlobalISel/select-sub-v256.mir | 8 +- .../CodeGen/X86/GlobalISel/select-sub-v512.mir | 8 +- llvm/test/CodeGen/X86/GlobalISel/select-sub.mir | 4 +- llvm/test/CodeGen/X86/GlobalISel/select-trunc.mir | 12 +- llvm/test/CodeGen/X86/GlobalISel/select-undef.mir | 6 +- .../X86/GlobalISel/select-unmerge-vec256.mir | 2 +- .../X86/GlobalISel/select-unmerge-vec512.mir | 4 +- .../CodeGen/X86/GlobalISel/select-xor-scalar.mir | 8 +- .../CodeGen/X86/GlobalISel/x86-legalize-GV.mir | 2 +- .../X86/GlobalISel/x86-legalize-inttoptr.mir | 2 +- .../X86/GlobalISel/x86-legalize-ptrtoint.mir | 8 +- .../CodeGen/X86/GlobalISel/x86-legalize-sdiv.mir | 6 +- .../CodeGen/X86/GlobalISel/x86-legalize-srem.mir | 6 +- .../CodeGen/X86/GlobalISel/x86-legalize-udiv.mir | 6 +- .../CodeGen/X86/GlobalISel/x86-legalize-urem.mir | 6 +- .../CodeGen/X86/GlobalISel/x86-select-inttoptr.mir | 2 +- .../CodeGen/X86/GlobalISel/x86-select-ptrtoint.mir | 8 +- .../CodeGen/X86/GlobalISel/x86-select-sdiv.mir | 6 +- .../CodeGen/X86/GlobalISel/x86-select-srem.mir | 6 +- .../CodeGen/X86/GlobalISel/x86-select-trap.mir | 2 +- .../CodeGen/X86/GlobalISel/x86-select-udiv.mir | 6 +- .../CodeGen/X86/GlobalISel/x86-select-urem.mir | 6 +- .../CodeGen/X86/GlobalISel/x86_64-legalize-GV.mir | 2 +- .../X86/GlobalISel/x86_64-legalize-fcmp.mir | 56 +- .../X86/GlobalISel/x86_64-legalize-fptosi.mir | 16 +- .../X86/GlobalISel/x86_64-legalize-inttoptr.mir | 2 +- .../X86/GlobalISel/x86_64-legalize-ptrtoint.mir | 10 +- .../X86/GlobalISel/x86_64-legalize-sdiv.mir | 8 +- .../X86/GlobalISel/x86_64-legalize-sitofp.mir | 16 +- .../X86/GlobalISel/x86_64-legalize-srem.mir | 8 +- .../X86/GlobalISel/x86_64-legalize-udiv.mir | 8 +- .../X86/GlobalISel/x86_64-legalize-urem.mir | 8 +- .../X86/GlobalISel/x86_64-legalize-zext.mir | 20 +- .../CodeGen/X86/GlobalISel/x86_64-select-fcmp.mir | 56 +- .../X86/GlobalISel/x86_64-select-fptosi.mir | 16 +- .../X86/GlobalISel/x86_64-select-inttoptr.mir | 2 +- .../X86/GlobalISel/x86_64-select-ptrtoint.mir | 10 +- .../CodeGen/X86/GlobalISel/x86_64-select-sdiv.mir | 8 +- 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llvm/test/CodeGen/X86/fixup-bw-inst.mir | 10 +- llvm/test/CodeGen/X86/fp128-cast.ll | 20 +- llvm/test/CodeGen/X86/fp128-compare.ll | 11 +- llvm/test/CodeGen/X86/fp128-i128.ll | 11 +- llvm/test/CodeGen/X86/implicit-null-checks.mir | 54 +- .../CodeGen/X86/implicit-null-chk-reg-rewrite.mir | 2 +- llvm/test/CodeGen/X86/late-remat-update.mir | 2 +- llvm/test/CodeGen/X86/lea-opt-with-debug.mir | 2 +- llvm/test/CodeGen/X86/leaFixup32.mir | 24 +- llvm/test/CodeGen/X86/leaFixup64.mir | 50 +- llvm/test/CodeGen/X86/limit-split-cost.mir | 2 +- llvm/test/CodeGen/X86/min-legal-vector-width.ll | 27 + llvm/test/CodeGen/X86/movtopush.mir | 2 +- llvm/test/CodeGen/X86/non-value-mem-operand.mir | 2 +- llvm/test/CodeGen/X86/opt_phis2.mir | 2 +- llvm/test/CodeGen/X86/peephole-fold-testrr.mir | 4 +- llvm/test/CodeGen/X86/postra-ignore-dbg-instrs.mir | 2 +- llvm/test/CodeGen/X86/pr30821.mir | 2 +- llvm/test/CodeGen/X86/pr38952.mir | 2 +- llvm/test/CodeGen/X86/pre-coalesce.mir | 2 +- llvm/test/CodeGen/X86/recip-fastmath.ll | 180 +- llvm/test/CodeGen/X86/recip-fastmath2.ll | 1139 +++--- llvm/test/CodeGen/X86/regalloc-copy-hints.mir | 2 +- llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir | 2 +- .../CodeGen/X86/sjlj-shadow-stack-liveness.mir | 2 +- llvm/test/CodeGen/X86/stack-folding-adx.mir | 8 +- llvm/test/CodeGen/X86/stack-folding-bmi2.mir | 4 +- .../CodeGen/X86/win_coreclr_chkstk_liveins.mir | 2 +- llvm/test/DebugInfo/AArch64/asan-stack-vars.mir | 4 +- .../AArch64/compiler-gen-bbs-livedebugvalues.mir | 2 +- llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir | 4 +- llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir | 2 +- .../MIR/AArch64/implicit-def-dead-scope.mir | 2 +- .../MIR/ARM/live-debug-values-reg-copy.mir | 2 +- .../DebugInfo/MIR/ARM/split-superreg-complex.mir | 2 +- .../DebugInfo/MIR/ARM/split-superreg-piece.mir | 2 +- llvm/test/DebugInfo/MIR/ARM/split-superreg.mir | 2 +- llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir | 2 +- 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llvm/test/Object/Inputs/tapi-invalid-v3.tbd | 24 - llvm/test/Object/Inputs/tapi-v1.tbd | 21 - llvm/test/Object/Inputs/tapi-v2.tbd | 30 - llvm/test/Object/Inputs/tapi-v3.tbd | 24 - llvm/test/Object/nm-tapi-invalids.test | 20 - llvm/test/Object/nm-tapi.test | 56 - llvm/test/Reduce/Inputs/remove-args.py | 16 + llvm/test/Reduce/remove-args.ll | 22 + llvm/test/ThinLTO/X86/lazyload_metadata.ll | 4 +- llvm/test/Transforms/ConstProp/fma.ll | 259 ++ llvm/test/Transforms/FunctionAttrs/writeonly.ll | 30 + .../test/Transforms/InstCombine/deref-alloc-fns.ll | 12 +- llvm/test/Transforms/InstCombine/fma.ll | 15 +- .../Transforms/InstCombine/icmp-div-constant.ll | 28 +- .../Transforms/InstCombine/malloc-free-delete.ll | 4 +- llvm/test/Transforms/InstCombine/objsize-64.ll | 2 +- .../Transforms/InstSimplify/fold-builtin-fma.ll | 119 - ...l-check-in-uadd_with_overflow-of-nonnull-ptr.ll | 19 + ...-usub-by-nonzero-is-non-zero-and-no-overflow.ll | 16 +- llvm/test/Transforms/LowerExpectIntrinsic/basic.ll | 31 +- .../Inputs/misexpect-branch-correct.proftext | 38 + .../PGOProfile/Inputs/misexpect-branch.proftext | 38 + .../Inputs/misexpect-switch-correct.proftext | 16 + .../PGOProfile/Inputs/misexpect-switch.proftext | 16 + .../PGOProfile/misexpect-branch-correct.ll | 94 + .../PGOProfile/misexpect-branch-stripped.ll | 115 + .../PGOProfile/misexpect-branch-unpredictable.ll | 89 + .../test/Transforms/PGOProfile/misexpect-branch.ll | 130 + .../PGOProfile/misexpect-switch-default.ll | 196 + .../test/Transforms/PGOProfile/misexpect-switch.ll | 293 ++ llvm/tools/llvm-nm/llvm-nm.cpp | 30 - llvm/tools/llvm-reduce/CMakeLists.txt | 1 + llvm/tools/llvm-reduce/DeltaManager.h | 2 + llvm/tools/llvm-reduce/TestRunner.cpp | 14 +- llvm/tools/llvm-reduce/TestRunner.h | 9 +- llvm/tools/llvm-reduce/deltas/Delta.cpp | 57 +- llvm/tools/llvm-reduce/deltas/ReduceArguments.cpp | 126 + llvm/tools/llvm-reduce/deltas/ReduceArguments.h | 21 + llvm/tools/llvm-reduce/deltas/ReduceFunctions.cpp | 5 +- llvm/tools/llvm-reduce/deltas/ReduceMetadata.cpp | 1 - llvm/tools/llvm-reduce/llvm-reduce.cpp | 13 +- llvm/unittests/DebugInfo/GSYM/GSYMTest.cpp | 168 +- .../utils/gn/secondary/clang/lib/Analysis/BUILD.gn | 1 + .../clang/lib/StaticAnalyzer/Core/BUILD.gn | 1 - .../gn/secondary/llvm/lib/DebugInfo/GSYM/BUILD.gn | 1 + .../secondary/llvm/lib/Transforms/Utils/BUILD.gn | 1 + .../gn/secondary/llvm/tools/llvm-reduce/BUILD.gn | 3 + 1102 files changed, 15927 insertions(+), 9304 deletions(-) rename clang/include/clang/{StaticAnalyzer/Core/BugReporter => Analysis}/PathDiagn [...] create mode 100644 clang/include/clang/Lex/PreprocessorExcludedConditionalDirectiv [...] rename clang/lib/{StaticAnalyzer/Core => Analysis}/PathDiagnostic.cpp (82%) create mode 100644 clang/test/CodeGenCXX/ms-constexpr-static-data-member.cpp copy clang-tools-extra/clangd/test/Inputs/background-index/sub_dir/compile_flags.t [...] copy clang-tools-extra/clangd/test/Inputs/background-index/sub_dir/compile_flags.t [...] create mode 100644 clang/test/Profile/Inputs/misexpect-branch-nonconst-expect-arg. [...] create mode 100644 clang/test/Profile/Inputs/misexpect-branch.proftext create mode 100644 clang/test/Profile/Inputs/misexpect-switch-default-only.proftext create mode 100644 clang/test/Profile/Inputs/misexpect-switch-default.proftext create mode 100644 clang/test/Profile/Inputs/misexpect-switch-nonconst.proftext create mode 100644 clang/test/Profile/Inputs/misexpect-switch.proftext create mode 100644 clang/test/Profile/misexpect-branch-cold.c create mode 100644 clang/test/Profile/misexpect-branch-nonconst-expected-val.c create mode 100644 clang/test/Profile/misexpect-branch-unpredictable.c create mode 100644 clang/test/Profile/misexpect-branch.c create mode 100644 clang/test/Profile/misexpect-switch-default.c create mode 100644 clang/test/Profile/misexpect-switch-nonconst.c create mode 100644 clang/test/Profile/misexpect-switch-only-default-case.c create mode 100644 clang/test/Profile/misexpect-switch.c create mode 100644 clang/test/Sema/div-sizeof-array.cpp create mode 100644 compiler-rt/test/fuzzer/merge_two_step.test create mode 100644 libcxx/cmake/caches/Apple.cmake create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/param_entry [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/param_entry [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/param_entry [...] create mode 100644 llvm/include/llvm/DebugInfo/GSYM/LineTable.h create mode 100644 llvm/include/llvm/Transforms/Utils/MisExpect.h create mode 100644 llvm/lib/DebugInfo/GSYM/LineTable.cpp create mode 100644 llvm/lib/Transforms/Utils/MisExpect.cpp create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-i128-on-stack.ll create mode 100644 llvm/test/CodeGen/AMDGPU/live-intervals-multiple-dead-defs.mir create mode 100644 llvm/test/CodeGen/MIR/PowerPC/machine-backward-cp.mir create mode 100644 llvm/test/CodeGen/Mips/msa/nori.b.ll create mode 100644 llvm/test/LTO/X86/Inputs/type-mapping-bug3.ll create mode 100644 llvm/test/LTO/X86/type-mapping-bug3.ll delete mode 100644 llvm/test/Object/Inputs/tapi-invalid-v1.tbd delete mode 100644 llvm/test/Object/Inputs/tapi-invalid-v2.tbd delete mode 100644 llvm/test/Object/Inputs/tapi-invalid-v3.tbd delete mode 100644 llvm/test/Object/Inputs/tapi-v1.tbd delete mode 100644 llvm/test/Object/Inputs/tapi-v2.tbd delete mode 100644 llvm/test/Object/Inputs/tapi-v3.tbd delete mode 100644 llvm/test/Object/nm-tapi-invalids.test delete mode 100644 llvm/test/Object/nm-tapi.test create mode 100755 llvm/test/Reduce/Inputs/remove-args.py create mode 100644 llvm/test/Reduce/remove-args.ll create mode 100644 llvm/test/Transforms/ConstProp/fma.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/writeonly.ll delete mode 100644 llvm/test/Transforms/InstSimplify/fold-builtin-fma.ll create mode 100644 llvm/test/Transforms/PGOProfile/Inputs/misexpect-branch-correct [...] create mode 100644 llvm/test/Transforms/PGOProfile/Inputs/misexpect-branch.proftext create mode 100644 llvm/test/Transforms/PGOProfile/Inputs/misexpect-switch-correct [...] create mode 100644 llvm/test/Transforms/PGOProfile/Inputs/misexpect-switch.proftext create mode 100644 llvm/test/Transforms/PGOProfile/misexpect-branch-correct.ll create mode 100644 llvm/test/Transforms/PGOProfile/misexpect-branch-stripped.ll create mode 100644 llvm/test/Transforms/PGOProfile/misexpect-branch-unpredictable.ll create mode 100644 llvm/test/Transforms/PGOProfile/misexpect-branch.ll create mode 100644 llvm/test/Transforms/PGOProfile/misexpect-switch-default.ll create mode 100644 llvm/test/Transforms/PGOProfile/misexpect-switch.ll create mode 100644 llvm/tools/llvm-reduce/deltas/ReduceArguments.cpp create mode 100644 llvm/tools/llvm-reduce/deltas/ReduceArguments.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits September 2019