Tcwg-commits August 2019

tcwg-commits@lists.linaro.org

6 participants
13798 discussions

[binutils-gdb] branch binutils-2_32-branch updated (a989a2b689 -> 1ba5a6a32b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch binutils-2_32-branch in repository binutils-gdb. from a989a2b689 Automatic date update in version.in new 1ba5a6a32b Automatic date update in version.in The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[llvm] branch master updated (3c182acee04 -> 4f3daf94995)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 3c182acee04 [dsymutil] Fix heap-use-after-free related to the LinkOptions. new 4f3daf94995 Prevent vregs leaking into the MC layer via TargetRegisterC [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/llvm/CodeGen/TargetRegisterInfo.h | 9 +++++++++ 1 file changed, 9 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[binutils-gdb] branch master updated (0eba165a74 -> 0f52d45acd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 0eba165a74 Remove directory names from gdb.base/batch-exit-status.exp new 0f52d45acd RISC-V: Fix lui relax failure with relro. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/ChangeLog | 5 +++++ bfd/elfnn-riscv.c | 9 +++++++-- 2 files changed, 12 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[gcc] branch master updated (a8c2576b6b8 -> 36154c6c9d4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from a8c2576b6b8 * cfgrtl.c (relink_block_chain): Add line returns in dump file. new 36154c6c9d4 PR c++/90947 - Simple lookup table of array of strings is m [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 6 + gcc/cp/ChangeLog | 6 + gcc/cp/decl.c | 5 +- gcc/testsuite/ChangeLog | 8 + gcc/testsuite/c-c++-common/array-1.c | 247 +++++++++++++++++++++++++++ gcc/testsuite/g++.dg/abi/mangle73.C | 96 +++++++++++ gcc/testsuite/g++.dg/cpp2a/nontype-class23.C | 102 +++++++++++ gcc/testsuite/g++.dg/init/array53.C | 33 ++++ gcc/tree.c | 67 ++++++++ gcc/tree.h | 6 + 10 files changed, 574 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/array-1.c create mode 100644 gcc/testsuite/g++.dg/abi/mangle73.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/nontype-class23.C create mode 100644 gcc/testsuite/g++.dg/init/array53.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[llvm] branch master updated (884000e21ee -> 3c182acee04)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 884000e21ee [Tests] Autogen a bunch of Reassociate tests for ease of update new 3c182acee04 [dsymutil] Fix heap-use-after-free related to the LinkOptions. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: tools/dsymutil/dsymutil.cpp | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allmodconfig updated (4ee32fbc -> 3ed301a2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allmodconfig in repository toolchain/ci/base-artifacts. discards 4ee32fbc 2: update: llvm-linux: 19135 new 3ed301a2 2: update: llvm-linux: 19135 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4ee32fbc) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-build_llvm/console.log | 11692 +++++++++++++++--------------- 03-build_linux/console.log | 3252 ++++----- 06-update_baseline/console.log | 42 +- console.log | 15152 +++++++++++++++++++-------------------- jenkins/manifest.sh | 6 +- 6 files changed, 15155 insertions(+), 15155 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[llvm] branch master updated (0bbeef3cb17 -> 884000e21ee)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 0bbeef3cb17 [PGO] Add PGO support at -O0 in the experimental new pass manager new c7a3c5c5d16 Finish moving TargetRegisterInfo::isVirtualRegister() and f [...] new 884000e21ee [Tests] Autogen a bunch of Reassociate tests for ease of update The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../CodeGen/GlobalISel/InstructionSelectorImpl.h | 2 +- include/llvm/CodeGen/LiveRegUnits.h | 2 +- include/llvm/CodeGen/MachineInstrBuilder.h | 17 +- include/llvm/CodeGen/MachineRegisterInfo.h | 20 +-- include/llvm/CodeGen/RegisterClassInfo.h | 2 +- include/llvm/CodeGen/RegisterPressure.h | 6 +- include/llvm/CodeGen/ScheduleDAGInstrs.h | 2 +- include/llvm/CodeGen/TargetRegisterInfo.h | 50 +----- include/llvm/CodeGen/VirtRegMap.h | 4 +- .../AsmPrinter/DbgEntityHistoryCalculator.cpp | 4 +- lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 2 +- lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 3 +- lib/CodeGen/AsmPrinter/DwarfExpression.cpp | 3 +- lib/CodeGen/BranchFolding.cpp | 8 +- lib/CodeGen/CalcSpillWeights.cpp | 11 +- lib/CodeGen/DeadMachineInstructionElim.cpp | 6 +- lib/CodeGen/DetectDeadLanes.cpp | 38 ++-- lib/CodeGen/EarlyIfConversion.cpp | 10 +- lib/CodeGen/ExpandPostRAPseudos.cpp | 4 +- lib/CodeGen/GlobalISel/InstructionSelect.cpp | 6 +- lib/CodeGen/GlobalISel/RegBankSelect.cpp | 4 +- lib/CodeGen/GlobalISel/RegisterBankInfo.cpp | 7 +- lib/CodeGen/GlobalISel/Utils.cpp | 13 +- lib/CodeGen/InlineSpiller.cpp | 12 +- lib/CodeGen/LiveDebugValues.cpp | 2 +- lib/CodeGen/LiveDebugVariables.cpp | 16 +- lib/CodeGen/LiveInterval.cpp | 4 +- lib/CodeGen/LiveIntervals.cpp | 31 ++-- lib/CodeGen/LivePhysRegs.cpp | 10 +- lib/CodeGen/LiveRangeCalc.cpp | 3 +- lib/CodeGen/LiveRangeEdit.cpp | 6 +- lib/CodeGen/LiveRangeShrink.cpp | 2 +- lib/CodeGen/LiveRegUnits.cpp | 6 +- lib/CodeGen/LiveStacks.cpp | 7 +- lib/CodeGen/LiveVariables.cpp | 22 ++- lib/CodeGen/MIRCanonicalizerPass.cpp | 18 +- lib/CodeGen/MIRParser/MIParser.cpp | 10 +- lib/CodeGen/MIRParser/MIRParser.cpp | 2 +- lib/CodeGen/MIRPrinter.cpp | 2 +- lib/CodeGen/MachineBasicBlock.cpp | 8 +- lib/CodeGen/MachineCSE.cpp | 24 ++- lib/CodeGen/MachineCombiner.cpp | 6 +- lib/CodeGen/MachineCopyPropagation.cpp | 6 +- lib/CodeGen/MachineInstr.cpp | 32 ++-- lib/CodeGen/MachineInstrBundle.cpp | 6 +- lib/CodeGen/MachineLICM.cpp | 26 +-- lib/CodeGen/MachineOperand.cpp | 14 +- lib/CodeGen/MachinePipeliner.cpp | 16 +- lib/CodeGen/MachineRegisterInfo.cpp | 12 +- lib/CodeGen/MachineScheduler.cpp | 23 ++- lib/CodeGen/MachineSink.cpp | 17 +- lib/CodeGen/MachineTraceMetrics.cpp | 14 +- lib/CodeGen/MachineVerifier.cpp | 56 +++--- lib/CodeGen/OptimizePHIs.cpp | 7 +- lib/CodeGen/PHIElimination.cpp | 2 +- lib/CodeGen/PeepholeOptimizer.cpp | 44 +++-- lib/CodeGen/ProcessImplicitDefs.cpp | 4 +- lib/CodeGen/RegAllocBase.cpp | 4 +- lib/CodeGen/RegAllocFast.cpp | 85 +++++---- lib/CodeGen/RegAllocGreedy.cpp | 12 +- lib/CodeGen/RegAllocPBQP.cpp | 2 +- lib/CodeGen/RegisterCoalescer.cpp | 59 +++--- lib/CodeGen/RegisterPressure.cpp | 16 +- lib/CodeGen/RegisterScavenging.cpp | 20 +-- lib/CodeGen/RenameIndependentSubregs.cpp | 2 +- lib/CodeGen/ScheduleDAGInstrs.cpp | 12 +- lib/CodeGen/SelectionDAG/FastISel.cpp | 6 +- lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | 6 +- lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 38 ++-- lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp | 2 +- lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 14 +- lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 4 +- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 11 +- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 17 +- lib/CodeGen/ShrinkWrap.cpp | 3 +- lib/CodeGen/StackMaps.cpp | 2 +- lib/CodeGen/StackSlotColoring.cpp | 8 +- lib/CodeGen/TailDuplicator.cpp | 2 +- lib/CodeGen/TargetInstrInfo.cpp | 33 ++-- lib/CodeGen/TargetRegisterInfo.cpp | 29 +-- lib/CodeGen/TwoAddressInstructionPass.cpp | 48 +++-- lib/CodeGen/VirtRegMap.cpp | 22 +-- lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp | 4 +- lib/Target/AArch64/AArch64AsmPrinter.cpp | 2 +- lib/Target/AArch64/AArch64CondBrTuning.cpp | 2 +- lib/Target/AArch64/AArch64ConditionalCompares.cpp | 2 +- .../AArch64/AArch64DeadRegisterDefinitionsPass.cpp | 2 +- lib/Target/AArch64/AArch64InstrInfo.cpp | 56 +++--- lib/Target/AArch64/AArch64InstructionSelector.cpp | 19 +- lib/Target/AArch64/AArch64PBQPRegAlloc.cpp | 10 +- lib/Target/AArch64/AArch64RegisterBankInfo.cpp | 4 +- lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 2 +- lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | 8 +- lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp | 10 +- lib/Target/AMDGPU/GCNNSAReassign.cpp | 2 +- lib/Target/AMDGPU/GCNRegBankReassign.cpp | 8 +- lib/Target/AMDGPU/GCNRegPressure.cpp | 21 +-- lib/Target/AMDGPU/GCNRegPressure.h | 2 +- lib/Target/AMDGPU/R600ISelLowering.cpp | 2 +- lib/Target/AMDGPU/R600InstrInfo.cpp | 10 +- lib/Target/AMDGPU/R600MachineScheduler.cpp | 4 +- lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp | 2 +- lib/Target/AMDGPU/R600RegisterInfo.cpp | 2 +- lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 26 ++- lib/Target/AMDGPU/SIFixupVectorISel.cpp | 3 +- lib/Target/AMDGPU/SIFoldOperands.cpp | 23 ++- lib/Target/AMDGPU/SIFormMemoryClauses.cpp | 16 +- lib/Target/AMDGPU/SIISelLowering.cpp | 6 +- lib/Target/AMDGPU/SIInstrInfo.cpp | 61 +++---- lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 7 +- lib/Target/AMDGPU/SILowerControlFlow.cpp | 5 +- lib/Target/AMDGPU/SILowerI1Copies.cpp | 6 +- lib/Target/AMDGPU/SIMachineScheduler.cpp | 12 +- lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 11 +- lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 16 +- lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp | 4 +- lib/Target/AMDGPU/SIRegisterInfo.cpp | 6 +- lib/Target/AMDGPU/SIRegisterInfo.h | 2 +- lib/Target/AMDGPU/SIShrinkInstructions.cpp | 30 ++-- lib/Target/AMDGPU/SIWholeQuadMode.cpp | 13 +- lib/Target/ARM/A15SDOptimizer.cpp | 22 +-- lib/Target/ARM/ARMAsmPrinter.cpp | 2 +- lib/Target/ARM/ARMBaseInstrInfo.cpp | 25 ++- lib/Target/ARM/ARMBaseRegisterInfo.cpp | 6 +- lib/Target/ARM/ARMCallLowering.cpp | 2 +- lib/Target/ARM/ARMISelLowering.cpp | 2 +- lib/Target/ARM/ARMInstructionSelector.cpp | 2 +- lib/Target/ARM/ARMScheduleA9.td | 4 +- lib/Target/ARM/MLxExpansionPass.cpp | 20 +-- lib/Target/ARM/Thumb1InstrInfo.cpp | 17 +- lib/Target/ARM/Thumb2InstrInfo.cpp | 6 +- lib/Target/ARM/ThumbRegisterInfo.cpp | 7 +- lib/Target/BPF/BPFISelDAGToDAG.cpp | 11 +- lib/Target/BPF/BPFMIPeephole.cpp | 4 +- lib/Target/Hexagon/BitTracker.cpp | 18 +- lib/Target/Hexagon/HexagonBitSimplify.cpp | 33 ++-- lib/Target/Hexagon/HexagonBitTracker.cpp | 6 +- lib/Target/Hexagon/HexagonBlockRanges.cpp | 14 +- lib/Target/Hexagon/HexagonConstExtenders.cpp | 15 +- lib/Target/Hexagon/HexagonConstPropagation.cpp | 22 +-- lib/Target/Hexagon/HexagonCopyToCombine.cpp | 2 +- lib/Target/Hexagon/HexagonEarlyIfConv.cpp | 6 +- lib/Target/Hexagon/HexagonExpandCondsets.cpp | 20 +-- lib/Target/Hexagon/HexagonFrameLowering.cpp | 2 +- lib/Target/Hexagon/HexagonGenInsert.cpp | 17 +- lib/Target/Hexagon/HexagonGenPredicate.cpp | 10 +- lib/Target/Hexagon/HexagonHardwareLoops.cpp | 4 +- lib/Target/Hexagon/HexagonInstrInfo.cpp | 6 +- lib/Target/Hexagon/HexagonNewValueJump.cpp | 4 +- lib/Target/Hexagon/HexagonPeephole.cpp | 14 +- lib/Target/Hexagon/HexagonSplitDouble.cpp | 20 +-- lib/Target/Hexagon/HexagonSubtarget.cpp | 5 +- lib/Target/Hexagon/RDFCopy.cpp | 4 +- lib/Target/Hexagon/RDFGraph.cpp | 8 +- lib/Target/Hexagon/RDFLiveness.cpp | 4 +- lib/Target/Hexagon/RDFRegisters.cpp | 8 +- lib/Target/Hexagon/RDFRegisters.h | 8 +- lib/Target/Lanai/LanaiInstrInfo.cpp | 4 +- lib/Target/Mips/Mips16InstrInfo.cpp | 2 +- lib/Target/Mips/MipsInstructionSelector.cpp | 4 +- lib/Target/Mips/MipsOptimizePICCall.cpp | 3 +- lib/Target/Mips/MipsRegisterBankInfo.cpp | 10 +- lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 8 +- lib/Target/NVPTX/NVPTXPeephole.cpp | 2 +- lib/Target/PowerPC/PPCBranchCoalescing.cpp | 13 +- lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 2 +- lib/Target/PowerPC/PPCInstrInfo.cpp | 22 +-- lib/Target/PowerPC/PPCMIPeephole.cpp | 36 ++-- lib/Target/PowerPC/PPCReduceCRLogicals.cpp | 4 +- lib/Target/PowerPC/PPCRegisterInfo.cpp | 2 +- lib/Target/PowerPC/PPCVSXCopy.cpp | 2 +- lib/Target/PowerPC/PPCVSXFMAMutate.cpp | 6 +- lib/Target/PowerPC/PPCVSXSwapRemoval.cpp | 6 +- lib/Target/SystemZ/SystemZInstrInfo.cpp | 5 +- lib/Target/SystemZ/SystemZRegisterInfo.cpp | 5 +- lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp | 2 +- .../WebAssembly/WebAssemblyExplicitLocals.cpp | 6 +- lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp | 2 +- .../WebAssembly/WebAssemblyMachineFunctionInfo.h | 8 +- .../WebAssemblyOptimizeLiveIntervals.cpp | 2 +- .../WebAssemblyPrepareForLiveIntervals.cpp | 2 +- lib/Target/WebAssembly/WebAssemblyRegColoring.cpp | 7 +- lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp | 2 +- lib/Target/WebAssembly/WebAssemblyRegStackify.cpp | 6 +- lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp | 2 +- lib/Target/WebAssembly/WebAssemblyUtilities.cpp | 3 +- lib/Target/X86/X86CallFrameOptimization.cpp | 6 +- lib/Target/X86/X86CmovConversion.cpp | 4 +- lib/Target/X86/X86DomainReassignment.cpp | 12 +- lib/Target/X86/X86FlagsCopyLowering.cpp | 5 +- lib/Target/X86/X86ISelLowering.cpp | 2 +- lib/Target/X86/X86InstrInfo.cpp | 21 ++- lib/Target/X86/X86InstructionSelector.cpp | 10 +- lib/Target/X86/X86OptimizeLEAs.cpp | 3 +- lib/Target/X86/X86SpeculativeLoadHardening.cpp | 4 +- .../Reassociate/2002-05-15-MissedTree.ll | 16 +- .../Reassociate/2002-05-15-SubReassociate.ll | 9 +- .../Reassociate/canonicalize-neg-const.ll | 53 +++--- test/Transforms/Reassociate/commute.ll | 15 +- test/Transforms/Reassociate/fast-SubReassociate.ll | 39 ++-- test/Transforms/Reassociate/fast-fp-commute.ll | 11 +- test/Transforms/Reassociate/fast-multistep.ll | 13 +- test/Transforms/Reassociate/looptest.ll | 74 +++++--- .../Reassociate/mixed-fast-nonfast-fp.ll | 17 +- test/Transforms/Reassociate/mulfactor.ll | 39 ++-- test/Transforms/Reassociate/multistep.ll | 13 +- test/Transforms/Reassociate/no-op.ll | 24 ++- test/Transforms/Reassociate/optional-flags.ll | 25 ++- test/Transforms/Reassociate/propagate-flags.ll | 3 +- test/Transforms/Reassociate/shift-factor.ll | 3 +- test/Transforms/Reassociate/vaarg_movable.ll | 21 ++- test/Transforms/Reassociate/wrap-flags.ll | 43 +++-- test/Transforms/Reassociate/xor_reassoc.ll | 198 +++++++++++++-------- 213 files changed, 1413 insertions(+), 1400 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[clang] branch master updated (ce1bb5e5f9 -> d2c720398f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang. from ce1bb5e5f9 [PGO] Add PGO support at -O0 in the experimental new pass manager new d2c720398f [DirectoryWatcher] Relax assumption to prevent test flakiness The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/DirectoryWatcher/mac/DirectoryWatcher-mac.cpp | 18 ++++++++++++++++++ unittests/DirectoryWatcher/DirectoryWatcherTest.cpp | 2 +- 2 files changed, 19 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-defconfig updated (b4eddab5 -> fe050ad7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-defconfig in repository toolchain/ci/base-artifacts. discards b4eddab5 0: update: llvm-linux: boot new fe050ad7 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b4eddab5) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 52 +- 02-build_llvm/console.log | 11490 ++++++++++++++++---------------- 03-build_linux/console.log | 1824 +++--- 04-boot_linux/console.log | 408 +- console.log | 13799 ++++++++++++++++++++------------------- jenkins/manifest.sh | 6 +- 6 files changed, 13800 insertions(+), 13779 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

[libcxx] branch master updated (590e3405e -> f033db1b6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository libcxx. from 590e3405e Teach malloc_allocator how to count bytes new f033db1b6 Refactor deque to centralize handling of spare blocks. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/deque | 98 +++---- .../sequences/deque/spare_block_handling.pass.cpp | 284 +++++++++++++++++++++ 2 files changed, 334 insertions(+), 48 deletions(-) create mode 100644 test/libcxx/containers/sequences/deque/spare_block_handling.pass.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 3 months

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Tcwg-commits August 2019