Tcwg-commits July 2019

tcwg-commits@lists.linaro.org

6 participants
14175 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig updated (16f256fe -> b67fc89b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards 16f256fe 0: update: binutils-gcc-linux: all new b67fc89b 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (16f256fe) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-ma [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 22 +- 02-prepare_abe/console.log | 418 +- 03-build_abe-binutils/console.log | 10736 ++++++------- 04-build_abe-stage1/console.log | 19350 +++++++++++----------- 05-build_linux/console.log | 658 +- 06-boot_linux/console.log | 2 +- console.log | 31212 ++++++++++++++++++------------------ jenkins/manifest.sh | 16 +- 8 files changed, 31149 insertions(+), 31265 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig updated (c38899fc26e -> 4668ea40722)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/llvm-project. from c38899fc26e [ARM] Move MVE VPT block tests into the Thumb2 directory. NFC adds d7504a1569d [GISel]: Attach missing range metadata while translating G_LOADs adds 630be14ac64 [SmallBitVector] Fix bug in find_next_unset for small types [...] adds e6cd20ba534 [InstCombine] Update comment I missed in r366649. NFC adds 73d641a23c2 [PowerPC][NFC] Regenerate test using script adds 86fa3270ef6 [X86] SimplifyDemandedVectorEltsForTargetNode - Move SUBV_B [...] adds 3d68adebc57 [PowerPC][NFC] Precomit test case for upcoming patch adds ee5dc7e7ad8 [InstCombine] Add foldAndOfICmps test cases inspired by PR42691. adds 1a1af4392ac [analyzer] Fix -Wunused-function in NDEBUG builds with #ifd [...] adds 6ef23e65818 [utils] Clean up UpdateTestChecks/common.py adds c6c31da8677 [Loop Peeling] Fix the handling of branch weights of peeled [...] adds 3d72a58981e [PowerPC][NFC] Precommit a test case where ppc-mi-peepholes [...] adds 298500ae331 [AMDGPU] Save some work when an atomic op has no uses adds 6522a7df544 [llvm-readobj] - Stop using precompiled objects in file-hea [...] adds 6771a89fa01 [IPRA][ARM] Make use of the "returned" parameter attribute adds 88559637641 [OpenCL] Improve destructor support in C++ for OpenCL adds 3a52e50d737 Add location of SVN staging dir to git-llvm error output adds 0a42fe70a56 [AST] Treat semantic form of InitListExpr as implicit code [...] adds f94668e3360 [lldb][NFC] Tablegenify breakpoint adds af5d3b02fbc [clangd] Log input code of failed highlighting tests. NFC adds 1df6be211e4 [clangd] Set buffer name for main file. NFCI adds 5d4bc1293cc [ARM][test] Improve tests adds 13a364e1cc9 [yaml2obj] - Change how we handle implicit sections. adds bdb92955200 [X86][SSE] Add EltsFromConsecutiveLoads test case identifie [...] adds 006cf8c03d7 Added address-space mangling for stack related intrinsics adds 8d372008b13 AMDGPU/GlobalISel: Fix tests without asserts adds b3d719e1cf0 [X86] EltsFromConsecutiveLoads - support common source load [...] adds 1f5712ebb5d Revert the change to the [[nodiscard]] feature test macro value. adds 8c5e6fa6575 Updated the signature for some stack related intrinsics (CLANG) adds 8876a312a81 [ARM] Fix for MVE VPT block pass adds 937d0ee5d8d AMDGPU/GlobalISel: Remove unnecessary code adds 0166cff09b1 Reland [ELF] Loose a condition for relocation with a symbol new 5418be85e85 Update documentation for all CERT checks that correspond to [...] new 4668ea40722 AMDGPU/GlobalISel: Fix broken tests The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/ClangdUnit.cpp | 11 +- .../clangd/unittests/SemanticHighlightingTests.cpp | 3 +- .../docs/clang-tidy/checks/cert-dcl21-cpp.rst | 16 +- .../docs/clang-tidy/checks/cert-err09-cpp.rst | 5 + .../docs/clang-tidy/checks/cert-oop11-cpp.rst | 6 + .../misc-throw-by-value-catch-by-reference.rst | 9 +- clang/include/clang/AST/DeclCXX.h | 14 +- clang/include/clang/AST/ExprCXX.h | 11 +- clang/include/clang/AST/RecursiveASTVisitor.h | 23 +- clang/include/clang/Basic/Attr.td | 2 +- clang/lib/AST/DeclCXX.cpp | 25 +- clang/lib/AST/ExprCXX.cpp | 7 + clang/lib/CodeGen/CGBuiltin.cpp | 24 +- clang/lib/CodeGen/CGCXXABI.h | 14 +- clang/lib/CodeGen/CGCall.cpp | 2 +- clang/lib/CodeGen/CGClass.cpp | 40 ++- clang/lib/CodeGen/CGDecl.cpp | 21 +- clang/lib/CodeGen/CGException.cpp | 3 +- clang/lib/CodeGen/CGExprCXX.cpp | 31 +- clang/lib/CodeGen/CodeGenFunction.h | 13 +- clang/lib/CodeGen/ItaniumCXXABI.cpp | 32 +- clang/lib/CodeGen/MicrosoftCXXABI.cpp | 30 +- clang/lib/Sema/SemaDeclCXX.cpp | 50 +-- clang/lib/Sema/SemaOverload.cpp | 4 +- clang/lib/StaticAnalyzer/Core/RegionStore.cpp | 6 +- clang/test/CodeGen/builtin-sponentry.c | 2 +- clang/test/CodeGen/exceptions-seh.c | 4 +- clang/test/CodeGen/integer-overflow.c | 8 +- clang/test/CodeGen/ms-intrinsics.c | 2 +- clang/test/CodeGen/ms-setjmp.c | 8 +- clang/test/CodeGenCXX/PR42665.cpp | 61 ++++ .../test/CodeGenOpenCL/builtins-generic-amdgcn.cl | 5 + clang/test/CodeGenOpenCLCXX/addrspace-ctor.cl | 14 - .../test/CodeGenOpenCLCXX/addrspace-with-class.cl | 59 +++ clang/test/Preprocessor/has_attribute.cpp | 2 +- .../InitListExprPreOrder.cpp | 19 +- lld/test/ELF/arm-bl-v6-inrange.s | 2 +- lld/test/ELF/arm-bl-v6.s | 2 +- lld/test/ELF/arm-blx.s | 2 +- lld/test/ELF/arm-branch-rangethunk.s | 4 +- lld/test/ELF/arm-branch.s | 2 +- lld/test/ELF/arm-copy.s | 10 +- lld/test/ELF/arm-execute-only.s | 10 +- lld/test/ELF/arm-exidx-canunwind.s | 16 +- lld/test/ELF/arm-exidx-discard.s | 2 +- lld/test/ELF/arm-exidx-gc.s | 18 +- lld/test/ELF/arm-exidx-order.s | 24 +- lld/test/ELF/arm-exidx-output.s | 2 +- lld/test/ELF/arm-exidx-relocatable.s | 2 +- lld/test/ELF/arm-exidx-shared.s | 2 +- lld/test/ELF/arm-extreme-range-pi-thunk.s | 58 +-- lld/test/ELF/arm-force-pi-thunk.s | 2 +- lld/test/ELF/arm-gnu-ifunc-plt.s | 46 +-- lld/test/ELF/arm-gnu-ifunc.s | 34 +- lld/test/ELF/arm-mov-relocs.s | 24 +- lld/test/ELF/arm-plt-reloc.s | 174 ++++----- .../ELF/{arm-data-relocs.s => arm-reloc-abs32.s} | 0 lld/test/ELF/arm-sbrel32.s | 6 +- lld/test/ELF/arm-static-defines.s | 2 +- lld/test/ELF/arm-target2.s | 8 +- lld/test/ELF/arm-thumb-blx.s | 2 +- lld/test/ELF/arm-thumb-branch-rangethunk.s | 2 +- lld/test/ELF/arm-thumb-branch.s | 2 +- lld/test/ELF/arm-thumb-condbranch-thunk.s | 2 +- lld/test/ELF/arm-thumb-interwork-thunk.s | 6 +- lld/test/ELF/arm-thumb-mix-range-thunk-os.s | 2 +- lld/test/ELF/arm-thumb-narrow-branch-check.s | 2 +- lld/test/ELF/arm-thumb-no-undefined-thunk.s | 2 +- lld/test/ELF/arm-thumb-range-thunk-os.s | 2 +- lld/test/ELF/arm-thumb-thunk-empty-pass.s | 2 +- lld/test/ELF/arm-thumb-thunk-symbols.s | 4 +- lld/test/ELF/arm-thumb-undefined-weak.s | 2 +- lld/test/ELF/arm-thunk-largesection.s | 2 +- lld/test/ELF/arm-thunk-linkerscript-dotexpr.s | 2 +- lld/test/ELF/arm-thunk-linkerscript-large.s | 2 +- lld/test/ELF/arm-thunk-linkerscript-orphan.s | 2 +- lld/test/ELF/arm-thunk-linkerscript-sort.s | 2 +- lld/test/ELF/arm-thunk-linkerscript.s | 2 +- lld/test/ELF/arm-thunk-multipass-plt.s | 2 +- lld/test/ELF/arm-thunk-multipass.s | 2 +- lld/test/ELF/arm-undefined-weak.s | 2 +- .../{pack-dyn-relocs2.s => pack-dyn-relocs-arm2.s} | 2 +- lldb/source/Commands/CommandObjectBreakpoint.cpp | 144 +------- .../Commands/CommandObjectBreakpointCommand.cpp | 14 +- lldb/source/Commands/Options.td | 243 +++++++++++++ lldb/utils/TableGen/LLDBOptionDefEmitter.cpp | 8 +- llvm/include/llvm/ADT/SmallBitVector.h | 2 +- llvm/include/llvm/IR/Intrinsics.td | 6 +- llvm/include/llvm/ObjectYAML/ELFYAML.h | 7 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 5 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 6 +- llvm/lib/CodeGen/SjLjEHPrepare.cpp | 5 +- llvm/lib/MC/ELFObjectWriter.cpp | 5 - llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp | 137 +++---- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 4 - llvm/lib/Target/ARM/ARMFrameLowering.cpp | 6 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 6 + llvm/lib/Target/ARM/ARMMachineFunctionInfo.h | 7 + llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp | 21 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 99 ++++-- llvm/lib/Target/X86/X86WinEHState.cpp | 5 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 2 +- .../Instrumentation/HWAddressSanitizer.cpp | 11 +- .../Instrumentation/SanitizerCoverage.cpp | 6 +- llvm/lib/Transforms/Utils/LoopUnrollPeel.cpp | 103 +++--- llvm/test/Bitcode/compatibility-3.6.ll | 2 +- llvm/test/Bitcode/compatibility-3.7.ll | 2 +- llvm/test/Bitcode/compatibility-3.8.ll | 2 +- llvm/test/Bitcode/compatibility-3.9.ll | 2 +- llvm/test/Bitcode/compatibility-4.0.ll | 2 +- llvm/test/Bitcode/compatibility-5.0.ll | 2 +- llvm/test/Bitcode/compatibility-6.0.ll | 2 +- llvm/test/Bitcode/compatibility.ll | 2 +- .../AArch64/GlobalISel/arm64-irtranslator.ll | 11 +- .../AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir | 174 +-------- .../GlobalISel/inst-select-fmaxnum-ieee.s16.mir | 48 +++ .../GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir | 21 ++ .../AMDGPU/GlobalISel/inst-select-fmaxnum.mir | 174 +-------- .../AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir | 48 +++ .../GlobalISel/inst-select-fmaxnum.v2s16.mir | 22 ++ .../AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir | 174 +-------- .../GlobalISel/inst-select-fminnum-ieee.s16.mir | 48 +++ .../GlobalISel/inst-select-fminnum-ieee.v2s16.mir | 22 ++ .../AMDGPU/GlobalISel/inst-select-fminnum.mir | 174 +-------- .../AMDGPU/GlobalISel/inst-select-fminnum.s16.mir | 48 +++ .../GlobalISel/inst-select-fminnum.v2s16.mir | 22 ++ .../GlobalISel/regbankselect-atomicrmw-and.mir | 12 +- .../GlobalISel/regbankselect-atomicrmw-max.mir | 12 +- .../GlobalISel/regbankselect-atomicrmw-min.mir | 12 +- .../GlobalISel/regbankselect-atomicrmw-or.mir | 12 +- .../GlobalISel/regbankselect-atomicrmw-sub.mir | 12 +- .../GlobalISel/regbankselect-atomicrmw-umax.mir | 12 +- .../GlobalISel/regbankselect-atomicrmw-umin.mir | 12 +- .../GlobalISel/regbankselect-atomicrmw-xchg.mir | 12 +- .../GlobalISel/regbankselect-atomicrmw-xor.mir | 12 +- llvm/test/CodeGen/ARM/ipra-r0-returned.ll | 18 + .../MIR/PowerPC/peephole-miscompile-extswsli.mir | 66 ++++ llvm/test/CodeGen/PowerPC/dform-adjust.ll | 125 +++++++ llvm/test/CodeGen/PowerPC/pre-inc-disable.ll | 189 ++++++++-- llvm/test/CodeGen/Thumb2/mve-vpt-block2.mir | 2 +- llvm/test/CodeGen/Thumb2/mve-vpt-block3.mir | 2 +- llvm/test/CodeGen/Thumb2/mve-vpt-block4.mir | 2 +- llvm/test/CodeGen/Thumb2/mve-vpt-block5.mir | 4 +- .../CodeGen/X86/clear_upper_vector_element_bits.ll | 300 ++++++---------- llvm/test/CodeGen/X86/load-partial.ll | 119 ++++--- .../Instrumentation/HWAddressSanitizer/alloca.ll | 2 +- .../HWAddressSanitizer/kernel-alloca.ll | 2 +- .../SanitizerCoverage/stack-depth.ll | 4 +- llvm/test/MC/ELF/basic-elf-32.s | 4 +- llvm/test/MC/ELF/compression.s | 4 +- llvm/test/MC/ELF/relocation-386.s | 2 +- llvm/test/MC/Mips/elf-relsym.s | 10 +- llvm/test/MC/Mips/xgot.s | 4 +- llvm/test/Transforms/InstCombine/and-or-icmps.ll | 39 ++ .../Transforms/LoopUnroll/peel-loop-pgo-deopt.ll | 16 +- llvm/test/Transforms/LoopUnroll/peel-loop-pgo.ll | 8 +- llvm/test/Verifier/intrinsic-immarg.ll | 2 +- .../tools/llvm-readobj/Inputs/magic.coff-unknown | Bin 450 -> 0 bytes .../llvm-readobj/Inputs/trivial.exe.coff-i386 | Bin 2560 -> 0 bytes .../llvm-readobj/Inputs/trivial.obj.coff-arm64 | Bin 141 -> 0 bytes .../llvm-readobj/Inputs/trivial.obj.elf-lanai | Bin 737 -> 0 bytes .../test/tools/llvm-readobj/coff-file-headers.test | 321 +++++++++++++++++ llvm/test/tools/llvm-readobj/elf-file-headers.test | 129 +++++++ llvm/test/tools/llvm-readobj/file-headers.test | 394 --------------------- .../tools/llvm-readobj/macho-file-headers.test | 160 +++++++++ .../test/tools/llvm-readobj/wasm-file-headers.test | 14 + llvm/tools/yaml2obj/yaml2elf.cpp | 71 ++-- llvm/unittests/ADT/BitVectorTest.cpp | 32 ++ llvm/utils/UpdateTestChecks/common.py | 12 +- llvm/utils/git-svn/git-llvm | 4 +- 170 files changed, 2876 insertions(+), 2235 deletions(-) create mode 100644 clang/test/CodeGenCXX/PR42665.cpp delete mode 100644 clang/test/CodeGenOpenCLCXX/addrspace-ctor.cl create mode 100644 clang/test/CodeGenOpenCLCXX/addrspace-with-class.cl rename lld/test/ELF/{arm-data-relocs.s => arm-reloc-abs32.s} (100%) rename lld/test/ELF/{pack-dyn-relocs2.s => pack-dyn-relocs-arm2.s} (99%) create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.v2s16.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.v2s16.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.v2s16.mir create mode 100644 llvm/test/CodeGen/ARM/ipra-r0-returned.ll create mode 100644 llvm/test/CodeGen/MIR/PowerPC/peephole-miscompile-extswsli.mir create mode 100644 llvm/test/CodeGen/PowerPC/dform-adjust.ll delete mode 100644 llvm/test/tools/llvm-readobj/Inputs/magic.coff-unknown delete mode 100644 llvm/test/tools/llvm-readobj/Inputs/trivial.exe.coff-i386 delete mode 100644 llvm/test/tools/llvm-readobj/Inputs/trivial.obj.coff-arm64 delete mode 100644 llvm/test/tools/llvm-readobj/Inputs/trivial.obj.elf-lanai create mode 100644 llvm/test/tools/llvm-readobj/coff-file-headers.test create mode 100644 llvm/test/tools/llvm-readobj/elf-file-headers.test delete mode 100644 llvm/test/tools/llvm-readobj/file-headers.test create mode 100644 llvm/test/tools/llvm-readobj/macho-file-headers.test create mode 100644 llvm/test/tools/llvm-readobj/wasm-file-headers.test -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig updated (5a070348 -> 48472df9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 5a070348 0: update: llvm-linux: all new 48472df9 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (5a070348) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 11922 +++++++++++++++++----------------- 03-build_linux/console.log | 822 ++- 04-boot_linux/console.log | 14 +- 05-check_regression/console.log | 6 +- 06-update_baseline/console.log | 8 +- console.log | 12992 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 12994 insertions(+), 12998 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (f1a3b43cc1f5 -> 5f9e832c1370)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/linux. from f1a3b43cc1f5 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/l [...] adds c56b4ef1cf0c ntb: intel: Make intel_ntb3_peer_db_addr static adds 8b2f033631c2 NTB: ntb_perf: Increased the number of message retries to 1000 adds b1ee5998a5d2 NTB: ntb_perf: Disable NTB link after clearing peer XLAT r [...] adds 12c023d7c32a NTB: ntb_perf: Clear stale values in doorbell and command [...] adds a5c3666f1c32 NTB: ntb_hw_amd: set peer limit register adds 51cb8dbf1324 NTB: ntb_transport: Ensure qp->tx_mw_dma_addr is initaliazed adds ff148d8ac53e ntb_hw_switchtec: potential shift wrapping bug in switchte [...] adds 1e590dec3ed6 NTB: amd: Silence shift wrapping warning in amd_ntb_db_vec [...] adds 18c8c0954d15 NTB: correct ntb_dev_ops and ntb_dev comment typos adds 28e339f100e3 ntb_hw_switchtec: Remove redundant steps of switchtec_ntb_ [...] adds f0f43e766bdb ntb_hw_switchtec: Skip unnecessary re-setup of shared memo [...] adds a944ccc3b0ae ntb_hw_switchtec: Fix setup MW with failure bug adds d7cc609fb679 PCI/MSI: Support allocating virtual MSI interrupts adds fcdf8e95fa3b PCI/switchtec: Add module parameter to request more interrupts adds 246a42c51bc5 NTB: Introduce helper functions to calculate logical port number adds 5f1b1f065c79 NTB: Introduce functions to calculate multi-port resource index adds d217e07b32a6 NTB: Rename ntb.c to support multiple source files in the module adds 26b3a37b9284 NTB: Introduce MSI library adds a6bed7a54165 NTB: Introduce NTB MSI Test Client adds 76ab785e7396 NTB: Add ntb_msi_test support to ntb_test adds 2b0569b3b7e6 NTB: Add MSI interrupt support to ntb_transport adds d9c53aa440b3 NTB: Describe the ntb_msi_test client in the documentation. adds bec5545edef6 Merge tag 'ntb-5.3' of git://github.com/jonmason/ntb adds 618381f09cc1 hexagon: switch to generic version of pte allocation adds 8cf66504210d iommu/amd: fix a crash in iova_magazine_free_pfns adds 7e5a70ad88b1 CIFS: fix deadlock in cached root handling adds bf3c90ee1efe cifs: copy_file_range needs to strip setuid bits and updat [...] adds 89a5bfa350fa smb3: optimize open to not send query file internal info adds aa081859b10c cifs: flush before set-info if we have writeable handles adds 2a957ace44d4 cifs: update internal module number adds 91962d0f79cb Merge tag '5.3-smb3-fixes' of git://git.samba.org/sfrench/ [...] adds 1b03bc5c1163 typo fix: it's d_make_root, not d_make_inode... adds d6788eb7d0dc Merge branch 'work.misc' of git://git.kernel.org/pub/scm/l [...] adds 15ffef1ae69e dt-bindings: Ensure child nodes are of type 'object' adds 7d9ef7f37d1f dt-bindings: riscv: Limit cpus schema to only check RiscV [...] adds ad21a4ce040c dt-bindings: pinctrl: aspeed: Fix 'compatible' schema errors adds fcbe7e3cf86d dt-bindings: pinctrl: aspeed: Fix AST2500 example errors adds fbbf2b6e9b74 dt-bindings: iio: avia-hx711: Fix avdd-supply typo in example adds 20051f5fdf67 dt-bindings: iio: ad7124: Fix dtc warnings in example adds e2297f7c3ab3 dt-bindings: pinctrl: stm32: Fix missing 'clocks' property [...] adds c7bf0a0f3703 Merge tag 'devicetree-fixes-for-5.3' of git://git.kernel.o [...] adds 5f9e832c1370 Linus 5.3-rc1 No new revisions were added by this update. Summary of changes: .../bindings/bus/allwinner,sun8i-a23-rsb.yaml | 1 + .../devicetree/bindings/iio/adc/adi,ad7124.yaml | 71 ++-- .../devicetree/bindings/iio/adc/avia-hx711.yaml | 2 +- .../bindings/mtd/allwinner,sun4i-a10-nand.yaml | 1 + .../devicetree/bindings/mtd/nand-controller.yaml | 1 + .../bindings/pinctrl/aspeed,ast2400-pinctrl.yaml | 4 +- .../bindings/pinctrl/aspeed,ast2500-pinctrl.yaml | 9 +- .../bindings/pinctrl/st,stm32-pinctrl.yaml | 7 + Documentation/devicetree/bindings/riscv/cpus.yaml | 143 +++---- .../bindings/spi/allwinner,sun4i-a10-spi.yaml | 1 + .../bindings/spi/allwinner,sun6i-a31-spi.yaml | 1 + Documentation/driver-api/ntb.rst | 27 ++ Documentation/filesystems/porting | 2 +- Makefile | 4 +- arch/hexagon/include/asm/pgalloc.h | 34 +- drivers/iommu/amd_iommu.c | 2 +- drivers/ntb/Kconfig | 11 + drivers/ntb/Makefile | 3 + drivers/ntb/{ntb.c => core.c} | 0 drivers/ntb/hw/amd/ntb_hw_amd.c | 10 +- drivers/ntb/hw/intel/ntb_hw_gen3.c | 6 +- drivers/ntb/hw/mscc/ntb_hw_switchtec.c | 82 ++-- drivers/ntb/msi.c | 415 ++++++++++++++++++++ drivers/ntb/ntb_transport.c | 170 +++++++- drivers/ntb/test/Kconfig | 9 + drivers/ntb/test/Makefile | 1 + drivers/ntb/test/ntb_msi_test.c | 433 +++++++++++++++++++++ drivers/ntb/test/ntb_perf.c | 14 +- drivers/pci/msi.c | 54 ++- drivers/pci/switch/switchtec.c | 12 +- fs/cifs/cifsfs.c | 11 +- fs/cifs/cifsfs.h | 2 +- fs/cifs/inode.c | 16 + fs/cifs/smb2file.c | 18 +- fs/cifs/smb2ops.c | 53 ++- fs/cifs/smb2pdu.c | 46 ++- fs/cifs/smb2pdu.h | 4 +- fs/cifs/smb2proto.h | 7 +- include/linux/msi.h | 8 + include/linux/ntb.h | 200 +++++++++- include/linux/pci.h | 9 + tools/testing/selftests/ntb/ntb_test.sh | 54 ++- 42 files changed, 1709 insertions(+), 249 deletions(-) rename drivers/ntb/{ntb.c => core.c} (100%) create mode 100644 drivers/ntb/msi.c create mode 100644 drivers/ntb/test/ntb_msi_test.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (c38899fc26e -> 0166cff09b1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/llvm-project. from c38899fc26e [ARM] Move MVE VPT block tests into the Thumb2 directory. NFC adds d7504a1569d [GISel]: Attach missing range metadata while translating G_LOADs adds 630be14ac64 [SmallBitVector] Fix bug in find_next_unset for small types [...] adds e6cd20ba534 [InstCombine] Update comment I missed in r366649. NFC adds 73d641a23c2 [PowerPC][NFC] Regenerate test using script adds 86fa3270ef6 [X86] SimplifyDemandedVectorEltsForTargetNode - Move SUBV_B [...] adds 3d68adebc57 [PowerPC][NFC] Precomit test case for upcoming patch adds ee5dc7e7ad8 [InstCombine] Add foldAndOfICmps test cases inspired by PR42691. adds 1a1af4392ac [analyzer] Fix -Wunused-function in NDEBUG builds with #ifd [...] adds 6ef23e65818 [utils] Clean up UpdateTestChecks/common.py adds c6c31da8677 [Loop Peeling] Fix the handling of branch weights of peeled [...] adds 3d72a58981e [PowerPC][NFC] Precommit a test case where ppc-mi-peepholes [...] adds 298500ae331 [AMDGPU] Save some work when an atomic op has no uses adds 6522a7df544 [llvm-readobj] - Stop using precompiled objects in file-hea [...] adds 6771a89fa01 [IPRA][ARM] Make use of the "returned" parameter attribute adds 88559637641 [OpenCL] Improve destructor support in C++ for OpenCL adds 3a52e50d737 Add location of SVN staging dir to git-llvm error output adds 0a42fe70a56 [AST] Treat semantic form of InitListExpr as implicit code [...] adds f94668e3360 [lldb][NFC] Tablegenify breakpoint adds af5d3b02fbc [clangd] Log input code of failed highlighting tests. NFC adds 1df6be211e4 [clangd] Set buffer name for main file. NFCI adds 5d4bc1293cc [ARM][test] Improve tests adds 13a364e1cc9 [yaml2obj] - Change how we handle implicit sections. adds bdb92955200 [X86][SSE] Add EltsFromConsecutiveLoads test case identifie [...] new 006cf8c03d7 Added address-space mangling for stack related intrinsics new 8d372008b13 AMDGPU/GlobalISel: Fix tests without asserts new b3d719e1cf0 [X86] EltsFromConsecutiveLoads - support common source load [...] new 1f5712ebb5d Revert the change to the [[nodiscard]] feature test macro value. new 8c5e6fa6575 Updated the signature for some stack related intrinsics (CLANG) new 8876a312a81 [ARM] Fix for MVE VPT block pass new 937d0ee5d8d AMDGPU/GlobalISel: Remove unnecessary code new 0166cff09b1 Reland [ELF] Loose a condition for relocation with a symbol The 8 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/ClangdUnit.cpp | 11 +- .../clangd/unittests/SemanticHighlightingTests.cpp | 3 +- clang/include/clang/AST/DeclCXX.h | 14 +- clang/include/clang/AST/ExprCXX.h | 11 +- clang/include/clang/AST/RecursiveASTVisitor.h | 23 +- clang/include/clang/Basic/Attr.td | 2 +- clang/lib/AST/DeclCXX.cpp | 25 +- clang/lib/AST/ExprCXX.cpp | 7 + clang/lib/CodeGen/CGBuiltin.cpp | 24 +- clang/lib/CodeGen/CGCXXABI.h | 14 +- clang/lib/CodeGen/CGCall.cpp | 2 +- clang/lib/CodeGen/CGClass.cpp | 40 ++- clang/lib/CodeGen/CGDecl.cpp | 21 +- clang/lib/CodeGen/CGException.cpp | 3 +- clang/lib/CodeGen/CGExprCXX.cpp | 31 +- clang/lib/CodeGen/CodeGenFunction.h | 13 +- clang/lib/CodeGen/ItaniumCXXABI.cpp | 32 +- clang/lib/CodeGen/MicrosoftCXXABI.cpp | 30 +- clang/lib/Sema/SemaDeclCXX.cpp | 50 +-- clang/lib/Sema/SemaOverload.cpp | 4 +- clang/lib/StaticAnalyzer/Core/RegionStore.cpp | 6 +- clang/test/CodeGen/builtin-sponentry.c | 2 +- clang/test/CodeGen/exceptions-seh.c | 4 +- clang/test/CodeGen/integer-overflow.c | 8 +- clang/test/CodeGen/ms-intrinsics.c | 2 +- clang/test/CodeGen/ms-setjmp.c | 8 +- clang/test/CodeGenCXX/PR42665.cpp | 61 ++++ .../test/CodeGenOpenCL/builtins-generic-amdgcn.cl | 5 + clang/test/CodeGenOpenCLCXX/addrspace-ctor.cl | 14 - .../test/CodeGenOpenCLCXX/addrspace-with-class.cl | 59 +++ clang/test/Preprocessor/has_attribute.cpp | 2 +- .../InitListExprPreOrder.cpp | 19 +- lld/test/ELF/arm-bl-v6-inrange.s | 2 +- lld/test/ELF/arm-bl-v6.s | 2 +- lld/test/ELF/arm-blx.s | 2 +- lld/test/ELF/arm-branch-rangethunk.s | 4 +- lld/test/ELF/arm-branch.s | 2 +- lld/test/ELF/arm-copy.s | 10 +- lld/test/ELF/arm-execute-only.s | 10 +- lld/test/ELF/arm-exidx-canunwind.s | 16 +- lld/test/ELF/arm-exidx-discard.s | 2 +- lld/test/ELF/arm-exidx-gc.s | 18 +- lld/test/ELF/arm-exidx-order.s | 24 +- lld/test/ELF/arm-exidx-output.s | 2 +- lld/test/ELF/arm-exidx-relocatable.s | 2 +- lld/test/ELF/arm-exidx-shared.s | 2 +- lld/test/ELF/arm-extreme-range-pi-thunk.s | 58 +-- lld/test/ELF/arm-force-pi-thunk.s | 2 +- lld/test/ELF/arm-gnu-ifunc-plt.s | 46 +-- lld/test/ELF/arm-gnu-ifunc.s | 34 +- lld/test/ELF/arm-mov-relocs.s | 24 +- lld/test/ELF/arm-plt-reloc.s | 174 ++++----- .../ELF/{arm-data-relocs.s => arm-reloc-abs32.s} | 0 lld/test/ELF/arm-sbrel32.s | 6 +- lld/test/ELF/arm-static-defines.s | 2 +- lld/test/ELF/arm-target2.s | 8 +- lld/test/ELF/arm-thumb-blx.s | 2 +- lld/test/ELF/arm-thumb-branch-rangethunk.s | 2 +- lld/test/ELF/arm-thumb-branch.s | 2 +- lld/test/ELF/arm-thumb-condbranch-thunk.s | 2 +- lld/test/ELF/arm-thumb-interwork-thunk.s | 6 +- lld/test/ELF/arm-thumb-mix-range-thunk-os.s | 2 +- lld/test/ELF/arm-thumb-narrow-branch-check.s | 2 +- lld/test/ELF/arm-thumb-no-undefined-thunk.s | 2 +- lld/test/ELF/arm-thumb-range-thunk-os.s | 2 +- lld/test/ELF/arm-thumb-thunk-empty-pass.s | 2 +- lld/test/ELF/arm-thumb-thunk-symbols.s | 4 +- lld/test/ELF/arm-thumb-undefined-weak.s | 2 +- lld/test/ELF/arm-thunk-largesection.s | 2 +- lld/test/ELF/arm-thunk-linkerscript-dotexpr.s | 2 +- lld/test/ELF/arm-thunk-linkerscript-large.s | 2 +- lld/test/ELF/arm-thunk-linkerscript-orphan.s | 2 +- lld/test/ELF/arm-thunk-linkerscript-sort.s | 2 +- lld/test/ELF/arm-thunk-linkerscript.s | 2 +- lld/test/ELF/arm-thunk-multipass-plt.s | 2 +- lld/test/ELF/arm-thunk-multipass.s | 2 +- lld/test/ELF/arm-undefined-weak.s | 2 +- .../{pack-dyn-relocs2.s => pack-dyn-relocs-arm2.s} | 2 +- lldb/source/Commands/CommandObjectBreakpoint.cpp | 144 +------- .../Commands/CommandObjectBreakpointCommand.cpp | 14 +- lldb/source/Commands/Options.td | 243 +++++++++++++ lldb/utils/TableGen/LLDBOptionDefEmitter.cpp | 8 +- llvm/include/llvm/ADT/SmallBitVector.h | 2 +- llvm/include/llvm/IR/Intrinsics.td | 6 +- llvm/include/llvm/ObjectYAML/ELFYAML.h | 7 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 5 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 6 +- llvm/lib/CodeGen/SjLjEHPrepare.cpp | 5 +- llvm/lib/MC/ELFObjectWriter.cpp | 5 - llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp | 137 +++---- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 4 - llvm/lib/Target/ARM/ARMFrameLowering.cpp | 6 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 6 + llvm/lib/Target/ARM/ARMMachineFunctionInfo.h | 7 + llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp | 21 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 99 ++++-- llvm/lib/Target/X86/X86WinEHState.cpp | 5 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 2 +- .../Instrumentation/HWAddressSanitizer.cpp | 11 +- .../Instrumentation/SanitizerCoverage.cpp | 6 +- llvm/lib/Transforms/Utils/LoopUnrollPeel.cpp | 103 +++--- llvm/test/Bitcode/compatibility-3.6.ll | 2 +- llvm/test/Bitcode/compatibility-3.7.ll | 2 +- llvm/test/Bitcode/compatibility-3.8.ll | 2 +- llvm/test/Bitcode/compatibility-3.9.ll | 2 +- llvm/test/Bitcode/compatibility-4.0.ll | 2 +- llvm/test/Bitcode/compatibility-5.0.ll | 2 +- llvm/test/Bitcode/compatibility-6.0.ll | 2 +- llvm/test/Bitcode/compatibility.ll | 2 +- .../AArch64/GlobalISel/arm64-irtranslator.ll | 11 +- .../AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir | 174 +-------- .../GlobalISel/inst-select-fmaxnum-ieee.s16.mir | 48 +++ .../GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir | 21 ++ .../AMDGPU/GlobalISel/inst-select-fmaxnum.mir | 174 +-------- .../AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir | 48 +++ .../GlobalISel/inst-select-fmaxnum.v2s16.mir | 22 ++ .../AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir | 174 +-------- .../GlobalISel/inst-select-fminnum-ieee.s16.mir | 48 +++ .../GlobalISel/inst-select-fminnum-ieee.v2s16.mir | 22 ++ .../AMDGPU/GlobalISel/inst-select-fminnum.mir | 174 +-------- .../AMDGPU/GlobalISel/inst-select-fminnum.s16.mir | 48 +++ .../GlobalISel/inst-select-fminnum.v2s16.mir | 22 ++ llvm/test/CodeGen/ARM/ipra-r0-returned.ll | 18 + .../MIR/PowerPC/peephole-miscompile-extswsli.mir | 66 ++++ llvm/test/CodeGen/PowerPC/dform-adjust.ll | 125 +++++++ llvm/test/CodeGen/PowerPC/pre-inc-disable.ll | 189 ++++++++-- llvm/test/CodeGen/Thumb2/mve-vpt-block2.mir | 2 +- llvm/test/CodeGen/Thumb2/mve-vpt-block3.mir | 2 +- llvm/test/CodeGen/Thumb2/mve-vpt-block4.mir | 2 +- llvm/test/CodeGen/Thumb2/mve-vpt-block5.mir | 4 +- .../CodeGen/X86/clear_upper_vector_element_bits.ll | 300 ++++++---------- llvm/test/CodeGen/X86/load-partial.ll | 119 ++++--- .../Instrumentation/HWAddressSanitizer/alloca.ll | 2 +- .../HWAddressSanitizer/kernel-alloca.ll | 2 +- .../SanitizerCoverage/stack-depth.ll | 4 +- llvm/test/MC/ELF/basic-elf-32.s | 4 +- llvm/test/MC/ELF/compression.s | 4 +- llvm/test/MC/ELF/relocation-386.s | 2 +- llvm/test/MC/Mips/elf-relsym.s | 10 +- llvm/test/MC/Mips/xgot.s | 4 +- llvm/test/Transforms/InstCombine/and-or-icmps.ll | 39 ++ .../Transforms/LoopUnroll/peel-loop-pgo-deopt.ll | 16 +- llvm/test/Transforms/LoopUnroll/peel-loop-pgo.ll | 8 +- llvm/test/Verifier/intrinsic-immarg.ll | 2 +- .../tools/llvm-readobj/Inputs/magic.coff-unknown | Bin 450 -> 0 bytes .../llvm-readobj/Inputs/trivial.exe.coff-i386 | Bin 2560 -> 0 bytes .../llvm-readobj/Inputs/trivial.obj.coff-arm64 | Bin 141 -> 0 bytes .../llvm-readobj/Inputs/trivial.obj.elf-lanai | Bin 737 -> 0 bytes .../test/tools/llvm-readobj/coff-file-headers.test | 321 +++++++++++++++++ llvm/test/tools/llvm-readobj/elf-file-headers.test | 129 +++++++ llvm/test/tools/llvm-readobj/file-headers.test | 394 --------------------- .../tools/llvm-readobj/macho-file-headers.test | 160 +++++++++ .../test/tools/llvm-readobj/wasm-file-headers.test | 14 + llvm/tools/yaml2obj/yaml2elf.cpp | 71 ++-- llvm/unittests/ADT/BitVectorTest.cpp | 32 ++ llvm/utils/UpdateTestChecks/common.py | 12 +- llvm/utils/git-svn/git-llvm | 4 +- 157 files changed, 2791 insertions(+), 2176 deletions(-) create mode 100644 clang/test/CodeGenCXX/PR42665.cpp delete mode 100644 clang/test/CodeGenOpenCLCXX/addrspace-ctor.cl create mode 100644 clang/test/CodeGenOpenCLCXX/addrspace-with-class.cl rename lld/test/ELF/{arm-data-relocs.s => arm-reloc-abs32.s} (100%) rename lld/test/ELF/{pack-dyn-relocs2.s => pack-dyn-relocs-arm2.s} (99%) create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.v2s16.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.v2s16.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.v2s16.mir create mode 100644 llvm/test/CodeGen/ARM/ipra-r0-returned.ll create mode 100644 llvm/test/CodeGen/MIR/PowerPC/peephole-miscompile-extswsli.mir create mode 100644 llvm/test/CodeGen/PowerPC/dform-adjust.ll delete mode 100644 llvm/test/tools/llvm-readobj/Inputs/magic.coff-unknown delete mode 100644 llvm/test/tools/llvm-readobj/Inputs/trivial.exe.coff-i386 delete mode 100644 llvm/test/tools/llvm-readobj/Inputs/trivial.obj.coff-arm64 delete mode 100644 llvm/test/tools/llvm-readobj/Inputs/trivial.obj.elf-lanai create mode 100644 llvm/test/tools/llvm-readobj/coff-file-headers.test create mode 100644 llvm/test/tools/llvm-readobj/elf-file-headers.test delete mode 100644 llvm/test/tools/llvm-readobj/file-headers.test create mode 100644 llvm/test/tools/llvm-readobj/macho-file-headers.test create mode 100644 llvm/test/tools/llvm-readobj/wasm-file-headers.test -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (a072b6d9 -> f25ffa58)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards a072b6d9 2: update: llvm-linux: 18677 new f25ffa58 2: update: llvm-linux: 18680 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a072b6d9) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 222 +- 02-build_llvm/console.log | 11964 +++++++++++++++---------------- 03-build_linux/console.log | 2272 +++--- 05-check_regression/console.log | 22 +- 06-update_baseline/console.log | 70 +- console.log | 14550 +++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- results | 2 +- 8 files changed, 14557 insertions(+), 14557 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-allmodconfig updated (f1a3b43cc1f5 -> 5f9e832c1370)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-allmodconfig in repository toolchain/ci/linux. from f1a3b43cc1f5 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/l [...] adds c56b4ef1cf0c ntb: intel: Make intel_ntb3_peer_db_addr static adds 8b2f033631c2 NTB: ntb_perf: Increased the number of message retries to 1000 adds b1ee5998a5d2 NTB: ntb_perf: Disable NTB link after clearing peer XLAT r [...] adds 12c023d7c32a NTB: ntb_perf: Clear stale values in doorbell and command [...] adds a5c3666f1c32 NTB: ntb_hw_amd: set peer limit register adds 51cb8dbf1324 NTB: ntb_transport: Ensure qp->tx_mw_dma_addr is initaliazed adds ff148d8ac53e ntb_hw_switchtec: potential shift wrapping bug in switchte [...] adds 1e590dec3ed6 NTB: amd: Silence shift wrapping warning in amd_ntb_db_vec [...] adds 18c8c0954d15 NTB: correct ntb_dev_ops and ntb_dev comment typos adds 28e339f100e3 ntb_hw_switchtec: Remove redundant steps of switchtec_ntb_ [...] adds f0f43e766bdb ntb_hw_switchtec: Skip unnecessary re-setup of shared memo [...] adds a944ccc3b0ae ntb_hw_switchtec: Fix setup MW with failure bug adds d7cc609fb679 PCI/MSI: Support allocating virtual MSI interrupts adds fcdf8e95fa3b PCI/switchtec: Add module parameter to request more interrupts adds 246a42c51bc5 NTB: Introduce helper functions to calculate logical port number adds 5f1b1f065c79 NTB: Introduce functions to calculate multi-port resource index adds d217e07b32a6 NTB: Rename ntb.c to support multiple source files in the module adds 26b3a37b9284 NTB: Introduce MSI library adds a6bed7a54165 NTB: Introduce NTB MSI Test Client adds 76ab785e7396 NTB: Add ntb_msi_test support to ntb_test adds 2b0569b3b7e6 NTB: Add MSI interrupt support to ntb_transport adds d9c53aa440b3 NTB: Describe the ntb_msi_test client in the documentation. adds bec5545edef6 Merge tag 'ntb-5.3' of git://github.com/jonmason/ntb adds 618381f09cc1 hexagon: switch to generic version of pte allocation adds 8cf66504210d iommu/amd: fix a crash in iova_magazine_free_pfns adds 7e5a70ad88b1 CIFS: fix deadlock in cached root handling adds bf3c90ee1efe cifs: copy_file_range needs to strip setuid bits and updat [...] adds 89a5bfa350fa smb3: optimize open to not send query file internal info adds aa081859b10c cifs: flush before set-info if we have writeable handles adds 2a957ace44d4 cifs: update internal module number adds 91962d0f79cb Merge tag '5.3-smb3-fixes' of git://git.samba.org/sfrench/ [...] adds 1b03bc5c1163 typo fix: it's d_make_root, not d_make_inode... adds d6788eb7d0dc Merge branch 'work.misc' of git://git.kernel.org/pub/scm/l [...] adds 15ffef1ae69e dt-bindings: Ensure child nodes are of type 'object' adds 7d9ef7f37d1f dt-bindings: riscv: Limit cpus schema to only check RiscV [...] adds ad21a4ce040c dt-bindings: pinctrl: aspeed: Fix 'compatible' schema errors adds fcbe7e3cf86d dt-bindings: pinctrl: aspeed: Fix AST2500 example errors adds fbbf2b6e9b74 dt-bindings: iio: avia-hx711: Fix avdd-supply typo in example adds 20051f5fdf67 dt-bindings: iio: ad7124: Fix dtc warnings in example adds e2297f7c3ab3 dt-bindings: pinctrl: stm32: Fix missing 'clocks' property [...] adds c7bf0a0f3703 Merge tag 'devicetree-fixes-for-5.3' of git://git.kernel.o [...] adds 5f9e832c1370 Linus 5.3-rc1 No new revisions were added by this update. Summary of changes: .../bindings/bus/allwinner,sun8i-a23-rsb.yaml | 1 + .../devicetree/bindings/iio/adc/adi,ad7124.yaml | 71 ++-- .../devicetree/bindings/iio/adc/avia-hx711.yaml | 2 +- .../bindings/mtd/allwinner,sun4i-a10-nand.yaml | 1 + .../devicetree/bindings/mtd/nand-controller.yaml | 1 + .../bindings/pinctrl/aspeed,ast2400-pinctrl.yaml | 4 +- .../bindings/pinctrl/aspeed,ast2500-pinctrl.yaml | 9 +- .../bindings/pinctrl/st,stm32-pinctrl.yaml | 7 + Documentation/devicetree/bindings/riscv/cpus.yaml | 143 +++---- .../bindings/spi/allwinner,sun4i-a10-spi.yaml | 1 + .../bindings/spi/allwinner,sun6i-a31-spi.yaml | 1 + Documentation/driver-api/ntb.rst | 27 ++ Documentation/filesystems/porting | 2 +- Makefile | 4 +- arch/hexagon/include/asm/pgalloc.h | 34 +- drivers/iommu/amd_iommu.c | 2 +- drivers/ntb/Kconfig | 11 + drivers/ntb/Makefile | 3 + drivers/ntb/{ntb.c => core.c} | 0 drivers/ntb/hw/amd/ntb_hw_amd.c | 10 +- drivers/ntb/hw/intel/ntb_hw_gen3.c | 6 +- drivers/ntb/hw/mscc/ntb_hw_switchtec.c | 82 ++-- drivers/ntb/msi.c | 415 ++++++++++++++++++++ drivers/ntb/ntb_transport.c | 170 +++++++- drivers/ntb/test/Kconfig | 9 + drivers/ntb/test/Makefile | 1 + drivers/ntb/test/ntb_msi_test.c | 433 +++++++++++++++++++++ drivers/ntb/test/ntb_perf.c | 14 +- drivers/pci/msi.c | 54 ++- drivers/pci/switch/switchtec.c | 12 +- fs/cifs/cifsfs.c | 11 +- fs/cifs/cifsfs.h | 2 +- fs/cifs/inode.c | 16 + fs/cifs/smb2file.c | 18 +- fs/cifs/smb2ops.c | 53 ++- fs/cifs/smb2pdu.c | 46 ++- fs/cifs/smb2pdu.h | 4 +- fs/cifs/smb2proto.h | 7 +- include/linux/msi.h | 8 + include/linux/ntb.h | 200 +++++++++- include/linux/pci.h | 9 + tools/testing/selftests/ntb/ntb_test.sh | 54 ++- 42 files changed, 1709 insertions(+), 249 deletions(-) rename drivers/ntb/{ntb.c => core.c} (100%) create mode 100644 drivers/ntb/msi.c create mode 100644 drivers/ntb/test/ntb_msi_test.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-allmodconfig updated (d219c5e3be1 -> bd81e681a7d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-allmodconfig in repository toolchain/ci/gcc. from d219c5e3be1 Fix -Wreturn-type for static naked functions in C adds 95f52ddbae2 Daily bump. adds bd81e681a7d Backport r273660 No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 10 ++++++++++ gcc/DATESTAMP | 2 +- gcc/opts-common.c | 20 +++++++++++++++++++- gcc/opts-global.c | 6 +++++- gcc/testsuite/ChangeLog | 8 ++++++++ 5 files changed, 43 insertions(+), 3 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-allmodconfig updated (e0f4d5e819 -> fa3fc9981c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-allmodconfig in repository toolchain/ci/binutils-gdb. from e0f4d5e819 Automatic date update in version.in adds fa3fc9981c Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-allmodconfig updated (dcd159cf -> 8f75b4d5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards dcd159cf 0: update: binutils-gcc-linux: all new 8f75b4d5 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (dcd159cf) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-prepare_abe/console.log | 438 +- 03-build_abe-binutils/console.log | 10738 +++++++-------- 04-build_abe-stage1/console.log | 13903 ++++++++++--------- 05-build_linux/console.log | 990 +- 06-boot_linux/console.log | 2 +- console.log | 26201 ++++++++++++++++++------------------ jenkins/manifest.sh | 16 +- results | 2 +- 9 files changed, 26207 insertions(+), 26213 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

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Tcwg-commits July 2019