Tcwg-commits July 2019

tcwg-commits@lists.linaro.org

6 participants
14175 discussions

[llvm] branch master updated (0eb09fcac93 -> 0ca3c92d559)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 0eb09fcac93 [NFC][InstCombine] Tests for x - ~(y) -> x + y + 1 fold ( [...] new 6a2f57ae8bb [benchmark] Disable CMake get_git_version new 0ca3c92d559 [SelectionDAG] Do minnum->minimum at legalization time inst [...] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 22 ++++++---------------- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 11 +++++++++++ test/CodeGen/WebAssembly/f32.ll | 18 ++++++++++++++++++ test/CodeGen/WebAssembly/simd-arith.ll | 22 ++++++++++++++++++++++ utils/benchmark/CMakeLists.txt | 7 +++++-- utils/benchmark/README.LLVM | 2 ++ 6 files changed, 64 insertions(+), 18 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig updated (2d2cb77e45d -> 60300c9c7d6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig in repository toolchain/ci/llvm-project. from 2d2cb77e45d [ADT] Implement llvm::bsearch() with std::partition_point() adds 78ee2fbf984 Cleanup: llvm::bsearch -> llvm::partition_point after r364719 adds 706b48251f6 [InstCombine] canonicalize fcmp+select to minnum/maxnum intrinsics adds 135cf982e8e Revert "[GDBRemote] Remove code that flushes GDB remote packets" adds bb0b44deaab Clean up MSVC visualization of LLVM pointer types adds fb133b0aabe Various tweaks to MSVC natvis visualizers adds d1728f89878 [X86] Add MOVHPDrm/MOVLPDrm patterns that use VZEXT_LOAD. adds fc233c9108d [X86] Add some additional load folding tests to vec_int_to_ [...] adds 4ca81a9b994 [X86] Add a DAG combine to replace vector loads feeding a v [...] adds 29fff0797b2 [X86] Improve the type checking fast-isel handling of vecto [...] adds fcda45a9eb8 [X86] Add more load folding tests for vcvt(t)ps2(u)qq showi [...] adds b739b91cd3a [clangd] Make FixIt message be consistent with the clang-ti [...] adds 0384a780549 [libcxx] [test] Add void cast to result of compare_exchange [...] adds 98722691b0b [ARM] WLS/LE Code Generation adds d4097b4a93a [SimpleLoopUnswitch] Implement handling of prof branch_weig [...] adds 9d34f4569b4 [clangd] Show better message when we rename macros. adds d2b6665e339 [DebugInfo] Avoid adding too much indirection to pointer-va [...] adds 0f82f64c832 [NFC][InstCombine] Copy test for omit urem when possible fr [...] adds f55818e3a72 [InstCombine] Omit 'urem' where possible adds 4f878fe3a7d [NFC][InstCombine] Tests for x - ~(y) -> x + y + 1 fold ( [...] new 9cca81344c8 [clangd] Make PreambleStatusCache handle filenames more carefully new 60300c9c7d6 [clangd] Fix unused var from r364735 The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/Diagnostics.cpp | 2 + clang-tools-extra/clangd/FS.cpp | 19 +- clang-tools-extra/clangd/SourceCode.cpp | 27 + clang-tools-extra/clangd/SourceCode.h | 8 + clang-tools-extra/clangd/XRefs.cpp | 76 +- clang-tools-extra/clangd/index/Symbol.cpp | 4 +- clang-tools-extra/clangd/refactor/Rename.cpp | 43 +- .../clangd/unittests/DiagnosticsTests.cpp | 22 +- clang-tools-extra/clangd/unittests/FSTests.cpp | 12 +- clang-tools-extra/clangd/unittests/RenameTests.cpp | 7 + .../clangd/unittests/SourceCodeTests.cpp | 17 + clang/lib/Tooling/Syntax/Tokens.cpp | 8 +- clang/utils/ClangVisualizers/clang.natvis | 54 +- .../atomics.general/replace_failure_order.pass.cpp | 8 +- lld/ELF/DWARF.cpp | 2 +- lld/ELF/InputSection.cpp | 4 +- .../gdb-remote/GDBRemoteCommunicationClient.cpp | 7 + llvm/include/llvm/ADT/STLExtras.h | 9 +- llvm/include/llvm/DebugInfo/DWARF/DWARFUnit.h | 7 +- llvm/include/llvm/IR/DebugInfoMetadata.h | 4 + llvm/lib/Analysis/ProfileSummaryInfo.cpp | 4 +- llvm/lib/CodeGen/ExecutionDomainFix.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp | 9 +- llvm/lib/CodeGen/HardwareLoops.cpp | 1 + llvm/lib/CodeGen/PrologEpilogInserter.cpp | 13 +- llvm/lib/DebugInfo/DWARF/DWARFDebugAranges.cpp | 2 +- llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp | 4 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp | 8 +- llvm/lib/DebugInfo/DWARF/DWARFUnitIndex.cpp | 4 +- llvm/lib/IR/DataLayout.cpp | 4 +- llvm/lib/IR/DebugInfoMetadata.cpp | 21 + llvm/lib/IR/Function.cpp | 5 +- llvm/lib/ProfileData/InstrProf.cpp | 11 +- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 10 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 42 ++ llvm/lib/Target/ARM/ARMISelLowering.h | 2 + llvm/lib/Target/ARM/ARMInstrInfo.td | 8 + llvm/lib/Target/ARM/ARMInstrThumb2.td | 10 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 116 ++- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 2 + llvm/lib/Target/X86/X86FastISel.cpp | 21 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 28 + llvm/lib/Target/X86/X86InstrAVX512.td | 22 + llvm/lib/Target/X86/X86InstrFMA3Info.cpp | 4 +- llvm/lib/Target/X86/X86InstrSSE.td | 12 + llvm/lib/TextAPI/MachO/InterfaceFile.cpp | 16 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 24 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 13 + llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp | 4 +- llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp | 56 +- .../Thumb2/LowOverheadLoops}/cond-mov.mir | 0 .../CodeGen/Thumb2/LowOverheadLoops/loop-guards.ll | 213 ++++++ .../Thumb2/LowOverheadLoops}/massive.mir | 0 .../LowOverheadLoops}/multiblock-massive.mir | 0 .../Thumb2/LowOverheadLoops}/revert-after-call.mir | 0 .../LowOverheadLoops}/revert-after-spill.mir | 0 .../Thumb2/LowOverheadLoops/revert-while.mir | 130 ++++ .../Thumb2/LowOverheadLoops}/size-limit.mir | 0 .../Thumb2/LowOverheadLoops}/switch.mir | 0 .../test/CodeGen/Thumb2/LowOverheadLoops/while.mir | 131 ++++ llvm/test/CodeGen/X86/avx512dqvl-intrinsics.ll | 747 +++++++++++++++++++ .../CodeGen/X86/merge-consecutive-loads-128.ll | 3 +- llvm/test/CodeGen/X86/pr42452.ll | 37 + llvm/test/CodeGen/X86/vec_fp_to_int-widen.ll | 152 ++++ llvm/test/CodeGen/X86/vec_fp_to_int.ll | 152 ++++ llvm/test/CodeGen/X86/vec_int_to_fp-widen.ll | 794 +++++++++++++++++---- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 472 ++++++++---- .../MIR/X86/prolog-epilog-indirection.mir | 130 ++++ llvm/test/Transforms/HardwareLoops/ARM/do-rem.ll | 32 +- .../Transforms/HardwareLoops/ARM/fp-emulation.ll | 23 +- .../test/Transforms/HardwareLoops/ARM/simple-do.ll | 42 +- .../test/Transforms/HardwareLoops/ARM/structure.ll | 95 ++- .../InstCombine/fold-sub-of-not-to-inc-of-add.ll | 94 +++ llvm/test/Transforms/InstCombine/minmax-fp.ll | 20 +- ...ower-of-two-or-zero-when-comparing-with-zero.ll | 166 +++++ .../SimpleLoopUnswitch/basictest-profmd.ll | 34 + .../SimpleLoopUnswitch/trivial-unswitch-profmd.ll | 228 ++++++ llvm/tools/dsymutil/DwarfLinker.cpp | 4 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 35 +- llvm/unittests/ADT/STLExtrasTest.cpp | 9 +- llvm/utils/LLVMVisualizers/llvm.natvis | 19 +- 81 files changed, 3945 insertions(+), 637 deletions(-) rename llvm/test/{Transforms/HardwareLoops/ARM => CodeGen/Thumb2/LowOverheadLoops} [...] create mode 100644 llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-guards.ll rename llvm/test/{Transforms/HardwareLoops/ARM => CodeGen/Thumb2/LowOverheadLoops} [...] rename llvm/test/{Transforms/HardwareLoops/ARM => CodeGen/Thumb2/LowOverheadLoops} [...] rename llvm/test/{Transforms/HardwareLoops/ARM => CodeGen/Thumb2/LowOverheadLoops} [...] rename llvm/test/{Transforms/HardwareLoops/ARM => CodeGen/Thumb2/LowOverheadLoops} [...] create mode 100644 llvm/test/CodeGen/Thumb2/LowOverheadLoops/revert-while.mir rename llvm/test/{Transforms/HardwareLoops/ARM => CodeGen/Thumb2/LowOverheadLoops} [...] rename llvm/test/{Transforms/HardwareLoops/ARM => CodeGen/Thumb2/LowOverheadLoops} [...] create mode 100644 llvm/test/CodeGen/Thumb2/LowOverheadLoops/while.mir create mode 100644 llvm/test/CodeGen/X86/pr42452.ll create mode 100644 llvm/test/DebugInfo/MIR/X86/prolog-epilog-indirection.mir create mode 100644 llvm/test/Transforms/InstCombine/fold-sub-of-not-to-inc-of-add.ll create mode 100644 llvm/test/Transforms/InstCombine/omit-urem-of-power-of-two-or-z [...] create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/basictest-profmd.ll create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-profmd.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig updated (d45bcdd57 -> 48e1807d8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards d45bcdd57 0: update: llvm-linux: boot new 48e1807d8 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (d45bcdd57) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 11980 +++++++++--------- 03-build_linux/console.log | 13574 ++++++++++---------- 05-check_regression/console.log | 6 +- 06-update_baseline/console.log | 25 - console.log | 25780 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 7 files changed, 25784 insertions(+), 25809 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allmodconfig updated (77e49d6c05a -> f278a92ec6a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allmodconfig in repository toolchain/ci/gcc. from 77e49d6c05a Daily bump. adds 1d79fa1803d [PATCH, Ada] Push -shared-libgcc where needed. adds b967edfe7e2 * config/i386/i386.md (mmx_isa): Rename x64, x64_noavx and [...] adds f45da3c5d95 * config/i386/sse.md (ssse3_abs<mode>2): Rename from abs<m [...] adds 6b18cddd747 Daily bump. adds 5b355ddd812 gcc/ adds 87ee9f7a511 2019-07-01 Richard Biener <rguenther(a)suse.de> adds ee5b48dc12d 2019-07-01 Richard Biener <rguenther(a)suse.de> adds 4606134eb0d 2019-07-01 Dominique d'Humieres <dominiq(a)gcc.gnu.org> adds 01ae1ec0045 gdbhooks.py: rename parameters to match usage adds 513fad55c57 Fix 2 clang warnings. adds 3d2484d6eea Use alternative_mask for add_insn_allocno_copies adds 8c24981087b Simplify ira_setup_alts adds 460bce5dc61 Make ira_get_dup_out_num handle more cases adds 341b1932c53 Allow earlyclobbers in ira_get_dup_out_num adds f278a92ec6a Use ira_setup_alts for conflict detection No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 107 +++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 8 ++ gcc/ada/gnatlink.adb | 30 ++++- gcc/config/i386/i386-builtin.def | 6 +- gcc/config/i386/i386.md | 10 +- gcc/config/i386/mmx.md | 123 +++++++++++-------- gcc/config/i386/sse.md | 35 ++++-- gcc/doc/sourcebuild.texi | 3 + gcc/edit-context.c | 4 +- gcc/gdbhooks.py | 8 +- gcc/ggc-page.c | 6 +- gcc/ira-conflicts.c | 4 +- gcc/ira-int.h | 4 +- gcc/ira-lives.c | 9 +- gcc/ira.c | 130 ++++++++++----------- gcc/passes.def | 7 +- gcc/testsuite/ChangeLog | 16 +++ gcc/testsuite/g++.dg/cpp0x/gen-attrs-67.C | 2 +- gcc/testsuite/gcc.dg/tree-ssa/pr77445-2.c | 8 +- .../i386/avx512vp2intersect-2intersect-1b.c | 1 + .../i386/avx512vp2intersect-2intersectvl-1b.c | 1 + gcc/testsuite/lib/target-supports.exp | 14 +++ gcc/tree-ssa-sccvn.c | 68 +++++------ 24 files changed, 409 insertions(+), 197 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allmodconfig updated (7f1c798dcc -> 9d3bf266fd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allmodconfig in repository toolchain/ci/binutils-gdb. from 7f1c798dcc Automatic date update in version.in adds c444fad6da Automatic date update in version.in adds 219920a7c4 x86: drop a few dead macros adds 36cc073ef4 x86: remove ModRM.mod decoding layer from AVX512F VMOVS{S,D} adds 9c33702be7 x86: warn about insns exceeding the 15-byte limit adds d583596cc9 x86: use encoding_length() also elsewhere adds e3bba3fc75 x86: drop bogus Disp8MemShift attributes adds cd546e7bd2 x86: add missing pseudo ops for VPCLMULQDQ ISA extension adds a0a1771e89 x86: optimize EVEX packed integer logical instructions adds a80195f122 x86: StaticRounding implies SAE adds 79dec6b7ba x86-64: optimize certain commutative VEX-encoded insns adds 5641ec015a x86: optimize AND/OR with twice the same register adds c3949f432f x86: limit ImmExt abuse adds 9d3bf266fd x86: drop Vec_Imm4 No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gas/ChangeLog | 120 + gas/config/tc-i386.c | 232 +- gas/doc/c-i386.texi | 20 +- gas/testsuite/gas/i386/avx512f_vpclmulqdq-intel.d | 4 + gas/testsuite/gas/i386/avx512f_vpclmulqdq.d | 4 + gas/testsuite/gas/i386/avx512f_vpclmulqdq.s | 5 + gas/testsuite/gas/i386/avx512vl_vpclmulqdq-intel.d | 8 + gas/testsuite/gas/i386/avx512vl_vpclmulqdq.d | 8 + gas/testsuite/gas/i386/avx512vl_vpclmulqdq.s | 10 + gas/testsuite/gas/i386/i386.exp | 5 + gas/testsuite/gas/i386/ilp32/x86-64-sse2avx.d | 1226 +- gas/testsuite/gas/i386/optimize-1.d | 48 + gas/testsuite/gas/i386/optimize-1.s | 54 + gas/testsuite/gas/i386/optimize-1a.d | 48 + gas/testsuite/gas/i386/optimize-2.d | 70 + gas/testsuite/gas/i386/optimize-2.s | 80 + .../gas/i386/{optimize-2.d => optimize-2b.d} | 83 +- gas/testsuite/gas/i386/optimize-3.d | 8 + gas/testsuite/gas/i386/optimize-3.s | 9 + gas/testsuite/gas/i386/optimize-4.d | 48 + gas/testsuite/gas/i386/optimize-5.d | 56 + gas/testsuite/gas/i386/optimize-5.s | 9 + gas/testsuite/gas/i386/oversized16.l | 41 + gas/testsuite/gas/i386/oversized16.s | 11 + gas/testsuite/gas/i386/oversized64.l | 40 + gas/testsuite/gas/i386/oversized64.s | 10 + gas/testsuite/gas/i386/vpclmulqdq-intel.d | 4 + gas/testsuite/gas/i386/vpclmulqdq.d | 4 + gas/testsuite/gas/i386/vpclmulqdq.s | 5 + gas/testsuite/gas/i386/x86-64-avx-swap-2.d | 380 + gas/testsuite/gas/i386/x86-64-avx-swap-2.s | 393 + .../gas/i386/x86-64-avx512f_vpclmulqdq-intel.d | 4 + gas/testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.d | 4 + gas/testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.s | 5 + .../gas/i386/x86-64-avx512vl_vpclmulqdq-intel.d | 8 + .../gas/i386/x86-64-avx512vl_vpclmulqdq.d | 8 + .../gas/i386/x86-64-avx512vl_vpclmulqdq.s | 10 + gas/testsuite/gas/i386/x86-64-optimize-2.d | 48 + gas/testsuite/gas/i386/x86-64-optimize-2.s | 54 + gas/testsuite/gas/i386/x86-64-optimize-2a.d | 48 + gas/testsuite/gas/i386/x86-64-optimize-2b.d | 48 + gas/testsuite/gas/i386/x86-64-optimize-3.d | 80 + gas/testsuite/gas/i386/x86-64-optimize-3.s | 91 + .../{x86-64-optimize-3.d => x86-64-optimize-3b.d} | 109 +- gas/testsuite/gas/i386/x86-64-optimize-4.d | 8 + gas/testsuite/gas/i386/x86-64-optimize-4.s | 9 + gas/testsuite/gas/i386/x86-64-optimize-5.d | 48 + gas/testsuite/gas/i386/x86-64-optimize-6.d | 56 + gas/testsuite/gas/i386/x86-64-optimize-6.s | 9 + gas/testsuite/gas/i386/x86-64-sse2avx.d | 93 + gas/testsuite/gas/i386/x86-64-sse2avx.s | 93 + gas/testsuite/gas/i386/x86-64-vpclmulqdq-intel.d | 16 +- gas/testsuite/gas/i386/x86-64-vpclmulqdq.d | 16 +- gas/testsuite/gas/i386/x86-64-vpclmulqdq.s | 17 +- opcodes/ChangeLog | 101 + opcodes/i386-dis-evex-mod.h | 20 - opcodes/i386-dis-evex-prefix.h | 10 +- opcodes/i386-dis-evex-w.h | 34 +- opcodes/i386-dis.c | 22 +- opcodes/i386-gen.c | 3 - opcodes/i386-init.h | 105 +- opcodes/i386-opc.h | 4 - opcodes/i386-opc.tbl | 457 +- opcodes/i386-tbl.h | 20462 ++++++++++--------- 65 files changed, 13280 insertions(+), 11865 deletions(-) copy gas/testsuite/gas/i386/{optimize-2.d => optimize-2b.d} (56%) create mode 100644 gas/testsuite/gas/i386/oversized16.l create mode 100644 gas/testsuite/gas/i386/oversized16.s create mode 100644 gas/testsuite/gas/i386/oversized64.l create mode 100644 gas/testsuite/gas/i386/oversized64.s create mode 100644 gas/testsuite/gas/i386/x86-64-avx-swap-2.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx-swap-2.s copy gas/testsuite/gas/i386/{x86-64-optimize-3.d => x86-64-optimize-3b.d} (55%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allmodconfig updated (a5f81768c -> bc7d4ed65)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allmodconfig in repository toolchain/ci/base-artifacts. discards a5f81768c 0: update: binutils-gcc-linux: all new bc7d4ed65 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a5f81768c) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-prepare_abe/console.log | 94 +- 03-build_abe-binutils/console.log | 11487 ++++---- 04-build_abe-stage1/console.log | 15247 +++++------ 05-build_linux/console.log | 24550 ++++++++--------- 06-boot_linux/console.log | 2 +- console.log | 51569 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 8 files changed, 51592 insertions(+), 51499 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk/gnu-release-aarch64-spec2k6-Os_LTO updated (061fc7b6823 -> 824376db1f2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-release-aarch64-spec2k6-Os_LTO in repository toolchain/ci/gcc. from 061fc7b6823 Daily bump. adds a905c9f2922 Daily bump. adds 7d79d463358 PR tree-optimization/90949 * tree-ssa-copy.c (fini_copy_p [...] adds a9de850ca20 Daily bump. adds 15d7f426252 * gcc-interface/decl.c (set_nonaliased_component_on_array_ [...] adds f71e317afb9 * gcc-interface/trans.c (mark_visited_r): Set TYPE_SIZES_G [...] adds 61f34a55a51 * gcc-interface/decl.c (gnat_to_gnu_entity): Beep up comme [...] adds 01056071c28 Daily bump. adds 824376db1f2 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 9 +++++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 25 ++++++++++++- gcc/ada/gcc-interface/decl.c | 54 +++++++++++++++++++-------- gcc/ada/gcc-interface/trans.c | 3 +- gcc/testsuite/ChangeLog | 15 ++++++++ gcc/testsuite/gcc.c-torture/execute/pr90949.c | 42 +++++++++++++++++++++ gcc/testsuite/gnat.dg/specs/array5.ads | 9 +++++ gcc/testsuite/gnat.dg/specs/array5_pkg1.ads | 14 +++++++ gcc/testsuite/gnat.dg/specs/array5_pkg2-g.ads | 13 +++++++ gcc/testsuite/gnat.dg/specs/array5_pkg2.ads | 5 +++ gcc/tree-ssa-copy.c | 11 +++--- gcc/tree-ssanames.c | 7 +++- 13 files changed, 183 insertions(+), 26 deletions(-) create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr90949.c create mode 100644 gcc/testsuite/gnat.dg/specs/array5.ads create mode 100644 gcc/testsuite/gnat.dg/specs/array5_pkg1.ads create mode 100644 gcc/testsuite/gnat.dg/specs/array5_pkg2-g.ads create mode 100644 gcc/testsuite/gnat.dg/specs/array5_pkg2.ads -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk/gnu-release-aarch64-spec2k6-Os_LTO updated (0c5de26f02 -> 67fcb693d7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-release-aarch64-spec2k6-Os_LTO in repository toolchain/ci/binutils-gdb. from 0c5de26f02 Automatic date update in version.in adds 30e1820d02 Automatic date update in version.in adds 9a7543e1c7 Automatic date update in version.in adds e07bdcfb0e Automatic date update in version.in adds 67fcb693d7 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk/gnu-release-aarch64-spec2k6-Os_LTO updated (8cdf62fcf -> 57d69e932)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-release-aarch64-spec2k6-Os_LTO in repository toolchain/ci/base-artifacts. discards 8cdf62fcf 0: init: binutils-gcc-glibc: 0 new 57d69e932 0: update: binutils-gcc-glibc: 0 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (8cdf62fcf) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk/gnu-release-aarch64- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 65 +- 02-prepare_abe/console.log | 208 +- 03-build_abe-binutils/console.log | 10048 ++-- 04-build_abe-stage1/console.log | 13884 +++-- 05-build_abe-linux/console.log | 288 +- 06-build_abe-glibc/console.log | 38856 ++++++------ 07-build_abe-stage2/console.log | 40547 ++++++------- 08-benchmark/benchmark-start.log | 2 +- 08-benchmark/benchmark.log | 15 +- 08-benchmark/console.log | 166 +- 09-check_regression/console.log | 3054 +- 10-update_baseline/console.log | 3060 +- console.log | 110418 ++++++++++++++++++----------------- jenkins/manifest.sh | 18 +- results.csv | 144 + results_id | 2 +- 16 files changed, 116505 insertions(+), 104270 deletions(-) create mode 100644 results.csv -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig updated (2d2cb77e45d -> f55818e3a72)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig in repository toolchain/ci/llvm-project. from 2d2cb77e45d [ADT] Implement llvm::bsearch() with std::partition_point() adds 78ee2fbf984 Cleanup: llvm::bsearch -> llvm::partition_point after r364719 adds 706b48251f6 [InstCombine] canonicalize fcmp+select to minnum/maxnum intrinsics adds 135cf982e8e Revert "[GDBRemote] Remove code that flushes GDB remote packets" adds bb0b44deaab Clean up MSVC visualization of LLVM pointer types adds fb133b0aabe Various tweaks to MSVC natvis visualizers adds d1728f89878 [X86] Add MOVHPDrm/MOVLPDrm patterns that use VZEXT_LOAD. adds fc233c9108d [X86] Add some additional load folding tests to vec_int_to_ [...] adds 4ca81a9b994 [X86] Add a DAG combine to replace vector loads feeding a v [...] adds 29fff0797b2 [X86] Improve the type checking fast-isel handling of vecto [...] adds fcda45a9eb8 [X86] Add more load folding tests for vcvt(t)ps2(u)qq showi [...] adds b739b91cd3a [clangd] Make FixIt message be consistent with the clang-ti [...] adds 0384a780549 [libcxx] [test] Add void cast to result of compare_exchange [...] adds 98722691b0b [ARM] WLS/LE Code Generation adds d4097b4a93a [SimpleLoopUnswitch] Implement handling of prof branch_weig [...] adds 9d34f4569b4 [clangd] Show better message when we rename macros. adds d2b6665e339 [DebugInfo] Avoid adding too much indirection to pointer-va [...] adds 0f82f64c832 [NFC][InstCombine] Copy test for omit urem when possible fr [...] adds f55818e3a72 [InstCombine] Omit 'urem' where possible No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/Diagnostics.cpp | 2 + clang-tools-extra/clangd/SourceCode.cpp | 27 + clang-tools-extra/clangd/SourceCode.h | 8 + clang-tools-extra/clangd/XRefs.cpp | 67 +- clang-tools-extra/clangd/index/Symbol.cpp | 4 +- clang-tools-extra/clangd/refactor/Rename.cpp | 43 +- .../clangd/unittests/DiagnosticsTests.cpp | 22 +- clang-tools-extra/clangd/unittests/RenameTests.cpp | 7 + .../clangd/unittests/SourceCodeTests.cpp | 17 + clang/lib/Tooling/Syntax/Tokens.cpp | 8 +- clang/utils/ClangVisualizers/clang.natvis | 54 +- .../atomics.general/replace_failure_order.pass.cpp | 8 +- lld/ELF/DWARF.cpp | 2 +- lld/ELF/InputSection.cpp | 4 +- .../gdb-remote/GDBRemoteCommunicationClient.cpp | 7 + llvm/include/llvm/ADT/STLExtras.h | 9 +- llvm/include/llvm/DebugInfo/DWARF/DWARFUnit.h | 7 +- llvm/include/llvm/IR/DebugInfoMetadata.h | 4 + llvm/lib/Analysis/ProfileSummaryInfo.cpp | 4 +- llvm/lib/CodeGen/ExecutionDomainFix.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp | 9 +- llvm/lib/CodeGen/HardwareLoops.cpp | 1 + llvm/lib/CodeGen/PrologEpilogInserter.cpp | 13 +- llvm/lib/DebugInfo/DWARF/DWARFDebugAranges.cpp | 2 +- llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp | 4 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp | 8 +- llvm/lib/DebugInfo/DWARF/DWARFUnitIndex.cpp | 4 +- llvm/lib/IR/DataLayout.cpp | 4 +- llvm/lib/IR/DebugInfoMetadata.cpp | 21 + llvm/lib/IR/Function.cpp | 5 +- llvm/lib/ProfileData/InstrProf.cpp | 11 +- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 10 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 42 ++ llvm/lib/Target/ARM/ARMISelLowering.h | 2 + llvm/lib/Target/ARM/ARMInstrInfo.td | 8 + llvm/lib/Target/ARM/ARMInstrThumb2.td | 10 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 116 ++- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 2 + llvm/lib/Target/X86/X86FastISel.cpp | 21 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 28 + llvm/lib/Target/X86/X86InstrAVX512.td | 22 + llvm/lib/Target/X86/X86InstrFMA3Info.cpp | 4 +- llvm/lib/Target/X86/X86InstrSSE.td | 12 + llvm/lib/TextAPI/MachO/InterfaceFile.cpp | 16 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 24 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 13 + llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp | 4 +- llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp | 56 +- .../Thumb2/LowOverheadLoops}/cond-mov.mir | 0 .../CodeGen/Thumb2/LowOverheadLoops/loop-guards.ll | 213 ++++++ .../Thumb2/LowOverheadLoops}/massive.mir | 0 .../LowOverheadLoops}/multiblock-massive.mir | 0 .../Thumb2/LowOverheadLoops}/revert-after-call.mir | 0 .../LowOverheadLoops}/revert-after-spill.mir | 0 .../Thumb2/LowOverheadLoops/revert-while.mir | 130 ++++ .../Thumb2/LowOverheadLoops}/size-limit.mir | 0 .../Thumb2/LowOverheadLoops}/switch.mir | 0 .../test/CodeGen/Thumb2/LowOverheadLoops/while.mir | 131 ++++ llvm/test/CodeGen/X86/avx512dqvl-intrinsics.ll | 747 +++++++++++++++++++ .../CodeGen/X86/merge-consecutive-loads-128.ll | 3 +- llvm/test/CodeGen/X86/pr42452.ll | 37 + llvm/test/CodeGen/X86/vec_fp_to_int-widen.ll | 152 ++++ llvm/test/CodeGen/X86/vec_fp_to_int.ll | 152 ++++ llvm/test/CodeGen/X86/vec_int_to_fp-widen.ll | 794 +++++++++++++++++---- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 472 ++++++++---- .../MIR/X86/prolog-epilog-indirection.mir | 130 ++++ llvm/test/Transforms/HardwareLoops/ARM/do-rem.ll | 32 +- .../Transforms/HardwareLoops/ARM/fp-emulation.ll | 23 +- .../test/Transforms/HardwareLoops/ARM/simple-do.ll | 42 +- .../test/Transforms/HardwareLoops/ARM/structure.ll | 95 ++- llvm/test/Transforms/InstCombine/minmax-fp.ll | 20 +- ...ower-of-two-or-zero-when-comparing-with-zero.ll | 166 +++++ .../SimpleLoopUnswitch/basictest-profmd.ll | 34 + .../SimpleLoopUnswitch/trivial-unswitch-profmd.ll | 228 ++++++ llvm/tools/dsymutil/DwarfLinker.cpp | 4 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 35 +- llvm/unittests/ADT/STLExtrasTest.cpp | 9 +- llvm/utils/LLVMVisualizers/llvm.natvis | 19 +- 78 files changed, 3822 insertions(+), 626 deletions(-) rename llvm/test/{Transforms/HardwareLoops/ARM => CodeGen/Thumb2/LowOverheadLoops} [...] create mode 100644 llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-guards.ll rename llvm/test/{Transforms/HardwareLoops/ARM => CodeGen/Thumb2/LowOverheadLoops} [...] rename llvm/test/{Transforms/HardwareLoops/ARM => CodeGen/Thumb2/LowOverheadLoops} [...] rename llvm/test/{Transforms/HardwareLoops/ARM => CodeGen/Thumb2/LowOverheadLoops} [...] rename llvm/test/{Transforms/HardwareLoops/ARM => CodeGen/Thumb2/LowOverheadLoops} [...] create mode 100644 llvm/test/CodeGen/Thumb2/LowOverheadLoops/revert-while.mir rename llvm/test/{Transforms/HardwareLoops/ARM => CodeGen/Thumb2/LowOverheadLoops} [...] rename llvm/test/{Transforms/HardwareLoops/ARM => CodeGen/Thumb2/LowOverheadLoops} [...] create mode 100644 llvm/test/CodeGen/Thumb2/LowOverheadLoops/while.mir create mode 100644 llvm/test/CodeGen/X86/pr42452.ll create mode 100644 llvm/test/DebugInfo/MIR/X86/prolog-epilog-indirection.mir create mode 100644 llvm/test/Transforms/InstCombine/omit-urem-of-power-of-two-or-z [...] create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/basictest-profmd.ll create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-profmd.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

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