Tcwg-commits July 2019

tcwg-commits@lists.linaro.org

6 participants
14175 discussions

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allnoconfig updated (46713c3d2f8d -> 0ecfebd2b524)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allnoconfig in repository toolchain/ci/linux. from 46713c3d2f8d Merge tag 'for-linus-20190706' of git://git.kernel.dk/linux-block adds 0ecfebd2b524 Linux 5.2 No new revisions were added by this update. Summary of changes: Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allnoconfig updated (83cfdc89abe -> 0240c270776)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allnoconfig in repository toolchain/ci/gcc. from 83cfdc89abe Daily bump. adds a1425c004e8 Daily bump. adds 0240c270776 2019-07-07 Paul Thomas <pault(a)gcc.gnu.org> No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- gcc/fortran/ChangeLog | 7 ++ gcc/fortran/trans-array.c | 6 +- gcc/testsuite/ChangeLog | 6 ++ gcc/testsuite/gfortran.dg/pointer_array_11.f90 | 90 ++++++++++++++++++++++++++ 5 files changed, 106 insertions(+), 5 deletions(-) create mode 100644 gcc/testsuite/gfortran.dg/pointer_array_11.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allnoconfig updated (ed1604e838 -> 6198971493)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allnoconfig in repository toolchain/ci/binutils-gdb. from ed1604e838 Automatic date update in version.in adds 6198971493 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allnoconfig updated (b526aae -> 1cc08ed)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards b526aae 0: update: binutils-gcc-linux: all new 1cc08ed 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b526aae) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-prepare_abe/console.log | 434 +- 03-build_abe-binutils/console.log | 10652 ++++++------- 04-build_abe-stage1/console.log | 17242 ++++++++++----------- 05-build_linux/console.log | 486 +- 06-boot_linux/console.log | 2 +- console.log | 28987 ++++++++++++++++++------------------ jenkins/manifest.sh | 16 +- 8 files changed, 28972 insertions(+), 28977 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk/llvm-master-aarch64-spec2k6-Oz updated (c444fad6da -> 25c816e70e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-aarch64-spec2k6-Oz in repository toolchain/ci/binutils-gdb. from c444fad6da Automatic date update in version.in adds 219920a7c4 x86: drop a few dead macros adds 36cc073ef4 x86: remove ModRM.mod decoding layer from AVX512F VMOVS{S,D} adds 9c33702be7 x86: warn about insns exceeding the 15-byte limit adds d583596cc9 x86: use encoding_length() also elsewhere adds e3bba3fc75 x86: drop bogus Disp8MemShift attributes adds cd546e7bd2 x86: add missing pseudo ops for VPCLMULQDQ ISA extension adds a0a1771e89 x86: optimize EVEX packed integer logical instructions adds a80195f122 x86: StaticRounding implies SAE adds 79dec6b7ba x86-64: optimize certain commutative VEX-encoded insns adds 5641ec015a x86: optimize AND/OR with twice the same register adds c3949f432f x86: limit ImmExt abuse adds 9d3bf266fd x86: drop Vec_Imm4 adds 900e33b9cf Fix spelling error in assembler documentation. adds c550e7ba93 libctf: disambiguate hex output in dumps adds 3e10cffc98 libctf: fix hash removal adds 9658dc3963 libctf: add hash traversal helpers adds f5e9c9bde0 libctf: deduplicate and sort the string table adds f57cf0e3e3 libctf: fix spurious error when rolling back to the first snapshot adds 539300fb92 Correct the calculation of offsets for ARM exidx relocs when [...] adds a6ce99e987 Correct a typo in the description of the Align and P2align d [...] adds f2f51cd5f5 Document the .value directive supported by the x86 and x86_6 [...] adds 65392b3edd Remove is_a_field_of_this from ada_lookup_symbol adds 41be57caf3 [gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AES adds 269b4ded72 Fix bug when generating REL type relocs for assembler genera [...] adds 54ee425275 Avoid use-after-free in DWARF debug names code adds 390b205f45 Automatic date update in version.in adds 8941884429 [AArch64] Fix bogus MOVPRFX warning for GPR form of CPY adds 83adff695c [AArch64] Add missing C_MAX_ELEM flags for SVE conversions adds 01c1ee4a70 [AArch64] Allow MOVPRFX to be used with FMOV adds bb32413ff7 Ensure that debug information is retained for ARMv8-M securi [...] adds 4d83e8d97e PR ld/24709 [arm] linker crash and assertion failure with CMSE adds 163b2c58bd This patch fixes a bug in the AArch64 assembler where an inc [...] adds 125f83f66c Fix a bug recently introduced to the linker where it would c [...] adds 854f60884c Move generic_load declaration to symfile.h adds 1faa385ff6 Stop the BFD library from issuing a warning message when pro [...] adds 54d6600669 Make "info threads" use the gdb::option framework adds 9be796f35b Automatic date update in version.in adds f3869b1a41 Remove return value from remove_breakpoints_inf adds 970f9d091d Fix defaults of some "maint test-settings" subcommands adds d1fcf2fded Fix a few comments in maint-test-settings.c adds c6ac893109 "maint test-settings set/show" -> "maint set/show test-settings" adds fdbc98707b Introduce the "with" command adds 077a039f70 Fix assembler tests to work with toolchains that have been c [...] adds b2b2a21598 Fix test_gdb_complete_tab_multiple race adds 41fc454c91 Make gdb::option::complete_options save processed arguments too adds 3d9be6f531 Teach gdb::option about string options adds a994424fa1 Fix latent bug in test_gdb_complete_cmd_multiple adds 5f4ba3e701 pipe command completer adds a26c8de0ee Fix early return in foreach_with_prefix adds db7fbcbeb7 Automatic date update in version.in adds f2d4ba38f5 gas/ELF: don't accumulate .type settings adds d4693039f9 x86: correct "-Q" option handling adds 2b40fda74b i386/AArch64: Remove old xml tests adds edd6266ab1 i386/AArch64: Remove unused .dat files adds df0bb381e2 i386/AArch64: Remove unused xml files adds e935475cb6 Arm/AArch64: Split DISPLACED_MODIFIED_INSNS name clash adds f0452268d6 Arm: Prefix register sizes with ARM_ adds 350fab5416 Arm/AArch64: Use a single set of Arm register set size defines adds 213fd9faf5 Fix foreach_with_prefix regression adds 0598af4880 Fix TUI use of "has_break" field adds a0b6cbf69d Automatic date update in version.in adds 98602811d8 Kito's 5-part patch set to improve .insn support. adds 923cccf9bc Automatic date update in version.in adds 25c816e70e Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 34 + bfd/compress.c | 3 + bfd/elf-bfd.h | 2 + bfd/elf.c | 37 +- bfd/elf32-arm.c | 46 +- bfd/version.h | 2 +- gas/ChangeLog | 319 + gas/config/obj-elf.c | 33 +- gas/config/tc-aarch64.c | 9 + gas/config/tc-hppa.h | 8 + gas/config/tc-i386.c | 236 +- gas/doc/as.texi | 10 +- gas/doc/c-aarch64.texi | 3 +- gas/doc/c-i386.texi | 26 +- gas/doc/c-riscv.texi | 14 +- gas/testsuite/gas/aarch64/codealign.d | 1 + gas/testsuite/gas/aarch64/codealign_1.d | 1 + gas/testsuite/gas/aarch64/diagnostic.l | 1 + gas/testsuite/gas/aarch64/diagnostic.s | 1 + gas/testsuite/gas/aarch64/dwarf.d | 2 +- gas/testsuite/gas/aarch64/illegal-sve2-aes.d | 4 - gas/testsuite/gas/aarch64/illegal-sve2.l | 18 +- gas/testsuite/gas/aarch64/illegal-sve2.s | 10 + gas/testsuite/gas/aarch64/illegal.l | 6 +- gas/testsuite/gas/aarch64/illegal.s | 5 + gas/testsuite/gas/aarch64/mapmisc.d | 2 +- gas/testsuite/gas/aarch64/mapping.d | 1 + gas/testsuite/gas/aarch64/mapping2.d | 1 + gas/testsuite/gas/aarch64/mapping3.d | 1 + gas/testsuite/gas/aarch64/mapping4.d | 1 + gas/testsuite/gas/aarch64/mapping_5.d | 1 + gas/testsuite/gas/aarch64/mapping_6.d | 1 + gas/testsuite/gas/aarch64/sve-movprfx_1.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_10.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_11.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_12.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_13.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_14.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_15.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_16.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_17.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_18.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_19.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_2.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_20.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_21.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_22.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_23.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_24.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_25.d | 4 +- gas/testsuite/gas/aarch64/sve-movprfx_25.l | 1 - gas/testsuite/gas/aarch64/sve-movprfx_25.s | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_26.d | 42 +- gas/testsuite/gas/aarch64/sve-movprfx_26.l | 12 +- gas/testsuite/gas/aarch64/sve-movprfx_26.s | 28 +- gas/testsuite/gas/aarch64/sve-movprfx_27.d | 14 + gas/testsuite/gas/aarch64/sve-movprfx_27.s | 11 + gas/testsuite/gas/aarch64/sve-movprfx_3.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_4.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_5.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_6.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_7.d | 4 +- gas/testsuite/gas/aarch64/sve-movprfx_8.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_9.d | 2 +- gas/testsuite/gas/aarch64/sve2.d | 2 + gas/testsuite/gas/aarch64/sve2.s | 4 + gas/testsuite/gas/aarch64/symbol-variant_pcs-1.d | 1 + gas/testsuite/gas/aarch64/symbol-variant_pcs-2.d | 1 + gas/testsuite/gas/aarch64/symbol-variant_pcs-3.d | 1 + gas/testsuite/gas/all/assign.d | 1 + gas/testsuite/gas/all/none.d | 1 + gas/testsuite/gas/all/weakref1.d | 1 + gas/testsuite/gas/arm/got_prel.d | 2 +- gas/testsuite/gas/arm/local_function.d | 1 + gas/testsuite/gas/arm/mapdir.d | 2 +- gas/testsuite/gas/arm/mapmisc.d | 2 +- gas/testsuite/gas/arm/mapping2.d | 1 + gas/testsuite/gas/arm/mapping3.d | 1 + gas/testsuite/gas/arm/mapping4.d | 1 + gas/testsuite/gas/arm/mapsecs.d | 2 +- gas/testsuite/gas/arm/mapshort-eabi.d | 1 + gas/testsuite/gas/arm/thumbrel.d | 1 + gas/testsuite/gas/arm/unwind.d | 1 + gas/testsuite/gas/cfi/cfi-label.d | 2 +- gas/testsuite/gas/elf/elf.exp | 14 +- gas/testsuite/gas/elf/type-2.e | 10 + gas/testsuite/gas/elf/type-2.l | 3 + gas/testsuite/gas/elf/type-2.s | 49 + gas/testsuite/gas/i386/avx512f_vpclmulqdq-intel.d | 4 + gas/testsuite/gas/i386/avx512f_vpclmulqdq.d | 4 + gas/testsuite/gas/i386/avx512f_vpclmulqdq.s | 5 + gas/testsuite/gas/i386/avx512vl_vpclmulqdq-intel.d | 8 + gas/testsuite/gas/i386/avx512vl_vpclmulqdq.d | 8 + gas/testsuite/gas/i386/avx512vl_vpclmulqdq.s | 10 + gas/testsuite/gas/i386/bss.d | 2 +- gas/testsuite/gas/i386/i386.exp | 5 + gas/testsuite/gas/i386/ifunc-3.d | 1 + gas/testsuite/gas/i386/ilp32/mixed-mode-reloc64.d | 1 + gas/testsuite/gas/i386/ilp32/quad.d | 2 +- gas/testsuite/gas/i386/ilp32/reloc64.d | 2 +- gas/testsuite/gas/i386/ilp32/x86-64-size-1.d | 2 +- gas/testsuite/gas/i386/ilp32/x86-64-size-3.d | 2 +- gas/testsuite/gas/i386/ilp32/x86-64-size-5.d | 2 +- gas/testsuite/gas/i386/ilp32/x86-64-sse2avx.d | 1226 +- gas/testsuite/gas/i386/ilp32/x86-64-unwind.d | 2 +- gas/testsuite/gas/i386/mixed-mode-reloc32.d | 2 +- gas/testsuite/gas/i386/mixed-mode-reloc64.d | 1 + gas/testsuite/gas/i386/nop-6.d | 2 +- gas/testsuite/gas/i386/optimize-1.d | 48 + gas/testsuite/gas/i386/optimize-1.s | 54 + gas/testsuite/gas/i386/optimize-1a.d | 48 + gas/testsuite/gas/i386/optimize-2.d | 70 + gas/testsuite/gas/i386/optimize-2.s | 80 + .../gas/i386/{optimize-2.d => optimize-2b.d} | 83 +- gas/testsuite/gas/i386/optimize-3.d | 8 + gas/testsuite/gas/i386/optimize-3.s | 9 + gas/testsuite/gas/i386/optimize-4.d | 48 + gas/testsuite/gas/i386/optimize-5.d | 56 + gas/testsuite/gas/i386/optimize-5.s | 9 + gas/testsuite/gas/i386/oversized16.l | 41 + gas/testsuite/gas/i386/oversized16.s | 11 + gas/testsuite/gas/i386/oversized64.l | 40 + gas/testsuite/gas/i386/oversized64.s | 10 + gas/testsuite/gas/i386/property-1.d | 2 +- gas/testsuite/gas/i386/property-2.d | 2 +- gas/testsuite/gas/i386/relax.d | 2 +- gas/testsuite/gas/i386/reloc64.d | 2 +- gas/testsuite/gas/i386/size-1.d | 2 +- gas/testsuite/gas/i386/size-3.d | 2 +- gas/testsuite/gas/i386/vpclmulqdq-intel.d | 4 + gas/testsuite/gas/i386/vpclmulqdq.d | 4 + gas/testsuite/gas/i386/vpclmulqdq.s | 5 + gas/testsuite/gas/i386/x86-64-avx-swap-2.d | 380 + gas/testsuite/gas/i386/x86-64-avx-swap-2.s | 393 + .../gas/i386/x86-64-avx512f_vpclmulqdq-intel.d | 4 + gas/testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.d | 4 + gas/testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.s | 5 + .../gas/i386/x86-64-avx512vl_vpclmulqdq-intel.d | 8 + .../gas/i386/x86-64-avx512vl_vpclmulqdq.d | 8 + .../gas/i386/x86-64-avx512vl_vpclmulqdq.s | 10 + gas/testsuite/gas/i386/x86-64-nop-6.d | 1 + gas/testsuite/gas/i386/x86-64-optimize-2.d | 48 + gas/testsuite/gas/i386/x86-64-optimize-2.s | 54 + gas/testsuite/gas/i386/x86-64-optimize-2a.d | 48 + gas/testsuite/gas/i386/x86-64-optimize-2b.d | 48 + gas/testsuite/gas/i386/x86-64-optimize-3.d | 80 + gas/testsuite/gas/i386/x86-64-optimize-3.s | 91 + .../{x86-64-optimize-3.d => x86-64-optimize-3b.d} | 109 +- gas/testsuite/gas/i386/x86-64-optimize-4.d | 8 + gas/testsuite/gas/i386/x86-64-optimize-4.s | 9 + gas/testsuite/gas/i386/x86-64-optimize-5.d | 48 + gas/testsuite/gas/i386/x86-64-optimize-6.d | 56 + gas/testsuite/gas/i386/x86-64-optimize-6.s | 9 + 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99 +- gas/testsuite/gas/riscv/insn.s | 19 +- gas/write.c | 22 +- gdb/ChangeLog | 291 + gdb/NEWS | 20 +- gdb/aarch32-linux-nat.h | 5 - gdb/aarch64-linux-nat.c | 13 +- gdb/aarch64-linux-tdep.c | 2 +- gdb/aarch64-tdep.c | 6 +- gdb/aarch64-tdep.h | 2 +- gdb/ada-exp.y | 2 +- gdb/ada-lang.c | 12 +- gdb/ada-lang.h | 2 +- gdb/amd64-linux-tdep.c | 28 - gdb/amd64-tdep.c | 23 - gdb/arch/arm-get-next-pcs.c | 3 +- gdb/arch/arm-linux.c | 2 +- gdb/arch/arm.h | 23 +- gdb/arm-linux-nat.c | 14 +- gdb/arm-linux-tdep.c | 43 +- gdb/arm-linux-tdep.h | 12 +- gdb/arm-nbsd-tdep.c | 2 +- gdb/arm-tdep.c | 109 +- gdb/arm-tdep.h | 13 +- gdb/arm-wince-tdep.c | 2 +- gdb/breakpoint.c | 7 +- gdb/breakpoint.h | 4 +- gdb/cli/cli-cmds.c | 226 +- gdb/cli/cli-cmds.h | 15 + gdb/cli/cli-option.c | 156 +- gdb/cli/cli-option.h | 21 + gdb/cli/cli-setshow.c | 74 +- gdb/cli/cli-setshow.h | 5 + gdb/cli/cli-utils.c | 7 +- gdb/command.h | 19 +- gdb/defs.h | 3 - gdb/doc/ChangeLog | 13 + gdb/doc/gdb.texinfo | 107 +- gdb/dwarf2read.c | 9 +- gdb/features/Makefile | 83 +- gdb/features/aarch64.xml | 14 - gdb/features/i386/amd64-avx-avx512-linux.xml | 20 - gdb/features/i386/amd64-avx-avx512.xml | 18 - gdb/features/i386/amd64-avx-linux.xml | 19 - .../i386/amd64-avx-mpx-avx512-pku-linux.xml | 23 - gdb/features/i386/amd64-avx-mpx-avx512-pku.xml | 20 - gdb/features/i386/amd64-avx-mpx-linux.xml | 20 - gdb/features/i386/amd64-avx-mpx.xml | 18 - gdb/features/i386/amd64-avx.xml | 17 - gdb/features/i386/amd64-linux.xml | 18 - gdb/features/i386/amd64-mpx-linux.xml | 19 - gdb/features/i386/amd64-mpx.xml | 17 - gdb/features/i386/amd64.xml | 16 - gdb/features/i386/i386-avx-avx512-linux.xml | 19 - gdb/features/i386/i386-avx-avx512.xml | 17 - gdb/features/i386/i386-avx-linux.xml | 18 - .../i386/i386-avx-mpx-avx512-pku-linux.xml | 22 - gdb/features/i386/i386-avx-mpx-avx512-pku.xml | 19 - gdb/features/i386/i386-avx-mpx-linux.xml | 19 - gdb/features/i386/i386-avx-mpx.xml | 17 - gdb/features/i386/i386-avx.xml | 16 - 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gdb/regformats/i386/i386-linux.dat delete mode 100644 gdb/regformats/i386/i386-mmx-linux.dat delete mode 100644 gdb/regformats/i386/i386-mpx-linux.dat delete mode 100644 gdb/regformats/i386/i386.dat delete mode 100644 gdb/regformats/i386/x32-avx-avx512-linux.dat delete mode 100644 gdb/regformats/i386/x32-avx-linux.dat delete mode 100644 gdb/regformats/i386/x32-linux.dat copy gdb/{gdbserver/linux-aarch64-tdesc.h => testsuite/gdb.base/with.c} (61%) create mode 100644 gdb/testsuite/gdb.base/with.exp create mode 100644 gdb/testsuite/gdb.testsuite/foreach_with_prefix.exp create mode 100644 ld/testsuite/ld-arm/cmse_main.s create mode 100644 ld/testsuite/ld-arm/cmse_main_sec_debug.d create mode 100644 ld/testsuite/ld-arm/cmse_sec_debug.s create mode 100644 libctf/ctf-string.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk/llvm-master-aarch64-spec2k6-Oz updated (35c3d3f -> 13f0491)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-aarch64-spec2k6-Oz in repository toolchain/ci/base-artifacts. discards 35c3d3f 2: update: binutils-c444fad6da089b5b94ae7ea2aabce0521695a8d3: -6 discards a7432b7 1: reset: binutils-7e56c51c7932cfdb178e9457011d09d53e98937b: -6 discards c2736f6 0: update: llvm-fb133b0aabec9b669bf7db60586b900c3422f38f: 0 new 13f0491 0: update: binutils-25c816e70e578b8a9abab0dada0490dd5ae41780: 0 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (35c3d3f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk/llvm-master-aarch64- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 22 +- 02-prepare_abe/console.log | 180 +- 03-build_abe-binutils/console.log | 11614 ++-- 04-build_abe-stage1/console.log | 14834 +++-- 05-build_abe-linux/console.log | 308 +- 06-build_abe-glibc/console.log | 39036 ++++++------- 07-build_abe-stage2/console.log | 32263 +++++++---- 08-build_llvm-true/console.log | 5877 ++ 09-benchmark/benchmark-start.log | 1 + 09-benchmark/benchmark.log | 49 + 09-benchmark/console.log | 258 + 10-check_regression/console.log | 33 +- 11-update_baseline/console.log | 2101 +- console.log | 106718 ++++++++++++++++++++--------------- jenkins/manifest.sh | 9 +- results | 6 + results.csv | 95 + results_id | 1 + 18 files changed, 122673 insertions(+), 90732 deletions(-) create mode 100644 08-build_llvm-true/console.log create mode 100644 09-benchmark/benchmark-start.log create mode 100644 09-benchmark/benchmark.log create mode 100644 09-benchmark/console.log create mode 100644 results.csv create mode 100644 results_id -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-O3_LTO updated (cbb88a51699 -> fb133b0aabe)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-O3_LTO in repository toolchain/ci/llvm-project. from cbb88a51699 [X86] Connect the output chain properly when combining vzex [...] adds 8be372b1901 [ARM] MVE vector shuffles adds be05b85db9f [ARM] Select MVE add and sub adds 9a92be1b355 [HardwareLoops] Loop counter guard intrinsic adds 62889b0ea54 [ARM] Select MVE fp add and sub adds 8ab8a60a1ec [CTU] Add missing statistics adds fc4102417b1 [ARM] Mark div and rem as expand for MVE adds 2bc48f503a1 [AVR] Don't look for the TargetFrameLowering in the FrameLo [...] adds 07e53fee145 [ARM] MVE loads and stores adds e662b6985a8 [DebugInfo] GSYM cleanups after D63104/r364427 adds 29ff1b4f465 [ARM] Fix integer UB in MVE load/store immediate handling. adds eb7080ac6e5 [ARM] Widening loads and narrowing stores adds 493a1202595 [DebugInfo] Simplify GSYM::AddressRange and GSYM::AddressRanges adds 02e743586e9 [DebugInfo] Fix setStartAddress after r364637 adds fd0ad4b24d6 [ELF] Do not produce DT_JMPREL and DT_PLTGOT if .rela.plt i [...] adds ff70cbc8957 [ARM] MVE patterns for VABS and VNEG adds 28839440352 [ARM] Mark math routines as non-legal for MVE adds 9af44742538 [NFC][Codegen] Revisit test coverage for X % C == 0 fold adds 9dbdfe6b785 [ARM] Add MVE mul patterns adds a54e1a0f012 [X86] CombineShuffleWithExtract - only require 1 source to [...] adds 1d572ce3955 [AMDGPU][MC] Enabled constant expressions as operands of sendmsg adds 13d9c723c89 [NFC][NewGVN] Pre-commit unary FNeg test to fpmath.ll adds 405f8fc812c [OPENMP]Fix checks for DSA in simd constructs. adds 40b88e07e2d [Hexagon] driver uses out-of-date option name and binary name adds 9fab46ca0bd [NFC][Float2Int] Pre-commit unary FNeg test to basic.ll adds b7c31ff4a22 [OPENMP]Fix DSA for loop iteration variables in simd loops. adds d12966c0883 [AMDGPU][MC] Fix for sanitizer failure in 364645 adds 9f1dffdb024 [NFC][InstCombine] Shift amount reassociation: add flag pre [...] adds 176b9f65168 [llvm-cov[ Fix lcov coverage report contains functions from [...] adds e39e958da36 [ARM] Add support for the MVE long shift instructions adds 73f9d9aa64b [OPENMP]Fix top DSA for static members. adds e1eb25ff3e5 [AMDGPU][MC] Fix 2 for sanitizer failure in 364645 adds 3b4f086df4a [NFC][InstCombine] Shift amount reassociation: revisit flag [...] adds 633d222d30b [WebAssembly] Added visibility and ident directives to Wasm [...] adds 5cbff431782 [COFF] Fix .rsrc sections with differing permissions adds 0b8b4195371 [NFC][Codegen] Revisit test coverage for X % C == 0 fold on [...] adds 5be69ebe121 [TSan] Improve handling of stack pointer mangling in {set,l [...] adds 021d2f20933 Update CODE_OWNERS.txt for clang-doc adds 5f8b9092fff [ODRHash] Fix null pointer dereference for ObjC selectors w [...] adds 7108df964aa hwasan: Remove the old frame descriptor mechanism. adds 8864b4360aa Make sure the thread list is updated before you set the sto [...] adds 978a08c8854 [X86] CombineShuffleWithExtract - recurse through EXTRACT_S [...] adds 7d78e5cc811 [UpdateChecks] Add support for armv7-apple-darwin adds 9db6073381d [GDBRemote] Remove code that flushes GDB remote packets adds 93a290fdc97 [clang-doc] De-duplicate comments and locations adds 36c3d1312a0 [unittests][Support] Fix LLVM-Unit :: Support/./SupportTest [...] adds 62a627ae781 Re-apply r364600 with fixes. adds 70a8027c60f [llvm-ar] Document response file support in --help adds d900ef0a5b1 [clang-doc] Handle anonymous namespaces adds 4b733ca617e Default to Secure PLT on PPC for musl libc. adds 1c6337ca5ab [TSan] Fix build build breakage on Android adds 9a6cef74d8a [demangle] Support for C++2a char8_t adds ab4b2364e56 [GVNSink] Add unary FNeg support to GVNSink pass adds 642fe780abe Revert enabling frame pointer elimination on OpenBSD for now. adds 30e5cf1d8f3 [NewGVN] Add unary FNeg support to NewGVN pass adds 597ba180086 [WebAssembly] Assembler: Improve section parsing. adds fc222e23cae [WebAssembly] Assembler: Allow offsets and p2align in symbol load. adds 1242d8f333a [OPENMP]Improve analysis of implicit captures. adds 573b241c68a [Lanai] auto-generate complete test checks; NFC adds b671535983f [NFC][NewGVN] Explicitly check fpmath metadata in fpmath.ll adds f2128b28cdb Get the expression parser to handle missing weak symbols. M [...] adds 9126c84f50f [x86] remove stale comment about cmov; NFC adds 35bcba4fae8 [WebAssembly] Allow @object in .type directives. adds 319c87d94fd [WebAssembly] Assembler: support .int16/32/64 directives. adds caf4cee6fe8 [clang][test][NFC] Explicitly specify clang ABI in AST Dumper test adds 69d9c314337 AMDGPU: Add baseline test for packed shufflevector adds da47e2cac38 Revert "[clang][NewPM] Fix broken profile test" adds 1504b6ee7ea [IndVars] Remove a bit of manual constant folding [NFC] adds ade51624327 AMDGPU/GlobalISel: RegBankSelect for some simple leaf intrinsics adds 6aafb3068f9 AMDGPU/GlobalISel: RegBankSelect for amdgcn.div.fmas adds 5ea3c9adb27 AMDGPU/GlobalISel: RegBankSelect for icmp/fcmp intrinsics adds b416d5fc8b8 AMDGPU/GlobalISel: RegBankSelect for some easy intrinsics adds adb1f21e521 AMDGPU/GlobalISel: RegBankSelect for some DS intrinsics adds fd82cf4f4d0 AMDGPU/GlobalISel: RegBankSelect for atomic.inc/atomic.dec adds be4148062b1 [TSan] Attempt to fix linker error for Linux on AArch64 adds 0d452097571 AMDGPU/GlobalISel: RegBankSelect for update.dpp adds a83e94ebf26 Use const auto * adds 7889d4ce66f AMDGPU/GlobalISel: Add some more tests for icmp select adds 765eba38c8d [Driver] Fix style issues of --print-supported-cpus after D63105 adds b72664fd21c Partial revert of "[llvm-ar] Document response file support [...] adds 2d756c4feb6 [LFTR] Fix post-inc pointer IV with truncated exit count (PR41998) adds 9e9eb62f9fd [APInt] Fix getBitsNeeded for INT_MIN values adds fe107fcde4d [IR][Patternmatch] Add m_SpecificInt_ULT() predicate adds e3a94ba4a92 [InstCombine] Shift amount reassociation (PR42391) adds 61a8b62b4c9 [LFTR] Remove unnecessary latch check; NFCI adds 77dc1e85683 [InstCombine] canonicalize fmin/fmax to LLVM intrinsics min [...] adds 8023c844338 [LFTR] Rephrase getLoopTest into "based-on" check; NFCI adds 6293cd05045 Replace tabs with spaces. adds 4d0feb28ecb [SelectionDAG] Use the memory VT instead of result VT for F [...] adds 725a8a5dc43 [X86] Custom lower AVX masked loads to masked load and vsel [...] adds 2d2cb77e45d [ADT] Implement llvm::bsearch() with std::partition_point() adds 78ee2fbf984 Cleanup: llvm::bsearch -> llvm::partition_point after r364719 adds 706b48251f6 [InstCombine] canonicalize fcmp+select to minnum/maxnum intrinsics adds 135cf982e8e Revert "[GDBRemote] Remove code that flushes GDB remote packets" adds bb0b44deaab Clean up MSVC visualization of LLVM pointer types adds fb133b0aabe Various tweaks to MSVC natvis visualizers No new revisions were added by this update. Summary of changes: clang-tools-extra/CODE_OWNERS.TXT | 4 + clang-tools-extra/clang-doc/Representation.cpp | 39 + clang-tools-extra/clang-doc/Representation.h | 50 + clang-tools-extra/clang-doc/Serialize.cpp | 75 +- clang-tools-extra/clang-doc/tool/ClangDocMain.cpp | 7 +- clang-tools-extra/clangd/index/Symbol.cpp | 4 +- clang-tools-extra/clangd/index/dex/PostingList.cpp | 8 +- .../unittests/clang-doc/MergeTest.cpp | 36 +- .../unittests/clang-doc/SerializeTest.cpp | 1 + clang/include/clang/Driver/Options.td | 6 +- clang/lib/AST/ODRHash.cpp | 7 +- clang/lib/CodeGen/BackendUtil.cpp | 6 - clang/lib/CrossTU/CrossTranslationUnit.cpp | 8 +- clang/lib/Driver/Driver.cpp | 20 +- clang/lib/Driver/ToolChains/Clang.cpp | 13 - clang/lib/Driver/ToolChains/Hexagon.cpp | 4 +- clang/lib/Frontend/CompilerInvocation.cpp | 2 +- clang/lib/Sema/SemaOpenMP.cpp | 82 +- clang/lib/Tooling/Syntax/Tokens.cpp | 8 +- .../AST/ast-dump-record-definition-data-json.cpp | 2 +- clang/test/Driver/frame-pointer-elim.c | 13 - clang/test/Driver/print-supported-cpus.c | 36 +- clang/test/Modules/odr_hash.mm | 31 + .../distribute_parallel_for_default_messages.cpp | 8 +- ...stribute_parallel_for_simd_default_messages.cpp | 8 +- clang/test/OpenMP/nvptx_lambda_capturing.cpp | 4 +- clang/test/OpenMP/simd_loop_messages.cpp | 32 +- .../target_parallel_for_default_messages.cpp | 4 +- .../target_parallel_for_simd_default_messages.cpp | 4 +- ...rget_teams_distribute_firstprivate_messages.cpp | 2 +- .../teams_distribute_firstprivate_messages.cpp | 2 +- .../teams_distribute_lastprivate_messages.cpp | 2 +- ...stribute_parallel_for_firstprivate_messages.cpp | 2 +- ...istribute_parallel_for_lastprivate_messages.cpp | 2 +- ..._distribute_parallel_for_reduction_messages.cpp | 4 +- ...stribute_parallel_for_simd_aligned_messages.cpp | 2 +- ...ute_parallel_for_simd_firstprivate_messages.cpp | 2 +- ...bute_parallel_for_simd_lastprivate_messages.cpp | 2 +- ...istribute_parallel_for_simd_linear_messages.cpp | 4 +- ...ribute_parallel_for_simd_reduction_messages.cpp | 4 +- .../OpenMP/teams_distribute_reduction_messages.cpp | 4 +- .../teams_distribute_simd_aligned_messages.cpp | 2 +- ...teams_distribute_simd_firstprivate_messages.cpp | 2 +- .../teams_distribute_simd_lastprivate_messages.cpp | 2 +- .../teams_distribute_simd_linear_messages.cpp | 4 +- .../teams_distribute_simd_reduction_messages.cpp | 4 +- clang/test/OpenMP/teams_firstprivate_messages.cpp | 2 +- clang/test/OpenMP/teams_reduction_messages.cpp | 4 +- clang/test/Profile/gcc-flag-compatibility.c | 12 +- clang/tools/driver/cc1_main.cpp | 9 +- clang/utils/ClangVisualizers/clang.natvis | 54 +- compiler-rt/lib/tsan/rtl/tsan_interceptors.cc | 3 + compiler-rt/lib/tsan/rtl/tsan_platform.h | 1 + compiler-rt/lib/tsan/rtl/tsan_platform_linux.cc | 34 + compiler-rt/lib/tsan/rtl/tsan_platform_mac.cc | 4 + compiler-rt/lib/tsan/rtl/tsan_rtl_aarch64.S | 8 - libcxxabi/src/demangle/ItaniumDemangle.h | 4 + libcxxabi/test/test_demangle.pass.cpp | 3 + lld/COFF/Writer.cpp | 32 +- lld/ELF/DWARF.cpp | 2 +- lld/ELF/InputSection.cpp | 4 +- lld/ELF/SyntheticSections.cpp | 2 +- lld/test/COFF/Inputs/id.res.o | Bin 0 -> 220 bytes lld/test/COFF/resource-objs.test | 5 + .../ELF/linkerscript/empty-relaplt-dyntags.test | 44 + lldb/include/lldb/Expression/IRExecutionUnit.h | 12 +- lldb/include/lldb/Symbol/Symbol.h | 7 +- lldb/include/lldb/lldb-enumerations.h | 2 + .../test/expression_command/weak_symbols/Makefile | 26 + .../weak_symbols/TestWeakSymbols.py | 83 + .../test/expression_command/weak_symbols/dylib.c | 14 + .../test/expression_command/weak_symbols/dylib.h | 8 + .../test/expression_command/weak_symbols/main.c | 23 + .../weak_symbols/module.modulemap | 3 + .../gdb_remote_client/TestRecognizeBreakpoint.py | 139 + .../gdb_remote_client/gdbclientutils.py | 5 + .../gdb_remote_client/operating_system_2.py | 62 + lldb/source/Expression/IRExecutionUnit.cpp | 91 +- lldb/source/Expression/IRInterpreter.cpp | 5 +- .../Plugins/ExpressionParser/Clang/IRForTarget.cpp | 18 +- .../Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp | 2 + .../Process/gdb-remote/ProcessGDBRemote.cpp | 17 +- .../SymbolFile/DWARF/DWARFDebugInfoEntry.cpp | 10 +- lldb/source/Symbol/Block.cpp | 4 +- lldb/source/Symbol/Symbol.cpp | 15 +- lldb/source/Target/Process.cpp | 10 +- llvm/include/llvm/ADT/STLExtras.h | 44 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 3 + llvm/include/llvm/CodeGen/SlotIndexes.h | 5 +- llvm/include/llvm/DebugInfo/DWARF/DWARFUnit.h | 7 +- llvm/include/llvm/DebugInfo/GSYM/FileEntry.h | 9 +- llvm/include/llvm/DebugInfo/GSYM/FunctionInfo.h | 22 +- llvm/include/llvm/DebugInfo/GSYM/InlineInfo.h | 10 +- llvm/include/llvm/DebugInfo/GSYM/LineEntry.h | 2 +- llvm/include/llvm/DebugInfo/GSYM/Range.h | 70 +- llvm/include/llvm/DebugInfo/GSYM/StringTable.h | 2 +- llvm/include/llvm/Demangle/ItaniumDemangle.h | 4 + llvm/include/llvm/IR/Intrinsics.td | 6 + llvm/include/llvm/IR/PatternMatch.h | 14 + llvm/lib/Analysis/ProfileSummaryInfo.cpp | 4 +- llvm/lib/CodeGen/ExecutionDomainFix.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp | 9 +- llvm/lib/CodeGen/HardwareLoops.cpp | 121 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 5 +- llvm/lib/DebugInfo/DWARF/DWARFDebugAranges.cpp | 2 +- llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp | 4 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp | 8 +- llvm/lib/DebugInfo/DWARF/DWARFUnitIndex.cpp | 4 +- llvm/lib/DebugInfo/GSYM/FunctionInfo.cpp | 3 +- llvm/lib/DebugInfo/GSYM/InlineInfo.cpp | 2 +- llvm/lib/DebugInfo/GSYM/Range.cpp | 52 +- llvm/lib/IR/DataLayout.cpp | 4 +- llvm/lib/IR/Function.cpp | 5 +- llvm/lib/MC/MCParser/WasmAsmParser.cpp | 97 +- llvm/lib/ProfileData/InstrProf.cpp | 11 +- llvm/lib/Support/APInt.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 93 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 262 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 57 +- llvm/lib/Target/AMDGPU/SIDefines.h | 13 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 108 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 42 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 350 ++- llvm/lib/Target/ARM/ARMISelLowering.h | 8 +- llvm/lib/Target/ARM/ARMInstrInfo.td | 31 + llvm/lib/Target/ARM/ARMInstrMVE.td | 223 +- llvm/lib/Target/ARM/ARMInstrNEON.td | 224 +- .../Target/ARM/Disassembler/ARMDisassembler.cpp | 4 +- .../Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp | 11 +- llvm/lib/Target/AVR/AVRFrameLowering.cpp | 2 +- llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 3 +- .../WebAssembly/AsmParser/WebAssemblyAsmParser.cpp | 35 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 64 +- llvm/lib/Target/X86/X86ISelLowering.h | 3 +- llvm/lib/Target/X86/X86InstrFMA3Info.cpp | 4 +- llvm/lib/Target/X86/X86InstrSSE.td | 5 - llvm/lib/TextAPI/MachO/InterfaceFile.cpp | 16 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 13 + .../Transforms/InstCombine/InstCombineShifts.cpp | 48 + .../Instrumentation/HWAddressSanitizer.cpp | 81 - llvm/lib/Transforms/Scalar/GVNSink.cpp | 1 + llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 143 +- llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp | 4 +- llvm/lib/Transforms/Scalar/NewGVN.cpp | 1 + llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 38 +- .../CodeGen/AArch64/urem-seteq-vec-nonsplat.ll | 649 ++++- llvm/test/CodeGen/AArch64/urem-seteq-vec-splat.ll | 183 +- llvm/test/CodeGen/AArch64/urem-seteq.ll | 106 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir | 112 +- .../GlobalISel/regbankselect-amdgcn.atomic.dec.mir | 80 + .../GlobalISel/regbankselect-amdgcn.atomic.inc.mir | 80 + .../GlobalISel/regbankselect-amdgcn.div.fmas.mir | 106 + .../GlobalISel/regbankselect-amdgcn.ds.append.mir | 36 + .../regbankselect-amdgcn.ds.bpermute.mir | 24 + .../GlobalISel/regbankselect-amdgcn.ds.consume.mir | 36 + .../GlobalISel/regbankselect-amdgcn.ds.fmax.mir | 83 + .../GlobalISel/regbankselect-amdgcn.ds.fmin.mir | 83 + .../GlobalISel/regbankselect-amdgcn.ds.permute.mir | 24 + .../GlobalISel/regbankselect-amdgcn.fcmp.mir | 67 + .../regbankselect-amdgcn.groupstaticsize.mir | 14 + .../GlobalISel/regbankselect-amdgcn.icmp.mir | 67 + ...bankselect-amdgcn.s.get.waveid.in.workgroup.mir | 14 + .../GlobalISel/regbankselect-amdgcn.s.getpc.mir | 14 + .../GlobalISel/regbankselect-amdgcn.s.getreg.mir | 14 + .../regbankselect-amdgcn.s.memrealtime.mir | 14 + .../GlobalISel/regbankselect-amdgcn.s.memtime.mir | 14 + .../GlobalISel/regbankselect-amdgcn.update.dpp.mir | 82 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.ll | 2 +- llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll | 928 +++++++ llvm/test/CodeGen/ARM/ldst-f32-2-i32.ll | 14 +- llvm/test/CodeGen/ARM/shift_parts.ll | 221 ++ llvm/test/CodeGen/Lanai/sub-cmp-peephole.ll | 117 +- llvm/test/CodeGen/PowerPC/ppc32-pic-large.ll | 2 + llvm/test/CodeGen/Thumb2/mve-basic.ll | 35 + llvm/test/CodeGen/Thumb2/mve-bitcasts.ll | 3 +- llvm/test/CodeGen/Thumb2/mve-div-expand.ll | 1243 +++++++++ llvm/test/CodeGen/Thumb2/mve-fmath.ll | 2322 ++++++++++++++++ llvm/test/CodeGen/Thumb2/mve-fp-negabs.ll | 169 ++ llvm/test/CodeGen/Thumb2/mve-ldst-offset.ll | 1222 +++++++++ llvm/test/CodeGen/Thumb2/mve-ldst-postinc.ll | 1245 +++++++++ llvm/test/CodeGen/Thumb2/mve-ldst-preinc.ll | 1245 +++++++++ llvm/test/CodeGen/Thumb2/mve-ldst-regimm.ll | 158 ++ llvm/test/CodeGen/Thumb2/mve-loadstore.ll | 175 ++ llvm/test/CodeGen/Thumb2/mve-shuffle.ll | 624 +++++ llvm/test/CodeGen/Thumb2/mve-simple-arith.ll | 385 +++ llvm/test/CodeGen/Thumb2/mve-vdup.ll | 138 + llvm/test/CodeGen/Thumb2/mve-widen-narrow.ll | 127 + .../test/CodeGen/X86/shuffle-vs-trunc-512-widen.ll | 31 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll | 31 +- llvm/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll | 2854 ++++++++++++++++---- llvm/test/CodeGen/X86/urem-seteq-vec-splat.ll | 496 ++-- llvm/test/CodeGen/X86/urem-seteq.ll | 127 +- llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll | 5 +- .../JITLink/X86/MachO_x86-64_relocations.s | 12 + .../Instrumentation/HWAddressSanitizer/basic.ll | 2 - .../HWAddressSanitizer/frame-descriptor.ll | 27 - .../HWAddressSanitizer/with-calls.ll | 1 - llvm/test/MC/AMDGPU/sopp-err.s | 103 +- llvm/test/MC/AMDGPU/sopp.s | 126 +- .../test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt | 4 +- llvm/test/MC/Disassembler/AMDGPU/sopp_vi.txt | 23 +- llvm/test/MC/WebAssembly/basic-assembly.s | 78 +- llvm/test/Transforms/Float2Int/basic.ll | 16 + llvm/test/Transforms/GVNSink/fpmath.ll | 3 +- llvm/test/Transforms/HardwareLoops/loop-guards.ll | 339 +++ llvm/test/Transforms/HardwareLoops/scalar-while.ll | 96 + .../HardwareLoops/unconditional-latch.ll | 75 +- .../IndVarSimplify/2011-11-01-lftrptr.ll | 7 +- .../test/Transforms/IndVarSimplify/lftr-pr41998.ll | 5 +- .../InstCombine/double-float-shrink-1.ll | 11 +- llvm/test/Transforms/InstCombine/fast-math.ll | 53 +- .../Transforms/InstCombine/float-shrink-compare.ll | 37 +- llvm/test/Transforms/InstCombine/minmax-fp.ll | 20 +- .../InstCombine/shift-amount-reassociation.ll | 103 +- llvm/test/Transforms/NewGVN/fpmath.ll | 19 +- llvm/test/tools/llvm-cov/multiple-files.test | 12 + llvm/tools/dsymutil/DwarfLinker.cpp | 4 +- llvm/tools/llvm-ar/llvm-ar.cpp | 1 + llvm/tools/llvm-cov/CoverageExporterLcov.cpp | 2 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 35 +- llvm/unittests/ADT/APIntTest.cpp | 17 +- llvm/unittests/ADT/STLExtrasTest.cpp | 21 +- llvm/unittests/DebugInfo/GSYM/CMakeLists.txt | 5 - llvm/unittests/DebugInfo/GSYM/GSYMTest.cpp | 125 +- llvm/unittests/IR/PatternMatch.cpp | 21 + llvm/unittests/Support/Path.cpp | 5 +- llvm/utils/LLVMVisualizers/llvm.natvis | 19 +- llvm/utils/UpdateTestChecks/asm.py | 9 + 228 files changed, 18460 insertions(+), 2573 deletions(-) create mode 100644 lld/test/COFF/Inputs/id.res.o create mode 100644 lld/test/COFF/resource-objs.test create mode 100644 lld/test/ELF/linkerscript/empty-relaplt-dyntags.test create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/weak_sym [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/weak_sym [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/weak_sym [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/weak_sym [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/weak_sym [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/weak_sym [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/gdb_remote_ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/gdb_remote_ [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.atomic [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.atomic [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.fmas.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.append.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.bpe [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.con [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.fmax.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.fmin.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.per [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fcmp.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.groups [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.icmp.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.get. [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getpc.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getreg.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memr [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memtime.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.update [...] create mode 100644 llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll create mode 100644 llvm/test/CodeGen/ARM/shift_parts.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-div-expand.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-fmath.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-fp-negabs.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-ldst-offset.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-ldst-postinc.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-ldst-preinc.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-ldst-regimm.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-loadstore.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-shuffle.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-simple-arith.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-vdup.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-widen-narrow.ll delete mode 100644 llvm/test/Instrumentation/HWAddressSanitizer/frame-descriptor.ll create mode 100644 llvm/test/Transforms/HardwareLoops/loop-guards.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-O3_LTO updated (f4b8f62 -> f5a75da)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-O3_LTO in repository toolchain/ci/base-artifacts. discards f4b8f62 0: update: glibc-3db85a9814784a74536a1f0e7b7ddbfef7dc84bb: -1 new f5a75da 0: update: llvm-fb133b0aabec9b669bf7db60586b900c3422f38f: -1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (f4b8f62) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk/llvm-master-arm-spec [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 84 +- 02-prepare_abe/console.log | 122 +- 03-build_abe-binutils/console.log | 10398 +-- 04-build_abe-stage1/console.log | 19347 +++--- 05-build_abe-linux/console.log | 292 +- 06-build_abe-glibc/console.log | 39296 ++++++----- 07-build_abe-stage2/console.log | 46055 ++++++------- 08-build_llvm-true/console.log | 11767 ++-- 09-benchmark/benchmark-start.log | 2 +- 09-benchmark/benchmark.log | 4 +- 09-benchmark/console.log | 94 +- console.log | 127563 +++++++++++++++++------------------ jenkins/manifest.sh | 8 +- 13 files changed, 127244 insertions(+), 127788 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (9e52c43090f -> e28fca29fef)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/llvm-project. from 9e52c43090f Treat the range of representable values of floating-point t [...] adds 8baf83839e9 Fix PR27658 - Make ~mutex trivial when possible. adds 617df204b5b [CodeGen] Add larger vector types for i32 and f32 adds ac744d5a864 [X86] Make sure load isn't volatile before shrinking it in [...] adds 3e9ef48440a gn build: Merge r365258 and follow-ups r365263, r365264 adds d22fd0e4ecc gn build: Sort cxx_sources in libcxx build file adds 7e063620611 gn build: Sort sync script output adds 18d138e6acc gn build: Merge r365273 adds 87210015581 gn build: Merge r355546 adds 8cedf04a6c8 Make ~mutex and ~condition_variable trivial on Windows. adds 842f55f3efe Process: generalise Windows thread setup adds 8d9d290d4c0 [ARM] Add support for MSVC stack cookie checking adds e28fca29fef Revert "[IRBuilder] Fold consistently for or/and whether co [...] No new revisions were added by this update. Summary of changes: libcxx/include/__config | 17 ++ libcxx/include/__mutex_base | 42 ++-- libcxx/src/CMakeLists.txt | 2 + libcxx/src/condition_variable.cpp | 5 +- libcxx/src/condition_variable_destructor.cpp | 46 ++++ libcxx/src/mutex.cpp | 5 +- libcxx/src/mutex_destructor.cpp | 51 ++++ .../thread.mutex.class/default.pass.cpp | 6 +- .../Process/Windows/Common/TargetThreadWindows.cpp | 30 ++- llvm/include/llvm/CodeGen/ValueTypes.td | 186 +++++++------- llvm/include/llvm/IR/IRBuilder.h | 6 - llvm/include/llvm/Support/MachineValueType.h | 274 +++++++++++++-------- llvm/lib/CodeGen/ValueTypes.cpp | 26 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 30 +++ llvm/lib/Target/ARM/ARMISelLowering.h | 4 + llvm/lib/Target/X86/X86InstrAVX512.td | 6 +- llvm/lib/Target/X86/X86InstrSSE.td | 4 +- .../wrapping-pointer-versioning.ll | 24 +- .../CodeGen/ARM/Windows/stack-protector-msvc.ll | 20 ++ llvm/test/Instrumentation/BoundsChecking/opt.ll | 2 + llvm/test/TableGen/intrinsic-varargs.td | 2 +- .../LoopDistribute/scev-inserted-runtime-check.ll | 29 +-- llvm/test/Transforms/LoopPredication/basic.ll | 3 +- .../basic_widenable_branch_guards.ll | 5 +- .../Transforms/LoopPredication/invariant_load.ll | 3 +- .../X86/illegal-parallel-loop-uniform-write.ll | 35 +-- llvm/test/Transforms/LoopVectorize/X86/pr35432.ll | 45 ++-- .../LoopVectorize/pr30654-phiscev-sext-trunc.ll | 6 +- llvm/utils/TableGen/CodeGenTarget.cpp | 12 + .../utils/gn/build/sync_source_lists_from_cmake.py | 4 +- .../gn/secondary/clang/unittests/Rewrite/BUILD.gn | 4 + llvm/utils/gn/secondary/libcxx/src/BUILD.gn | 69 +++--- 32 files changed, 650 insertions(+), 353 deletions(-) create mode 100644 libcxx/src/condition_variable_destructor.cpp create mode 100644 libcxx/src/mutex_destructor.cpp create mode 100644 llvm/test/CodeGen/ARM/Windows/stack-protector-msvc.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (357c16c -> c4f6100)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards 357c16c 6: update: llvm-linux: 17560 new c4f6100 6: update: llvm-linux: 17560 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (357c16c) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 11936 ++++++++++++------------- 03-build_linux/console.log | 6146 ++++++------- 05-check_regression/console.log | 6 +- 06-update_baseline/console.log | 22 +- console.log | 18330 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 7 files changed, 18334 insertions(+), 18334 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits July 2019