Tcwg-commits June 2019

tcwg-commits@lists.linaro.org

6 participants
15913 discussions

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig updated (082cd30327d -> 5584ab89a88)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/llvm-project. from 082cd30327d Generalize icmp matching in IndVars' eliminateTrunc adds 6691f1b6cde [LanguageRuntime] Simplify CreateExceptionSearchFilter in d [...] adds 4959542657b Add documentation and tests for Clangs C++11 extensions in C++03. adds 0e9b1d2a20c Move libc++ specific tests for std::function out of the std [...] adds 02f0b379f56 Fix a bug in getSCEVAtScope w.r.t. non-canonical loops adds 7f61d441789 Mark declarations as referenced by a default argument in a [...] adds 6fe46ec25d8 [NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrins [...] adds dd4bed3d7a8 Back out r363103 ("When reading ObjC class table, use new S [...] adds fbfee60c326 [X86] [ABI] Fix i386 ABI "__m64" type bug adds 14d4869209c Apply [[nodebug]] to typedefs throughout the STL. adds 8faff5606e9 [PowerPC][NFC] Added test for sext/shl combination after isel. adds 93be25b5806 [NFC] Correct comments in RegisterCoalescer. adds 04ddf39b446 [RISCV] Add CFI directives for RISCV prologue/epilog. adds 549991e48c6 [ScopBuilder] Move hoistInvariantLoads to ScopBuilder. NFC. adds cc12f68fffa [PowerPC] [Clang] Port SSE2 intrinsics to PowerPC adds aa6f2af4e6b [RISCV] Fix inline-asm.ll test by adding nounwind attribute adds 8a529f3ceae Revert "Revert r362867: [ELF][PPC] Simplify {read,write}Fro [...] adds ed4cd448708 [X86] Add VCMPSSZrr_Intk and VCMPSDZrr_Intk to isNonFoldabl [...] adds 11549e5c465 [ELF][PPC64] Don't report "relocation refers to a discarded [...] adds 6fab7d0ef23 [NFC] Test commit adds 4ce0a519c19 [ELF][RISCV] Treat R_RISCV_{ADD,SET,SUB}* as link-time constants adds f763102ad4e gitignore: Ignore Qt Creator project configuration files. NFC adds de73404b8c4 [AArch64] Merge globals when optimising for size adds f8b4e60c7f5 [AVR] Fix the 'avr-tiny.ll' and 'avr25.ll' subtarget feature tests adds a9471563961 Revert "[DebugInfo@O2][LoopVectorize] pr39024: Vectorized c [...] adds cf7d7683515 Fixed a crash in misc-redundant-expression ClangTidy checker adds 05d44139ee6 Revert r362676 "[Profile]: Add runtime interface to specify [...] adds f243ca4af8c [LLDB] Fix FreeBSD build adds 2c16bb80348 [llvm-nm] Fix docs and help text for --print-size adds 32c1e736036 [XCore] LowerLOAD/LowerSTORE - Use allowsMemoryAccess wrapp [...] adds 4cfcacbdfef [docs] Fix typo adds f6efac67e18 [clangd] Fix typo in GUARDED_BY() adds 564d248ec2f [ThinLTO]LTO]Legacy] Fix dependent libraries support by add [...] adds ca39de71997 [XCore] CombineSTORE - Use allowsMemoryAccess wrapper. NFCI. adds 7a15e99f3a9 [DOC] Fix `load` instructions' syntax, function definition. adds ca9c3de17e5 DWARF: Share line tables of type units adds 1dc2123d640 Share /machine: handling code with llvm-cvtres too adds 31908669c6d [docs][llvm-symbolizer] Fix typo and grammar error adds ad805ef95a7 Recognise debug_types.dwo as a debug info section adds 61de6a4e9c5 [NFC][SCEV] Add NoWrapFlag argument to InsertBinOp adds 91bb72a337a [bindings/go][NFC] Format code with go fmt adds 757ac02dc8f [ARM] Implement TTI::isHardwareLoopProfitable adds 04112ecd41a [clangd] Return TextEdits from ClangdServer::applyTweak adds 52d3e4b4aa5 [Legacy LTO] Fix build bots: r363140: Fix export name adds 5e3aa264a84 gn build: Merge r363122 adds a4db4bb0238 [X86][AVX] Tests showing missing concat(shuffle,shuffle) -> [...] adds 2aa3f3d43f7 gn build: add RISCV target adds 8bbdea447ed Fix a Wunused-lambda-capture warning. adds ece316b56a2 Attempt to fix non-Arm buildbots adds 52d7326f326 [NFC] Add HardwareLoops lit.local.cfg file adds 1e21181aee4 LoopDistribute/LAA: Add tests to catch regressions adds 4c69c56bd1f gn build: Add Mips target adds 2466ba97bcc LoopDistribute/LAA: Respect convergent adds e2f94974dfd [DebugInfo] Add a test that fell out of an earlier commit adds 86325be3d70 LoopLoadElim: Respect convergent adds 082a41994ac [InstCombine] add tests for fcmp+select with FMF (minnum/ma [...] adds 339b39b7733 [MIR] Skip hoisting to basic block which may throw exceptio [...] adds aa6bdf9dcd5 LoopVersioning: Respect convergent adds 030df51e27e [ARM] Fix compiler warning adds 7eddb16fed9 [compiler-rt] Fix name_to_handle_at.cc test on Overlay2 (fo [...] adds 61f6395fd01 AMDGPU/GlobalISel: Fix using illegal situations in tests adds f29366b1f59 StackProtector: Use PointerMayBeCaptured adds cae2c85deae gn build: Add SystemZ target adds a866d3b2eed [CMake] Two extra FOLDER properties for debugserver adds 61a7ab7fdb2 [lldb] Ignore null frames in lldb.macosx crashlog adds 48365ec3e14 [NFC[ Updated tests for D54411 adds 3d42959dd8a Revert rL363156. adds 64006896ac0 [InstCombine] add tests for fmin/fmax libcalls; NFC adds 5b0e0dd709f [X86][AVX] Fold concat(vpermilps(x,c),vpermilps(y,c)) -> vp [...] adds 4e0648a541f [TargetLowering] Add MachineMemOperand::Flags to allowsMemo [...] adds e51c3d8b824 [SCEV] Teach computeSCEVAtScope benefit from one-input Phi. [...] adds ef7d4fbe809 [X86][SSE] Avoid unnecessary stack codegen in NT merge-cons [...] adds 8f4973f57b0 [llvm-lipo] Update llvm-lipo docs for -archs flag adds 5b99928ba88 [Expression] Add PersistentExpressionState::GetCompilerType [...] adds efc0d1a2980 [Mips] Add s.d instruction alias for Mips1 adds 5f581c9f08e [AMDGPU] gfx1010 premlane instructions adds 245b5ba3448 [AMDGPU] gfx1010 dpp16 and dpp8 adds fa880e6114c [analyzer] ProgramPoint: more explicit printJson() adds c69cc842537 PR42220: take into account the possibility of aggregates wi [...] adds 146a154e610 [llvm-ar][test] Relax lit directory assumptions in thin-arc [...] adds 000f9cc62a7 [AMDGPU] more gfx1010 tests. NFC. adds 4e9538997ee [MS] Pretend constexpr variable template specializations ar [...] adds 851adc000cb [Tests] Add tests to highlight sibling loop optimization or [...] adds 00e481b75d8 [Tests] Autogen RLEV test and add tests for a future enhancement adds 2aa5ada267d [NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrins [...] adds b05ce7f9f71 Add comment to r363191 code as requested in code review adds ae2581cef3c [IndVars] Extend diagnostic -replexitval flag w/ability to [...] adds 782fff1bf87 [libcxx] XFAIL some CTAD tests on AppleClang 10 adds 565f1e2298c [llvm-readobj] Fix output interleaving issue caused by usin [...] adds 514cfdb18db [test] Reinstate the assignment to the diagnostic log in th [...] adds 27a5db9de57 [NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrins [...] adds 4548c1cfca4 Sanitize llvm-extract -help output new 87f75ecd720 Skip failing test on older versions of clang. new a1421e83471 [x86] add tests for vector shifts; NFC new f36d83735e3 [clang-scan-deps] initial outline of the tool that runs pre [...] new aeffc15f976 NFC, fixup indentation in CMakeLists.txt from r363204 as re [...] new 0e197bcb6b8 Re-land r363103 ("When reading ObjC class table, use new SP [...] new b66be8c4d35 NFC, Update the ClangScanDeps.cpp file's license comment new d2643516282 [clang-scan-deps] Include <mutex> in ClangScanDeps.cpp to e [...] new c45f592b98f [libcxx] XFAIL set/multiset CTAD tests on Apple Clang 10 new 781a0dc58d4 [llvm] Expose DWARFDebugLine::LineTable::getFileNameEntry new ef96e985fcc [Reproducers] Simplify providers with nested Info struct (NFC) new efc01eac173 [lld] Allow unrecognized signatures in debug sections new 5584ab89a88 [lld] Fix type server merging with PDBs without IPI stream The 12 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../clang-tidy/misc/RedundantExpressionCheck.cpp | 26 +- clang-tools-extra/clangd/ClangdLSPServer.cpp | 4 +- clang-tools-extra/clangd/ClangdServer.cpp | 15 +- clang-tools-extra/clangd/ClangdServer.h | 2 +- clang-tools-extra/clangd/TUScheduler.cpp | 2 +- .../test/clang-tidy/misc-redundant-expression.cpp | 16 +- clang/README.txt | 1 - clang/lib/AST/ASTContext.cpp | 23 +- clang/lib/Analysis/ProgramPoint.cpp | 43 +- clang/lib/CodeGen/TargetInfo.cpp | 56 +- clang/lib/Headers/CMakeLists.txt | 1 + clang/lib/Headers/ppc_wrappers/emmintrin.h | 2318 ++++++++++++++ clang/lib/Sema/SemaExpr.cpp | 2 + clang/lib/Sema/SemaInit.cpp | 3 + clang/test/CMakeLists.txt | 1 + clang/test/ClangScanDeps/Inputs/header.h | 3 + clang/test/ClangScanDeps/Inputs/header2.h | 1 + clang/test/ClangScanDeps/Inputs/regular_cdb.json | 12 + clang/test/ClangScanDeps/regular_cdb.cpp | 27 + clang/test/CodeGen/ppc-emmintrin.c | 3253 ++++++++++++++++++++ clang/test/CodeGen/x86_32-arguments-linux.c | 4 +- clang/test/CodeGen/x86_32-m64.c | 29 + .../test/CodeGenCXX/ms-constexpr-var-template.cpp | 11 + clang/test/CodeGenCXX/temporaries.cpp | 18 + clang/test/Headers/ppc-sse2-intrinsics.c | 14 + clang/test/SemaTemplate/default-arguments.cpp | 6 + clang/tools/CMakeLists.txt | 1 + clang/tools/clang-scan-deps/CMakeLists.txt | 26 + clang/tools/clang-scan-deps/ClangScanDeps.cpp | 218 ++ clang/unittests/Frontend/CompilerInstanceTest.cpp | 4 + compiler-rt/lib/profile/InstrProfiling.h | 21 +- compiler-rt/lib/profile/InstrProfilingFile.c | 64 +- compiler-rt/lib/profile/InstrProfilingUtil.c | 20 - compiler-rt/lib/profile/InstrProfilingUtil.h | 2 - .../profile/instrprof-set-file-object-merging.c | 43 - .../test/profile/instrprof-set-file-object.c | 31 - .../TestCases/Linux/name_to_handle_at.cc | 2 +- libcxx/docs/DesignDocs/ExtendedCXX03Support.rst | 118 + libcxx/docs/index.rst | 1 + libcxx/include/__config | 13 +- libcxx/include/__functional_base | 10 +- libcxx/include/__tuple | 42 +- libcxx/include/functional | 6 +- libcxx/include/memory | 114 +- libcxx/include/tuple | 22 +- libcxx/include/type_traits | 72 +- libcxx/include/utility | 32 +- .../libcxx/minimal_cxx11_configuration.pass.cpp | 135 + .../func.wrap.func.con/move_reentrant.pass.cpp | 0 .../nullptr_t_assign_reentrant.pass.cpp | 0 .../associative/map/map.cons/deduct.fail.cpp | 2 +- .../multimap/multimap.cons/deduct.fail.cpp | 2 +- .../multiset/multiset.cons/deduct.fail.cpp | 2 +- .../associative/set/set.cons/deduct.fail.cpp | 2 +- lld/COFF/Chunks.cpp | 11 +- lld/COFF/Driver.cpp | 3 +- lld/COFF/PDB.cpp | 33 +- lld/COFF/SymbolTable.cpp | 2 +- lld/ELF/Arch/PPC.cpp | 4 +- lld/ELF/Arch/PPC64.cpp | 57 +- lld/ELF/Arch/RISCV.cpp | 14 + lld/ELF/InputSection.cpp | 5 +- lld/ELF/Relocations.cpp | 14 +- lld/ELF/Relocations.h | 1 + lld/test/COFF/Inputs/no-ipi-stream-obj.obj.yaml | 13 + lld/test/COFF/Inputs/no-ipi-stream-pdb.pdb.yaml | 2 + lld/test/COFF/allow-unknown-debug-info.test | 26 + lld/test/COFF/no-ipi-stream.test | 4 + lld/test/ELF/comdat-discarded-ppc64.s | 17 + lld/test/ELF/riscv-reloc-add.s | 26 + lldb/examples/python/crashlog.py | 4 + lldb/include/lldb/Expression/ExpressionVariable.h | 3 + lldb/include/lldb/Target/LanguageRuntime.h | 4 +- lldb/include/lldb/Utility/Reproducer.h | 26 +- lldb/include/lldb/lldb-enumerations.h | 1 + lldb/lit/Modules/ELF/section-types.yaml | 7 + .../lit/SymbolFile/DWARF/debug-types-line-tables.s | 185 ++ lldb/lit/SymbolFile/DWARF/forward-declarations.s | 111 + .../persistent_types/TestPersistentTypes.py | 10 + .../return-value/TestReturnValue.py | 1 + lldb/source/API/SBDebugger.cpp | 2 +- lldb/source/API/SBReproducer.cpp | 6 +- lldb/source/API/SBReproducerPrivate.h | 10 +- lldb/source/Commands/CMakeLists.txt | 1 - lldb/source/Commands/CommandObjectMemory.cpp | 96 +- lldb/source/Core/Section.cpp | 2 + .../Initialization/SystemInitializerCommon.cpp | 2 +- .../Clang/ClangPersistentVariables.cpp | 16 + .../Clang/ClangPersistentVariables.h | 3 + .../ItaniumABI/ItaniumABILanguageRuntime.cpp | 6 +- .../ObjC/AppleObjCRuntime/AppleObjCRuntime.cpp | 6 +- .../ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp | 12 +- .../Plugins/ObjectFile/ELF/ObjectFileELF.cpp | 1 + .../Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp | 1 + .../Plugins/Process/FreeBSD/ProcessFreeBSD.h | 2 +- .../Process/gdb-remote/ProcessGDBRemote.cpp | 19 +- .../SymbolFile/DWARF/DWARFASTParserClang.cpp | 80 +- .../Plugins/SymbolFile/DWARF/DWARFASTParserClang.h | 9 +- .../Plugins/SymbolFile/DWARF/DWARFBaseDIE.cpp | 7 - .../source/Plugins/SymbolFile/DWARF/DWARFBaseDIE.h | 2 - .../Plugins/SymbolFile/DWARF/DWARFCompileUnit.h | 2 + .../Plugins/SymbolFile/DWARF/DWARFTypeUnit.h | 4 +- lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 105 +- lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h | 12 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 61 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 7 + lldb/source/Symbol/ObjectFile.cpp | 1 + lldb/source/Target/LanguageRuntime.cpp | 3 - lldb/source/Utility/Reproducer.cpp | 12 +- lldb/tools/debugserver/source/CMakeLists.txt | 4 + lldb/unittests/Utility/ReproducerTest.cpp | 16 +- llvm/.gitignore | 2 + llvm/bindings/go/llvm/dibuilder.go | 26 +- llvm/bindings/go/llvm/ir.go | 95 +- llvm/bindings/go/llvm/transforms_coroutines.go | 8 +- llvm/docs/CommandGuide/llvm-lipo.rst | 6 + llvm/docs/CommandGuide/llvm-nm.rst | 4 +- llvm/docs/CommandGuide/llvm-symbolizer.rst | 5 +- llvm/docs/GetElementPtr.rst | 18 +- llvm/include/llvm-c/lto.h | 50 +- llvm/include/llvm/Analysis/LoopAccessAnalysis.h | 6 + .../llvm/Analysis/ScalarEvolutionExpander.h | 2 +- llvm/include/llvm/CodeGen/BasicTTIImpl.h | 9 +- llvm/include/llvm/CodeGen/StackProtector.h | 6 - llvm/include/llvm/CodeGen/TargetLowering.h | 16 +- llvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h | 7 +- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 20 + llvm/include/llvm/LTO/legacy/LTOModule.h | 11 +- .../LibDriver.h => Object/WindowsMachineFlag.h} | 15 +- llvm/include/llvm/ToolDrivers/llvm-lib/LibDriver.h | 14 - llvm/lib/Analysis/LoopAccessAnalysis.cpp | 64 +- llvm/lib/Analysis/ScalarEvolution.cpp | 14 +- llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 48 +- llvm/lib/CodeGen/MachineCSE.cpp | 2 + llvm/lib/CodeGen/RegisterCoalescer.cpp | 12 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 3 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 3 +- llvm/lib/CodeGen/StackProtector.cpp | 39 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 5 +- llvm/lib/LTO/LTOModule.cpp | 32 +- llvm/lib/Object/CMakeLists.txt | 1 + llvm/lib/Object/WindowsMachineFlag.cpp | 44 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 14 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 7 +- llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 15 +- llvm/lib/Target/AMDGPU/AMDGPU.td | 15 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 6 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 5 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 164 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 35 + .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 3 +- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 44 + llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h | 2 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 88 + .../Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h | 4 + llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 10 +- llvm/lib/Target/AMDGPU/R600ISelLowering.h | 7 +- llvm/lib/Target/AMDGPU/SIDefines.h | 15 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 25 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 7 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 41 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 66 + llvm/lib/Target/AMDGPU/VOP1Instructions.td | 80 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 106 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 28 + llvm/lib/Target/AMDGPU/VOPInstructions.td | 47 +- llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 3 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 11 +- llvm/lib/Target/ARM/ARMISelLowering.h | 1 + llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 194 ++ llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 6 + llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 5 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 2 +- llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 50 + llvm/lib/Target/Mips/Mips16ISelLowering.cpp | 7 +- llvm/lib/Target/Mips/Mips16ISelLowering.h | 1 + llvm/lib/Target/Mips/MipsInstrFPU.td | 8 + llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 7 +- llvm/lib/Target/Mips/MipsSEISelLowering.h | 7 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 1 + llvm/lib/Target/PowerPC/PPCISelLowering.h | 8 +- .../Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp | 1 + .../RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp | 8 +- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 73 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 6 +- llvm/lib/Target/SystemZ/SystemZISelLowering.h | 1 + .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 3 +- .../Target/WebAssembly/WebAssemblyISelLowering.h | 1 + llvm/lib/Target/X86/X86ISelLowering.cpp | 39 +- llvm/lib/Target/X86/X86ISelLowering.h | 3 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 2 + llvm/lib/Target/XCore/XCoreISelLowering.cpp | 54 +- llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp | 26 +- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 7 +- llvm/lib/Transforms/Scalar/LoopDistribute.cpp | 15 +- llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp | 6 + llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 8 +- llvm/lib/Transforms/Utils/LoopVersioning.cpp | 5 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 20 +- .../unsafe-and-rt-checks-convergent.ll | 73 + llvm/test/CodeGen/AArch64/global-merge-minsize.ll | 21 + .../CodeGen/AArch64/machine_cse_illegal_hoist.ll | 52 + .../AMDGPU/GlobalISel/inst-select-load-flat.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-load-smrd.mir | 18 +- .../GlobalISel/regbankselect-insert-vector-elt.mir | 24 +- .../AMDGPU/GlobalISel/regbankselect-phi.mir | 29 +- llvm/test/CodeGen/AMDGPU/basic-branch.ll | 1 + .../CodeGen/AMDGPU/fmul-2-combine-multi-use.ll | 104 +- llvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir | 2 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll | 168 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll | 39 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll | 26 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll | 311 ++ llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll | 43 +- llvm/test/CodeGen/AMDGPU/smem-war-hazard.mir | 2 +- llvm/test/CodeGen/AMDGPU/v_cndmask.ll | 2 +- llvm/test/CodeGen/AMDGPU/vcmpx-exec-war-hazard.mir | 2 +- llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir | 145 + llvm/test/CodeGen/AVR/features/avr-tiny.ll | 6 +- llvm/test/CodeGen/AVR/features/avr25.ll | 4 +- .../PowerPC/combine-sext-and-shl-after-isel.ll | 76 + llvm/test/CodeGen/RISCV/frame-info.ll | 66 + llvm/test/CodeGen/RISCV/inline-asm.ll | 6 +- .../CodeGen/X86/avx512vl-intrinsics-fast-isel.ll | 1400 ++++++++- llvm/test/CodeGen/X86/combine-fabs.ll | 32 + llvm/test/CodeGen/X86/conditional-tailcall.ll | 476 ++- .../CodeGen/X86/merge-consecutive-stores-nt.ll | 16 +- llvm/test/CodeGen/X86/stack-protector.ll | 4 +- llvm/test/CodeGen/X86/tail-merge-after-mbp.mir | 68 +- llvm/test/CodeGen/X86/tail-opts.ll | 408 ++- llvm/test/CodeGen/X86/vector-shift-lshr-128.ll | 181 ++ llvm/test/CodeGen/X86/vector-shift-shl-128.ll | 344 +++ llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll | 40 + llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll | 40 + llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 33 + llvm/test/DebugInfo/AArch64/inlined-argument.ll | 149 +- .../DebugInfo/X86/live-debug-values-constprop.mir | 347 +++ .../LTO/X86/Inputs/list-dependent-libraries.ll | 6 + llvm/test/LTO/X86/list-dependent-libraries.ll | 18 + llvm/test/MC/AMDGPU/dpp-err.s | 38 + llvm/test/MC/AMDGPU/expressions-gfx10.s | 2 +- llvm/test/MC/AMDGPU/vop3-literal.s | 389 +++ llvm/test/MC/Mips/mips1/sd.s | 13 + .../Transforms/CodeGenPrepare/X86/vec-shift.ll | 117 + llvm/test/Transforms/HardwareLoops/ARM/calls.ll | 404 +++ llvm/test/Transforms/HardwareLoops/ARM/counter.ll | 35 + llvm/test/Transforms/HardwareLoops/ARM/do-rem.ll | 259 ++ .../Transforms/HardwareLoops/ARM/fp-emulation.ll | 207 ++ .../HardwareLoops}/ARM/lit.local.cfg | 0 .../test/Transforms/HardwareLoops/ARM/simple-do.ll | 155 + .../test/Transforms/HardwareLoops/ARM/structure.ll | 72 + .../Transforms/IndVarSimplify/exit_value_tests.ll | 228 +- llvm/test/Transforms/IndVarSimplify/pr39673.ll | 154 +- llvm/test/Transforms/InstCombine/fast-math.ll | 18 + llvm/test/Transforms/InstCombine/minmax-fp.ll | 132 + .../LoopDistribute/basic-with-memchecks.ll | 178 ++ llvm/test/Transforms/LoopDistribute/basic.ll | 76 + .../convergent-no-cross-partition-checks.ll | 87 + llvm/test/Transforms/LoopDistribute/diagnostics.ll | 58 + .../LoopDistribute/scev-inserted-runtime-check.ll | 83 +- .../Transforms/LoopIdiom/bcmp-debugify-remarks.ll | 52 +- .../LoopIdiom/memset-debugify-remarks.ll | 16 +- llvm/test/Transforms/LoopLoadElim/convergent.ll | 51 + llvm/test/Transforms/LoopSimplify/dbg-loc.ll | 2 +- .../Transforms/LoopSimplify/do-preheader-dbg.ll | 122 - .../Transforms/LoopSimplify/for-preheader-dbg.ll | 102 - llvm/test/Transforms/LoopUnroll/runtime-loop1.ll | 16 +- .../X86/vectorization-remarks-missed.ll | 12 +- .../X86/vectorization-remarks-profitable.ll | 4 +- llvm/test/Transforms/LoopVectorize/debugloc.ll | 9 +- .../Transforms/LoopVectorize/fix-reduction-dbg.ll | 87 - llvm/test/Transforms/LoopVectorize/read-only.ll | 30 + .../Transforms/LoopVectorize/unsafe-dep-remark.ll | 2 +- llvm/test/Transforms/LoopVectorize/write-only.ll | 23 + llvm/test/Transforms/LoopVersioning/convergent.ll | 40 + .../test/Transforms/StackProtector/X86/captures.ll | 139 + .../StackProtector}/X86/lit.local.cfg | 0 llvm/test/tools/llvm-ar/thin-archive.test | 12 +- llvm/test/tools/llvm-lto/error.ll | 3 + .../tools/llvm-readobj/check-output-order.test | 45 + llvm/tools/llvm-cvtres/llvm-cvtres.cpp | 39 +- llvm/tools/llvm-extract/llvm-extract.cpp | 87 +- llvm/tools/llvm-lto/llvm-lto.cpp | 43 +- llvm/tools/llvm-nm/llvm-nm.cpp | 2 +- llvm/tools/llvm-readobj/COFFDumper.cpp | 2 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 7 +- llvm/tools/llvm-readobj/MachODumper.cpp | 2 +- llvm/tools/llvm-readobj/llvm-readobj.cpp | 19 +- llvm/tools/lto/lto.cpp | 25 +- llvm/tools/lto/lto.exports | 4 + llvm/tools/opt/opt.cpp | 1 + llvm/utils/gn/TODO.txt | 2 +- llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn | 1 + llvm/utils/gn/secondary/llvm/lib/Object/BUILD.gn | 1 + .../llvm/lib/Target/Mips/AsmParser/BUILD.gn | 23 + .../gn/secondary/llvm/lib/Target/Mips/BUILD.gn | 118 + .../llvm/lib/Target/Mips/Disassembler/BUILD.gn | 22 + .../llvm/lib/Target/Mips/MCTargetDesc/BUILD.gn | 76 + .../llvm/lib/Target/Mips/TargetInfo/BUILD.gn | 10 + .../llvm/lib/Target/RISCV/AsmParser/BUILD.gn | 24 + .../gn/secondary/llvm/lib/Target/RISCV/BUILD.gn | 78 + .../llvm/lib/Target/RISCV/Disassembler/BUILD.gn | 22 + .../llvm/lib/Target/RISCV/MCTargetDesc/BUILD.gn | 73 + .../llvm/lib/Target/RISCV/TargetInfo/BUILD.gn | 10 + .../secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn | 25 + .../llvm/lib/Target/SystemZ/AsmParser/BUILD.gn | 23 + .../gn/secondary/llvm/lib/Target/SystemZ/BUILD.gn | 74 + .../llvm/lib/Target/SystemZ/Disassembler/BUILD.gn | 23 + .../llvm/lib/Target/SystemZ/MCTargetDesc/BUILD.gn | 60 + .../llvm/lib/Target/SystemZ/TargetInfo/BUILD.gn | 10 + .../utils/gn/secondary/llvm/lib/Target/targets.gni | 8 + polly/include/polly/ScopBuilder.h | 19 + polly/include/polly/ScopInfo.h | 43 +- polly/lib/Analysis/ScopBuilder.cpp | 21 +- polly/lib/Analysis/ScopInfo.cpp | 19 - 316 files changed, 17190 insertions(+), 2083 deletions(-) create mode 100644 clang/lib/Headers/ppc_wrappers/emmintrin.h create mode 100644 clang/test/ClangScanDeps/Inputs/header.h create mode 100644 clang/test/ClangScanDeps/Inputs/header2.h create mode 100644 clang/test/ClangScanDeps/Inputs/regular_cdb.json create mode 100644 clang/test/ClangScanDeps/regular_cdb.cpp create mode 100644 clang/test/CodeGen/ppc-emmintrin.c create mode 100644 clang/test/CodeGen/x86_32-m64.c create mode 100644 clang/test/CodeGenCXX/ms-constexpr-var-template.cpp create mode 100644 clang/test/Headers/ppc-sse2-intrinsics.c create mode 100644 clang/tools/clang-scan-deps/CMakeLists.txt create mode 100644 clang/tools/clang-scan-deps/ClangScanDeps.cpp delete mode 100644 compiler-rt/test/profile/instrprof-set-file-object-merging.c delete mode 100644 compiler-rt/test/profile/instrprof-set-file-object.c create mode 100644 libcxx/docs/DesignDocs/ExtendedCXX03Support.rst create mode 100644 libcxx/test/libcxx/minimal_cxx11_configuration.pass.cpp rename libcxx/test/{std => libcxx}/utilities/function.objects/func.wrap/func.wrap. [...] rename libcxx/test/{std => libcxx}/utilities/function.objects/func.wrap/func.wrap. [...] create mode 100644 lld/test/COFF/Inputs/no-ipi-stream-obj.obj.yaml create mode 100644 lld/test/COFF/Inputs/no-ipi-stream-pdb.pdb.yaml create mode 100644 lld/test/COFF/allow-unknown-debug-info.test create mode 100644 lld/test/COFF/no-ipi-stream.test create mode 100644 lld/test/ELF/comdat-discarded-ppc64.s create mode 100644 lld/test/ELF/riscv-reloc-add.s create mode 100644 lldb/lit/SymbolFile/DWARF/debug-types-line-tables.s create mode 100644 lldb/lit/SymbolFile/DWARF/forward-declarations.s copy llvm/include/llvm/{ToolDrivers/llvm-lib/LibDriver.h => Object/WindowsMachineF [...] create mode 100644 llvm/lib/Object/WindowsMachineFlag.cpp create mode 100644 llvm/test/Analysis/LoopAccessAnalysis/unsafe-and-rt-checks-conv [...] create mode 100644 llvm/test/CodeGen/AArch64/global-merge-minsize.ll create mode 100644 llvm/test/CodeGen/AArch64/machine_cse_illegal_hoist.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll create mode 100644 llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir create mode 100644 llvm/test/CodeGen/PowerPC/combine-sext-and-shl-after-isel.ll create mode 100644 llvm/test/CodeGen/RISCV/frame-info.ll create mode 100644 llvm/test/DebugInfo/X86/live-debug-values-constprop.mir create mode 100644 llvm/test/LTO/X86/Inputs/list-dependent-libraries.ll create mode 100644 llvm/test/LTO/X86/list-dependent-libraries.ll create mode 100644 llvm/test/MC/AMDGPU/dpp-err.s create mode 100644 llvm/test/MC/AMDGPU/vop3-literal.s create mode 100644 llvm/test/MC/Mips/mips1/sd.s create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/vec-shift.ll create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/calls.ll create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/counter.ll create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/do-rem.ll create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/fp-emulation.ll copy llvm/test/{Analysis/CostModel => Transforms/HardwareLoops}/ARM/lit.local.cfg (100%) create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/simple-do.ll create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/structure.ll create mode 100644 llvm/test/Transforms/LoopDistribute/convergent-no-cross-partiti [...] create mode 100644 llvm/test/Transforms/LoopLoadElim/convergent.ll delete mode 100755 llvm/test/Transforms/LoopSimplify/do-preheader-dbg.ll delete mode 100755 llvm/test/Transforms/LoopSimplify/for-preheader-dbg.ll delete mode 100755 llvm/test/Transforms/LoopVectorize/fix-reduction-dbg.ll create mode 100644 llvm/test/Transforms/LoopVersioning/convergent.ll create mode 100644 llvm/test/Transforms/StackProtector/X86/captures.ll copy llvm/test/{Analysis/CostModel => Transforms/StackProtector}/X86/lit.local.cfg (100%) create mode 100644 llvm/test/tools/llvm-readobj/check-output-order.test create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/Mips/AsmParser/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/Mips/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/Mips/Disassembler/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/Mips/MCTargetDesc/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/Mips/TargetInfo/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Disassembler/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCTargetDesc/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/RISCV/TargetInfo/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/AsmParser/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/Disassembler/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/MCTargetDesc/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/TargetInfo/BUILD.gn -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig updated (f1756678 -> 78de2826)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/base-artifacts. discards f1756678 0: update: llvm-linux: boot new 78de2826 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (f1756678) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 11818 +++++++++++++++---------------- 03-build_linux/console.log | 1800 +++-- 04-boot_linux/console.log | 390 +- 05-check_regression/console.log | 6 +- 06-update_baseline/console.log | 25 - console.log | 14259 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 14242 insertions(+), 14284 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[gcc] branch master updated (c1df40f9129 -> 518af62d9ff)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from c1df40f9129 Tweak tests to avoid fallout from MEM_REF changes on target [...] new 3c58902657c 2019-06-12 Steven G. Kargl <kargl(a)gcc.gnu.org> new 518af62d9ff PR c++/90825 - endless recursion when evaluating sizeof. [...] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/cp/ChangeLog | 7 +++++++ gcc/cp/constexpr.c | 16 +++++++++++++--- gcc/cp/typeck.c | 2 +- gcc/fortran/ChangeLog | 4 ++++ gcc/fortran/gfortran.h | 2 -- gcc/testsuite/ChangeLog | 7 +++++++ gcc/testsuite/g++.dg/cpp0x/constexpr-sizeof2.C | 14 ++++++++++++++ gcc/testsuite/g++.dg/cpp0x/constexpr-sizeof3.C | 22 ++++++++++++++++++++++ 8 files changed, 68 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/constexpr-sizeof2.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/constexpr-sizeof3.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[lld] branch master updated (f03e85073 -> d2c107589)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lld. from f03e85073 [lld] Allow unrecognized signatures in debug sections new d2c107589 [lld] Fix type server merging with PDBs without IPI stream The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: COFF/PDB.cpp | 33 +++++++++++++++++------------ test/COFF/Inputs/no-ipi-stream-obj.obj.yaml | 13 ++++++++++++ test/COFF/Inputs/no-ipi-stream-pdb.pdb.yaml | 2 ++ test/COFF/no-ipi-stream.test | 4 ++++ 4 files changed, 39 insertions(+), 13 deletions(-) create mode 100644 test/COFF/Inputs/no-ipi-stream-obj.obj.yaml create mode 100644 test/COFF/Inputs/no-ipi-stream-pdb.pdb.yaml create mode 100644 test/COFF/no-ipi-stream.test -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig updated (a7e95895e31 -> c1df40f9129)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig in repository toolchain/ci/gcc. from a7e95895e31 removed extra .com, fixed e-mail. adds 5e910f42d78 Daily bump. adds 02a6d269a5b PR c/90760 * symtab.c (symtab_node::set_section): Allow b [...] adds 1a9652efb27 Remove wrong assert about single value profiler. adds b1a4ffbd1cd [arm] Implement usadv16qi and ssadv16qi standard names adds 39f01bff30f PR target/90811 * cfgexpand.c (align_local_variable): Add [...] adds 7809986b866 Remove value_range_constant_singleton in favor of value_ran [...] adds 163a5418c8c Disable hash-table sanitization for mem stats maps. adds 00f08bc3d9b Replace std::to_string for integers with optimized version adds 7445abf1ee5 Simplify std::scoped_lock destructor adds 387a4a81a22 Improve static_assert messages for std::variant adds 2461f833466 [nvptx] Assert fork has at most one join in nvptx_find_par adds 5a1fde43e26 PR tree-optimization/90662 - strlen of a string in a vla pl [...] adds 67af9e6caef PR middle-end/90676 - default GIMPLE dumps lack information adds 04bff9f0663 Update last ChangeLog entry. adds a0ebfde01bd 2019-06-12 Steven G. Kargl <kargl(a)gcc.gnu.org> adds 48aa9227888 Initial TI PRU GCC port adds b77c1d39033 Fix ChangeLog dates for last commit adds 83abca3ef97 Initial TI PRU libgcc port adds 8470cffad65 testsuite: Add PRU tests adds 7a7df8db43e testsuite: Add check for overflowed IMEM region to testsuite adds 5680ce37226 testsuite: Add check for unsupported TI ABI PRU features to [...] adds 7b1d1084e5d testsuite: Remove PRU from test cases requiring hosted environment adds d7a38ce27c1 testsuite: Define PRU stack usage adds 68480b8d5f6 testsuite: Mark that PRU has one-cycle jumps adds 593c1013643 testsuite: Mark that PRU uses all function pointer bits adds 50324c06a83 testsuite: Mark testsuite that PRU has different adds 330383590de Add myself to MAINTAINERS adds d51263b41ff Fix incorrect __cpp_lib_parallel_algorithm macro definitions adds 6233ade970a PR c++/90736 - bogus error with alignof. * constexpr.c (a [...] new c1df40f9129 Tweak tests to avoid fallout from MEM_REF changes on target [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 9 + MAINTAINERS | 1 + configure | 7 + configure.ac | 7 + gcc/ChangeLog | 86 + gcc/DATESTAMP | 2 +- gcc/cfgexpand.c | 19 +- gcc/common/config/pru/pru-common.c | 36 + gcc/config.gcc | 9 + gcc/config/arm/iterators.md | 3 + gcc/config/arm/neon.md | 26 + gcc/config/arm/unspecs.md | 2 + gcc/config/nvptx/nvptx.c | 1 + gcc/config/pru/alu-zext.md | 181 ++ gcc/config/pru/constraints.md | 108 + gcc/config/pru/predicates.md | 287 ++ gcc/config/pru/pru-opts.h | 31 + gcc/config/pru/pru-passes.c | 228 ++ gcc/config/pru/pru-pragma.c | 86 + gcc/config/pru/pru-protos.h | 72 + gcc/config/pru/pru.c | 3036 ++++++++++++++++++++ gcc/config/pru/pru.h | 573 ++++ gcc/config/pru/pru.md | 1022 +++++++ gcc/config/pru/pru.opt | 54 + gcc/config/pru/t-pru | 31 + gcc/cp/ChangeLog | 5 + gcc/cp/constexpr.c | 4 +- gcc/doc/extend.texi | 21 + gcc/doc/invoke.texi | 65 + gcc/doc/md.texi | 19 + gcc/fortran/ChangeLog | 6 + gcc/fortran/array.c | 18 +- gcc/ggc-common.c | 2 +- gcc/gimple-ssa-evrp.c | 10 +- gcc/hash-map.h | 9 +- gcc/mem-stats.h | 6 +- gcc/symtab.c | 2 +- gcc/testsuite/ChangeLog | 136 + gcc/testsuite/g++.dg/cpp0x/alignof5.C | 6 + gcc/testsuite/g++.dg/tree-ssa/pr19807.C | 3 +- gcc/testsuite/g++.dg/tree-ssa/ssa-dse-1.C | 4 +- gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C | 2 +- gcc/testsuite/gcc.c-torture/execute/20101011-1.c | 3 + gcc/testsuite/gcc.dg/20020312-2.c | 2 + gcc/testsuite/gcc.dg/builtin-apply2.c | 2 +- gcc/testsuite/gcc.dg/pr90760.c | 8 + gcc/testsuite/gcc.dg/stack-usage-1.c | 2 + gcc/testsuite/gcc.dg/store_merging_5.c | 6 +- gcc/testsuite/gcc.dg/strlenopt-62.c | 189 ++ gcc/testsuite/gcc.dg/strlenopt-63.c | 158 + gcc/testsuite/gcc.dg/strlenopt-64.c | 182 ++ .../gcc.dg/torture/stackalign/builtin-apply-2.c | 2 +- gcc/testsuite/gcc.dg/tree-prof/stringop-2.c | 5 +- gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/dump-6.c | 38 + gcc/testsuite/gcc.dg/tree-ssa/pr30375.c | 3 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/slsr-27.c | 3 +- gcc/testsuite/gcc.dg/tree-ssa/slsr-28.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/slsr-29.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-24.c | 2 +- gcc/testsuite/gcc.target/arm/ssadv16qi.c | 29 + gcc/testsuite/gcc.target/arm/usadv16qi.c | 29 + gcc/testsuite/gcc.target/pru/abi-arg-struct.c | 164 ++ gcc/testsuite/gcc.target/pru/ashiftrt.c | 13 + gcc/testsuite/gcc.target/pru/builtins-1.c | 12 + gcc/testsuite/gcc.target/pru/builtins-error.c | 6 + gcc/testsuite/gcc.target/pru/clearbit.c | 13 + gcc/testsuite/gcc.target/pru/loop-asm.c | 19 + gcc/testsuite/gcc.target/pru/loop-dowhile.c | 45 + gcc/testsuite/gcc.target/pru/loop-hi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-hi-2.c | 17 + gcc/testsuite/gcc.target/pru/loop-qi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-qi-2.c | 17 + gcc/testsuite/gcc.target/pru/loop-short-1.c | 53 + gcc/testsuite/gcc.target/pru/loop-short-2.c | 21 + gcc/testsuite/gcc.target/pru/loop-si-1.c | 41 + gcc/testsuite/gcc.target/pru/loop-si-2.c | 20 + .../gcc.target/pru/loop-u8_pcrel_overflow.c | 42 + gcc/testsuite/gcc.target/pru/loop-ubyte-1.c | 30 + gcc/testsuite/gcc.target/pru/loop-ubyte-2.c | 18 + .../pru/lra-framepointer-fragmentation-1.c | 33 + .../pru/lra-framepointer-fragmentation-2.c | 61 + gcc/testsuite/gcc.target/pru/mabi-ti-1.c | 10 + gcc/testsuite/gcc.target/pru/mabi-ti-2.c | 15 + gcc/testsuite/gcc.target/pru/mabi-ti-3.c | 12 + gcc/testsuite/gcc.target/pru/mabi-ti-4.c | 14 + gcc/testsuite/gcc.target/pru/mabi-ti-5.c | 33 + gcc/testsuite/gcc.target/pru/mabi-ti-6.c | 12 + gcc/testsuite/gcc.target/pru/mabi-ti-7.c | 21 + gcc/testsuite/gcc.target/pru/pr64366.c | 128 + gcc/testsuite/gcc.target/pru/pragma-ctable_entry.c | 22 + gcc/testsuite/gcc.target/pru/pru.exp | 41 + gcc/testsuite/gcc.target/pru/qbbc-1.c | 29 + gcc/testsuite/gcc.target/pru/qbbc-2.c | 15 + gcc/testsuite/gcc.target/pru/qbbc-3.c | 15 + gcc/testsuite/gcc.target/pru/qbbs-1.c | 29 + gcc/testsuite/gcc.target/pru/qbbs-2.c | 15 + gcc/testsuite/gcc.target/pru/setbit.c | 13 + .../gcc.target/pru/zero_extend-and-hisi.c | 16 + .../gcc.target/pru/zero_extend-and-qihi.c | 16 + .../gcc.target/pru/zero_extend-and-qisi.c | 16 + gcc/testsuite/gcc.target/pru/zero_extend-hisi.c | 43 + gcc/testsuite/gcc.target/pru/zero_extend-qihi.c | 43 + gcc/testsuite/gcc.target/pru/zero_extend-qisi.c | 43 + gcc/testsuite/gfortran.dg/pr90002.f90 | 6 + gcc/testsuite/lib/gcc-dg.exp | 11 + gcc/testsuite/lib/target-supports.exp | 35 +- gcc/testsuite/lib/target-utils.exp | 12 + gcc/tree-pretty-print.c | 229 +- gcc/tree-ssa-strlen.c | 77 +- gcc/tree-vrp.c | 15 - gcc/tree-vrp.h | 1 - gcc/value-prof.c | 2 +- gcc/vr-values.c | 5 +- libgcc/ChangeLog | 26 + libgcc/config.host | 7 + libgcc/config/pru/asri.c | 33 + libgcc/config/pru/eqd.c | 45 + libgcc/config/pru/eqf.c | 45 + libgcc/config/pru/ged.c | 45 + libgcc/config/pru/gef.c | 45 + libgcc/config/pru/gtd.c | 45 + libgcc/config/pru/gtf.c | 45 + libgcc/config/pru/led.c | 45 + libgcc/config/pru/lef.c | 45 + libgcc/config/pru/lib2bitcountHI.c | 43 + libgcc/config/pru/lib2divHI.c | 42 + libgcc/config/pru/lib2divQI.c | 42 + libgcc/config/pru/lib2divSI.c | 48 + libgcc/config/pru/libgcc-eabi.ver | 88 + libgcc/config/pru/ltd.c | 45 + libgcc/config/pru/ltf.c | 45 + libgcc/config/pru/mpyll.S | 57 + libgcc/config/pru/pru-abi.h | 109 + libgcc/config/pru/pru-asm.h | 35 + libgcc/config/pru/pru-divmod.h | 117 + libgcc/config/pru/sfp-machine.h | 125 + libgcc/config/pru/t-pru | 50 + libstdc++-v3/ChangeLog | 37 + libstdc++-v3/include/Makefile.am | 1 + libstdc++-v3/include/Makefile.in | 1 + libstdc++-v3/include/bits/basic_string.h | 64 +- libstdc++-v3/include/bits/charconv.h | 106 + libstdc++-v3/include/std/algorithm | 2 +- libstdc++-v3/include/std/charconv | 75 +- libstdc++-v3/include/std/memory | 2 +- libstdc++-v3/include/std/mutex | 6 +- libstdc++-v3/include/std/numeric | 2 +- libstdc++-v3/include/std/variant | 34 +- libstdc++-v3/include/std/version | 1 + .../numeric_conversions/char/to_string.cc | 4 +- .../numeric_conversions/char/to_string_int.cc | 164 ++ .../testsuite/25_algorithms/pstl/feature_test.cc | 50 + 157 files changed, 10143 insertions(+), 285 deletions(-) create mode 100644 gcc/common/config/pru/pru-common.c create mode 100644 gcc/config/pru/alu-zext.md create mode 100644 gcc/config/pru/constraints.md create mode 100644 gcc/config/pru/predicates.md create mode 100644 gcc/config/pru/pru-opts.h create mode 100644 gcc/config/pru/pru-passes.c create mode 100644 gcc/config/pru/pru-pragma.c create mode 100644 gcc/config/pru/pru-protos.h create mode 100644 gcc/config/pru/pru.c create mode 100644 gcc/config/pru/pru.h create mode 100644 gcc/config/pru/pru.md create mode 100644 gcc/config/pru/pru.opt create mode 100644 gcc/config/pru/t-pru create mode 100644 gcc/testsuite/g++.dg/cpp0x/alignof5.C create mode 100644 gcc/testsuite/gcc.dg/pr90760.c create mode 100644 gcc/testsuite/gcc.dg/strlenopt-62.c create mode 100644 gcc/testsuite/gcc.dg/strlenopt-63.c create mode 100644 gcc/testsuite/gcc.dg/strlenopt-64.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/dump-6.c create mode 100644 gcc/testsuite/gcc.target/arm/ssadv16qi.c create mode 100644 gcc/testsuite/gcc.target/arm/usadv16qi.c create mode 100644 gcc/testsuite/gcc.target/pru/abi-arg-struct.c create mode 100644 gcc/testsuite/gcc.target/pru/ashiftrt.c create mode 100644 gcc/testsuite/gcc.target/pru/builtins-1.c create mode 100644 gcc/testsuite/gcc.target/pru/builtins-error.c create mode 100644 gcc/testsuite/gcc.target/pru/clearbit.c create mode 100644 gcc/testsuite/gcc.target/pru/loop-asm.c create mode 100644 gcc/testsuite/gcc.target/pru/loop-dowhile.c create mode 100644 gcc/testsuite/gcc.target/pru/loop-hi-1.c create mode 100644 gcc/testsuite/gcc.target/pru/loop-hi-2.c create mode 100644 gcc/testsuite/gcc.target/pru/loop-qi-1.c create mode 100644 gcc/testsuite/gcc.target/pru/loop-qi-2.c create mode 100644 gcc/testsuite/gcc.target/pru/loop-short-1.c create mode 100644 gcc/testsuite/gcc.target/pru/loop-short-2.c create mode 100644 gcc/testsuite/gcc.target/pru/loop-si-1.c create mode 100644 gcc/testsuite/gcc.target/pru/loop-si-2.c create mode 100644 gcc/testsuite/gcc.target/pru/loop-u8_pcrel_overflow.c create mode 100644 gcc/testsuite/gcc.target/pru/loop-ubyte-1.c create mode 100644 gcc/testsuite/gcc.target/pru/loop-ubyte-2.c create mode 100644 gcc/testsuite/gcc.target/pru/lra-framepointer-fragmentation-1.c create mode 100644 gcc/testsuite/gcc.target/pru/lra-framepointer-fragmentation-2.c create mode 100644 gcc/testsuite/gcc.target/pru/mabi-ti-1.c create mode 100644 gcc/testsuite/gcc.target/pru/mabi-ti-2.c create mode 100644 gcc/testsuite/gcc.target/pru/mabi-ti-3.c create mode 100644 gcc/testsuite/gcc.target/pru/mabi-ti-4.c create mode 100644 gcc/testsuite/gcc.target/pru/mabi-ti-5.c create mode 100644 gcc/testsuite/gcc.target/pru/mabi-ti-6.c create mode 100644 gcc/testsuite/gcc.target/pru/mabi-ti-7.c create mode 100644 gcc/testsuite/gcc.target/pru/pr64366.c create mode 100644 gcc/testsuite/gcc.target/pru/pragma-ctable_entry.c create mode 100644 gcc/testsuite/gcc.target/pru/pru.exp create mode 100644 gcc/testsuite/gcc.target/pru/qbbc-1.c create mode 100644 gcc/testsuite/gcc.target/pru/qbbc-2.c create mode 100644 gcc/testsuite/gcc.target/pru/qbbc-3.c create mode 100644 gcc/testsuite/gcc.target/pru/qbbs-1.c create mode 100644 gcc/testsuite/gcc.target/pru/qbbs-2.c create mode 100644 gcc/testsuite/gcc.target/pru/setbit.c create mode 100644 gcc/testsuite/gcc.target/pru/zero_extend-and-hisi.c create mode 100644 gcc/testsuite/gcc.target/pru/zero_extend-and-qihi.c create mode 100644 gcc/testsuite/gcc.target/pru/zero_extend-and-qisi.c create mode 100644 gcc/testsuite/gcc.target/pru/zero_extend-hisi.c create mode 100644 gcc/testsuite/gcc.target/pru/zero_extend-qihi.c create mode 100644 gcc/testsuite/gcc.target/pru/zero_extend-qisi.c create mode 100644 gcc/testsuite/gfortran.dg/pr90002.f90 create mode 100644 libgcc/config/pru/asri.c create mode 100644 libgcc/config/pru/eqd.c create mode 100644 libgcc/config/pru/eqf.c create mode 100644 libgcc/config/pru/ged.c create mode 100644 libgcc/config/pru/gef.c create mode 100644 libgcc/config/pru/gtd.c create mode 100644 libgcc/config/pru/gtf.c create mode 100644 libgcc/config/pru/led.c create mode 100644 libgcc/config/pru/lef.c create mode 100644 libgcc/config/pru/lib2bitcountHI.c create mode 100644 libgcc/config/pru/lib2divHI.c create mode 100644 libgcc/config/pru/lib2divQI.c create mode 100644 libgcc/config/pru/lib2divSI.c create mode 100644 libgcc/config/pru/libgcc-eabi.ver create mode 100644 libgcc/config/pru/ltd.c create mode 100644 libgcc/config/pru/ltf.c create mode 100644 libgcc/config/pru/mpyll.S create mode 100644 libgcc/config/pru/pru-abi.h create mode 100644 libgcc/config/pru/pru-asm.h create mode 100644 libgcc/config/pru/pru-divmod.h create mode 100644 libgcc/config/pru/sfp-machine.h create mode 100644 libgcc/config/pru/t-pru create mode 100644 libstdc++-v3/include/bits/charconv.h create mode 100644 libstdc++-v3/testsuite/21_strings/basic_string/numeric_conversi [...] create mode 100644 libstdc++-v3/testsuite/25_algorithms/pstl/feature_test.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig updated (d106773eac -> e4c4ac46e8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig in repository toolchain/ci/binutils-gdb. from d106773eac Dwarf: Don't add nameless modules to partial symbol table (C [...] adds 0529f3fe5c Automatic date update in version.in adds 540e617049 Add support to readelf to display NetBSD auxv notes in core files. adds c0d38b0ec6 Add support for NetBSD/sh3 core reg sections to readelf. adds 9abca70219 Add support for NetBSD PaX notes to readelf. adds 62e0492f57 Prevent a seg-fault from objdup when disassembling binaries [...] new 6fbc939cfd Remove the ldmx mnemonic that never made it into POWER9. new a0e44ef56c Add missing ChangeLog entries new 6ce26ac7c3 cpu/or1k: Add support for orfp64a32 spec new d3ad6278d6 cpu/or1k: Define unordered comparisons new eb212c84a1 cpu/or1k: Document no branch delay slot architectures and l.adrp new a2e4218f23 cpu/or1k: Update fpu compare symbols to imply set flag new e4c4ac46e8 opcodes/or1k: Regenerate opcodes The 7 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/ChangeLog | 7 + bfd/elf32-arm.c | 10 +- bfd/elfnn-aarch64.c | 20 ++- bfd/version.h | 2 +- binutils/ChangeLog | 19 +++ binutils/readelf.c | 95 +++++++++--- cpu/ChangeLog | 56 +++++++ cpu/or1k.cpu | 21 +-- cpu/or1k.opc | 92 +++++++++++ cpu/or1kcommon.cpu | 113 +++++++++++--- cpu/or1korbis.cpu | 3 +- cpu/or1korfpx.cpu | 214 +++++++++++++++++++++++--- gas/ChangeLog | 5 + gas/testsuite/gas/ppc/power9.d | 2 - gas/testsuite/gas/ppc/power9.s | 2 - opcodes/ChangeLog | 15 ++ opcodes/or1k-asm.c | 72 ++++++++- opcodes/or1k-desc.c | 309 ++++++++++++++++++++++++++++++++----- opcodes/or1k-desc.h | 341 +++++++++++++++++++++-------------------- opcodes/or1k-dis.c | 43 +++++- opcodes/or1k-ibld.c | 234 ++++++++++++++++++++++++++-- opcodes/or1k-opc.c | 319 ++++++++++++++++++++++++++++++++++---- opcodes/or1k-opc.h | 39 +++-- opcodes/or1k-opinst.c | 100 ++++++++++-- opcodes/ppc-opc.c | 2 - 25 files changed, 1766 insertions(+), 369 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig updated (a8c49d73 -> 2c5b7172)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig in repository toolchain/ci/base-artifacts. discards a8c49d73 0: update: binutils-gcc-linux: boot new 2c5b7172 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a8c49d73) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-lt [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 96 +- 02-prepare_abe/console.log | 400 +- 03-build_abe-binutils/console.log | 11329 ++++++------ 04-build_abe-stage1/console.log | 20061 ++++++++++----------- 05-build_linux/console.log | 2280 ++- 06-boot_linux/console.log | 470 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 39 - console.log | 34262 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 10 files changed, 34446 insertions(+), 34505 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[lldb] branch master updated (362b024a0 -> d827d563f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lldb. from 362b024a0 Re-land r363103 ("When reading ObjC class table, use new SPI [...] new d827d563f [Reproducers] Simplify providers with nested Info struct (NFC) The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/lldb/Utility/Reproducer.h | 26 +++++++++------------- source/API/SBDebugger.cpp | 2 +- source/API/SBReproducer.cpp | 6 ++--- source/API/SBReproducerPrivate.h | 10 ++++----- source/Initialization/SystemInitializerCommon.cpp | 2 +- .../Process/gdb-remote/ProcessGDBRemote.cpp | 19 +++++++--------- source/Utility/Reproducer.cpp | 12 +++++----- unittests/Utility/ReproducerTest.cpp | 16 ++++++------- 8 files changed, 41 insertions(+), 52 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[lld] branch master updated (1dee017bf -> f03e85073)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lld. from 1dee017bf Share /machine: handling code with llvm-cvtres too new f03e85073 [lld] Allow unrecognized signatures in debug sections The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: COFF/Chunks.cpp | 11 ++++++---- ...ts-error.yaml => allow-unknown-debug-info.test} | 25 ++++++++++------------ 2 files changed, 18 insertions(+), 18 deletions(-) copy test/COFF/{Inputs/delayimports-error.yaml => allow-unknown-debug-info.test} (50%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk/llvm-release-arm-spec2k6-O3_LTO updated (0489682ef3b -> 2fb27a25fcb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-release-arm-spec2k6-O3_LTO in repository toolchain/ci/llvm-project. from 0489682ef3b Merging r360405: adds 836f1e2be4c Merging r359891: ------------------------------------------ [...] adds b73bafaff70 Correct test in r362634 adds c8af2415480 Merging r359898: ------------------------------------------ [...] adds 5b37d896a02 Merging r359899: ------------------------------------------ [...] adds d95b14d04ee Merging r360293: ------------------------------------------ [...] adds c493057bdee Merging r360439: adds 0462c73f761 Merging r360442: adds 4db27e1d1e1 Skip globals-fundamental test when Python is disabled adds 897fd6e1bb9 Merging r361237: adds e98c4c8cc77 Merging r355154: adds 0e657d45762 Merging r353905: adds ad5bcd4ee60 Merging r361090: adds 90c370c33dc Merging r351577: adds 9a2cfaed4eb Merging r358042: adds 213f2edbe61 Add release note for DIBuilder API changes adds 2fb27a25fcb Merging r360862: No new revisions were added by this update. Summary of changes: compiler-rt/lib/xray/tests/CMakeLists.txt | 5 +- libunwind/src/UnwindRegistersRestore.S | 238 +++++++++--------- libunwind/src/UnwindRegistersSave.S | 270 ++++++++++----------- libunwind/src/assembly.h | 2 - lld/ELF/InputSection.cpp | 4 - lld/ELF/Writer.cpp | 11 - lld/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s | 4 +- lld/test/ELF/aarch64-tls-gdle.s | 4 +- lld/test/ELF/aarch64-tls-iele.s | 6 +- lld/test/ELF/aarch64-tls-le.s | 8 +- lld/test/ELF/aarch64-tlsld-ldst.s | 50 ++-- lld/test/ELF/arm-tls-le32.s | 12 +- lld/test/ELF/arm-tls-norelax-ie-le.s | 4 +- lld/test/ELF/gc-sections-metadata-startstop.s | 2 +- lld/test/ELF/mips-micro-relocs.s | 6 +- lld/test/ELF/mips-micror6-relocs.s | 4 +- .../SymbolFile/NativePDB/globals-fundamental.cpp | 2 +- llvm/docs/ReleaseNotes.rst | 20 ++ llvm/lib/MC/ELFObjectWriter.cpp | 1 + llvm/lib/MC/MCWin64EH.cpp | 2 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 68 +++--- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 12 +- .../PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp | 30 ++- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 4 +- llvm/lib/Target/Sparc/SparcRegisterInfo.cpp | 4 +- llvm/test/CodeGen/AMDGPU/add.ll | 83 ++----- .../ds-negative-offset-addressing-mode-loop.ll | 6 +- llvm/test/CodeGen/AMDGPU/fence-barrier.ll | 3 +- .../test/CodeGen/AMDGPU/fold-fi-operand-shrink.mir | 230 ++++++++++++++++++ .../AMDGPU/fold-immediate-operand-shrink.mir | 56 +++++ llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll | 3 +- llvm/test/CodeGen/AMDGPU/{add.ll => r600.add.ll} | 56 ----- llvm/test/CodeGen/AMDGPU/{sub.ll => r600.sub.ll} | 95 -------- llvm/test/CodeGen/AMDGPU/salu-to-valu.ll | 2 +- llvm/test/CodeGen/AMDGPU/sub.ll | 90 ++++--- llvm/test/CodeGen/SPARC/fp128.ll | 23 ++ llvm/test/MC/PowerPC/ppc64-localentry-symbols.s | 34 +++ .../test/tools/llvm-objdump/AMDGPU/source-lines.ll | 4 +- .../tools/llvm-objdump/elf-symbol-visibility.test | 37 +++ llvm/tools/llvm-objdump/llvm-objdump.cpp | 30 ++- 40 files changed, 877 insertions(+), 648 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/fold-fi-operand-shrink.mir copy llvm/test/CodeGen/AMDGPU/{add.ll => r600.add.ll} (75%) copy llvm/test/CodeGen/AMDGPU/{sub.ll => r600.sub.ll} (63%) create mode 100644 llvm/test/MC/PowerPC/ppc64-localentry-symbols.s create mode 100644 llvm/test/tools/llvm-objdump/elf-symbol-visibility.test -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits June 2019