Tcwg-commits June 2019

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[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-O2 updated (e6e2424390 -> a26e2e9fea)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-O2 in repository toolchain/ci/glibc. from e6e2424390 Fix malloc tests build with GCC 10. adds 80b2bfb535 Benchmark strstr hard needles adds 5e0a7ecb66 Improve performance of strstr adds 680942b016 Improve performance of memmem adds 4e75c2a43b <sys/cdefs.h>: Add __glibc_has_include macro adds 5dad6ffbb2 <sys/stat.h>: Use Linux UAPI header for statx if available a [...] adds 744e829637 Linux: Deprecate <sys/sysctl.h> and sysctl adds cfa611447b libio: freopen of default streams crashes in old programs [B [...] adds 21bd039bb4 powerpc: consolidate rint adds e41d66e41a powerpc: copysign cleanup adds 2731a326b1 benchtests: Add isnan/isinf/isfinite benchmark adds 197dbda1a1 math: Use wordsize-64 version for isnan adds 2666f96390 powerpc: Remove optimized isnan adds a8c590f789 math: Use wordsize-64 version for isinf adds 6427a6ac8c powerpc: Remove optimized isinf adds a72186761b math: Use wordsize-64 version for finite adds 1192696069 powerpc: Remove optimized finite adds 55f82d328d aarch64: add STO_AARCH64_VARIANT_PCS and DT_AARCH64_VARIANT_PCS adds 82bc69c012 aarch64: handle STO_AARCH64_VARIANT_PCS adds a26e2e9fea Allow memset local PLT reference for powerpc soft-float. No new revisions were added by this update. Summary of changes: ChangeLog | 232 +++++++++++++++++++++ NEWS | 5 + benchtests/Makefile | 5 +- benchtests/bench-strstr.c | 79 +++++++ benchtests/isfinite-inputs | 21 ++ benchtests/isinf-inputs | 21 ++ benchtests/isnan-inputs | 21 ++ elf/elf.h | 7 + include/bits/statx-generic.h | 1 + include/bits/types/struct_statx.h | 1 + include/bits/types/struct_statx_timestamp.h | 1 + include/sys/sysctl.h | 10 - io/Makefile | 4 +- io/bits/statx-generic.h | 60 ++++++ io/bits/statx.h | 73 +------ io/bits/{statx.h => types/struct_statx.h} | 46 +--- .../bits/types/struct_statx_timestamp.h | 26 +-- io/statx_generic.c | 11 +- libio/freopen.c | 2 +- libio/libioP.h | 5 + misc/sys/cdefs.h | 6 + scripts/check-installed-headers.sh | 24 +-- string/memmem.c | 127 +++++++---- string/str-two-way.h | 9 +- string/strstr.c | 165 ++++++++++----- .../s_isnanf-power5.S => aarch64/dl-dtprocnum.h} | 19 +- sysdeps/aarch64/dl-machine.h | 42 +++- sysdeps/aarch64/linkmap.h | 1 + sysdeps/ieee754/dbl-64/s_finite.c | 22 +- sysdeps/ieee754/dbl-64/s_isinf.c | 15 +- sysdeps/ieee754/dbl-64/s_isnan.c | 17 +- sysdeps/ieee754/dbl-64/wordsize-64/s_finite.c | 43 ---- sysdeps/ieee754/dbl-64/wordsize-64/s_isinf.c | 34 --- sysdeps/ieee754/dbl-64/wordsize-64/s_isnan.c | 40 ---- sysdeps/powerpc/fpu/round_to_integer.h | 37 +++- sysdeps/powerpc/fpu/s_copysign.c | 32 +++ sysdeps/powerpc/fpu/s_copysignf.c | 28 +++ sysdeps/powerpc/fpu/s_isnan.c | 62 ------ sysdeps/powerpc/fpu/s_isnanf.S | 1 - sysdeps/powerpc/fpu/s_rint.c | 19 +- sysdeps/powerpc/fpu/s_rintf.c | 19 +- sysdeps/powerpc/powerpc32/fpu/s_copysign.S | 53 ----- sysdeps/powerpc/powerpc32/fpu/s_copysignf.S | 1 - sysdeps/powerpc/powerpc32/fpu/s_isnan.S | 57 ----- sysdeps/powerpc/powerpc32/fpu/s_rint.S | 69 ------ sysdeps/powerpc/powerpc32/fpu/s_rintf.S | 66 ------ .../powerpc32/power4/fpu/multiarch/Makefile | 14 +- .../power4/fpu/multiarch/s_copysign-power6.S | 33 --- .../power4/fpu/multiarch/s_copysign-ppc32.S | 34 --- .../powerpc32/power4/fpu/multiarch/s_copysign.c | 45 ---- .../powerpc32/power4/fpu/multiarch/s_copysignf.c | 34 --- .../power4/fpu/multiarch/s_finite-power7.S | 33 --- .../powerpc32/power4/fpu/multiarch/s_finite.c | 57 ----- .../powerpc32/power4/fpu/multiarch/s_finitef.c | 34 --- .../power4/fpu/multiarch/s_isinf-power7.S | 33 --- .../powerpc32/power4/fpu/multiarch/s_isinf-ppc32.c | 33 --- .../powerpc32/power4/fpu/multiarch/s_isinf.c | 50 ----- .../power4/fpu/multiarch/s_isinff-ppc32.c | 31 --- .../powerpc32/power4/fpu/multiarch/s_isinff.c | 35 ---- .../power4/fpu/multiarch/s_isnan-power5.S | 33 --- .../power4/fpu/multiarch/s_isnan-power6.S | 33 --- .../power4/fpu/multiarch/s_isnan-power7.S | 33 --- .../powerpc32/power4/fpu/multiarch/s_isnan-ppc32.S | 32 --- .../powerpc32/power4/fpu/multiarch/s_isnan.c | 56 ----- .../power4/fpu/multiarch/s_isnanf-power6.S | 28 --- .../powerpc32/power4/fpu/multiarch/s_isnanf.c | 39 ---- sysdeps/powerpc/powerpc32/power5/fpu/s_isnan.S | 61 ------ sysdeps/powerpc/powerpc32/power5/fpu/s_isnanf.S | 45 ---- sysdeps/powerpc/powerpc32/power6/fpu/s_copysign.S | 49 ----- sysdeps/powerpc/powerpc32/power6/fpu/s_copysignf.S | 1 - sysdeps/powerpc/powerpc32/power6/fpu/s_isnan.S | 61 ------ sysdeps/powerpc/powerpc32/power6/fpu/s_isnanf.S | 44 ---- sysdeps/powerpc/powerpc32/power7/fpu/s_finite.S | 93 --------- sysdeps/powerpc/powerpc32/power7/fpu/s_finitef.S | 1 - sysdeps/powerpc/powerpc32/power7/fpu/s_isinf.S | 85 -------- sysdeps/powerpc/powerpc32/power7/fpu/s_isinff.S | 1 - sysdeps/powerpc/powerpc32/power7/fpu/s_isnan.S | 90 -------- sysdeps/powerpc/powerpc32/power7/fpu/s_isnanf.S | 1 - sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile | 9 +- .../powerpc64/fpu/multiarch/s_copysign-power6.S | 32 --- .../powerpc64/fpu/multiarch/s_copysign-ppc64.S | 34 --- .../powerpc/powerpc64/fpu/multiarch/s_copysign.c | 45 ---- .../powerpc/powerpc64/fpu/multiarch/s_copysignf.c | 34 --- .../powerpc64/fpu/multiarch/s_finite-power7.S | 32 --- .../powerpc64/fpu/multiarch/s_finite-power8.S | 32 --- .../powerpc64/fpu/multiarch/s_finite-ppc64.c | 34 --- sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite.c | 69 ------ .../powerpc64/fpu/multiarch/s_finitef-ppc64.c | 32 --- .../powerpc/powerpc64/fpu/multiarch/s_finitef.c | 37 ---- .../powerpc64/fpu/multiarch/s_isinf-power7.S | 32 --- .../powerpc64/fpu/multiarch/s_isinf-power8.S | 32 --- .../powerpc64/fpu/multiarch/s_isinf-ppc64.c | 33 --- sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf.c | 62 ------ .../powerpc64/fpu/multiarch/s_isinff-ppc64.c | 31 --- sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinff.c | 38 ---- .../powerpc64/fpu/multiarch/s_isnan-power5.S | 32 --- .../powerpc64/fpu/multiarch/s_isnan-power6.S | 32 --- .../powerpc64/fpu/multiarch/s_isnan-power6x.S | 32 --- .../powerpc64/fpu/multiarch/s_isnan-power7.S | 32 --- .../powerpc64/fpu/multiarch/s_isnan-power8.S | 32 --- .../powerpc64/fpu/multiarch/s_isnan-ppc64.S | 36 ---- sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan.c | 71 ------- sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnanf.c | 44 ---- sysdeps/powerpc/powerpc64/fpu/s_copysign.S | 53 ----- sysdeps/powerpc/powerpc64/fpu/s_copysignf.S | 1 - sysdeps/powerpc/powerpc64/fpu/s_isnan.S | 56 ----- sysdeps/powerpc/powerpc64/fpu/s_rint.S | 58 ------ sysdeps/powerpc/powerpc64/fpu/s_rintf.S | 57 ----- sysdeps/powerpc/powerpc64/power5/fpu/s_isnan.S | 60 ------ sysdeps/powerpc/powerpc64/power6/fpu/s_copysign.S | 49 ----- sysdeps/powerpc/powerpc64/power6/fpu/s_copysignf.S | 1 - sysdeps/powerpc/powerpc64/power6/fpu/s_isnan.S | 59 ------ sysdeps/powerpc/powerpc64/power6x/fpu/s_isnan.S | 58 ------ sysdeps/powerpc/powerpc64/power7/fpu/s_finite.S | 70 ------- sysdeps/powerpc/powerpc64/power7/fpu/s_finitef.S | 1 - sysdeps/powerpc/powerpc64/power7/fpu/s_isinf.S | 69 ------ sysdeps/powerpc/powerpc64/power7/fpu/s_isinff.S | 1 - sysdeps/powerpc/powerpc64/power7/fpu/s_isnan.S | 68 ------ sysdeps/powerpc/powerpc64/power7/fpu/s_isnanf.S | 1 - sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S | 56 ----- sysdeps/powerpc/powerpc64/power8/fpu/s_finitef.S | 1 - sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S | 61 ------ sysdeps/powerpc/powerpc64/power8/fpu/s_isinff.S | 1 - sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S | 56 ----- sysdeps/powerpc/powerpc64/power8/fpu/s_isnanf.S | 1 - .../sysv/linux/bits/statx.h} | 27 +-- .../linux/powerpc/powerpc32/nofpu/localplt.data | 1 + sysdeps/unix/sysv/linux/sys/sysctl.h | 5 +- sysdeps/unix/sysv/linux/sysctl.c | 4 +- 129 files changed, 892 insertions(+), 3803 deletions(-) create mode 100644 benchtests/isfinite-inputs create mode 100644 benchtests/isinf-inputs create mode 100644 benchtests/isnan-inputs create mode 100644 include/bits/statx-generic.h create mode 100644 include/bits/types/struct_statx.h create mode 100644 include/bits/types/struct_statx_timestamp.h create mode 100644 io/bits/statx-generic.h copy io/bits/{statx.h => types/struct_statx.h} (58%) rename sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_finitef-ppc32.c => io/bits [...] rename sysdeps/{powerpc/powerpc32/power4/fpu/multiarch/s_isnanf-power5.S => aarch6 [...] delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_finite.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_isinf.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_isnan.c create mode 100644 sysdeps/powerpc/fpu/s_copysign.c create mode 100644 sysdeps/powerpc/fpu/s_copysignf.c delete mode 100644 sysdeps/powerpc/fpu/s_isnan.c delete mode 100644 sysdeps/powerpc/fpu/s_isnanf.S delete mode 100644 sysdeps/powerpc/powerpc32/fpu/s_copysign.S delete mode 100644 sysdeps/powerpc/powerpc32/fpu/s_copysignf.S delete mode 100644 sysdeps/powerpc/powerpc32/fpu/s_isnan.S delete mode 100644 sysdeps/powerpc/powerpc32/fpu/s_rint.S delete mode 100644 sysdeps/powerpc/powerpc32/fpu/s_rintf.S delete mode 100644 sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_copysign-power6.S delete mode 100644 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6 years, 2 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-O2 updated (c89f472ebdb -> a9537ef0553)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-O2 in repository toolchain/ci/gcc. from c89f472ebdb 2019-06-11 Richard Biener <rguenther(a)suse.de> adds d5d463f627a PR c++/90449 - add -Winaccessible-base option. [...] adds c434f6f1850 Allow conversions in X/[ex]4 < Y/[ex]4 adds 9a75566e139 2019-06-09 Edward Smith-Rowland <3dw4rd(a)verizon.net> adds 4034da6cb1e PR target/90811 * config/nvptx/nvptx.c (nvptx_output_soft [...] adds 250f66e8534 Do not enable -mpcrel by default at the current time adds 3fcffbe4ca8 Darwin, testsuite - Fix PR 65364 (uninit-19.c). adds be63b32a65f * MAINTAINERS (Write After Approval): Add myself. adds d108f845e22 * config/mips/mips.c (mips_final_postscan_insn): Modify ca [...] adds a7e95895e31 removed extra .com, fixed e-mail. adds 5e910f42d78 Daily bump. adds 02a6d269a5b PR c/90760 * symtab.c (symtab_node::set_section): Allow b [...] adds 1a9652efb27 Remove wrong assert about single value profiler. adds b1a4ffbd1cd [arm] Implement usadv16qi and ssadv16qi standard names adds 39f01bff30f PR target/90811 * cfgexpand.c (align_local_variable): Add [...] adds 7809986b866 Remove value_range_constant_singleton in favor of value_ran [...] adds 163a5418c8c Disable hash-table sanitization for mem stats maps. adds 00f08bc3d9b Replace std::to_string for integers with optimized version adds 7445abf1ee5 Simplify std::scoped_lock destructor adds 387a4a81a22 Improve static_assert messages for std::variant adds 2461f833466 [nvptx] Assert fork has at most one join in nvptx_find_par adds 5a1fde43e26 PR tree-optimization/90662 - strlen of a string in a vla pl [...] adds 67af9e6caef PR middle-end/90676 - default GIMPLE dumps lack information adds 04bff9f0663 Update last ChangeLog entry. adds a0ebfde01bd 2019-06-12 Steven G. Kargl <kargl(a)gcc.gnu.org> adds 48aa9227888 Initial TI PRU GCC port adds b77c1d39033 Fix ChangeLog dates for last commit adds 83abca3ef97 Initial TI PRU libgcc port adds 8470cffad65 testsuite: Add PRU tests adds 7a7df8db43e testsuite: Add check for overflowed IMEM region to testsuite adds 5680ce37226 testsuite: Add check for unsupported TI ABI PRU features to [...] adds 7b1d1084e5d testsuite: Remove PRU from test cases requiring hosted environment adds d7a38ce27c1 testsuite: Define PRU stack usage adds 68480b8d5f6 testsuite: Mark that PRU has one-cycle jumps adds 593c1013643 testsuite: Mark that PRU uses all function pointer bits adds 50324c06a83 testsuite: Mark testsuite that PRU has different adds 330383590de Add myself to MAINTAINERS adds d51263b41ff Fix incorrect __cpp_lib_parallel_algorithm macro definitions adds 6233ade970a PR c++/90736 - bogus error with alignof. * constexpr.c (a [...] adds c1df40f9129 Tweak tests to avoid fallout from MEM_REF changes on target [...] adds 3c58902657c 2019-06-12 Steven G. Kargl <kargl(a)gcc.gnu.org> adds 518af62d9ff PR c++/90825 - endless recursion when evaluating sizeof. [...] adds 04a89d67a59 * io.c (check_format): Use G_(...) instead of _(...) for e [...] adds 7ff4860a198 PR c++/66999 - 'this' captured by reference. * parser.c ( [...] adds c2531d4e6c9 Daily bump. adds 30cda7a344b PR c++/87410 * g++.dg/cpp1y/pr87410.C: New test. adds eb49f99279c gcc/ChangeLog: adds 217ad6d6ebf gcc/ChangeLog: adds ef871d9929f gcc/ChangeLog: adds 3984c5cdfac PR tree-optimization/89713 - Assume loop with an exit is finite adds fec050ace17 2019-06-13 Richard Biener <rguenther(a)suse.de> adds 43bbc1da377 /cp 2019-06-13 Paolo Carlini <paolo.carlini(a)oracle.com> adds 5e3e7fbe47b [ARC] Add documentation naked, ilink and firq adds 714ba8581de Revamp value_range::may_contain_p. adds 0decb67615e 2019-06-13 Richard Biener <rguenther(a)suse.de> adds b970d9709b8 * g++.dg/tree-ssa/ssa-dse-1.C: Don't match exact number of [...] adds c2174db34e0 * config/nvptx/nvptx.c (nvptx_sese_number, nvptx_sese_pseu [...] adds a9537ef0553 2019-06-13 Richard Biener <rguenther(a)suse.de> No new revisions were added by this update. Summary of changes: ChangeLog | 13 + MAINTAINERS | 2 + configure | 7 + configure.ac | 7 + gcc/ChangeLog | 196 ++ gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 5 + gcc/c-family/c.opt | 4 + gcc/cfgexpand.c | 19 +- gcc/common.opt | 4 + gcc/common/config/pru/pru-common.c | 36 + gcc/config.gcc | 9 + gcc/config/aarch64/aarch64.c | 2 +- gcc/config/aarch64/iterators.md | 2 +- gcc/config/arm/iterators.md | 3 + gcc/config/arm/neon.md | 26 + gcc/config/arm/unspecs.md | 2 + gcc/config/mips/mips.c | 16 +- gcc/config/nvptx/nvptx.c | 18 +- gcc/config/pru/alu-zext.md | 181 ++ gcc/config/pru/constraints.md | 108 + gcc/config/pru/predicates.md | 287 ++ gcc/config/pru/pru-opts.h | 31 + gcc/config/pru/pru-passes.c | 228 ++ gcc/config/pru/pru-pragma.c | 86 + gcc/config/pru/pru-protos.h | 72 + gcc/config/pru/pru.c | 3036 ++++++++++++++++++++ gcc/config/pru/pru.h | 573 ++++ gcc/config/pru/pru.md | 1022 +++++++ gcc/config/pru/pru.opt | 54 + gcc/config/pru/t-pru | 31 + gcc/config/rs6000/rs6000-cpus.def | 4 +- gcc/config/rs6000/rs6000.c | 19 +- gcc/cp/ChangeLog | 46 + gcc/cp/class.c | 18 +- gcc/cp/constexpr.c | 20 +- gcc/cp/decl.c | 75 +- gcc/cp/parser.c | 14 +- gcc/cp/typeck.c | 2 +- gcc/cp/typeck2.c | 23 +- gcc/doc/extend.texi | 35 +- gcc/doc/invoke.texi | 93 + gcc/doc/md.texi | 19 + gcc/fortran/ChangeLog | 17 + gcc/fortran/array.c | 18 +- gcc/fortran/gfortran.h | 2 - gcc/fortran/io.c | 61 +- gcc/ggc-common.c | 2 +- gcc/gimple-loop-versioning.cc | 2 +- gcc/gimple-ssa-evrp.c | 10 +- gcc/hash-map.h | 9 +- gcc/match.pd | 23 +- gcc/mem-stats.h | 6 +- gcc/omp-offload.c | 11 +- gcc/opts.c | 1 + gcc/symtab.c | 2 +- gcc/testsuite/ChangeLog | 254 ++ gcc/testsuite/g++.dg/cpp0x/alias-decl-1.C | 3 +- gcc/testsuite/g++.dg/cpp0x/alignof5.C | 6 + gcc/testsuite/g++.dg/cpp0x/constexpr-sizeof2.C | 14 + gcc/testsuite/g++.dg/cpp0x/constexpr-sizeof3.C | 22 + gcc/testsuite/g++.dg/cpp0x/lambda/lambda-this21.C | 10 + gcc/testsuite/g++.dg/cpp1y/pr87410.C | 19 + .../g++.dg/diagnostic/conflicting-specifiers-1.C | 1 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gcc/testsuite/gcc.dg/tree-ssa/cmpexactdiv-5.c | 11 + gcc/testsuite/gcc.dg/tree-ssa/dce-2.c | 37 + gcc/testsuite/gcc.dg/tree-ssa/dump-6.c | 38 + gcc/testsuite/gcc.dg/tree-ssa/loop-10.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/pr30375.c | 3 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/slsr-27.c | 3 +- gcc/testsuite/gcc.dg/tree-ssa/slsr-28.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/slsr-29.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/split-path-6.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-24.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-12.c | 2 +- gcc/testsuite/gcc.dg/uninit-19.c | 4 +- gcc/testsuite/gcc.dg/vect/vect-version-1.c | 20 + gcc/testsuite/gcc.dg/vect/vect-version-2.c | 20 + gcc/testsuite/gcc.target/aarch64/pr88834.c | 15 + gcc/testsuite/gcc.target/aarch64/pr88838.c | 11 + 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gcc/testsuite/gcc.target/pru/builtins-error.c | 6 + gcc/testsuite/gcc.target/pru/clearbit.c | 13 + gcc/testsuite/gcc.target/pru/loop-asm.c | 19 + gcc/testsuite/gcc.target/pru/loop-dowhile.c | 45 + gcc/testsuite/gcc.target/pru/loop-hi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-hi-2.c | 17 + gcc/testsuite/gcc.target/pru/loop-qi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-qi-2.c | 17 + gcc/testsuite/gcc.target/pru/loop-short-1.c | 53 + gcc/testsuite/gcc.target/pru/loop-short-2.c | 21 + gcc/testsuite/gcc.target/pru/loop-si-1.c | 41 + gcc/testsuite/gcc.target/pru/loop-si-2.c | 20 + .../gcc.target/pru/loop-u8_pcrel_overflow.c | 42 + gcc/testsuite/gcc.target/pru/loop-ubyte-1.c | 30 + gcc/testsuite/gcc.target/pru/loop-ubyte-2.c | 18 + .../pru/lra-framepointer-fragmentation-1.c | 33 + .../pru/lra-framepointer-fragmentation-2.c | 61 + gcc/testsuite/gcc.target/pru/mabi-ti-1.c | 10 + gcc/testsuite/gcc.target/pru/mabi-ti-2.c | 15 + gcc/testsuite/gcc.target/pru/mabi-ti-3.c | 12 + gcc/testsuite/gcc.target/pru/mabi-ti-4.c | 14 + gcc/testsuite/gcc.target/pru/mabi-ti-5.c | 33 + gcc/testsuite/gcc.target/pru/mabi-ti-6.c | 12 + gcc/testsuite/gcc.target/pru/mabi-ti-7.c | 21 + gcc/testsuite/gcc.target/pru/pr64366.c | 128 + gcc/testsuite/gcc.target/pru/pragma-ctable_entry.c | 22 + gcc/testsuite/gcc.target/pru/pru.exp | 41 + gcc/testsuite/gcc.target/pru/qbbc-1.c | 29 + gcc/testsuite/gcc.target/pru/qbbc-2.c | 15 + gcc/testsuite/gcc.target/pru/qbbc-3.c | 15 + gcc/testsuite/gcc.target/pru/qbbs-1.c | 29 + gcc/testsuite/gcc.target/pru/qbbs-2.c | 15 + gcc/testsuite/gcc.target/pru/setbit.c | 13 + .../gcc.target/pru/zero_extend-and-hisi.c | 16 + .../gcc.target/pru/zero_extend-and-qihi.c | 16 + .../gcc.target/pru/zero_extend-and-qisi.c | 16 + gcc/testsuite/gcc.target/pru/zero_extend-hisi.c | 43 + gcc/testsuite/gcc.target/pru/zero_extend-qihi.c | 43 + gcc/testsuite/gcc.target/pru/zero_extend-qisi.c | 43 + gcc/testsuite/gfortran.dg/pr90002.f90 | 6 + gcc/testsuite/lib/gcc-dg.exp | 11 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create mode 100644 gcc/testsuite/gcc.target/pru/zero_extend-and-qihi.c create mode 100644 gcc/testsuite/gcc.target/pru/zero_extend-and-qisi.c create mode 100644 gcc/testsuite/gcc.target/pru/zero_extend-hisi.c create mode 100644 gcc/testsuite/gcc.target/pru/zero_extend-qihi.c create mode 100644 gcc/testsuite/gcc.target/pru/zero_extend-qisi.c create mode 100644 gcc/testsuite/gfortran.dg/pr90002.f90 create mode 100644 libgcc/config/pru/asri.c create mode 100644 libgcc/config/pru/eqd.c create mode 100644 libgcc/config/pru/eqf.c create mode 100644 libgcc/config/pru/ged.c create mode 100644 libgcc/config/pru/gef.c create mode 100644 libgcc/config/pru/gtd.c create mode 100644 libgcc/config/pru/gtf.c create mode 100644 libgcc/config/pru/led.c create mode 100644 libgcc/config/pru/lef.c create mode 100644 libgcc/config/pru/lib2bitcountHI.c create mode 100644 libgcc/config/pru/lib2divHI.c create mode 100644 libgcc/config/pru/lib2divQI.c create mode 100644 libgcc/config/pru/lib2divSI.c create mode 100644 libgcc/config/pru/libgcc-eabi.ver create mode 100644 libgcc/config/pru/ltd.c create mode 100644 libgcc/config/pru/ltf.c create mode 100644 libgcc/config/pru/mpyll.S create mode 100644 libgcc/config/pru/pru-abi.h create mode 100644 libgcc/config/pru/pru-asm.h create mode 100644 libgcc/config/pru/pru-divmod.h create mode 100644 libgcc/config/pru/sfp-machine.h create mode 100644 libgcc/config/pru/t-pru create mode 100644 libgomp/testsuite/libgomp.c/pr90811.c create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/pr84955-1.c create mode 100644 libstdc++-v3/include/bits/charconv.h create mode 100644 libstdc++-v3/testsuite/21_strings/basic_string/numeric_conversi [...] create mode 100644 libstdc++-v3/testsuite/25_algorithms/pstl/feature_test.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-O2 updated (08f10e02be -> 57a63d27dc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-O2 in repository toolchain/ci/binutils-gdb. from 08f10e02be Move gdb's xmalloc and friends to new file adds 2057d69dcc Add support for reporting Alpha and Vax symbol visibility in [...] adds a5fd13a915 Dwarf: Don't add nameless modules to partial symbol table adds d106773eac Dwarf: Don't add nameless modules to partial symbol table (C [...] adds 0529f3fe5c Automatic date update in version.in adds 540e617049 Add support to readelf to display NetBSD auxv notes in core files. adds c0d38b0ec6 Add support for NetBSD/sh3 core reg sections to readelf. adds 9abca70219 Add support for NetBSD PaX notes to readelf. adds 62e0492f57 Prevent a seg-fault from objdup when disassembling binaries [...] adds 6fbc939cfd Remove the ldmx mnemonic that never made it into POWER9. adds a0e44ef56c Add missing ChangeLog entries adds 6ce26ac7c3 cpu/or1k: Add support for orfp64a32 spec adds d3ad6278d6 cpu/or1k: Define unordered comparisons adds eb212c84a1 cpu/or1k: Document no branch delay slot architectures and l.adrp adds a2e4218f23 cpu/or1k: Update fpu compare symbols to imply set flag adds e4c4ac46e8 opcodes/or1k: Regenerate opcodes adds 00b56dbe70 Fix latent bug in custom word point completion handling adds 3844e605e6 Fix latent bug with custom word point completers adds b9a3f8429b Fix TID parser bug adds cbba3ecd36 Make check_for_argument skip whitespace after arg itself adds 93bcb04349 Allow "unlimited" abbreviations adds 48c410fb70 Fix "set enum-command value junk" adds 597bf39df9 Remove "show" command completers, "set" command completers f [...] adds ccf46844d3 gdb.base/completion.exp: Fix comment typo adds dca0f6c0a4 New set/show testing framework (gdb.base/settings.exp) adds dee7b4c83a boolean/auto-boolean commands, make "o" ambiguous adds 2c722807a7 number_or_range_parser::get_number, don't treat "1 -" as a range adds 9d0faba9f5 Introduce generic command options framework adds 7d8062de98 Make "print" and "compile print" support -OPT options adds e6ed716cd5 Migrate rest of compile commands to new options framework adds 2daf894ed0 "set print raw frame-arguments" -> "set print raw-frame-arguments" adds d4c16835ca Make "backtrace" support -OPT options adds 90a1ef8762 "backtrace full/no-filters/hide" completer adds e2a689da55 lib/completion-support.exp: Add test_gdb_completion_offers_commands adds 272d459434 Introduce complete_nested_command_line adds 5d7071341d Make "frame apply" support -OPT options adds f7e13587ea "thread apply 1 -- -" vs "frame apply level 0 -- -" adds 6665660a41 Make "thread apply" use the gdb::option framework adds 6206060d9b Delete parse_flags/parse_flags_qcs adds 3345721af1 NEWS and manual changes for command options changes adds e41d1c49a1 Automatic date update in version.in adds 66eb1ed388 Fix gdb build with -std=gnu++11 adds 7ccbb4437a sim/or1k: Regenerate sim adds 688cea90bc sim/common: Wire in df/di conversion adds f1cc84f594 sim/common: wire up new unordered comparisons adds b4f9e00346 sim/testsuite/or1k: Add test for 64-bit fpu operations adds 3c83b496d4 sim/testsuite/or1k: Add test case for l.adrp instruction adds 57a63d27dc sim/testsuite/or1k: Add tests for unordered compares No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 7 + bfd/elf32-arm.c | 10 +- bfd/elfnn-aarch64.c | 20 +- bfd/version.h | 2 +- binutils/ChangeLog | 26 + binutils/readelf.c | 109 +- cpu/ChangeLog | 56 ++ cpu/or1k.cpu | 21 +- cpu/or1k.opc | 92 ++ cpu/or1kcommon.cpu | 113 ++- cpu/or1korbis.cpu | 3 +- cpu/or1korfpx.cpu | 214 +++- gas/ChangeLog | 5 + gas/testsuite/gas/ppc/power9.d | 2 - gas/testsuite/gas/ppc/power9.s | 2 - gdb/ChangeLog | 305 ++++++ gdb/Makefile.in | 3 + gdb/NEWS | 102 ++ gdb/ax-gdb.c | 2 - gdb/breakpoint.c | 5 +- gdb/cli/cli-cmds.c | 3 - gdb/cli/cli-decode.c | 27 +- gdb/cli/cli-decode.h | 4 + gdb/cli/cli-option.c | 724 +++++++++++++ gdb/cli/cli-option.h | 335 ++++++ gdb/cli/cli-setshow.c | 289 +++--- gdb/cli/cli-setshow.h | 27 + gdb/cli/cli-utils.c | 124 +-- gdb/cli/cli-utils.h | 62 +- gdb/command.h | 19 +- gdb/compile/compile.c | 215 ++-- gdb/completer.c | 84 +- gdb/completer.h | 21 +- gdb/cp-valprint.c | 57 -- gdb/doc/ChangeLog | 27 + gdb/doc/gdb.texinfo | 344 ++++++- gdb/dwarf2read.c | 17 +- gdb/frame.c | 84 +- gdb/frame.h | 55 +- gdb/maint-test-options.c | 461 +++++++++ gdb/maint-test-settings.c | 257 +++++ gdb/mi/mi-cmd-stack.c | 23 +- gdb/printcmd.c | 94 +- gdb/python/py-framefilter.c | 3 +- gdb/stack.c | 620 +++++++++--- gdb/stack.h | 5 + gdb/testsuite/ChangeLog | 74 ++ gdb/testsuite/gdb.base/completion.exp | 2 +- gdb/testsuite/gdb.base/options.c | 33 + gdb/testsuite/gdb.base/options.exp | 923 +++++++++++++++++ gdb/testsuite/gdb.base/settings.c | 23 + gdb/testsuite/gdb.base/settings.exp | 545 ++++++++++ gdb/testsuite/gdb.compile/compile.exp | 15 +- gdb/testsuite/gdb.fortran/block-data.exp | 63 ++ gdb/testsuite/gdb.fortran/block-data.f | 56 ++ gdb/testsuite/gdb.guile/scm-frame-args.exp | 4 +- gdb/testsuite/gdb.multi/tids.exp | 16 +- gdb/testsuite/gdb.python/py-frame-args.exp | 4 +- gdb/testsuite/lib/completion-support.exp | 66 +- gdb/thread.c | 285 ++++-- gdb/tid-parse.c | 16 +- gdb/tid-parse.h | 3 + gdb/unittests/cli-utils-selftests.c | 133 --- gdb/valprint.c | 280 ++++-- gdb/valprint.h | 20 +- opcodes/ChangeLog | 15 + opcodes/or1k-asm.c | 72 +- opcodes/or1k-desc.c | 309 +++++- opcodes/or1k-desc.h | 341 ++++--- opcodes/or1k-dis.c | 43 +- opcodes/or1k-ibld.c | 234 ++++- opcodes/or1k-opc.c | 319 +++++- opcodes/or1k-opc.h | 39 +- opcodes/or1k-opinst.c | 100 +- opcodes/ppc-opc.c | 2 - sim/ChangeLog | 10 + sim/common/ChangeLog | 11 + sim/common/cgen-accfp.c | 49 + sim/common/cgen-fpu.h | 2 + sim/or1k/arch.c | 2 +- sim/or1k/arch.h | 2 +- sim/or1k/cpu.c | 78 +- sim/or1k/cpu.h | 174 +++- sim/or1k/cpuall.h | 2 +- sim/or1k/decode.c | 568 +++++++++-- sim/or1k/decode.h | 21 +- sim/or1k/model.c | 1456 ++++++++++++++++++++++----- sim/or1k/sem-switch.c | 602 ++++++++++- sim/or1k/sem.c | 672 ++++++++++++- sim/testsuite/sim/or1k/ChangeLog | 13 + sim/testsuite/sim/or1k/adrp.S | 73 ++ sim/testsuite/sim/or1k/fpu-unordered.S | 97 ++ sim/testsuite/sim/or1k/fpu64a32-unordered.S | 100 ++ sim/testsuite/sim/or1k/fpu64a32.S | 172 ++++ 94 files changed, 11530 insertions(+), 1689 deletions(-) create mode 100644 gdb/cli/cli-option.c create mode 100644 gdb/cli/cli-option.h create mode 100644 gdb/maint-test-options.c create mode 100644 gdb/maint-test-settings.c create mode 100644 gdb/testsuite/gdb.base/options.c create mode 100644 gdb/testsuite/gdb.base/options.exp create mode 100644 gdb/testsuite/gdb.base/settings.c create mode 100644 gdb/testsuite/gdb.base/settings.exp create mode 100644 gdb/testsuite/gdb.fortran/block-data.exp create mode 100644 gdb/testsuite/gdb.fortran/block-data.f create mode 100644 sim/testsuite/sim/or1k/adrp.S create mode 100644 sim/testsuite/sim/or1k/fpu-unordered.S create mode 100644 sim/testsuite/sim/or1k/fpu64a32-unordered.S create mode 100644 sim/testsuite/sim/or1k/fpu64a32.S -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-O2 updated (033adb80 -> 8313cd6a)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-O2 in repository toolchain/ci/base-artifacts. discards 033adb80 0: init: binutils-gcc-glibc-llvm: 0 new 8313cd6a 0: init: binutils-gcc-glibc-llvm: 0 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (033adb80) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk/llvm-master-arm-spec [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 153 +- 02-prepare_abe/console.log | 384 +- 03-build_abe-binutils/console.log | 11164 ++- 04-build_abe-stage1/console.log | 19776 +++--- 05-build_abe-linux/console.log | 288 +- 06-build_abe-glibc/console.log | 39412 +++++------ 07-build_abe-stage2/console.log | 46773 ++++++------- 08-build_llvm-true/console.log | 11861 ++-- 09-benchmark/benchmark-start.log | 2 +- 09-benchmark/benchmark.log | 6 +- 09-benchmark/console.log | 436 +- console.log | 130249 +++++++++++++++++------------------ jenkins/manifest.sh | 20 +- results_id | 2 +- 14 files changed, 130228 insertions(+), 130298 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk/llvm-master-aarch64-spec2k6-Oz_LTO updated (e2f94974dfd -> 31d68804fd4)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-aarch64-spec2k6-Oz_LTO in repository toolchain/ci/llvm-project. from e2f94974dfd [DebugInfo] Add a test that fell out of an earlier commit adds 86325be3d70 LoopLoadElim: Respect convergent adds 082a41994ac [InstCombine] add tests for fcmp+select with FMF (minnum/ma [...] adds 339b39b7733 [MIR] Skip hoisting to basic block which may throw exceptio [...] adds aa6bdf9dcd5 LoopVersioning: Respect convergent adds 030df51e27e [ARM] Fix compiler warning adds 7eddb16fed9 [compiler-rt] Fix name_to_handle_at.cc test on Overlay2 (fo [...] adds 61f6395fd01 AMDGPU/GlobalISel: Fix using illegal situations in tests adds f29366b1f59 StackProtector: Use PointerMayBeCaptured adds cae2c85deae gn build: Add SystemZ target adds a866d3b2eed [CMake] Two extra FOLDER properties for debugserver adds 61a7ab7fdb2 [lldb] Ignore null frames in lldb.macosx crashlog adds 48365ec3e14 [NFC[ Updated tests for D54411 adds 3d42959dd8a Revert rL363156. adds 64006896ac0 [InstCombine] add tests for fmin/fmax libcalls; NFC adds 5b0e0dd709f [X86][AVX] Fold concat(vpermilps(x,c),vpermilps(y,c)) -> vp [...] adds 4e0648a541f [TargetLowering] Add MachineMemOperand::Flags to allowsMemo [...] adds e51c3d8b824 [SCEV] Teach computeSCEVAtScope benefit from one-input Phi. [...] adds ef7d4fbe809 [X86][SSE] Avoid unnecessary stack codegen in NT merge-cons [...] adds 8f4973f57b0 [llvm-lipo] Update llvm-lipo docs for -archs flag adds 5b99928ba88 [Expression] Add PersistentExpressionState::GetCompilerType [...] adds efc0d1a2980 [Mips] Add s.d instruction alias for Mips1 adds 5f581c9f08e [AMDGPU] gfx1010 premlane instructions adds 245b5ba3448 [AMDGPU] gfx1010 dpp16 and dpp8 adds fa880e6114c [analyzer] ProgramPoint: more explicit printJson() adds c69cc842537 PR42220: take into account the possibility of aggregates wi [...] adds 146a154e610 [llvm-ar][test] Relax lit directory assumptions in thin-arc [...] adds 000f9cc62a7 [AMDGPU] more gfx1010 tests. NFC. adds 4e9538997ee [MS] Pretend constexpr variable template specializations ar [...] adds 851adc000cb [Tests] Add tests to highlight sibling loop optimization or [...] adds 00e481b75d8 [Tests] Autogen RLEV test and add tests for a future enhancement adds 2aa5ada267d [NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrins [...] adds b05ce7f9f71 Add comment to r363191 code as requested in code review adds ae2581cef3c [IndVars] Extend diagnostic -replexitval flag w/ability to [...] adds 782fff1bf87 [libcxx] XFAIL some CTAD tests on AppleClang 10 adds 565f1e2298c [llvm-readobj] Fix output interleaving issue caused by usin [...] adds 514cfdb18db [test] Reinstate the assignment to the diagnostic log in th [...] adds 27a5db9de57 [NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrins [...] adds 4548c1cfca4 Sanitize llvm-extract -help output adds 87f75ecd720 Skip failing test on older versions of clang. adds a1421e83471 [x86] add tests for vector shifts; NFC adds f36d83735e3 [clang-scan-deps] initial outline of the tool that runs pre [...] adds aeffc15f976 NFC, fixup indentation in CMakeLists.txt from r363204 as re [...] adds 0e197bcb6b8 Re-land r363103 ("When reading ObjC class table, use new SP [...] adds b66be8c4d35 NFC, Update the ClangScanDeps.cpp file's license comment adds d2643516282 [clang-scan-deps] Include <mutex> in ClangScanDeps.cpp to e [...] adds c45f592b98f [libcxx] XFAIL set/multiset CTAD tests on Apple Clang 10 adds 781a0dc58d4 [llvm] Expose DWARFDebugLine::LineTable::getFileNameEntry adds ef96e985fcc [Reproducers] Simplify providers with nested Info struct (NFC) adds efc01eac173 [lld] Allow unrecognized signatures in debug sections adds 5584ab89a88 [lld] Fix type server merging with PDBs without IPI stream adds bb824c61a90 [ScopBuilder] Move getNonHoistableCtx to ScopBuilder. NFC. adds 41e0b9f2803 [NFC][CodeGen] Add unary FNeg tests to X86/avx512-intrinsic [...] adds 189abad1286 [ScopBuilder] Move addInvariantLoads to ScopBuilder. NFC. adds 0bded8442fe [Tests] Highlight impact of multiple exit LFTR (D62625) as [...] adds b2f45ba1e8a [SLP] Update propagate_ir_flags.ll test to check that we do [...] adds 5de7cacf079 Make GCC in C++03 Unsupported adds c73fadaa843 Revert r361811: 'Re-commit r357452 (take 2): "SimplifyCFG S [...] adds f3356722184 X86: Clean up pass initialization adds f93b99b2b6a [SimplifyCFG] NFC, update Switch tests to HEAD so I can adds c6cba2957d5 [SimplifyCFG] revert the last commit. adds 387acd64f3e [X86] Add tests for some the special cases in EVEX to VEX t [...] adds c2e2df7f7af [Reproducers] Include lldb version in the reproducer root adds c54b2011bd0 [SimplifyCFG] NFC, update Switch tests to better examine su [...] adds 636220e83c2 [SimpligyCFG] NFC intended, remove GCD that was only used f [...] adds 2bf25681509 [Reproducers] Remove call to lldb_private::GetVersion() adds 8b142bcc3f2 [SimplifyCFG] reverting preliminary Switch patches again adds 1f053207638 clang-format extension: Widen the supported versions range adds b1daec0eae6 [X86] Correct instruction operands in evex-to-vex-compress. [...] adds 02eac87ba3e [llvm-ar][test] Add to MRI test coverage adds 7957fc6547e [IntrinsicEmitter] Extend argument overloading with forward [...] adds 9d28473a355 [ARM][TTI] Scan for existing loop intrinsics adds 179e0fa8815 [NFC] Simplify Call query adds a78e025558b [ELF] Loosen the condition that changes absolute relocation [...] adds 49779275360 [clangd] Treat lambdas as functions when preparing hover response adds f9ad6e57d96 [clang-scan-deps] Fix -DBUILD_SHARED_LIBS=ON build adds 8d59f5370d4 Revert [llvm-ar][test] Add to MRI test coverage adds 51c2fa0e2ac Improve reduction intrinsics by overloading result value. adds 818dd8666a5 [WebAssembly] Modernize include path handling adds 95a9ee5e2f2 [OpenCL] Move OpenCLBuiltins.td and remove unused include adds 86b7f865ac5 [llvm-objcopy] Implement IHEX reader adds 848d3d0d2c4 [ARM] Refactor handling of IT mask operands. adds 181bf0cefb2 [DebugInfo] Use FrameDestroy to extend stack locations to e [...] adds 076ae0d2e2f [DebugInfo] Move Value struct out of DebugLocEntry as DbgVa [...] adds e1aea858968 [X86][SSE] Add SSE4A nt store tests on X86 as well as X64 adds 7b395133029 [llvm-nm] Additional lit tests for command line options adds a6b87aa7ee1 [X86][SSE] Add tests for underaligned nt stores adds ad17e289f0e DWARF: Don't create lldb CompileUnits for DWARF type units adds 0baf136a4d0 [X86][SSE] Avoid assert for broadcast(horiz-op()) cases for [...] adds a284f4fa7ca [X86][AVX] Add broadcast(v4f64 hadd) test adds 88e636dfc15 [Clangd] Fixed clangd diagnostics priority adds b00dbcbb43b [ThinLTO][Bitcode] Add 'entrycount' to FS_COMBINED_PROFILE. NFC adds 1fca3b1972d [AMDGPU][MC] Enabled constant expressions as operands of s_ [...] adds bf2b2f08b02 [DebugInfo] Honour variable fragments in LiveDebugValues adds 6b56ad164ce [CodeGen] Add getMachineMemOperand + MachineMemOperand::Fla [...] adds 286e1d2c2d6 [ARM] Set up infrastructure for MVE vector instructions. adds d2cd9c23b4e [NFC] Sink a function call into LiveDebugValues::process adds 407c8f1f493 Extra error checking to ARMAttributeParser adds 0eb763c5597 [lld][ELF] Add tests for bad subsection length in .ARM.attributes adds 31d68804fd4 Added AST matcher for ignoring elidable constructors No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/Diagnostics.cpp | 20 +- clang-tools-extra/clangd/XRefs.cpp | 47 +- .../clangd/unittests/DiagnosticsTests.cpp | 13 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 80 +- clang/docs/LibASTMatchersReference.html | 26 + clang/include/clang/ASTMatchers/ASTMatchers.h | 38 + clang/include/clang/Basic/CMakeLists.txt | 6 - clang/lib/AST/ASTContext.cpp | 23 +- clang/lib/ASTMatchers/Dynamic/Registry.cpp | 1 + clang/lib/Analysis/ProgramPoint.cpp | 43 +- clang/lib/Driver/ToolChains/WebAssembly.cpp | 41 +- clang/lib/Frontend/InitHeaderSearch.cpp | 8 + clang/lib/Sema/CMakeLists.txt | 7 + .../clang/Basic => lib/Sema}/OpenCLBuiltins.td | 0 clang/lib/Sema/SemaInit.cpp | 3 + clang/lib/Sema/SemaLookup.cpp | 2 +- clang/test/CMakeLists.txt | 1 + clang/test/ClangScanDeps/Inputs/header.h | 3 + clang/test/ClangScanDeps/Inputs/header2.h | 1 + clang/test/ClangScanDeps/Inputs/regular_cdb.json | 12 + clang/test/ClangScanDeps/regular_cdb.cpp | 27 + .../test/CodeGenCXX/ms-constexpr-var-template.cpp | 11 + clang/test/CodeGenCXX/nrvo.cpp | 1 + clang/test/CodeGenCXX/stack-reuse-exceptions.cpp | 2 +- clang/test/CodeGenCXX/temporaries.cpp | 18 + clang/test/CodeGenObjC/exceptions.m | 2 +- clang/test/Driver/wasm-toolchain.cpp | 2 + clang/tools/CMakeLists.txt | 1 + .../source.extension.vsixmanifest.in | 2 +- clang/tools/clang-scan-deps/CMakeLists.txt | 27 + clang/tools/clang-scan-deps/ClangScanDeps.cpp | 218 ++ .../ASTMatchers/ASTMatchersNarrowingTest.cpp | 76 +- clang/unittests/ASTMatchers/ASTMatchersTest.h | 78 +- clang/unittests/Frontend/CompilerInstanceTest.cpp | 4 + .../TestCases/Linux/name_to_handle_at.cc | 2 +- libcxx/docs/index.rst | 4 +- libcxx/include/__config | 4 + .../associative/map/map.cons/deduct.fail.cpp | 2 +- .../multimap/multimap.cons/deduct.fail.cpp | 2 +- .../multiset/multiset.cons/deduct.fail.cpp | 2 +- .../associative/set/set.cons/deduct.fail.cpp | 2 +- lld/COFF/Chunks.cpp | 11 +- lld/COFF/PDB.cpp | 33 +- lld/ELF/Relocations.cpp | 8 +- lld/test/COFF/Inputs/no-ipi-stream-obj.obj.yaml | 13 + lld/test/COFF/Inputs/no-ipi-stream-pdb.pdb.yaml | 2 + lld/test/COFF/allow-unknown-debug-info.test | 26 + lld/test/COFF/no-ipi-stream.test | 4 + lld/test/ELF/invalid/bad-arm-attributes.s | 8 + lld/test/ELF/invalid/bad-arm-attributes2.s | 8 + lldb/examples/python/crashlog.py | 4 + lldb/include/lldb/Expression/ExpressionVariable.h | 3 + lldb/include/lldb/Utility/Reproducer.h | 46 +- lldb/lit/Reproducer/TestFileRepro.test | 3 + lldb/lit/SymbolFile/DWARF/debug-types-dwarf5.s | 94 + .../lit/SymbolFile/DWARF/debug-types-line-tables.s | 17 + .../persistent_types/TestPersistentTypes.py | 10 + .../return-value/TestReturnValue.py | 1 + lldb/source/API/SBDebugger.cpp | 2 +- lldb/source/API/SBReproducer.cpp | 6 +- lldb/source/API/SBReproducerPrivate.h | 10 +- lldb/source/Commands/CMakeLists.txt | 1 - lldb/source/Commands/CommandObjectMemory.cpp | 96 +- .../Initialization/SystemInitializerCommon.cpp | 6 +- .../Clang/ClangPersistentVariables.cpp | 16 + .../Clang/ClangPersistentVariables.h | 3 + .../ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp | 60 +- .../Process/gdb-remote/ProcessGDBRemote.cpp | 19 +- .../Plugins/SymbolFile/DWARF/DWARFCompileUnit.cpp | 4 +- .../Plugins/SymbolFile/DWARF/DWARFDebugInfo.cpp | 5 + .../Plugins/SymbolFile/DWARF/DWARFDebugInfo.h | 1 + .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 380 ++- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 13 +- .../SymbolFile/DWARF/SymbolFileDWARFDwo.cpp | 24 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.h | 8 +- .../SymbolFile/DWARF/SymbolFileDWARFDwoDwp.cpp | 2 +- .../SymbolFile/DWARF/SymbolFileDWARFDwoDwp.h | 2 +- .../SymbolFile/DWARF/SymbolFileDWARFDwp.cpp | 2 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARFDwp.h | 2 +- lldb/source/Utility/Reproducer.cpp | 26 +- lldb/tools/debugserver/source/CMakeLists.txt | 4 + lldb/unittests/Utility/ReproducerTest.cpp | 16 +- llvm/docs/CommandGuide/llvm-lipo.rst | 6 + llvm/docs/LangRef.rst | 30 +- llvm/include/llvm/CodeGen/BasicTTIImpl.h | 9 +- llvm/include/llvm/CodeGen/MachineFunction.h | 6 + llvm/include/llvm/CodeGen/StackProtector.h | 6 - llvm/include/llvm/CodeGen/TargetLowering.h | 16 +- llvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h | 7 +- llvm/include/llvm/IR/DebugInfoMetadata.h | 55 +- llvm/include/llvm/IR/Intrinsics.h | 28 +- llvm/include/llvm/IR/Intrinsics.td | 23 +- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 20 + llvm/lib/Analysis/ScalarEvolution.cpp | 10 + llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 1 + .../AsmPrinter/DbgEntityHistoryCalculator.cpp | 7 +- llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h | 178 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 22 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 8 +- llvm/lib/CodeGen/LiveDebugValues.cpp | 282 +- llvm/lib/CodeGen/MachineCSE.cpp | 2 + llvm/lib/CodeGen/MachineFunction.cpp | 9 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 3 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 3 +- llvm/lib/CodeGen/StackProtector.cpp | 39 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 5 +- llvm/lib/IR/Function.cpp | 140 +- llvm/lib/IR/IRBuilder.cpp | 2 +- llvm/lib/IR/Verifier.cpp | 12 +- llvm/lib/Support/ARMAttributeParser.cpp | 6 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 14 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 7 +- llvm/lib/Target/AMDGPU/AMDGPU.td | 15 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 6 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 5 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 327 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 35 + .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 3 +- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 44 + llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h | 2 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 111 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h | 4 + llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 10 +- llvm/lib/Target/AMDGPU/R600ISelLowering.h | 7 +- llvm/lib/Target/AMDGPU/SIDefines.h | 20 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 25 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 7 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 41 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 66 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 63 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 27 + llvm/lib/Target/AMDGPU/VOP1Instructions.td | 80 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 106 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 28 + llvm/lib/Target/AMDGPU/VOPInstructions.td | 47 +- llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 3 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 15 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 11 +- llvm/lib/Target/ARM/ARMISelLowering.h | 1 + llvm/lib/Target/ARM/ARMInstrFormats.td | 80 + llvm/lib/Target/ARM/ARMInstrMVE.td | 363 ++ llvm/lib/Target/ARM/ARMInstrThumb2.td | 1 + llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | 4 + llvm/lib/Target/ARM/ARMRegisterInfo.td | 12 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 38 +- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 564 +++- .../Target/ARM/Disassembler/ARMDisassembler.cpp | 316 +- .../lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp | 33 +- llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h | 6 + .../Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp | 107 +- llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h | 15 + llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp | 4 +- llvm/lib/Target/ARM/Utils/ARMBaseInfo.h | 24 + llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 5 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 2 +- llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 50 + llvm/lib/Target/Mips/Mips16ISelLowering.cpp | 7 +- llvm/lib/Target/Mips/Mips16ISelLowering.h | 1 + llvm/lib/Target/Mips/MipsInstrFPU.td | 8 + llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 7 +- llvm/lib/Target/Mips/MipsSEISelLowering.h | 7 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 1 + llvm/lib/Target/PowerPC/PPCISelLowering.h | 8 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 6 +- llvm/lib/Target/SystemZ/SystemZISelLowering.h | 1 + .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 3 +- .../Target/WebAssembly/WebAssemblyISelLowering.h | 1 + llvm/lib/Target/X86/X86.h | 1 + .../Target/X86/X86AvoidStoreForwardingBlocks.cpp | 4 +- llvm/lib/Target/X86/X86CallFrameOptimization.cpp | 5 +- llvm/lib/Target/X86/X86CmovConversion.cpp | 4 +- llvm/lib/Target/X86/X86CondBrFolding.cpp | 4 +- llvm/lib/Target/X86/X86DomainReassignment.cpp | 4 +- llvm/lib/Target/X86/X86EvexToVex.cpp | 4 +- llvm/lib/Target/X86/X86FixupBWInsts.cpp | 4 +- llvm/lib/Target/X86/X86FixupLEAs.cpp | 4 +- llvm/lib/Target/X86/X86FlagsCopyLowering.cpp | 10 +- llvm/lib/Target/X86/X86FloatingPoint.cpp | 10 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 54 +- llvm/lib/Target/X86/X86ISelLowering.h | 3 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 10 +- .../lib/Target/X86/X86SpeculativeLoadHardening.cpp | 5 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 1 + llvm/lib/Target/X86/X86WinEHState.cpp | 4 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 7 +- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 7 +- llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp | 6 + llvm/lib/Transforms/Utils/LoopVersioning.cpp | 5 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 29 +- .../Analysis/CostModel/AArch64/vector-reduce.ll | 174 +- .../Analysis/CostModel/X86/reduce-add-widen.ll | 400 +-- llvm/test/Analysis/CostModel/X86/reduce-add.ll | 400 +-- .../Analysis/CostModel/X86/reduce-and-widen.ll | 508 +-- llvm/test/Analysis/CostModel/X86/reduce-and.ll | 508 +-- .../Analysis/CostModel/X86/reduce-mul-widen.ll | 420 +-- llvm/test/Analysis/CostModel/X86/reduce-mul.ll | 440 +-- .../test/Analysis/CostModel/X86/reduce-or-widen.ll | 508 +-- llvm/test/Analysis/CostModel/X86/reduce-or.ll | 508 +-- .../Analysis/CostModel/X86/reduce-smax-widen.ll | 420 +-- llvm/test/Analysis/CostModel/X86/reduce-smax.ll | 420 +-- .../Analysis/CostModel/X86/reduce-smin-widen.ll | 402 +-- llvm/test/Analysis/CostModel/X86/reduce-smin.ll | 420 +-- .../Analysis/CostModel/X86/reduce-umax-widen.ll | 420 +-- llvm/test/Analysis/CostModel/X86/reduce-umax.ll | 420 +-- .../Analysis/CostModel/X86/reduce-umin-widen.ll | 420 +-- llvm/test/Analysis/CostModel/X86/reduce-umin.ll | 420 +-- .../Analysis/CostModel/X86/reduce-xor-widen.ll | 540 +-- llvm/test/Analysis/CostModel/X86/reduce-xor.ll | 540 +-- llvm/test/CodeGen/AArch64/aarch64-addv.ll | 24 +- llvm/test/CodeGen/AArch64/aarch64-minmaxv.ll | 92 +- llvm/test/CodeGen/AArch64/arm64-vabs.ll | 12 +- .../CodeGen/AArch64/machine_cse_illegal_hoist.ll | 52 + llvm/test/CodeGen/AArch64/max-jump-table.ll | 48 +- llvm/test/CodeGen/AArch64/min-jump-table.ll | 30 +- .../CodeGen/AArch64/vecreduce-add-legalization.ll | 58 +- .../CodeGen/AArch64/vecreduce-and-legalization.ll | 58 +- llvm/test/CodeGen/AArch64/vecreduce-bool.ll | 48 +- .../CodeGen/AArch64/vecreduce-fmax-legalization.ll | 28 +- .../AArch64/vecreduce-propagate-sd-flags.ll | 4 +- .../CodeGen/AArch64/vecreduce-umax-legalization.ll | 58 +- llvm/test/CodeGen/AArch64/win64-jumptable.ll | 52 +- .../AMDGPU/GlobalISel/inst-select-load-flat.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-load-smrd.mir | 18 +- .../GlobalISel/regbankselect-insert-vector-elt.mir | 24 +- .../AMDGPU/GlobalISel/regbankselect-phi.mir | 29 +- llvm/test/CodeGen/AMDGPU/basic-branch.ll | 1 + .../CodeGen/AMDGPU/fmul-2-combine-multi-use.ll | 104 +- llvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir | 2 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll | 168 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll | 39 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll | 26 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll | 311 ++ llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll | 43 +- llvm/test/CodeGen/AMDGPU/smem-war-hazard.mir | 2 +- llvm/test/CodeGen/AMDGPU/v_cndmask.ll | 2 +- llvm/test/CodeGen/AMDGPU/vcmpx-exec-war-hazard.mir | 2 +- llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir | 145 + llvm/test/CodeGen/ARM/cmpxchg-idioms.ll | 4 +- .../Generic/expand-experimental-reductions.ll | 44 +- .../CodeGen/X86/avx512-intrinsics-fast-isel.ll | 657 ++++ .../CodeGen/X86/avx512vl-intrinsics-fast-isel.ll | 697 +++- llvm/test/CodeGen/X86/conditional-tailcall.ll | 476 ++- llvm/test/CodeGen/X86/evex-to-vex-compress.mir | 3556 ++++++++++---------- llvm/test/CodeGen/X86/haddsub-shuf.ll | 79 + .../CodeGen/X86/merge-consecutive-stores-nt.ll | 19 +- llvm/test/CodeGen/X86/nontemporal-3.ll | 1002 ++++++ llvm/test/CodeGen/X86/stack-protector.ll | 4 +- llvm/test/CodeGen/X86/tail-merge-after-mbp.mir | 68 +- llvm/test/CodeGen/X86/tail-opts.ll | 408 ++- llvm/test/CodeGen/X86/vector-reduce-add-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-add.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-and-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-and.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll | 32 +- llvm/test/CodeGen/X86/vector-reduce-fmax.ll | 32 +- llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll | 32 +- llvm/test/CodeGen/X86/vector-reduce-fmin.ll | 32 +- llvm/test/CodeGen/X86/vector-reduce-mul-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-mul.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-or-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-or.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-smax-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-smax.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-smin-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-smin.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-umax-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-umax.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-umin-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-umin.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-xor-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-xor.ll | 88 +- llvm/test/CodeGen/X86/vector-shift-lshr-128.ll | 181 + llvm/test/CodeGen/X86/vector-shift-shl-128.ll | 344 ++ llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll | 8 +- llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll | 26 +- llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 23 +- llvm/test/DebugInfo/ARM/partial-subreg.ll | 24 - llvm/test/DebugInfo/COFF/pieces.ll | 5 +- .../MIR/X86/live-debug-values-fragments.mir | 258 ++ llvm/test/DebugInfo/X86/dbg-addr.ll | 6 +- llvm/test/DebugInfo/X86/debug-loc-offset.mir | 6 - llvm/test/DebugInfo/X86/pr19307.mir | 6 - llvm/test/MC/AMDGPU/dpp-err.s | 38 + llvm/test/MC/AMDGPU/expressions-gfx10.s | 2 +- llvm/test/MC/AMDGPU/sopk-err.s | 66 +- llvm/test/MC/AMDGPU/sopk.s | 38 + llvm/test/MC/AMDGPU/vop3-literal.s | 389 +++ llvm/test/MC/ARM/mve-minmax.s | 15 + llvm/test/MC/ARM/mve-reductions.s | 28 + llvm/test/MC/ARM/mve-vpt.s | 57 + llvm/test/MC/Disassembler/ARM/mve-minmax.txt | 11 + llvm/test/MC/Disassembler/ARM/mve-reductions.txt | 27 + llvm/test/MC/Disassembler/ARM/mve-vpt.txt | 13 + llvm/test/MC/Mips/mips1/sd.s | 13 + .../Transforms/CodeGenPrepare/X86/vec-shift.ll | 117 + llvm/test/Transforms/HardwareLoops/ARM/calls.ll | 1 - llvm/test/Transforms/HardwareLoops/ARM/counter.ll | 2 - llvm/test/Transforms/HardwareLoops/ARM/do-rem.ll | 2 - .../Transforms/HardwareLoops/ARM/fp-emulation.ll | 2 - .../test/Transforms/HardwareLoops/ARM/simple-do.ll | 2 - .../test/Transforms/HardwareLoops/ARM/structure.ll | 70 +- .../Transforms/IndVarSimplify/exit_value_tests.ll | 228 +- .../Transforms/IndVarSimplify/lftr-multi-exit.ll | 158 + llvm/test/Transforms/IndVarSimplify/pr39673.ll | 154 +- llvm/test/Transforms/InstCombine/fast-math.ll | 18 + llvm/test/Transforms/InstCombine/minmax-fp.ll | 132 + llvm/test/Transforms/LoopLoadElim/convergent.ll | 51 + .../LoopVectorize/AArch64/reduction-small-size.ll | 6 +- llvm/test/Transforms/LoopVersioning/convergent.ll | 40 + .../SLPVectorizer/AArch64/gather-cost.ll | 2 +- .../SLPVectorizer/AArch64/gather-root.ll | 10 +- .../Transforms/SLPVectorizer/AArch64/horizontal.ll | 6 +- .../Transforms/SLPVectorizer/AArch64/transpose.ll | 2 +- .../SLPVectorizer/X86/propagate_ir_flags.ll | 36 + .../Transforms/SimplifyCFG/sink-common-code.ll | 44 - .../test/Transforms/StackProtector/X86/captures.ll | 139 + .../StackProtector}/X86/lit.local.cfg | 0 llvm/test/tools/llvm-ar/thin-archive.test | 12 +- .../{sysv-i386.test => format-sysv-32-bit.test} | 1 - .../test/tools/llvm-nm/X86/format-sysv-64-bit.test | 5 + llvm/test/tools/llvm-nm/X86/macho-format-sysv.test | 8 + llvm/test/tools/llvm-nm/X86/portability.test | 25 + llvm/test/tools/llvm-nm/X86/posixELF.test | 4 - llvm/test/tools/llvm-nm/X86/sysv-x86_64.test | 13 - llvm/test/tools/llvm-nm/debug-syms.test | 32 + llvm/test/tools/llvm-nm/format-sysv-binding.test | 44 + llvm/test/tools/llvm-nm/format-sysv-layout.test | 28 + llvm/test/tools/llvm-nm/format-sysv-section.test | 35 + llvm/test/tools/llvm-nm/format-sysv-type.test | 44 + llvm/test/tools/llvm-nm/no-sort.test | 40 + llvm/test/tools/llvm-nm/numeric-sort.test | 44 + llvm/test/tools/llvm-nm/print-filename.test | 19 + llvm/test/tools/llvm-nm/print-size.test | 19 + llvm/test/tools/llvm-nm/undefined-only.test | 20 + .../tools/llvm-objcopy/ELF/Inputs/sections.hex | 15 + llvm/test/tools/llvm-objcopy/ELF/ihex-reader.test | 203 ++ .../tools/llvm-readobj/check-output-order.test | 45 + llvm/tools/llvm-extract/llvm-extract.cpp | 87 +- llvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp | 11 + llvm/tools/llvm-objcopy/ELF/ELFObjcopy.h | 2 + llvm/tools/llvm-objcopy/ELF/Object.cpp | 246 +- llvm/tools/llvm-objcopy/ELF/Object.h | 72 +- llvm/tools/llvm-objcopy/llvm-objcopy.cpp | 20 +- llvm/tools/llvm-readobj/COFFDumper.cpp | 2 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 7 +- llvm/tools/llvm-readobj/MachODumper.cpp | 2 +- llvm/tools/llvm-readobj/llvm-readobj.cpp | 19 +- llvm/tools/opt/opt.cpp | 1 + llvm/utils/TableGen/CodeGenTarget.cpp | 35 +- llvm/utils/TableGen/IntrinsicEmitter.cpp | 78 +- llvm/utils/gn/TODO.txt | 2 +- .../llvm/lib/Target/SystemZ/AsmParser/BUILD.gn | 23 + .../gn/secondary/llvm/lib/Target/SystemZ/BUILD.gn | 74 + .../llvm/lib/Target/SystemZ/Disassembler/BUILD.gn | 23 + .../llvm/lib/Target/SystemZ/MCTargetDesc/BUILD.gn | 60 + .../llvm/lib/Target/SystemZ/TargetInfo/BUILD.gn | 10 + .../utils/gn/secondary/llvm/lib/Target/targets.gni | 3 + polly/include/polly/ScopBuilder.h | 25 + polly/include/polly/ScopInfo.h | 36 +- polly/lib/Analysis/ScopBuilder.cpp | 294 +- polly/lib/Analysis/ScopInfo.cpp | 290 +- 362 files changed, 20003 insertions(+), 9163 deletions(-) rename clang/{include/clang/Basic => lib/Sema}/OpenCLBuiltins.td (100%) create mode 100644 clang/test/ClangScanDeps/Inputs/header.h create mode 100644 clang/test/ClangScanDeps/Inputs/header2.h create mode 100644 clang/test/ClangScanDeps/Inputs/regular_cdb.json create mode 100644 clang/test/ClangScanDeps/regular_cdb.cpp create mode 100644 clang/test/CodeGenCXX/ms-constexpr-var-template.cpp create mode 100644 clang/tools/clang-scan-deps/CMakeLists.txt create mode 100644 clang/tools/clang-scan-deps/ClangScanDeps.cpp create mode 100644 lld/test/COFF/Inputs/no-ipi-stream-obj.obj.yaml create mode 100644 lld/test/COFF/Inputs/no-ipi-stream-pdb.pdb.yaml create mode 100644 lld/test/COFF/allow-unknown-debug-info.test create mode 100644 lld/test/COFF/no-ipi-stream.test create mode 100644 lld/test/ELF/invalid/bad-arm-attributes.s create mode 100644 lld/test/ELF/invalid/bad-arm-attributes2.s create mode 100644 lldb/lit/SymbolFile/DWARF/debug-types-dwarf5.s create mode 100644 llvm/test/CodeGen/AArch64/machine_cse_illegal_hoist.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll create mode 100644 llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir create mode 100644 llvm/test/CodeGen/X86/nontemporal-3.ll create mode 100644 llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir create mode 100644 llvm/test/MC/AMDGPU/dpp-err.s create mode 100644 llvm/test/MC/AMDGPU/vop3-literal.s create mode 100644 llvm/test/MC/ARM/mve-minmax.s create mode 100644 llvm/test/MC/ARM/mve-reductions.s create mode 100644 llvm/test/MC/ARM/mve-vpt.s create mode 100644 llvm/test/MC/Disassembler/ARM/mve-minmax.txt create mode 100644 llvm/test/MC/Disassembler/ARM/mve-reductions.txt create mode 100644 llvm/test/MC/Disassembler/ARM/mve-vpt.txt create mode 100644 llvm/test/MC/Mips/mips1/sd.s create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/vec-shift.ll create mode 100644 llvm/test/Transforms/LoopLoadElim/convergent.ll create mode 100644 llvm/test/Transforms/LoopVersioning/convergent.ll create mode 100644 llvm/test/Transforms/StackProtector/X86/captures.ll copy llvm/test/{Analysis/CostModel => Transforms/StackProtector}/X86/lit.local.cfg (100%) rename llvm/test/tools/llvm-nm/X86/{sysv-i386.test => format-sysv-32-bit.test} (89%) create mode 100644 llvm/test/tools/llvm-nm/X86/format-sysv-64-bit.test create mode 100644 llvm/test/tools/llvm-nm/X86/macho-format-sysv.test create mode 100644 llvm/test/tools/llvm-nm/X86/portability.test delete mode 100644 llvm/test/tools/llvm-nm/X86/posixELF.test delete mode 100644 llvm/test/tools/llvm-nm/X86/sysv-x86_64.test create mode 100644 llvm/test/tools/llvm-nm/debug-syms.test create mode 100644 llvm/test/tools/llvm-nm/format-sysv-binding.test create mode 100644 llvm/test/tools/llvm-nm/format-sysv-layout.test create mode 100644 llvm/test/tools/llvm-nm/format-sysv-section.test create mode 100644 llvm/test/tools/llvm-nm/format-sysv-type.test create mode 100644 llvm/test/tools/llvm-nm/no-sort.test create mode 100644 llvm/test/tools/llvm-nm/numeric-sort.test create mode 100644 llvm/test/tools/llvm-nm/print-filename.test create mode 100644 llvm/test/tools/llvm-nm/print-size.test create mode 100644 llvm/test/tools/llvm-nm/undefined-only.test create mode 100644 llvm/test/tools/llvm-objcopy/ELF/Inputs/sections.hex create mode 100644 llvm/test/tools/llvm-objcopy/ELF/ihex-reader.test create mode 100644 llvm/test/tools/llvm-readobj/check-output-order.test create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/AsmParser/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/Disassembler/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/MCTargetDesc/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/TargetInfo/BUILD.gn -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk/llvm-master-aarch64-spec2k6-Oz_LTO updated (cfa611447b -> a26e2e9fea)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-aarch64-spec2k6-Oz_LTO in repository toolchain/ci/glibc. from cfa611447b libio: freopen of default streams crashes in old programs [B [...] adds 21bd039bb4 powerpc: consolidate rint adds e41d66e41a powerpc: copysign cleanup adds 2731a326b1 benchtests: Add isnan/isinf/isfinite benchmark adds 197dbda1a1 math: Use wordsize-64 version for isnan adds 2666f96390 powerpc: Remove optimized isnan adds a8c590f789 math: Use wordsize-64 version for isinf adds 6427a6ac8c powerpc: Remove optimized isinf adds a72186761b math: Use wordsize-64 version for finite adds 1192696069 powerpc: Remove optimized finite adds 55f82d328d aarch64: add STO_AARCH64_VARIANT_PCS and DT_AARCH64_VARIANT_PCS adds 82bc69c012 aarch64: handle STO_AARCH64_VARIANT_PCS new a26e2e9fea Allow memset local PLT reference for powerpc soft-float. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 175 +++++++++++++++++++++ benchtests/Makefile | 5 +- benchtests/isfinite-inputs | 21 +++ benchtests/isinf-inputs | 21 +++ benchtests/isnan-inputs | 21 +++ elf/elf.h | 7 + sysdeps/{mips => aarch64}/dl-dtprocnum.h | 6 +- sysdeps/aarch64/dl-machine.h | 42 ++++- sysdeps/aarch64/linkmap.h | 1 + sysdeps/ieee754/dbl-64/s_finite.c | 22 +-- sysdeps/ieee754/dbl-64/s_isinf.c | 15 +- sysdeps/ieee754/dbl-64/s_isnan.c | 17 +- sysdeps/ieee754/dbl-64/wordsize-64/s_finite.c | 43 ----- sysdeps/ieee754/dbl-64/wordsize-64/s_isinf.c | 34 ---- sysdeps/ieee754/dbl-64/wordsize-64/s_isnan.c | 40 ----- sysdeps/powerpc/fpu/round_to_integer.h | 37 +++-- sysdeps/powerpc/fpu/{s_ceil.c => s_copysign.c} | 17 +- .../powerpc/fpu/{s_nearbyintf.c => s_copysignf.c} | 10 +- sysdeps/powerpc/fpu/s_isnan.c | 62 -------- sysdeps/powerpc/fpu/s_isnanf.S | 1 - sysdeps/powerpc/fpu/s_rint.c | 19 +-- sysdeps/powerpc/fpu/s_rintf.c | 19 +-- sysdeps/powerpc/powerpc32/fpu/s_copysign.S | 53 ------- sysdeps/powerpc/powerpc32/fpu/s_copysignf.S | 1 - sysdeps/powerpc/powerpc32/fpu/s_isnan.S | 57 ------- sysdeps/powerpc/powerpc32/fpu/s_rint.S | 69 -------- sysdeps/powerpc/powerpc32/fpu/s_rintf.S | 66 -------- .../powerpc32/power4/fpu/multiarch/Makefile | 14 +- .../power4/fpu/multiarch/s_copysign-power6.S | 33 ---- .../power4/fpu/multiarch/s_copysign-ppc32.S | 34 ---- .../powerpc32/power4/fpu/multiarch/s_copysign.c | 45 ------ .../powerpc32/power4/fpu/multiarch/s_copysignf.c | 34 ---- .../power4/fpu/multiarch/s_finite-power7.S | 33 ---- .../power4/fpu/multiarch/s_finite-ppc32.c | 33 ---- .../powerpc32/power4/fpu/multiarch/s_finite.c | 57 ------- .../power4/fpu/multiarch/s_finitef-ppc32.c | 31 ---- .../powerpc32/power4/fpu/multiarch/s_finitef.c | 34 ---- .../power4/fpu/multiarch/s_isinf-power7.S | 33 ---- .../powerpc32/power4/fpu/multiarch/s_isinf-ppc32.c | 33 ---- .../powerpc32/power4/fpu/multiarch/s_isinf.c | 50 ------ .../power4/fpu/multiarch/s_isinff-ppc32.c | 31 ---- .../powerpc32/power4/fpu/multiarch/s_isinff.c | 35 ----- .../power4/fpu/multiarch/s_isnan-power5.S | 33 ---- .../power4/fpu/multiarch/s_isnan-power6.S | 33 ---- .../power4/fpu/multiarch/s_isnan-power7.S | 33 ---- .../powerpc32/power4/fpu/multiarch/s_isnan-ppc32.S | 32 ---- .../powerpc32/power4/fpu/multiarch/s_isnan.c | 56 ------- .../power4/fpu/multiarch/s_isnanf-power5.S | 28 ---- .../power4/fpu/multiarch/s_isnanf-power6.S | 28 ---- .../powerpc32/power4/fpu/multiarch/s_isnanf.c | 39 ----- sysdeps/powerpc/powerpc32/power5/fpu/s_isnan.S | 61 ------- sysdeps/powerpc/powerpc32/power5/fpu/s_isnanf.S | 45 ------ sysdeps/powerpc/powerpc32/power6/fpu/s_copysign.S | 49 ------ sysdeps/powerpc/powerpc32/power6/fpu/s_copysignf.S | 1 - sysdeps/powerpc/powerpc32/power6/fpu/s_isnan.S | 61 ------- sysdeps/powerpc/powerpc32/power6/fpu/s_isnanf.S | 44 ------ sysdeps/powerpc/powerpc32/power7/fpu/s_finite.S | 93 ----------- sysdeps/powerpc/powerpc32/power7/fpu/s_finitef.S | 1 - sysdeps/powerpc/powerpc32/power7/fpu/s_isinf.S | 85 ---------- sysdeps/powerpc/powerpc32/power7/fpu/s_isinff.S | 1 - sysdeps/powerpc/powerpc32/power7/fpu/s_isnan.S | 90 ----------- sysdeps/powerpc/powerpc32/power7/fpu/s_isnanf.S | 1 - sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile | 9 +- .../powerpc64/fpu/multiarch/s_copysign-power6.S | 32 ---- .../powerpc64/fpu/multiarch/s_copysign-ppc64.S | 34 ---- .../powerpc/powerpc64/fpu/multiarch/s_copysign.c | 45 ------ .../powerpc/powerpc64/fpu/multiarch/s_copysignf.c | 34 ---- .../powerpc64/fpu/multiarch/s_finite-power7.S | 32 ---- .../powerpc64/fpu/multiarch/s_finite-power8.S | 32 ---- .../powerpc64/fpu/multiarch/s_finite-ppc64.c | 34 ---- sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite.c | 69 -------- .../powerpc64/fpu/multiarch/s_finitef-ppc64.c | 32 ---- .../powerpc/powerpc64/fpu/multiarch/s_finitef.c | 37 ----- .../powerpc64/fpu/multiarch/s_isinf-power7.S | 32 ---- .../powerpc64/fpu/multiarch/s_isinf-power8.S | 32 ---- .../powerpc64/fpu/multiarch/s_isinf-ppc64.c | 33 ---- sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf.c | 62 -------- .../powerpc64/fpu/multiarch/s_isinff-ppc64.c | 31 ---- sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinff.c | 38 ----- .../powerpc64/fpu/multiarch/s_isnan-power5.S | 32 ---- .../powerpc64/fpu/multiarch/s_isnan-power6.S | 32 ---- .../powerpc64/fpu/multiarch/s_isnan-power6x.S | 32 ---- .../powerpc64/fpu/multiarch/s_isnan-power7.S | 32 ---- .../powerpc64/fpu/multiarch/s_isnan-power8.S | 32 ---- .../powerpc64/fpu/multiarch/s_isnan-ppc64.S | 36 ----- sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan.c | 71 --------- sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnanf.c | 44 ------ sysdeps/powerpc/powerpc64/fpu/s_copysign.S | 53 ------- sysdeps/powerpc/powerpc64/fpu/s_copysignf.S | 1 - sysdeps/powerpc/powerpc64/fpu/s_isnan.S | 56 ------- sysdeps/powerpc/powerpc64/fpu/s_rint.S | 58 ------- sysdeps/powerpc/powerpc64/fpu/s_rintf.S | 57 ------- sysdeps/powerpc/powerpc64/power5/fpu/s_isnan.S | 60 ------- sysdeps/powerpc/powerpc64/power6/fpu/s_copysign.S | 49 ------ sysdeps/powerpc/powerpc64/power6/fpu/s_copysignf.S | 1 - sysdeps/powerpc/powerpc64/power6/fpu/s_isnan.S | 59 ------- sysdeps/powerpc/powerpc64/power6x/fpu/s_isnan.S | 58 ------- sysdeps/powerpc/powerpc64/power7/fpu/s_finite.S | 70 --------- sysdeps/powerpc/powerpc64/power7/fpu/s_finitef.S | 1 - sysdeps/powerpc/powerpc64/power7/fpu/s_isinf.S | 69 -------- sysdeps/powerpc/powerpc64/power7/fpu/s_isinff.S | 1 - sysdeps/powerpc/powerpc64/power7/fpu/s_isnan.S | 68 -------- sysdeps/powerpc/powerpc64/power7/fpu/s_isnanf.S | 1 - sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S | 56 ------- sysdeps/powerpc/powerpc64/power8/fpu/s_finitef.S | 1 - sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S | 61 ------- sysdeps/powerpc/powerpc64/power8/fpu/s_isinff.S | 1 - sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S | 56 ------- sysdeps/powerpc/powerpc64/power8/fpu/s_isnanf.S | 1 - .../linux/powerpc/powerpc32/nofpu/localplt.data | 1 + 110 files changed, 358 insertions(+), 3635 deletions(-) create mode 100644 benchtests/isfinite-inputs create mode 100644 benchtests/isinf-inputs create mode 100644 benchtests/isnan-inputs copy sysdeps/{mips => aarch64}/dl-dtprocnum.h (85%) delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_finite.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_isinf.c delete mode 100644 sysdeps/ieee754/dbl-64/wordsize-64/s_isnan.c copy sysdeps/powerpc/fpu/{s_ceil.c => s_copysign.c} (76%) copy sysdeps/powerpc/fpu/{s_nearbyintf.c => s_copysignf.c} (78%) delete mode 100644 sysdeps/powerpc/fpu/s_isnan.c delete mode 100644 sysdeps/powerpc/fpu/s_isnanf.S delete mode 100644 sysdeps/powerpc/powerpc32/fpu/s_copysign.S delete mode 100644 sysdeps/powerpc/powerpc32/fpu/s_copysignf.S delete mode 100644 sysdeps/powerpc/powerpc32/fpu/s_isnan.S delete mode 100644 sysdeps/powerpc/powerpc32/fpu/s_rint.S delete mode 100644 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6 years, 2 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk/llvm-master-aarch64-spec2k6-Oz_LTO updated (163a5418c8c -> a9537ef0553)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-aarch64-spec2k6-Oz_LTO in repository toolchain/ci/gcc. from 163a5418c8c Disable hash-table sanitization for mem stats maps. adds 00f08bc3d9b Replace std::to_string for integers with optimized version adds 7445abf1ee5 Simplify std::scoped_lock destructor adds 387a4a81a22 Improve static_assert messages for std::variant adds 2461f833466 [nvptx] Assert fork has at most one join in nvptx_find_par adds 5a1fde43e26 PR tree-optimization/90662 - strlen of a string in a vla pl [...] adds 67af9e6caef PR middle-end/90676 - default GIMPLE dumps lack information adds 04bff9f0663 Update last ChangeLog entry. adds a0ebfde01bd 2019-06-12 Steven G. Kargl <kargl(a)gcc.gnu.org> adds 48aa9227888 Initial TI PRU GCC port adds b77c1d39033 Fix ChangeLog dates for last commit adds 83abca3ef97 Initial TI PRU libgcc port adds 8470cffad65 testsuite: Add PRU tests adds 7a7df8db43e testsuite: Add check for overflowed IMEM region to testsuite adds 5680ce37226 testsuite: Add check for unsupported TI ABI PRU features to [...] adds 7b1d1084e5d testsuite: Remove PRU from test cases requiring hosted environment adds d7a38ce27c1 testsuite: Define PRU stack usage adds 68480b8d5f6 testsuite: Mark that PRU has one-cycle jumps adds 593c1013643 testsuite: Mark that PRU uses all function pointer bits adds 50324c06a83 testsuite: Mark testsuite that PRU has different adds 330383590de Add myself to MAINTAINERS adds d51263b41ff Fix incorrect __cpp_lib_parallel_algorithm macro definitions adds 6233ade970a PR c++/90736 - bogus error with alignof. * constexpr.c (a [...] adds c1df40f9129 Tweak tests to avoid fallout from MEM_REF changes on target [...] adds 3c58902657c 2019-06-12 Steven G. Kargl <kargl(a)gcc.gnu.org> adds 518af62d9ff PR c++/90825 - endless recursion when evaluating sizeof. [...] adds 04a89d67a59 * io.c (check_format): Use G_(...) instead of _(...) for e [...] adds 7ff4860a198 PR c++/66999 - 'this' captured by reference. * parser.c ( [...] adds c2531d4e6c9 Daily bump. adds 30cda7a344b PR c++/87410 * g++.dg/cpp1y/pr87410.C: New test. adds eb49f99279c gcc/ChangeLog: adds 217ad6d6ebf gcc/ChangeLog: adds ef871d9929f gcc/ChangeLog: adds 3984c5cdfac PR tree-optimization/89713 - Assume loop with an exit is finite adds fec050ace17 2019-06-13 Richard Biener <rguenther(a)suse.de> adds 43bbc1da377 /cp 2019-06-13 Paolo Carlini <paolo.carlini(a)oracle.com> adds 5e3e7fbe47b [ARC] Add documentation naked, ilink and firq adds 714ba8581de Revamp value_range::may_contain_p. adds 0decb67615e 2019-06-13 Richard Biener <rguenther(a)suse.de> adds b970d9709b8 * g++.dg/tree-ssa/ssa-dse-1.C: Don't match exact number of [...] adds c2174db34e0 * config/nvptx/nvptx.c (nvptx_sese_number, nvptx_sese_pseu [...] adds a9537ef0553 2019-06-13 Richard Biener <rguenther(a)suse.de> No new revisions were added by this update. Summary of changes: ChangeLog | 9 + MAINTAINERS | 1 + configure | 7 + configure.ac | 7 + gcc/ChangeLog | 117 + gcc/DATESTAMP | 2 +- gcc/common.opt | 4 + gcc/common/config/pru/pru-common.c | 36 + gcc/config.gcc | 9 + gcc/config/aarch64/aarch64.c | 2 +- gcc/config/aarch64/iterators.md | 2 +- gcc/config/nvptx/nvptx.c | 16 +- gcc/config/pru/alu-zext.md | 181 ++ gcc/config/pru/constraints.md | 108 + gcc/config/pru/predicates.md | 287 ++ gcc/config/pru/pru-opts.h | 31 + gcc/config/pru/pru-passes.c | 228 ++ gcc/config/pru/pru-pragma.c | 86 + gcc/config/pru/pru-protos.h | 72 + gcc/config/pru/pru.c | 3036 ++++++++++++++++++++ gcc/config/pru/pru.h | 573 ++++ gcc/config/pru/pru.md | 1022 +++++++ gcc/config/pru/pru.opt | 54 + gcc/config/pru/t-pru | 31 + gcc/cp/ChangeLog | 35 + gcc/cp/constexpr.c | 20 +- gcc/cp/decl.c | 75 +- gcc/cp/parser.c | 14 +- gcc/cp/typeck.c | 2 +- gcc/cp/typeck2.c | 23 +- gcc/doc/extend.texi | 35 +- gcc/doc/invoke.texi | 76 + gcc/doc/md.texi | 19 + gcc/fortran/ChangeLog | 17 + gcc/fortran/array.c | 18 +- gcc/fortran/gfortran.h | 2 - gcc/fortran/io.c | 61 +- gcc/gimple-loop-versioning.cc | 2 +- gcc/omp-offload.c | 11 +- gcc/opts.c | 1 + gcc/testsuite/ChangeLog | 212 ++ gcc/testsuite/g++.dg/cpp0x/alias-decl-1.C | 3 +- gcc/testsuite/g++.dg/cpp0x/alignof5.C | 6 + gcc/testsuite/g++.dg/cpp0x/constexpr-sizeof2.C | 14 + gcc/testsuite/g++.dg/cpp0x/constexpr-sizeof3.C | 22 + gcc/testsuite/g++.dg/cpp0x/lambda/lambda-this21.C | 10 + gcc/testsuite/g++.dg/cpp1y/pr87410.C | 19 + .../g++.dg/diagnostic/conflicting-specifiers-1.C | 1 + .../g++.dg/diagnostic/two-or-more-data-types-1.C | 1 + .../g++.dg/diagnostic/variably-modified-type-1.C | 12 + gcc/testsuite/g++.dg/other/pr84792-1.C | 2 +- gcc/testsuite/g++.dg/other/pr84792-2.C | 2 +- gcc/testsuite/g++.dg/parse/error10.C | 2 +- gcc/testsuite/g++.dg/parse/error24.C | 2 +- gcc/testsuite/g++.dg/parse/error32.C | 2 +- gcc/testsuite/g++.dg/parse/error33.C | 2 +- gcc/testsuite/g++.dg/parse/pragma2.C | 3 +- gcc/testsuite/g++.dg/parse/saved1.C | 3 +- gcc/testsuite/g++.dg/template/operator6.C | 2 +- gcc/testsuite/g++.dg/template/pr61745.C | 3 +- gcc/testsuite/g++.dg/template/typedef41.C | 2 +- gcc/testsuite/g++.dg/tree-ssa/empty-loop.C | 33 + gcc/testsuite/g++.dg/tree-ssa/pr19807.C | 3 +- gcc/testsuite/g++.dg/tree-ssa/pr31146.C | 4 +- gcc/testsuite/g++.dg/tree-ssa/ssa-dse-1.C | 4 +- gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C | 2 +- gcc/testsuite/g++.old-deja/g++.jason/crash10.C | 2 +- gcc/testsuite/gcc.c-torture/execute/20101011-1.c | 3 + gcc/testsuite/gcc.dg/20020312-2.c | 2 + gcc/testsuite/gcc.dg/builtin-apply2.c | 2 +- gcc/testsuite/gcc.dg/const-1.c | 2 +- gcc/testsuite/gcc.dg/graphite/graphite.exp | 2 +- gcc/testsuite/gcc.dg/loop-unswitch-1.c | 2 +- gcc/testsuite/gcc.dg/predict-9.c | 2 +- gcc/testsuite/gcc.dg/pure-2.c | 2 +- gcc/testsuite/gcc.dg/stack-usage-1.c | 2 + gcc/testsuite/gcc.dg/store_merging_5.c | 6 +- gcc/testsuite/gcc.dg/strlenopt-62.c | 189 ++ gcc/testsuite/gcc.dg/strlenopt-63.c | 158 + gcc/testsuite/gcc.dg/strlenopt-64.c | 182 ++ .../gcc.dg/torture/stackalign/builtin-apply-2.c | 2 +- gcc/testsuite/gcc.dg/tree-prof/stringop-2.c | 5 +- gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/20040211-1.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/dce-2.c | 37 + gcc/testsuite/gcc.dg/tree-ssa/dump-6.c | 38 + gcc/testsuite/gcc.dg/tree-ssa/loop-10.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/pr30375.c | 3 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/slsr-27.c | 3 +- gcc/testsuite/gcc.dg/tree-ssa/slsr-28.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/slsr-29.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/split-path-6.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-24.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-12.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-version-1.c | 20 + gcc/testsuite/gcc.dg/vect/vect-version-2.c | 20 + gcc/testsuite/gcc.target/aarch64/pr88834.c | 15 + gcc/testsuite/gcc.target/aarch64/pr88838.c | 11 + .../gcc.target/aarch64/sve/struct_vect_1.c | 8 +- .../gcc.target/aarch64/sve/struct_vect_14.c | 8 +- .../gcc.target/aarch64/sve/struct_vect_15.c | 8 +- .../gcc.target/aarch64/sve/struct_vect_16.c | 8 +- .../gcc.target/aarch64/sve/struct_vect_17.c | 8 +- .../gcc.target/aarch64/sve/struct_vect_7.c | 8 +- gcc/testsuite/gcc.target/aarch64/sve/while_1.c | 16 +- gcc/testsuite/gcc.target/i386/pr90856.c | 14 + gcc/testsuite/gcc.target/pru/abi-arg-struct.c | 164 ++ gcc/testsuite/gcc.target/pru/ashiftrt.c | 13 + gcc/testsuite/gcc.target/pru/builtins-1.c | 12 + gcc/testsuite/gcc.target/pru/builtins-error.c | 6 + gcc/testsuite/gcc.target/pru/clearbit.c | 13 + gcc/testsuite/gcc.target/pru/loop-asm.c | 19 + gcc/testsuite/gcc.target/pru/loop-dowhile.c | 45 + gcc/testsuite/gcc.target/pru/loop-hi-1.c | 38 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gcc/testsuite/gcc.target/pru/pragma-ctable_entry.c | 22 + gcc/testsuite/gcc.target/pru/pru.exp | 41 + gcc/testsuite/gcc.target/pru/qbbc-1.c | 29 + gcc/testsuite/gcc.target/pru/qbbc-2.c | 15 + gcc/testsuite/gcc.target/pru/qbbc-3.c | 15 + gcc/testsuite/gcc.target/pru/qbbs-1.c | 29 + gcc/testsuite/gcc.target/pru/qbbs-2.c | 15 + gcc/testsuite/gcc.target/pru/setbit.c | 13 + .../gcc.target/pru/zero_extend-and-hisi.c | 16 + .../gcc.target/pru/zero_extend-and-qihi.c | 16 + .../gcc.target/pru/zero_extend-and-qisi.c | 16 + gcc/testsuite/gcc.target/pru/zero_extend-hisi.c | 43 + gcc/testsuite/gcc.target/pru/zero_extend-qihi.c | 43 + gcc/testsuite/gcc.target/pru/zero_extend-qisi.c | 43 + gcc/testsuite/gfortran.dg/pr90002.f90 | 6 + gcc/testsuite/lib/gcc-dg.exp | 11 + gcc/testsuite/lib/target-supports.exp | 35 +- gcc/testsuite/lib/target-utils.exp | 12 + gcc/tree-pretty-print.c | 229 +- gcc/tree-sra.c | 2 + gcc/tree-ssa-address.c | 29 + gcc/tree-ssa-address.h | 3 + gcc/tree-ssa-dce.c | 11 + gcc/tree-ssa-loop-ivopts.c | 24 + gcc/tree-ssa-loop-niter.c | 21 + gcc/tree-ssa-strlen.c | 77 +- gcc/tree-vect-loop-manip.c | 252 +- gcc/tree-vect-loop.c | 85 +- gcc/tree-vectorizer.c | 6 +- gcc/tree-vectorizer.h | 8 + gcc/tree-vrp.c | 47 +- gcc/tree-vrp.h | 13 +- gcc/vr-values.c | 2 +- libgcc/ChangeLog | 26 + libgcc/config.host | 7 + libgcc/config/pru/asri.c | 33 + libgcc/config/pru/eqd.c | 45 + libgcc/config/pru/eqf.c | 45 + libgcc/config/pru/ged.c | 45 + libgcc/config/pru/gef.c | 45 + libgcc/config/pru/gtd.c | 45 + libgcc/config/pru/gtf.c | 45 + libgcc/config/pru/led.c | 45 + libgcc/config/pru/lef.c | 45 + libgcc/config/pru/lib2bitcountHI.c | 43 + libgcc/config/pru/lib2divHI.c | 42 + libgcc/config/pru/lib2divQI.c | 42 + libgcc/config/pru/lib2divSI.c | 48 + libgcc/config/pru/libgcc-eabi.ver | 88 + libgcc/config/pru/ltd.c | 45 + libgcc/config/pru/ltf.c | 45 + libgcc/config/pru/mpyll.S | 57 + libgcc/config/pru/pru-abi.h | 109 + libgcc/config/pru/pru-asm.h | 35 + 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create mode 100644 libgcc/config/pru/lib2divQI.c create mode 100644 libgcc/config/pru/lib2divSI.c create mode 100644 libgcc/config/pru/libgcc-eabi.ver create mode 100644 libgcc/config/pru/ltd.c create mode 100644 libgcc/config/pru/ltf.c create mode 100644 libgcc/config/pru/mpyll.S create mode 100644 libgcc/config/pru/pru-abi.h create mode 100644 libgcc/config/pru/pru-asm.h create mode 100644 libgcc/config/pru/pru-divmod.h create mode 100644 libgcc/config/pru/sfp-machine.h create mode 100644 libgcc/config/pru/t-pru create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/pr84955-1.c create mode 100644 libstdc++-v3/include/bits/charconv.h create mode 100644 libstdc++-v3/testsuite/21_strings/basic_string/numeric_conversi [...] create mode 100644 libstdc++-v3/testsuite/25_algorithms/pstl/feature_test.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk/llvm-master-aarch64-spec2k6-Oz_LTO updated (c0d38b0ec6 -> 57a63d27dc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-aarch64-spec2k6-Oz_LTO in repository toolchain/ci/binutils-gdb. from c0d38b0ec6 Add support for NetBSD/sh3 core reg sections to readelf. adds 9abca70219 Add support for NetBSD PaX notes to readelf. adds 62e0492f57 Prevent a seg-fault from objdup when disassembling binaries [...] adds 6fbc939cfd Remove the ldmx mnemonic that never made it into POWER9. adds a0e44ef56c Add missing ChangeLog entries adds 6ce26ac7c3 cpu/or1k: Add support for orfp64a32 spec adds d3ad6278d6 cpu/or1k: Define unordered comparisons adds eb212c84a1 cpu/or1k: Document no branch delay slot architectures and l.adrp adds a2e4218f23 cpu/or1k: Update fpu compare symbols to imply set flag adds e4c4ac46e8 opcodes/or1k: Regenerate opcodes adds 00b56dbe70 Fix latent bug in custom word point completion handling adds 3844e605e6 Fix latent bug with custom word point completers adds b9a3f8429b Fix TID parser bug adds cbba3ecd36 Make check_for_argument skip whitespace after arg itself adds 93bcb04349 Allow "unlimited" abbreviations adds 48c410fb70 Fix "set enum-command value junk" adds 597bf39df9 Remove "show" command completers, "set" command completers f [...] adds ccf46844d3 gdb.base/completion.exp: Fix comment typo adds dca0f6c0a4 New set/show testing framework (gdb.base/settings.exp) adds dee7b4c83a boolean/auto-boolean commands, make "o" ambiguous adds 2c722807a7 number_or_range_parser::get_number, don't treat "1 -" as a range adds 9d0faba9f5 Introduce generic command options framework adds 7d8062de98 Make "print" and "compile print" support -OPT options adds e6ed716cd5 Migrate rest of compile commands to new options framework adds 2daf894ed0 "set print raw frame-arguments" -> "set print raw-frame-arguments" adds d4c16835ca Make "backtrace" support -OPT options adds 90a1ef8762 "backtrace full/no-filters/hide" completer adds e2a689da55 lib/completion-support.exp: Add test_gdb_completion_offers_commands adds 272d459434 Introduce complete_nested_command_line adds 5d7071341d Make "frame apply" support -OPT options adds f7e13587ea "thread apply 1 -- -" vs "frame apply level 0 -- -" adds 6665660a41 Make "thread apply" use the gdb::option framework adds 6206060d9b Delete parse_flags/parse_flags_qcs adds 3345721af1 NEWS and manual changes for command options changes adds e41d1c49a1 Automatic date update in version.in adds 66eb1ed388 Fix gdb build with -std=gnu++11 adds 7ccbb4437a sim/or1k: Regenerate sim adds 688cea90bc sim/common: Wire in df/di conversion adds f1cc84f594 sim/common: wire up new unordered comparisons adds b4f9e00346 sim/testsuite/or1k: Add test for 64-bit fpu operations adds 3c83b496d4 sim/testsuite/or1k: Add test case for l.adrp instruction adds 57a63d27dc sim/testsuite/or1k: Add tests for unordered compares No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 7 + bfd/elf32-arm.c | 10 +- bfd/elfnn-aarch64.c | 20 +- bfd/version.h | 2 +- binutils/ChangeLog | 7 + binutils/readelf.c | 47 +- cpu/ChangeLog | 56 ++ cpu/or1k.cpu | 21 +- cpu/or1k.opc | 92 ++ cpu/or1kcommon.cpu | 113 ++- cpu/or1korbis.cpu | 3 +- cpu/or1korfpx.cpu | 214 +++- gas/ChangeLog | 5 + gas/testsuite/gas/ppc/power9.d | 2 - gas/testsuite/gas/ppc/power9.s | 2 - gdb/ChangeLog | 301 ++++++ gdb/Makefile.in | 3 + gdb/NEWS | 102 ++ gdb/ax-gdb.c | 2 - gdb/breakpoint.c | 5 +- gdb/cli/cli-cmds.c | 3 - gdb/cli/cli-decode.c | 27 +- gdb/cli/cli-decode.h | 4 + gdb/cli/cli-option.c | 724 +++++++++++++ gdb/cli/cli-option.h | 335 ++++++ gdb/cli/cli-setshow.c | 289 +++--- gdb/cli/cli-setshow.h | 27 + gdb/cli/cli-utils.c | 124 +-- gdb/cli/cli-utils.h | 62 +- gdb/command.h | 19 +- gdb/compile/compile.c | 215 ++-- gdb/completer.c | 84 +- gdb/completer.h | 21 +- gdb/cp-valprint.c | 57 -- gdb/doc/ChangeLog | 27 + gdb/doc/gdb.texinfo | 344 ++++++- gdb/frame.c | 84 +- gdb/frame.h | 55 +- gdb/maint-test-options.c | 461 +++++++++ gdb/maint-test-settings.c | 257 +++++ gdb/mi/mi-cmd-stack.c | 23 +- gdb/printcmd.c | 94 +- gdb/python/py-framefilter.c | 3 +- gdb/stack.c | 620 +++++++++--- gdb/stack.h | 5 + gdb/testsuite/ChangeLog | 69 ++ gdb/testsuite/gdb.base/completion.exp | 2 +- gdb/testsuite/gdb.base/options.c | 33 + gdb/testsuite/gdb.base/options.exp | 923 +++++++++++++++++ gdb/testsuite/gdb.base/settings.c | 23 + gdb/testsuite/gdb.base/settings.exp | 545 ++++++++++ gdb/testsuite/gdb.compile/compile.exp | 15 +- gdb/testsuite/gdb.guile/scm-frame-args.exp | 4 +- gdb/testsuite/gdb.multi/tids.exp | 16 +- gdb/testsuite/gdb.python/py-frame-args.exp | 4 +- gdb/testsuite/lib/completion-support.exp | 66 +- gdb/thread.c | 285 ++++-- gdb/tid-parse.c | 16 +- gdb/tid-parse.h | 3 + gdb/unittests/cli-utils-selftests.c | 133 --- gdb/valprint.c | 280 ++++-- gdb/valprint.h | 20 +- opcodes/ChangeLog | 15 + opcodes/or1k-asm.c | 72 +- opcodes/or1k-desc.c | 309 +++++- opcodes/or1k-desc.h | 341 ++++--- opcodes/or1k-dis.c | 43 +- opcodes/or1k-ibld.c | 234 ++++- opcodes/or1k-opc.c | 319 +++++- opcodes/or1k-opc.h | 39 +- opcodes/or1k-opinst.c | 100 +- opcodes/ppc-opc.c | 2 - sim/ChangeLog | 10 + sim/common/ChangeLog | 11 + sim/common/cgen-accfp.c | 49 + sim/common/cgen-fpu.h | 2 + sim/or1k/arch.c | 2 +- sim/or1k/arch.h | 2 +- sim/or1k/cpu.c | 78 +- sim/or1k/cpu.h | 174 +++- sim/or1k/cpuall.h | 2 +- sim/or1k/decode.c | 568 +++++++++-- sim/or1k/decode.h | 21 +- sim/or1k/model.c | 1456 ++++++++++++++++++++++----- sim/or1k/sem-switch.c | 602 ++++++++++- sim/or1k/sem.c | 672 ++++++++++++- sim/testsuite/sim/or1k/ChangeLog | 13 + sim/testsuite/sim/or1k/adrp.S | 73 ++ sim/testsuite/sim/or1k/fpu-unordered.S | 97 ++ sim/testsuite/sim/or1k/fpu64a32-unordered.S | 100 ++ sim/testsuite/sim/or1k/fpu64a32.S | 172 ++++ 91 files changed, 11320 insertions(+), 1673 deletions(-) create mode 100644 gdb/cli/cli-option.c create mode 100644 gdb/cli/cli-option.h create mode 100644 gdb/maint-test-options.c create mode 100644 gdb/maint-test-settings.c create mode 100644 gdb/testsuite/gdb.base/options.c create mode 100644 gdb/testsuite/gdb.base/options.exp create mode 100644 gdb/testsuite/gdb.base/settings.c create mode 100644 gdb/testsuite/gdb.base/settings.exp create mode 100644 sim/testsuite/sim/or1k/adrp.S create mode 100644 sim/testsuite/sim/or1k/fpu-unordered.S create mode 100644 sim/testsuite/sim/or1k/fpu64a32-unordered.S create mode 100644 sim/testsuite/sim/or1k/fpu64a32.S -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk/llvm-master-aarch64-spec2k6-Oz_LTO updated (1b95e521 -> be8c2e19)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-aarch64-spec2k6-Oz_LTO in repository toolchain/ci/base-artifacts. discards 1b95e521 0: init: binutils-gcc-glibc-llvm: 0 new be8c2e19 0: init: binutils-gcc-glibc-llvm: 0 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1b95e521) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk/llvm-master-aarch64- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 102 +- 02-prepare_abe/console.log | 438 +- 03-build_abe-binutils/console.log | 11558 ++-- 04-build_abe-stage1/console.log | 15584 ++--- 05-build_abe-linux/console.log | 152 +- 06-build_abe-glibc/console.log | 40056 ++++++------ 07-build_abe-stage2/console.log | 40727 ++++++------ 08-build_llvm-true/console.log | 12848 ++-- 09-benchmark/benchmark-start.log | 2 +- 09-benchmark/benchmark.log | 5 +- 09-benchmark/console.log | 167 +- 11-update_baseline/console.log | 6 +- console.log | 121642 ++++++++++++++++++----------------- jenkins/manifest.sh | 20 +- results_id | 2 +- 15 files changed, 122610 insertions(+), 120699 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[llvm] branch master updated (abb2e449360 -> 170a24b0b64)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from abb2e449360 [EarlyCSE] Ensure equal keys have the same hash value new 170a24b0b64 [NFC][CodeGen] Add unary FNeg tests to X86/avx512-intrinsic [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: test/CodeGen/X86/avx512-intrinsics-fast-isel.ll | 757 +++++++++++++++++++++++- 1 file changed, 756 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

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Tcwg-commits June 2019